 TroubleElectrical
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9e5fb6f52b
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Updated ASU (Q3) to utilise the 7seg for output, confirmed operation of Q1 to Q3 on board
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2026-09-15 16:52:48 +10:00 |
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TroubleElectrical
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60e5dae43b
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Added ModelSim folder (and have to add files into it as to allow for different testbench code)
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2026-09-08 16:32:01 +10:00 |
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TroubleElectrical
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2208eb4f16
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Updated Q2 project and LU code such that it operates properly on the board. Changed to utilising a case statement for easier readability and also compiled and tested the code on the board.
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2026-09-08 15:36:51 +10:00 |
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TroubleElectrical
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32eea036a8
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Added projects for A1 q2 to q6
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2026-09-04 13:12:33 +10:00 |
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