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9d0c7011ce3a6e24b9799b60eedd75502a4b0300
FPGA_Uni/Quartus/A1_Q4
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History
TroubleElectrical 9d0c7011ce Updated ALU (Q4) with 7seg and confirmed operation on board
2026-09-15 19:05:04 +10:00
..
db
Updated ALU (Q4) with 7seg and confirmed operation on board
2026-09-15 19:05:04 +10:00
incremental_db
Updated ALU (Q4) with 7seg and confirmed operation on board
2026-09-15 19:05:04 +10:00
output_files
Updated ALU (Q4) with 7seg and confirmed operation on board
2026-09-15 19:05:04 +10:00
simulation/questa
Updated ALU (Q4) with 7seg and confirmed operation on board
2026-09-15 19:05:04 +10:00
A1_Q4.qpf
Added projects for A1 q2 to q6
2026-09-04 13:12:33 +10:00
alu.qsf
Updated ALU (Q4) with 7seg and confirmed operation on board
2026-09-15 19:05:04 +10:00
asu.sv
Added all Testbenches to Modelsim and confirmed working operation
2026-09-15 15:15:00 +10:00
c5_pin_model_dump.txt
Updated ALU code with updated 2**width approach and assigned temporary pins to ASU (Q3)
2026-09-09 14:27:11 +10:00
lu.sv
Added all Testbenches to Modelsim and confirmed working operation
2026-09-15 15:15:00 +10:00
seven_seg.sv
Updated ALU (Q4) with 7seg and confirmed operation on board
2026-09-15 19:05:04 +10:00
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