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143 Commits 2 Branches 0 Tags
aee68f46647ae009b200529a66ff9ee7edb14fcb
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4 Commits
Author SHA1 Message Date
riley aee68f4664 An attempt was made to fix errors with this. There is an issue with either branching and/or register dependencies 2026-11-12 16:06:49 +11:00
riley 38fa35fccd Fixed initialisation bug and compilation error in gatereg module. Added mips_pipelined to test suite. Fixed several bugs in assignment3 MIPS module 2026-11-05 14:10:13 +11:00
riley 8f9ec010ac Updated gate register module to support arbitary delays to prevent littering uper-level code with gatereg->gatereg logic values. 2026-11-04 15:40:25 +11:00
riley b046ad7db0 Created register for gating pipeline stage results 2026-10-29 15:34:31 +11:00
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