Logo
Explore Help
Sign In
TroubleElectrical/FPGA_Uni
Watch 1
Star 0 Fork 0
Code Issues 1 Pull Requests Actions Packages Projects Releases Wiki Activity
124 Commits 2 Branches 0 Tags
8b48084fa558380f1f468c2148708cb2ab49f94d
Commit Graph
3 Commits
Author SHA1 Message Date
TroubleElectrical c27a04ef73 Implemented instruction classifier on board (Q6) and added blank submission files (for now) 2026-09-15 20:00:35 +10:00
TroubleElectrical 9583abd307 Updated shifter (Q5) to use proper 2**width approach and corrected the logic such that C is width bits wide, and b is 2**width (as defined in Q5 B) 2026-09-15 19:43:28 +10:00
TroubleElectrical 05361dcf70 Added all Testbenches to Modelsim and confirmed working operation 2026-09-15 15:15:00 +10:00
Powered by Gitea Version: 28.3.0 Page: 36ms Template: 4ms
Auto
English
Bahasa Indonesia Deutsch English Español Français Gaeilge Italiano Latviešu Magyar nyelv Nederlands Polski Português de Portugal Português do Brasil Suomi Svenska Türkçe Čeština Ελληνικά Български Русский Українська فارسی മലയാളം 日本語 简体中文 繁體中文(台灣) 繁體中文(香港) 한국어
Licenses API