4 Commits

Include renames

Author	SHA1	Message	Date
riley	a63d46bc77	Merge branch 'main' of ssh://git.rileyk.au:19482/TroubleElectrical/FPGA_Uni	2026-10-15 15:54:38 +11:00
riley	04d1d3e2fe	Added control unit. TODO: Test	2026-10-15 15:53:59 +11:00
TroubleElectrical	cd7fecd1c4	Updated code such that it will compile	2026-10-15 15:32:15 +11:00
riley	a336df9d80	Reworked CPU to use control unit	2026-10-15 15:16:57 +11:00