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TroubleElectrical/FPGA_Uni
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Code Issues 1 Pull Requests Actions Packages Projects Releases Wiki Activity
31 Commits 2 Branches 0 Tags
4df723318bf1b41034fe40b330dfee432a08c264
Commit Graph
3 Commits
Author SHA1 Message Date
TroubleElectrical a73990b242 Added ASU (Q3) testbench to the modelsim projects folder (also confirmed operation of q2) 2026-09-10 15:24:44 +10:00
TroubleElectrical dc32347c9b Updated ALU code with updated 2**width approach and assigned temporary pins to ASU (Q3) 2026-09-09 14:27:11 +10:00
TroubleElectrical 60e5dae43b Added ModelSim folder (and have to add files into it as to allow for different testbench code) 2026-09-08 16:32:01 +10:00
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