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FPGA_Uni
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13f34e62c64bd037d8f8c5e4a0ba8b72288ad8e6
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Include renames
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SHA1
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TroubleElectrical
c27a04ef73
Implemented instruction classifier on board (Q6) and added blank submission files (for now)
2026-09-15 20:00:35 +10:00
TroubleElectrical
9583abd307
Updated shifter (Q5) to use proper 2**width approach and corrected the logic such that C is width bits wide, and b is 2**width (as defined in Q5 B)
2026-09-15 19:43:28 +10:00