TroubleElectrical/FPGA_Uni
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Added ModelSim folder (and have to add files into it as to allow for different testbench code)

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TroubleElectrical committed 2026-09-08 16:32:01 +10:00
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commit 60e5dae43b
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Quartus/A1_Q2/output_files/lu.map.summary
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Analysis & Synthesis Status : Successful - Tue Sep 8 15:25:28 2026
Analysis & Synthesis Status : Successful - Tue Sep 8 15:41:25 2026
Quartus Prime Version : 25.1std.0 Build 1129 10/21/2025 SC Lite Edition
Revision Name : lu
Top-level Entity Name : lu