TroubleElectrical/FPGA_Uni
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Added ModelSim folder (and have to add files into it as to allow for different testbench code)

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TroubleElectrical committed 2026-09-08 16:32:01 +10:00
1 parent 2208eb4f16
commit 60e5dae43b
72 files changed
+1049 -320
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Quartus/A1_Q2/output_files/lu.eda.rpt
+4 -4
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@@ -1,5 +1,5 @@
EDA Netlist Writer report for lu
Tue Sep 8 15:26:13 2026
Tue Sep 8 15:42:11 2026
Quartus Prime Version 25.1std.0 Build 1129 10/21/2025 SC Lite Edition
@@ -37,7 +37,7 @@ on the Quartus Prime software download page.
+-------------------------------------------------------------------+
; EDA Netlist Writer Summary ;
+---------------------------+---------------------------------------+
; EDA Netlist Writer Status ; Successful - Tue Sep 8 15:26:13 2026 ;
; EDA Netlist Writer Status ; Successful - Tue Sep 8 15:42:11 2026 ;
; Revision Name ; lu ;
; Top-level Entity Name ; lu ;
; Family ; Cyclone V ;
@@ -81,13 +81,13 @@ on the Quartus Prime software download page.
Info: *******************************************************************
Info: Running Quartus Prime EDA Netlist Writer
Info: Version 25.1std.0 Build 1129 10/21/2025 SC Lite Edition
Info: Processing started: Tue Sep 8 15:26:12 2026
Info: Processing started: Tue Sep 8 15:42:10 2026
Info: Command: quartus_eda --read_settings_files=off --write_settings_files=off A1_Q2 -c lu
Warning (18236): Number of processors has not been specified which may cause overloading on shared machines. Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance.
Info (204019): Generated file lu.svo in folder "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/Quartus/A1_Q2/simulation/questa/" for EDA simulation tool
Info: Quartus Prime EDA Netlist Writer was successful. 0 errors, 1 warning
Info: Peak virtual memory: 658 megabytes
Info: Processing ended: Tue Sep 8 15:26:13 2026
Info: Processing ended: Tue Sep 8 15:42:11 2026
Info: Elapsed time: 00:00:01
Info: Total CPU time (on all processors): 00:00:01