Added all Testbenches to Modelsim and confirmed working operation

ModelSim/asu_tb.sv

@@ -1,6 +1,6 @@
 `include "asu.sv"
 
-module asu_tb #(width=4)();
+module asu_tb #(width=8)();
     logic [0:0] op;
     logic [width-1:0] A;
     logic [width-1:0] B;