712 lines
22 KiB
Plaintext
712 lines
22 KiB
Plaintext
// Copyright (C) 2025 Altera Corporation. All rights reserved.
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// Your use of Altera Corporation's design tools, logic functions
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// and other software and tools, and any partner logic
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// functions, and any output files from any of the foregoing
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// (including device programming or simulation files), and any
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// associated documentation or information are expressly subject
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// to the terms and conditions of the Altera Program License
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// Subscription Agreement, the Altera Quartus Prime License Agreement,
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// the Altera IP License Agreement, or other applicable license
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// agreement, including, without limitation, that your use is for
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// the sole purpose of programming logic devices manufactured by
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// Altera and sold by Altera or its authorized distributors. Please
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// refer to the Altera Software License Subscription Agreements
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// on the Quartus Prime software download page.
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// VENDOR "Altera"
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// PROGRAM "Quartus Prime"
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// VERSION "Version 25.1std.0 Build 1129 10/21/2025 SC Lite Edition"
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// DATE "09/15/2026 10:04:15"
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//
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// Device: Altera 5CGXFC5C6F27C7 Package FBGA672
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//
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//
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// This Verilog file should be used for Questa Altera FPGA (SystemVerilog) only
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//
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`timescale 1 ps/ 1 ps
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module alu (
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op,
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A,
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B,
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OUT_1,
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flags);
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input logic [3:0] op ;
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input logic [3:0] A ;
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input logic [3:0] B ;
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output logic [3:0] OUT_1 ;
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output logic [1:0] flags ;
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// Design Ports Information
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// OUT_1[0] => Location: PIN_AA6, I/O Standard: 2.5 V, Current Strength: Default
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// OUT_1[1] => Location: PIN_Y9, I/O Standard: 2.5 V, Current Strength: Default
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// OUT_1[2] => Location: PIN_T9, I/O Standard: 2.5 V, Current Strength: Default
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// OUT_1[3] => Location: PIN_W8, I/O Standard: 2.5 V, Current Strength: Default
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// flags[0] => Location: PIN_AB10, I/O Standard: 2.5 V, Current Strength: Default
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// flags[1] => Location: PIN_AA7, I/O Standard: 2.5 V, Current Strength: Default
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// op[2] => Location: PIN_AD7, I/O Standard: 2.5 V, Current Strength: Default
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// op[3] => Location: PIN_U9, I/O Standard: 2.5 V, Current Strength: Default
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// B[0] => Location: PIN_W11, I/O Standard: 2.5 V, Current Strength: Default
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// A[0] => Location: PIN_P8, I/O Standard: 2.5 V, Current Strength: Default
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// op[0] => Location: PIN_AD6, I/O Standard: 2.5 V, Current Strength: Default
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// op[1] => Location: PIN_U7, I/O Standard: 2.5 V, Current Strength: Default
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// B[3] => Location: PIN_R10, I/O Standard: 2.5 V, Current Strength: Default
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// A[3] => Location: PIN_Y8, I/O Standard: 2.5 V, Current Strength: Default
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// B[1] => Location: PIN_AB6, I/O Standard: 2.5 V, Current Strength: Default
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// A[1] => Location: PIN_Y11, I/O Standard: 2.5 V, Current Strength: Default
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// B[2] => Location: PIN_R8, I/O Standard: 2.5 V, Current Strength: Default
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// A[2] => Location: PIN_R9, I/O Standard: 2.5 V, Current Strength: Default
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wire gnd;
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wire vcc;
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wire unknown;
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assign gnd = 1'b0;
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assign vcc = 1'b1;
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assign unknown = 1'bx;
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tri1 devclrn;
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tri1 devpor;
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tri1 devoe;
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wire \~QUARTUS_CREATED_GND~I_combout ;
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wire \op[0]~input_o ;
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wire \B[3]~input_o ;
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wire \A[3]~input_o ;
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wire \op[2]~input_o ;
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wire \op[1]~input_o ;
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wire \op[3]~input_o ;
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wire \Mux3~3_combout ;
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wire \A[0]~input_o ;
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wire \B[0]~input_o ;
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wire \Mux3~0_combout ;
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wire \B[2]~input_o ;
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wire \A[2]~input_o ;
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wire \A[1]~input_o ;
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wire \B[1]~input_o ;
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wire \adder_unit|_~1 ;
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wire \adder_unit|_~2 ;
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wire \adder_unit|_~7 ;
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wire \adder_unit|_~8 ;
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wire \adder_unit|_~10 ;
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wire \adder_unit|_~11 ;
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wire \adder_unit|_~13 ;
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wire \adder_unit|_~14 ;
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wire \Mux3~2_combout ;
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wire \Mux3~1_combout ;
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wire \Mux3~4_combout ;
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wire \Mux2~0_combout ;
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wire \Mux1~0_combout ;
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wire \Mux0~0_combout ;
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wire [0:0] \adder_unit|OUT_CIN ;
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wire [3:0] \adder_unit|OUT_1 ;
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wire [0:0] \adder_unit|COUT ;
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// Location: IOOBUF_X4_Y0_N36
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cyclonev_io_obuf \OUT_1[0]~output (
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.i(\Mux3~4_combout ),
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.oe(vcc),
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.dynamicterminationcontrol(gnd),
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.seriesterminationcontrol(16'b0000000000000000),
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.parallelterminationcontrol(16'b0000000000000000),
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.devoe(devoe),
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.o(OUT_1[0]),
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.obar());
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// synopsys translate_off
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defparam \OUT_1[0]~output .bus_hold = "false";
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defparam \OUT_1[0]~output .open_drain_output = "false";
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defparam \OUT_1[0]~output .shift_series_termination_control = "false";
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// synopsys translate_on
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// Location: IOOBUF_X4_Y0_N2
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cyclonev_io_obuf \OUT_1[1]~output (
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.i(\Mux2~0_combout ),
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.oe(vcc),
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.dynamicterminationcontrol(gnd),
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.seriesterminationcontrol(16'b0000000000000000),
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.parallelterminationcontrol(16'b0000000000000000),
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.devoe(devoe),
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.o(OUT_1[1]),
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.obar());
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// synopsys translate_off
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defparam \OUT_1[1]~output .bus_hold = "false";
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defparam \OUT_1[1]~output .open_drain_output = "false";
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defparam \OUT_1[1]~output .shift_series_termination_control = "false";
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// synopsys translate_on
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// Location: IOOBUF_X10_Y0_N76
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cyclonev_io_obuf \OUT_1[2]~output (
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.i(\Mux1~0_combout ),
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.oe(vcc),
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.dynamicterminationcontrol(gnd),
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.seriesterminationcontrol(16'b0000000000000000),
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.parallelterminationcontrol(16'b0000000000000000),
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.devoe(devoe),
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.o(OUT_1[2]),
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.obar());
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// synopsys translate_off
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defparam \OUT_1[2]~output .bus_hold = "false";
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defparam \OUT_1[2]~output .open_drain_output = "false";
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defparam \OUT_1[2]~output .shift_series_termination_control = "false";
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// synopsys translate_on
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// Location: IOOBUF_X4_Y0_N19
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cyclonev_io_obuf \OUT_1[3]~output (
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.i(\Mux0~0_combout ),
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.oe(vcc),
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.dynamicterminationcontrol(gnd),
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.seriesterminationcontrol(16'b0000000000000000),
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.parallelterminationcontrol(16'b0000000000000000),
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.devoe(devoe),
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.o(OUT_1[3]),
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.obar());
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// synopsys translate_off
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defparam \OUT_1[3]~output .bus_hold = "false";
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defparam \OUT_1[3]~output .open_drain_output = "false";
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defparam \OUT_1[3]~output .shift_series_termination_control = "false";
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// synopsys translate_on
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// Location: IOOBUF_X12_Y0_N36
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cyclonev_io_obuf \flags[0]~output (
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.i(\adder_unit|COUT [0]),
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.oe(vcc),
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.dynamicterminationcontrol(gnd),
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.seriesterminationcontrol(16'b0000000000000000),
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.parallelterminationcontrol(16'b0000000000000000),
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.devoe(devoe),
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.o(flags[0]),
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.obar());
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// synopsys translate_off
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defparam \flags[0]~output .bus_hold = "false";
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defparam \flags[0]~output .open_drain_output = "false";
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defparam \flags[0]~output .shift_series_termination_control = "false";
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// synopsys translate_on
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// Location: IOOBUF_X6_Y0_N53
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cyclonev_io_obuf \flags[1]~output (
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.i(\adder_unit|OUT_CIN [0]),
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.oe(vcc),
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.dynamicterminationcontrol(gnd),
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.seriesterminationcontrol(16'b0000000000000000),
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.parallelterminationcontrol(16'b0000000000000000),
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.devoe(devoe),
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.o(flags[1]),
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.obar());
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// synopsys translate_off
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defparam \flags[1]~output .bus_hold = "false";
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defparam \flags[1]~output .open_drain_output = "false";
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defparam \flags[1]~output .shift_series_termination_control = "false";
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// synopsys translate_on
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// Location: IOIBUF_X7_Y0_N52
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cyclonev_io_ibuf \op[0]~input (
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.i(op[0]),
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.ibar(gnd),
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.dynamicterminationcontrol(gnd),
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.o(\op[0]~input_o ));
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// synopsys translate_off
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defparam \op[0]~input .bus_hold = "false";
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defparam \op[0]~input .simulate_z_as = "z";
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// synopsys translate_on
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// Location: IOIBUF_X6_Y0_N18
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cyclonev_io_ibuf \B[3]~input (
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.i(B[3]),
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.ibar(gnd),
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.dynamicterminationcontrol(gnd),
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.o(\B[3]~input_o ));
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// synopsys translate_off
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defparam \B[3]~input .bus_hold = "false";
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defparam \B[3]~input .simulate_z_as = "z";
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// synopsys translate_on
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// Location: IOIBUF_X6_Y0_N35
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cyclonev_io_ibuf \A[3]~input (
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.i(A[3]),
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.ibar(gnd),
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.dynamicterminationcontrol(gnd),
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.o(\A[3]~input_o ));
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// synopsys translate_off
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defparam \A[3]~input .bus_hold = "false";
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defparam \A[3]~input .simulate_z_as = "z";
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// synopsys translate_on
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// Location: IOIBUF_X7_Y0_N35
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cyclonev_io_ibuf \op[2]~input (
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.i(op[2]),
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.ibar(gnd),
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.dynamicterminationcontrol(gnd),
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.o(\op[2]~input_o ));
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// synopsys translate_off
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defparam \op[2]~input .bus_hold = "false";
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defparam \op[2]~input .simulate_z_as = "z";
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// synopsys translate_on
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// Location: IOIBUF_X2_Y0_N92
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cyclonev_io_ibuf \op[1]~input (
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.i(op[1]),
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.ibar(gnd),
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.dynamicterminationcontrol(gnd),
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.o(\op[1]~input_o ));
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// synopsys translate_off
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defparam \op[1]~input .bus_hold = "false";
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defparam \op[1]~input .simulate_z_as = "z";
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// synopsys translate_on
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// Location: IOIBUF_X10_Y0_N92
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cyclonev_io_ibuf \op[3]~input (
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.i(op[3]),
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.ibar(gnd),
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.dynamicterminationcontrol(gnd),
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.o(\op[3]~input_o ));
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// synopsys translate_off
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defparam \op[3]~input .bus_hold = "false";
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defparam \op[3]~input .simulate_z_as = "z";
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// synopsys translate_on
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// Location: LABCELL_X7_Y1_N18
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cyclonev_lcell_comb \Mux3~3 (
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// Equation(s):
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// \Mux3~3_combout = ( \op[1]~input_o & ( \op[3]~input_o & ( (!\op[0]~input_o & (!\op[2]~input_o & (!\B[3]~input_o $ (!\A[3]~input_o )))) ) ) )
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.dataa(!\op[0]~input_o ),
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.datab(!\B[3]~input_o ),
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.datac(!\A[3]~input_o ),
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.datad(!\op[2]~input_o ),
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.datae(!\op[1]~input_o ),
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.dataf(!\op[3]~input_o ),
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.datag(gnd),
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.cin(gnd),
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.sharein(gnd),
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.combout(\Mux3~3_combout ),
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.sumout(),
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.cout(),
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.shareout());
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// synopsys translate_off
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defparam \Mux3~3 .extended_lut = "off";
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defparam \Mux3~3 .lut_mask = 64'h0000000000002800;
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defparam \Mux3~3 .shared_arith = "off";
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// synopsys translate_on
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// Location: IOIBUF_X7_Y0_N1
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cyclonev_io_ibuf \A[0]~input (
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.i(A[0]),
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.ibar(gnd),
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.dynamicterminationcontrol(gnd),
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.o(\A[0]~input_o ));
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// synopsys translate_off
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defparam \A[0]~input .bus_hold = "false";
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defparam \A[0]~input .simulate_z_as = "z";
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// synopsys translate_on
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// Location: IOIBUF_X10_Y0_N41
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cyclonev_io_ibuf \B[0]~input (
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.i(B[0]),
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.ibar(gnd),
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.dynamicterminationcontrol(gnd),
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.o(\B[0]~input_o ));
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// synopsys translate_off
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defparam \B[0]~input .bus_hold = "false";
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defparam \B[0]~input .simulate_z_as = "z";
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// synopsys translate_on
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// Location: LABCELL_X7_Y1_N30
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cyclonev_lcell_comb \adder_unit|OUT_1[0] (
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// Equation(s):
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// \adder_unit|OUT_1 [0] = SUM(( !\A[0]~input_o $ (!\B[0]~input_o ) ) + ( !VCC ) + ( !VCC ))
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// \adder_unit|_~1 = CARRY(( !\A[0]~input_o $ (!\B[0]~input_o ) ) + ( !VCC ) + ( !VCC ))
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// \adder_unit|_~2 = SHARE((\A[0]~input_o & \B[0]~input_o ))
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.dataa(gnd),
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.datab(!\A[0]~input_o ),
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.datac(!\B[0]~input_o ),
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.datad(gnd),
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.datae(gnd),
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.dataf(gnd),
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.datag(gnd),
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.cin(gnd),
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.sharein(gnd),
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.combout(),
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.sumout(\adder_unit|OUT_1 [0]),
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.cout(\adder_unit|_~1 ),
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.shareout(\adder_unit|_~2 ));
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// synopsys translate_off
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defparam \adder_unit|OUT_1[0] .extended_lut = "off";
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defparam \adder_unit|OUT_1[0] .lut_mask = 64'h0000030300003C3C;
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defparam \adder_unit|OUT_1[0] .shared_arith = "on";
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// synopsys translate_on
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// Location: LABCELL_X7_Y1_N51
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cyclonev_lcell_comb \Mux3~0 (
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// Equation(s):
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// \Mux3~0_combout = (!\op[3]~input_o & !\op[2]~input_o )
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.dataa(!\op[3]~input_o ),
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.datab(!\op[2]~input_o ),
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.datac(gnd),
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.datad(gnd),
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.datae(gnd),
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.dataf(gnd),
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.datag(gnd),
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.cin(gnd),
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.sharein(gnd),
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.combout(\Mux3~0_combout ),
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.sumout(),
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.cout(),
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.shareout());
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// synopsys translate_off
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defparam \Mux3~0 .extended_lut = "off";
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defparam \Mux3~0 .lut_mask = 64'h8888888888888888;
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defparam \Mux3~0 .shared_arith = "off";
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// synopsys translate_on
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// Location: IOIBUF_X7_Y0_N18
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cyclonev_io_ibuf \B[2]~input (
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.i(B[2]),
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.ibar(gnd),
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.dynamicterminationcontrol(gnd),
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.o(\B[2]~input_o ));
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// synopsys translate_off
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defparam \B[2]~input .bus_hold = "false";
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defparam \B[2]~input .simulate_z_as = "z";
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// synopsys translate_on
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// Location: IOIBUF_X6_Y0_N1
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cyclonev_io_ibuf \A[2]~input (
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.i(A[2]),
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.ibar(gnd),
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.dynamicterminationcontrol(gnd),
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.o(\A[2]~input_o ));
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// synopsys translate_off
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defparam \A[2]~input .bus_hold = "false";
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defparam \A[2]~input .simulate_z_as = "z";
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// synopsys translate_on
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// Location: IOIBUF_X10_Y0_N58
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cyclonev_io_ibuf \A[1]~input (
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.i(A[1]),
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.ibar(gnd),
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.dynamicterminationcontrol(gnd),
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.o(\A[1]~input_o ));
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// synopsys translate_off
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defparam \A[1]~input .bus_hold = "false";
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defparam \A[1]~input .simulate_z_as = "z";
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// synopsys translate_on
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// Location: IOIBUF_X4_Y0_N52
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cyclonev_io_ibuf \B[1]~input (
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.i(B[1]),
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.ibar(gnd),
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.dynamicterminationcontrol(gnd),
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.o(\B[1]~input_o ));
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// synopsys translate_off
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defparam \B[1]~input .bus_hold = "false";
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defparam \B[1]~input .simulate_z_as = "z";
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// synopsys translate_on
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// Location: LABCELL_X7_Y1_N33
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cyclonev_lcell_comb \adder_unit|OUT_1[1] (
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// Equation(s):
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// \adder_unit|OUT_1 [1] = SUM(( !\A[1]~input_o $ (!\B[1]~input_o ) ) + ( \adder_unit|_~2 ) + ( \adder_unit|_~1 ))
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// \adder_unit|_~7 = CARRY(( !\A[1]~input_o $ (!\B[1]~input_o ) ) + ( \adder_unit|_~2 ) + ( \adder_unit|_~1 ))
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// \adder_unit|_~8 = SHARE((\A[1]~input_o & \B[1]~input_o ))
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.dataa(!\A[1]~input_o ),
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.datab(gnd),
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.datac(!\B[1]~input_o ),
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.datad(gnd),
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.datae(gnd),
|
|
.dataf(gnd),
|
|
.datag(gnd),
|
|
.cin(\adder_unit|_~1 ),
|
|
.sharein(\adder_unit|_~2 ),
|
|
.combout(),
|
|
.sumout(\adder_unit|OUT_1 [1]),
|
|
.cout(\adder_unit|_~7 ),
|
|
.shareout(\adder_unit|_~8 ));
|
|
// synopsys translate_off
|
|
defparam \adder_unit|OUT_1[1] .extended_lut = "off";
|
|
defparam \adder_unit|OUT_1[1] .lut_mask = 64'h0000050500005A5A;
|
|
defparam \adder_unit|OUT_1[1] .shared_arith = "on";
|
|
// synopsys translate_on
|
|
|
|
// Location: LABCELL_X7_Y1_N36
|
|
cyclonev_lcell_comb \adder_unit|OUT_1[2] (
|
|
// Equation(s):
|
|
// \adder_unit|OUT_1 [2] = SUM(( !\B[2]~input_o $ (!\A[2]~input_o ) ) + ( \adder_unit|_~8 ) + ( \adder_unit|_~7 ))
|
|
// \adder_unit|_~10 = CARRY(( !\B[2]~input_o $ (!\A[2]~input_o ) ) + ( \adder_unit|_~8 ) + ( \adder_unit|_~7 ))
|
|
// \adder_unit|_~11 = SHARE((\B[2]~input_o & \A[2]~input_o ))
|
|
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(!\B[2]~input_o ),
|
|
.datad(!\A[2]~input_o ),
|
|
.datae(gnd),
|
|
.dataf(gnd),
|
|
.datag(gnd),
|
|
.cin(\adder_unit|_~7 ),
|
|
.sharein(\adder_unit|_~8 ),
|
|
.combout(),
|
|
.sumout(\adder_unit|OUT_1 [2]),
|
|
.cout(\adder_unit|_~10 ),
|
|
.shareout(\adder_unit|_~11 ));
|
|
// synopsys translate_off
|
|
defparam \adder_unit|OUT_1[2] .extended_lut = "off";
|
|
defparam \adder_unit|OUT_1[2] .lut_mask = 64'h0000000F00000FF0;
|
|
defparam \adder_unit|OUT_1[2] .shared_arith = "on";
|
|
// synopsys translate_on
|
|
|
|
// Location: LABCELL_X7_Y1_N39
|
|
cyclonev_lcell_comb \adder_unit|OUT_1[3] (
|
|
// Equation(s):
|
|
// \adder_unit|OUT_1 [3] = SUM(( !\A[3]~input_o $ (!\B[3]~input_o ) ) + ( \adder_unit|_~11 ) + ( \adder_unit|_~10 ))
|
|
// \adder_unit|_~13 = CARRY(( !\A[3]~input_o $ (!\B[3]~input_o ) ) + ( \adder_unit|_~11 ) + ( \adder_unit|_~10 ))
|
|
// \adder_unit|_~14 = SHARE((\A[3]~input_o & \B[3]~input_o ))
|
|
|
|
.dataa(!\A[3]~input_o ),
|
|
.datab(gnd),
|
|
.datac(!\B[3]~input_o ),
|
|
.datad(gnd),
|
|
.datae(gnd),
|
|
.dataf(gnd),
|
|
.datag(gnd),
|
|
.cin(\adder_unit|_~10 ),
|
|
.sharein(\adder_unit|_~11 ),
|
|
.combout(),
|
|
.sumout(\adder_unit|OUT_1 [3]),
|
|
.cout(\adder_unit|_~13 ),
|
|
.shareout(\adder_unit|_~14 ));
|
|
// synopsys translate_off
|
|
defparam \adder_unit|OUT_1[3] .extended_lut = "off";
|
|
defparam \adder_unit|OUT_1[3] .lut_mask = 64'h0000050500005A5A;
|
|
defparam \adder_unit|OUT_1[3] .shared_arith = "on";
|
|
// synopsys translate_on
|
|
|
|
// Location: LABCELL_X7_Y1_N42
|
|
cyclonev_lcell_comb \adder_unit|COUT[0] (
|
|
// Equation(s):
|
|
// \adder_unit|COUT [0] = SUM(( GND ) + ( \adder_unit|_~14 ) + ( \adder_unit|_~13 ))
|
|
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(gnd),
|
|
.datae(gnd),
|
|
.dataf(gnd),
|
|
.datag(gnd),
|
|
.cin(\adder_unit|_~13 ),
|
|
.sharein(\adder_unit|_~14 ),
|
|
.combout(),
|
|
.sumout(\adder_unit|COUT [0]),
|
|
.cout(),
|
|
.shareout());
|
|
// synopsys translate_off
|
|
defparam \adder_unit|COUT[0] .extended_lut = "off";
|
|
defparam \adder_unit|COUT[0] .lut_mask = 64'h0000000000000000;
|
|
defparam \adder_unit|COUT[0] .shared_arith = "on";
|
|
// synopsys translate_on
|
|
|
|
// Location: LABCELL_X7_Y1_N48
|
|
cyclonev_lcell_comb \Mux3~2 (
|
|
// Equation(s):
|
|
// \Mux3~2_combout = (\op[3]~input_o & (!\op[2]~input_o & (\op[0]~input_o & \op[1]~input_o )))
|
|
|
|
.dataa(!\op[3]~input_o ),
|
|
.datab(!\op[2]~input_o ),
|
|
.datac(!\op[0]~input_o ),
|
|
.datad(!\op[1]~input_o ),
|
|
.datae(gnd),
|
|
.dataf(gnd),
|
|
.datag(gnd),
|
|
.cin(gnd),
|
|
.sharein(gnd),
|
|
.combout(\Mux3~2_combout ),
|
|
.sumout(),
|
|
.cout(),
|
|
.shareout());
|
|
// synopsys translate_off
|
|
defparam \Mux3~2 .extended_lut = "off";
|
|
defparam \Mux3~2 .lut_mask = 64'h0004000400040004;
|
|
defparam \Mux3~2 .shared_arith = "off";
|
|
// synopsys translate_on
|
|
|
|
// Location: LABCELL_X7_Y1_N24
|
|
cyclonev_lcell_comb \Mux3~1 (
|
|
// Equation(s):
|
|
// \Mux3~1_combout = ( \op[2]~input_o & ( !\op[3]~input_o & ( (!\B[0]~input_o & ((!\op[1]~input_o & (\op[0]~input_o & \A[0]~input_o )) # (\op[1]~input_o & (!\op[0]~input_o $ (!\A[0]~input_o ))))) # (\B[0]~input_o & (!\op[1]~input_o $
|
|
// (((!\op[0]~input_o & !\A[0]~input_o ))))) ) ) )
|
|
|
|
.dataa(!\B[0]~input_o ),
|
|
.datab(!\op[1]~input_o ),
|
|
.datac(!\op[0]~input_o ),
|
|
.datad(!\A[0]~input_o ),
|
|
.datae(!\op[2]~input_o ),
|
|
.dataf(!\op[3]~input_o ),
|
|
.datag(gnd),
|
|
.cin(gnd),
|
|
.sharein(gnd),
|
|
.combout(\Mux3~1_combout ),
|
|
.sumout(),
|
|
.cout(),
|
|
.shareout());
|
|
// synopsys translate_off
|
|
defparam \Mux3~1 .extended_lut = "off";
|
|
defparam \Mux3~1 .lut_mask = 64'h0000166C00000000;
|
|
defparam \Mux3~1 .shared_arith = "off";
|
|
// synopsys translate_on
|
|
|
|
// Location: LABCELL_X7_Y1_N54
|
|
cyclonev_lcell_comb \Mux3~4 (
|
|
// Equation(s):
|
|
// \Mux3~4_combout = ( \Mux3~2_combout & ( \Mux3~1_combout ) ) # ( !\Mux3~2_combout & ( \Mux3~1_combout ) ) # ( \Mux3~2_combout & ( !\Mux3~1_combout & ( ((!\adder_unit|COUT [0]) # ((\adder_unit|OUT_1 [0] & \Mux3~0_combout ))) # (\Mux3~3_combout ) ) )
|
|
// ) # ( !\Mux3~2_combout & ( !\Mux3~1_combout & ( ((\adder_unit|OUT_1 [0] & \Mux3~0_combout )) # (\Mux3~3_combout ) ) ) )
|
|
|
|
.dataa(!\Mux3~3_combout ),
|
|
.datab(!\adder_unit|OUT_1 [0]),
|
|
.datac(!\Mux3~0_combout ),
|
|
.datad(!\adder_unit|COUT [0]),
|
|
.datae(!\Mux3~2_combout ),
|
|
.dataf(!\Mux3~1_combout ),
|
|
.datag(gnd),
|
|
.cin(gnd),
|
|
.sharein(gnd),
|
|
.combout(\Mux3~4_combout ),
|
|
.sumout(),
|
|
.cout(),
|
|
.shareout());
|
|
// synopsys translate_off
|
|
defparam \Mux3~4 .extended_lut = "off";
|
|
defparam \Mux3~4 .lut_mask = 64'h5757FF57FFFFFFFF;
|
|
defparam \Mux3~4 .shared_arith = "off";
|
|
// synopsys translate_on
|
|
|
|
// Location: LABCELL_X7_Y1_N12
|
|
cyclonev_lcell_comb \Mux2~0 (
|
|
// Equation(s):
|
|
// \Mux2~0_combout = ( !\op[2]~input_o & ( (((\adder_unit|OUT_1 [1] & ((!\op[3]~input_o ))))) ) ) # ( \op[2]~input_o & ( (!\op[3]~input_o & ((!\op[0]~input_o & ((!\op[1]~input_o & (\A[1]~input_o & \B[1]~input_o )) # (\op[1]~input_o & (!\A[1]~input_o
|
|
// $ (!\B[1]~input_o ))))) # (\op[0]~input_o & (!\op[1]~input_o $ (((!\A[1]~input_o & !\B[1]~input_o ))))))) ) )
|
|
|
|
.dataa(!\op[0]~input_o ),
|
|
.datab(!\op[1]~input_o ),
|
|
.datac(!\A[1]~input_o ),
|
|
.datad(!\B[1]~input_o ),
|
|
.datae(!\op[2]~input_o ),
|
|
.dataf(!\op[3]~input_o ),
|
|
.datag(!\adder_unit|OUT_1 [1]),
|
|
.cin(gnd),
|
|
.sharein(gnd),
|
|
.combout(\Mux2~0_combout ),
|
|
.sumout(),
|
|
.cout(),
|
|
.shareout());
|
|
// synopsys translate_off
|
|
defparam \Mux2~0 .extended_lut = "on";
|
|
defparam \Mux2~0 .lut_mask = 64'h0F0F166C00000000;
|
|
defparam \Mux2~0 .shared_arith = "off";
|
|
// synopsys translate_on
|
|
|
|
// Location: LABCELL_X7_Y1_N6
|
|
cyclonev_lcell_comb \Mux1~0 (
|
|
// Equation(s):
|
|
// \Mux1~0_combout = ( !\op[2]~input_o & ( (((\adder_unit|OUT_1 [2] & ((!\op[3]~input_o ))))) ) ) # ( \op[2]~input_o & ( (!\op[3]~input_o & ((!\op[0]~input_o & ((!\op[1]~input_o & (\A[2]~input_o & \B[2]~input_o )) # (\op[1]~input_o & (!\A[2]~input_o
|
|
// $ (!\B[2]~input_o ))))) # (\op[0]~input_o & (!\op[1]~input_o $ (((!\A[2]~input_o & !\B[2]~input_o ))))))) ) )
|
|
|
|
.dataa(!\op[0]~input_o ),
|
|
.datab(!\op[1]~input_o ),
|
|
.datac(!\A[2]~input_o ),
|
|
.datad(!\B[2]~input_o ),
|
|
.datae(!\op[2]~input_o ),
|
|
.dataf(!\op[3]~input_o ),
|
|
.datag(!\adder_unit|OUT_1 [2]),
|
|
.cin(gnd),
|
|
.sharein(gnd),
|
|
.combout(\Mux1~0_combout ),
|
|
.sumout(),
|
|
.cout(),
|
|
.shareout());
|
|
// synopsys translate_off
|
|
defparam \Mux1~0 .extended_lut = "on";
|
|
defparam \Mux1~0 .lut_mask = 64'h0F0F166C00000000;
|
|
defparam \Mux1~0 .shared_arith = "off";
|
|
// synopsys translate_on
|
|
|
|
// Location: LABCELL_X7_Y1_N0
|
|
cyclonev_lcell_comb \Mux0~0 (
|
|
// Equation(s):
|
|
// \Mux0~0_combout = ( !\op[2]~input_o & ( (((\adder_unit|OUT_1 [3] & ((!\op[3]~input_o ))))) ) ) # ( \op[2]~input_o & ( (!\op[3]~input_o & ((!\op[0]~input_o & ((!\op[1]~input_o & (\A[3]~input_o & \B[3]~input_o )) # (\op[1]~input_o & (!\A[3]~input_o
|
|
// $ (!\B[3]~input_o ))))) # (\op[0]~input_o & (!\op[1]~input_o $ (((!\A[3]~input_o & !\B[3]~input_o ))))))) ) )
|
|
|
|
.dataa(!\op[0]~input_o ),
|
|
.datab(!\op[1]~input_o ),
|
|
.datac(!\A[3]~input_o ),
|
|
.datad(!\B[3]~input_o ),
|
|
.datae(!\op[2]~input_o ),
|
|
.dataf(!\op[3]~input_o ),
|
|
.datag(!\adder_unit|OUT_1 [3]),
|
|
.cin(gnd),
|
|
.sharein(gnd),
|
|
.combout(\Mux0~0_combout ),
|
|
.sumout(),
|
|
.cout(),
|
|
.shareout());
|
|
// synopsys translate_off
|
|
defparam \Mux0~0 .extended_lut = "on";
|
|
defparam \Mux0~0 .lut_mask = 64'h0F0F166C00000000;
|
|
defparam \Mux0~0 .shared_arith = "off";
|
|
// synopsys translate_on
|
|
|
|
// Location: MLABCELL_X6_Y1_N0
|
|
cyclonev_lcell_comb \adder_unit|OUT_CIN[0] (
|
|
// Equation(s):
|
|
// \adder_unit|OUT_CIN [0] = ( \A[3]~input_o & ( \adder_unit|OUT_1 [3] & ( \B[3]~input_o ) ) ) # ( !\A[3]~input_o & ( \adder_unit|OUT_1 [3] & ( !\B[3]~input_o ) ) ) # ( \A[3]~input_o & ( !\adder_unit|OUT_1 [3] & ( !\B[3]~input_o ) ) ) # (
|
|
// !\A[3]~input_o & ( !\adder_unit|OUT_1 [3] & ( \B[3]~input_o ) ) )
|
|
|
|
.dataa(gnd),
|
|
.datab(!\B[3]~input_o ),
|
|
.datac(gnd),
|
|
.datad(gnd),
|
|
.datae(!\A[3]~input_o ),
|
|
.dataf(!\adder_unit|OUT_1 [3]),
|
|
.datag(gnd),
|
|
.cin(gnd),
|
|
.sharein(gnd),
|
|
.combout(\adder_unit|OUT_CIN [0]),
|
|
.sumout(),
|
|
.cout(),
|
|
.shareout());
|
|
// synopsys translate_off
|
|
defparam \adder_unit|OUT_CIN[0] .extended_lut = "off";
|
|
defparam \adder_unit|OUT_CIN[0] .lut_mask = 64'h3333CCCCCCCC3333;
|
|
defparam \adder_unit|OUT_CIN[0] .shared_arith = "off";
|
|
// synopsys translate_on
|
|
|
|
// Location: MLABCELL_X8_Y13_N0
|
|
cyclonev_lcell_comb \~QUARTUS_CREATED_GND~I (
|
|
// Equation(s):
|
|
|
|
.dataa(gnd),
|
|
.datab(gnd),
|
|
.datac(gnd),
|
|
.datad(gnd),
|
|
.datae(gnd),
|
|
.dataf(gnd),
|
|
.datag(gnd),
|
|
.cin(gnd),
|
|
.sharein(gnd),
|
|
.combout(\~QUARTUS_CREATED_GND~I_combout ),
|
|
.sumout(),
|
|
.cout(),
|
|
.shareout());
|
|
// synopsys translate_off
|
|
defparam \~QUARTUS_CREATED_GND~I .extended_lut = "off";
|
|
defparam \~QUARTUS_CREATED_GND~I .lut_mask = 64'h0000000000000000;
|
|
defparam \~QUARTUS_CREATED_GND~I .shared_arith = "off";
|
|
// synopsys translate_on
|
|
|
|
endmodule
|