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FPGA_Uni
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900b544bc69664991a9cc19a9d4eb92a20f0c2e9
FPGA_Uni
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Quartus
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A1_Q3
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db
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asu.map.rdb
T
TroubleElectrical
9e5fb6f52b
Updated ASU (Q3) to utilise the 7seg for output, confirmed operation of Q1 to Q3 on board
2026-09-15 16:52:48 +10:00
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