FPGA_Uni

.cmp.kpt

Added all Testbenches to Modelsim and confirmed working operation

2026-09-15 15:15:00 +10:00

A1_Q6.map_bb.logdb

Added all Testbenches to Modelsim and confirmed working operation

2026-09-15 15:15:00 +10:00

instruction_classifier_partition_pins.json

Added all Testbenches to Modelsim and confirmed working operation

2026-09-15 15:15:00 +10:00

instruction_classifier.(0).cnf.cdb

Added all Testbenches to Modelsim and confirmed working operation

2026-09-15 15:15:00 +10:00

instruction_classifier.(0).cnf.hdb

Added all Testbenches to Modelsim and confirmed working operation

2026-09-15 15:15:00 +10:00

instruction_classifier.asm.qmsg

Implemented instruction classifier on board (Q6) and added blank submission files (for now)

2026-09-15 20:00:35 +10:00

instruction_classifier.asm.rdb

Implemented instruction classifier on board (Q6) and added blank submission files (for now)

2026-09-15 20:00:35 +10:00

instruction_classifier.cbx.xml

Added all Testbenches to Modelsim and confirmed working operation

2026-09-15 15:15:00 +10:00

instruction_classifier.cmp_merge.kpt

Added all Testbenches to Modelsim and confirmed working operation

2026-09-15 15:15:00 +10:00

instruction_classifier.cmp.bpm

Implemented instruction classifier on board (Q6) and added blank submission files (for now)

2026-09-15 20:00:35 +10:00

instruction_classifier.cmp.cdb

Implemented instruction classifier on board (Q6) and added blank submission files (for now)

2026-09-15 20:00:35 +10:00

instruction_classifier.cmp.hdb

Implemented instruction classifier on board (Q6) and added blank submission files (for now)

2026-09-15 20:00:35 +10:00

instruction_classifier.cmp.idb

Implemented instruction classifier on board (Q6) and added blank submission files (for now)

2026-09-15 20:00:35 +10:00

instruction_classifier.cmp.logdb

Implemented instruction classifier on board (Q6) and added blank submission files (for now)

2026-09-15 20:00:35 +10:00

instruction_classifier.cmp.rdb

Implemented instruction classifier on board (Q6) and added blank submission files (for now)

2026-09-15 20:00:35 +10:00

instruction_classifier.cyclonev_io_sim_cache.ff_0c_fast.hsd

Implemented instruction classifier on board (Q6) and added blank submission files (for now)

2026-09-15 20:00:35 +10:00

instruction_classifier.cyclonev_io_sim_cache.ff_85c_fast.hsd

Added all Testbenches to Modelsim and confirmed working operation

2026-09-15 15:15:00 +10:00

instruction_classifier.cyclonev_io_sim_cache.ii_0c_slow.hsd

Added all Testbenches to Modelsim and confirmed working operation

2026-09-15 15:15:00 +10:00

instruction_classifier.cyclonev_io_sim_cache.ii_85c_slow.hsd

Implemented instruction classifier on board (Q6) and added blank submission files (for now)

2026-09-15 20:00:35 +10:00

instruction_classifier.db_info

Updated register_file.sv with proper naming scheme and 32bit width

2026-10-08 15:10:40 +11:00

instruction_classifier.eda.qmsg

Implemented instruction classifier on board (Q6) and added blank submission files (for now)

2026-09-15 20:00:35 +10:00

instruction_classifier.fit.qmsg

Implemented instruction classifier on board (Q6) and added blank submission files (for now)

2026-09-15 20:00:35 +10:00

instruction_classifier.hier_info

Implemented instruction classifier on board (Q6) and added blank submission files (for now)

2026-09-15 20:00:35 +10:00

instruction_classifier.hif

Added all Testbenches to Modelsim and confirmed working operation

2026-09-15 15:15:00 +10:00

instruction_classifier.lpc.html

Added all Testbenches to Modelsim and confirmed working operation

2026-09-15 15:15:00 +10:00

instruction_classifier.lpc.rdb

Added all Testbenches to Modelsim and confirmed working operation

2026-09-15 15:15:00 +10:00

instruction_classifier.lpc.txt

Added all Testbenches to Modelsim and confirmed working operation

2026-09-15 15:15:00 +10:00

instruction_classifier.map_bb.cdb

Implemented instruction classifier on board (Q6) and added blank submission files (for now)

2026-09-15 20:00:35 +10:00

instruction_classifier.map_bb.hdb

Implemented instruction classifier on board (Q6) and added blank submission files (for now)

2026-09-15 20:00:35 +10:00

instruction_classifier.map.ammdb

Added all Testbenches to Modelsim and confirmed working operation

2026-09-15 15:15:00 +10:00

instruction_classifier.map.bpm

Implemented instruction classifier on board (Q6) and added blank submission files (for now)

2026-09-15 20:00:35 +10:00

instruction_classifier.map.cdb

Implemented instruction classifier on board (Q6) and added blank submission files (for now)

2026-09-15 20:00:35 +10:00

instruction_classifier.map.hdb

Implemented instruction classifier on board (Q6) and added blank submission files (for now)

2026-09-15 20:00:35 +10:00

instruction_classifier.map.kpt

Added all Testbenches to Modelsim and confirmed working operation

2026-09-15 15:15:00 +10:00

instruction_classifier.map.qmsg

Implemented instruction classifier on board (Q6) and added blank submission files (for now)

2026-09-15 20:00:35 +10:00

instruction_classifier.map.rdb

Implemented instruction classifier on board (Q6) and added blank submission files (for now)

2026-09-15 20:00:35 +10:00

instruction_classifier.pplq.rdb

Implemented instruction classifier on board (Q6) and added blank submission files (for now)

2026-09-15 20:00:35 +10:00

instruction_classifier.pre_map.hdb

Implemented instruction classifier on board (Q6) and added blank submission files (for now)

2026-09-15 20:00:35 +10:00

instruction_classifier.root_partition.map.reg_db.cdb

Added all Testbenches to Modelsim and confirmed working operation

2026-09-15 15:15:00 +10:00

instruction_classifier.routing.rdb

Implemented instruction classifier on board (Q6) and added blank submission files (for now)

2026-09-15 20:00:35 +10:00

instruction_classifier.rtlv_sg_swap.cdb

Added all Testbenches to Modelsim and confirmed working operation

2026-09-15 15:15:00 +10:00

instruction_classifier.rtlv_sg.cdb

Implemented instruction classifier on board (Q6) and added blank submission files (for now)

2026-09-15 20:00:35 +10:00

instruction_classifier.rtlv.hdb

Implemented instruction classifier on board (Q6) and added blank submission files (for now)

2026-09-15 20:00:35 +10:00

instruction_classifier.sld_design_entry_dsc.sci

Added all Testbenches to Modelsim and confirmed working operation

2026-09-15 15:15:00 +10:00

instruction_classifier.sld_design_entry.sci

Added projects for A1 q2 to q6

2026-09-04 13:12:33 +10:00

instruction_classifier.smart_action.txt

Added all Testbenches to Modelsim and confirmed working operation

2026-09-15 15:15:00 +10:00

instruction_classifier.sta_cmp.7_H6_slow_1100mv_85c.tdb

Implemented instruction classifier on board (Q6) and added blank submission files (for now)

2026-09-15 20:00:35 +10:00

instruction_classifier.sta.qmsg

Implemented instruction classifier on board (Q6) and added blank submission files (for now)

2026-09-15 20:00:35 +10:00

instruction_classifier.sta.rdb

Implemented instruction classifier on board (Q6) and added blank submission files (for now)

2026-09-15 20:00:35 +10:00

instruction_classifier.tis_db_list.ddb

Added all Testbenches to Modelsim and confirmed working operation

2026-09-15 15:15:00 +10:00

instruction_classifier.tiscmp.fast_1100mv_0c.ddb

Implemented instruction classifier on board (Q6) and added blank submission files (for now)

2026-09-15 20:00:35 +10:00

instruction_classifier.tiscmp.fast_1100mv_85c.ddb

Implemented instruction classifier on board (Q6) and added blank submission files (for now)

2026-09-15 20:00:35 +10:00

instruction_classifier.tiscmp.fastest_slow_1100mv_0c.ddb

Implemented instruction classifier on board (Q6) and added blank submission files (for now)

2026-09-15 20:00:35 +10:00

instruction_classifier.tiscmp.fastest_slow_1100mv_85c.ddb

Implemented instruction classifier on board (Q6) and added blank submission files (for now)

2026-09-15 20:00:35 +10:00

instruction_classifier.tiscmp.slow_1100mv_0c.ddb

Implemented instruction classifier on board (Q6) and added blank submission files (for now)

2026-09-15 20:00:35 +10:00

instruction_classifier.tiscmp.slow_1100mv_85c.ddb

Implemented instruction classifier on board (Q6) and added blank submission files (for now)

2026-09-15 20:00:35 +10:00

instruction_classifier.tmw_info

Updated register_file.sv with proper naming scheme and 32bit width

2026-10-08 15:10:40 +11:00

instruction_classifier.vpr.ammdb

Implemented instruction classifier on board (Q6) and added blank submission files (for now)

2026-09-15 20:00:35 +10:00