This website requires JavaScript.
Explore
Help
Sign In
TroubleElectrical
/
FPGA_Uni
Watch
1
Star
0
Fork
0
Code
Issues
1
Pull Requests
Actions
Packages
Projects
Releases
Wiki
Activity
Files
38fa35fccd9388a20759e3d89333c38d2ba0f8a5
FPGA_Uni
/
Quartus
/
A2
T
History
TroubleElectrical
8b48084fa5
Repaired Sign extender module again to ensure only combinational logic used
...
(There was a compilation error before, also compiled and tested code on board)
2026-10-22 15:53:15 +11:00
..
db
Repaired Sign extender module again to ensure only combinational logic used
2026-10-22 15:53:15 +11:00
incremental_db
Repaired Sign extender module again to ensure only combinational logic used
2026-10-22 15:53:15 +11:00
output_files
Repaired Sign extender module again to ensure only combinational logic used
2026-10-22 15:53:15 +11:00
simulation
/questa
Repaired Sign extender module again to ensure only combinational logic used
2026-10-22 15:53:15 +11:00
assignment2.qpf
Made Assignment 2 Quartus Project
2026-10-13 12:04:49 +11:00
assignment2.qsf
Added code to display current PC,
2026-10-16 14:27:29 +11:00
c5_pin_model_dump.txt
Repaired last few errors in modules and ensured compilation with QUARTUS_BUILD global flag in Quartus build settings and compiled fully (no errors other than pin assignments)
2026-10-13 13:24:44 +11:00