24 lines
627 B
Systemverilog
24 lines
627 B
Systemverilog
`ifndef ROM_H
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`define ROM_H
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module rom #(parameter m=7,p=4) (
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input logic [m-1:0] Ad,
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output logic [p-1:0] Dout
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);
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logic [p-1:0] mem[2**m-1:0];
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assign Dout = mem[Ad];
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//Load the program in memory
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// The machine code stored in text file program.dat written in Hex format
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initial begin
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`ifdef QUARTUS_SYNTH
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$readmemh("../../asm/bin/ELEC4720-2026s2-Ass-02-Demo.txt",mem); //$readmemb for binary
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`else
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$readmemh("./asm/bin/ELEC4720-2026s2-Ass-02-Demo.txt",mem); //$readmemb for binary
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`endif
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end
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endmodule // end rom module
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`endif
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