TroubleElectrical
25a953cdc6
Added Inputs for displaying registers / Program Counter high and low bits, Assigned pins for Display digits, inputs (Labeled HID) and the clk button
92 lines
3.9 KiB
Plaintext
92 lines
3.9 KiB
Plaintext
Assembler report for assignment2
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Tue Oct 13 16:19:01 2026
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Quartus Prime Version 25.1std.0 Build 1129 10/21/2025 SC Lite Edition
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---------------------
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; Table of Contents ;
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---------------------
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1. Legal Notice
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2. Assembler Summary
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3. Assembler Settings
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4. Assembler Generated Files
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5. Assembler Device Options: assignment2.sof
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6. Assembler Messages
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----------------
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; Legal Notice ;
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----------------
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Copyright (C) 2025 Altera Corporation. All rights reserved.
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Your use of Altera Corporation's design tools, logic functions
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and other software and tools, and any partner logic
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functions, and any output files from any of the foregoing
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(including device programming or simulation files), and any
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associated documentation or information are expressly subject
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to the terms and conditions of the Altera Program License
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Subscription Agreement, the Altera Quartus Prime License Agreement,
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the Altera IP License Agreement, or other applicable license
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agreement, including, without limitation, that your use is for
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the sole purpose of programming logic devices manufactured by
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Altera and sold by Altera or its authorized distributors. Please
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refer to the Altera Software License Subscription Agreements
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on the Quartus Prime software download page.
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+---------------------------------------------------------------+
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; Assembler Summary ;
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+-----------------------+---------------------------------------+
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; Assembler Status ; Successful - Tue Oct 13 16:19:01 2026 ;
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; Revision Name ; assignment2 ;
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; Top-level Entity Name ; assignment2 ;
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; Family ; Cyclone V ;
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; Device ; 5CGXFC5C6F27C7 ;
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+-----------------------+---------------------------------------+
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+----------------------------------+
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; Assembler Settings ;
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+--------+---------+---------------+
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; Option ; Setting ; Default Value ;
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+--------+---------+---------------+
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+----------------------------------------------------------------------------------+
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; Assembler Generated Files ;
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+----------------------------------------------------------------------------------+
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; File Name ;
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+----------------------------------------------------------------------------------+
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; /home/oliver/Documents/FPGA_Dev/FPGA_Uni/Quartus/A2/output_files/assignment2.sof ;
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+----------------------------------------------------------------------------------+
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+-------------------------------------------+
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; Assembler Device Options: assignment2.sof ;
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+----------------+--------------------------+
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; Option ; Setting ;
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+----------------+--------------------------+
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; JTAG usercode ; 0x00780D54 ;
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; Checksum ; 0x00780D54 ;
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+----------------+--------------------------+
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+--------------------+
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; Assembler Messages ;
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+--------------------+
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Info: *******************************************************************
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Info: Running Quartus Prime Assembler
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Info: Version 25.1std.0 Build 1129 10/21/2025 SC Lite Edition
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Info: Processing started: Tue Oct 13 16:18:55 2026
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Info: Command: quartus_asm --read_settings_files=off --write_settings_files=off assignment2 -c assignment2
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Warning (18236): Number of processors has not been specified which may cause overloading on shared machines. Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance.
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Info (115030): Assembler is generating device programming files
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Info: Quartus Prime Assembler was successful. 0 errors, 1 warning
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Info: Peak virtual memory: 508 megabytes
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Info: Processing ended: Tue Oct 13 16:19:01 2026
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Info: Elapsed time: 00:00:06
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Info: Total CPU time (on all processors): 00:00:06
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