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FPGA_Uni
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assignment-1-submission
FPGA_Uni
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Quartus
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A1_Q4
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simulation
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questa
T
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History
TroubleElectrical
9d0c7011ce
Updated ALU (Q4) with 7seg and confirmed operation on board
2026-09-15 19:05:04 +10:00
..
alu.sft
Updated ALU code with updated 2**width approach and assigned temporary pins to ASU (Q3)
2026-09-09 14:27:11 +10:00
alu.svo
Updated ALU (Q4) with 7seg and confirmed operation on board
2026-09-15 19:05:04 +10:00