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TroubleElectrical/FPGA_Uni
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Code Issues 1 Pull Requests Actions Packages Projects Releases Wiki Activity
134 Commits 2 Branches 0 Tags
c894488c44025a9105fef5d2d9884713a4b4ed04
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3 Commits
Author SHA1 Message Date
TroubleElectrical 00b2087860 Added project to modelsim 2026-11-05 14:25:34 +11:00
TroubleElectrical 91a5090528 Added Changes to ModelSim from Modules folder (and small fix for ../hexfile path) 2026-10-16 12:59:50 +11:00
TroubleElectrical 5d9e7f541e Updated RAM code to make sure Bus width is 32 bits 2026-10-16 11:32:47 +11:00
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