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TroubleElectrical/FPGA_Uni
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Code Issues 1 Pull Requests Actions Packages Projects Releases Wiki Activity
119 Commits 2 Branches 0 Tags
a647305bd905d776869edef3a7a2f0d4f44ee763
Commit Graph
5 Commits
Author SHA1 Message Date
TroubleElectrical d962a1b557 Added code to display current PC,
Removed Blanking from 7seg 4 digits,
Changed reset to a switch rather than button
Compiled working version for board
2026-10-16 14:27:29 +11:00
TroubleElectrical 5d9e7f541e Updated RAM code to make sure Bus width is 32 bits 2026-10-16 11:32:47 +11:00
TroubleElectrical afb6fefe1b Updated Assignment2 with better register file module insantiation 2026-10-15 15:07:41 +11:00
TroubleElectrical 8c6765eb83 Updated reg file and assignment for compilation 2026-10-15 14:49:32 +11:00
TroubleElectrical 353923eadf Updated Assignment to remove ../../ includes (unnesccesary, also SYNTHESIS macro is not used by quartus, so I manually have QUARTUS_SYNTH for those includes) 2026-10-13 15:12:00 +11:00
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