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TroubleElectrical/FPGA_Uni
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120 Commits 2 Branches 0 Tags
9648db6e77199565e63773f2051767c77631906d
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2 Commits
Author SHA1 Message Date
riley 4c7e2ff085 Fixed instruction width issue in ROM. Stripped all comments to form minimal HEX file to rule out possible parser issues. 2026-10-16 11:29:04 +11:00
riley 76cd7931b6 Realized that, while the assembled is not binary, it is still loadable by verilog. 2026-10-08 14:18:11 +11:00
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