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TroubleElectrical/FPGA_Uni
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Code Issues 1 Pull Requests Actions Packages Projects Releases Wiki Activity
126 Commits 2 Branches 0 Tags
8f9ec010ac1549d194bfaf737c0a33051ce23fe1
Commit Graph
8 Commits
Author SHA1 Message Date
TroubleElectrical 8b48084fa5 Repaired Sign extender module again to ensure only combinational logic used
(There was a compilation error before, also compiled and tested code on board)
2026-10-22 15:53:15 +11:00
TroubleElectrical d962a1b557 Added code to display current PC,
Removed Blanking from 7seg 4 digits,
Changed reset to a switch rather than button
Compiled working version for board
2026-10-16 14:27:29 +11:00
TroubleElectrical 5d9e7f541e Updated RAM code to make sure Bus width is 32 bits 2026-10-16 11:32:47 +11:00
TroubleElectrical 8c6765eb83 Updated reg file and assignment for compilation 2026-10-15 14:49:32 +11:00
TroubleElectrical ac1062fbd5 Added Register Display Code 2026-10-15 14:35:10 +11:00
TroubleElectrical 353923eadf Updated Assignment to remove ../../ includes (unnesccesary, also SYNTHESIS macro is not used by quartus, so I manually have QUARTUS_SYNTH for those includes) 2026-10-13 15:12:00 +11:00
TroubleElectrical 19b07b649d Repaired last few errors in modules and ensured compilation with QUARTUS_BUILD global flag in Quartus build settings and compiled fully (no errors other than pin assignments) 2026-10-13 13:24:44 +11:00
TroubleElectrical 8675f5b8ee Made Assignment 2 Quartus Project 2026-10-13 12:04:49 +11:00
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