6 Commits

Include renames

Author	SHA1	Message	Date
riley	5eb78e92e9	Fixed bugs in sign extender	2026-10-20 16:14:02 +11:00
riley	9648db6e77	Switched to used boolean && rather than bitwise & in sign extender	2026-10-20 16:02:14 +11:00
riley	65be2c2d61	Made sign extension explicit to remove bit indexing (which iverilog doesn't like) and a tad more readable.	2026-10-16 11:35:24 +11:00
TroubleElectrical	cd7fecd1c4	Updated code such that it will compile	2026-10-15 15:32:15 +11:00
riley	25ed477df9	Rewrote ternary operator to be less confusing	2026-10-15 14:04:36 +11:00
riley	ac6c4cc094	Added module for sign extension. Needs test cases	2026-10-13 22:24:43 +11:00