TroubleElectrical/FPGA_Uni
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2 Commits
Author SHA1 Message Date
TroubleElectrical 05361dcf70 Added all Testbenches to Modelsim and confirmed working operation 2026-09-15 15:15:00 +10:00
TroubleElectrical dc32347c9b Updated ALU code with updated 2**width approach and assigned temporary pins to ASU (Q3) 2026-09-09 14:27:11 +10:00