3 Commits

Include renames

Author	SHA1	Message	Date
TroubleElectrical	5d9e7f541e	Updated RAM code to make sure Bus width is 32 bits	2026-10-16 11:32:47 +11:00
TroubleElectrical	ac1062fbd5	Added Register Display Code	2026-10-15 14:35:10 +11:00
TroubleElectrical	19b07b649d	Repaired last few errors in modules and ensured compilation with QUARTUS_BUILD global flag in Quartus build settings and compiled fully (no errors other than pin assignments)	2026-10-13 13:24:44 +11:00