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TroubleElectrical/FPGA_Uni
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Code Issues 1 Pull Requests Actions Packages Projects Releases Wiki Activity
98 Commits 2 Branches 0 Tags
19e5843d55ddd3c58e58d0841fa4b38a33bbc109
Commit Graph
9 Commits
Author SHA1 Message Date
TroubleElectrical 25a953cdc6 Added 4 digit 7seg display module (confirmed working for now),
Added Inputs for displaying registers / Program Counter high and low bits,
Assigned pins for Display digits, inputs (Labeled HID) and the clk button
2026-10-13 16:32:15 +11:00
TroubleElectrical 179eb469c4 Removed seven segment code from alu and asu 2026-09-24 15:37:48 +10:00
TroubleElectrical 0947f26727 Added comments to Q1 code and made submission file 2026-09-16 10:33:08 +10:00
TroubleElectrical 00167dabc8 Updated ModelSim Files 2026-09-16 10:15:08 +10:00
TroubleElectrical afa8d9d4db Enabled 2 segments for seven seg display decoder (Q1), most code just needs comments 2026-09-15 21:08:40 +10:00
TroubleElectrical 9e5fb6f52b Updated ASU (Q3) to utilise the 7seg for output, confirmed operation of Q1 to Q3 on board 2026-09-15 16:52:48 +10:00
TroubleElectrical 32eea036a8 Added projects for A1 q2 to q6 2026-09-04 13:12:33 +10:00
TroubleElectrical 3114cd6b80 Added the updated A1_Q1 Quartus compilation 2026-09-03 19:22:52 +10:00
TroubleElectrical 31a4496904 Including quartus prime lite edition project folders for flashing the project to the board 2026-09-03 16:34:31 +10:00
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