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FPGA_Uni
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016fb874e75765ecd482fdb165841fe2632f2f6f
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3 Commits
Include renames
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SHA1
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TroubleElectrical
9583abd307
Updated shifter (Q5) to use proper 2**width approach and corrected the logic such that C is width bits wide, and b is 2**width (as defined in Q5 B)
2026-09-15 19:43:28 +10:00
TroubleElectrical
05361dcf70
Added all Testbenches to Modelsim and confirmed working operation
2026-09-15 15:15:00 +10:00
TroubleElectrical
32eea036a8
Added projects for A1 q2 to q6
2026-09-04 13:12:33 +10:00