Updated assignment 2 dependency modules (currently 8 errors in compile)

modules/instruction_counter.sv

@@ -8,14 +8,14 @@ module instruction_counter #(parameter width=5)(
 );
 
     logic [2**width-1:0] pc;
-    always_ff (@posedge clk) begin
+    always_ff @(posedge clk) begin
         if (we) begin
-            pc <= W
-        else
+            pc <= W;
+        end else begin
             pc <= pc + 4;
         end
     end
 
     assign addr = pc;
 endmodule
-`endif
+`endif