TroubleElectrical/FPGA_Uni
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Added code to display current PC,

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Removed Blanking from 7seg 4 digits,
Changed reset to a switch rather than button
Compiled working version for board
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TroubleElectrical committed 2026-10-16 14:27:29 +11:00
1 parent 91a5090528
commit d962a1b557
199 files changed
+125133 -7192
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modules/assignment2.sv
+11 -3
View File
@@ -91,8 +91,15 @@ module assignment2 #(width=5, ramsz=9, romsz=10) (
`ifdef QUARTUS_SYNTH
// Temporary Test output
// assign PC_Reg_Display = 16'hC342;
assign PC_Reg_Display = (HID_Hi_Low) ? regs_out[HID_Register][31:16] : regs_out[HID_Register][15:0];
// assign PC_Reg_Display = (HID_Hi_Low) ? regs_out[HID_Register][31:16] : regs_out[HID_Register][15:0];
always_comb begin
if (HID_PC == 1'b1) begin
PC_Reg_Display = (HID_Hi_Low) ? pc_addr[31:16] : pc_addr[15:0];
end
else begin
PC_Reg_Display = (HID_Hi_Low) ? regs_out[HID_Register][31:16] : regs_out[HID_Register][15:0];
end
end
seven_seg_4digit display (
.num(PC_Reg_Display),
@@ -101,6 +108,7 @@ module assignment2 #(width=5, ramsz=9, romsz=10) (
.segments2(out_seg_2),
.segments3(out_seg_3)
);
`endif
`endif // code for board test outputs only
endmodule
`endif