diff --git a/Quartus/A2/assignment2.qsf b/Quartus/A2/assignment2.qsf index b847dba..26707d5 100644 --- a/Quartus/A2/assignment2.qsf +++ b/Quartus/A2/assignment2.qsf @@ -121,4 +121,10 @@ set_location_assignment PIN_AC24 -to out_seg_3[5] set_location_assignment PIN_AC23 -to out_seg_3[6] +set_location_assignment PIN_AC9 -to rst[0] +set_instance_assignment -name IO_STANDARD "1.2 V" -to rst[0] +set_location_assignment PIN_F7 -to out_seg_0[0] +set_location_assignment PIN_F6 -to out_seg_1[0] +set_location_assignment PIN_G6 -to out_seg_2[0] +set_location_assignment PIN_G7 -to out_seg_3[0] set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top \ No newline at end of file diff --git a/Quartus/A2/assignment2.qws b/Quartus/A2/assignment2.qws deleted file mode 100644 index 1c51f7c..0000000 Binary files a/Quartus/A2/assignment2.qws and /dev/null differ diff --git a/Quartus/A2/db/.cmp.kpt b/Quartus/A2/db/.cmp.kpt index 26cea02..911c442 100644 Binary files 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1792120982667 ""} +{ "Info" "IQEXE_START_BANNER_PRODUCT" "Assembler Quartus Prime " "Running Quartus Prime Assembler" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 25.1std.0 Build 1129 10/21/2025 SC Lite Edition " "Version 25.1std.0 Build 1129 10/21/2025 SC Lite Edition" { } { } 0 0 "%1!s!" 0 0 "Design Software" 0 -1 1792120982667 ""} { "Info" "IQEXE_START_BANNER_TIME" "Fri Oct 16 14:23:02 2026 " "Processing started: Fri Oct 16 14:23:02 2026" { } { } 0 0 "Processing started: %1!s!" 0 0 "Design Software" 0 -1 1792120982667 ""} } { } 4 0 "Running %2!s! %1!s!" 0 0 "Assembler" 0 -1 1792120982667 ""} +{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_asm --read_settings_files=off --write_settings_files=off assignment2 -c assignment2 " "Command: quartus_asm --read_settings_files=off --write_settings_files=off assignment2 -c assignment2" { } { } 0 0 "Command: %1!s!" 0 0 "Assembler" 0 -1 1792120982667 ""} +{ "Info" "IASM_ASM_GENERATING_PROGRAMMING_FILES" "" "Assembler is generating device programming files" { } { } 0 115030 "Assembler is generating device programming files" 0 0 "Assembler" 0 -1 1792120988885 ""} +{ "Info" "IQEXE_ERROR_COUNT" "Assembler 0 s 0 s Quartus Prime " "Quartus Prime Assembler was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "548 " "Peak virtual memory: 548 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Design Software" 0 -1 1792120989131 ""} { "Info" "IQEXE_END_BANNER_TIME" "Fri Oct 16 14:23:09 2026 " "Processing ended: Fri Oct 16 14:23:09 2026" { } { } 0 0 "Processing ended: %1!s!" 0 0 "Design Software" 0 -1 1792120989131 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:07 " "Elapsed time: 00:00:07" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "Design Software" 0 -1 1792120989131 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:06 " "Total CPU time (on all processors): 00:00:06" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Design Software" 0 -1 1792120989131 ""} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Assembler" 0 -1 1792120989131 ""} diff --git a/Quartus/A2/db/assignment2.asm.rdb b/Quartus/A2/db/assignment2.asm.rdb index d8370b9..24c7f93 100644 Binary files a/Quartus/A2/db/assignment2.asm.rdb and b/Quartus/A2/db/assignment2.asm.rdb differ diff --git a/Quartus/A2/db/assignment2.cmp.bpm b/Quartus/A2/db/assignment2.cmp.bpm index 3489f93..ffbe3e8 100644 Binary files a/Quartus/A2/db/assignment2.cmp.bpm and b/Quartus/A2/db/assignment2.cmp.bpm differ diff --git a/Quartus/A2/db/assignment2.cmp.cdb b/Quartus/A2/db/assignment2.cmp.cdb index e9b4426..3a79db8 100644 Binary files a/Quartus/A2/db/assignment2.cmp.cdb and b/Quartus/A2/db/assignment2.cmp.cdb differ diff --git a/Quartus/A2/db/assignment2.cmp.hdb b/Quartus/A2/db/assignment2.cmp.hdb index 462766d..aa90e25 100644 Binary files a/Quartus/A2/db/assignment2.cmp.hdb and b/Quartus/A2/db/assignment2.cmp.hdb differ diff --git a/Quartus/A2/db/assignment2.cmp.idb b/Quartus/A2/db/assignment2.cmp.idb index f5dd145..0a7eb1b 100644 Binary files a/Quartus/A2/db/assignment2.cmp.idb and b/Quartus/A2/db/assignment2.cmp.idb differ diff --git a/Quartus/A2/db/assignment2.cmp.logdb b/Quartus/A2/db/assignment2.cmp.logdb index 7d6b728..cfe820e 100644 --- a/Quartus/A2/db/assignment2.cmp.logdb +++ b/Quartus/A2/db/assignment2.cmp.logdb @@ -29,12 +29,11 @@ IO_RULES,LOC_SUPPORT_IO_STD,PASS,IO_000009,I/O Properties Checks for One I/O,The IO_RULES,SINGLE_ENDED_OUTPUTS_LAB_ROWS_FROM_DIFF_IO,INAPPLICABLE,IO_000034,SI Related Distance Checks,Single-ended outputs should be 0 LAB row(s) away from a differential I/O.,High,No Differential I/O Standard assignments found.,,I/O,, IO_RULES,DEV_IO_RULE_OCT_DISCLAIMER,,,,,,,,,, IO_RULES_MATRIX,Pin/Rules,IO_000002;IO_000001;IO_000003;IO_000004;IO_000005;IO_000006;IO_000007;IO_000008;IO_000047;IO_000046;IO_000045;IO_000027;IO_000026;IO_000024;IO_000023;IO_000022;IO_000021;IO_000020;IO_000019;IO_000018;IO_000015;IO_000014;IO_000013;IO_000012;IO_000011;IO_000010;IO_000009;IO_000034, -IO_RULES_MATRIX,Total Pass,0;36;36;0;0;40;36;0;0;0;0;0;0;32;0;0;0;0;32;0;0;0;0;32;0;40;40;0, +IO_RULES_MATRIX,Total Pass,0;41;41;0;0;41;41;0;0;0;0;0;0;32;0;0;0;0;32;0;0;0;0;32;0;41;41;0, IO_RULES_MATRIX,Total Unchecked,0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0, -IO_RULES_MATRIX,Total Inapplicable,40;4;4;40;40;0;4;40;40;40;40;40;40;8;40;40;40;40;8;40;40;40;40;8;40;0;0;40, +IO_RULES_MATRIX,Total Inapplicable,41;0;0;41;41;0;0;41;41;41;41;41;41;9;41;41;41;41;9;41;41;41;41;9;41;0;0;41, IO_RULES_MATRIX,Total Fail,0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0;0, -IO_RULES_MATRIX,HID_PC[0],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Pass;Inapplicable, -IO_RULES_MATRIX,out_seg_0[0],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable, +IO_RULES_MATRIX,out_seg_0[0],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable, IO_RULES_MATRIX,out_seg_0[1],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable, IO_RULES_MATRIX,out_seg_0[2],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable, IO_RULES_MATRIX,out_seg_0[3],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable, @@ -42,7 +41,7 @@ IO_RULES_MATRIX,out_seg_0[4],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pa IO_RULES_MATRIX,out_seg_0[5],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable, IO_RULES_MATRIX,out_seg_0[6],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable, IO_RULES_MATRIX,out_seg_0[7],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable, -IO_RULES_MATRIX,out_seg_1[0],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable, +IO_RULES_MATRIX,out_seg_1[0],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable, IO_RULES_MATRIX,out_seg_1[1],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable, IO_RULES_MATRIX,out_seg_1[2],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable, IO_RULES_MATRIX,out_seg_1[3],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable, @@ -50,7 +49,7 @@ IO_RULES_MATRIX,out_seg_1[4],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pa IO_RULES_MATRIX,out_seg_1[5],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable, IO_RULES_MATRIX,out_seg_1[6],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable, IO_RULES_MATRIX,out_seg_1[7],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable, -IO_RULES_MATRIX,out_seg_2[0],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable, +IO_RULES_MATRIX,out_seg_2[0],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable, IO_RULES_MATRIX,out_seg_2[1],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable, IO_RULES_MATRIX,out_seg_2[2],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable, IO_RULES_MATRIX,out_seg_2[3],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable, @@ -58,7 +57,7 @@ IO_RULES_MATRIX,out_seg_2[4],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pa IO_RULES_MATRIX,out_seg_2[5],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable, IO_RULES_MATRIX,out_seg_2[6],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable, IO_RULES_MATRIX,out_seg_2[7],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable, -IO_RULES_MATRIX,out_seg_3[0],Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable, +IO_RULES_MATRIX,out_seg_3[0],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable, IO_RULES_MATRIX,out_seg_3[1],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable, IO_RULES_MATRIX,out_seg_3[2],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable, IO_RULES_MATRIX,out_seg_3[3],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable, @@ -68,11 +67,13 @@ IO_RULES_MATRIX,out_seg_3[6],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pa IO_RULES_MATRIX,out_seg_3[7],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Inapplicable;Pass;Pass;Inapplicable, IO_RULES_MATRIX,HID_Hi_Low[0],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Pass;Inapplicable, IO_RULES_MATRIX,HID_Register[4],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Pass;Inapplicable, +IO_RULES_MATRIX,HID_Register[3],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Pass;Inapplicable, +IO_RULES_MATRIX,HID_Register[1],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Pass;Inapplicable, IO_RULES_MATRIX,HID_Register[2],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Pass;Inapplicable, IO_RULES_MATRIX,HID_Register[0],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Pass;Inapplicable, -IO_RULES_MATRIX,HID_Register[1],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Pass;Inapplicable, -IO_RULES_MATRIX,HID_Register[3],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Pass;Inapplicable, +IO_RULES_MATRIX,HID_PC[0],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Pass;Inapplicable, IO_RULES_MATRIX,clk[0],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Pass;Inapplicable, +IO_RULES_MATRIX,rst[0],Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Pass;Pass;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Inapplicable;Pass;Pass;Inapplicable, IO_RULES_SUMMARY,Total I/O Rules,28, IO_RULES_SUMMARY,Number of I/O Rules Passed,9, IO_RULES_SUMMARY,Number of I/O Rules Failed,0, diff --git a/Quartus/A2/db/assignment2.cmp.rdb b/Quartus/A2/db/assignment2.cmp.rdb index c6fe010..ea6c7ca 100644 Binary files a/Quartus/A2/db/assignment2.cmp.rdb and b/Quartus/A2/db/assignment2.cmp.rdb differ diff --git a/Quartus/A2/db/assignment2.cyclonev_io_sim_cache.ff_0c_fast.hsd b/Quartus/A2/db/assignment2.cyclonev_io_sim_cache.ff_0c_fast.hsd index b19b6d1..5b25938 100644 Binary files a/Quartus/A2/db/assignment2.cyclonev_io_sim_cache.ff_0c_fast.hsd and b/Quartus/A2/db/assignment2.cyclonev_io_sim_cache.ff_0c_fast.hsd differ diff --git a/Quartus/A2/db/assignment2.cyclonev_io_sim_cache.ii_85c_slow.hsd b/Quartus/A2/db/assignment2.cyclonev_io_sim_cache.ii_85c_slow.hsd index 118df22..0778662 100644 Binary files a/Quartus/A2/db/assignment2.cyclonev_io_sim_cache.ii_85c_slow.hsd and b/Quartus/A2/db/assignment2.cyclonev_io_sim_cache.ii_85c_slow.hsd differ diff --git a/Quartus/A2/db/assignment2.db_info b/Quartus/A2/db/assignment2.db_info index e46c8f6..accd7f7 100644 --- a/Quartus/A2/db/assignment2.db_info +++ b/Quartus/A2/db/assignment2.db_info @@ -1,3 +1,3 @@ Quartus_Version = Version 25.1std.0 Build 1129 10/21/2025 SC Lite Edition Version_Index = 604268800 -Creation_Time = Fri Oct 16 09:55:43 2026 +Creation_Time = Fri Oct 16 13:01:03 2026 diff --git a/Quartus/A2/db/assignment2.eda.qmsg b/Quartus/A2/db/assignment2.eda.qmsg index 1d21604..eb31f3c 100644 --- a/Quartus/A2/db/assignment2.eda.qmsg +++ b/Quartus/A2/db/assignment2.eda.qmsg @@ -1,5 +1,5 @@ -{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "Design Software" 0 -1 1792105144414 ""} -{ "Info" "IQEXE_START_BANNER_PRODUCT" "EDA Netlist Writer Quartus Prime " "Running Quartus Prime EDA Netlist Writer" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 25.1std.0 Build 1129 10/21/2025 SC Lite Edition " "Version 25.1std.0 Build 1129 10/21/2025 SC Lite Edition" { } { } 0 0 "%1!s!" 0 0 "Design Software" 0 -1 1792105144415 ""} { "Info" "IQEXE_START_BANNER_TIME" "Fri Oct 16 09:59:04 2026 " "Processing started: Fri Oct 16 09:59:04 2026" { } { } 0 0 "Processing started: %1!s!" 0 0 "Design Software" 0 -1 1792105144415 ""} } { } 4 0 "Running %2!s! %1!s!" 0 0 "EDA Netlist Writer" 0 -1 1792105144415 ""} -{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_eda --read_settings_files=off --write_settings_files=off assignment2 -c assignment2 " "Command: quartus_eda --read_settings_files=off --write_settings_files=off assignment2 -c assignment2" { } { } 0 0 "Command: %1!s!" 0 0 "EDA Netlist Writer" 0 -1 1792105144415 ""} -{ "Info" "IWSC_DONE_HDL_GENERATION" "assignment2.svo /home/oliver/Documents/FPGA_Dev/FPGA_Uni/Quartus/A2/simulation/questa/ simulation " "Generated file assignment2.svo in folder \"/home/oliver/Documents/FPGA_Dev/FPGA_Uni/Quartus/A2/simulation/questa/\" for EDA simulation tool" { } { } 0 204019 "Generated file %1!s! in folder \"%2!s!\" for EDA %3!s! tool" 0 0 "EDA Netlist Writer" 0 -1 1792105145228 ""} -{ "Info" "IQEXE_ERROR_COUNT" "EDA Netlist Writer 0 s 0 s Quartus Prime " "Quartus Prime EDA Netlist Writer was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "669 " "Peak virtual memory: 669 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Design Software" 0 -1 1792105145265 ""} { "Info" "IQEXE_END_BANNER_TIME" "Fri Oct 16 09:59:05 2026 " "Processing ended: Fri Oct 16 09:59:05 2026" { } { } 0 0 "Processing ended: %1!s!" 0 0 "Design Software" 0 -1 1792105145265 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:01 " "Elapsed time: 00:00:01" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "Design Software" 0 -1 1792105145265 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:01 " "Total CPU time (on all processors): 00:00:01" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Design Software" 0 -1 1792105145265 ""} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "EDA Netlist Writer" 0 -1 1792105145265 ""} +{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "Design Software" 0 -1 1792121009731 ""} +{ "Info" "IQEXE_START_BANNER_PRODUCT" "EDA Netlist Writer Quartus Prime " "Running Quartus Prime EDA Netlist Writer" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 25.1std.0 Build 1129 10/21/2025 SC Lite Edition " "Version 25.1std.0 Build 1129 10/21/2025 SC Lite Edition" { } { } 0 0 "%1!s!" 0 0 "Design Software" 0 -1 1792121009731 ""} { "Info" "IQEXE_START_BANNER_TIME" "Fri Oct 16 14:23:29 2026 " "Processing started: Fri Oct 16 14:23:29 2026" { } { } 0 0 "Processing started: %1!s!" 0 0 "Design Software" 0 -1 1792121009731 ""} } { } 4 0 "Running %2!s! %1!s!" 0 0 "EDA Netlist Writer" 0 -1 1792121009731 ""} +{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_eda --read_settings_files=off --write_settings_files=off assignment2 -c assignment2 " "Command: quartus_eda --read_settings_files=off --write_settings_files=off assignment2 -c assignment2" { } { } 0 0 "Command: %1!s!" 0 0 "EDA Netlist Writer" 0 -1 1792121009731 ""} +{ "Info" "IWSC_DONE_HDL_GENERATION" "assignment2.svo /home/oliver/Documents/FPGA_Dev/FPGA_Uni/Quartus/A2/simulation/questa/ simulation " "Generated file assignment2.svo in folder \"/home/oliver/Documents/FPGA_Dev/FPGA_Uni/Quartus/A2/simulation/questa/\" for EDA simulation tool" { } { } 0 204019 "Generated file %1!s! in folder \"%2!s!\" for EDA %3!s! tool" 0 0 "EDA Netlist Writer" 0 -1 1792121011453 ""} +{ "Info" "IQEXE_ERROR_COUNT" "EDA Netlist Writer 0 s 0 s Quartus Prime " "Quartus Prime EDA Netlist Writer was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "693 " "Peak virtual memory: 693 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Design Software" 0 -1 1792121011541 ""} { "Info" "IQEXE_END_BANNER_TIME" "Fri Oct 16 14:23:31 2026 " "Processing ended: Fri Oct 16 14:23:31 2026" { } { } 0 0 "Processing ended: %1!s!" 0 0 "Design Software" 0 -1 1792121011541 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:02 " "Elapsed time: 00:00:02" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "Design Software" 0 -1 1792121011541 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:02 " "Total CPU time (on all processors): 00:00:02" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Design Software" 0 -1 1792121011541 ""} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "EDA Netlist Writer" 0 -1 1792121011541 ""} diff --git a/Quartus/A2/db/assignment2.fit.qmsg b/Quartus/A2/db/assignment2.fit.qmsg index 0b0c16d..134b715 100644 --- a/Quartus/A2/db/assignment2.fit.qmsg +++ b/Quartus/A2/db/assignment2.fit.qmsg @@ -1,44 +1,42 @@ -{ "Info" "IQCU_PARALLEL_SHOW_MANUAL_NUM_PROCS" "2 " "Parallel compilation is enabled and will use up to 2 processors" { } { } 0 20032 "Parallel compilation is enabled and will use up to %1!i! processors" 0 0 "Fitter" 0 -1 1792105101072 ""} -{ "Info" "IMPP_MPP_USER_DEVICE" "assignment2 5CGXFC5C6F27C7 " "Selected device 5CGXFC5C6F27C7 for design \"assignment2\"" { } { } 0 119006 "Selected device %2!s! for design \"%1!s!\"" 0 0 "Fitter" 0 -1 1792105101077 ""} -{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "Low junction temperature 0 degrees C " "Low junction temperature is 0 degrees C" { } { } 0 21077 "%1!s! is %2!s!" 0 0 "Fitter" 0 -1 1792105101149 ""} -{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "High junction temperature 85 degrees C " "High junction temperature is 85 degrees C" { } { } 0 21077 "%1!s! is %2!s!" 0 0 "Fitter" 0 -1 1792105101149 ""} -{ "Info" "IFITCC_FITCC_INFO_AUTO_FIT_COMPILATION_ON" "" "Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time" { } { } 0 171003 "Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time" 0 0 "Fitter" 0 -1 1792105101590 ""} -{ "Warning" "WCPT_FEATURE_DISABLED_POST" "LogicLock " "Feature LogicLock is only available with a valid subscription license. You can purchase a software subscription to gain full access to this feature." { } { } 0 292013 "Feature %1!s! is only available with a valid subscription license. You can purchase a software subscription to gain full access to this feature." 0 0 "Fitter" 0 -1 1792105101619 ""} -{ "Warning" "WCUT_CUT_ATOM_PINS_WITH_INCOMPLETE_IO_ASSIGNMENTS" "" "Some pins have incomplete I/O assignments. Refer to the I/O Assignment Warnings report for details" { } { } 0 15714 "Some pins have incomplete I/O assignments. Refer to the I/O Assignment Warnings report for details" 0 0 "Fitter" 0 -1 1792105101682 ""} -{ "Critical Warning" "WFIOMGR_PINS_MISSING_LOCATION_INFO" "4 40 " "No exact pin location assignment(s) for 4 pins of 40 total pins. For the list of pins please refer to the I/O Assignment Warnings table in the fitter report." { } { } 1 169085 "No exact pin location assignment(s) for %1!d! pins of %2!d! total pins. For the list of pins please refer to the I/O Assignment Warnings table in the fitter report." 0 0 "Fitter" 0 -1 1792105101952 ""} -{ "Info" "IFITCC_FITCC_FITTER_PERIPHERY_PLACEMENT_START_INFO" "" "Starting Fitter periphery placement operations" { } { } 0 184020 "Starting Fitter periphery placement operations" 0 0 "Fitter" 0 -1 1792105108819 ""} -{ "Info" "IFITCC_FITCC_FITTER_PERIPHERY_PLACEMENT_END_INFO" "00:00:00 " "Fitter periphery placement operations ending: elapsed time is 00:00:00" { } { } 0 184021 "Fitter periphery placement operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1792105108904 ""} -{ "Info" "IFSAC_FSAC_REGISTER_PACKING_START_REGPACKING_INFO" "" "Starting register packing" { } { } 0 176233 "Starting register packing" 0 0 "Fitter" 0 -1 1792105108906 ""} -{ "Extra Info" "IFSAC_FSAC_REGISTER_PACKING_BEGIN_FAST_REGISTER_INFO" "" "Started Fast Input/Output/OE register processing" { } { } 1 176236 "Started Fast Input/Output/OE register processing" 1 0 "Fitter" 0 -1 1792105108906 ""} -{ "Extra Info" "IFSAC_FSAC_REGISTER_PACKING_FINISH_FAST_REGISTER_INFO" "" "Finished Fast Input/Output/OE register processing" { } { } 1 176237 "Finished Fast Input/Output/OE register processing" 1 0 "Fitter" 0 -1 1792105108907 ""} -{ "Extra Info" "IFSAC_FSAC_START_MAC_SCAN_CHAIN_INFERENCING" "" "Start inferring scan chains for DSP blocks" { } { } 1 176238 "Start inferring scan chains for DSP blocks" 1 0 "Fitter" 0 -1 1792105108907 ""} -{ "Extra Info" "IFSAC_FSAC_FINISH_MAC_SCAN_CHAIN_INFERENCING" "" "Inferring scan chains for DSP blocks is complete" { } { } 1 176239 "Inferring scan chains for DSP blocks is complete" 1 0 "Fitter" 0 -1 1792105108907 ""} -{ "Extra Info" "IFSAC_FSAC_START_IO_MAC_RAM_PACKING" "" "Moving registers into I/O cells, DSP blocks, and RAM blocks to improve timing and density" { } { } 1 176246 "Moving registers into I/O cells, DSP blocks, and RAM blocks to improve timing and density" 1 0 "Fitter" 0 -1 1792105108908 ""} -{ "Extra Info" "IFSAC_FSAC_FINISH_IO_MAC_RAM_PACKING" "" "Finished moving registers into I/O cells, DSP blocks, and RAM blocks" { } { } 1 176247 "Finished moving registers into I/O cells, DSP blocks, and RAM blocks" 1 0 "Fitter" 0 -1 1792105108908 ""} -{ "Info" "IFSAC_FSAC_REGISTER_PACKING_FINISH_REGPACKING_INFO" "" "Finished register packing" { { "Extra Info" "IFSAC_NO_REGISTERS_WERE_PACKED" "" "No registers were packed into other blocks" { } { } 1 176219 "No registers were packed into other blocks" 0 0 "Design Software" 0 -1 1792105108908 ""} } { } 0 176235 "Finished register packing" 0 0 "Fitter" 0 -1 1792105108908 ""} -{ "Info" "IFSV_FITTER_PREPARATION_END" "00:00:07 " "Fitter preparation operations ending: elapsed time is 00:00:07" { } { } 0 11798 "Fitter preparation operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1792105108947 ""} -{ "Critical Warning" "WSTA_SDC_NOT_FOUND" "assignment2.sdc " "Synopsys Design Constraints File file not found: 'assignment2.sdc'. A Synopsys Design Constraints File is required by the Timing Analyzer to get proper timing constraints. Without it, the Compiler will not properly optimize the design." { } { } 1 332012 "Synopsys Design Constraints File file not found: '%1!s!'. A Synopsys Design Constraints File is required by the Timing Analyzer to get proper timing constraints. Without it, the Compiler will not properly optimize the design." 0 0 "Fitter" 0 -1 1792105115028 ""} -{ "Info" "ISTA_NO_CLOCK_FOUND_NO_DERIVING_MSG" "base clocks " "No user constrained base clocks found in the design" { } { } 0 332144 "No user constrained %1!s! found in the design" 0 0 "Fitter" 0 -1 1792105115028 ""} -{ "Info" "ISTA_DERIVE_CLOCKS_FOUND_NO_CLOCKS" "" "The command derive_clocks did not find any clocks to derive. No clocks were created or changed." { } { } 0 332096 "The command derive_clocks did not find any clocks to derive. No clocks were created or changed." 0 0 "Fitter" 0 -1 1792105115029 ""} -{ "Warning" "WSTA_NO_CLOCKS_DEFINED" "" "No clocks defined in design." { } { } 0 332068 "No clocks defined in design." 0 0 "Fitter" 0 -1 1792105115029 ""} -{ "Info" "ISTA_NO_CLOCK_UNCERTAINTY_FOUND_DERIVING" "\"derive_clock_uncertainty\" " "No user constrained clock uncertainty found in the design. Calling \"derive_clock_uncertainty\"" { } { } 0 332143 "No user constrained clock uncertainty found in the design. Calling %1!s!" 0 0 "Fitter" 0 -1 1792105115030 ""} -{ "Info" "ISTA_NO_UNCERTAINTY_FOUND" "" "The derive_clock_uncertainty command did not apply clock uncertainty to any clock-to-clock transfers." { } { } 0 332154 "The derive_clock_uncertainty command did not apply clock uncertainty to any clock-to-clock transfers." 0 0 "Fitter" 0 -1 1792105115030 ""} -{ "Info" "ISTA_TDC_NO_DEFAULT_OPTIMIZATION_GOALS" "" "Timing requirements not specified -- quality metrics such as performance may be sacrificed to reduce compilation time." { } { } 0 332130 "Timing requirements not specified -- quality metrics such as performance may be sacrificed to reduce compilation time." 0 0 "Fitter" 0 -1 1792105115031 ""} -{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_PREP_START" "" "Fitter placement preparation operations beginning" { } { } 0 170189 "Fitter placement preparation operations beginning" 0 0 "Fitter" 0 -1 1792105115033 ""} -{ "Info" "IVPR20K_VPR_APL_ENABLED" "" "The Fitter is using Advanced Physical Optimization." { } { } 0 14951 "The Fitter is using Advanced Physical Optimization." 0 0 "Fitter" 0 -1 1792105115129 ""} -{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_PREP_END" "00:00:00 " "Fitter placement preparation operations ending: elapsed time is 00:00:00" { } { } 0 170190 "Fitter placement preparation operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1792105115546 ""} -{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_START" "" "Fitter placement operations beginning" { } { } 0 170191 "Fitter placement operations beginning" 0 0 "Fitter" 0 -1 1792105115794 ""} -{ "Info" "IFITAPI_FITAPI_INFO_VPR_PLACEMENT_FINISH" "" "Fitter placement was successful" { } { } 0 170137 "Fitter placement was successful" 0 0 "Fitter" 0 -1 1792105116035 ""} -{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_END" "00:00:00 " "Fitter placement operations ending: elapsed time is 00:00:00" { } { } 0 170192 "Fitter placement operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1792105116035 ""} -{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_START" "" "Fitter routing operations beginning" { } { } 0 170193 "Fitter routing operations beginning" 0 0 "Fitter" 0 -1 1792105116725 ""} -{ "Info" "IFITAPI_FITAPI_VPR_PERCENT_ROUTING_RESOURCE_USAGE" "0 " "Router estimated average interconnect usage is 0% of the available device resources" { { "Info" "IFITAPI_FITAPI_VPR_PEAK_ROUTING_REGION" "0 X0_Y24 X10_Y36 " "Router estimated peak interconnect usage is 0% of the available device resources in the region that extends from location X0_Y24 to location X10_Y36" { } { { "loc" "" { Generic "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/Quartus/A2/" { { 1 { 0 "Router estimated peak interconnect usage is 0% of the available device resources in the region that extends from location X0_Y24 to location X10_Y36"} { { 12 { 0 ""} 0 24 11 13 } } } } } } } 0 170196 "Router estimated peak interconnect usage is %1!d!%% of the available device resources in the region that extends from location %2!s! to location %3!s!" 0 0 "Design Software" 0 -1 1792105122270 ""} } { } 0 170195 "Router estimated average interconnect usage is %1!d!%% of the available device resources" 0 0 "Fitter" 0 -1 1792105122270 ""} -{ "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED" "" "The Fitter performed an Auto Fit compilation. Optimizations were skipped to reduce compilation time." { { "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED_FOR_ROUTABILITY" "" "Optimizations that may affect the design's routability were skipped" { } { } 0 170201 "Optimizations that may affect the design's routability were skipped" 0 0 "Design Software" 0 -1 1792105122426 ""} { "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED_FOR_TIMING" "" "Optimizations that may affect the design's timing were skipped" { } { } 0 170200 "Optimizations that may affect the design's timing were skipped" 0 0 "Design Software" 0 -1 1792105122426 ""} } { } 0 170199 "The Fitter performed an Auto Fit compilation. Optimizations were skipped to reduce compilation time." 0 0 "Fitter" 0 -1 1792105122426 ""} -{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_END" "00:00:01 " "Fitter routing operations ending: elapsed time is 00:00:01" { } { } 0 170194 "Fitter routing operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1792105122429 ""} -{ "Info" "IVPR20K_VPR_TIMING_ANALYSIS_TIME" "the Fitter 0.04 " "Total time spent on timing analysis during the Fitter is 0.04 seconds." { } { } 0 11888 "Total time spent on timing analysis during %1!s! is %2!s! seconds." 0 0 "Fitter" 0 -1 1792105124005 ""} -{ "Info" "ITAPI_TAPI_STARTED" "" "Started post-fitting delay annotation" { } { } 0 334003 "Started post-fitting delay annotation" 0 0 "Fitter" 0 -1 1792105124042 ""} -{ "Info" "ITAPI_TAPI_COMPLETED" "" "Delay annotation completed successfully" { } { } 0 334004 "Delay annotation completed successfully" 0 0 "Fitter" 0 -1 1792105124494 ""} -{ "Info" "ITAPI_TAPI_STARTED" "" "Started post-fitting delay annotation" { } { } 0 334003 "Started post-fitting delay annotation" 0 0 "Fitter" 0 -1 1792105124494 ""} -{ "Info" "ITAPI_TAPI_COMPLETED" "" "Delay annotation completed successfully" { } { } 0 334004 "Delay annotation completed successfully" 0 0 "Fitter" 0 -1 1792105125152 ""} -{ "Info" "IFSV_FITTER_POST_OPERATION_END" "00:00:04 " "Fitter post-fit operations ending: elapsed time is 00:00:04" { } { } 0 11801 "Fitter post-fit operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1792105128457 ""} -{ "Warning" "WFITCC_FITCC_IGNORED_ASSIGNMENT" "" "Found invalid Fitter assignments. See the Ignored Assignments panel in the Fitter Compilation Report for more information." { } { } 0 171167 "Found invalid Fitter assignments. See the Ignored Assignments panel in the Fitter Compilation Report for more information." 0 0 "Fitter" 0 -1 1792105128746 ""} -{ "Info" "IQEXE_ERROR_COUNT" "Fitter 0 s 6 s Quartus Prime " "Quartus Prime Fitter was successful. 0 errors, 6 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "1336 " "Peak virtual memory: 1336 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Design Software" 0 -1 1792105129318 ""} { "Info" "IQEXE_END_BANNER_TIME" "Fri Oct 16 09:58:49 2026 " "Processing ended: Fri Oct 16 09:58:49 2026" { } { } 0 0 "Processing ended: %1!s!" 0 0 "Design Software" 0 -1 1792105129318 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:29 " "Elapsed time: 00:00:29" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "Design Software" 0 -1 1792105129318 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:39 " "Total CPU time (on all processors): 00:00:39" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Design Software" 0 -1 1792105129318 ""} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Fitter" 0 -1 1792105129318 ""} +{ "Info" "IQCU_PARALLEL_SHOW_MANUAL_NUM_PROCS" "2 " "Parallel compilation is enabled and will use up to 2 processors" { } { } 0 20032 "Parallel compilation is enabled and will use up to %1!i! processors" 0 0 "Fitter" 0 -1 1792120865483 ""} +{ "Info" "IMPP_MPP_USER_DEVICE" "assignment2 5CGXFC5C6F27C7 " "Selected device 5CGXFC5C6F27C7 for design \"assignment2\"" { } { } 0 119006 "Selected device %2!s! for design \"%1!s!\"" 0 0 "Fitter" 0 -1 1792120865511 ""} +{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "Low junction temperature 0 degrees C " "Low junction temperature is 0 degrees C" { } { } 0 21077 "%1!s! is %2!s!" 0 0 "Fitter" 0 -1 1792120865591 ""} +{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "High junction temperature 85 degrees C " "High junction temperature is 85 degrees C" { } { } 0 21077 "%1!s! is %2!s!" 0 0 "Fitter" 0 -1 1792120865592 ""} +{ "Info" "IFITCC_FITCC_INFO_AUTO_FIT_COMPILATION_ON" "" "Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time" { } { } 0 171003 "Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time" 0 0 "Fitter" 0 -1 1792120866053 ""} +{ "Warning" "WCPT_FEATURE_DISABLED_POST" "LogicLock " "Feature LogicLock is only available with a valid subscription license. You can purchase a software subscription to gain full access to this feature." { } { } 0 292013 "Feature %1!s! is only available with a valid subscription license. You can purchase a software subscription to gain full access to this feature." 0 0 "Fitter" 0 -1 1792120866081 ""} +{ "Warning" "WCUT_CUT_ATOM_PINS_WITH_INCOMPLETE_IO_ASSIGNMENTS" "" "Some pins have incomplete I/O assignments. Refer to the I/O Assignment Warnings report for details" { } { } 0 15714 "Some pins have incomplete I/O assignments. Refer to the I/O Assignment Warnings report for details" 0 0 "Fitter" 0 -1 1792120866240 ""} +{ "Info" "IFITCC_FITCC_FITTER_PERIPHERY_PLACEMENT_START_INFO" "" "Starting Fitter periphery placement operations" { } { } 0 184020 "Starting Fitter periphery placement operations" 0 0 "Fitter" 0 -1 1792120873542 ""} +{ "Info" "ICCLK_CLOCKS_TOP_AUTO" "1 (1 global) " "Automatically promoted 1 clock (1 global)" { { "Info" "ICCLK_PROMOTE_ASSIGNMENT" "clk\[0\]~inputCLKENA0 2302 global CLKCTRL_G5 " "clk\[0\]~inputCLKENA0 with 2302 fanout uses global clock CLKCTRL_G5" { } { } 0 11162 "%1!s! with %2!d! fanout uses %3!s! clock %4!s!" 0 0 "Design Software" 0 -1 1792120873732 ""} } { } 0 11191 "Automatically promoted %1!d! clock%2!s! %3!s!" 0 0 "Fitter" 0 -1 1792120873732 ""} +{ "Info" "IFITCC_FITCC_FITTER_PERIPHERY_PLACEMENT_END_INFO" "00:00:00 " "Fitter periphery placement operations ending: elapsed time is 00:00:00" { } { } 0 184021 "Fitter periphery placement operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1792120873733 ""} +{ "Info" "IFSAC_FSAC_REGISTER_PACKING_START_REGPACKING_INFO" "" "Starting register packing" { } { } 0 176233 "Starting register packing" 0 0 "Fitter" 0 -1 1792120873777 ""} +{ "Extra Info" "IFSAC_FSAC_REGISTER_PACKING_BEGIN_FAST_REGISTER_INFO" "" "Started Fast Input/Output/OE register processing" { } { } 1 176236 "Started Fast Input/Output/OE register processing" 1 0 "Fitter" 0 -1 1792120873792 ""} +{ "Extra Info" "IFSAC_FSAC_REGISTER_PACKING_FINISH_FAST_REGISTER_INFO" "" "Finished Fast Input/Output/OE register processing" { } { } 1 176237 "Finished Fast Input/Output/OE register processing" 1 0 "Fitter" 0 -1 1792120873817 ""} +{ "Extra Info" "IFSAC_FSAC_START_MAC_SCAN_CHAIN_INFERENCING" "" "Start inferring scan chains for DSP blocks" { } { } 1 176238 "Start inferring scan chains for DSP blocks" 1 0 "Fitter" 0 -1 1792120873841 ""} +{ "Extra Info" "IFSAC_FSAC_FINISH_MAC_SCAN_CHAIN_INFERENCING" "" "Inferring scan chains for DSP blocks is complete" { } { } 1 176239 "Inferring scan chains for DSP blocks is complete" 1 0 "Fitter" 0 -1 1792120873842 ""} +{ "Extra Info" "IFSAC_FSAC_START_IO_MAC_RAM_PACKING" "" "Moving registers into I/O cells, DSP blocks, and RAM blocks to improve timing and density" { } { } 1 176246 "Moving registers into I/O cells, DSP blocks, and RAM blocks to improve timing and density" 1 0 "Fitter" 0 -1 1792120873853 ""} +{ "Extra Info" "IFSAC_FSAC_FINISH_IO_MAC_RAM_PACKING" "" "Finished moving registers into I/O cells, DSP blocks, and RAM blocks" { } { } 1 176247 "Finished moving registers into I/O cells, DSP blocks, and RAM blocks" 1 0 "Fitter" 0 -1 1792120873861 ""} +{ "Info" "IFSAC_FSAC_REGISTER_PACKING_FINISH_REGPACKING_INFO" "" "Finished register packing" { { "Extra Info" "IFSAC_NO_REGISTERS_WERE_PACKED" "" "No registers were packed into other blocks" { } { } 1 176219 "No registers were packed into other blocks" 0 0 "Design Software" 0 -1 1792120873873 ""} } { } 0 176235 "Finished register packing" 0 0 "Fitter" 0 -1 1792120873873 ""} +{ "Info" "IFSV_FITTER_PREPARATION_END" "00:00:08 " "Fitter preparation operations ending: elapsed time is 00:00:08" { } { } 0 11798 "Fitter preparation operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1792120874026 ""} +{ "Critical Warning" "WSTA_SDC_NOT_FOUND" "assignment2.sdc " "Synopsys Design Constraints File file not found: 'assignment2.sdc'. A Synopsys Design Constraints File is required by the Timing Analyzer to get proper timing constraints. Without it, the Compiler will not properly optimize the design." { } { } 1 332012 "Synopsys Design Constraints File file not found: '%1!s!'. A Synopsys Design Constraints File is required by the Timing Analyzer to get proper timing constraints. Without it, the Compiler will not properly optimize the design." 0 0 "Fitter" 0 -1 1792120880418 ""} +{ "Info" "ISTA_NO_CLOCK_FOUND_NO_DERIVING_MSG" "base clocks " "No user constrained base clocks found in the design" { } { } 0 332144 "No user constrained %1!s! found in the design" 0 0 "Fitter" 0 -1 1792120880418 ""} +{ "Info" "ISTA_NO_CLOCK_UNCERTAINTY_FOUND_DERIVING" "\"derive_clock_uncertainty\" " "No user constrained clock uncertainty found in the design. Calling \"derive_clock_uncertainty\"" { } { } 0 332143 "No user constrained clock uncertainty found in the design. Calling %1!s!" 0 0 "Fitter" 0 -1 1792120880471 ""} +{ "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "Deriving Clock Uncertainty. Please refer to report_sdc in the Timing Analyzer to see clock uncertainties. " "Deriving Clock Uncertainty. Please refer to report_sdc in the Timing Analyzer to see clock uncertainties." { } { } 0 332123 "%1!s!" 0 0 "Fitter" 0 -1 1792120880471 ""} +{ "Info" "ISTA_TDC_NO_DEFAULT_OPTIMIZATION_GOALS" "" "Timing requirements not specified -- quality metrics such as performance may be sacrificed to reduce compilation time." { } { } 0 332130 "Timing requirements not specified -- quality metrics such as performance may be sacrificed to reduce compilation time." 0 0 "Fitter" 0 -1 1792120880473 ""} +{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_PREP_START" "" "Fitter placement preparation operations beginning" { } { } 0 170189 "Fitter placement preparation operations beginning" 0 0 "Fitter" 0 -1 1792120880596 ""} +{ "Info" "IVPR20K_VPR_APL_ENABLED" "" "The Fitter is using Advanced Physical Optimization." { } { } 0 14951 "The Fitter is using Advanced Physical Optimization." 0 0 "Fitter" 0 -1 1792120880985 ""} +{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_PREP_END" "00:00:13 " "Fitter placement preparation operations ending: elapsed time is 00:00:13" { } { } 0 170190 "Fitter placement preparation operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1792120893643 ""} +{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_START" "" "Fitter placement operations beginning" { } { } 0 170191 "Fitter placement operations beginning" 0 0 "Fitter" 0 -1 1792120901888 ""} +{ "Info" "IFITAPI_FITAPI_INFO_VPR_PLACEMENT_FINISH" "" "Fitter placement was successful" { } { } 0 170137 "Fitter placement was successful" 0 0 "Fitter" 0 -1 1792120910195 ""} +{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_END" "00:00:08 " "Fitter placement operations ending: elapsed time is 00:00:08" { } { } 0 170192 "Fitter placement operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1792120910195 ""} +{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_START" "" "Fitter routing operations beginning" { } { } 0 170193 "Fitter routing operations beginning" 0 0 "Fitter" 0 -1 1792120911677 ""} +{ "Info" "IFITAPI_FITAPI_VPR_PERCENT_ROUTING_RESOURCE_USAGE" "2 " "Router estimated average interconnect usage is 2% of the available device resources" { { "Info" "IFITAPI_FITAPI_VPR_PEAK_ROUTING_REGION" "25 X34_Y0 X45_Y11 " "Router estimated peak interconnect usage is 25% of the available device resources in the region that extends from location X34_Y0 to location X45_Y11" { } { { "loc" "" { Generic "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/Quartus/A2/" { { 1 { 0 "Router estimated peak interconnect usage is 25% of the available device resources in the region that extends from location X34_Y0 to location X45_Y11"} { { 12 { 0 ""} 34 0 12 12 } } } } } } } 0 170196 "Router estimated peak interconnect usage is %1!d!%% of the available device resources in the region that extends from location %2!s! to location %3!s!" 0 0 "Design Software" 0 -1 1792120922220 ""} } { } 0 170195 "Router estimated average interconnect usage is %1!d!%% of the available device resources" 0 0 "Fitter" 0 -1 1792120922220 ""} +{ "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED" "" "The Fitter performed an Auto Fit compilation. Optimizations were skipped to reduce compilation time." { { "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED_FOR_ROUTABILITY" "" "Optimizations that may affect the design's routability were skipped" { } { } 0 170201 "Optimizations that may affect the design's routability were skipped" 0 0 "Design Software" 0 -1 1792120956275 ""} } { } 0 170199 "The Fitter performed an Auto Fit compilation. Optimizations were skipped to reduce compilation time." 0 0 "Fitter" 0 -1 1792120956275 ""} +{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_END" "00:00:39 " "Fitter routing operations ending: elapsed time is 00:00:39" { } { } 0 170194 "Fitter routing operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1792120956278 ""} +{ "Info" "IVPR20K_VPR_TIMING_ANALYSIS_TIME" "the Fitter 5.60 " "Total time spent on timing analysis during the Fitter is 5.60 seconds." { } { } 0 11888 "Total time spent on timing analysis during %1!s! is %2!s! seconds." 0 0 "Fitter" 0 -1 1792120961714 ""} +{ "Info" "ITAPI_TAPI_STARTED" "" "Started post-fitting delay annotation" { } { } 0 334003 "Started post-fitting delay annotation" 0 0 "Fitter" 0 -1 1792120961790 ""} +{ "Info" "ITAPI_TAPI_COMPLETED" "" "Delay annotation completed successfully" { } { } 0 334004 "Delay annotation completed successfully" 0 0 "Fitter" 0 -1 1792120966301 ""} +{ "Info" "ITAPI_TAPI_STARTED" "" "Started post-fitting delay annotation" { } { } 0 334003 "Started post-fitting delay annotation" 0 0 "Fitter" 0 -1 1792120966304 ""} +{ "Info" "ITAPI_TAPI_COMPLETED" "" "Delay annotation completed successfully" { } { } 0 334004 "Delay annotation completed successfully" 0 0 "Fitter" 0 -1 1792120971259 ""} +{ "Info" "IFSV_FITTER_POST_OPERATION_END" "00:00:17 " "Fitter post-fit operations ending: elapsed time is 00:00:17" { } { } 0 11801 "Fitter post-fit operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1792120978526 ""} +{ "Warning" "WFITCC_FITCC_IGNORED_ASSIGNMENT" "" "Found invalid Fitter assignments. See the Ignored Assignments panel in the Fitter Compilation Report for more information." { } { } 0 171167 "Found invalid Fitter assignments. See the Ignored Assignments panel in the Fitter Compilation Report for more information." 0 0 "Fitter" 0 -1 1792120978958 ""} +{ "Info" "IQEXE_ERROR_COUNT" "Fitter 0 s 4 s Quartus Prime " "Quartus Prime Fitter was successful. 0 errors, 4 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "1435 " "Peak virtual memory: 1435 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Design Software" 0 -1 1792120980808 ""} { "Info" "IQEXE_END_BANNER_TIME" "Fri Oct 16 14:23:00 2026 " "Processing ended: Fri Oct 16 14:23:00 2026" { } { } 0 0 "Processing ended: %1!s!" 0 0 "Design Software" 0 -1 1792120980808 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:01:56 " "Elapsed time: 00:01:56" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "Design Software" 0 -1 1792120980808 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:02:52 " "Total CPU time (on all processors): 00:02:52" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Design Software" 0 -1 1792120980808 ""} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Fitter" 0 -1 1792120980808 ""} diff --git a/Quartus/A2/db/assignment2.hier_info b/Quartus/A2/db/assignment2.hier_info index 078dba6..254d0fd 100644 --- a/Quartus/A2/db/assignment2.hier_info +++ b/Quartus/A2/db/assignment2.hier_info @@ -1,5 +1,6 @@ |assignment2 clk[0] => clk[0].IN2 +rst[0] => rst[0].IN2 HID_Register[0] => Mux0.IN4 HID_Register[0] => Mux1.IN4 HID_Register[0] => Mux2.IN4 @@ -160,7 +161,38 @@ HID_Register[4] => Mux28.IN0 HID_Register[4] => Mux29.IN0 HID_Register[4] => Mux30.IN0 HID_Register[4] => Mux31.IN0 -HID_PC[0] => ~NO_FANOUT~ +HID_PC[0] => PC_Reg_Display.OUTPUTSELECT +HID_PC[0] => PC_Reg_Display.OUTPUTSELECT +HID_PC[0] => PC_Reg_Display.OUTPUTSELECT +HID_PC[0] => PC_Reg_Display.OUTPUTSELECT +HID_PC[0] => PC_Reg_Display.OUTPUTSELECT +HID_PC[0] => PC_Reg_Display.OUTPUTSELECT +HID_PC[0] => PC_Reg_Display.OUTPUTSELECT +HID_PC[0] => PC_Reg_Display.OUTPUTSELECT +HID_PC[0] => PC_Reg_Display.OUTPUTSELECT +HID_PC[0] => PC_Reg_Display.OUTPUTSELECT +HID_PC[0] => PC_Reg_Display.OUTPUTSELECT +HID_PC[0] => PC_Reg_Display.OUTPUTSELECT +HID_PC[0] => PC_Reg_Display.OUTPUTSELECT +HID_PC[0] => PC_Reg_Display.OUTPUTSELECT +HID_PC[0] => PC_Reg_Display.OUTPUTSELECT +HID_PC[0] => PC_Reg_Display.OUTPUTSELECT +HID_Hi_Low[0] => PC_Reg_Display.OUTPUTSELECT +HID_Hi_Low[0] => PC_Reg_Display.OUTPUTSELECT +HID_Hi_Low[0] => PC_Reg_Display.OUTPUTSELECT +HID_Hi_Low[0] => PC_Reg_Display.OUTPUTSELECT +HID_Hi_Low[0] => PC_Reg_Display.OUTPUTSELECT +HID_Hi_Low[0] => PC_Reg_Display.OUTPUTSELECT +HID_Hi_Low[0] => PC_Reg_Display.OUTPUTSELECT +HID_Hi_Low[0] => PC_Reg_Display.OUTPUTSELECT +HID_Hi_Low[0] => PC_Reg_Display.OUTPUTSELECT +HID_Hi_Low[0] => PC_Reg_Display.OUTPUTSELECT +HID_Hi_Low[0] => PC_Reg_Display.OUTPUTSELECT +HID_Hi_Low[0] => PC_Reg_Display.OUTPUTSELECT +HID_Hi_Low[0] => PC_Reg_Display.OUTPUTSELECT +HID_Hi_Low[0] => PC_Reg_Display.OUTPUTSELECT +HID_Hi_Low[0] => PC_Reg_Display.OUTPUTSELECT +HID_Hi_Low[0] => PC_Reg_Display.OUTPUTSELECT HID_Hi_Low[0] => PC_Reg_Display.OUTPUTSELECT HID_Hi_Low[0] => PC_Reg_Display.OUTPUTSELECT HID_Hi_Low[0] => PC_Reg_Display.OUTPUTSELECT @@ -244,6 +276,38 @@ clk[0] => pc[28].CLK clk[0] => pc[29].CLK clk[0] => pc[30].CLK clk[0] => pc[31].CLK +rst[0] => pc[0].ACLR +rst[0] => pc[1].ACLR +rst[0] => pc[2].ACLR +rst[0] => pc[3].ACLR +rst[0] => pc[4].ACLR +rst[0] => pc[5].ACLR +rst[0] => pc[6].ACLR +rst[0] => pc[7].ACLR +rst[0] => pc[8].ACLR +rst[0] => pc[9].ACLR +rst[0] => pc[10].ACLR +rst[0] => pc[11].ACLR +rst[0] => pc[12].ACLR +rst[0] => pc[13].ACLR +rst[0] => pc[14].ACLR +rst[0] => pc[15].ACLR +rst[0] => pc[16].ACLR +rst[0] => pc[17].ACLR +rst[0] => pc[18].ACLR +rst[0] => pc[19].ACLR +rst[0] => pc[20].ACLR +rst[0] => pc[21].ACLR +rst[0] => pc[22].ACLR +rst[0] => pc[23].ACLR +rst[0] => pc[24].ACLR +rst[0] => pc[25].ACLR +rst[0] => pc[26].ACLR +rst[0] => pc[27].ACLR +rst[0] => pc[28].ACLR +rst[0] => pc[29].ACLR +rst[0] => pc[30].ACLR +rst[0] => pc[31].ACLR we[0] => pc.OUTPUTSELECT we[0] => pc.OUTPUTSELECT we[0] => pc.OUTPUTSELECT @@ -274,8 +338,8 @@ we[0] => pc.OUTPUTSELECT we[0] => pc.OUTPUTSELECT we[0] => pc.OUTPUTSELECT we[0] => pc.OUTPUTSELECT -we[0] => pc[0].ENA we[0] => pc[1].ENA +we[0] => pc[0].ENA W[0] => pc[0].DATAIN W[1] => pc[1].DATAIN W[2] => pc.DATAB @@ -343,16 +407,16 @@ addr[31] <= pc[31].DB_MAX_OUTPUT_PORT_TYPE |assignment2|rom:ROM -Ad[0] => mem.RADDR -Ad[1] => mem.RADDR1 -Ad[2] => mem.RADDR2 -Ad[3] => mem.RADDR3 -Ad[4] => mem.RADDR4 -Ad[5] => mem.RADDR5 -Ad[6] => mem.RADDR6 -Ad[7] => mem.RADDR7 -Ad[8] => mem.RADDR8 -Ad[9] => mem.RADDR9 +Ad[0] => ~NO_FANOUT~ +Ad[1] => ~NO_FANOUT~ +Ad[2] => mem.RADDR +Ad[3] => mem.RADDR1 +Ad[4] => mem.RADDR2 +Ad[5] => mem.RADDR3 +Ad[6] => mem.RADDR4 +Ad[7] => mem.RADDR5 +Ad[8] => mem.RADDR6 +Ad[9] => mem.RADDR7 Dout[0] <= mem.DATAOUT Dout[1] <= mem.DATAOUT1 Dout[2] <= mem.DATAOUT2 @@ -388,623 +452,5180 @@ Dout[31] <= mem.DATAOUT31 |assignment2|ram:RAM -clk[0] => mem.we_a.CLK -clk[0] => mem.waddr_a[10].CLK -clk[0] => mem.waddr_a[9].CLK -clk[0] => mem.waddr_a[8].CLK -clk[0] => mem.waddr_a[7].CLK -clk[0] => mem.waddr_a[6].CLK -clk[0] => mem.waddr_a[5].CLK -clk[0] => mem.waddr_a[4].CLK -clk[0] => mem.waddr_a[3].CLK -clk[0] => mem.waddr_a[2].CLK -clk[0] => mem.waddr_a[1].CLK -clk[0] => mem.waddr_a[0].CLK -clk[0] => mem.data_a[-1].CLK -clk[0] => mem.data_a[0].CLK -clk[0] => mem.CLK0 -addr[0] => mem.waddr_a[0].DATAIN -addr[0] => mem.WADDR -addr[0] => mem.RADDR -addr[1] => mem.waddr_a[1].DATAIN -addr[1] => mem.WADDR1 -addr[1] => mem.RADDR1 -addr[2] => mem.waddr_a[2].DATAIN -addr[2] => mem.WADDR2 -addr[2] => mem.RADDR2 -addr[3] => mem.waddr_a[3].DATAIN -addr[3] => mem.WADDR3 -addr[3] => mem.RADDR3 -addr[4] => mem.waddr_a[4].DATAIN -addr[4] => mem.WADDR4 -addr[4] => mem.RADDR4 -addr[5] => mem.waddr_a[5].DATAIN -addr[5] => mem.WADDR5 -addr[5] => mem.RADDR5 -addr[6] => mem.waddr_a[6].DATAIN -addr[6] => mem.WADDR6 -addr[6] => mem.RADDR6 -addr[7] => mem.waddr_a[7].DATAIN -addr[7] => mem.WADDR7 -addr[7] => mem.RADDR7 -addr[8] => mem.waddr_a[8].DATAIN -addr[8] => mem.WADDR8 -addr[8] => mem.RADDR8 -addr[9] => mem.waddr_a[9].DATAIN -addr[9] => mem.WADDR9 -addr[9] => mem.RADDR9 -addr[10] => mem.waddr_a[10].DATAIN -addr[10] => mem.WADDR10 -addr[10] => mem.RADDR10 -addr[11] => ~NO_FANOUT~ -addr[12] => ~NO_FANOUT~ -addr[13] => ~NO_FANOUT~ -addr[14] => ~NO_FANOUT~ -addr[15] => ~NO_FANOUT~ -addr[16] => ~NO_FANOUT~ -addr[17] => ~NO_FANOUT~ -addr[18] => ~NO_FANOUT~ -addr[19] => ~NO_FANOUT~ -addr[20] => ~NO_FANOUT~ -addr[21] => ~NO_FANOUT~ -addr[22] => ~NO_FANOUT~ -addr[23] => ~NO_FANOUT~ -addr[24] => ~NO_FANOUT~ -addr[25] => ~NO_FANOUT~ -addr[26] => ~NO_FANOUT~ -addr[27] => ~NO_FANOUT~ -addr[28] => ~NO_FANOUT~ -addr[29] => ~NO_FANOUT~ -addr[30] => ~NO_FANOUT~ -addr[31] => ~NO_FANOUT~ -addr[32] => ~NO_FANOUT~ -addr[33] => ~NO_FANOUT~ -addr[34] => ~NO_FANOUT~ -addr[35] => ~NO_FANOUT~ -addr[36] => ~NO_FANOUT~ -addr[37] => ~NO_FANOUT~ -addr[38] => ~NO_FANOUT~ -addr[39] => ~NO_FANOUT~ -addr[40] => ~NO_FANOUT~ -addr[41] => ~NO_FANOUT~ -addr[42] => ~NO_FANOUT~ -addr[43] => ~NO_FANOUT~ -addr[44] => ~NO_FANOUT~ -addr[45] => ~NO_FANOUT~ -addr[46] => ~NO_FANOUT~ -addr[47] => ~NO_FANOUT~ -addr[48] => ~NO_FANOUT~ -addr[49] => ~NO_FANOUT~ -addr[50] => ~NO_FANOUT~ -addr[51] => ~NO_FANOUT~ -addr[52] => ~NO_FANOUT~ -addr[53] => ~NO_FANOUT~ -addr[54] => ~NO_FANOUT~ -addr[55] => ~NO_FANOUT~ -addr[56] => ~NO_FANOUT~ -addr[57] => ~NO_FANOUT~ -addr[58] => ~NO_FANOUT~ -addr[59] => ~NO_FANOUT~ -addr[60] => ~NO_FANOUT~ -addr[61] => ~NO_FANOUT~ -addr[62] => ~NO_FANOUT~ -addr[63] => ~NO_FANOUT~ -addr[64] => ~NO_FANOUT~ -addr[65] => ~NO_FANOUT~ -addr[66] => ~NO_FANOUT~ -addr[67] => ~NO_FANOUT~ -addr[68] => ~NO_FANOUT~ -addr[69] => ~NO_FANOUT~ -addr[70] => ~NO_FANOUT~ -addr[71] => ~NO_FANOUT~ -addr[72] => ~NO_FANOUT~ -addr[73] => ~NO_FANOUT~ -addr[74] => ~NO_FANOUT~ -addr[75] => ~NO_FANOUT~ -addr[76] => ~NO_FANOUT~ -addr[77] => ~NO_FANOUT~ -addr[78] => ~NO_FANOUT~ -addr[79] => ~NO_FANOUT~ -addr[80] => ~NO_FANOUT~ -addr[81] => ~NO_FANOUT~ -addr[82] => ~NO_FANOUT~ -addr[83] => ~NO_FANOUT~ -addr[84] => ~NO_FANOUT~ -addr[85] => ~NO_FANOUT~ -addr[86] => ~NO_FANOUT~ -addr[87] => ~NO_FANOUT~ -addr[88] => ~NO_FANOUT~ -addr[89] => ~NO_FANOUT~ -addr[90] => ~NO_FANOUT~ -addr[91] => ~NO_FANOUT~ -addr[92] => ~NO_FANOUT~ -addr[93] => ~NO_FANOUT~ -addr[94] => ~NO_FANOUT~ -addr[95] => ~NO_FANOUT~ -addr[96] => ~NO_FANOUT~ -addr[97] => ~NO_FANOUT~ -addr[98] => ~NO_FANOUT~ -addr[99] => ~NO_FANOUT~ -addr[100] => ~NO_FANOUT~ -addr[101] => ~NO_FANOUT~ -addr[102] => ~NO_FANOUT~ -addr[103] => ~NO_FANOUT~ -addr[104] => ~NO_FANOUT~ -addr[105] => ~NO_FANOUT~ -addr[106] => ~NO_FANOUT~ -addr[107] => ~NO_FANOUT~ -addr[108] => ~NO_FANOUT~ -addr[109] => ~NO_FANOUT~ -addr[110] => ~NO_FANOUT~ -addr[111] => ~NO_FANOUT~ -addr[112] => ~NO_FANOUT~ -addr[113] => ~NO_FANOUT~ -addr[114] => ~NO_FANOUT~ -addr[115] => ~NO_FANOUT~ -addr[116] => ~NO_FANOUT~ -addr[117] => ~NO_FANOUT~ -addr[118] => ~NO_FANOUT~ -addr[119] => ~NO_FANOUT~ -addr[120] => ~NO_FANOUT~ -addr[121] => ~NO_FANOUT~ -addr[122] => ~NO_FANOUT~ -addr[123] => ~NO_FANOUT~ -addr[124] => ~NO_FANOUT~ -addr[125] => ~NO_FANOUT~ -addr[126] => ~NO_FANOUT~ -addr[127] => ~NO_FANOUT~ -addr[128] => ~NO_FANOUT~ -addr[129] => ~NO_FANOUT~ -addr[130] => ~NO_FANOUT~ -addr[131] => ~NO_FANOUT~ -addr[132] => ~NO_FANOUT~ -addr[133] => ~NO_FANOUT~ -addr[134] => ~NO_FANOUT~ -addr[135] => ~NO_FANOUT~ -addr[136] => ~NO_FANOUT~ -addr[137] => ~NO_FANOUT~ -addr[138] => ~NO_FANOUT~ -addr[139] => ~NO_FANOUT~ -addr[140] => ~NO_FANOUT~ -addr[141] => ~NO_FANOUT~ -addr[142] => ~NO_FANOUT~ -addr[143] => ~NO_FANOUT~ -addr[144] => ~NO_FANOUT~ -addr[145] => ~NO_FANOUT~ -addr[146] => ~NO_FANOUT~ -addr[147] => ~NO_FANOUT~ -addr[148] => ~NO_FANOUT~ -addr[149] => ~NO_FANOUT~ -addr[150] => ~NO_FANOUT~ -addr[151] => ~NO_FANOUT~ -addr[152] => ~NO_FANOUT~ -addr[153] => ~NO_FANOUT~ -addr[154] => ~NO_FANOUT~ -addr[155] => ~NO_FANOUT~ -addr[156] => ~NO_FANOUT~ -addr[157] => ~NO_FANOUT~ -addr[158] => ~NO_FANOUT~ -addr[159] => ~NO_FANOUT~ -addr[160] => ~NO_FANOUT~ -addr[161] => ~NO_FANOUT~ -addr[162] => ~NO_FANOUT~ -addr[163] => ~NO_FANOUT~ -addr[164] => ~NO_FANOUT~ -addr[165] => ~NO_FANOUT~ -addr[166] => ~NO_FANOUT~ -addr[167] => ~NO_FANOUT~ -addr[168] => ~NO_FANOUT~ -addr[169] => ~NO_FANOUT~ -addr[170] => ~NO_FANOUT~ -addr[171] => ~NO_FANOUT~ -addr[172] => ~NO_FANOUT~ -addr[173] => ~NO_FANOUT~ -addr[174] => ~NO_FANOUT~ -addr[175] => ~NO_FANOUT~ -addr[176] => ~NO_FANOUT~ -addr[177] => ~NO_FANOUT~ -addr[178] => ~NO_FANOUT~ -addr[179] => ~NO_FANOUT~ -addr[180] => ~NO_FANOUT~ -addr[181] => ~NO_FANOUT~ -addr[182] => ~NO_FANOUT~ -addr[183] => ~NO_FANOUT~ -addr[184] => ~NO_FANOUT~ -addr[185] => ~NO_FANOUT~ -addr[186] => ~NO_FANOUT~ -addr[187] => ~NO_FANOUT~ -addr[188] => ~NO_FANOUT~ -addr[189] => ~NO_FANOUT~ -addr[190] => ~NO_FANOUT~ -addr[191] => ~NO_FANOUT~ -addr[192] => ~NO_FANOUT~ -addr[193] => ~NO_FANOUT~ -addr[194] => ~NO_FANOUT~ -addr[195] => ~NO_FANOUT~ -addr[196] => ~NO_FANOUT~ -addr[197] => ~NO_FANOUT~ -addr[198] => ~NO_FANOUT~ -addr[199] => ~NO_FANOUT~ -addr[200] => ~NO_FANOUT~ -addr[201] => ~NO_FANOUT~ -addr[202] => ~NO_FANOUT~ -addr[203] => ~NO_FANOUT~ -addr[204] => ~NO_FANOUT~ -addr[205] => ~NO_FANOUT~ -addr[206] => ~NO_FANOUT~ -addr[207] => ~NO_FANOUT~ -addr[208] => ~NO_FANOUT~ -addr[209] => ~NO_FANOUT~ -addr[210] => ~NO_FANOUT~ -addr[211] => ~NO_FANOUT~ -addr[212] => ~NO_FANOUT~ -addr[213] => ~NO_FANOUT~ -addr[214] => ~NO_FANOUT~ -addr[215] => ~NO_FANOUT~ -addr[216] => ~NO_FANOUT~ -addr[217] => ~NO_FANOUT~ -addr[218] => ~NO_FANOUT~ -addr[219] => ~NO_FANOUT~ -addr[220] => ~NO_FANOUT~ -addr[221] => ~NO_FANOUT~ -addr[222] => ~NO_FANOUT~ -addr[223] => ~NO_FANOUT~ -addr[224] => ~NO_FANOUT~ -addr[225] => ~NO_FANOUT~ -addr[226] => ~NO_FANOUT~ -addr[227] => ~NO_FANOUT~ -addr[228] => ~NO_FANOUT~ -addr[229] => ~NO_FANOUT~ -addr[230] => ~NO_FANOUT~ -addr[231] => ~NO_FANOUT~ -addr[232] => ~NO_FANOUT~ -addr[233] => ~NO_FANOUT~ -addr[234] => ~NO_FANOUT~ -addr[235] => ~NO_FANOUT~ -addr[236] => ~NO_FANOUT~ -addr[237] => ~NO_FANOUT~ -addr[238] => ~NO_FANOUT~ -addr[239] => ~NO_FANOUT~ -addr[240] => ~NO_FANOUT~ -addr[241] => ~NO_FANOUT~ -addr[242] => ~NO_FANOUT~ -addr[243] => ~NO_FANOUT~ -addr[244] => ~NO_FANOUT~ -addr[245] => ~NO_FANOUT~ -addr[246] => ~NO_FANOUT~ -addr[247] => ~NO_FANOUT~ -addr[248] => ~NO_FANOUT~ -addr[249] => ~NO_FANOUT~ -addr[250] => ~NO_FANOUT~ -addr[251] => ~NO_FANOUT~ -addr[252] => ~NO_FANOUT~ -addr[253] => ~NO_FANOUT~ -addr[254] => ~NO_FANOUT~ -addr[255] => ~NO_FANOUT~ -addr[256] => ~NO_FANOUT~ -addr[257] => ~NO_FANOUT~ -addr[258] => ~NO_FANOUT~ -addr[259] => ~NO_FANOUT~ -addr[260] => ~NO_FANOUT~ -addr[261] => ~NO_FANOUT~ -addr[262] => ~NO_FANOUT~ -addr[263] => ~NO_FANOUT~ -addr[264] => ~NO_FANOUT~ -addr[265] => ~NO_FANOUT~ -addr[266] => ~NO_FANOUT~ -addr[267] => ~NO_FANOUT~ -addr[268] => ~NO_FANOUT~ -addr[269] => ~NO_FANOUT~ -addr[270] => ~NO_FANOUT~ -addr[271] => ~NO_FANOUT~ -addr[272] => ~NO_FANOUT~ -addr[273] => ~NO_FANOUT~ -addr[274] => ~NO_FANOUT~ -addr[275] => ~NO_FANOUT~ -addr[276] => ~NO_FANOUT~ -addr[277] => ~NO_FANOUT~ -addr[278] => ~NO_FANOUT~ -addr[279] => ~NO_FANOUT~ -addr[280] => ~NO_FANOUT~ -addr[281] => ~NO_FANOUT~ -addr[282] => ~NO_FANOUT~ -addr[283] => ~NO_FANOUT~ -addr[284] => ~NO_FANOUT~ -addr[285] => ~NO_FANOUT~ -addr[286] => ~NO_FANOUT~ -addr[287] => ~NO_FANOUT~ -addr[288] => ~NO_FANOUT~ -addr[289] => ~NO_FANOUT~ -addr[290] => ~NO_FANOUT~ -addr[291] => ~NO_FANOUT~ -addr[292] => ~NO_FANOUT~ -addr[293] => ~NO_FANOUT~ -addr[294] => ~NO_FANOUT~ -addr[295] => ~NO_FANOUT~ -addr[296] => ~NO_FANOUT~ -addr[297] => ~NO_FANOUT~ -addr[298] => ~NO_FANOUT~ -addr[299] => ~NO_FANOUT~ -addr[300] => ~NO_FANOUT~ -addr[301] => ~NO_FANOUT~ -addr[302] => ~NO_FANOUT~ -addr[303] => ~NO_FANOUT~ -addr[304] => ~NO_FANOUT~ -addr[305] => ~NO_FANOUT~ -addr[306] => ~NO_FANOUT~ -addr[307] => ~NO_FANOUT~ -addr[308] => ~NO_FANOUT~ -addr[309] => ~NO_FANOUT~ -addr[310] => ~NO_FANOUT~ -addr[311] => ~NO_FANOUT~ -addr[312] => ~NO_FANOUT~ -addr[313] => ~NO_FANOUT~ -addr[314] => ~NO_FANOUT~ -addr[315] => ~NO_FANOUT~ -addr[316] => ~NO_FANOUT~ -addr[317] => ~NO_FANOUT~ -addr[318] => ~NO_FANOUT~ -addr[319] => ~NO_FANOUT~ -addr[320] => ~NO_FANOUT~ -addr[321] => ~NO_FANOUT~ -addr[322] => ~NO_FANOUT~ -addr[323] => ~NO_FANOUT~ -addr[324] => ~NO_FANOUT~ -addr[325] => ~NO_FANOUT~ -addr[326] => ~NO_FANOUT~ -addr[327] => ~NO_FANOUT~ -addr[328] => ~NO_FANOUT~ -addr[329] => ~NO_FANOUT~ -addr[330] => ~NO_FANOUT~ -addr[331] => ~NO_FANOUT~ -addr[332] => ~NO_FANOUT~ -addr[333] => ~NO_FANOUT~ -addr[334] => ~NO_FANOUT~ -addr[335] => ~NO_FANOUT~ -addr[336] => ~NO_FANOUT~ -addr[337] => ~NO_FANOUT~ -addr[338] => ~NO_FANOUT~ -addr[339] => ~NO_FANOUT~ -addr[340] => ~NO_FANOUT~ -addr[341] => ~NO_FANOUT~ -addr[342] => ~NO_FANOUT~ -addr[343] => ~NO_FANOUT~ -addr[344] => ~NO_FANOUT~ -addr[345] => ~NO_FANOUT~ -addr[346] => ~NO_FANOUT~ -addr[347] => ~NO_FANOUT~ -addr[348] => ~NO_FANOUT~ -addr[349] => ~NO_FANOUT~ -addr[350] => ~NO_FANOUT~ -addr[351] => ~NO_FANOUT~ -addr[352] => ~NO_FANOUT~ -addr[353] => ~NO_FANOUT~ -addr[354] => ~NO_FANOUT~ -addr[355] => ~NO_FANOUT~ -addr[356] => ~NO_FANOUT~ -addr[357] => ~NO_FANOUT~ -addr[358] => ~NO_FANOUT~ -addr[359] => ~NO_FANOUT~ -addr[360] => ~NO_FANOUT~ -addr[361] => ~NO_FANOUT~ -addr[362] => ~NO_FANOUT~ -addr[363] => ~NO_FANOUT~ -addr[364] => ~NO_FANOUT~ -addr[365] => ~NO_FANOUT~ -addr[366] => ~NO_FANOUT~ -addr[367] => ~NO_FANOUT~ -addr[368] => ~NO_FANOUT~ -addr[369] => ~NO_FANOUT~ -addr[370] => ~NO_FANOUT~ -addr[371] => ~NO_FANOUT~ -addr[372] => ~NO_FANOUT~ -addr[373] => ~NO_FANOUT~ -addr[374] => ~NO_FANOUT~ -addr[375] => ~NO_FANOUT~ -addr[376] => ~NO_FANOUT~ -addr[377] => ~NO_FANOUT~ -addr[378] => ~NO_FANOUT~ -addr[379] => ~NO_FANOUT~ -addr[380] => ~NO_FANOUT~ -addr[381] => ~NO_FANOUT~ -addr[382] => ~NO_FANOUT~ -addr[383] => ~NO_FANOUT~ -addr[384] => ~NO_FANOUT~ -addr[385] => ~NO_FANOUT~ -addr[386] => ~NO_FANOUT~ -addr[387] => ~NO_FANOUT~ -addr[388] => ~NO_FANOUT~ -addr[389] => ~NO_FANOUT~ -addr[390] => ~NO_FANOUT~ -addr[391] => ~NO_FANOUT~ -addr[392] => ~NO_FANOUT~ -addr[393] => ~NO_FANOUT~ -addr[394] => ~NO_FANOUT~ -addr[395] => ~NO_FANOUT~ -addr[396] => ~NO_FANOUT~ -addr[397] => ~NO_FANOUT~ -addr[398] => ~NO_FANOUT~ -addr[399] => ~NO_FANOUT~ -addr[400] => ~NO_FANOUT~ -addr[401] => ~NO_FANOUT~ -addr[402] => ~NO_FANOUT~ -addr[403] => ~NO_FANOUT~ -addr[404] => ~NO_FANOUT~ -addr[405] => ~NO_FANOUT~ -addr[406] => ~NO_FANOUT~ -addr[407] => ~NO_FANOUT~ -addr[408] => ~NO_FANOUT~ -addr[409] => ~NO_FANOUT~ -addr[410] => ~NO_FANOUT~ -addr[411] => ~NO_FANOUT~ -addr[412] => ~NO_FANOUT~ -addr[413] => ~NO_FANOUT~ -addr[414] => ~NO_FANOUT~ -addr[415] => ~NO_FANOUT~ -addr[416] => ~NO_FANOUT~ -addr[417] => ~NO_FANOUT~ -addr[418] => ~NO_FANOUT~ -addr[419] => ~NO_FANOUT~ -addr[420] => ~NO_FANOUT~ -addr[421] => ~NO_FANOUT~ -addr[422] => ~NO_FANOUT~ -addr[423] => ~NO_FANOUT~ -addr[424] => ~NO_FANOUT~ -addr[425] => ~NO_FANOUT~ -addr[426] => ~NO_FANOUT~ -addr[427] => ~NO_FANOUT~ -addr[428] => ~NO_FANOUT~ -addr[429] => ~NO_FANOUT~ -addr[430] => ~NO_FANOUT~ -addr[431] => ~NO_FANOUT~ -addr[432] => ~NO_FANOUT~ -addr[433] => ~NO_FANOUT~ -addr[434] => ~NO_FANOUT~ -addr[435] => ~NO_FANOUT~ -addr[436] => ~NO_FANOUT~ -addr[437] => ~NO_FANOUT~ -addr[438] => ~NO_FANOUT~ -addr[439] => ~NO_FANOUT~ -addr[440] => ~NO_FANOUT~ -addr[441] => ~NO_FANOUT~ -addr[442] => ~NO_FANOUT~ -addr[443] => ~NO_FANOUT~ -addr[444] => ~NO_FANOUT~ -addr[445] => ~NO_FANOUT~ -addr[446] => ~NO_FANOUT~ -addr[447] => ~NO_FANOUT~ -addr[448] => ~NO_FANOUT~ -addr[449] => ~NO_FANOUT~ -addr[450] => ~NO_FANOUT~ -addr[451] => ~NO_FANOUT~ -addr[452] => ~NO_FANOUT~ -addr[453] => ~NO_FANOUT~ -addr[454] => ~NO_FANOUT~ -addr[455] => ~NO_FANOUT~ -addr[456] => ~NO_FANOUT~ -addr[457] => ~NO_FANOUT~ -addr[458] => ~NO_FANOUT~ -addr[459] => ~NO_FANOUT~ -addr[460] => ~NO_FANOUT~ -addr[461] => ~NO_FANOUT~ -addr[462] => ~NO_FANOUT~ -addr[463] => ~NO_FANOUT~ -addr[464] => ~NO_FANOUT~ -addr[465] => ~NO_FANOUT~ -addr[466] => ~NO_FANOUT~ -addr[467] => ~NO_FANOUT~ -addr[468] => ~NO_FANOUT~ -addr[469] => ~NO_FANOUT~ -addr[470] => ~NO_FANOUT~ -addr[471] => ~NO_FANOUT~ -addr[472] => ~NO_FANOUT~ -addr[473] => ~NO_FANOUT~ -addr[474] => ~NO_FANOUT~ -addr[475] => ~NO_FANOUT~ -addr[476] => ~NO_FANOUT~ -addr[477] => ~NO_FANOUT~ -addr[478] => ~NO_FANOUT~ -addr[479] => ~NO_FANOUT~ -addr[480] => ~NO_FANOUT~ -addr[481] => ~NO_FANOUT~ -addr[482] => ~NO_FANOUT~ -addr[483] => ~NO_FANOUT~ -addr[484] => ~NO_FANOUT~ -addr[485] => ~NO_FANOUT~ -addr[486] => ~NO_FANOUT~ -addr[487] => ~NO_FANOUT~ -addr[488] => ~NO_FANOUT~ -addr[489] => ~NO_FANOUT~ -addr[490] => ~NO_FANOUT~ -addr[491] => ~NO_FANOUT~ -addr[492] => ~NO_FANOUT~ -addr[493] => ~NO_FANOUT~ -addr[494] => ~NO_FANOUT~ -addr[495] => ~NO_FANOUT~ -addr[496] => ~NO_FANOUT~ -addr[497] => ~NO_FANOUT~ -addr[498] => ~NO_FANOUT~ -addr[499] => ~NO_FANOUT~ -addr[500] => ~NO_FANOUT~ -addr[501] => ~NO_FANOUT~ -addr[502] => ~NO_FANOUT~ -addr[503] => ~NO_FANOUT~ -addr[504] => ~NO_FANOUT~ -addr[505] => ~NO_FANOUT~ -addr[506] => ~NO_FANOUT~ -addr[507] => ~NO_FANOUT~ -addr[508] => ~NO_FANOUT~ -addr[509] => ~NO_FANOUT~ -addr[510] => ~NO_FANOUT~ -addr[511] => ~NO_FANOUT~ -we[0] => mem.we_a.DATAIN -we[0] => mem.WE -data_in[0] => mem.data_a[0].DATAIN -data_in[0] => mem.DATAIN -data_in[1] => mem.data_a[-1].DATAIN -data_in[1] => mem.DATAIN1 -data_in[2] => ~NO_FANOUT~ -data_in[3] => ~NO_FANOUT~ -data_in[4] => ~NO_FANOUT~ -data_in[5] => ~NO_FANOUT~ -data_in[6] => ~NO_FANOUT~ -data_in[7] => ~NO_FANOUT~ -data_in[8] => ~NO_FANOUT~ -data_in[9] => ~NO_FANOUT~ -data_in[10] => ~NO_FANOUT~ -data_in[11] => ~NO_FANOUT~ -data_in[12] => ~NO_FANOUT~ -data_in[13] => ~NO_FANOUT~ -data_in[14] => ~NO_FANOUT~ -data_in[15] => ~NO_FANOUT~ -data_in[16] => ~NO_FANOUT~ -data_in[17] => ~NO_FANOUT~ -data_in[18] => ~NO_FANOUT~ -data_in[19] => ~NO_FANOUT~ -data_in[20] => ~NO_FANOUT~ -data_in[21] => ~NO_FANOUT~ -data_in[22] => ~NO_FANOUT~ -data_in[23] => ~NO_FANOUT~ -data_in[24] => ~NO_FANOUT~ -data_in[25] => ~NO_FANOUT~ -data_in[26] => ~NO_FANOUT~ -data_in[27] => ~NO_FANOUT~ -data_in[28] => ~NO_FANOUT~ -data_in[29] => ~NO_FANOUT~ -data_in[30] => ~NO_FANOUT~ -data_in[31] => ~NO_FANOUT~ -data_out[0] <= mem.DATAOUT -data_out[1] <= mem.DATAOUT1 -data_out[2] <= -data_out[3] <= -data_out[4] <= -data_out[5] <= -data_out[6] <= -data_out[7] <= -data_out[8] <= -data_out[9] <= -data_out[10] <= -data_out[11] <= -data_out[12] <= -data_out[13] <= -data_out[14] <= -data_out[15] <= -data_out[16] <= -data_out[17] <= -data_out[18] <= -data_out[19] <= -data_out[20] <= -data_out[21] <= -data_out[22] <= -data_out[23] <= -data_out[24] <= -data_out[25] <= -data_out[26] <= -data_out[27] <= -data_out[28] <= -data_out[29] <= -data_out[30] <= -data_out[31] <= +clk[0] => mem[255][0].CLK +clk[0] => mem[255][1].CLK +clk[0] => mem[255][2].CLK +clk[0] => mem[255][3].CLK +clk[0] => mem[255][4].CLK +clk[0] => mem[254][0].CLK +clk[0] => mem[254][1].CLK +clk[0] => mem[254][2].CLK +clk[0] => mem[254][3].CLK +clk[0] => mem[254][4].CLK +clk[0] => mem[253][0].CLK +clk[0] => mem[253][1].CLK +clk[0] => mem[253][2].CLK +clk[0] => mem[253][3].CLK +clk[0] => mem[253][4].CLK +clk[0] => mem[252][0].CLK +clk[0] => mem[252][1].CLK +clk[0] => mem[252][2].CLK +clk[0] => mem[252][3].CLK +clk[0] => mem[252][4].CLK +clk[0] => mem[251][0].CLK +clk[0] => mem[251][1].CLK +clk[0] => mem[251][2].CLK +clk[0] => mem[251][3].CLK +clk[0] => mem[251][4].CLK +clk[0] => mem[250][0].CLK +clk[0] => mem[250][1].CLK +clk[0] => mem[250][2].CLK +clk[0] => mem[250][3].CLK +clk[0] => mem[250][4].CLK +clk[0] => mem[249][0].CLK +clk[0] => mem[249][1].CLK +clk[0] => mem[249][2].CLK +clk[0] => mem[249][3].CLK +clk[0] => mem[249][4].CLK +clk[0] => mem[248][0].CLK +clk[0] => mem[248][1].CLK +clk[0] => mem[248][2].CLK +clk[0] => mem[248][3].CLK +clk[0] => mem[248][4].CLK +clk[0] => mem[247][0].CLK +clk[0] => mem[247][1].CLK +clk[0] => mem[247][2].CLK +clk[0] => mem[247][3].CLK +clk[0] => mem[247][4].CLK +clk[0] => mem[246][0].CLK +clk[0] => mem[246][1].CLK +clk[0] => mem[246][2].CLK +clk[0] => mem[246][3].CLK +clk[0] => mem[246][4].CLK +clk[0] => mem[245][0].CLK +clk[0] => mem[245][1].CLK +clk[0] => mem[245][2].CLK +clk[0] => mem[245][3].CLK +clk[0] => mem[245][4].CLK +clk[0] => mem[244][0].CLK +clk[0] => mem[244][1].CLK +clk[0] => mem[244][2].CLK +clk[0] => mem[244][3].CLK +clk[0] => mem[244][4].CLK +clk[0] => mem[243][0].CLK +clk[0] => mem[243][1].CLK +clk[0] => mem[243][2].CLK +clk[0] => mem[243][3].CLK +clk[0] => mem[243][4].CLK +clk[0] => mem[242][0].CLK +clk[0] => mem[242][1].CLK +clk[0] => mem[242][2].CLK +clk[0] => mem[242][3].CLK +clk[0] => mem[242][4].CLK +clk[0] => mem[241][0].CLK +clk[0] => mem[241][1].CLK +clk[0] => mem[241][2].CLK +clk[0] => mem[241][3].CLK +clk[0] => mem[241][4].CLK +clk[0] => mem[240][0].CLK +clk[0] => mem[240][1].CLK +clk[0] => mem[240][2].CLK +clk[0] => mem[240][3].CLK +clk[0] => mem[240][4].CLK +clk[0] => mem[239][0].CLK +clk[0] => mem[239][1].CLK +clk[0] => mem[239][2].CLK +clk[0] => mem[239][3].CLK +clk[0] => mem[239][4].CLK +clk[0] => mem[238][0].CLK +clk[0] => mem[238][1].CLK +clk[0] => mem[238][2].CLK +clk[0] => mem[238][3].CLK +clk[0] => mem[238][4].CLK +clk[0] => mem[237][0].CLK +clk[0] => mem[237][1].CLK +clk[0] => mem[237][2].CLK +clk[0] => mem[237][3].CLK +clk[0] => mem[237][4].CLK +clk[0] => mem[236][0].CLK +clk[0] => mem[236][1].CLK +clk[0] => mem[236][2].CLK +clk[0] => mem[236][3].CLK +clk[0] => mem[236][4].CLK +clk[0] => mem[235][0].CLK +clk[0] => mem[235][1].CLK +clk[0] => mem[235][2].CLK +clk[0] => mem[235][3].CLK +clk[0] => mem[235][4].CLK +clk[0] => mem[234][0].CLK +clk[0] => mem[234][1].CLK +clk[0] => mem[234][2].CLK +clk[0] => mem[234][3].CLK +clk[0] => mem[234][4].CLK +clk[0] => mem[233][0].CLK +clk[0] => mem[233][1].CLK +clk[0] => mem[233][2].CLK +clk[0] => mem[233][3].CLK +clk[0] => mem[233][4].CLK +clk[0] => mem[232][0].CLK +clk[0] => mem[232][1].CLK +clk[0] => mem[232][2].CLK +clk[0] => mem[232][3].CLK +clk[0] => mem[232][4].CLK +clk[0] => mem[231][0].CLK +clk[0] => mem[231][1].CLK +clk[0] => mem[231][2].CLK +clk[0] => mem[231][3].CLK +clk[0] => mem[231][4].CLK +clk[0] => mem[230][0].CLK +clk[0] => mem[230][1].CLK +clk[0] => mem[230][2].CLK +clk[0] => mem[230][3].CLK +clk[0] => mem[230][4].CLK +clk[0] => mem[229][0].CLK +clk[0] => mem[229][1].CLK +clk[0] => mem[229][2].CLK +clk[0] => mem[229][3].CLK +clk[0] => mem[229][4].CLK +clk[0] => mem[228][0].CLK +clk[0] => mem[228][1].CLK +clk[0] => mem[228][2].CLK +clk[0] => mem[228][3].CLK +clk[0] => mem[228][4].CLK +clk[0] => mem[227][0].CLK +clk[0] => mem[227][1].CLK +clk[0] => mem[227][2].CLK +clk[0] => mem[227][3].CLK +clk[0] => mem[227][4].CLK +clk[0] => mem[226][0].CLK +clk[0] => mem[226][1].CLK +clk[0] => mem[226][2].CLK +clk[0] => mem[226][3].CLK +clk[0] => mem[226][4].CLK +clk[0] => mem[225][0].CLK +clk[0] => mem[225][1].CLK +clk[0] => mem[225][2].CLK +clk[0] => mem[225][3].CLK +clk[0] => mem[225][4].CLK +clk[0] => mem[224][0].CLK +clk[0] => mem[224][1].CLK +clk[0] => mem[224][2].CLK +clk[0] => mem[224][3].CLK +clk[0] => mem[224][4].CLK +clk[0] => mem[223][0].CLK +clk[0] => mem[223][1].CLK +clk[0] => mem[223][2].CLK +clk[0] => mem[223][3].CLK +clk[0] => mem[223][4].CLK +clk[0] => mem[222][0].CLK +clk[0] => mem[222][1].CLK +clk[0] => mem[222][2].CLK +clk[0] => mem[222][3].CLK +clk[0] => mem[222][4].CLK +clk[0] => mem[221][0].CLK +clk[0] => mem[221][1].CLK +clk[0] => mem[221][2].CLK +clk[0] => mem[221][3].CLK +clk[0] => mem[221][4].CLK +clk[0] => mem[220][0].CLK +clk[0] => mem[220][1].CLK +clk[0] => mem[220][2].CLK +clk[0] => mem[220][3].CLK +clk[0] => mem[220][4].CLK +clk[0] => mem[219][0].CLK +clk[0] => mem[219][1].CLK +clk[0] => mem[219][2].CLK +clk[0] => mem[219][3].CLK +clk[0] => mem[219][4].CLK +clk[0] => mem[218][0].CLK +clk[0] => mem[218][1].CLK +clk[0] => mem[218][2].CLK +clk[0] => mem[218][3].CLK +clk[0] => mem[218][4].CLK +clk[0] => mem[217][0].CLK +clk[0] => mem[217][1].CLK +clk[0] => mem[217][2].CLK +clk[0] => mem[217][3].CLK +clk[0] => mem[217][4].CLK +clk[0] => mem[216][0].CLK +clk[0] => mem[216][1].CLK +clk[0] => mem[216][2].CLK +clk[0] => mem[216][3].CLK +clk[0] => mem[216][4].CLK +clk[0] => mem[215][0].CLK +clk[0] => mem[215][1].CLK +clk[0] => mem[215][2].CLK +clk[0] => mem[215][3].CLK +clk[0] => mem[215][4].CLK +clk[0] => mem[214][0].CLK +clk[0] => mem[214][1].CLK +clk[0] => mem[214][2].CLK +clk[0] => mem[214][3].CLK +clk[0] => mem[214][4].CLK +clk[0] => mem[213][0].CLK +clk[0] => mem[213][1].CLK +clk[0] => mem[213][2].CLK +clk[0] => mem[213][3].CLK +clk[0] => mem[213][4].CLK +clk[0] => mem[212][0].CLK +clk[0] => mem[212][1].CLK +clk[0] => mem[212][2].CLK +clk[0] => mem[212][3].CLK +clk[0] => mem[212][4].CLK +clk[0] => mem[211][0].CLK +clk[0] => mem[211][1].CLK +clk[0] => mem[211][2].CLK +clk[0] => mem[211][3].CLK +clk[0] => mem[211][4].CLK +clk[0] => mem[210][0].CLK +clk[0] => mem[210][1].CLK +clk[0] => mem[210][2].CLK +clk[0] => mem[210][3].CLK +clk[0] => mem[210][4].CLK +clk[0] => mem[209][0].CLK +clk[0] => mem[209][1].CLK +clk[0] => mem[209][2].CLK +clk[0] => mem[209][3].CLK +clk[0] => mem[209][4].CLK +clk[0] => mem[208][0].CLK +clk[0] => mem[208][1].CLK +clk[0] => mem[208][2].CLK +clk[0] => mem[208][3].CLK +clk[0] => mem[208][4].CLK +clk[0] => mem[207][0].CLK +clk[0] => mem[207][1].CLK +clk[0] => mem[207][2].CLK +clk[0] => mem[207][3].CLK +clk[0] => mem[207][4].CLK +clk[0] => mem[206][0].CLK +clk[0] => mem[206][1].CLK +clk[0] => mem[206][2].CLK +clk[0] => mem[206][3].CLK +clk[0] => mem[206][4].CLK +clk[0] => mem[205][0].CLK +clk[0] => mem[205][1].CLK +clk[0] => mem[205][2].CLK +clk[0] => mem[205][3].CLK +clk[0] => mem[205][4].CLK +clk[0] => mem[204][0].CLK +clk[0] => mem[204][1].CLK +clk[0] => mem[204][2].CLK +clk[0] => mem[204][3].CLK +clk[0] => mem[204][4].CLK +clk[0] => mem[203][0].CLK +clk[0] => mem[203][1].CLK +clk[0] => mem[203][2].CLK +clk[0] => mem[203][3].CLK +clk[0] => mem[203][4].CLK +clk[0] => mem[202][0].CLK +clk[0] => mem[202][1].CLK +clk[0] => mem[202][2].CLK +clk[0] => mem[202][3].CLK +clk[0] => mem[202][4].CLK +clk[0] => mem[201][0].CLK +clk[0] => mem[201][1].CLK +clk[0] => mem[201][2].CLK +clk[0] => mem[201][3].CLK +clk[0] => mem[201][4].CLK +clk[0] => mem[200][0].CLK +clk[0] => mem[200][1].CLK +clk[0] => mem[200][2].CLK +clk[0] => mem[200][3].CLK +clk[0] => mem[200][4].CLK +clk[0] => mem[199][0].CLK +clk[0] => mem[199][1].CLK +clk[0] => mem[199][2].CLK +clk[0] => mem[199][3].CLK +clk[0] => mem[199][4].CLK +clk[0] => mem[198][0].CLK +clk[0] => mem[198][1].CLK +clk[0] => mem[198][2].CLK +clk[0] => mem[198][3].CLK +clk[0] => mem[198][4].CLK +clk[0] => mem[197][0].CLK +clk[0] => mem[197][1].CLK +clk[0] => mem[197][2].CLK +clk[0] => mem[197][3].CLK +clk[0] => mem[197][4].CLK +clk[0] => mem[196][0].CLK +clk[0] => mem[196][1].CLK +clk[0] => mem[196][2].CLK +clk[0] => mem[196][3].CLK +clk[0] => mem[196][4].CLK +clk[0] => mem[195][0].CLK +clk[0] => mem[195][1].CLK +clk[0] => mem[195][2].CLK +clk[0] => mem[195][3].CLK +clk[0] => mem[195][4].CLK +clk[0] => mem[194][0].CLK +clk[0] => mem[194][1].CLK +clk[0] => mem[194][2].CLK +clk[0] => mem[194][3].CLK +clk[0] => mem[194][4].CLK +clk[0] => mem[193][0].CLK +clk[0] => mem[193][1].CLK +clk[0] => mem[193][2].CLK +clk[0] => mem[193][3].CLK +clk[0] => mem[193][4].CLK +clk[0] => mem[192][0].CLK +clk[0] => mem[192][1].CLK +clk[0] => mem[192][2].CLK +clk[0] => mem[192][3].CLK +clk[0] => mem[192][4].CLK +clk[0] => mem[191][0].CLK +clk[0] => mem[191][1].CLK +clk[0] => mem[191][2].CLK +clk[0] => mem[191][3].CLK +clk[0] => mem[191][4].CLK +clk[0] => mem[190][0].CLK +clk[0] => mem[190][1].CLK +clk[0] => mem[190][2].CLK +clk[0] => mem[190][3].CLK +clk[0] => mem[190][4].CLK +clk[0] => mem[189][0].CLK +clk[0] => mem[189][1].CLK +clk[0] => mem[189][2].CLK +clk[0] => mem[189][3].CLK +clk[0] => mem[189][4].CLK +clk[0] => mem[188][0].CLK +clk[0] => mem[188][1].CLK +clk[0] => mem[188][2].CLK +clk[0] => mem[188][3].CLK +clk[0] => mem[188][4].CLK +clk[0] => mem[187][0].CLK +clk[0] => mem[187][1].CLK +clk[0] => mem[187][2].CLK +clk[0] => mem[187][3].CLK +clk[0] => mem[187][4].CLK +clk[0] => mem[186][0].CLK +clk[0] => mem[186][1].CLK +clk[0] => mem[186][2].CLK +clk[0] => mem[186][3].CLK +clk[0] => mem[186][4].CLK +clk[0] => mem[185][0].CLK +clk[0] => mem[185][1].CLK +clk[0] => mem[185][2].CLK +clk[0] => mem[185][3].CLK +clk[0] => mem[185][4].CLK +clk[0] => mem[184][0].CLK +clk[0] => mem[184][1].CLK +clk[0] => mem[184][2].CLK +clk[0] => mem[184][3].CLK +clk[0] => mem[184][4].CLK +clk[0] => mem[183][0].CLK +clk[0] => mem[183][1].CLK +clk[0] => mem[183][2].CLK +clk[0] => mem[183][3].CLK +clk[0] => mem[183][4].CLK +clk[0] => mem[182][0].CLK +clk[0] => mem[182][1].CLK +clk[0] => mem[182][2].CLK +clk[0] => mem[182][3].CLK +clk[0] => mem[182][4].CLK +clk[0] => mem[181][0].CLK +clk[0] => mem[181][1].CLK +clk[0] => mem[181][2].CLK +clk[0] => mem[181][3].CLK +clk[0] => mem[181][4].CLK +clk[0] => mem[180][0].CLK +clk[0] => mem[180][1].CLK +clk[0] => mem[180][2].CLK +clk[0] => mem[180][3].CLK +clk[0] => mem[180][4].CLK +clk[0] => mem[179][0].CLK +clk[0] => mem[179][1].CLK +clk[0] => mem[179][2].CLK +clk[0] => mem[179][3].CLK +clk[0] => mem[179][4].CLK +clk[0] => mem[178][0].CLK +clk[0] => mem[178][1].CLK +clk[0] => mem[178][2].CLK +clk[0] => mem[178][3].CLK +clk[0] => mem[178][4].CLK +clk[0] => mem[177][0].CLK +clk[0] => mem[177][1].CLK +clk[0] => mem[177][2].CLK +clk[0] => mem[177][3].CLK +clk[0] => mem[177][4].CLK +clk[0] => mem[176][0].CLK +clk[0] => mem[176][1].CLK +clk[0] => mem[176][2].CLK +clk[0] => mem[176][3].CLK +clk[0] => mem[176][4].CLK +clk[0] => mem[175][0].CLK +clk[0] => mem[175][1].CLK +clk[0] => mem[175][2].CLK +clk[0] => mem[175][3].CLK +clk[0] => mem[175][4].CLK +clk[0] => mem[174][0].CLK +clk[0] => mem[174][1].CLK +clk[0] => mem[174][2].CLK +clk[0] => mem[174][3].CLK +clk[0] => mem[174][4].CLK +clk[0] => mem[173][0].CLK +clk[0] => mem[173][1].CLK +clk[0] => mem[173][2].CLK +clk[0] => mem[173][3].CLK +clk[0] => mem[173][4].CLK +clk[0] => mem[172][0].CLK +clk[0] => mem[172][1].CLK +clk[0] => mem[172][2].CLK +clk[0] => mem[172][3].CLK +clk[0] => mem[172][4].CLK +clk[0] => mem[171][0].CLK +clk[0] => mem[171][1].CLK +clk[0] => mem[171][2].CLK +clk[0] => mem[171][3].CLK +clk[0] => mem[171][4].CLK +clk[0] => mem[170][0].CLK +clk[0] => mem[170][1].CLK +clk[0] => mem[170][2].CLK +clk[0] => mem[170][3].CLK +clk[0] => mem[170][4].CLK +clk[0] => mem[169][0].CLK +clk[0] => mem[169][1].CLK +clk[0] => mem[169][2].CLK +clk[0] => mem[169][3].CLK +clk[0] => mem[169][4].CLK +clk[0] => mem[168][0].CLK +clk[0] => mem[168][1].CLK +clk[0] => mem[168][2].CLK +clk[0] => mem[168][3].CLK +clk[0] => mem[168][4].CLK +clk[0] => mem[167][0].CLK +clk[0] => mem[167][1].CLK +clk[0] => mem[167][2].CLK +clk[0] => mem[167][3].CLK +clk[0] => mem[167][4].CLK +clk[0] => mem[166][0].CLK +clk[0] => mem[166][1].CLK +clk[0] => mem[166][2].CLK +clk[0] => mem[166][3].CLK +clk[0] => mem[166][4].CLK +clk[0] => mem[165][0].CLK +clk[0] => mem[165][1].CLK +clk[0] => mem[165][2].CLK +clk[0] => mem[165][3].CLK +clk[0] => mem[165][4].CLK +clk[0] => mem[164][0].CLK +clk[0] => mem[164][1].CLK +clk[0] => mem[164][2].CLK +clk[0] => mem[164][3].CLK +clk[0] => mem[164][4].CLK +clk[0] => mem[163][0].CLK +clk[0] => mem[163][1].CLK +clk[0] => mem[163][2].CLK +clk[0] => mem[163][3].CLK +clk[0] => mem[163][4].CLK +clk[0] => mem[162][0].CLK +clk[0] => mem[162][1].CLK +clk[0] => mem[162][2].CLK +clk[0] => mem[162][3].CLK +clk[0] => mem[162][4].CLK +clk[0] => mem[161][0].CLK +clk[0] => mem[161][1].CLK +clk[0] => mem[161][2].CLK +clk[0] => mem[161][3].CLK +clk[0] => mem[161][4].CLK +clk[0] => mem[160][0].CLK +clk[0] => mem[160][1].CLK +clk[0] => mem[160][2].CLK +clk[0] => mem[160][3].CLK +clk[0] => mem[160][4].CLK +clk[0] => mem[159][0].CLK +clk[0] => mem[159][1].CLK +clk[0] => mem[159][2].CLK +clk[0] => mem[159][3].CLK +clk[0] => mem[159][4].CLK +clk[0] => mem[158][0].CLK +clk[0] => mem[158][1].CLK +clk[0] => mem[158][2].CLK +clk[0] => mem[158][3].CLK +clk[0] => mem[158][4].CLK +clk[0] => mem[157][0].CLK +clk[0] => mem[157][1].CLK +clk[0] => mem[157][2].CLK +clk[0] => mem[157][3].CLK +clk[0] => mem[157][4].CLK +clk[0] => mem[156][0].CLK +clk[0] => mem[156][1].CLK +clk[0] => mem[156][2].CLK +clk[0] => mem[156][3].CLK +clk[0] => mem[156][4].CLK +clk[0] => mem[155][0].CLK +clk[0] => mem[155][1].CLK +clk[0] => mem[155][2].CLK +clk[0] => mem[155][3].CLK +clk[0] => mem[155][4].CLK +clk[0] => mem[154][0].CLK +clk[0] => mem[154][1].CLK +clk[0] => mem[154][2].CLK +clk[0] => mem[154][3].CLK +clk[0] => mem[154][4].CLK +clk[0] => mem[153][0].CLK +clk[0] => mem[153][1].CLK +clk[0] => mem[153][2].CLK +clk[0] => mem[153][3].CLK +clk[0] => mem[153][4].CLK +clk[0] => mem[152][0].CLK +clk[0] => mem[152][1].CLK +clk[0] => mem[152][2].CLK +clk[0] => mem[152][3].CLK +clk[0] => mem[152][4].CLK +clk[0] => mem[151][0].CLK +clk[0] => mem[151][1].CLK +clk[0] => mem[151][2].CLK +clk[0] => mem[151][3].CLK +clk[0] => mem[151][4].CLK +clk[0] => mem[150][0].CLK +clk[0] => mem[150][1].CLK +clk[0] => mem[150][2].CLK +clk[0] => mem[150][3].CLK +clk[0] => mem[150][4].CLK +clk[0] => mem[149][0].CLK +clk[0] => mem[149][1].CLK +clk[0] => mem[149][2].CLK +clk[0] => mem[149][3].CLK +clk[0] => mem[149][4].CLK +clk[0] => mem[148][0].CLK +clk[0] => mem[148][1].CLK +clk[0] => mem[148][2].CLK +clk[0] => mem[148][3].CLK +clk[0] => mem[148][4].CLK +clk[0] => mem[147][0].CLK +clk[0] => mem[147][1].CLK +clk[0] => mem[147][2].CLK +clk[0] => mem[147][3].CLK +clk[0] => mem[147][4].CLK +clk[0] => mem[146][0].CLK +clk[0] => mem[146][1].CLK +clk[0] => mem[146][2].CLK +clk[0] => mem[146][3].CLK +clk[0] => mem[146][4].CLK +clk[0] => mem[145][0].CLK +clk[0] => mem[145][1].CLK +clk[0] => mem[145][2].CLK +clk[0] => mem[145][3].CLK +clk[0] => mem[145][4].CLK +clk[0] => mem[144][0].CLK +clk[0] => mem[144][1].CLK +clk[0] => mem[144][2].CLK +clk[0] => mem[144][3].CLK +clk[0] => mem[144][4].CLK +clk[0] => mem[143][0].CLK +clk[0] => mem[143][1].CLK +clk[0] => mem[143][2].CLK +clk[0] => mem[143][3].CLK +clk[0] => mem[143][4].CLK +clk[0] => mem[142][0].CLK +clk[0] => mem[142][1].CLK +clk[0] => mem[142][2].CLK +clk[0] => mem[142][3].CLK +clk[0] => mem[142][4].CLK +clk[0] => mem[141][0].CLK +clk[0] => mem[141][1].CLK +clk[0] => mem[141][2].CLK +clk[0] => mem[141][3].CLK +clk[0] => mem[141][4].CLK +clk[0] => mem[140][0].CLK +clk[0] => mem[140][1].CLK +clk[0] => mem[140][2].CLK +clk[0] => mem[140][3].CLK +clk[0] => mem[140][4].CLK +clk[0] => mem[139][0].CLK +clk[0] => mem[139][1].CLK +clk[0] => mem[139][2].CLK +clk[0] => mem[139][3].CLK +clk[0] => mem[139][4].CLK +clk[0] => mem[138][0].CLK +clk[0] => mem[138][1].CLK +clk[0] => mem[138][2].CLK +clk[0] => mem[138][3].CLK +clk[0] => mem[138][4].CLK +clk[0] => mem[137][0].CLK +clk[0] => mem[137][1].CLK +clk[0] => mem[137][2].CLK +clk[0] => mem[137][3].CLK +clk[0] => mem[137][4].CLK +clk[0] => mem[136][0].CLK +clk[0] => mem[136][1].CLK +clk[0] => mem[136][2].CLK +clk[0] => mem[136][3].CLK +clk[0] => mem[136][4].CLK +clk[0] => mem[135][0].CLK +clk[0] => mem[135][1].CLK +clk[0] => mem[135][2].CLK +clk[0] => mem[135][3].CLK +clk[0] => mem[135][4].CLK +clk[0] => mem[134][0].CLK +clk[0] => mem[134][1].CLK +clk[0] => mem[134][2].CLK +clk[0] => mem[134][3].CLK +clk[0] => mem[134][4].CLK +clk[0] => mem[133][0].CLK +clk[0] => mem[133][1].CLK +clk[0] => mem[133][2].CLK +clk[0] => mem[133][3].CLK +clk[0] => mem[133][4].CLK +clk[0] => mem[132][0].CLK +clk[0] => mem[132][1].CLK +clk[0] => mem[132][2].CLK +clk[0] => mem[132][3].CLK +clk[0] => mem[132][4].CLK +clk[0] => mem[131][0].CLK +clk[0] => mem[131][1].CLK +clk[0] => mem[131][2].CLK +clk[0] => mem[131][3].CLK +clk[0] => mem[131][4].CLK +clk[0] => mem[130][0].CLK +clk[0] => mem[130][1].CLK +clk[0] => mem[130][2].CLK +clk[0] => mem[130][3].CLK +clk[0] => mem[130][4].CLK +clk[0] => mem[129][0].CLK +clk[0] => mem[129][1].CLK +clk[0] => mem[129][2].CLK +clk[0] => mem[129][3].CLK +clk[0] => mem[129][4].CLK +clk[0] => mem[128][0].CLK +clk[0] => mem[128][1].CLK +clk[0] => mem[128][2].CLK +clk[0] => mem[128][3].CLK +clk[0] => mem[128][4].CLK +clk[0] => mem[127][0].CLK +clk[0] => mem[127][1].CLK +clk[0] => mem[127][2].CLK +clk[0] => mem[127][3].CLK +clk[0] => mem[127][4].CLK +clk[0] => mem[126][0].CLK +clk[0] => mem[126][1].CLK +clk[0] => mem[126][2].CLK +clk[0] => mem[126][3].CLK +clk[0] => mem[126][4].CLK +clk[0] => mem[125][0].CLK +clk[0] => mem[125][1].CLK +clk[0] => mem[125][2].CLK +clk[0] => mem[125][3].CLK +clk[0] => mem[125][4].CLK +clk[0] => mem[124][0].CLK +clk[0] => mem[124][1].CLK +clk[0] => mem[124][2].CLK +clk[0] => mem[124][3].CLK +clk[0] => mem[124][4].CLK +clk[0] => mem[123][0].CLK +clk[0] => mem[123][1].CLK +clk[0] => mem[123][2].CLK +clk[0] => mem[123][3].CLK +clk[0] => mem[123][4].CLK +clk[0] => mem[122][0].CLK +clk[0] => mem[122][1].CLK +clk[0] => mem[122][2].CLK +clk[0] => mem[122][3].CLK +clk[0] => mem[122][4].CLK +clk[0] => mem[121][0].CLK +clk[0] => mem[121][1].CLK +clk[0] => mem[121][2].CLK +clk[0] => mem[121][3].CLK +clk[0] => mem[121][4].CLK +clk[0] => mem[120][0].CLK +clk[0] => mem[120][1].CLK +clk[0] => mem[120][2].CLK +clk[0] => mem[120][3].CLK +clk[0] => mem[120][4].CLK +clk[0] => mem[119][0].CLK +clk[0] => mem[119][1].CLK +clk[0] => mem[119][2].CLK +clk[0] => mem[119][3].CLK +clk[0] => mem[119][4].CLK +clk[0] => mem[118][0].CLK +clk[0] => mem[118][1].CLK +clk[0] => mem[118][2].CLK +clk[0] => mem[118][3].CLK +clk[0] => mem[118][4].CLK +clk[0] => mem[117][0].CLK +clk[0] => mem[117][1].CLK +clk[0] => mem[117][2].CLK +clk[0] => mem[117][3].CLK +clk[0] => mem[117][4].CLK +clk[0] => mem[116][0].CLK +clk[0] => mem[116][1].CLK +clk[0] => mem[116][2].CLK +clk[0] => mem[116][3].CLK +clk[0] => mem[116][4].CLK +clk[0] => mem[115][0].CLK +clk[0] => mem[115][1].CLK +clk[0] => mem[115][2].CLK +clk[0] => mem[115][3].CLK +clk[0] => mem[115][4].CLK +clk[0] => mem[114][0].CLK +clk[0] => mem[114][1].CLK +clk[0] => mem[114][2].CLK +clk[0] => mem[114][3].CLK +clk[0] => mem[114][4].CLK +clk[0] => mem[113][0].CLK +clk[0] => mem[113][1].CLK +clk[0] => mem[113][2].CLK +clk[0] => mem[113][3].CLK +clk[0] => mem[113][4].CLK +clk[0] => mem[112][0].CLK +clk[0] => mem[112][1].CLK +clk[0] => mem[112][2].CLK +clk[0] => mem[112][3].CLK +clk[0] => mem[112][4].CLK +clk[0] => mem[111][0].CLK +clk[0] => mem[111][1].CLK +clk[0] => mem[111][2].CLK +clk[0] => mem[111][3].CLK +clk[0] => mem[111][4].CLK +clk[0] => mem[110][0].CLK +clk[0] => mem[110][1].CLK +clk[0] => mem[110][2].CLK +clk[0] => mem[110][3].CLK +clk[0] => mem[110][4].CLK +clk[0] => mem[109][0].CLK +clk[0] => mem[109][1].CLK +clk[0] => mem[109][2].CLK +clk[0] => mem[109][3].CLK +clk[0] => mem[109][4].CLK +clk[0] => mem[108][0].CLK +clk[0] => mem[108][1].CLK +clk[0] => mem[108][2].CLK +clk[0] => mem[108][3].CLK +clk[0] => mem[108][4].CLK +clk[0] => mem[107][0].CLK +clk[0] => mem[107][1].CLK +clk[0] => mem[107][2].CLK +clk[0] => mem[107][3].CLK +clk[0] => mem[107][4].CLK +clk[0] => mem[106][0].CLK +clk[0] => mem[106][1].CLK +clk[0] => mem[106][2].CLK +clk[0] => mem[106][3].CLK +clk[0] => mem[106][4].CLK +clk[0] => mem[105][0].CLK +clk[0] => mem[105][1].CLK +clk[0] => mem[105][2].CLK +clk[0] => mem[105][3].CLK +clk[0] => mem[105][4].CLK +clk[0] => mem[104][0].CLK +clk[0] => mem[104][1].CLK +clk[0] => mem[104][2].CLK +clk[0] => mem[104][3].CLK +clk[0] => mem[104][4].CLK +clk[0] => mem[103][0].CLK +clk[0] => mem[103][1].CLK +clk[0] => mem[103][2].CLK +clk[0] => mem[103][3].CLK +clk[0] => mem[103][4].CLK +clk[0] => mem[102][0].CLK +clk[0] => mem[102][1].CLK +clk[0] => mem[102][2].CLK +clk[0] => mem[102][3].CLK +clk[0] => mem[102][4].CLK +clk[0] => mem[101][0].CLK +clk[0] => mem[101][1].CLK +clk[0] => mem[101][2].CLK +clk[0] => mem[101][3].CLK +clk[0] => mem[101][4].CLK +clk[0] => mem[100][0].CLK +clk[0] => mem[100][1].CLK +clk[0] => mem[100][2].CLK +clk[0] => mem[100][3].CLK +clk[0] => mem[100][4].CLK +clk[0] => mem[99][0].CLK +clk[0] => mem[99][1].CLK +clk[0] => mem[99][2].CLK +clk[0] => mem[99][3].CLK +clk[0] => mem[99][4].CLK +clk[0] => mem[98][0].CLK +clk[0] => mem[98][1].CLK +clk[0] => mem[98][2].CLK +clk[0] => mem[98][3].CLK +clk[0] => mem[98][4].CLK +clk[0] => mem[97][0].CLK +clk[0] => mem[97][1].CLK +clk[0] => mem[97][2].CLK +clk[0] => mem[97][3].CLK +clk[0] => mem[97][4].CLK +clk[0] => mem[96][0].CLK +clk[0] => mem[96][1].CLK +clk[0] => mem[96][2].CLK +clk[0] => mem[96][3].CLK +clk[0] => mem[96][4].CLK +clk[0] => mem[95][0].CLK +clk[0] => mem[95][1].CLK +clk[0] => mem[95][2].CLK +clk[0] => mem[95][3].CLK +clk[0] => mem[95][4].CLK +clk[0] => mem[94][0].CLK +clk[0] => mem[94][1].CLK +clk[0] => mem[94][2].CLK +clk[0] => mem[94][3].CLK +clk[0] => mem[94][4].CLK +clk[0] => mem[93][0].CLK +clk[0] => mem[93][1].CLK +clk[0] => mem[93][2].CLK +clk[0] => mem[93][3].CLK +clk[0] => mem[93][4].CLK +clk[0] => mem[92][0].CLK +clk[0] => mem[92][1].CLK +clk[0] => mem[92][2].CLK +clk[0] => mem[92][3].CLK +clk[0] => mem[92][4].CLK +clk[0] => mem[91][0].CLK +clk[0] => mem[91][1].CLK +clk[0] => mem[91][2].CLK +clk[0] => mem[91][3].CLK +clk[0] => mem[91][4].CLK +clk[0] => mem[90][0].CLK +clk[0] => mem[90][1].CLK +clk[0] => mem[90][2].CLK +clk[0] => mem[90][3].CLK +clk[0] => mem[90][4].CLK +clk[0] => mem[89][0].CLK +clk[0] => mem[89][1].CLK +clk[0] => mem[89][2].CLK +clk[0] => mem[89][3].CLK +clk[0] => mem[89][4].CLK +clk[0] => mem[88][0].CLK +clk[0] => mem[88][1].CLK +clk[0] => mem[88][2].CLK +clk[0] => mem[88][3].CLK +clk[0] => mem[88][4].CLK +clk[0] => mem[87][0].CLK +clk[0] => mem[87][1].CLK +clk[0] => mem[87][2].CLK +clk[0] => mem[87][3].CLK +clk[0] => mem[87][4].CLK +clk[0] => mem[86][0].CLK +clk[0] => mem[86][1].CLK +clk[0] => mem[86][2].CLK +clk[0] => mem[86][3].CLK +clk[0] => mem[86][4].CLK +clk[0] => mem[85][0].CLK +clk[0] => mem[85][1].CLK +clk[0] => mem[85][2].CLK +clk[0] => mem[85][3].CLK +clk[0] => mem[85][4].CLK +clk[0] => mem[84][0].CLK +clk[0] => mem[84][1].CLK +clk[0] => mem[84][2].CLK +clk[0] => mem[84][3].CLK +clk[0] => mem[84][4].CLK +clk[0] => mem[83][0].CLK +clk[0] => mem[83][1].CLK +clk[0] => mem[83][2].CLK +clk[0] => mem[83][3].CLK +clk[0] => mem[83][4].CLK +clk[0] => mem[82][0].CLK +clk[0] => mem[82][1].CLK +clk[0] => mem[82][2].CLK +clk[0] => mem[82][3].CLK +clk[0] => mem[82][4].CLK +clk[0] => mem[81][0].CLK +clk[0] => mem[81][1].CLK +clk[0] => mem[81][2].CLK +clk[0] => mem[81][3].CLK +clk[0] => mem[81][4].CLK +clk[0] => mem[80][0].CLK +clk[0] => mem[80][1].CLK +clk[0] => mem[80][2].CLK +clk[0] => mem[80][3].CLK +clk[0] => mem[80][4].CLK +clk[0] => mem[79][0].CLK +clk[0] => mem[79][1].CLK +clk[0] => mem[79][2].CLK +clk[0] => mem[79][3].CLK +clk[0] => mem[79][4].CLK +clk[0] => mem[78][0].CLK +clk[0] => mem[78][1].CLK +clk[0] => mem[78][2].CLK +clk[0] => mem[78][3].CLK +clk[0] => mem[78][4].CLK +clk[0] => mem[77][0].CLK +clk[0] => mem[77][1].CLK +clk[0] => mem[77][2].CLK +clk[0] => mem[77][3].CLK +clk[0] => mem[77][4].CLK +clk[0] => mem[76][0].CLK +clk[0] => mem[76][1].CLK +clk[0] => mem[76][2].CLK +clk[0] => mem[76][3].CLK +clk[0] => mem[76][4].CLK +clk[0] => mem[75][0].CLK +clk[0] => mem[75][1].CLK +clk[0] => mem[75][2].CLK +clk[0] => mem[75][3].CLK +clk[0] => mem[75][4].CLK +clk[0] => mem[74][0].CLK +clk[0] => mem[74][1].CLK +clk[0] => mem[74][2].CLK +clk[0] => mem[74][3].CLK +clk[0] => mem[74][4].CLK +clk[0] => mem[73][0].CLK +clk[0] => mem[73][1].CLK +clk[0] => mem[73][2].CLK +clk[0] => mem[73][3].CLK +clk[0] => mem[73][4].CLK +clk[0] => mem[72][0].CLK +clk[0] => mem[72][1].CLK +clk[0] => mem[72][2].CLK +clk[0] => mem[72][3].CLK +clk[0] => mem[72][4].CLK +clk[0] => mem[71][0].CLK +clk[0] => mem[71][1].CLK +clk[0] => mem[71][2].CLK +clk[0] => mem[71][3].CLK +clk[0] => mem[71][4].CLK +clk[0] => mem[70][0].CLK +clk[0] => mem[70][1].CLK +clk[0] => mem[70][2].CLK +clk[0] => mem[70][3].CLK +clk[0] => mem[70][4].CLK +clk[0] => mem[69][0].CLK +clk[0] => mem[69][1].CLK +clk[0] => mem[69][2].CLK +clk[0] => mem[69][3].CLK +clk[0] => mem[69][4].CLK +clk[0] => mem[68][0].CLK +clk[0] => mem[68][1].CLK +clk[0] => mem[68][2].CLK +clk[0] => mem[68][3].CLK +clk[0] => mem[68][4].CLK +clk[0] => mem[67][0].CLK +clk[0] => mem[67][1].CLK +clk[0] => mem[67][2].CLK +clk[0] => mem[67][3].CLK +clk[0] => mem[67][4].CLK +clk[0] => mem[66][0].CLK +clk[0] => mem[66][1].CLK +clk[0] => mem[66][2].CLK +clk[0] => mem[66][3].CLK +clk[0] => mem[66][4].CLK +clk[0] => mem[65][0].CLK +clk[0] => mem[65][1].CLK +clk[0] => mem[65][2].CLK +clk[0] => mem[65][3].CLK +clk[0] => mem[65][4].CLK +clk[0] => mem[64][0].CLK +clk[0] => mem[64][1].CLK +clk[0] => mem[64][2].CLK +clk[0] => mem[64][3].CLK +clk[0] => mem[64][4].CLK +clk[0] => mem[63][0].CLK +clk[0] => mem[63][1].CLK +clk[0] => mem[63][2].CLK +clk[0] => mem[63][3].CLK +clk[0] => mem[63][4].CLK +clk[0] => mem[62][0].CLK +clk[0] => mem[62][1].CLK +clk[0] => mem[62][2].CLK +clk[0] => mem[62][3].CLK +clk[0] => mem[62][4].CLK +clk[0] => mem[61][0].CLK +clk[0] => mem[61][1].CLK +clk[0] => mem[61][2].CLK +clk[0] => mem[61][3].CLK +clk[0] => mem[61][4].CLK +clk[0] => mem[60][0].CLK +clk[0] => mem[60][1].CLK +clk[0] => mem[60][2].CLK +clk[0] => mem[60][3].CLK +clk[0] => mem[60][4].CLK +clk[0] => mem[59][0].CLK +clk[0] => mem[59][1].CLK +clk[0] => mem[59][2].CLK +clk[0] => mem[59][3].CLK +clk[0] => mem[59][4].CLK +clk[0] => mem[58][0].CLK +clk[0] => mem[58][1].CLK +clk[0] => mem[58][2].CLK +clk[0] => mem[58][3].CLK +clk[0] => mem[58][4].CLK +clk[0] => mem[57][0].CLK +clk[0] => mem[57][1].CLK +clk[0] => mem[57][2].CLK +clk[0] => mem[57][3].CLK +clk[0] => mem[57][4].CLK +clk[0] => mem[56][0].CLK +clk[0] => mem[56][1].CLK +clk[0] => mem[56][2].CLK +clk[0] => mem[56][3].CLK +clk[0] => mem[56][4].CLK +clk[0] => mem[55][0].CLK +clk[0] => mem[55][1].CLK +clk[0] => mem[55][2].CLK +clk[0] => mem[55][3].CLK +clk[0] => mem[55][4].CLK +clk[0] => mem[54][0].CLK +clk[0] => mem[54][1].CLK +clk[0] => mem[54][2].CLK +clk[0] => mem[54][3].CLK +clk[0] => mem[54][4].CLK +clk[0] => mem[53][0].CLK +clk[0] => mem[53][1].CLK +clk[0] => mem[53][2].CLK +clk[0] => mem[53][3].CLK +clk[0] => mem[53][4].CLK +clk[0] => mem[52][0].CLK +clk[0] => mem[52][1].CLK +clk[0] => mem[52][2].CLK +clk[0] => mem[52][3].CLK +clk[0] => mem[52][4].CLK +clk[0] => mem[51][0].CLK +clk[0] => mem[51][1].CLK +clk[0] => mem[51][2].CLK +clk[0] => mem[51][3].CLK +clk[0] => mem[51][4].CLK +clk[0] => mem[50][0].CLK +clk[0] => mem[50][1].CLK +clk[0] => mem[50][2].CLK +clk[0] => mem[50][3].CLK +clk[0] => mem[50][4].CLK +clk[0] => mem[49][0].CLK +clk[0] => mem[49][1].CLK +clk[0] => mem[49][2].CLK +clk[0] => mem[49][3].CLK +clk[0] => mem[49][4].CLK +clk[0] => mem[48][0].CLK +clk[0] => mem[48][1].CLK +clk[0] => mem[48][2].CLK +clk[0] => mem[48][3].CLK +clk[0] => mem[48][4].CLK +clk[0] => mem[47][0].CLK +clk[0] => mem[47][1].CLK +clk[0] => mem[47][2].CLK +clk[0] => mem[47][3].CLK +clk[0] => mem[47][4].CLK +clk[0] => mem[46][0].CLK +clk[0] => mem[46][1].CLK +clk[0] => mem[46][2].CLK +clk[0] => mem[46][3].CLK +clk[0] => mem[46][4].CLK +clk[0] => mem[45][0].CLK +clk[0] => mem[45][1].CLK +clk[0] => mem[45][2].CLK +clk[0] => mem[45][3].CLK +clk[0] => mem[45][4].CLK +clk[0] => mem[44][0].CLK +clk[0] => mem[44][1].CLK +clk[0] => mem[44][2].CLK +clk[0] => mem[44][3].CLK +clk[0] => mem[44][4].CLK +clk[0] => mem[43][0].CLK +clk[0] => mem[43][1].CLK +clk[0] => mem[43][2].CLK +clk[0] => mem[43][3].CLK +clk[0] => mem[43][4].CLK +clk[0] => mem[42][0].CLK +clk[0] => mem[42][1].CLK +clk[0] => mem[42][2].CLK +clk[0] => mem[42][3].CLK +clk[0] => mem[42][4].CLK +clk[0] => mem[41][0].CLK +clk[0] => mem[41][1].CLK +clk[0] => mem[41][2].CLK +clk[0] => mem[41][3].CLK +clk[0] => mem[41][4].CLK +clk[0] => mem[40][0].CLK +clk[0] => mem[40][1].CLK +clk[0] => mem[40][2].CLK +clk[0] => mem[40][3].CLK +clk[0] => mem[40][4].CLK +clk[0] => mem[39][0].CLK +clk[0] => mem[39][1].CLK +clk[0] => mem[39][2].CLK +clk[0] => mem[39][3].CLK +clk[0] => mem[39][4].CLK +clk[0] => mem[38][0].CLK +clk[0] => mem[38][1].CLK +clk[0] => mem[38][2].CLK +clk[0] => mem[38][3].CLK +clk[0] => mem[38][4].CLK +clk[0] => mem[37][0].CLK +clk[0] => mem[37][1].CLK +clk[0] => mem[37][2].CLK +clk[0] => mem[37][3].CLK +clk[0] => mem[37][4].CLK +clk[0] => mem[36][0].CLK +clk[0] => mem[36][1].CLK +clk[0] => mem[36][2].CLK +clk[0] => mem[36][3].CLK +clk[0] => mem[36][4].CLK +clk[0] => mem[35][0].CLK +clk[0] => mem[35][1].CLK +clk[0] => mem[35][2].CLK +clk[0] => mem[35][3].CLK +clk[0] => mem[35][4].CLK +clk[0] => mem[34][0].CLK +clk[0] => mem[34][1].CLK +clk[0] => mem[34][2].CLK +clk[0] => mem[34][3].CLK +clk[0] => mem[34][4].CLK +clk[0] => mem[33][0].CLK +clk[0] => mem[33][1].CLK +clk[0] => mem[33][2].CLK +clk[0] => mem[33][3].CLK +clk[0] => mem[33][4].CLK +clk[0] => mem[32][0].CLK +clk[0] => mem[32][1].CLK +clk[0] => mem[32][2].CLK +clk[0] => mem[32][3].CLK +clk[0] => mem[32][4].CLK +clk[0] => mem[31][0].CLK +clk[0] => mem[31][1].CLK +clk[0] => mem[31][2].CLK +clk[0] => mem[31][3].CLK +clk[0] => mem[31][4].CLK +clk[0] => mem[30][0].CLK +clk[0] => mem[30][1].CLK +clk[0] => mem[30][2].CLK +clk[0] => mem[30][3].CLK +clk[0] => mem[30][4].CLK +clk[0] => mem[29][0].CLK +clk[0] => mem[29][1].CLK +clk[0] => mem[29][2].CLK +clk[0] => mem[29][3].CLK +clk[0] => mem[29][4].CLK +clk[0] => mem[28][0].CLK +clk[0] => mem[28][1].CLK +clk[0] => mem[28][2].CLK +clk[0] => mem[28][3].CLK +clk[0] => mem[28][4].CLK +clk[0] => mem[27][0].CLK +clk[0] => mem[27][1].CLK +clk[0] => mem[27][2].CLK +clk[0] => mem[27][3].CLK +clk[0] => mem[27][4].CLK +clk[0] => mem[26][0].CLK +clk[0] => mem[26][1].CLK +clk[0] => mem[26][2].CLK +clk[0] => mem[26][3].CLK +clk[0] => mem[26][4].CLK +clk[0] => mem[25][0].CLK +clk[0] => mem[25][1].CLK +clk[0] => mem[25][2].CLK +clk[0] => mem[25][3].CLK +clk[0] => mem[25][4].CLK +clk[0] => mem[24][0].CLK +clk[0] => mem[24][1].CLK +clk[0] => mem[24][2].CLK +clk[0] => mem[24][3].CLK +clk[0] => mem[24][4].CLK +clk[0] => mem[23][0].CLK +clk[0] => mem[23][1].CLK +clk[0] => mem[23][2].CLK +clk[0] => mem[23][3].CLK +clk[0] => mem[23][4].CLK +clk[0] => mem[22][0].CLK +clk[0] => mem[22][1].CLK +clk[0] => mem[22][2].CLK +clk[0] => mem[22][3].CLK +clk[0] => mem[22][4].CLK +clk[0] => mem[21][0].CLK +clk[0] => mem[21][1].CLK +clk[0] => mem[21][2].CLK +clk[0] => mem[21][3].CLK +clk[0] => mem[21][4].CLK +clk[0] => mem[20][0].CLK +clk[0] => mem[20][1].CLK +clk[0] => mem[20][2].CLK +clk[0] => mem[20][3].CLK +clk[0] => mem[20][4].CLK +clk[0] => mem[19][0].CLK +clk[0] => mem[19][1].CLK +clk[0] => mem[19][2].CLK +clk[0] => mem[19][3].CLK +clk[0] => mem[19][4].CLK +clk[0] => mem[18][0].CLK +clk[0] => mem[18][1].CLK +clk[0] => mem[18][2].CLK +clk[0] => mem[18][3].CLK +clk[0] => mem[18][4].CLK +clk[0] => mem[17][0].CLK +clk[0] => mem[17][1].CLK +clk[0] => mem[17][2].CLK +clk[0] => mem[17][3].CLK +clk[0] => mem[17][4].CLK +clk[0] => mem[16][0].CLK +clk[0] => mem[16][1].CLK +clk[0] => mem[16][2].CLK +clk[0] => mem[16][3].CLK +clk[0] => mem[16][4].CLK +clk[0] => mem[15][0].CLK +clk[0] => mem[15][1].CLK +clk[0] => mem[15][2].CLK +clk[0] => mem[15][3].CLK +clk[0] => mem[15][4].CLK +clk[0] => mem[14][0].CLK +clk[0] => mem[14][1].CLK +clk[0] => mem[14][2].CLK +clk[0] => mem[14][3].CLK +clk[0] => mem[14][4].CLK +clk[0] => mem[13][0].CLK +clk[0] => mem[13][1].CLK +clk[0] => mem[13][2].CLK +clk[0] => mem[13][3].CLK +clk[0] => mem[13][4].CLK +clk[0] => mem[12][0].CLK +clk[0] => mem[12][1].CLK +clk[0] => mem[12][2].CLK +clk[0] => mem[12][3].CLK +clk[0] => mem[12][4].CLK +clk[0] => mem[11][0].CLK +clk[0] => mem[11][1].CLK +clk[0] => mem[11][2].CLK +clk[0] => mem[11][3].CLK +clk[0] => mem[11][4].CLK +clk[0] => mem[10][0].CLK +clk[0] => mem[10][1].CLK +clk[0] => mem[10][2].CLK +clk[0] => mem[10][3].CLK +clk[0] => mem[10][4].CLK +clk[0] => mem[9][0].CLK +clk[0] => mem[9][1].CLK +clk[0] => mem[9][2].CLK +clk[0] => mem[9][3].CLK +clk[0] => mem[9][4].CLK +clk[0] => mem[8][0].CLK +clk[0] => mem[8][1].CLK +clk[0] => mem[8][2].CLK +clk[0] => mem[8][3].CLK +clk[0] => mem[8][4].CLK +clk[0] => mem[7][0].CLK +clk[0] => mem[7][1].CLK +clk[0] => mem[7][2].CLK +clk[0] => mem[7][3].CLK +clk[0] => mem[7][4].CLK +clk[0] => mem[6][0].CLK +clk[0] => mem[6][1].CLK +clk[0] => mem[6][2].CLK +clk[0] => mem[6][3].CLK +clk[0] => mem[6][4].CLK +clk[0] => mem[5][0].CLK +clk[0] => mem[5][1].CLK +clk[0] => mem[5][2].CLK +clk[0] => mem[5][3].CLK +clk[0] => mem[5][4].CLK +clk[0] => mem[4][0].CLK +clk[0] => mem[4][1].CLK +clk[0] => mem[4][2].CLK +clk[0] => mem[4][3].CLK +clk[0] => mem[4][4].CLK +clk[0] => mem[3][0].CLK +clk[0] => mem[3][1].CLK +clk[0] => mem[3][2].CLK +clk[0] => mem[3][3].CLK +clk[0] => mem[3][4].CLK +clk[0] => mem[2][0].CLK +clk[0] => mem[2][1].CLK +clk[0] => mem[2][2].CLK +clk[0] => mem[2][3].CLK +clk[0] => mem[2][4].CLK +clk[0] => mem[1][0].CLK +clk[0] => mem[1][1].CLK +clk[0] => mem[1][2].CLK +clk[0] => mem[1][3].CLK +clk[0] => mem[1][4].CLK +clk[0] => mem[0][0].CLK +clk[0] => mem[0][1].CLK +clk[0] => mem[0][2].CLK +clk[0] => mem[0][3].CLK +clk[0] => mem[0][4].CLK +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => mem.OUTPUTSELECT +rst[0] => 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+we[0] => mem.OUTPUTSELECT +we[0] => mem.OUTPUTSELECT +we[0] => mem.OUTPUTSELECT +we[0] => mem.OUTPUTSELECT +we[0] => mem.OUTPUTSELECT +we[0] => mem.OUTPUTSELECT +we[0] => mem.OUTPUTSELECT +we[0] => mem.OUTPUTSELECT +we[0] => mem.OUTPUTSELECT +we[0] => mem.OUTPUTSELECT +we[0] => mem.OUTPUTSELECT +we[0] => mem.OUTPUTSELECT +we[0] => mem.OUTPUTSELECT +we[0] => mem.OUTPUTSELECT +we[0] => mem.OUTPUTSELECT +we[0] => mem.OUTPUTSELECT +we[0] => mem.OUTPUTSELECT +we[0] => mem.OUTPUTSELECT +we[0] => mem.OUTPUTSELECT +we[0] => mem.OUTPUTSELECT +we[0] => mem.OUTPUTSELECT +we[0] => mem.OUTPUTSELECT +we[0] => mem.OUTPUTSELECT +we[0] => mem.OUTPUTSELECT +we[0] => mem.OUTPUTSELECT +we[0] => mem.OUTPUTSELECT +we[0] => mem.OUTPUTSELECT +we[0] => mem.OUTPUTSELECT +we[0] => mem.OUTPUTSELECT +we[0] => mem.OUTPUTSELECT +we[0] => mem.OUTPUTSELECT +we[0] => mem.OUTPUTSELECT +we[0] => mem.OUTPUTSELECT +we[0] => mem.OUTPUTSELECT +we[0] => mem.OUTPUTSELECT +we[0] => mem.OUTPUTSELECT +we[0] => mem.OUTPUTSELECT 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+we[0] => mem.OUTPUTSELECT +we[0] => mem.OUTPUTSELECT +we[0] => mem.OUTPUTSELECT +we[0] => mem.OUTPUTSELECT +we[0] => mem.OUTPUTSELECT +we[0] => mem.OUTPUTSELECT +we[0] => mem.OUTPUTSELECT +we[0] => mem.OUTPUTSELECT +we[0] => mem.OUTPUTSELECT +we[0] => mem.OUTPUTSELECT +we[0] => mem.OUTPUTSELECT +we[0] => mem.OUTPUTSELECT +we[0] => mem.OUTPUTSELECT +we[0] => mem.OUTPUTSELECT +we[0] => mem.OUTPUTSELECT +we[0] => mem.OUTPUTSELECT +we[0] => mem.OUTPUTSELECT +we[0] => mem.OUTPUTSELECT +we[0] => mem.OUTPUTSELECT +we[0] => mem.OUTPUTSELECT +we[0] => mem.OUTPUTSELECT +we[0] => mem.OUTPUTSELECT +we[0] => mem.OUTPUTSELECT +we[0] => mem.OUTPUTSELECT +we[0] => mem.OUTPUTSELECT +we[0] => mem.OUTPUTSELECT +we[0] => mem.OUTPUTSELECT +we[0] => mem.OUTPUTSELECT +we[0] => mem.OUTPUTSELECT +we[0] => mem.OUTPUTSELECT +we[0] => mem.OUTPUTSELECT +we[0] => mem.OUTPUTSELECT +we[0] => mem.OUTPUTSELECT +we[0] => mem.OUTPUTSELECT +we[0] => mem.OUTPUTSELECT +we[0] => mem.OUTPUTSELECT +we[0] => mem.OUTPUTSELECT +we[0] => mem.OUTPUTSELECT +we[0] => mem.OUTPUTSELECT +we[0] => mem.OUTPUTSELECT +we[0] => mem.OUTPUTSELECT +we[0] => mem.OUTPUTSELECT +we[0] => mem.OUTPUTSELECT +we[0] => mem.OUTPUTSELECT +we[0] => mem.OUTPUTSELECT +we[0] => mem.OUTPUTSELECT +we[0] => mem.OUTPUTSELECT +we[0] => mem.OUTPUTSELECT +we[0] => mem.OUTPUTSELECT +we[0] => mem.OUTPUTSELECT +we[0] => mem.OUTPUTSELECT +we[0] => mem.OUTPUTSELECT +we[0] => mem.OUTPUTSELECT +we[0] => mem.OUTPUTSELECT +we[0] => mem.OUTPUTSELECT +we[0] => mem.OUTPUTSELECT +we[0] => mem.OUTPUTSELECT +we[0] => mem.OUTPUTSELECT +we[0] => mem.OUTPUTSELECT +we[0] => mem.OUTPUTSELECT +we[0] => mem.OUTPUTSELECT +we[0] => mem.OUTPUTSELECT +we[0] => mem.OUTPUTSELECT +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[0] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[1] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[2] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[3] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_in[4] => mem.DATAB +data_out[0] <= Mux4.DB_MAX_OUTPUT_PORT_TYPE +data_out[1] <= Mux3.DB_MAX_OUTPUT_PORT_TYPE +data_out[2] <= Mux2.DB_MAX_OUTPUT_PORT_TYPE +data_out[3] <= Mux1.DB_MAX_OUTPUT_PORT_TYPE +data_out[4] <= Mux0.DB_MAX_OUTPUT_PORT_TYPE |assignment2|control_unit:CONTROL_UNIT @@ -1028,7 +5649,7 @@ ALU_FN[1] <= ALU_FN.DB_MAX_OUTPUT_PORT_TYPE ALU_FN[2] <= ALU_FN.DB_MAX_OUTPUT_PORT_TYPE ALU_FN[3] <= ALU_FN.DB_MAX_OUTPUT_PORT_TYPE ALU_SRC[0] <= ALU_SRC.DB_MAX_OUTPUT_PORT_TYPE -RDST[0] <= instruction_classifier:CLASSIFIER.port5 +RDST[0] <= instruction_classifier:CLASSIFIER.port1 RW[0] <= RW.DB_MAX_OUTPUT_PORT_TYPE @@ -4545,6 +9166,8 @@ op[0] => ext_val.OUTPUTSELECT val[0] => ext_val[0].DATAIN val[1] => ext_val[1].DATAIN val[2] => ext_val[2].DATAIN +val[3] => ext_val.DATAB +val[3] => ext_val.DATAB val[3] => ext_val[3].DATAIN val[4] => ext_val[4].DATAIN val[5] => ext_val[5].DATAIN @@ -4557,8 +9180,6 @@ val[11] => ext_val[11].DATAIN val[12] => ext_val[12].DATAIN val[13] => ext_val[13].DATAIN val[14] => ext_val[14].DATAIN -val[15] => ext_val.DATAB -val[15] => ext_val.DATAB val[15] => ext_val[15].DATAIN ext_val[0] <= val[0].DB_MAX_OUTPUT_PORT_TYPE ext_val[1] <= val[1].DB_MAX_OUTPUT_PORT_TYPE @@ -4596,7 +9217,7 @@ ext_val[31] <= |assignment2|alu:ALU op[0] => op[0].IN1 -op[1] => op[1].IN1 +op[1] => op[1].IN2 op[2] => Mux0.IN3 op[2] => Mux1.IN3 op[2] => Mux2.IN3 @@ -4758,7 +9379,7 @@ OUT_1[29] <= Mux2.DB_MAX_OUTPUT_PORT_TYPE OUT_1[30] <= Mux1.DB_MAX_OUTPUT_PORT_TYPE OUT_1[31] <= Mux0.DB_MAX_OUTPUT_PORT_TYPE flags[0] <= asu:adder_unit.port4 -flags[1] <= asu:adder_unit.port5 +flags[1] <= asu_flags.DB_MAX_OUTPUT_PORT_TYPE flags[2] <= Equal0.DB_MAX_OUTPUT_PORT_TYPE diff --git a/Quartus/A2/db/assignment2.hif b/Quartus/A2/db/assignment2.hif index f4d85e2..83bd3dc 100644 Binary files a/Quartus/A2/db/assignment2.hif and b/Quartus/A2/db/assignment2.hif differ diff --git a/Quartus/A2/db/assignment2.lpc.html b/Quartus/A2/db/assignment2.lpc.html index db7f511..149dcfc 100644 --- a/Quartus/A2/db/assignment2.lpc.html +++ b/Quartus/A2/db/assignment2.lpc.html @@ -130,13 +130,13 @@ ALU 68 -1 0 -1 +0 +0 35 -1 -1 -1 +0 +0 +0 0 0 0 @@ -209,14 +209,14 @@ RAM -546 -510 -51 -510 -32 -510 -510 -510 +17 +0 +0 +0 +5 +0 +0 +0 0 0 0 @@ -227,7 +227,7 @@ ROM 10 0 -0 +2 0 32 0 @@ -241,14 +241,14 @@ PC -34 -44 +35 +0 +0 0 -44 32 -44 -44 -44 +0 +0 +0 0 0 0 diff --git a/Quartus/A2/db/assignment2.lpc.rdb b/Quartus/A2/db/assignment2.lpc.rdb index 50430f0..a699c42 100644 Binary files a/Quartus/A2/db/assignment2.lpc.rdb and b/Quartus/A2/db/assignment2.lpc.rdb differ diff --git a/Quartus/A2/db/assignment2.lpc.txt b/Quartus/A2/db/assignment2.lpc.txt index 6e7d9da..1206be2 100644 --- a/Quartus/A2/db/assignment2.lpc.txt +++ b/Quartus/A2/db/assignment2.lpc.txt @@ -10,12 +10,12 @@ ; display ; 16 ; 0 ; 0 ; 0 ; 32 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; ; ALU|logic_unit ; 66 ; 0 ; 0 ; 0 ; 32 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; ; ALU|adder_unit ; 65 ; 0 ; 0 ; 0 ; 34 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; -; ALU ; 68 ; 1 ; 0 ; 1 ; 35 ; 1 ; 1 ; 1 ; 0 ; 0 ; 0 ; 0 ; 0 ; +; ALU ; 68 ; 0 ; 0 ; 0 ; 35 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; ; SIGNEXT ; 17 ; 15 ; 0 ; 15 ; 32 ; 15 ; 15 ; 15 ; 0 ; 0 ; 0 ; 0 ; 0 ; ; REGS ; 49 ; 0 ; 0 ; 0 ; 1088 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; ; CONTROL_UNIT|CLASSIFIER ; 6 ; 0 ; 0 ; 0 ; 7 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; ; CONTROL_UNIT ; 12 ; 0 ; 2 ; 0 ; 10 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; -; RAM ; 546 ; 510 ; 51 ; 510 ; 32 ; 510 ; 510 ; 510 ; 0 ; 0 ; 0 ; 0 ; 0 ; -; ROM ; 10 ; 0 ; 0 ; 0 ; 32 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; -; PC ; 34 ; 44 ; 0 ; 44 ; 32 ; 44 ; 44 ; 44 ; 0 ; 0 ; 0 ; 0 ; 0 ; +; RAM ; 17 ; 0 ; 0 ; 0 ; 5 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; +; ROM ; 10 ; 0 ; 2 ; 0 ; 32 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; +; PC ; 35 ; 0 ; 0 ; 0 ; 32 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; +-------------------------+-------+----------------+--------------+----------------+--------+-----------------+---------------+-----------------+-------+----------------+--------------+------------------+-------------------+ diff --git a/Quartus/A2/db/assignment2.map.bpm b/Quartus/A2/db/assignment2.map.bpm index 47f98b4..0bda4eb 100644 Binary files a/Quartus/A2/db/assignment2.map.bpm and b/Quartus/A2/db/assignment2.map.bpm differ diff --git a/Quartus/A2/db/assignment2.map.cdb b/Quartus/A2/db/assignment2.map.cdb index f586487..79d60ae 100644 Binary files a/Quartus/A2/db/assignment2.map.cdb and b/Quartus/A2/db/assignment2.map.cdb differ diff --git a/Quartus/A2/db/assignment2.map.hdb b/Quartus/A2/db/assignment2.map.hdb index 6bddb95..b61f54a 100644 Binary files a/Quartus/A2/db/assignment2.map.hdb and b/Quartus/A2/db/assignment2.map.hdb differ diff --git a/Quartus/A2/db/assignment2.map.kpt b/Quartus/A2/db/assignment2.map.kpt index f96647a..5fd0d41 100644 Binary files a/Quartus/A2/db/assignment2.map.kpt and b/Quartus/A2/db/assignment2.map.kpt differ diff --git a/Quartus/A2/db/assignment2.map.qmsg b/Quartus/A2/db/assignment2.map.qmsg index ab4fc5c..25966fe 100644 --- a/Quartus/A2/db/assignment2.map.qmsg +++ b/Quartus/A2/db/assignment2.map.qmsg @@ -1,37 +1,34 @@ -{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "Design Software" 0 -1 1792105086550 ""} -{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus Prime " "Running Quartus Prime Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 25.1std.0 Build 1129 10/21/2025 SC Lite Edition " "Version 25.1std.0 Build 1129 10/21/2025 SC Lite Edition" { } { } 0 0 "%1!s!" 0 0 "Design Software" 0 -1 1792105086551 ""} { "Info" "IQEXE_START_BANNER_TIME" "Fri Oct 16 09:58:06 2026 " "Processing started: Fri Oct 16 09:58:06 2026" { } { } 0 0 "Processing started: %1!s!" 0 0 "Design Software" 0 -1 1792105086551 ""} } { } 4 0 "Running %2!s! %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1792105086551 ""} -{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off assignment2 -c assignment2 " "Command: quartus_map --read_settings_files=on --write_settings_files=off assignment2 -c assignment2" { } { } 0 0 "Command: %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1792105086551 ""} -{ "Info" "IQCU_PARALLEL_SHOW_MANUAL_NUM_PROCS" "2 " "Parallel compilation is enabled and will use up to 2 processors" { } { } 0 20032 "Parallel compilation is enabled and will use up to %1!i! processors" 0 0 "Analysis & Synthesis" 0 -1 1792105086872 ""} -{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv 14 14 " "Found 14 design units, including 14 entities, in source file /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv" { { "Info" "ISGN_ENTITY_NAME" "1 rom " "Found entity 1: rom" { } { { "../../modules/rom.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/rom.sv" 4 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1792105095944 ""} { "Info" "ISGN_ENTITY_NAME" "2 ram " "Found entity 2: ram" { } { { "../../modules/ram.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/ram.sv" 4 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1792105095944 ""} { "Info" "ISGN_ENTITY_NAME" "3 register_file " "Found entity 3: register_file" { } { { "../../modules/register_file.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/register_file.sv" 4 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1792105095944 ""} { "Info" "ISGN_ENTITY_NAME" "4 instruction_counter " "Found entity 4: instruction_counter" { } { { "../../modules/instruction_counter.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/instruction_counter.sv" 4 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1792105095944 ""} { "Info" "ISGN_ENTITY_NAME" "5 instruction_classifier " "Found entity 5: instruction_classifier" { } { { "../../modules/instruction_classifier.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/instruction_classifier.sv" 3 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1792105095944 ""} { "Info" "ISGN_ENTITY_NAME" "6 control_unit " "Found entity 6: control_unit" { } { { "../../modules/control_unit.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/control_unit.sv" 5 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1792105095944 ""} { "Info" "ISGN_ENTITY_NAME" "7 asu " "Found entity 7: asu" { } { { "../../modules/asu.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/asu.sv" 4 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1792105095944 ""} { "Info" "ISGN_ENTITY_NAME" "8 lu " "Found entity 8: lu" { } { { "../../modules/lu.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/lu.sv" 3 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1792105095944 ""} { "Info" "ISGN_ENTITY_NAME" "9 alu " "Found entity 9: alu" { } { { "../../modules/alu.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/alu.sv" 9 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1792105095944 ""} { "Info" "ISGN_ENTITY_NAME" "10 shifter " "Found entity 10: shifter" { } { { "../../modules/shifter.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/shifter.sv" 3 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1792105095944 ""} { "Info" "ISGN_ENTITY_NAME" "11 sign_extender " "Found entity 11: sign_extender" { } { { "../../modules/sign_extender.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/sign_extender.sv" 4 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1792105095944 ""} { "Info" "ISGN_ENTITY_NAME" "12 seven_seg " "Found entity 12: seven_seg" { } { { "../../modules/seven_seg.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/seven_seg.sv" 3 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1792105095944 ""} { "Info" "ISGN_ENTITY_NAME" "13 seven_seg_4digit " "Found entity 13: seven_seg_4digit" { } { { "../../modules/seven_seg_4digit.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/seven_seg_4digit.sv" 5 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1792105095944 ""} { "Info" "ISGN_ENTITY_NAME" "14 assignment2 " "Found entity 14: assignment2" { } { { "../../modules/assignment2.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv" 15 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1792105095944 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1792105095944 ""} -{ "Info" "ISGN_START_ELABORATION_TOP" "assignment2 " "Elaborating entity \"assignment2\" for the top level hierarchy" { } { } 0 12127 "Elaborating entity \"%1!s!\" for the top level hierarchy" 0 0 "Analysis & Synthesis" 0 -1 1792105096087 ""} -{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 10 assignment2.sv(87) " "Verilog HDL assignment warning at assignment2.sv(87): truncated value with size 32 to match size of target (10)" { } { { "../../modules/assignment2.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv" 87 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1792105096098 "|assignment2"} -{ "Warning" "WVRFX_VDB_DRIVERLESS_NET" "flags\[2\] 0 assignment2.sv(48) " "Net \"flags\[2\]\" at assignment2.sv(48) has no driver or initial value, using a default initial value '0'" { } { { "../../modules/assignment2.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv" 48 0 0 } } } 0 10030 "Net \"%1!s!\" at %3!s! has no driver or initial value, using a default initial value '%2!c!'" 0 0 "Analysis & Synthesis" 0 -1 1792105096098 "|assignment2"} -{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "instruction_counter instruction_counter:PC " "Elaborating entity \"instruction_counter\" for hierarchy \"instruction_counter:PC\"" { } { { "../../modules/assignment2.sv" "PC" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv" 55 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1792105096099 ""} -{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "rom rom:ROM " "Elaborating entity \"rom\" for hierarchy \"rom:ROM\"" { } { { "../../modules/assignment2.sv" "ROM" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv" 57 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1792105096107 ""} -{ "Warning" "WVRFX_VERI_2111_UNCONVERTED" "18 0 1023 rom.sv(16) " "Verilog HDL warning at rom.sv(16): number of words (18) in memory file does not match the number of elements in the address range \[0:1023\]" { } { { "../../modules/rom.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/rom.sv" 16 0 0 } } } 0 10850 "Verilog HDL warning at %4!s!: number of words (%1!d!) in memory file does not match the number of elements in the address range \[%2!d!:%3!d!\]" 0 0 "Analysis & Synthesis" 0 -1 1792105096118 "|assignment2|rom:ROM"} -{ "Warning" "WVRFX_VDB_DRIVERLESS_NET" "mem.data_a 0 rom.sv(9) " "Net \"mem.data_a\" at rom.sv(9) has no driver or initial value, using a default initial value '0'" { } { { "../../modules/rom.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/rom.sv" 9 0 0 } } } 0 10030 "Net \"%1!s!\" at %3!s! has no driver or initial value, using a default initial value '%2!c!'" 0 0 "Analysis & Synthesis" 0 -1 1792105096162 "|assignment2|rom:ROM"} -{ "Warning" "WVRFX_VDB_DRIVERLESS_NET" "mem.waddr_a 0 rom.sv(9) " "Net \"mem.waddr_a\" at rom.sv(9) has no driver or initial value, using a default initial value '0'" { } { { "../../modules/rom.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/rom.sv" 9 0 0 } } } 0 10030 "Net \"%1!s!\" at %3!s! has no driver or initial value, using a default initial value '%2!c!'" 0 0 "Analysis & Synthesis" 0 -1 1792105096162 "|assignment2|rom:ROM"} -{ "Warning" "WVRFX_VDB_DRIVERLESS_NET" "mem.we_a 0 rom.sv(9) " "Net \"mem.we_a\" at rom.sv(9) has no driver or initial value, using a default initial value '0'" { } { { "../../modules/rom.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/rom.sv" 9 0 0 } } } 0 10030 "Net \"%1!s!\" at %3!s! has no driver or initial value, using a default initial value '%2!c!'" 0 0 "Analysis & Synthesis" 0 -1 1792105096162 "|assignment2|rom:ROM"} -{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "ram ram:RAM " "Elaborating entity \"ram\" for hierarchy \"ram:RAM\"" { } { { "../../modules/assignment2.sv" "RAM" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv" 60 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1792105096167 ""} -{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "8 2 ram.sv(18) " "Verilog HDL assignment warning at ram.sv(18): truncated value with size 8 to match size of target (2)" { } { { "../../modules/ram.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/ram.sv" 18 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1792105096168 "|assignment2|ram:RAM"} -{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 2 ram.sv(24) " "Verilog HDL assignment warning at ram.sv(24): truncated value with size 32 to match size of target (2)" { } { { "../../modules/ram.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/ram.sv" 24 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1792105096915 "|assignment2|ram:RAM"} -{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "control_unit control_unit:CONTROL_UNIT " "Elaborating entity \"control_unit\" for hierarchy \"control_unit:CONTROL_UNIT\"" { } { { "../../modules/assignment2.sv" "CONTROL_UNIT" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv" 64 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1792105096923 ""} -{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "6 4 control_unit.sv(29) " "Verilog HDL assignment warning at control_unit.sv(29): truncated value with size 6 to match size of target (4)" { } { { "../../modules/control_unit.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/control_unit.sv" 29 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1792105096924 "|assignment2|control_unit:CONTROL_UNIT"} -{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "instruction_classifier control_unit:CONTROL_UNIT\|instruction_classifier:CLASSIFIER " "Elaborating entity \"instruction_classifier\" for hierarchy \"control_unit:CONTROL_UNIT\|instruction_classifier:CLASSIFIER\"" { } { { "../../modules/control_unit.sv" "CLASSIFIER" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/control_unit.sv" 23 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1792105096928 ""} -{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "register_file register_file:REGS " "Elaborating entity \"register_file\" for hierarchy \"register_file:REGS\"" { } { { "../../modules/assignment2.sv" "REGS" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv" 73 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1792105096932 ""} -{ "Warning" "WVRFX_VERI_2116_UNCONVERTED" "regs register_file.sv(14) " "Verilog HDL warning at register_file.sv(14): initial value for variable regs should be constant" { } { { "../../modules/register_file.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/register_file.sv" 14 0 0 } } } 0 10855 "Verilog HDL warning at %2!s!: initial value for variable %1!s! should be constant" 0 0 "Analysis & Synthesis" 0 -1 1792105096934 "|assignment2|register_file:REGS"} -{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "sign_extender sign_extender:SIGNEXT " "Elaborating entity \"sign_extender\" for hierarchy \"sign_extender:SIGNEXT\"" { } { { "../../modules/assignment2.sv" "SIGNEXT" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv" 76 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1792105097052 ""} -{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "alu alu:ALU " "Elaborating entity \"alu\" for hierarchy \"alu:ALU\"" { } { { "../../modules/assignment2.sv" "ALU" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv" 83 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1792105097055 ""} -{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "asu alu:ALU\|asu:adder_unit " "Elaborating entity \"asu\" for hierarchy \"alu:ALU\|asu:adder_unit\"" { } { { "../../modules/alu.sv" "adder_unit" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/alu.sv" 18 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1792105097062 ""} -{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "lu alu:ALU\|lu:logic_unit " "Elaborating entity \"lu\" for hierarchy \"alu:ALU\|lu:logic_unit\"" { } { { "../../modules/alu.sv" "logic_unit" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/alu.sv" 21 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1792105097068 ""} -{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "seven_seg_4digit seven_seg_4digit:display " "Elaborating entity \"seven_seg_4digit\" for hierarchy \"seven_seg_4digit:display\"" { } { { "../../modules/assignment2.sv" "display" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv" 104 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1792105097074 ""} -{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "seven_seg seven_seg_4digit:display\|seven_seg:digit0 " "Elaborating entity \"seven_seg\" for hierarchy \"seven_seg_4digit:display\|seven_seg:digit0\"" { } { { "../../modules/seven_seg_4digit.sv" "digit0" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/seven_seg_4digit.sv" 18 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1792105097077 ""} -{ "Info" "IINFER_UNINFERRED_RAM_SUMMARY" "1 " "Found 1 instances of uninferred RAM logic" { { "Info" "IINFER_READ_LOGIC_IS_ASYNCHRONOUS" "ram:RAM\|mem " "RAM logic \"ram:RAM\|mem\" is uninferred due to asynchronous read logic" { } { { "../../modules/ram.sv" "mem" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/ram.sv" 13 -1 0 } } } 0 276007 "RAM logic \"%1!s!\" is uninferred due to asynchronous read logic" 0 0 "Design Software" 0 -1 1792105097741 ""} } { } 0 276014 "Found %1!d! instances of uninferred RAM logic" 0 0 "Analysis & Synthesis" 0 -1 1792105097741 ""} -{ "Warning" "WCDB_CDB_RAM_MIF_CONTAIN_DONT_CARE" "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/Quartus/A2/db/assignment2.ram0_rom_d8639f5.hdl.mif " "Memory Initialization File or Hexadecimal (Intel-Format) File \"/home/oliver/Documents/FPGA_Dev/FPGA_Uni/Quartus/A2/db/assignment2.ram0_rom_d8639f5.hdl.mif\" contains \"don't care\" values -- overwriting them with 0s" { } { } 0 127007 "Memory Initialization File or Hexadecimal (Intel-Format) File \"%1!s!\" contains \"don't care\" values -- overwriting them with 0s" 0 0 "Analysis & Synthesis" 0 -1 1792105097774 ""} -{ "Warning" "WSGN_CONNECTIVITY_WARNINGS" "3 " "3 hierarchies have connectivity warnings - see the Connectivity Checks report folder" { } { } 0 12241 "%1!d! hierarchies have connectivity warnings - see the Connectivity Checks report folder" 0 0 "Analysis & Synthesis" 0 -1 1792105098851 ""} -{ "Warning" "WMLS_MLS_STUCK_PIN_HDR" "" "Output pins are stuck at VCC or GND" { { "Warning" "WMLS_MLS_STUCK_PIN" "out_seg_0\[0\] VCC " "Pin \"out_seg_0\[0\]\" is stuck at VCC" { } { { "../../modules/assignment2.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv" 23 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1792105098866 "|assignment2|out_seg_0[0]"} { "Warning" "WMLS_MLS_STUCK_PIN" "out_seg_0\[1\] VCC " "Pin \"out_seg_0\[1\]\" is stuck at VCC" { } { { "../../modules/assignment2.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv" 23 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1792105098866 "|assignment2|out_seg_0[1]"} { "Warning" "WMLS_MLS_STUCK_PIN" "out_seg_0\[2\] VCC " "Pin \"out_seg_0\[2\]\" is stuck at VCC" { } { { "../../modules/assignment2.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv" 23 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1792105098866 "|assignment2|out_seg_0[2]"} { "Warning" "WMLS_MLS_STUCK_PIN" "out_seg_0\[3\] VCC " "Pin \"out_seg_0\[3\]\" is stuck at VCC" { } { { "../../modules/assignment2.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv" 23 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1792105098866 "|assignment2|out_seg_0[3]"} { "Warning" "WMLS_MLS_STUCK_PIN" "out_seg_0\[4\] VCC " "Pin \"out_seg_0\[4\]\" is stuck at VCC" { } { { "../../modules/assignment2.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv" 23 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1792105098866 "|assignment2|out_seg_0[4]"} { "Warning" "WMLS_MLS_STUCK_PIN" "out_seg_0\[5\] VCC " "Pin \"out_seg_0\[5\]\" is stuck at VCC" { } { { "../../modules/assignment2.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv" 23 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1792105098866 "|assignment2|out_seg_0[5]"} { "Warning" "WMLS_MLS_STUCK_PIN" "out_seg_0\[6\] VCC " "Pin \"out_seg_0\[6\]\" is stuck at VCC" { } { { "../../modules/assignment2.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv" 23 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1792105098866 "|assignment2|out_seg_0[6]"} { "Warning" "WMLS_MLS_STUCK_PIN" "out_seg_0\[7\] VCC " "Pin \"out_seg_0\[7\]\" is stuck at VCC" { } { { "../../modules/assignment2.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv" 23 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1792105098866 "|assignment2|out_seg_0[7]"} { "Warning" "WMLS_MLS_STUCK_PIN" "out_seg_1\[0\] VCC " "Pin \"out_seg_1\[0\]\" is stuck at VCC" { } { { "../../modules/assignment2.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv" 24 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1792105098866 "|assignment2|out_seg_1[0]"} { "Warning" "WMLS_MLS_STUCK_PIN" "out_seg_1\[1\] VCC " "Pin \"out_seg_1\[1\]\" is stuck at VCC" { } { { "../../modules/assignment2.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv" 24 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1792105098866 "|assignment2|out_seg_1[1]"} { "Warning" "WMLS_MLS_STUCK_PIN" "out_seg_1\[2\] VCC " "Pin \"out_seg_1\[2\]\" is stuck at VCC" { } { { "../../modules/assignment2.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv" 24 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1792105098866 "|assignment2|out_seg_1[2]"} { "Warning" "WMLS_MLS_STUCK_PIN" "out_seg_1\[3\] VCC " "Pin \"out_seg_1\[3\]\" is stuck at VCC" { } { { "../../modules/assignment2.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv" 24 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1792105098866 "|assignment2|out_seg_1[3]"} { "Warning" "WMLS_MLS_STUCK_PIN" "out_seg_1\[4\] VCC " "Pin \"out_seg_1\[4\]\" is stuck at VCC" { } { { "../../modules/assignment2.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv" 24 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1792105098866 "|assignment2|out_seg_1[4]"} { "Warning" "WMLS_MLS_STUCK_PIN" "out_seg_1\[5\] VCC " "Pin \"out_seg_1\[5\]\" is stuck at VCC" { } { { "../../modules/assignment2.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv" 24 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1792105098866 "|assignment2|out_seg_1[5]"} { "Warning" "WMLS_MLS_STUCK_PIN" "out_seg_1\[6\] VCC " "Pin \"out_seg_1\[6\]\" is stuck at VCC" { } { { "../../modules/assignment2.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv" 24 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1792105098866 "|assignment2|out_seg_1[6]"} { "Warning" "WMLS_MLS_STUCK_PIN" "out_seg_1\[7\] VCC " "Pin \"out_seg_1\[7\]\" is stuck at VCC" { } { { "../../modules/assignment2.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv" 24 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1792105098866 "|assignment2|out_seg_1[7]"} { "Warning" "WMLS_MLS_STUCK_PIN" "out_seg_2\[0\] VCC " "Pin \"out_seg_2\[0\]\" is stuck at VCC" { } { { "../../modules/assignment2.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv" 25 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1792105098866 "|assignment2|out_seg_2[0]"} { "Warning" "WMLS_MLS_STUCK_PIN" "out_seg_2\[1\] VCC " "Pin \"out_seg_2\[1\]\" is stuck at VCC" { } { { "../../modules/assignment2.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv" 25 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1792105098866 "|assignment2|out_seg_2[1]"} { "Warning" "WMLS_MLS_STUCK_PIN" "out_seg_2\[2\] VCC " "Pin \"out_seg_2\[2\]\" is stuck at VCC" { } { { "../../modules/assignment2.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv" 25 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1792105098866 "|assignment2|out_seg_2[2]"} { "Warning" "WMLS_MLS_STUCK_PIN" "out_seg_2\[3\] VCC " "Pin \"out_seg_2\[3\]\" is stuck at VCC" { } { { "../../modules/assignment2.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv" 25 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1792105098866 "|assignment2|out_seg_2[3]"} { "Warning" "WMLS_MLS_STUCK_PIN" "out_seg_2\[4\] VCC " "Pin \"out_seg_2\[4\]\" is stuck at VCC" { } { { "../../modules/assignment2.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv" 25 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1792105098866 "|assignment2|out_seg_2[4]"} { "Warning" "WMLS_MLS_STUCK_PIN" "out_seg_2\[5\] VCC " "Pin \"out_seg_2\[5\]\" is stuck at VCC" { } { { "../../modules/assignment2.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv" 25 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1792105098866 "|assignment2|out_seg_2[5]"} { "Warning" "WMLS_MLS_STUCK_PIN" "out_seg_2\[6\] VCC " "Pin \"out_seg_2\[6\]\" is stuck at VCC" { } { { "../../modules/assignment2.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv" 25 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1792105098866 "|assignment2|out_seg_2[6]"} { "Warning" "WMLS_MLS_STUCK_PIN" "out_seg_2\[7\] VCC " "Pin \"out_seg_2\[7\]\" is stuck at VCC" { } { { "../../modules/assignment2.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv" 25 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1792105098866 "|assignment2|out_seg_2[7]"} { "Warning" "WMLS_MLS_STUCK_PIN" "out_seg_3\[0\] VCC " "Pin \"out_seg_3\[0\]\" is stuck at VCC" { } { { "../../modules/assignment2.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv" 28 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1792105098866 "|assignment2|out_seg_3[0]"} { "Warning" "WMLS_MLS_STUCK_PIN" "out_seg_3\[1\] VCC " "Pin \"out_seg_3\[1\]\" is stuck at VCC" { } { { "../../modules/assignment2.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv" 28 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1792105098866 "|assignment2|out_seg_3[1]"} { "Warning" "WMLS_MLS_STUCK_PIN" "out_seg_3\[2\] VCC " "Pin \"out_seg_3\[2\]\" is stuck at VCC" { } { { "../../modules/assignment2.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv" 28 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1792105098866 "|assignment2|out_seg_3[2]"} { "Warning" "WMLS_MLS_STUCK_PIN" "out_seg_3\[3\] VCC " "Pin \"out_seg_3\[3\]\" is stuck at VCC" { } { { "../../modules/assignment2.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv" 28 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1792105098866 "|assignment2|out_seg_3[3]"} { "Warning" "WMLS_MLS_STUCK_PIN" "out_seg_3\[4\] VCC " "Pin \"out_seg_3\[4\]\" is stuck at VCC" { } { { "../../modules/assignment2.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv" 28 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1792105098866 "|assignment2|out_seg_3[4]"} { "Warning" "WMLS_MLS_STUCK_PIN" "out_seg_3\[5\] VCC " "Pin \"out_seg_3\[5\]\" is stuck at VCC" { } { { "../../modules/assignment2.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv" 28 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1792105098866 "|assignment2|out_seg_3[5]"} { "Warning" "WMLS_MLS_STUCK_PIN" "out_seg_3\[6\] VCC " "Pin \"out_seg_3\[6\]\" is stuck at VCC" { } { { "../../modules/assignment2.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv" 28 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1792105098866 "|assignment2|out_seg_3[6]"} { "Warning" "WMLS_MLS_STUCK_PIN" "out_seg_3\[7\] VCC " "Pin \"out_seg_3\[7\]\" is stuck at VCC" { } { { "../../modules/assignment2.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv" 28 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1792105098866 "|assignment2|out_seg_3[7]"} } { } 0 13024 "Output pins are stuck at VCC or GND" 0 0 "Analysis & Synthesis" 0 -1 1792105098866 ""} -{ "Info" "ISCL_SCL_LOST_FANOUT_MSG_HDR" "30 " "30 registers lost all their fanouts during netlist optimizations." { } { } 0 17049 "%1!d! registers lost all their fanouts during netlist optimizations." 0 0 "Analysis & Synthesis" 0 -1 1792105098892 ""} -{ "Info" "IBPM_HARD_BLOCK_PARTITION_CREATED" "hard_block:auto_generated_inst " "Generating hard_block partition \"hard_block:auto_generated_inst\"" { { "Info" "IBPM_HARD_BLOCK_PARTITION_NODE" "0 0 0 0 0 " "Adding 0 node(s), including 0 DDIO, 0 PLL, 0 transceiver and 0 LCELL" { } { } 0 16011 "Adding %1!d! node(s), including %2!d! DDIO, %3!d! PLL, %4!d! transceiver and %5!d! LCELL" 0 0 "Design Software" 0 -1 1792105099101 ""} } { } 0 16010 "Generating hard_block partition \"%1!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1792105099101 ""} -{ "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN_HDR" "8 " "Design contains 8 input pin(s) that do not drive logic" { { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "HID_PC\[0\] " "No output dependent on input pin \"HID_PC\[0\]\"" { } { { "../../modules/assignment2.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv" 20 0 0 } } } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "Design Software" 0 -1 1792105099207 "|assignment2|HID_PC[0]"} { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "HID_Hi_Low\[0\] " "No output dependent on input pin \"HID_Hi_Low\[0\]\"" { } { { "../../modules/assignment2.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv" 21 0 0 } } } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "Design Software" 0 -1 1792105099207 "|assignment2|HID_Hi_Low[0]"} { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "HID_Register\[4\] " "No output dependent on input pin \"HID_Register\[4\]\"" { } { { "../../modules/assignment2.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv" 19 0 0 } } } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "Design Software" 0 -1 1792105099207 "|assignment2|HID_Register[4]"} { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "HID_Register\[2\] " "No output dependent on input pin \"HID_Register\[2\]\"" { } { { "../../modules/assignment2.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv" 19 0 0 } } } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "Design Software" 0 -1 1792105099207 "|assignment2|HID_Register[2]"} { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "HID_Register\[0\] " "No output dependent on input pin \"HID_Register\[0\]\"" { } { { "../../modules/assignment2.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv" 19 0 0 } } } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "Design Software" 0 -1 1792105099207 "|assignment2|HID_Register[0]"} { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "HID_Register\[1\] " "No output dependent on input pin \"HID_Register\[1\]\"" { } { { "../../modules/assignment2.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv" 19 0 0 } } } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "Design Software" 0 -1 1792105099207 "|assignment2|HID_Register[1]"} { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "HID_Register\[3\] " "No output dependent on input pin \"HID_Register\[3\]\"" { } { { "../../modules/assignment2.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv" 19 0 0 } } } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "Design Software" 0 -1 1792105099207 "|assignment2|HID_Register[3]"} { "Warning" "WCUT_CUT_UNNECESSARY_INPUT_PIN" "clk\[0\] " "No output dependent on input pin \"clk\[0\]\"" { } { { "../../modules/assignment2.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv" 18 0 0 } } } 0 15610 "No output dependent on input pin \"%1!s!\"" 0 0 "Design Software" 0 -1 1792105099207 "|assignment2|clk[0]"} } { } 0 21074 "Design contains %1!d! input pin(s) that do not drive logic" 0 0 "Analysis & Synthesis" 0 -1 1792105099207 ""} -{ "Info" "ICUT_CUT_TM_SUMMARY" "40 " "Implemented 40 device resources after synthesis - the final resource count might be different" { { "Info" "ICUT_CUT_TM_IPINS" "8 " "Implemented 8 input pins" { } { } 0 21058 "Implemented %1!d! input pins" 0 0 "Design Software" 0 -1 1792105099208 ""} { "Info" "ICUT_CUT_TM_OPINS" "32 " "Implemented 32 output pins" { } { } 0 21059 "Implemented %1!d! output pins" 0 0 "Design Software" 0 -1 1792105099208 ""} } { } 0 21057 "Implemented %1!d! device resources after synthesis - the final resource count might be different" 0 0 "Analysis & Synthesis" 0 -1 1792105099208 ""} -{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 54 s Quartus Prime " "Quartus Prime Analysis & Synthesis was successful. 0 errors, 54 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "440 " "Peak virtual memory: 440 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Design Software" 0 -1 1792105099231 ""} { "Info" "IQEXE_END_BANNER_TIME" "Fri Oct 16 09:58:19 2026 " "Processing ended: Fri Oct 16 09:58:19 2026" { } { } 0 0 "Processing ended: %1!s!" 0 0 "Design Software" 0 -1 1792105099231 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:13 " "Elapsed time: 00:00:13" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "Design Software" 0 -1 1792105099231 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:27 " "Total CPU time (on all processors): 00:00:27" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Design Software" 0 -1 1792105099231 ""} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Analysis & Synthesis" 0 -1 1792105099231 ""} +{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "Design Software" 0 -1 1792120843779 ""} +{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus Prime " "Running Quartus Prime Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 25.1std.0 Build 1129 10/21/2025 SC Lite Edition " "Version 25.1std.0 Build 1129 10/21/2025 SC Lite Edition" { } { } 0 0 "%1!s!" 0 0 "Design Software" 0 -1 1792120843779 ""} { "Info" "IQEXE_START_BANNER_TIME" "Fri Oct 16 14:20:43 2026 " "Processing started: Fri Oct 16 14:20:43 2026" { } { } 0 0 "Processing started: %1!s!" 0 0 "Design Software" 0 -1 1792120843779 ""} } { } 4 0 "Running %2!s! %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1792120843779 ""} +{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off assignment2 -c assignment2 " "Command: quartus_map --read_settings_files=on --write_settings_files=off assignment2 -c assignment2" { } { } 0 0 "Command: %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1792120843780 ""} +{ "Info" "IQCU_PARALLEL_SHOW_MANUAL_NUM_PROCS" "2 " "Parallel compilation is enabled and will use up to 2 processors" { } { } 0 20032 "Parallel compilation is enabled and will use up to %1!i! processors" 0 0 "Analysis & Synthesis" 0 -1 1792120844142 ""} +{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv 14 14 " "Found 14 design units, including 14 entities, in source file /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv" { { "Info" "ISGN_ENTITY_NAME" "1 rom " "Found entity 1: rom" { } { { "../../modules/rom.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/rom.sv" 4 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1792120853036 ""} { "Info" "ISGN_ENTITY_NAME" "2 ram " "Found entity 2: ram" { } { { "../../modules/ram.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/ram.sv" 4 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1792120853036 ""} { "Info" "ISGN_ENTITY_NAME" "3 register_file " "Found entity 3: register_file" { } { { "../../modules/register_file.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/register_file.sv" 4 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1792120853036 ""} { "Info" "ISGN_ENTITY_NAME" "4 instruction_counter " "Found entity 4: instruction_counter" { } { { "../../modules/instruction_counter.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/instruction_counter.sv" 4 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1792120853036 ""} { "Info" "ISGN_ENTITY_NAME" "5 instruction_classifier " "Found entity 5: instruction_classifier" { } { { "../../modules/instruction_classifier.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/instruction_classifier.sv" 3 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1792120853036 ""} { "Info" "ISGN_ENTITY_NAME" "6 control_unit " "Found entity 6: control_unit" { } { { "../../modules/control_unit.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/control_unit.sv" 5 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1792120853036 ""} { "Info" "ISGN_ENTITY_NAME" "7 asu " "Found entity 7: asu" { } { { "../../modules/asu.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/asu.sv" 4 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1792120853036 ""} { "Info" "ISGN_ENTITY_NAME" "8 lu " "Found entity 8: lu" { } { { "../../modules/lu.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/lu.sv" 3 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1792120853036 ""} { "Info" "ISGN_ENTITY_NAME" "9 alu " "Found entity 9: alu" { } { { "../../modules/alu.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/alu.sv" 10 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1792120853036 ""} { "Info" "ISGN_ENTITY_NAME" "10 shifter " "Found entity 10: shifter" { } { { "../../modules/shifter.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/shifter.sv" 3 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1792120853036 ""} { "Info" "ISGN_ENTITY_NAME" "11 sign_extender " "Found entity 11: sign_extender" { } { { "../../modules/sign_extender.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/sign_extender.sv" 4 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1792120853036 ""} { "Info" "ISGN_ENTITY_NAME" "12 seven_seg " "Found entity 12: seven_seg" { } { { "../../modules/seven_seg.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/seven_seg.sv" 3 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1792120853036 ""} { "Info" "ISGN_ENTITY_NAME" "13 seven_seg_4digit " "Found entity 13: seven_seg_4digit" { } { { "../../modules/seven_seg_4digit.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/seven_seg_4digit.sv" 5 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1792120853036 ""} { "Info" "ISGN_ENTITY_NAME" "14 assignment2 " "Found entity 14: assignment2" { } { { "../../modules/assignment2.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv" 15 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1792120853036 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1792120853036 ""} +{ "Info" "ISGN_START_ELABORATION_TOP" "assignment2 " "Elaborating entity \"assignment2\" for the top level hierarchy" { } { } 0 12127 "Elaborating entity \"%1!s!\" for the top level hierarchy" 0 0 "Analysis & Synthesis" 0 -1 1792120853196 ""} +{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "instruction_counter instruction_counter:PC " "Elaborating entity \"instruction_counter\" for hierarchy \"instruction_counter:PC\"" { } { { "../../modules/assignment2.sv" "PC" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv" 59 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1792120853203 ""} +{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "rom rom:ROM " "Elaborating entity \"rom\" for hierarchy \"rom:ROM\"" { } { { "../../modules/assignment2.sv" "ROM" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv" 61 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1792120853238 ""} +{ "Warning" "WVRFX_VERI_2111_UNCONVERTED" "18 0 1023 rom.sv(16) " "Verilog HDL warning at rom.sv(16): number of words (18) in memory file does not match the number of elements in the address range \[0:1023\]" { } { { "../../modules/rom.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/rom.sv" 16 0 0 } } } 0 10850 "Verilog HDL warning at %4!s!: number of words (%1!d!) in memory file does not match the number of elements in the address range \[%2!d!:%3!d!\]" 0 0 "Analysis & Synthesis" 0 -1 1792120853247 "|assignment2|rom:ROM"} +{ "Warning" "WVRFX_VDB_DRIVERLESS_NET" "mem.data_a 0 rom.sv(9) " "Net \"mem.data_a\" at rom.sv(9) has no driver or initial value, using a default initial value '0'" { } { { "../../modules/rom.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/rom.sv" 9 0 0 } } } 0 10030 "Net \"%1!s!\" at %3!s! has no driver or initial value, using a default initial value '%2!c!'" 0 0 "Analysis & Synthesis" 0 -1 1792120853273 "|assignment2|rom:ROM"} +{ "Warning" "WVRFX_VDB_DRIVERLESS_NET" "mem.waddr_a 0 rom.sv(9) " "Net \"mem.waddr_a\" at rom.sv(9) has no driver or initial value, using a default initial value '0'" { } { { "../../modules/rom.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/rom.sv" 9 0 0 } } } 0 10030 "Net \"%1!s!\" at %3!s! has no driver or initial value, using a default initial value '%2!c!'" 0 0 "Analysis & Synthesis" 0 -1 1792120853273 "|assignment2|rom:ROM"} +{ "Warning" "WVRFX_VDB_DRIVERLESS_NET" "mem.we_a 0 rom.sv(9) " "Net \"mem.we_a\" at rom.sv(9) has no driver or initial value, using a default initial value '0'" { } { { "../../modules/rom.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/rom.sv" 9 0 0 } } } 0 10030 "Net \"%1!s!\" at %3!s! has no driver or initial value, using a default initial value '%2!c!'" 0 0 "Analysis & Synthesis" 0 -1 1792120853274 "|assignment2|rom:ROM"} +{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "ram ram:RAM " "Elaborating entity \"ram\" for hierarchy \"ram:RAM\"" { } { { "../../modules/assignment2.sv" "RAM" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv" 64 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1792120853279 ""} +{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 5 ram.sv(24) " "Verilog HDL assignment warning at ram.sv(24): truncated value with size 32 to match size of target (5)" { } { { "../../modules/ram.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/ram.sv" 24 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1792120853384 "|assignment2|ram:RAM"} +{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "control_unit control_unit:CONTROL_UNIT " "Elaborating entity \"control_unit\" for hierarchy \"control_unit:CONTROL_UNIT\"" { } { { "../../modules/assignment2.sv" "CONTROL_UNIT" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv" 68 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1792120853600 ""} +{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "6 1 control_unit.sv(26) " "Verilog HDL assignment warning at control_unit.sv(26): truncated value with size 6 to match size of target (1)" { } { { "../../modules/control_unit.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/control_unit.sv" 26 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1792120853601 "|assignment2|control_unit:CONTROL_UNIT"} +{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "6 1 control_unit.sv(27) " "Verilog HDL assignment warning at control_unit.sv(27): truncated value with size 6 to match size of target (1)" { } { { "../../modules/control_unit.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/control_unit.sv" 27 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1792120853601 "|assignment2|control_unit:CONTROL_UNIT"} +{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "8 4 control_unit.sv(29) " "Verilog HDL assignment warning at control_unit.sv(29): truncated value with size 8 to match size of target (4)" { } { { "../../modules/control_unit.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/control_unit.sv" 29 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1792120853601 "|assignment2|control_unit:CONTROL_UNIT"} +{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "instruction_classifier control_unit:CONTROL_UNIT\|instruction_classifier:CLASSIFIER " "Elaborating entity \"instruction_classifier\" for hierarchy \"control_unit:CONTROL_UNIT\|instruction_classifier:CLASSIFIER\"" { } { { "../../modules/control_unit.sv" "CLASSIFIER" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/control_unit.sv" 23 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1792120853604 ""} +{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "register_file register_file:REGS " "Elaborating entity \"register_file\" for hierarchy \"register_file:REGS\"" { } { { "../../modules/assignment2.sv" "REGS" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv" 77 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1792120853608 ""} +{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "sign_extender sign_extender:SIGNEXT " "Elaborating entity \"sign_extender\" for hierarchy \"sign_extender:SIGNEXT\"" { } { { "../../modules/assignment2.sv" "SIGNEXT" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv" 80 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1792120853719 ""} +{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "16 1 sign_extender.sv(10) " "Verilog HDL assignment warning at sign_extender.sv(10): truncated value with size 16 to match size of target (1)" { } { { "../../modules/sign_extender.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/sign_extender.sv" 10 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1792120853719 "|assignment2|sign_extender:SIGNEXT"} +{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "alu alu:ALU " "Elaborating entity \"alu\" for hierarchy \"alu:ALU\"" { } { { "../../modules/assignment2.sv" "ALU" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv" 82 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1792120853725 ""} +{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "asu alu:ALU\|asu:adder_unit " "Elaborating entity \"asu\" for hierarchy \"alu:ALU\|asu:adder_unit\"" { } { { "../../modules/alu.sv" "adder_unit" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/alu.sv" 21 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1792120853733 ""} +{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "lu alu:ALU\|lu:logic_unit " "Elaborating entity \"lu\" for hierarchy \"alu:ALU\|lu:logic_unit\"" { } { { "../../modules/alu.sv" "logic_unit" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/alu.sv" 24 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1792120853746 ""} +{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "seven_seg_4digit seven_seg_4digit:display " "Elaborating entity \"seven_seg_4digit\" for hierarchy \"seven_seg_4digit:display\"" { } { { "../../modules/assignment2.sv" "display" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv" 110 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1792120853752 ""} +{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "seven_seg seven_seg_4digit:display\|seven_seg:digit0 " "Elaborating entity \"seven_seg\" for hierarchy \"seven_seg_4digit:display\|seven_seg:digit0\"" { } { { "../../modules/seven_seg_4digit.sv" "digit0" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/seven_seg_4digit.sv" 18 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1792120853755 ""} +{ "Warning" "WCDB_CDB_RAM_MIF_CONTAIN_DONT_CARE" "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/Quartus/A2/db/assignment2.ram0_rom_a404080c.hdl.mif " "Memory Initialization File or Hexadecimal (Intel-Format) File \"/home/oliver/Documents/FPGA_Dev/FPGA_Uni/Quartus/A2/db/assignment2.ram0_rom_a404080c.hdl.mif\" contains \"don't care\" values -- overwriting them with 0s" { } { } 0 127007 "Memory Initialization File or Hexadecimal (Intel-Format) File \"%1!s!\" contains \"don't care\" values -- overwriting them with 0s" 0 0 "Analysis & Synthesis" 0 -1 1792120854747 ""} +{ "Warning" "WSGN_CONNECTIVITY_WARNINGS" "2 " "2 hierarchies have connectivity warnings - see the Connectivity Checks report folder" { } { } 0 12241 "%1!d! hierarchies have connectivity warnings - see the Connectivity Checks report folder" 0 0 "Analysis & Synthesis" 0 -1 1792120857467 ""} +{ "Warning" "WMLS_MLS_STUCK_PIN_HDR" "" "Output pins are stuck at VCC or GND" { { "Warning" "WMLS_MLS_STUCK_PIN" "out_seg_0\[0\] GND " "Pin \"out_seg_0\[0\]\" is stuck at GND" { } { { "../../modules/assignment2.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv" 23 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1792120859843 "|assignment2|out_seg_0[0]"} { "Warning" "WMLS_MLS_STUCK_PIN" "out_seg_1\[0\] GND " "Pin \"out_seg_1\[0\]\" is stuck at GND" { } { { "../../modules/assignment2.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv" 24 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1792120859843 "|assignment2|out_seg_1[0]"} { "Warning" "WMLS_MLS_STUCK_PIN" "out_seg_2\[0\] GND " "Pin \"out_seg_2\[0\]\" is stuck at GND" { } { { "../../modules/assignment2.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv" 25 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1792120859843 "|assignment2|out_seg_2[0]"} { "Warning" "WMLS_MLS_STUCK_PIN" "out_seg_3\[0\] GND " "Pin \"out_seg_3\[0\]\" is stuck at GND" { } { { "../../modules/assignment2.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv" 28 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1792120859843 "|assignment2|out_seg_3[0]"} } { } 0 13024 "Output pins are stuck at VCC or GND" 0 0 "Analysis & Synthesis" 0 -1 1792120859843 ""} +{ "Info" "ISUTIL_TIMING_DRIVEN_SYNTHESIS_RUNNING" "" "Timing-Driven Synthesis is running" { } { } 0 286030 "Timing-Driven Synthesis is running" 0 0 "Analysis & Synthesis" 0 -1 1792120860125 ""} +{ "Info" "IBPM_HARD_BLOCK_PARTITION_CREATED" "hard_block:auto_generated_inst " "Generating hard_block partition \"hard_block:auto_generated_inst\"" { { "Info" "IBPM_HARD_BLOCK_PARTITION_NODE" "0 0 0 0 0 " "Adding 0 node(s), including 0 DDIO, 0 PLL, 0 transceiver and 0 LCELL" { } { } 0 16011 "Adding %1!d! node(s), including %2!d! DDIO, %3!d! PLL, %4!d! transceiver and %5!d! LCELL" 0 0 "Design Software" 0 -1 1792120863166 ""} } { } 0 16010 "Generating hard_block partition \"%1!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1792120863166 ""} +{ "Info" "ICUT_CUT_TM_SUMMARY" "4331 " "Implemented 4331 device resources after synthesis - the final resource count might be different" { { "Info" "ICUT_CUT_TM_IPINS" "9 " "Implemented 9 input pins" { } { } 0 21058 "Implemented %1!d! input pins" 0 0 "Design Software" 0 -1 1792120863479 ""} { "Info" "ICUT_CUT_TM_OPINS" "32 " "Implemented 32 output pins" { } { } 0 21059 "Implemented %1!d! output pins" 0 0 "Design Software" 0 -1 1792120863479 ""} { "Info" "ICUT_CUT_TM_LCELLS" "4290 " "Implemented 4290 logic cells" { } { } 0 21061 "Implemented %1!d! logic cells" 0 0 "Design Software" 0 -1 1792120863479 ""} } { } 0 21057 "Implemented %1!d! device resources after synthesis - the final resource count might be different" 0 0 "Analysis & Synthesis" 0 -1 1792120863479 ""} +{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 16 s Quartus Prime " "Quartus Prime Analysis & Synthesis was successful. 0 errors, 16 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "465 " "Peak virtual memory: 465 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Design Software" 0 -1 1792120863495 ""} { "Info" "IQEXE_END_BANNER_TIME" "Fri Oct 16 14:21:03 2026 " "Processing ended: Fri Oct 16 14:21:03 2026" { } { } 0 0 "Processing ended: %1!s!" 0 0 "Design Software" 0 -1 1792120863495 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:20 " "Elapsed time: 00:00:20" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "Design Software" 0 -1 1792120863495 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:33 " "Total CPU time (on all processors): 00:00:33" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Design Software" 0 -1 1792120863495 ""} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Analysis & Synthesis" 0 -1 1792120863495 ""} diff --git a/Quartus/A2/db/assignment2.map.rdb b/Quartus/A2/db/assignment2.map.rdb index d6dc3f1..d7cde5f 100644 Binary files a/Quartus/A2/db/assignment2.map.rdb and b/Quartus/A2/db/assignment2.map.rdb differ diff --git a/Quartus/A2/db/assignment2.map_bb.cdb b/Quartus/A2/db/assignment2.map_bb.cdb index 942adeb..2a8875e 100644 Binary files a/Quartus/A2/db/assignment2.map_bb.cdb and b/Quartus/A2/db/assignment2.map_bb.cdb differ diff --git a/Quartus/A2/db/assignment2.map_bb.hdb b/Quartus/A2/db/assignment2.map_bb.hdb index e0c61d3..c1a1756 100644 Binary files a/Quartus/A2/db/assignment2.map_bb.hdb and b/Quartus/A2/db/assignment2.map_bb.hdb differ diff --git a/Quartus/A2/db/assignment2.pplq.rdb b/Quartus/A2/db/assignment2.pplq.rdb index e1f255e..46c284e 100644 Binary files a/Quartus/A2/db/assignment2.pplq.rdb and b/Quartus/A2/db/assignment2.pplq.rdb differ diff --git a/Quartus/A2/db/assignment2.pre_map.hdb b/Quartus/A2/db/assignment2.pre_map.hdb index 7d3da6c..2097352 100644 Binary files a/Quartus/A2/db/assignment2.pre_map.hdb and b/Quartus/A2/db/assignment2.pre_map.hdb differ diff --git a/Quartus/A2/db/assignment2.quiproj.36761.rdr.flock b/Quartus/A2/db/assignment2.quiproj.36761.rdr.flock new file mode 100644 index 0000000..e69de29 diff --git a/Quartus/A2/db/assignment2.ram0_ram_2a357acf.hdl.mif b/Quartus/A2/db/assignment2.ram0_ram_2a357acf.hdl.mif new file mode 100644 index 0000000..e37a350 --- /dev/null +++ b/Quartus/A2/db/assignment2.ram0_ram_2a357acf.hdl.mif @@ -0,0 +1,268 @@ +-- begin_signature +-- ram(datawidth +-- 5) +-- end_signature +WIDTH=32; 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+ 9 : 00000001001011011000100000100101; + 8 : 00000001001011011000000000100100; + 7 : 00000001100011010111000000100000; + 6 : 00100001001011010000000000000011; + 5 : 00000001001010110110000000100010; + 4 : 00000001001010100101100000100001; + 3 : 10001101000010100000000000000000; + 2 : 10101101000010010000000000000000; + 1 : 00100101000010010000000000000111; + 0 : 00000001000010000100000000100011; +END; diff --git a/Quartus/A2/db/assignment2.root_partition.map.reg_db.cdb b/Quartus/A2/db/assignment2.root_partition.map.reg_db.cdb index 843d689..4b90851 100644 Binary files a/Quartus/A2/db/assignment2.root_partition.map.reg_db.cdb and b/Quartus/A2/db/assignment2.root_partition.map.reg_db.cdb differ diff --git a/Quartus/A2/db/assignment2.routing.rdb b/Quartus/A2/db/assignment2.routing.rdb index faae01f..8b33217 100644 Binary files a/Quartus/A2/db/assignment2.routing.rdb and b/Quartus/A2/db/assignment2.routing.rdb differ diff --git a/Quartus/A2/db/assignment2.rtlv.hdb b/Quartus/A2/db/assignment2.rtlv.hdb index 48c264b..15c5baa 100644 Binary files a/Quartus/A2/db/assignment2.rtlv.hdb and b/Quartus/A2/db/assignment2.rtlv.hdb differ diff --git a/Quartus/A2/db/assignment2.rtlv_sg.cdb b/Quartus/A2/db/assignment2.rtlv_sg.cdb index 220fd40..1558c12 100644 Binary files a/Quartus/A2/db/assignment2.rtlv_sg.cdb and b/Quartus/A2/db/assignment2.rtlv_sg.cdb differ diff --git a/Quartus/A2/db/assignment2.rtlv_sg_swap.cdb b/Quartus/A2/db/assignment2.rtlv_sg_swap.cdb index 6a5f81f..09295d0 100644 Binary files a/Quartus/A2/db/assignment2.rtlv_sg_swap.cdb and b/Quartus/A2/db/assignment2.rtlv_sg_swap.cdb differ diff --git a/Quartus/A2/db/assignment2.sta.qmsg b/Quartus/A2/db/assignment2.sta.qmsg index 866a77d..ceea258 100644 --- a/Quartus/A2/db/assignment2.sta.qmsg +++ b/Quartus/A2/db/assignment2.sta.qmsg @@ -1,60 +1,51 @@ -{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "Design Software" 0 -1 1792105137783 ""} -{ "Info" "IQEXE_START_BANNER_PRODUCT" "Timing Analyzer Quartus Prime " "Running Quartus Prime Timing Analyzer" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 25.1std.0 Build 1129 10/21/2025 SC Lite Edition " "Version 25.1std.0 Build 1129 10/21/2025 SC Lite Edition" { } { } 0 0 "%1!s!" 0 0 "Design Software" 0 -1 1792105137783 ""} { "Info" "IQEXE_START_BANNER_TIME" "Fri Oct 16 09:58:57 2026 " "Processing started: Fri Oct 16 09:58:57 2026" { } { } 0 0 "Processing started: %1!s!" 0 0 "Design Software" 0 -1 1792105137783 ""} } { } 4 0 "Running %2!s! %1!s!" 0 0 "Timing Analyzer" 0 -1 1792105137783 ""} -{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_sta assignment2 -c assignment2 " "Command: quartus_sta assignment2 -c assignment2" { } { } 0 0 "Command: %1!s!" 0 0 "Timing Analyzer" 0 -1 1792105137783 ""} -{ "Info" "0" "" "qsta_default_script.tcl version: #1" { } { } 0 0 "qsta_default_script.tcl version: #1" 0 0 "Timing Analyzer" 0 0 1792105137844 ""} -{ "Info" "IQCU_PARALLEL_SHOW_MANUAL_NUM_PROCS" "2 " "Parallel compilation is enabled and will use up to 2 processors" { } { } 0 20032 "Parallel compilation is enabled and will use up to %1!i! processors" 0 0 "Timing Analyzer" 0 -1 1792105138346 ""} -{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "Low junction temperature 0 degrees C " "Low junction temperature is 0 degrees C" { } { } 0 21077 "%1!s! is %2!s!" 0 0 "Timing Analyzer" 0 -1 1792105138416 ""} -{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "High junction temperature 85 degrees C " "High junction temperature is 85 degrees C" { } { } 0 21077 "%1!s! is %2!s!" 0 0 "Timing Analyzer" 0 -1 1792105138416 ""} -{ "Critical Warning" "WSTA_SDC_NOT_FOUND" "assignment2.sdc " "Synopsys Design Constraints File file not found: 'assignment2.sdc'. A Synopsys Design Constraints File is required by the Timing Analyzer to get proper timing constraints. Without it, the Compiler will not properly optimize the design." { } { } 1 332012 "Synopsys Design Constraints File file not found: '%1!s!'. A Synopsys Design Constraints File is required by the Timing Analyzer to get proper timing constraints. Without it, the Compiler will not properly optimize the design." 0 0 "Timing Analyzer" 0 -1 1792105138989 ""} -{ "Info" "ISTA_NO_CLOCK_FOUND_DERIVING" "base clocks \"derive_clocks -period 1.0\" " "No user constrained base clocks found in the design. Calling \"derive_clocks -period 1.0\"" { } { } 0 332142 "No user constrained %1!s! found in the design. Calling %2!s!" 0 0 "Timing Analyzer" 0 -1 1792105138990 ""} -{ "Info" "ISTA_DERIVE_CLOCKS_FOUND_NO_CLOCKS" "" "The command derive_clocks did not find any clocks to derive. No clocks were created or changed." { } { } 0 332096 "The command derive_clocks did not find any clocks to derive. No clocks were created or changed." 0 0 "Timing Analyzer" 0 -1 1792105138990 ""} -{ "Warning" "WSTA_NO_CLOCKS_DEFINED" "" "No clocks defined in design." { } { } 0 332068 "No clocks defined in design." 0 0 "Timing Analyzer" 0 -1 1792105138990 ""} -{ "Info" "ISTA_NO_CLOCK_UNCERTAINTY_FOUND_DERIVING" "\"derive_clock_uncertainty\" " "No user constrained clock uncertainty found in the design. Calling \"derive_clock_uncertainty\"" { } { } 0 332143 "No user constrained clock uncertainty found in the design. Calling %1!s!" 0 0 "Timing Analyzer" 0 -1 1792105138991 ""} -{ "Info" "ISTA_NO_UNCERTAINTY_FOUND" "" "The derive_clock_uncertainty command did not apply clock uncertainty to any clock-to-clock transfers." { } { } 0 332154 "The derive_clock_uncertainty command did not apply clock uncertainty to any clock-to-clock transfers." 0 0 "Timing Analyzer" 0 -1 1792105138991 ""} -{ "Info" "0" "" "Found TIMING_ANALYZER_REPORT_SCRIPT_INCLUDE_DEFAULT_ANALYSIS = ON" { } { } 0 0 "Found TIMING_ANALYZER_REPORT_SCRIPT_INCLUDE_DEFAULT_ANALYSIS = ON" 0 0 "Timing Analyzer" 0 0 1792105138991 ""} -{ "Info" "ISTA_NO_CLOCKS_TO_REPORT" "" "No clocks to report" { } { } 0 332159 "No clocks to report" 0 0 "Timing Analyzer" 0 -1 1792105138998 ""} -{ "Info" "0" "" "Analyzing Slow 1100mV 85C Model" { } { } 0 0 "Analyzing Slow 1100mV 85C Model" 0 0 "Timing Analyzer" 0 0 1792105138999 ""} -{ "Info" "ISTA_NO_PATHS_TO_REPORT" "fmax " "No fmax paths to report" { } { } 0 332140 "No %1!s! paths to report" 0 0 "Timing Analyzer" 0 -1 1792105139000 ""} -{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Setup " "No Setup paths to report" { } { } 0 332140 "No %1!s! paths to report" 0 0 "Timing Analyzer" 0 -1 1792105139003 ""} -{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Hold " "No Hold paths to report" { } { } 0 332140 "No %1!s! paths to report" 0 0 "Timing Analyzer" 0 -1 1792105139004 ""} -{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Recovery " "No Recovery paths to report" { } { } 0 332140 "No %1!s! paths to report" 0 0 "Timing Analyzer" 0 -1 1792105139005 ""} -{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Removal " "No Removal paths to report" { } { } 0 332140 "No %1!s! paths to report" 0 0 "Timing Analyzer" 0 -1 1792105139006 ""} -{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Minimum Pulse Width " "No Minimum Pulse Width paths to report" { } { } 0 332140 "No %1!s! paths to report" 0 0 "Timing Analyzer" 0 -1 1792105139006 ""} -{ "Info" "0" "" "Analyzing Slow 1100mV 0C Model" { } { } 0 0 "Analyzing Slow 1100mV 0C Model" 0 0 "Timing Analyzer" 0 0 1792105139008 ""} -{ "Info" "ITAPI_TAPI_STARTED" "" "Started post-fitting delay annotation" { } { } 0 334003 "Started post-fitting delay annotation" 0 0 "Timing Analyzer" 0 -1 1792105139053 ""} -{ "Info" "ITAPI_TAPI_COMPLETED" "" "Delay annotation completed successfully" { } { } 0 334004 "Delay annotation completed successfully" 0 0 "Timing Analyzer" 0 -1 1792105140053 ""} -{ "Info" "ISTA_NO_CLOCK_FOUND_DERIVING" "base clocks \"derive_clocks -period 1.0\" " "No user constrained base clocks found in the design. Calling \"derive_clocks -period 1.0\"" { } { } 0 332142 "No user constrained %1!s! found in the design. Calling %2!s!" 0 0 "Timing Analyzer" 0 -1 1792105140144 ""} -{ "Info" "ISTA_DERIVE_CLOCKS_FOUND_NO_CLOCKS" "" "The command derive_clocks did not find any clocks to derive. No clocks were created or changed." { } { } 0 332096 "The command derive_clocks did not find any clocks to derive. No clocks were created or changed." 0 0 "Timing Analyzer" 0 -1 1792105140144 ""} -{ "Warning" "WSTA_NO_CLOCKS_DEFINED" "" "No clocks defined in design." { } { } 0 332068 "No clocks defined in design." 0 0 "Timing Analyzer" 0 -1 1792105140145 ""} -{ "Info" "ISTA_NO_UNCERTAINTY_FOUND" "" "The derive_clock_uncertainty command did not apply clock uncertainty to any clock-to-clock transfers." { } { } 0 332154 "The derive_clock_uncertainty command did not apply clock uncertainty to any clock-to-clock transfers." 0 0 "Timing Analyzer" 0 -1 1792105140145 ""} -{ "Info" "ISTA_NO_PATHS_TO_REPORT" "fmax " "No fmax paths to report" { } { } 0 332140 "No %1!s! paths to report" 0 0 "Timing Analyzer" 0 -1 1792105140146 ""} -{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Setup " "No Setup paths to report" { } { } 0 332140 "No %1!s! paths to report" 0 0 "Timing Analyzer" 0 -1 1792105140147 ""} -{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Hold " "No Hold paths to report" { } { } 0 332140 "No %1!s! paths to report" 0 0 "Timing Analyzer" 0 -1 1792105140148 ""} -{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Recovery " "No Recovery paths to report" { } { } 0 332140 "No %1!s! paths to report" 0 0 "Timing Analyzer" 0 -1 1792105140149 ""} -{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Removal " "No Removal paths to report" { } { } 0 332140 "No %1!s! paths to report" 0 0 "Timing Analyzer" 0 -1 1792105140149 ""} -{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Minimum Pulse Width " "No Minimum Pulse Width paths to report" { } { } 0 332140 "No %1!s! paths to report" 0 0 "Timing Analyzer" 0 -1 1792105140150 ""} -{ "Info" "0" "" "Analyzing Fast 1100mV 85C Model" { } { } 0 0 "Analyzing Fast 1100mV 85C Model" 0 0 "Timing Analyzer" 0 0 1792105140152 ""} -{ "Info" "ITAPI_TAPI_STARTED" "" "Started post-fitting delay annotation" { } { } 0 334003 "Started post-fitting delay annotation" 0 0 "Timing Analyzer" 0 -1 1792105140395 ""} -{ "Info" "ITAPI_TAPI_COMPLETED" "" "Delay annotation completed successfully" { } { } 0 334004 "Delay annotation completed successfully" 0 0 "Timing Analyzer" 0 -1 1792105140964 ""} -{ "Info" "ISTA_NO_CLOCK_FOUND_DERIVING" "base clocks \"derive_clocks -period 1.0\" " "No user constrained base clocks found in the design. Calling \"derive_clocks -period 1.0\"" { } { } 0 332142 "No user constrained %1!s! found in the design. Calling %2!s!" 0 0 "Timing Analyzer" 0 -1 1792105141005 ""} -{ "Info" "ISTA_DERIVE_CLOCKS_FOUND_NO_CLOCKS" "" "The command derive_clocks did not find any clocks to derive. No clocks were created or changed." { } { } 0 332096 "The command derive_clocks did not find any clocks to derive. No clocks were created or changed." 0 0 "Timing Analyzer" 0 -1 1792105141005 ""} -{ "Warning" "WSTA_NO_CLOCKS_DEFINED" "" "No clocks defined in design." { } { } 0 332068 "No clocks defined in design." 0 0 "Timing Analyzer" 0 -1 1792105141005 ""} -{ "Info" "ISTA_NO_UNCERTAINTY_FOUND" "" "The derive_clock_uncertainty command did not apply clock uncertainty to any clock-to-clock transfers." { } { } 0 332154 "The derive_clock_uncertainty command did not apply clock uncertainty to any clock-to-clock transfers." 0 0 "Timing Analyzer" 0 -1 1792105141005 ""} -{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Setup " "No Setup paths to report" { } { } 0 332140 "No %1!s! paths to report" 0 0 "Timing Analyzer" 0 -1 1792105141006 ""} -{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Hold " "No Hold paths to report" { } { } 0 332140 "No %1!s! paths to report" 0 0 "Timing Analyzer" 0 -1 1792105141007 ""} -{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Recovery " "No Recovery paths to report" { } { } 0 332140 "No %1!s! paths to report" 0 0 "Timing Analyzer" 0 -1 1792105141008 ""} -{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Removal " "No Removal paths to report" { } { } 0 332140 "No %1!s! paths to report" 0 0 "Timing Analyzer" 0 -1 1792105141009 ""} -{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Minimum Pulse Width " "No Minimum Pulse Width paths to report" { } { } 0 332140 "No %1!s! paths to report" 0 0 "Timing Analyzer" 0 -1 1792105141009 ""} -{ "Info" "0" "" "Analyzing Fast 1100mV 0C Model" { } { } 0 0 "Analyzing Fast 1100mV 0C Model" 0 0 "Timing Analyzer" 0 0 1792105141011 ""} -{ "Info" "ISTA_NO_CLOCK_FOUND_DERIVING" "base clocks \"derive_clocks -period 1.0\" " "No user constrained base clocks found in the design. Calling \"derive_clocks -period 1.0\"" { } { } 0 332142 "No user constrained %1!s! found in the design. Calling %2!s!" 0 0 "Timing Analyzer" 0 -1 1792105141157 ""} -{ "Info" "ISTA_DERIVE_CLOCKS_FOUND_NO_CLOCKS" "" "The command derive_clocks did not find any clocks to derive. No clocks were created or changed." { } { } 0 332096 "The command derive_clocks did not find any clocks to derive. No clocks were created or changed." 0 0 "Timing Analyzer" 0 -1 1792105141157 ""} -{ "Warning" "WSTA_NO_CLOCKS_DEFINED" "" "No clocks defined in design." { } { } 0 332068 "No clocks defined in design." 0 0 "Timing Analyzer" 0 -1 1792105141157 ""} -{ "Info" "ISTA_NO_UNCERTAINTY_FOUND" "" "The derive_clock_uncertainty command did not apply clock uncertainty to any clock-to-clock transfers." { } { } 0 332154 "The derive_clock_uncertainty command did not apply clock uncertainty to any clock-to-clock transfers." 0 0 "Timing Analyzer" 0 -1 1792105141158 ""} -{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Setup " "No Setup paths to report" { } { } 0 332140 "No %1!s! paths to report" 0 0 "Timing Analyzer" 0 -1 1792105141159 ""} -{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Hold " "No Hold paths to report" { } { } 0 332140 "No %1!s! paths to report" 0 0 "Timing Analyzer" 0 -1 1792105141160 ""} -{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Recovery " "No Recovery paths to report" { } { } 0 332140 "No %1!s! paths to report" 0 0 "Timing Analyzer" 0 -1 1792105141160 ""} -{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Removal " "No Removal paths to report" { } { } 0 332140 "No %1!s! paths to report" 0 0 "Timing Analyzer" 0 -1 1792105141161 ""} -{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Minimum Pulse Width " "No Minimum Pulse Width paths to report" { } { } 0 332140 "No %1!s! paths to report" 0 0 "Timing Analyzer" 0 -1 1792105141162 ""} -{ "Info" "ISTA_UCP_CONSTRAINED" "setup " "Design is fully constrained for setup requirements" { } { } 0 332101 "Design is fully constrained for %1!s! requirements" 0 0 "Timing Analyzer" 0 -1 1792105142807 ""} -{ "Info" "ISTA_UCP_CONSTRAINED" "hold " "Design is fully constrained for hold requirements" { } { } 0 332101 "Design is fully constrained for %1!s! requirements" 0 0 "Timing Analyzer" 0 -1 1792105142808 ""} -{ "Info" "IQEXE_ERROR_COUNT" "Timing Analyzer 0 s 5 s Quartus Prime " "Quartus Prime Timing Analyzer was successful. 0 errors, 5 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "765 " "Peak virtual memory: 765 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Design Software" 0 -1 1792105142843 ""} { "Info" "IQEXE_END_BANNER_TIME" "Fri Oct 16 09:59:02 2026 " "Processing ended: Fri Oct 16 09:59:02 2026" { } { } 0 0 "Processing ended: %1!s!" 0 0 "Design Software" 0 -1 1792105142843 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:05 " "Elapsed time: 00:00:05" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "Design Software" 0 -1 1792105142843 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:05 " "Total CPU time (on all processors): 00:00:05" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Design Software" 0 -1 1792105142843 ""} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Timing Analyzer" 0 -1 1792105142843 ""} +{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "Design Software" 0 -1 1792120990684 ""} +{ "Info" "IQEXE_START_BANNER_PRODUCT" "Timing Analyzer Quartus Prime " "Running Quartus Prime Timing Analyzer" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 25.1std.0 Build 1129 10/21/2025 SC Lite Edition " "Version 25.1std.0 Build 1129 10/21/2025 SC Lite Edition" { } { } 0 0 "%1!s!" 0 0 "Design Software" 0 -1 1792120990684 ""} { "Info" "IQEXE_START_BANNER_TIME" "Fri Oct 16 14:23:10 2026 " "Processing started: Fri Oct 16 14:23:10 2026" { } { } 0 0 "Processing started: %1!s!" 0 0 "Design Software" 0 -1 1792120990684 ""} } { } 4 0 "Running %2!s! %1!s!" 0 0 "Timing Analyzer" 0 -1 1792120990684 ""} +{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_sta assignment2 -c assignment2 " "Command: quartus_sta assignment2 -c assignment2" { } { } 0 0 "Command: %1!s!" 0 0 "Timing Analyzer" 0 -1 1792120990685 ""} +{ "Info" "0" "" "qsta_default_script.tcl version: #1" { } { } 0 0 "qsta_default_script.tcl version: #1" 0 0 "Timing Analyzer" 0 0 1792120990753 ""} +{ "Info" "IQCU_PARALLEL_SHOW_MANUAL_NUM_PROCS" "2 " "Parallel compilation is enabled and will use up to 2 processors" { } { } 0 20032 "Parallel compilation is enabled and will use up to %1!i! processors" 0 0 "Timing Analyzer" 0 -1 1792120991434 ""} +{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "Low junction temperature 0 degrees C " "Low junction temperature is 0 degrees C" { } { } 0 21077 "%1!s! is %2!s!" 0 0 "Timing Analyzer" 0 -1 1792120991505 ""} +{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "High junction temperature 85 degrees C " "High junction temperature is 85 degrees C" { } { } 0 21077 "%1!s! is %2!s!" 0 0 "Timing Analyzer" 0 -1 1792120991505 ""} +{ "Critical Warning" "WSTA_SDC_NOT_FOUND" "assignment2.sdc " "Synopsys Design Constraints File file not found: 'assignment2.sdc'. A Synopsys Design Constraints File is required by the Timing Analyzer to get proper timing constraints. Without it, the Compiler will not properly optimize the design." { } { } 1 332012 "Synopsys Design Constraints File file not found: '%1!s!'. A Synopsys Design Constraints File is required by the Timing Analyzer to get proper timing constraints. Without it, the Compiler will not properly optimize the design." 0 0 "Timing Analyzer" 0 -1 1792120992374 ""} +{ "Info" "ISTA_NO_CLOCK_FOUND_DERIVING" "base clocks \"derive_clocks -period 1.0\" " "No user constrained base clocks found in the design. Calling \"derive_clocks -period 1.0\"" { } { } 0 332142 "No user constrained %1!s! found in the design. Calling %2!s!" 0 0 "Timing Analyzer" 0 -1 1792120992374 ""} +{ "Info" "ISTA_DERIVE_CLOCKS_INFO" "Deriving Clocks " "Deriving Clocks" { { "Info" "ISTA_DERIVE_CLOCKS_INFO" "create_clock -period 1.000 -name clk\[0\] clk\[0\] " "create_clock -period 1.000 -name clk\[0\] clk\[0\]" { } { } 0 332105 "%1!s!" 0 0 "Design Software" 0 -1 1792120992389 ""} } { } 0 332105 "%1!s!" 0 0 "Timing Analyzer" 0 -1 1792120992389 ""} +{ "Info" "ISTA_NO_CLOCK_UNCERTAINTY_FOUND_DERIVING" "\"derive_clock_uncertainty\" " "No user constrained clock uncertainty found in the design. Calling \"derive_clock_uncertainty\"" { } { } 0 332143 "No user constrained clock uncertainty found in the design. Calling %1!s!" 0 0 "Timing Analyzer" 0 -1 1792120992429 ""} +{ "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "Deriving Clock Uncertainty. Please refer to report_sdc in the Timing Analyzer to see clock uncertainties. " "Deriving Clock Uncertainty. Please refer to report_sdc in the Timing Analyzer to see clock uncertainties." { } { } 0 332123 "%1!s!" 0 0 "Timing Analyzer" 0 -1 1792120992429 ""} +{ "Info" "0" "" "Found TIMING_ANALYZER_REPORT_SCRIPT_INCLUDE_DEFAULT_ANALYSIS = ON" { } { } 0 0 "Found TIMING_ANALYZER_REPORT_SCRIPT_INCLUDE_DEFAULT_ANALYSIS = ON" 0 0 "Timing Analyzer" 0 0 1792120992431 ""} +{ "Info" "0" "" "Analyzing Slow 1100mV 85C Model" { } { } 0 0 "Analyzing Slow 1100mV 85C Model" 0 0 "Timing Analyzer" 0 0 1792120992440 ""} +{ "Critical Warning" "WSTA_TIMING_NOT_MET" "" "Timing requirements not met" { { "Info" "ISTA_TIMING_NOT_MET_USE_ADA" "" "For recommendations on closing timing, run Report Timing Closure Recommendations in the Timing Analyzer." { } { } 0 11105 "For recommendations on closing timing, run Report Timing Closure Recommendations in the Timing Analyzer." 0 0 "Design Software" 0 -1 1792120993330 ""} } { } 1 332148 "Timing requirements not met" 0 0 "Timing Analyzer" 0 -1 1792120993330 ""} +{ "Info" "ISTA_WORST_CASE_SLACK" "setup -14.881 " "Worst-case setup slack is -14.881" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1792120993331 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1792120993331 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -14.881 -27730.277 clk\[0\] " " -14.881 -27730.277 clk\[0\] " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1792120993331 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1792120993331 ""} +{ "Info" "ISTA_WORST_CASE_SLACK" "hold 0.262 " "Worst-case hold slack is 0.262" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1792120993418 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1792120993418 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.262 0.000 clk\[0\] " " 0.262 0.000 clk\[0\] " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1792120993418 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1792120993418 ""} +{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Recovery " "No Recovery paths to report" { } { } 0 332140 "No %1!s! paths to report" 0 0 "Timing Analyzer" 0 -1 1792120993421 ""} +{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Removal " "No Removal paths to report" { } { } 0 332140 "No %1!s! paths to report" 0 0 "Timing Analyzer" 0 -1 1792120993423 ""} +{ "Info" "ISTA_WORST_CASE_SLACK" "minimum pulse width -0.538 " "Worst-case minimum pulse width slack is -0.538" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1792120993426 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1792120993426 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -0.538 -1978.741 clk\[0\] " " -0.538 -1978.741 clk\[0\] " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1792120993426 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1792120993426 ""} +{ "Info" "0" "" "Analyzing Slow 1100mV 0C Model" { } { } 0 0 "Analyzing Slow 1100mV 0C Model" 0 0 "Timing Analyzer" 0 0 1792120993486 ""} +{ "Info" "ITAPI_TAPI_STARTED" "" "Started post-fitting delay annotation" { } { } 0 334003 "Started post-fitting delay annotation" 0 0 "Timing Analyzer" 0 -1 1792120993548 ""} +{ "Info" "ITAPI_TAPI_COMPLETED" "" "Delay annotation completed successfully" { } { } 0 334004 "Delay annotation completed successfully" 0 0 "Timing Analyzer" 0 -1 1792120999229 ""} +{ "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "Deriving Clock Uncertainty. Please refer to report_sdc in the Timing Analyzer to see clock uncertainties. " "Deriving Clock Uncertainty. Please refer to report_sdc in the Timing Analyzer to see clock uncertainties." { } { } 0 332123 "%1!s!" 0 0 "Timing Analyzer" 0 -1 1792120999570 ""} +{ "Critical Warning" "WSTA_TIMING_NOT_MET" "" "Timing requirements not met" { { "Info" "ISTA_TIMING_NOT_MET_USE_ADA" "" "For recommendations on closing timing, run Report Timing Closure Recommendations in the Timing Analyzer." { } { } 0 11105 "For recommendations on closing timing, run Report Timing Closure Recommendations in the Timing Analyzer." 0 0 "Design Software" 0 -1 1792120999820 ""} } { } 1 332148 "Timing requirements not met" 0 0 "Timing Analyzer" 0 -1 1792120999820 ""} +{ "Info" "ISTA_WORST_CASE_SLACK" "setup -14.540 " "Worst-case setup slack is -14.540" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1792120999821 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1792120999821 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -14.540 -27019.196 clk\[0\] " " -14.540 -27019.196 clk\[0\] " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1792120999821 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1792120999821 ""} +{ "Info" "ISTA_WORST_CASE_SLACK" "hold 0.245 " "Worst-case hold slack is 0.245" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1792120999906 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1792120999906 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.245 0.000 clk\[0\] " " 0.245 0.000 clk\[0\] " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1792120999906 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1792120999906 ""} +{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Recovery " "No Recovery paths to report" { } { } 0 332140 "No %1!s! paths to report" 0 0 "Timing Analyzer" 0 -1 1792120999907 ""} +{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Removal " "No Removal paths to report" { } { } 0 332140 "No %1!s! paths to report" 0 0 "Timing Analyzer" 0 -1 1792120999908 ""} +{ "Info" "ISTA_WORST_CASE_SLACK" "minimum pulse width -0.538 " "Worst-case minimum pulse width slack is -0.538" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1792120999912 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1792120999912 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -0.538 -2025.649 clk\[0\] " " -0.538 -2025.649 clk\[0\] " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1792120999912 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1792120999912 ""} +{ "Info" "0" "" "Analyzing Fast 1100mV 85C Model" { } { } 0 0 "Analyzing Fast 1100mV 85C Model" 0 0 "Timing Analyzer" 0 0 1792120999965 ""} +{ "Info" "ITAPI_TAPI_STARTED" "" "Started post-fitting delay annotation" { } { } 0 334003 "Started post-fitting delay annotation" 0 0 "Timing Analyzer" 0 -1 1792121000265 ""} +{ "Info" "ITAPI_TAPI_COMPLETED" "" "Delay annotation completed successfully" { } { } 0 334004 "Delay annotation completed successfully" 0 0 "Timing Analyzer" 0 -1 1792121005166 ""} +{ "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "Deriving Clock Uncertainty. Please refer to report_sdc in the Timing Analyzer to see clock uncertainties. " "Deriving Clock Uncertainty. Please refer to report_sdc in the Timing Analyzer to see clock uncertainties." { } { } 0 332123 "%1!s!" 0 0 "Timing Analyzer" 0 -1 1792121005454 ""} +{ "Critical Warning" "WSTA_TIMING_NOT_MET" "" "Timing requirements not met" { { "Info" "ISTA_TIMING_NOT_MET_USE_ADA" "" "For recommendations on closing timing, run Report Timing Closure Recommendations in the Timing Analyzer." { } { } 0 11105 "For recommendations on closing timing, run Report Timing Closure Recommendations in the Timing Analyzer." 0 0 "Design Software" 0 -1 1792121005545 ""} } { } 1 332148 "Timing requirements not met" 0 0 "Timing Analyzer" 0 -1 1792121005545 ""} +{ "Info" "ISTA_WORST_CASE_SLACK" "setup -7.846 " "Worst-case setup slack is -7.846" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1792121005546 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1792121005546 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -7.846 -13963.900 clk\[0\] " " -7.846 -13963.900 clk\[0\] " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1792121005546 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1792121005546 ""} +{ "Info" "ISTA_WORST_CASE_SLACK" "hold 0.135 " "Worst-case hold slack is 0.135" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1792121005638 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1792121005638 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.135 0.000 clk\[0\] " " 0.135 0.000 clk\[0\] " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1792121005638 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1792121005638 ""} +{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Recovery " "No Recovery paths to report" { } { } 0 332140 "No %1!s! paths to report" 0 0 "Timing Analyzer" 0 -1 1792121005639 ""} +{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Removal " "No Removal paths to report" { } { } 0 332140 "No %1!s! paths to report" 0 0 "Timing Analyzer" 0 -1 1792121005641 ""} +{ "Info" "ISTA_WORST_CASE_SLACK" "minimum pulse width 0.016 " "Worst-case minimum pulse width slack is 0.016" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1792121005644 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1792121005644 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.016 0.000 clk\[0\] " " 0.016 0.000 clk\[0\] " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1792121005644 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1792121005644 ""} +{ "Info" "0" "" "Analyzing Fast 1100mV 0C Model" { } { } 0 0 "Analyzing Fast 1100mV 0C Model" 0 0 "Timing Analyzer" 0 0 1792121005696 ""} +{ "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "Deriving Clock Uncertainty. Please refer to report_sdc in the Timing Analyzer to see clock uncertainties. " "Deriving Clock Uncertainty. Please refer to report_sdc in the Timing Analyzer to see clock uncertainties." { } { } 0 332123 "%1!s!" 0 0 "Timing Analyzer" 0 -1 1792121005994 ""} +{ "Critical Warning" "WSTA_TIMING_NOT_MET" "" "Timing requirements not met" { { "Info" "ISTA_TIMING_NOT_MET_USE_ADA" "" "For recommendations on closing timing, run Report Timing Closure Recommendations in the Timing Analyzer." { } { } 0 11105 "For recommendations on closing timing, run Report Timing Closure Recommendations in the Timing Analyzer." 0 0 "Design Software" 0 -1 1792121006089 ""} } { } 1 332148 "Timing requirements not met" 0 0 "Timing Analyzer" 0 -1 1792121006089 ""} +{ "Info" "ISTA_WORST_CASE_SLACK" "setup -6.879 " "Worst-case setup slack is -6.879" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1792121006090 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1792121006090 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -6.879 -12147.650 clk\[0\] " " -6.879 -12147.650 clk\[0\] " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1792121006090 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1792121006090 ""} +{ "Info" "ISTA_WORST_CASE_SLACK" "hold 0.123 " "Worst-case hold slack is 0.123" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1792121006183 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1792121006183 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.123 0.000 clk\[0\] " " 0.123 0.000 clk\[0\] " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1792121006183 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1792121006183 ""} +{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Recovery " "No Recovery paths to report" { } { } 0 332140 "No %1!s! paths to report" 0 0 "Timing Analyzer" 0 -1 1792121006184 ""} +{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Removal " "No Removal paths to report" { } { } 0 332140 "No %1!s! paths to report" 0 0 "Timing Analyzer" 0 -1 1792121006185 ""} +{ "Info" "ISTA_WORST_CASE_SLACK" "minimum pulse width 0.015 " "Worst-case minimum pulse width slack is 0.015" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1792121006188 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1792121006188 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.015 0.000 clk\[0\] " " 0.015 0.000 clk\[0\] " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1792121006188 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1792121006188 ""} +{ "Info" "ISTA_UCP_NOT_CONSTRAINED" "setup " "Design is not fully constrained for setup requirements" { } { } 0 332102 "Design is not fully constrained for %1!s! requirements" 0 0 "Timing Analyzer" 0 -1 1792121007943 ""} +{ "Info" "ISTA_UCP_NOT_CONSTRAINED" "hold " "Design is not fully constrained for hold requirements" { } { } 0 332102 "Design is not fully constrained for %1!s! requirements" 0 0 "Timing Analyzer" 0 -1 1792121007961 ""} +{ "Info" "IQEXE_ERROR_COUNT" "Timing Analyzer 0 s 5 s Quartus Prime " "Quartus Prime Timing Analyzer was successful. 0 errors, 5 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "854 " "Peak virtual memory: 854 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Design Software" 0 -1 1792121008041 ""} { "Info" "IQEXE_END_BANNER_TIME" "Fri Oct 16 14:23:28 2026 " "Processing ended: Fri Oct 16 14:23:28 2026" { } { } 0 0 "Processing ended: %1!s!" 0 0 "Design Software" 0 -1 1792121008041 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:18 " "Elapsed time: 00:00:18" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "Design Software" 0 -1 1792121008041 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:27 " "Total CPU time (on all processors): 00:00:27" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Design Software" 0 -1 1792121008041 ""} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Timing Analyzer" 0 -1 1792121008041 ""} diff --git a/Quartus/A2/db/assignment2.sta.rdb b/Quartus/A2/db/assignment2.sta.rdb index 134da9b..86627db 100644 Binary files a/Quartus/A2/db/assignment2.sta.rdb and b/Quartus/A2/db/assignment2.sta.rdb differ diff --git a/Quartus/A2/db/assignment2.sta_cmp.7_H6_slow_1100mv_85c.tdb b/Quartus/A2/db/assignment2.sta_cmp.7_H6_slow_1100mv_85c.tdb index bcfe174..4c5efb2 100644 Binary files a/Quartus/A2/db/assignment2.sta_cmp.7_H6_slow_1100mv_85c.tdb and b/Quartus/A2/db/assignment2.sta_cmp.7_H6_slow_1100mv_85c.tdb differ diff --git a/Quartus/A2/db/assignment2.tiscmp.fast_1100mv_0c.ddb b/Quartus/A2/db/assignment2.tiscmp.fast_1100mv_0c.ddb index b99e4bb..2f6377d 100644 Binary files a/Quartus/A2/db/assignment2.tiscmp.fast_1100mv_0c.ddb and b/Quartus/A2/db/assignment2.tiscmp.fast_1100mv_0c.ddb differ diff --git a/Quartus/A2/db/assignment2.tiscmp.fast_1100mv_85c.ddb b/Quartus/A2/db/assignment2.tiscmp.fast_1100mv_85c.ddb index 0de6228..6bc69e9 100644 Binary files a/Quartus/A2/db/assignment2.tiscmp.fast_1100mv_85c.ddb and b/Quartus/A2/db/assignment2.tiscmp.fast_1100mv_85c.ddb differ diff --git a/Quartus/A2/db/assignment2.tiscmp.fastest_slow_1100mv_0c.ddb b/Quartus/A2/db/assignment2.tiscmp.fastest_slow_1100mv_0c.ddb index 7f4ce89..a720ba4 100644 Binary files a/Quartus/A2/db/assignment2.tiscmp.fastest_slow_1100mv_0c.ddb and b/Quartus/A2/db/assignment2.tiscmp.fastest_slow_1100mv_0c.ddb differ diff --git a/Quartus/A2/db/assignment2.tiscmp.fastest_slow_1100mv_85c.ddb b/Quartus/A2/db/assignment2.tiscmp.fastest_slow_1100mv_85c.ddb index 8992b21..3dcff13 100644 Binary files a/Quartus/A2/db/assignment2.tiscmp.fastest_slow_1100mv_85c.ddb and b/Quartus/A2/db/assignment2.tiscmp.fastest_slow_1100mv_85c.ddb differ diff --git a/Quartus/A2/db/assignment2.tiscmp.slow_1100mv_0c.ddb b/Quartus/A2/db/assignment2.tiscmp.slow_1100mv_0c.ddb index 860a340..160852a 100644 Binary files a/Quartus/A2/db/assignment2.tiscmp.slow_1100mv_0c.ddb and b/Quartus/A2/db/assignment2.tiscmp.slow_1100mv_0c.ddb differ diff --git a/Quartus/A2/db/assignment2.tiscmp.slow_1100mv_85c.ddb b/Quartus/A2/db/assignment2.tiscmp.slow_1100mv_85c.ddb index 722b243..71f7ad2 100644 Binary files a/Quartus/A2/db/assignment2.tiscmp.slow_1100mv_85c.ddb and b/Quartus/A2/db/assignment2.tiscmp.slow_1100mv_85c.ddb differ diff --git a/Quartus/A2/db/assignment2.tmw_info b/Quartus/A2/db/assignment2.tmw_info index 318b33b..e94a85e 100644 --- a/Quartus/A2/db/assignment2.tmw_info +++ b/Quartus/A2/db/assignment2.tmw_info @@ -1,7 +1,7 @@ -start_full_compilation:s:00:01:00 -start_analysis_synthesis:s:00:00:14-start_full_compilation +start_full_compilation:s:00:02:50 +start_analysis_synthesis:s:00:00:22-start_full_compilation start_analysis_elaboration:s-start_full_compilation -start_fitter:s:00:00:30-start_full_compilation -start_assembler:s:00:00:07-start_full_compilation -start_timing_analyzer:s:00:00:07-start_full_compilation -start_eda_netlist_writer:s:00:00:02-start_full_compilation +start_fitter:s:00:01:57-start_full_compilation +start_assembler:s:00:00:08-start_full_compilation +start_timing_analyzer:s:00:00:19-start_full_compilation +start_eda_netlist_writer:s:00:00:04-start_full_compilation diff --git a/Quartus/A2/db/assignment2.vpr.ammdb b/Quartus/A2/db/assignment2.vpr.ammdb index 5483578..0e120c4 100644 Binary files a/Quartus/A2/db/assignment2.vpr.ammdb and b/Quartus/A2/db/assignment2.vpr.ammdb differ diff --git a/Quartus/A2/db/assignment2_partition_pins.json b/Quartus/A2/db/assignment2_partition_pins.json index aeab6ee..3313c1c 100644 --- a/Quartus/A2/db/assignment2_partition_pins.json +++ b/Quartus/A2/db/assignment2_partition_pins.json @@ -2,7 +2,156 @@ "partitions" : [ { "name" : "Top", - "pins" : [] + "pins" : [ + { + "name" : "out_seg_0[1]", + "strict" : false + }, + { + "name" : "out_seg_0[2]", + "strict" : false + }, + { + "name" : "out_seg_0[3]", + "strict" : false + }, + { + "name" : "out_seg_0[4]", + "strict" : false + }, + { + "name" : "out_seg_0[5]", + "strict" : false + }, + { + "name" : "out_seg_0[6]", + "strict" : false + }, + { + "name" : "out_seg_0[7]", + "strict" : false + }, + { + "name" : "out_seg_1[1]", + "strict" : false + }, + { + "name" : "out_seg_1[2]", + "strict" : false + }, + { + "name" : "out_seg_1[3]", + "strict" : false + }, + { + "name" : "out_seg_1[4]", + "strict" : false + }, + { + "name" : "out_seg_1[5]", + "strict" : false + }, + { + "name" : "out_seg_1[6]", + "strict" : false + }, + { + "name" : "out_seg_1[7]", + "strict" : false + }, + { + "name" : "out_seg_2[1]", + "strict" : false + }, + { + "name" : "out_seg_2[2]", + "strict" : false + }, + { + "name" : "out_seg_2[3]", + "strict" : false + }, + { + "name" : "out_seg_2[4]", + "strict" : false + }, + { + "name" : "out_seg_2[5]", + "strict" : false + }, + { + "name" : "out_seg_2[6]", + "strict" : false + }, + { + "name" : "out_seg_2[7]", + "strict" : false + }, + { + "name" : "out_seg_3[1]", + "strict" : false + }, + { + "name" : "out_seg_3[2]", + "strict" : false + }, + { + "name" : "out_seg_3[3]", + "strict" : false + }, + { + "name" : "out_seg_3[4]", + "strict" : false + }, + { + "name" : "out_seg_3[5]", + "strict" : false + }, + { + "name" : "out_seg_3[6]", + "strict" : false + }, + { + "name" : "out_seg_3[7]", + "strict" : false + }, + { + "name" : "HID_Hi_Low[0]", + "strict" : false + }, + { + "name" : "HID_Register[4]", + "strict" : false + }, + { + "name" : "HID_Register[3]", + "strict" : false + }, + { + "name" : "HID_Register[1]", + "strict" : false + }, + { + "name" : "HID_Register[2]", + "strict" : false + }, + { + "name" : "HID_Register[0]", + "strict" : false + }, + { + "name" : "HID_PC[0]", + "strict" : false + }, + { + "name" : "clk[0]", + "strict" : false + }, + { + "name" : "rst[0]", + "strict" : false + } + ] } ] } \ No newline at end of file diff --git a/Quartus/A2/db/prev_cmp_assignment2.qmsg b/Quartus/A2/db/prev_cmp_assignment2.qmsg index fa4fb6f..c30f936 100644 --- a/Quartus/A2/db/prev_cmp_assignment2.qmsg +++ b/Quartus/A2/db/prev_cmp_assignment2.qmsg @@ -1,8 +1,145 @@ -{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "Design Software" 0 -1 1792039139461 ""} -{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus Prime " "Running Quartus Prime Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 25.1std.0 Build 1129 10/21/2025 SC Lite Edition " "Version 25.1std.0 Build 1129 10/21/2025 SC Lite Edition" { } { } 0 0 "%1!s!" 0 0 "Design Software" 0 -1 1792039139462 ""} { "Info" "IQEXE_START_BANNER_TIME" "Thu Oct 15 15:38:59 2026 " "Processing started: Thu Oct 15 15:38:59 2026" { } { } 0 0 "Processing started: %1!s!" 0 0 "Design Software" 0 -1 1792039139462 ""} } { } 4 0 "Running %2!s! %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1792039139462 ""} -{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off assignment2 -c assignment2 " "Command: quartus_map --read_settings_files=on --write_settings_files=off assignment2 -c assignment2" { } { } 0 0 "Command: %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1792039139462 ""} -{ "Info" "IQCU_PARALLEL_SHOW_MANUAL_NUM_PROCS" "2 " "Parallel compilation is enabled and will use up to 2 processors" { } { } 0 20032 "Parallel compilation is enabled and will use up to %1!i! processors" 0 0 "Analysis & Synthesis" 0 -1 1792039139787 ""} -{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv 14 14 " "Found 14 design units, including 14 entities, in source file /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv" { { "Info" "ISGN_ENTITY_NAME" "1 rom " "Found entity 1: rom" { } { { "../../modules/rom.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/rom.sv" 4 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1792039148776 ""} { "Info" "ISGN_ENTITY_NAME" "2 ram " "Found entity 2: ram" { } { { "../../modules/ram.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/ram.sv" 4 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1792039148776 ""} { "Info" "ISGN_ENTITY_NAME" "3 register_file " "Found entity 3: register_file" { } { { "../../modules/register_file.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/register_file.sv" 4 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1792039148776 ""} { "Info" "ISGN_ENTITY_NAME" "4 instruction_counter " "Found entity 4: instruction_counter" { } { { "../../modules/instruction_counter.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/instruction_counter.sv" 4 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1792039148776 ""} { "Info" "ISGN_ENTITY_NAME" "5 instruction_classifier " "Found entity 5: instruction_classifier" { } { { "../../modules/instruction_classifier.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/instruction_classifier.sv" 3 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1792039148776 ""} { "Info" "ISGN_ENTITY_NAME" "6 control_unit " "Found entity 6: control_unit" { } { { "../../modules/control_unit.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/control_unit.sv" 5 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1792039148776 ""} { "Info" "ISGN_ENTITY_NAME" "7 asu " "Found entity 7: asu" { } { { "../../modules/asu.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/asu.sv" 4 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1792039148776 ""} { "Info" "ISGN_ENTITY_NAME" "8 lu " "Found entity 8: lu" { } { { "../../modules/lu.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/lu.sv" 3 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1792039148776 ""} { "Info" "ISGN_ENTITY_NAME" "9 alu " "Found entity 9: alu" { } { { "../../modules/alu.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/alu.sv" 9 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1792039148776 ""} { "Info" "ISGN_ENTITY_NAME" "10 shifter " "Found entity 10: shifter" { } { { "../../modules/shifter.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/shifter.sv" 3 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1792039148776 ""} { "Info" "ISGN_ENTITY_NAME" "11 sign_extender " "Found entity 11: sign_extender" { } { { "../../modules/sign_extender.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/sign_extender.sv" 4 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1792039148776 ""} { "Info" "ISGN_ENTITY_NAME" "12 seven_seg " "Found entity 12: seven_seg" { } { { "../../modules/seven_seg.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/seven_seg.sv" 3 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1792039148776 ""} { "Info" "ISGN_ENTITY_NAME" "13 seven_seg_4digit " "Found entity 13: seven_seg_4digit" { } { { "../../modules/seven_seg_4digit.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/seven_seg_4digit.sv" 5 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1792039148776 ""} { "Info" "ISGN_ENTITY_NAME" "14 assignment2 " "Found entity 14: assignment2" { } { { "../../modules/assignment2.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv" 15 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1792039148776 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1792039148776 ""} -{ "Error" "EVRFX_VERI_UNDECLARED_OBJECT" "width ram.sv(13) " "Verilog HDL error at ram.sv(13): object \"width\" is not declared. Verify the object name is correct. If the name is correct, declare the object." { } { { "../../modules/ram.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/ram.sv" 13 0 0 } } } 0 10161 "Verilog HDL error at %2!s!: object \"%1!s!\" is not declared. Verify the object name is correct. If the name is correct, declare the object." 0 0 "Analysis & Synthesis" 0 -1 1792039148778 ""} -{ "Error" "EQEXE_ERROR_COUNT" "Analysis & Synthesis 1 0 s Quartus Prime " "Quartus Prime Analysis & Synthesis was unsuccessful. 1 error, 0 warnings" { { "Error" "EQEXE_END_PEAK_VSIZE_MEMORY" "403 " "Peak virtual memory: 403 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Design Software" 0 -1 1792039148840 ""} { "Error" "EQEXE_END_BANNER_TIME" "Thu Oct 15 15:39:08 2026 " "Processing ended: Thu Oct 15 15:39:08 2026" { } { } 0 0 "Processing ended: %1!s!" 0 0 "Design Software" 0 -1 1792039148840 ""} { "Error" "EQEXE_ELAPSED_TIME" "00:00:09 " "Elapsed time: 00:00:09" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "Design Software" 0 -1 1792039148840 ""} { "Error" "EQEXE_ELAPSED_CPU_TIME" "00:00:23 " "Total CPU time (on all processors): 00:00:23" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Design Software" 0 -1 1792039148840 ""} } { } 0 0 "%6!s! %1!s! was unsuccessful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Analysis & Synthesis" 0 -1 1792039148840 ""} -{ "Error" "EFLOW_ERROR_COUNT" "Full Compilation 3 s 0 s " "Quartus Prime Full Compilation was unsuccessful. 3 errors, 0 warnings" { } { } 0 293001 "Quartus Prime %1!s! was unsuccessful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Analysis & Synthesis" 0 -1 1792039149490 ""} +{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "Design Software" 0 -1 1792119885104 ""} +{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus Prime " "Running Quartus Prime Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 25.1std.0 Build 1129 10/21/2025 SC Lite Edition " "Version 25.1std.0 Build 1129 10/21/2025 SC Lite Edition" { } { } 0 0 "%1!s!" 0 0 "Design Software" 0 -1 1792119885104 ""} { "Info" "IQEXE_START_BANNER_TIME" "Fri Oct 16 14:04:44 2026 " "Processing started: Fri Oct 16 14:04:44 2026" { } { } 0 0 "Processing started: %1!s!" 0 0 "Design Software" 0 -1 1792119885104 ""} } { } 4 0 "Running %2!s! %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1792119885104 ""} +{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off assignment2 -c assignment2 " "Command: quartus_map --read_settings_files=on --write_settings_files=off assignment2 -c assignment2" { } { } 0 0 "Command: %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1792119885105 ""} +{ "Info" "IQCU_PARALLEL_SHOW_MANUAL_NUM_PROCS" "2 " "Parallel compilation is enabled and will use up to 2 processors" { } { } 0 20032 "Parallel compilation is enabled and will use up to %1!i! processors" 0 0 "Analysis & Synthesis" 0 -1 1792119885437 ""} +{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv 14 14 " "Found 14 design units, including 14 entities, in source file /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv" { { "Info" "ISGN_ENTITY_NAME" "1 rom " "Found entity 1: rom" { } { { "../../modules/rom.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/rom.sv" 4 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1792119896448 ""} { "Info" "ISGN_ENTITY_NAME" "2 ram " "Found entity 2: ram" { } { { "../../modules/ram.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/ram.sv" 4 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1792119896448 ""} { "Info" "ISGN_ENTITY_NAME" "3 register_file " "Found entity 3: register_file" { } { { "../../modules/register_file.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/register_file.sv" 4 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1792119896448 ""} { "Info" "ISGN_ENTITY_NAME" "4 instruction_counter " "Found entity 4: instruction_counter" { } { { "../../modules/instruction_counter.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/instruction_counter.sv" 4 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1792119896448 ""} { "Info" "ISGN_ENTITY_NAME" "5 instruction_classifier " "Found entity 5: instruction_classifier" { } { { "../../modules/instruction_classifier.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/instruction_classifier.sv" 3 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1792119896448 ""} { "Info" "ISGN_ENTITY_NAME" "6 control_unit " "Found entity 6: control_unit" { } { { "../../modules/control_unit.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/control_unit.sv" 5 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1792119896448 ""} { "Info" "ISGN_ENTITY_NAME" "7 asu " "Found entity 7: asu" { } { { "../../modules/asu.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/asu.sv" 4 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1792119896448 ""} { "Info" "ISGN_ENTITY_NAME" "8 lu " "Found entity 8: lu" { } { { "../../modules/lu.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/lu.sv" 3 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1792119896448 ""} { "Info" "ISGN_ENTITY_NAME" "9 alu " "Found entity 9: alu" { } { { "../../modules/alu.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/alu.sv" 10 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1792119896448 ""} { "Info" "ISGN_ENTITY_NAME" "10 shifter " "Found entity 10: shifter" { } { { "../../modules/shifter.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/shifter.sv" 3 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1792119896448 ""} { "Info" "ISGN_ENTITY_NAME" "11 sign_extender " "Found entity 11: sign_extender" { } { { "../../modules/sign_extender.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/sign_extender.sv" 4 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1792119896448 ""} { "Info" "ISGN_ENTITY_NAME" "12 seven_seg " "Found entity 12: seven_seg" { } { { "../../modules/seven_seg.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/seven_seg.sv" 3 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1792119896448 ""} { "Info" "ISGN_ENTITY_NAME" "13 seven_seg_4digit " "Found entity 13: seven_seg_4digit" { } { { "../../modules/seven_seg_4digit.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/seven_seg_4digit.sv" 5 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1792119896448 ""} { "Info" "ISGN_ENTITY_NAME" "14 assignment2 " "Found entity 14: assignment2" { } { { "../../modules/assignment2.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv" 15 -1 0 } } } 0 12023 "Found entity %1!d!: %2!s!" 0 0 "Design Software" 0 -1 1792119896448 ""} } { } 0 12021 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "Analysis & Synthesis" 0 -1 1792119896448 ""} +{ "Info" "ISGN_START_ELABORATION_TOP" "assignment2 " "Elaborating entity \"assignment2\" for the top level hierarchy" { } { } 0 12127 "Elaborating entity \"%1!s!\" for the top level hierarchy" 0 0 "Analysis & Synthesis" 0 -1 1792119896628 ""} +{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "instruction_counter instruction_counter:PC " "Elaborating entity \"instruction_counter\" for hierarchy \"instruction_counter:PC\"" { } { { "../../modules/assignment2.sv" "PC" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv" 59 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1792119896665 ""} +{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "rom rom:ROM " "Elaborating entity \"rom\" for hierarchy \"rom:ROM\"" { } { { "../../modules/assignment2.sv" "ROM" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv" 61 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1792119896671 ""} +{ "Warning" "WVRFX_VERI_2111_UNCONVERTED" "18 0 1023 rom.sv(16) " "Verilog HDL warning at rom.sv(16): number of words (18) in memory file does not match the number of elements in the address range \[0:1023\]" { } { { "../../modules/rom.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/rom.sv" 16 0 0 } } } 0 10850 "Verilog HDL warning at %4!s!: number of words (%1!d!) in memory file does not match the number of elements in the address range \[%2!d!:%3!d!\]" 0 0 "Analysis & Synthesis" 0 -1 1792119896679 "|assignment2|rom:ROM"} +{ "Warning" "WVRFX_VDB_DRIVERLESS_NET" "mem.data_a 0 rom.sv(9) " "Net \"mem.data_a\" at rom.sv(9) has no driver or initial value, using a default initial value '0'" { } { { "../../modules/rom.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/rom.sv" 9 0 0 } } } 0 10030 "Net \"%1!s!\" at %3!s! has no driver or initial value, using a default initial value '%2!c!'" 0 0 "Analysis & Synthesis" 0 -1 1792119896705 "|assignment2|rom:ROM"} +{ "Warning" "WVRFX_VDB_DRIVERLESS_NET" "mem.waddr_a 0 rom.sv(9) " "Net \"mem.waddr_a\" at rom.sv(9) has no driver or initial value, using a default initial value '0'" { } { { "../../modules/rom.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/rom.sv" 9 0 0 } } } 0 10030 "Net \"%1!s!\" at %3!s! has no driver or initial value, using a default initial value '%2!c!'" 0 0 "Analysis & Synthesis" 0 -1 1792119896706 "|assignment2|rom:ROM"} +{ "Warning" "WVRFX_VDB_DRIVERLESS_NET" "mem.we_a 0 rom.sv(9) " "Net \"mem.we_a\" at rom.sv(9) has no driver or initial value, using a default initial value '0'" { } { { "../../modules/rom.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/rom.sv" 9 0 0 } } } 0 10030 "Net \"%1!s!\" at %3!s! has no driver or initial value, using a default initial value '%2!c!'" 0 0 "Analysis & Synthesis" 0 -1 1792119896706 "|assignment2|rom:ROM"} +{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "ram ram:RAM " "Elaborating entity \"ram\" for hierarchy \"ram:RAM\"" { } { { "../../modules/assignment2.sv" "RAM" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv" 64 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1792119896712 ""} +{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "32 5 ram.sv(24) " "Verilog HDL assignment warning at ram.sv(24): truncated value with size 32 to match size of target (5)" { } { { "../../modules/ram.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/ram.sv" 24 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1792119896825 "|assignment2|ram:RAM"} +{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "control_unit control_unit:CONTROL_UNIT " "Elaborating entity \"control_unit\" for hierarchy \"control_unit:CONTROL_UNIT\"" { } { { "../../modules/assignment2.sv" "CONTROL_UNIT" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv" 68 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1792119897099 ""} +{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "6 1 control_unit.sv(26) " "Verilog HDL assignment warning at control_unit.sv(26): truncated value with size 6 to match size of target (1)" { } { { "../../modules/control_unit.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/control_unit.sv" 26 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1792119897100 "|assignment2|control_unit:CONTROL_UNIT"} +{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "6 1 control_unit.sv(27) " "Verilog HDL assignment warning at control_unit.sv(27): truncated value with size 6 to match size of target (1)" { } { { "../../modules/control_unit.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/control_unit.sv" 27 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1792119897100 "|assignment2|control_unit:CONTROL_UNIT"} +{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "8 4 control_unit.sv(29) " "Verilog HDL assignment warning at control_unit.sv(29): truncated value with size 8 to match size of target (4)" { } { { "../../modules/control_unit.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/control_unit.sv" 29 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1792119897100 "|assignment2|control_unit:CONTROL_UNIT"} +{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "instruction_classifier control_unit:CONTROL_UNIT\|instruction_classifier:CLASSIFIER " "Elaborating entity \"instruction_classifier\" for hierarchy \"control_unit:CONTROL_UNIT\|instruction_classifier:CLASSIFIER\"" { } { { "../../modules/control_unit.sv" "CLASSIFIER" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/control_unit.sv" 23 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1792119897103 ""} +{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "register_file register_file:REGS " "Elaborating entity \"register_file\" for hierarchy \"register_file:REGS\"" { } { { "../../modules/assignment2.sv" "REGS" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv" 77 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1792119897107 ""} +{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "sign_extender sign_extender:SIGNEXT " "Elaborating entity \"sign_extender\" for hierarchy \"sign_extender:SIGNEXT\"" { } { { "../../modules/assignment2.sv" "SIGNEXT" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv" 80 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1792119897232 ""} +{ "Warning" "WVRFX_L2_VERI_EXPRESSION_TRUNCATED_TO_FIT" "16 1 sign_extender.sv(10) " "Verilog HDL assignment warning at sign_extender.sv(10): truncated value with size 16 to match size of target (1)" { } { { "../../modules/sign_extender.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/sign_extender.sv" 10 0 0 } } } 0 10230 "Verilog HDL assignment warning at %3!s!: truncated value with size %1!d! to match size of target (%2!d!)" 0 0 "Analysis & Synthesis" 0 -1 1792119897232 "|assignment2|sign_extender:SIGNEXT"} +{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "alu alu:ALU " "Elaborating entity \"alu\" for hierarchy \"alu:ALU\"" { } { { "../../modules/assignment2.sv" "ALU" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv" 82 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1792119897235 ""} +{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "asu alu:ALU\|asu:adder_unit " "Elaborating entity \"asu\" for hierarchy \"alu:ALU\|asu:adder_unit\"" { } { { "../../modules/alu.sv" "adder_unit" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/alu.sv" 21 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1792119897242 ""} +{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "lu alu:ALU\|lu:logic_unit " "Elaborating entity \"lu\" for hierarchy \"alu:ALU\|lu:logic_unit\"" { } { { "../../modules/alu.sv" "logic_unit" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/alu.sv" 24 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1792119897248 ""} +{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "seven_seg_4digit seven_seg_4digit:display " "Elaborating entity \"seven_seg_4digit\" for hierarchy \"seven_seg_4digit:display\"" { } { { "../../modules/assignment2.sv" "display" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv" 110 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1792119897254 ""} +{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "seven_seg seven_seg_4digit:display\|seven_seg:digit0 " "Elaborating entity \"seven_seg\" for hierarchy \"seven_seg_4digit:display\|seven_seg:digit0\"" { } { { "../../modules/seven_seg_4digit.sv" "digit0" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/seven_seg_4digit.sv" 18 0 0 } } } 0 12128 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1792119897257 ""} +{ "Warning" "WCDB_CDB_RAM_MIF_CONTAIN_DONT_CARE" "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/Quartus/A2/db/assignment2.ram0_rom_a404080c.hdl.mif " "Memory Initialization File or Hexadecimal (Intel-Format) File \"/home/oliver/Documents/FPGA_Dev/FPGA_Uni/Quartus/A2/db/assignment2.ram0_rom_a404080c.hdl.mif\" contains \"don't care\" values -- overwriting them with 0s" { } { } 0 127007 "Memory Initialization File or Hexadecimal (Intel-Format) File \"%1!s!\" contains \"don't care\" values -- overwriting them with 0s" 0 0 "Analysis & Synthesis" 0 -1 1792119898222 ""} +{ "Warning" "WSGN_CONNECTIVITY_WARNINGS" "2 " "2 hierarchies have connectivity warnings - see the Connectivity Checks report folder" { } { } 0 12241 "%1!d! hierarchies have connectivity warnings - see the Connectivity Checks report folder" 0 0 "Analysis & Synthesis" 0 -1 1792119901069 ""} +{ "Warning" "WMLS_MLS_STUCK_PIN_HDR" "" "Output pins are stuck at VCC or GND" { { "Warning" "WMLS_MLS_STUCK_PIN" "out_seg_0\[0\] GND " "Pin \"out_seg_0\[0\]\" is stuck at GND" { } { { "../../modules/assignment2.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv" 23 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1792119903492 "|assignment2|out_seg_0[0]"} { "Warning" "WMLS_MLS_STUCK_PIN" "out_seg_1\[0\] GND " "Pin \"out_seg_1\[0\]\" is stuck at GND" { } { { "../../modules/assignment2.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv" 24 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1792119903492 "|assignment2|out_seg_1[0]"} { "Warning" "WMLS_MLS_STUCK_PIN" "out_seg_2\[0\] GND " "Pin \"out_seg_2\[0\]\" is stuck at GND" { } { { "../../modules/assignment2.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv" 25 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1792119903492 "|assignment2|out_seg_2[0]"} { "Warning" "WMLS_MLS_STUCK_PIN" "out_seg_3\[0\] GND " "Pin \"out_seg_3\[0\]\" is stuck at GND" { } { { "../../modules/assignment2.sv" "" { Text "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv" 28 -1 0 } } } 0 13410 "Pin \"%1!s!\" is stuck at %2!s!" 0 0 "Design Software" 0 -1 1792119903492 "|assignment2|out_seg_3[0]"} } { } 0 13024 "Output pins are stuck at VCC or GND" 0 0 "Analysis & Synthesis" 0 -1 1792119903492 ""} +{ "Info" "ISUTIL_TIMING_DRIVEN_SYNTHESIS_RUNNING" "" "Timing-Driven Synthesis is running" { } { } 0 286030 "Timing-Driven Synthesis is running" 0 0 "Analysis & Synthesis" 0 -1 1792119903757 ""} +{ "Info" "IBPM_HARD_BLOCK_PARTITION_CREATED" "hard_block:auto_generated_inst " "Generating hard_block partition \"hard_block:auto_generated_inst\"" { { "Info" "IBPM_HARD_BLOCK_PARTITION_NODE" "0 0 0 0 0 " "Adding 0 node(s), including 0 DDIO, 0 PLL, 0 transceiver and 0 LCELL" { } { } 0 16011 "Adding %1!d! node(s), including %2!d! DDIO, %3!d! PLL, %4!d! transceiver and %5!d! LCELL" 0 0 "Design Software" 0 -1 1792119906732 ""} } { } 0 16010 "Generating hard_block partition \"%1!s!\"" 0 0 "Analysis & Synthesis" 0 -1 1792119906732 ""} +{ "Info" "ICUT_CUT_TM_SUMMARY" "4331 " "Implemented 4331 device resources after synthesis - the final resource count might be different" { { "Info" "ICUT_CUT_TM_IPINS" "9 " "Implemented 9 input pins" { } { } 0 21058 "Implemented %1!d! input pins" 0 0 "Design Software" 0 -1 1792119907055 ""} { "Info" "ICUT_CUT_TM_OPINS" "32 " "Implemented 32 output pins" { } { } 0 21059 "Implemented %1!d! output pins" 0 0 "Design Software" 0 -1 1792119907055 ""} { "Info" "ICUT_CUT_TM_LCELLS" "4290 " "Implemented 4290 logic cells" { } { } 0 21061 "Implemented %1!d! logic cells" 0 0 "Design Software" 0 -1 1792119907055 ""} } { } 0 21057 "Implemented %1!d! device resources after synthesis - the final resource count might be different" 0 0 "Analysis & Synthesis" 0 -1 1792119907055 ""} +{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 16 s Quartus Prime " "Quartus Prime Analysis & Synthesis was successful. 0 errors, 16 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "456 " "Peak virtual memory: 456 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Design Software" 0 -1 1792119907067 ""} { "Info" "IQEXE_END_BANNER_TIME" "Fri Oct 16 14:05:07 2026 " "Processing ended: Fri Oct 16 14:05:07 2026" { } { } 0 0 "Processing ended: %1!s!" 0 0 "Design Software" 0 -1 1792119907067 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:23 " "Elapsed time: 00:00:23" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "Design Software" 0 -1 1792119907067 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:37 " "Total CPU time (on all processors): 00:00:37" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Design Software" 0 -1 1792119907067 ""} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Analysis & Synthesis" 0 -1 1792119907067 ""} +{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "Analysis & Synthesis" 0 -1 1792119908662 ""} +{ "Info" "IQEXE_START_BANNER_PRODUCT" "Fitter Quartus Prime " "Running Quartus Prime Fitter" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 25.1std.0 Build 1129 10/21/2025 SC Lite Edition " "Version 25.1std.0 Build 1129 10/21/2025 SC Lite Edition" { } { } 0 0 "%1!s!" 0 0 "Design Software" 0 -1 1792119908663 ""} { "Info" "IQEXE_START_BANNER_TIME" "Fri Oct 16 14:05:08 2026 " "Processing started: Fri Oct 16 14:05:08 2026" { } { } 0 0 "Processing started: %1!s!" 0 0 "Design Software" 0 -1 1792119908663 ""} } { } 4 0 "Running %2!s! %1!s!" 0 0 "Fitter" 0 -1 1792119908663 ""} +{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_fit --read_settings_files=off --write_settings_files=off assignment2 -c assignment2 " "Command: quartus_fit --read_settings_files=off --write_settings_files=off assignment2 -c assignment2" { } { } 0 0 "Command: %1!s!" 0 0 "Fitter" 0 -1 1792119908663 ""} +{ "Info" "0" "" "qfit2_default_script.tcl version: #1" { } { } 0 0 "qfit2_default_script.tcl version: #1" 0 0 "Fitter" 0 0 1792119908743 ""} +{ "Info" "0" "" "Project = assignment2" { } { } 0 0 "Project = assignment2" 0 0 "Fitter" 0 0 1792119908744 ""} +{ "Info" "0" "" "Revision = assignment2" { } { } 0 0 "Revision = assignment2" 0 0 "Fitter" 0 0 1792119908744 ""} +{ "Info" "IQCU_PARALLEL_SHOW_MANUAL_NUM_PROCS" "2 " "Parallel compilation is enabled and will use up to 2 processors" { } { } 0 20032 "Parallel compilation is enabled and will use up to %1!i! processors" 0 0 "Fitter" 0 -1 1792119908995 ""} +{ "Info" "IMPP_MPP_USER_DEVICE" "assignment2 5CGXFC5C6F27C7 " "Selected device 5CGXFC5C6F27C7 for design \"assignment2\"" { } { } 0 119006 "Selected device %2!s! for design \"%1!s!\"" 0 0 "Fitter" 0 -1 1792119909014 ""} +{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "Low junction temperature 0 degrees C " "Low junction temperature is 0 degrees C" { } { } 0 21077 "%1!s! is %2!s!" 0 0 "Fitter" 0 -1 1792119909108 ""} +{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "High junction temperature 85 degrees C " "High junction temperature is 85 degrees C" { } { } 0 21077 "%1!s! is %2!s!" 0 0 "Fitter" 0 -1 1792119909108 ""} +{ "Info" "IFITCC_FITCC_INFO_AUTO_FIT_COMPILATION_ON" "" "Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time" { } { } 0 171003 "Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time" 0 0 "Fitter" 0 -1 1792119909587 ""} +{ "Warning" "WCPT_FEATURE_DISABLED_POST" "LogicLock " "Feature LogicLock is only available with a valid subscription license. You can purchase a software subscription to gain full access to this feature." { } { } 0 292013 "Feature %1!s! is only available with a valid subscription license. You can purchase a software subscription to gain full access to this feature." 0 0 "Fitter" 0 -1 1792119909626 ""} +{ "Warning" "WCUT_CUT_ATOM_PINS_WITH_INCOMPLETE_IO_ASSIGNMENTS" "" "Some pins have incomplete I/O assignments. Refer to the I/O Assignment Warnings report for details" { } { } 0 15714 "Some pins have incomplete I/O assignments. Refer to the I/O Assignment Warnings report for details" 0 0 "Fitter" 0 -1 1792119909763 ""} +{ "Info" "IFITCC_FITCC_FITTER_PERIPHERY_PLACEMENT_START_INFO" "" "Starting Fitter periphery placement operations" { } { } 0 184020 "Starting Fitter periphery placement operations" 0 0 "Fitter" 0 -1 1792119917089 ""} +{ "Info" "ICCLK_CLOCKS_TOP_AUTO" "1 (1 global) " "Automatically promoted 1 clock (1 global)" { { "Info" "ICCLK_PROMOTE_ASSIGNMENT" "clk\[0\]~inputCLKENA0 2302 global CLKCTRL_G5 " "clk\[0\]~inputCLKENA0 with 2302 fanout uses global clock CLKCTRL_G5" { } { } 0 11162 "%1!s! with %2!d! fanout uses %3!s! clock %4!s!" 0 0 "Design Software" 0 -1 1792119917276 ""} } { } 0 11191 "Automatically promoted %1!d! clock%2!s! %3!s!" 0 0 "Fitter" 0 -1 1792119917276 ""} +{ "Info" "IFITCC_FITCC_FITTER_PERIPHERY_PLACEMENT_END_INFO" "00:00:00 " "Fitter periphery placement operations ending: elapsed time is 00:00:00" { } { } 0 184021 "Fitter periphery placement operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1792119917276 ""} +{ "Info" "IFSAC_FSAC_REGISTER_PACKING_START_REGPACKING_INFO" "" "Starting register packing" { } { } 0 176233 "Starting register packing" 0 0 "Fitter" 0 -1 1792119917307 ""} +{ "Extra Info" "IFSAC_FSAC_REGISTER_PACKING_BEGIN_FAST_REGISTER_INFO" "" "Started Fast Input/Output/OE register processing" { } { } 1 176236 "Started Fast Input/Output/OE register processing" 1 0 "Fitter" 0 -1 1792119917322 ""} +{ "Extra Info" "IFSAC_FSAC_REGISTER_PACKING_FINISH_FAST_REGISTER_INFO" "" "Finished Fast Input/Output/OE register processing" { } { } 1 176237 "Finished Fast Input/Output/OE register processing" 1 0 "Fitter" 0 -1 1792119917345 ""} +{ "Extra Info" "IFSAC_FSAC_START_MAC_SCAN_CHAIN_INFERENCING" "" "Start inferring scan chains for DSP blocks" { } { } 1 176238 "Start inferring scan chains for DSP blocks" 1 0 "Fitter" 0 -1 1792119917369 ""} +{ "Extra Info" "IFSAC_FSAC_FINISH_MAC_SCAN_CHAIN_INFERENCING" "" "Inferring scan chains for DSP blocks is complete" { } { } 1 176239 "Inferring scan chains for DSP blocks is complete" 1 0 "Fitter" 0 -1 1792119917369 ""} +{ "Extra Info" "IFSAC_FSAC_START_IO_MAC_RAM_PACKING" "" "Moving registers into I/O cells, DSP blocks, and RAM blocks to improve timing and density" { } { } 1 176246 "Moving registers into I/O cells, DSP blocks, and RAM blocks to improve timing and density" 1 0 "Fitter" 0 -1 1792119917381 ""} +{ "Extra Info" "IFSAC_FSAC_FINISH_IO_MAC_RAM_PACKING" "" "Finished moving registers into I/O cells, DSP blocks, and RAM blocks" { } { } 1 176247 "Finished moving registers into I/O cells, DSP blocks, and RAM blocks" 1 0 "Fitter" 0 -1 1792119917389 ""} +{ "Info" "IFSAC_FSAC_REGISTER_PACKING_FINISH_REGPACKING_INFO" "" "Finished register packing" { { "Extra Info" "IFSAC_NO_REGISTERS_WERE_PACKED" "" "No registers were packed into other blocks" { } { } 1 176219 "No registers were packed into other blocks" 0 0 "Design Software" 0 -1 1792119917410 ""} } { } 0 176235 "Finished register packing" 0 0 "Fitter" 0 -1 1792119917410 ""} +{ "Info" "IFSV_FITTER_PREPARATION_END" "00:00:08 " "Fitter preparation operations ending: elapsed time is 00:00:08" { } { } 0 11798 "Fitter preparation operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1792119917578 ""} +{ "Critical Warning" "WSTA_SDC_NOT_FOUND" "assignment2.sdc " "Synopsys Design Constraints File file not found: 'assignment2.sdc'. A Synopsys Design Constraints File is required by the Timing Analyzer to get proper timing constraints. Without it, the Compiler will not properly optimize the design." { } { } 1 332012 "Synopsys Design Constraints File file not found: '%1!s!'. A Synopsys Design Constraints File is required by the Timing Analyzer to get proper timing constraints. Without it, the Compiler will not properly optimize the design." 0 0 "Fitter" 0 -1 1792119923834 ""} +{ "Info" "ISTA_NO_CLOCK_FOUND_NO_DERIVING_MSG" "base clocks " "No user constrained base clocks found in the design" { } { } 0 332144 "No user constrained %1!s! found in the design" 0 0 "Fitter" 0 -1 1792119923834 ""} +{ "Info" "ISTA_NO_CLOCK_UNCERTAINTY_FOUND_DERIVING" "\"derive_clock_uncertainty\" " "No user constrained clock uncertainty found in the design. Calling \"derive_clock_uncertainty\"" { } { } 0 332143 "No user constrained clock uncertainty found in the design. Calling %1!s!" 0 0 "Fitter" 0 -1 1792119923886 ""} +{ "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "Deriving Clock Uncertainty. Please refer to report_sdc in the Timing Analyzer to see clock uncertainties. " "Deriving Clock Uncertainty. Please refer to report_sdc in the Timing Analyzer to see clock uncertainties." { } { } 0 332123 "%1!s!" 0 0 "Fitter" 0 -1 1792119923886 ""} +{ "Info" "ISTA_TDC_NO_DEFAULT_OPTIMIZATION_GOALS" "" "Timing requirements not specified -- quality metrics such as performance may be sacrificed to reduce compilation time." { } { } 0 332130 "Timing requirements not specified -- quality metrics such as performance may be sacrificed to reduce compilation time." 0 0 "Fitter" 0 -1 1792119923888 ""} +{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_PREP_START" "" "Fitter placement preparation operations beginning" { } { } 0 170189 "Fitter placement preparation operations beginning" 0 0 "Fitter" 0 -1 1792119924005 ""} +{ "Info" "IVPR20K_VPR_APL_ENABLED" "" "The Fitter is using Advanced Physical Optimization." { } { } 0 14951 "The Fitter is using Advanced Physical Optimization." 0 0 "Fitter" 0 -1 1792119924387 ""} +{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_PREP_END" "00:00:14 " "Fitter placement preparation operations ending: elapsed time is 00:00:14" { } { } 0 170190 "Fitter placement preparation operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1792119937746 ""} +{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_START" "" "Fitter placement operations beginning" { } { } 0 170191 "Fitter placement operations beginning" 0 0 "Fitter" 0 -1 1792119946461 ""} +{ "Info" "IFITAPI_FITAPI_INFO_VPR_PLACEMENT_FINISH" "" "Fitter placement was successful" { } { } 0 170137 "Fitter placement was successful" 0 0 "Fitter" 0 -1 1792119954855 ""} +{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_END" "00:00:08 " "Fitter placement operations ending: elapsed time is 00:00:08" { } { } 0 170192 "Fitter placement operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1792119954856 ""} +{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_START" "" "Fitter routing operations beginning" { } { } 0 170193 "Fitter routing operations beginning" 0 0 "Fitter" 0 -1 1792119956300 ""} +{ "Info" "IFITAPI_FITAPI_VPR_PERCENT_ROUTING_RESOURCE_USAGE" "2 " "Router estimated average interconnect usage is 2% of the available device resources" { { "Info" "IFITAPI_FITAPI_VPR_PEAK_ROUTING_REGION" "24 X34_Y0 X45_Y11 " "Router estimated peak interconnect usage is 24% of the available device resources in the region that extends from location X34_Y0 to location X45_Y11" { } { { "loc" "" { Generic "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/Quartus/A2/" { { 1 { 0 "Router estimated peak interconnect usage is 24% of the available device resources in the region that extends from location X34_Y0 to location X45_Y11"} { { 12 { 0 ""} 34 0 12 12 } } } } } } } 0 170196 "Router estimated peak interconnect usage is %1!d!%% of the available device resources in the region that extends from location %2!s! to location %3!s!" 0 0 "Design Software" 0 -1 1792119967023 ""} } { } 0 170195 "Router estimated average interconnect usage is %1!d!%% of the available device resources" 0 0 "Fitter" 0 -1 1792119967023 ""} +{ "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED" "" "The Fitter performed an Auto Fit compilation. Optimizations were skipped to reduce compilation time." { { "Info" "IFITAPI_FITAPI_VPR_AUTO_FIT_ENABLED_AND_USED_FOR_ROUTABILITY" "" "Optimizations that may affect the design's routability were skipped" { } { } 0 170201 "Optimizations that may affect the design's routability were skipped" 0 0 "Design Software" 0 -1 1792119995069 ""} } { } 0 170199 "The Fitter performed an Auto Fit compilation. Optimizations were skipped to reduce compilation time." 0 0 "Fitter" 0 -1 1792119995069 ""} +{ "Info" "IFITAPI_FITAPI_VPR_FITTER_ROUTING_END" "00:00:34 " "Fitter routing operations ending: elapsed time is 00:00:34" { } { } 0 170194 "Fitter routing operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1792119995071 ""} +{ "Info" "IVPR20K_VPR_TIMING_ANALYSIS_TIME" "the Fitter 5.73 " "Total time spent on timing analysis during the Fitter is 5.73 seconds." { } { } 0 11888 "Total time spent on timing analysis during %1!s! is %2!s! seconds." 0 0 "Fitter" 0 -1 1792120000338 ""} +{ "Info" "ITAPI_TAPI_STARTED" "" "Started post-fitting delay annotation" { } { } 0 334003 "Started post-fitting delay annotation" 0 0 "Fitter" 0 -1 1792120000415 ""} +{ "Info" "ITAPI_TAPI_COMPLETED" "" "Delay annotation completed successfully" { } { } 0 334004 "Delay annotation completed successfully" 0 0 "Fitter" 0 -1 1792120005128 ""} +{ "Info" "ITAPI_TAPI_STARTED" "" "Started post-fitting delay annotation" { } { } 0 334003 "Started post-fitting delay annotation" 0 0 "Fitter" 0 -1 1792120005131 ""} +{ "Info" "ITAPI_TAPI_COMPLETED" "" "Delay annotation completed successfully" { } { } 0 334004 "Delay annotation completed successfully" 0 0 "Fitter" 0 -1 1792120010045 ""} +{ "Info" "IFSV_FITTER_POST_OPERATION_END" "00:00:17 " "Fitter post-fit operations ending: elapsed time is 00:00:17" { } { } 0 11801 "Fitter post-fit operations ending: elapsed time is %1!s!" 0 0 "Fitter" 0 -1 1792120017325 ""} +{ "Warning" "WFITCC_FITCC_IGNORED_ASSIGNMENT" "" "Found invalid Fitter assignments. See the Ignored Assignments panel in the Fitter Compilation Report for more information." { } { } 0 171167 "Found invalid Fitter assignments. See the Ignored Assignments panel in the Fitter Compilation Report for more information." 0 0 "Fitter" 0 -1 1792120017736 ""} +{ "Info" "IQEXE_ERROR_COUNT" "Fitter 0 s 4 s Quartus Prime " "Quartus Prime Fitter was successful. 0 errors, 4 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "1433 " "Peak virtual memory: 1433 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Design Software" 0 -1 1792120019490 ""} { "Info" "IQEXE_END_BANNER_TIME" "Fri Oct 16 14:06:59 2026 " "Processing ended: Fri Oct 16 14:06:59 2026" { } { } 0 0 "Processing ended: %1!s!" 0 0 "Design Software" 0 -1 1792120019490 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:01:51 " "Elapsed time: 00:01:51" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "Design Software" 0 -1 1792120019490 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:02:48 " "Total CPU time (on all processors): 00:02:48" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Design Software" 0 -1 1792120019490 ""} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Fitter" 0 -1 1792120019490 ""} +{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "Fitter" 0 -1 1792120021297 ""} +{ "Info" "IQEXE_START_BANNER_PRODUCT" "Assembler Quartus Prime " "Running Quartus Prime Assembler" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 25.1std.0 Build 1129 10/21/2025 SC Lite Edition " "Version 25.1std.0 Build 1129 10/21/2025 SC Lite Edition" { } { } 0 0 "%1!s!" 0 0 "Design Software" 0 -1 1792120021297 ""} { "Info" "IQEXE_START_BANNER_TIME" "Fri Oct 16 14:07:01 2026 " "Processing started: Fri Oct 16 14:07:01 2026" { } { } 0 0 "Processing started: %1!s!" 0 0 "Design Software" 0 -1 1792120021297 ""} } { } 4 0 "Running %2!s! %1!s!" 0 0 "Assembler" 0 -1 1792120021297 ""} +{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_asm --read_settings_files=off --write_settings_files=off assignment2 -c assignment2 " "Command: quartus_asm --read_settings_files=off --write_settings_files=off assignment2 -c assignment2" { } { } 0 0 "Command: %1!s!" 0 0 "Assembler" 0 -1 1792120021297 ""} +{ "Info" "IASM_ASM_GENERATING_PROGRAMMING_FILES" "" "Assembler is generating device programming files" { } { } 0 115030 "Assembler is generating device programming files" 0 0 "Assembler" 0 -1 1792120027547 ""} +{ "Info" "IQEXE_ERROR_COUNT" "Assembler 0 s 0 s Quartus Prime " "Quartus Prime Assembler was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "532 " "Peak virtual memory: 532 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Design Software" 0 -1 1792120027794 ""} { "Info" "IQEXE_END_BANNER_TIME" "Fri Oct 16 14:07:07 2026 " "Processing ended: Fri Oct 16 14:07:07 2026" { } { } 0 0 "Processing ended: %1!s!" 0 0 "Design Software" 0 -1 1792120027794 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:06 " "Elapsed time: 00:00:06" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "Design Software" 0 -1 1792120027794 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:06 " "Total CPU time (on all processors): 00:00:06" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Design Software" 0 -1 1792120027794 ""} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Assembler" 0 -1 1792120027794 ""} +{ "Info" "IFLOW_DISABLED_MODULE" "Power Analyzer FLOW_ENABLE_POWER_ANALYZER " "Skipped module Power Analyzer due to the assignment FLOW_ENABLE_POWER_ANALYZER" { } { } 0 293026 "Skipped module %1!s! due to the assignment %2!s!" 0 0 "Assembler" 0 -1 1792120028621 ""} +{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "Assembler" 0 -1 1792120029522 ""} +{ "Info" "IQEXE_START_BANNER_PRODUCT" "Timing Analyzer Quartus Prime " "Running Quartus Prime Timing Analyzer" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 25.1std.0 Build 1129 10/21/2025 SC Lite Edition " "Version 25.1std.0 Build 1129 10/21/2025 SC Lite Edition" { } { } 0 0 "%1!s!" 0 0 "Design Software" 0 -1 1792120029522 ""} { "Info" "IQEXE_START_BANNER_TIME" "Fri Oct 16 14:07:09 2026 " "Processing started: Fri Oct 16 14:07:09 2026" { } { } 0 0 "Processing started: %1!s!" 0 0 "Design Software" 0 -1 1792120029522 ""} } { } 4 0 "Running %2!s! %1!s!" 0 0 "Timing Analyzer" 0 -1 1792120029522 ""} +{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_sta assignment2 -c assignment2 " "Command: quartus_sta assignment2 -c assignment2" { } { } 0 0 "Command: %1!s!" 0 0 "Timing Analyzer" 0 -1 1792120029523 ""} +{ "Info" "0" "" "qsta_default_script.tcl version: #1" { } { } 0 0 "qsta_default_script.tcl version: #1" 0 0 "Timing Analyzer" 0 0 1792120029577 ""} +{ "Info" "IQCU_PARALLEL_SHOW_MANUAL_NUM_PROCS" "2 " "Parallel compilation is enabled and will use up to 2 processors" { } { } 0 20032 "Parallel compilation is enabled and will use up to %1!i! processors" 0 0 "Timing Analyzer" 0 -1 1792120030248 ""} +{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "Low junction temperature 0 degrees C " "Low junction temperature is 0 degrees C" { } { } 0 21077 "%1!s! is %2!s!" 0 0 "Timing Analyzer" 0 -1 1792120030322 ""} +{ "Info" "ICUT_CUT_USING_OPERATING_CONDITION" "High junction temperature 85 degrees C " "High junction temperature is 85 degrees C" { } { } 0 21077 "%1!s! is %2!s!" 0 0 "Timing Analyzer" 0 -1 1792120030322 ""} +{ "Critical Warning" "WSTA_SDC_NOT_FOUND" "assignment2.sdc " "Synopsys Design Constraints File file not found: 'assignment2.sdc'. A Synopsys Design Constraints File is required by the Timing Analyzer to get proper timing constraints. Without it, the Compiler will not properly optimize the design." { } { } 1 332012 "Synopsys Design Constraints File file not found: '%1!s!'. A Synopsys Design Constraints File is required by the Timing Analyzer to get proper timing constraints. Without it, the Compiler will not properly optimize the design." 0 0 "Timing Analyzer" 0 -1 1792120031172 ""} +{ "Info" "ISTA_NO_CLOCK_FOUND_DERIVING" "base clocks \"derive_clocks -period 1.0\" " "No user constrained base clocks found in the design. Calling \"derive_clocks -period 1.0\"" { } { } 0 332142 "No user constrained %1!s! found in the design. Calling %2!s!" 0 0 "Timing Analyzer" 0 -1 1792120031172 ""} +{ "Info" "ISTA_DERIVE_CLOCKS_INFO" "Deriving Clocks " "Deriving Clocks" { { "Info" "ISTA_DERIVE_CLOCKS_INFO" "create_clock -period 1.000 -name clk\[0\] clk\[0\] " "create_clock -period 1.000 -name clk\[0\] clk\[0\]" { } { } 0 332105 "%1!s!" 0 0 "Design Software" 0 -1 1792120031186 ""} } { } 0 332105 "%1!s!" 0 0 "Timing Analyzer" 0 -1 1792120031186 ""} +{ "Info" "ISTA_NO_CLOCK_UNCERTAINTY_FOUND_DERIVING" "\"derive_clock_uncertainty\" " "No user constrained clock uncertainty found in the design. Calling \"derive_clock_uncertainty\"" { } { } 0 332143 "No user constrained clock uncertainty found in the design. Calling %1!s!" 0 0 "Timing Analyzer" 0 -1 1792120031224 ""} +{ "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "Deriving Clock Uncertainty. Please refer to report_sdc in the Timing Analyzer to see clock uncertainties. " "Deriving Clock Uncertainty. Please refer to report_sdc in the Timing Analyzer to see clock uncertainties." { } { } 0 332123 "%1!s!" 0 0 "Timing Analyzer" 0 -1 1792120031224 ""} +{ "Info" "0" "" "Found TIMING_ANALYZER_REPORT_SCRIPT_INCLUDE_DEFAULT_ANALYSIS = ON" { } { } 0 0 "Found TIMING_ANALYZER_REPORT_SCRIPT_INCLUDE_DEFAULT_ANALYSIS = ON" 0 0 "Timing Analyzer" 0 0 1792120031226 ""} +{ "Info" "0" "" "Analyzing Slow 1100mV 85C Model" { } { } 0 0 "Analyzing Slow 1100mV 85C Model" 0 0 "Timing Analyzer" 0 0 1792120031233 ""} +{ "Critical Warning" "WSTA_TIMING_NOT_MET" "" "Timing requirements not met" { { "Info" "ISTA_TIMING_NOT_MET_USE_ADA" "" "For recommendations on closing timing, run Report Timing Closure Recommendations in the Timing Analyzer." { } { } 0 11105 "For recommendations on closing timing, run Report Timing Closure Recommendations in the Timing Analyzer." 0 0 "Design Software" 0 -1 1792120032101 ""} } { } 1 332148 "Timing requirements not met" 0 0 "Timing Analyzer" 0 -1 1792120032101 ""} +{ "Info" "ISTA_WORST_CASE_SLACK" "setup -15.382 " "Worst-case setup slack is -15.382" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1792120032101 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1792120032101 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -15.382 -29185.826 clk\[0\] " " -15.382 -29185.826 clk\[0\] " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1792120032101 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1792120032101 ""} +{ "Info" "ISTA_WORST_CASE_SLACK" "hold 0.247 " "Worst-case hold slack is 0.247" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1792120032188 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1792120032188 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.247 0.000 clk\[0\] " " 0.247 0.000 clk\[0\] " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1792120032188 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1792120032188 ""} +{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Recovery " "No Recovery paths to report" { } { } 0 332140 "No %1!s! paths to report" 0 0 "Timing Analyzer" 0 -1 1792120032190 ""} +{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Removal " "No Removal paths to report" { } { } 0 332140 "No %1!s! paths to report" 0 0 "Timing Analyzer" 0 -1 1792120032192 ""} +{ "Info" "ISTA_WORST_CASE_SLACK" "minimum pulse width -0.538 " "Worst-case minimum pulse width slack is -0.538" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1792120032196 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1792120032196 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -0.538 -1966.245 clk\[0\] " " -0.538 -1966.245 clk\[0\] " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1792120032196 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1792120032196 ""} +{ "Info" "0" "" "Analyzing Slow 1100mV 0C Model" { } { } 0 0 "Analyzing Slow 1100mV 0C Model" 0 0 "Timing Analyzer" 0 0 1792120032255 ""} +{ "Info" "ITAPI_TAPI_STARTED" "" "Started post-fitting delay annotation" { } { } 0 334003 "Started post-fitting delay annotation" 0 0 "Timing Analyzer" 0 -1 1792120032311 ""} +{ "Info" "ITAPI_TAPI_COMPLETED" "" "Delay annotation completed successfully" { } { } 0 334004 "Delay annotation completed successfully" 0 0 "Timing Analyzer" 0 -1 1792120037813 ""} +{ "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "Deriving Clock Uncertainty. Please refer to report_sdc in the Timing Analyzer to see clock uncertainties. " "Deriving Clock Uncertainty. Please refer to report_sdc in the Timing Analyzer to see clock uncertainties." { } { } 0 332123 "%1!s!" 0 0 "Timing Analyzer" 0 -1 1792120038150 ""} +{ "Critical Warning" "WSTA_TIMING_NOT_MET" "" "Timing requirements not met" { { "Info" "ISTA_TIMING_NOT_MET_USE_ADA" "" "For recommendations on closing timing, run Report Timing Closure Recommendations in the Timing Analyzer." { } { } 0 11105 "For recommendations on closing timing, run Report Timing Closure Recommendations in the Timing Analyzer." 0 0 "Design Software" 0 -1 1792120038408 ""} } { } 1 332148 "Timing requirements not met" 0 0 "Timing Analyzer" 0 -1 1792120038408 ""} +{ "Info" "ISTA_WORST_CASE_SLACK" "setup -15.332 " "Worst-case setup slack is -15.332" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1792120038409 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1792120038409 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -15.332 -28830.670 clk\[0\] " " -15.332 -28830.670 clk\[0\] " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1792120038409 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1792120038409 ""} +{ "Info" "ISTA_WORST_CASE_SLACK" "hold 0.230 " "Worst-case hold slack is 0.230" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1792120038497 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1792120038497 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.230 0.000 clk\[0\] " " 0.230 0.000 clk\[0\] " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1792120038497 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1792120038497 ""} +{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Recovery " "No Recovery paths to report" { } { } 0 332140 "No %1!s! paths to report" 0 0 "Timing Analyzer" 0 -1 1792120038498 ""} +{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Removal " "No Removal paths to report" { } { } 0 332140 "No %1!s! paths to report" 0 0 "Timing Analyzer" 0 -1 1792120038499 ""} +{ "Info" "ISTA_WORST_CASE_SLACK" "minimum pulse width -0.538 " "Worst-case minimum pulse width slack is -0.538" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1792120038505 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1792120038505 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -0.538 -2012.310 clk\[0\] " " -0.538 -2012.310 clk\[0\] " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1792120038505 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1792120038505 ""} +{ "Info" "0" "" "Analyzing Fast 1100mV 85C Model" { } { } 0 0 "Analyzing Fast 1100mV 85C Model" 0 0 "Timing Analyzer" 0 0 1792120038559 ""} +{ "Info" "ITAPI_TAPI_STARTED" "" "Started post-fitting delay annotation" { } { } 0 334003 "Started post-fitting delay annotation" 0 0 "Timing Analyzer" 0 -1 1792120038854 ""} +{ "Info" "ITAPI_TAPI_COMPLETED" "" "Delay annotation completed successfully" { } { } 0 334004 "Delay annotation completed successfully" 0 0 "Timing Analyzer" 0 -1 1792120043666 ""} +{ "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "Deriving Clock Uncertainty. Please refer to report_sdc in the Timing Analyzer to see clock uncertainties. " "Deriving Clock Uncertainty. Please refer to report_sdc in the Timing Analyzer to see clock uncertainties." { } { } 0 332123 "%1!s!" 0 0 "Timing Analyzer" 0 -1 1792120043930 ""} +{ "Critical Warning" "WSTA_TIMING_NOT_MET" "" "Timing requirements not met" { { "Info" "ISTA_TIMING_NOT_MET_USE_ADA" "" "For recommendations on closing timing, run Report Timing Closure Recommendations in the Timing Analyzer." { } { } 0 11105 "For recommendations on closing timing, run Report Timing Closure Recommendations in the Timing Analyzer." 0 0 "Design Software" 0 -1 1792120044022 ""} } { } 1 332148 "Timing requirements not met" 0 0 "Timing Analyzer" 0 -1 1792120044022 ""} +{ "Info" "ISTA_WORST_CASE_SLACK" "setup -8.024 " "Worst-case setup slack is -8.024" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1792120044022 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1792120044022 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -8.024 -14527.864 clk\[0\] " " -8.024 -14527.864 clk\[0\] " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1792120044022 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1792120044022 ""} +{ "Info" "ISTA_WORST_CASE_SLACK" "hold 0.132 " "Worst-case hold slack is 0.132" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1792120044121 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1792120044121 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.132 0.000 clk\[0\] " " 0.132 0.000 clk\[0\] " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1792120044121 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1792120044121 ""} +{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Recovery " "No Recovery paths to report" { } { } 0 332140 "No %1!s! paths to report" 0 0 "Timing Analyzer" 0 -1 1792120044122 ""} +{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Removal " "No Removal paths to report" { } { } 0 332140 "No %1!s! paths to report" 0 0 "Timing Analyzer" 0 -1 1792120044124 ""} +{ "Info" "ISTA_WORST_CASE_SLACK" "minimum pulse width 0.016 " "Worst-case minimum pulse width slack is 0.016" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1792120044128 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1792120044128 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.016 0.000 clk\[0\] " " 0.016 0.000 clk\[0\] " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1792120044128 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1792120044128 ""} +{ "Info" "0" "" "Analyzing Fast 1100mV 0C Model" { } { } 0 0 "Analyzing Fast 1100mV 0C Model" 0 0 "Timing Analyzer" 0 0 1792120044181 ""} +{ "Info" "ISTA_DERIVE_CLOCK_UNCERTAINTY_INFO" "Deriving Clock Uncertainty. Please refer to report_sdc in the Timing Analyzer to see clock uncertainties. " "Deriving Clock Uncertainty. Please refer to report_sdc in the Timing Analyzer to see clock uncertainties." { } { } 0 332123 "%1!s!" 0 0 "Timing Analyzer" 0 -1 1792120044456 ""} +{ "Critical Warning" "WSTA_TIMING_NOT_MET" "" "Timing requirements not met" { { "Info" "ISTA_TIMING_NOT_MET_USE_ADA" "" "For recommendations on closing timing, run Report Timing Closure Recommendations in the Timing Analyzer." { } { } 0 11105 "For recommendations on closing timing, run Report Timing Closure Recommendations in the Timing Analyzer." 0 0 "Design Software" 0 -1 1792120044549 ""} } { } 1 332148 "Timing requirements not met" 0 0 "Timing Analyzer" 0 -1 1792120044549 ""} +{ "Info" "ISTA_WORST_CASE_SLACK" "setup -7.028 " "Worst-case setup slack is -7.028" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1792120044550 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1792120044550 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " -7.028 -12721.297 clk\[0\] " " -7.028 -12721.297 clk\[0\] " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1792120044550 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1792120044550 ""} +{ "Info" "ISTA_WORST_CASE_SLACK" "hold 0.118 " "Worst-case hold slack is 0.118" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1792120044646 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1792120044646 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.118 0.000 clk\[0\] " " 0.118 0.000 clk\[0\] " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1792120044646 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1792120044646 ""} +{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Recovery " "No Recovery paths to report" { } { } 0 332140 "No %1!s! paths to report" 0 0 "Timing Analyzer" 0 -1 1792120044647 ""} +{ "Info" "ISTA_NO_PATHS_TO_REPORT" "Removal " "No Removal paths to report" { } { } 0 332140 "No %1!s! paths to report" 0 0 "Timing Analyzer" 0 -1 1792120044648 ""} +{ "Info" "ISTA_WORST_CASE_SLACK" "minimum pulse width 0.015 " "Worst-case minimum pulse width slack is 0.015" { { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " Slack End Point TNS Clock " " Slack End Point TNS Clock " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1792120044651 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" "========= =================== ===================== " "========= =================== =====================" { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1792120044651 ""} { "Info" "ISTA_CREATE_TIMING_SUMMARY_INFO" " 0.015 0.000 clk\[0\] " " 0.015 0.000 clk\[0\] " { } { } 0 332119 "%1!s!" 0 0 "Design Software" 0 -1 1792120044651 ""} } { } 0 332146 "Worst-case %1!s! slack is %2!s!" 0 0 "Timing Analyzer" 0 -1 1792120044651 ""} +{ "Info" "ISTA_UCP_NOT_CONSTRAINED" "setup " "Design is not fully constrained for setup requirements" { } { } 0 332102 "Design is not fully constrained for %1!s! requirements" 0 0 "Timing Analyzer" 0 -1 1792120046333 ""} +{ "Info" "ISTA_UCP_NOT_CONSTRAINED" "hold " "Design is not fully constrained for hold requirements" { } { } 0 332102 "Design is not fully constrained for %1!s! requirements" 0 0 "Timing Analyzer" 0 -1 1792120046351 ""} +{ "Info" "IQEXE_ERROR_COUNT" "Timing Analyzer 0 s 5 s Quartus Prime " "Quartus Prime Timing Analyzer was successful. 0 errors, 5 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "868 " "Peak virtual memory: 868 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Design Software" 0 -1 1792120046424 ""} { "Info" "IQEXE_END_BANNER_TIME" "Fri Oct 16 14:07:26 2026 " "Processing ended: Fri Oct 16 14:07:26 2026" { } { } 0 0 "Processing ended: %1!s!" 0 0 "Design Software" 0 -1 1792120046424 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:17 " "Elapsed time: 00:00:17" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "Design Software" 0 -1 1792120046424 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:26 " "Total CPU time (on all processors): 00:00:26" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Design Software" 0 -1 1792120046424 ""} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Timing Analyzer" 0 -1 1792120046424 ""} +{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" { } { } 3 0 "*******************************************************************" 0 0 "Timing Analyzer" 0 -1 1792120048107 ""} +{ "Info" "IQEXE_START_BANNER_PRODUCT" "EDA Netlist Writer Quartus Prime " "Running Quartus Prime EDA Netlist Writer" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 25.1std.0 Build 1129 10/21/2025 SC Lite Edition " "Version 25.1std.0 Build 1129 10/21/2025 SC Lite Edition" { } { } 0 0 "%1!s!" 0 0 "Design Software" 0 -1 1792120048113 ""} { "Info" "IQEXE_START_BANNER_TIME" "Fri Oct 16 14:07:27 2026 " "Processing started: Fri Oct 16 14:07:27 2026" { } { } 0 0 "Processing started: %1!s!" 0 0 "Design Software" 0 -1 1792120048113 ""} } { } 4 0 "Running %2!s! %1!s!" 0 0 "EDA Netlist Writer" 0 -1 1792120048113 ""} +{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_eda --read_settings_files=off --write_settings_files=off assignment2 -c assignment2 " "Command: quartus_eda --read_settings_files=off --write_settings_files=off assignment2 -c assignment2" { } { } 0 0 "Command: %1!s!" 0 0 "EDA Netlist Writer" 0 -1 1792120048114 ""} +{ "Info" "IWSC_DONE_HDL_GENERATION" "assignment2.svo /home/oliver/Documents/FPGA_Dev/FPGA_Uni/Quartus/A2/simulation/questa/ simulation " "Generated file assignment2.svo in folder \"/home/oliver/Documents/FPGA_Dev/FPGA_Uni/Quartus/A2/simulation/questa/\" for EDA simulation tool" { } { } 0 204019 "Generated file %1!s! in folder \"%2!s!\" for EDA %3!s! tool" 0 0 "EDA Netlist Writer" 0 -1 1792120049793 ""} +{ "Info" "IQEXE_ERROR_COUNT" "EDA Netlist Writer 0 s 0 s Quartus Prime " "Quartus Prime EDA Netlist Writer was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "689 " "Peak virtual memory: 689 megabytes" { } { } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Design Software" 0 -1 1792120049858 ""} { "Info" "IQEXE_END_BANNER_TIME" "Fri Oct 16 14:07:29 2026 " "Processing ended: Fri Oct 16 14:07:29 2026" { } { } 0 0 "Processing ended: %1!s!" 0 0 "Design Software" 0 -1 1792120049858 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:02 " "Elapsed time: 00:00:02" { } { } 0 0 "Elapsed time: %1!s!" 0 0 "Design Software" 0 -1 1792120049858 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:02 " "Total CPU time (on all processors): 00:00:02" { } { } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Design Software" 0 -1 1792120049858 ""} } { } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "EDA Netlist Writer" 0 -1 1792120049858 ""} +{ "Info" "IFLOW_ERROR_COUNT" "Full Compilation 0 s 25 s " "Quartus Prime Full Compilation was successful. 0 errors, 25 warnings" { } { } 0 293000 "Quartus Prime %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "EDA Netlist Writer" 0 -1 1792120050598 ""} diff --git a/Quartus/A2/incremental_db/compiled_partitions/assignment2.root_partition.cmp.ammdb b/Quartus/A2/incremental_db/compiled_partitions/assignment2.root_partition.cmp.ammdb index d4b55eb..9b1e2bd 100644 Binary files a/Quartus/A2/incremental_db/compiled_partitions/assignment2.root_partition.cmp.ammdb and b/Quartus/A2/incremental_db/compiled_partitions/assignment2.root_partition.cmp.ammdb differ diff --git a/Quartus/A2/incremental_db/compiled_partitions/assignment2.root_partition.cmp.cdb b/Quartus/A2/incremental_db/compiled_partitions/assignment2.root_partition.cmp.cdb index 4045321..d4f93dc 100644 Binary files a/Quartus/A2/incremental_db/compiled_partitions/assignment2.root_partition.cmp.cdb and b/Quartus/A2/incremental_db/compiled_partitions/assignment2.root_partition.cmp.cdb differ diff --git a/Quartus/A2/incremental_db/compiled_partitions/assignment2.root_partition.cmp.hbdb.cdb b/Quartus/A2/incremental_db/compiled_partitions/assignment2.root_partition.cmp.hbdb.cdb index a77945b..5686284 100644 Binary files a/Quartus/A2/incremental_db/compiled_partitions/assignment2.root_partition.cmp.hbdb.cdb and b/Quartus/A2/incremental_db/compiled_partitions/assignment2.root_partition.cmp.hbdb.cdb differ diff --git a/Quartus/A2/incremental_db/compiled_partitions/assignment2.root_partition.cmp.hbdb.hdb b/Quartus/A2/incremental_db/compiled_partitions/assignment2.root_partition.cmp.hbdb.hdb index 28e09d7..87a6d4a 100644 Binary files a/Quartus/A2/incremental_db/compiled_partitions/assignment2.root_partition.cmp.hbdb.hdb and b/Quartus/A2/incremental_db/compiled_partitions/assignment2.root_partition.cmp.hbdb.hdb differ diff --git a/Quartus/A2/incremental_db/compiled_partitions/assignment2.root_partition.cmp.hdb b/Quartus/A2/incremental_db/compiled_partitions/assignment2.root_partition.cmp.hdb index b6ca4aa..97ba6ee 100644 Binary files a/Quartus/A2/incremental_db/compiled_partitions/assignment2.root_partition.cmp.hdb and b/Quartus/A2/incremental_db/compiled_partitions/assignment2.root_partition.cmp.hdb differ diff --git a/Quartus/A2/incremental_db/compiled_partitions/assignment2.root_partition.cmp.rcfdb b/Quartus/A2/incremental_db/compiled_partitions/assignment2.root_partition.cmp.rcfdb index d7e6424..b1ee24a 100644 Binary files a/Quartus/A2/incremental_db/compiled_partitions/assignment2.root_partition.cmp.rcfdb and b/Quartus/A2/incremental_db/compiled_partitions/assignment2.root_partition.cmp.rcfdb differ diff --git a/Quartus/A2/incremental_db/compiled_partitions/assignment2.root_partition.map.cdb b/Quartus/A2/incremental_db/compiled_partitions/assignment2.root_partition.map.cdb index b02eff0..a310be6 100644 Binary files a/Quartus/A2/incremental_db/compiled_partitions/assignment2.root_partition.map.cdb and b/Quartus/A2/incremental_db/compiled_partitions/assignment2.root_partition.map.cdb differ diff --git a/Quartus/A2/incremental_db/compiled_partitions/assignment2.root_partition.map.dpi b/Quartus/A2/incremental_db/compiled_partitions/assignment2.root_partition.map.dpi index 90d6fcd..8250b3c 100644 Binary files a/Quartus/A2/incremental_db/compiled_partitions/assignment2.root_partition.map.dpi and b/Quartus/A2/incremental_db/compiled_partitions/assignment2.root_partition.map.dpi differ diff --git a/Quartus/A2/incremental_db/compiled_partitions/assignment2.root_partition.map.hbdb.cdb b/Quartus/A2/incremental_db/compiled_partitions/assignment2.root_partition.map.hbdb.cdb index 1aaef6c..ea93446 100644 Binary files a/Quartus/A2/incremental_db/compiled_partitions/assignment2.root_partition.map.hbdb.cdb and b/Quartus/A2/incremental_db/compiled_partitions/assignment2.root_partition.map.hbdb.cdb differ diff --git a/Quartus/A2/incremental_db/compiled_partitions/assignment2.root_partition.map.hbdb.hdb b/Quartus/A2/incremental_db/compiled_partitions/assignment2.root_partition.map.hbdb.hdb index 43d0c24..7d3315a 100644 Binary files a/Quartus/A2/incremental_db/compiled_partitions/assignment2.root_partition.map.hbdb.hdb and b/Quartus/A2/incremental_db/compiled_partitions/assignment2.root_partition.map.hbdb.hdb differ diff --git a/Quartus/A2/incremental_db/compiled_partitions/assignment2.root_partition.map.hdb b/Quartus/A2/incremental_db/compiled_partitions/assignment2.root_partition.map.hdb index 3154d64..5507424 100644 Binary files a/Quartus/A2/incremental_db/compiled_partitions/assignment2.root_partition.map.hdb and b/Quartus/A2/incremental_db/compiled_partitions/assignment2.root_partition.map.hdb differ diff --git a/Quartus/A2/incremental_db/compiled_partitions/assignment2.root_partition.map.kpt b/Quartus/A2/incremental_db/compiled_partitions/assignment2.root_partition.map.kpt index d5d58dc..4065ed9 100644 Binary files a/Quartus/A2/incremental_db/compiled_partitions/assignment2.root_partition.map.kpt and b/Quartus/A2/incremental_db/compiled_partitions/assignment2.root_partition.map.kpt differ diff --git a/Quartus/A2/incremental_db/compiled_partitions/assignment2.rrp.hdb b/Quartus/A2/incremental_db/compiled_partitions/assignment2.rrp.hdb index 41380ab..9d0c827 100644 Binary files a/Quartus/A2/incremental_db/compiled_partitions/assignment2.rrp.hdb and b/Quartus/A2/incremental_db/compiled_partitions/assignment2.rrp.hdb differ diff --git a/Quartus/A2/incremental_db/compiled_partitions/assignment2.rrs.cdb b/Quartus/A2/incremental_db/compiled_partitions/assignment2.rrs.cdb index 7793495..a549132 100644 Binary files a/Quartus/A2/incremental_db/compiled_partitions/assignment2.rrs.cdb and b/Quartus/A2/incremental_db/compiled_partitions/assignment2.rrs.cdb differ diff --git a/Quartus/A2/output_files/assignment2.asm.rpt b/Quartus/A2/output_files/assignment2.asm.rpt index 61475b2..f8a7c11 100644 --- a/Quartus/A2/output_files/assignment2.asm.rpt +++ b/Quartus/A2/output_files/assignment2.asm.rpt @@ -1,5 +1,5 @@ Assembler report for assignment2 -Fri Oct 16 09:58:56 2026 +Fri Oct 16 14:23:09 2026 Quartus Prime Version 25.1std.0 Build 1129 10/21/2025 SC Lite Edition @@ -38,7 +38,7 @@ on the Quartus Prime software download page. +---------------------------------------------------------------+ ; Assembler Summary ; +-----------------------+---------------------------------------+ -; Assembler Status ; Successful - Fri Oct 16 09:58:56 2026 ; +; Assembler Status ; Successful - Fri Oct 16 14:23:09 2026 ; ; Revision Name ; assignment2 ; ; Top-level Entity Name ; assignment2 ; ; Family ; Cyclone V ; @@ -67,8 +67,8 @@ on the Quartus Prime software download page. +----------------+--------------------------+ ; Option ; Setting ; +----------------+--------------------------+ -; JTAG usercode ; 0x00780AC3 ; -; Checksum ; 0x00780AC3 ; +; JTAG usercode ; 0x00BE0B15 ; +; Checksum ; 0x00BE0B15 ; +----------------+--------------------------+ @@ -78,13 +78,13 @@ on the Quartus Prime software download page. Info: ******************************************************************* Info: Running Quartus Prime Assembler Info: Version 25.1std.0 Build 1129 10/21/2025 SC Lite Edition - Info: Processing started: Fri Oct 16 09:58:50 2026 + Info: Processing started: Fri Oct 16 14:23:02 2026 Info: Command: quartus_asm --read_settings_files=off --write_settings_files=off assignment2 -c assignment2 Info (115030): Assembler is generating device programming files Info: Quartus Prime Assembler was successful. 0 errors, 0 warnings - Info: Peak virtual memory: 520 megabytes - Info: Processing ended: Fri Oct 16 09:58:56 2026 - Info: Elapsed time: 00:00:06 - Info: Total CPU time (on all processors): 00:00:05 + Info: Peak virtual memory: 548 megabytes + Info: Processing ended: Fri Oct 16 14:23:09 2026 + Info: Elapsed time: 00:00:07 + Info: Total CPU time (on all processors): 00:00:06 diff --git a/Quartus/A2/output_files/assignment2.done b/Quartus/A2/output_files/assignment2.done index 6a57786..4a01f4b 100644 --- a/Quartus/A2/output_files/assignment2.done +++ b/Quartus/A2/output_files/assignment2.done @@ -1 +1 @@ -Fri Oct 16 09:59:05 2026 +Fri Oct 16 14:23:32 2026 diff --git a/Quartus/A2/output_files/assignment2.eda.rpt b/Quartus/A2/output_files/assignment2.eda.rpt index 6b08d43..9ed08bc 100644 --- a/Quartus/A2/output_files/assignment2.eda.rpt +++ b/Quartus/A2/output_files/assignment2.eda.rpt @@ -1,5 +1,5 @@ EDA Netlist Writer report for assignment2 -Fri Oct 16 09:59:05 2026 +Fri Oct 16 14:23:31 2026 Quartus Prime Version 25.1std.0 Build 1129 10/21/2025 SC Lite Edition @@ -37,7 +37,7 @@ on the Quartus Prime software download page. +-------------------------------------------------------------------+ ; EDA Netlist Writer Summary ; +---------------------------+---------------------------------------+ -; EDA Netlist Writer Status ; Successful - Fri Oct 16 09:59:05 2026 ; +; EDA Netlist Writer Status ; Successful - Fri Oct 16 14:23:31 2026 ; ; Revision Name ; assignment2 ; ; Top-level Entity Name ; assignment2 ; ; Family ; Cyclone V ; @@ -81,13 +81,13 @@ on the Quartus Prime software download page. Info: ******************************************************************* Info: Running Quartus Prime EDA Netlist Writer Info: Version 25.1std.0 Build 1129 10/21/2025 SC Lite Edition - Info: Processing started: Fri Oct 16 09:59:04 2026 + Info: Processing started: Fri Oct 16 14:23:29 2026 Info: Command: quartus_eda --read_settings_files=off --write_settings_files=off assignment2 -c assignment2 Info (204019): Generated file assignment2.svo in folder "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/Quartus/A2/simulation/questa/" for EDA simulation tool Info: Quartus Prime EDA Netlist Writer was successful. 0 errors, 0 warnings - Info: Peak virtual memory: 669 megabytes - Info: Processing ended: Fri Oct 16 09:59:05 2026 - Info: Elapsed time: 00:00:01 - Info: Total CPU time (on all processors): 00:00:01 + Info: Peak virtual memory: 693 megabytes + Info: Processing ended: Fri Oct 16 14:23:31 2026 + Info: Elapsed time: 00:00:02 + Info: Total CPU time (on all processors): 00:00:02 diff --git a/Quartus/A2/output_files/assignment2.fit.rpt b/Quartus/A2/output_files/assignment2.fit.rpt index 95ddb55..f793c2d 100644 --- a/Quartus/A2/output_files/assignment2.fit.rpt +++ b/Quartus/A2/output_files/assignment2.fit.rpt @@ -1,5 +1,5 @@ Fitter report for assignment2 -Fri Oct 16 09:58:48 2026 +Fri Oct 16 14:22:59 2026 Quartus Prime Version 25.1std.0 Build 1129 10/21/2025 SC Lite Edition @@ -10,28 +10,33 @@ Quartus Prime Version 25.1std.0 Build 1129 10/21/2025 SC Lite Edition 2. Fitter Summary 3. Fitter Settings 4. Parallel Compilation - 5. Ignored Assignments - 6. Incremental Compilation Preservation Summary - 7. Incremental Compilation Partition Settings - 8. Incremental Compilation Placement Preservation - 9. Pin-Out File - 10. Fitter Resource Usage Summary - 11. Fitter Partition Statistics - 12. Input Pins - 13. Output Pins - 14. I/O Bank Usage - 15. All Package Pins - 16. I/O Assignment Warnings - 17. Fitter Resource Utilization by Entity - 18. Delay Chain Summary - 19. Pad To Core Delay Chain Fanout - 20. Routing Usage Summary - 21. I/O Rules Summary - 22. I/O Rules Details - 23. I/O Rules Matrix - 24. Fitter Device Options - 25. Operating Settings and Conditions - 26. Fitter Messages + 5. Fitter Netlist Optimizations + 6. Ignored Assignments + 7. Incremental Compilation Preservation Summary + 8. Incremental Compilation Partition Settings + 9. Incremental Compilation Placement Preservation + 10. Pin-Out File + 11. Fitter Resource Usage Summary + 12. Fitter Partition Statistics + 13. Input Pins + 14. Output Pins + 15. I/O Bank Usage + 16. All Package Pins + 17. I/O Assignment Warnings + 18. Fitter Resource Utilization by Entity + 19. Delay Chain Summary + 20. Pad To Core Delay Chain Fanout + 21. Control Signals + 22. Global & Other Fast Signals + 23. Routing Usage Summary + 24. I/O Rules Summary + 25. I/O Rules Details + 26. I/O Rules Matrix + 27. Fitter Device Options + 28. Operating Settings and Conditions + 29. Estimated Delay Added for Hold Timing Summary + 30. Estimated Delay Added for Hold Timing Details + 31. Fitter Messages @@ -58,16 +63,16 @@ on the Quartus Prime software download page. +-----------------------------------------------------------------------------------+ ; Fitter Summary ; +---------------------------------+-------------------------------------------------+ -; Fitter Status ; Successful - Fri Oct 16 09:58:48 2026 ; +; Fitter Status ; Successful - Fri Oct 16 14:22:59 2026 ; ; Quartus Prime Version ; 25.1std.0 Build 1129 10/21/2025 SC Lite Edition ; ; Revision Name ; assignment2 ; ; Top-level Entity Name ; assignment2 ; ; Family ; Cyclone V ; ; Device ; 5CGXFC5C6F27C7 ; ; Timing Models ; Final ; -; Logic utilization (in ALMs) ; 1 / 29,080 ( < 1 % ) ; -; Total registers ; 0 ; -; Total pins ; 40 / 364 ( 11 % ) ; +; Logic utilization (in ALMs) ; 1,735 / 29,080 ( 6 % ) ; +; Total registers ; 2524 ; +; Total pins ; 41 / 364 ( 11 % ) ; ; Total virtual pins ; 0 ; ; Total block memory bits ; 0 / 4,567,040 ( 0 % ) ; ; Total RAM Blocks ; 0 / 446 ( 0 % ) ; @@ -149,15 +154,246 @@ on the Quartus Prime software download page. ; Number detected on machine ; 4 ; ; Maximum allowed ; 2 ; ; ; ; -; Average used ; 1.00 ; +; Average used ; 1.10 ; ; Maximum used ; 2 ; ; ; ; ; Usage by Processor ; % Time Used ; ; Processor 1 ; 100.0% ; -; Processor 2 ; 0.0% ; +; Processor 2 ; 9.6% ; +----------------------------+-------------+ ++---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ +; Fitter Netlist Optimizations ; ++---------------------------------+------------+---------------------------------------------------+----------------------------+-----------+----------------+-------------------------------------------+------------------+-----------------------+ +; Node ; Action ; Operation ; Reason ; Node Port ; Node Port Name ; Destination Node ; Destination Port ; Destination Port Name ; ++---------------------------------+------------+---------------------------------------------------+----------------------------+-----------+----------------+-------------------------------------------+------------------+-----------------------+ +; clk[0]~inputCLKENA0 ; Created ; Placement ; Fitter Periphery Placement ; ; ; ; ; ; +; instruction_counter:PC|pc[2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; instruction_counter:PC|pc[2]~DUPLICATE ; ; ; +; instruction_counter:PC|pc[3] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; instruction_counter:PC|pc[3]~DUPLICATE ; ; ; +; instruction_counter:PC|pc[4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; instruction_counter:PC|pc[4]~DUPLICATE ; ; ; +; instruction_counter:PC|pc[5] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; instruction_counter:PC|pc[5]~DUPLICATE ; ; ; +; instruction_counter:PC|pc[6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; instruction_counter:PC|pc[6]~DUPLICATE ; ; ; +; instruction_counter:PC|pc[7] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; instruction_counter:PC|pc[7]~DUPLICATE ; ; ; +; instruction_counter:PC|pc[8] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; instruction_counter:PC|pc[8]~DUPLICATE ; ; ; +; instruction_counter:PC|pc[9] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; instruction_counter:PC|pc[9]~DUPLICATE ; ; ; +; instruction_counter:PC|pc[10] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; instruction_counter:PC|pc[10]~DUPLICATE ; ; ; +; instruction_counter:PC|pc[13] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; instruction_counter:PC|pc[13]~DUPLICATE ; ; ; +; instruction_counter:PC|pc[15] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; instruction_counter:PC|pc[15]~DUPLICATE ; ; ; +; instruction_counter:PC|pc[16] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; instruction_counter:PC|pc[16]~DUPLICATE ; ; ; +; instruction_counter:PC|pc[17] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; instruction_counter:PC|pc[17]~DUPLICATE ; ; ; +; instruction_counter:PC|pc[19] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; instruction_counter:PC|pc[19]~DUPLICATE ; ; ; +; instruction_counter:PC|pc[20] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; instruction_counter:PC|pc[20]~DUPLICATE ; ; ; +; instruction_counter:PC|pc[29] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; instruction_counter:PC|pc[29]~DUPLICATE ; ; ; +; register_file:REGS|regs[1][9] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[1][9]~DUPLICATE ; ; ; +; register_file:REGS|regs[1][17] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[1][17]~DUPLICATE ; ; ; +; register_file:REGS|regs[1][21] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[1][21]~DUPLICATE ; ; ; +; register_file:REGS|regs[1][24] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[1][24]~DUPLICATE ; ; ; +; register_file:REGS|regs[1][26] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[1][26]~DUPLICATE ; ; ; +; register_file:REGS|regs[1][30] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[1][30]~DUPLICATE ; ; ; +; register_file:REGS|regs[2][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[2][0]~DUPLICATE ; ; ; +; register_file:REGS|regs[2][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[2][2]~DUPLICATE ; ; ; +; register_file:REGS|regs[2][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[2][4]~DUPLICATE ; ; ; +; register_file:REGS|regs[2][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[2][6]~DUPLICATE ; ; ; +; register_file:REGS|regs[2][10] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[2][10]~DUPLICATE ; ; ; +; register_file:REGS|regs[2][12] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[2][12]~DUPLICATE ; ; ; +; register_file:REGS|regs[2][18] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[2][18]~DUPLICATE ; ; ; +; register_file:REGS|regs[2][22] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[2][22]~DUPLICATE ; ; ; +; register_file:REGS|regs[2][25] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[2][25]~DUPLICATE ; ; ; +; register_file:REGS|regs[2][26] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[2][26]~DUPLICATE ; ; ; +; register_file:REGS|regs[2][28] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[2][28]~DUPLICATE ; ; ; +; register_file:REGS|regs[2][31] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[2][31]~DUPLICATE ; ; ; +; register_file:REGS|regs[4][3] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[4][3]~DUPLICATE ; ; ; +; register_file:REGS|regs[4][8] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[4][8]~DUPLICATE ; ; ; +; register_file:REGS|regs[4][10] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[4][10]~DUPLICATE ; ; ; +; register_file:REGS|regs[4][14] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[4][14]~DUPLICATE ; ; ; +; register_file:REGS|regs[4][16] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[4][16]~DUPLICATE ; ; ; +; register_file:REGS|regs[4][26] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[4][26]~DUPLICATE ; ; ; +; register_file:REGS|regs[4][29] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[4][29]~DUPLICATE ; ; ; +; register_file:REGS|regs[5][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[5][4]~DUPLICATE ; ; ; +; register_file:REGS|regs[5][8] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[5][8]~DUPLICATE ; ; ; +; register_file:REGS|regs[5][12] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[5][12]~DUPLICATE ; ; ; +; register_file:REGS|regs[5][14] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[5][14]~DUPLICATE ; ; ; +; register_file:REGS|regs[5][15] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[5][15]~DUPLICATE ; ; ; +; register_file:REGS|regs[5][16] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[5][16]~DUPLICATE ; ; ; +; register_file:REGS|regs[5][29] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[5][29]~DUPLICATE ; ; ; +; register_file:REGS|regs[6][1] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[6][1]~DUPLICATE ; ; ; +; register_file:REGS|regs[6][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[6][2]~DUPLICATE ; ; ; +; register_file:REGS|regs[6][18] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[6][18]~DUPLICATE ; ; ; +; register_file:REGS|regs[6][24] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[6][24]~DUPLICATE ; ; ; +; register_file:REGS|regs[6][28] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[6][28]~DUPLICATE ; ; ; +; register_file:REGS|regs[8][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[8][0]~DUPLICATE ; ; ; +; register_file:REGS|regs[8][1] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[8][1]~DUPLICATE ; ; ; +; register_file:REGS|regs[8][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[8][2]~DUPLICATE ; ; ; +; register_file:REGS|regs[8][3] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[8][3]~DUPLICATE ; ; ; +; register_file:REGS|regs[8][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[8][4]~DUPLICATE ; ; ; +; register_file:REGS|regs[8][5] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[8][5]~DUPLICATE ; ; ; +; register_file:REGS|regs[8][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[8][6]~DUPLICATE ; ; ; +; register_file:REGS|regs[8][7] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[8][7]~DUPLICATE ; ; ; +; register_file:REGS|regs[8][8] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[8][8]~DUPLICATE ; ; ; +; register_file:REGS|regs[8][9] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[8][9]~DUPLICATE ; ; ; +; register_file:REGS|regs[8][10] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[8][10]~DUPLICATE ; ; ; +; register_file:REGS|regs[8][11] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[8][11]~DUPLICATE ; ; ; +; register_file:REGS|regs[8][12] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[8][12]~DUPLICATE ; ; ; +; register_file:REGS|regs[8][14] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[8][14]~DUPLICATE ; ; ; +; register_file:REGS|regs[8][16] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[8][16]~DUPLICATE ; ; ; +; register_file:REGS|regs[8][18] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[8][18]~DUPLICATE ; ; ; +; register_file:REGS|regs[8][21] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[8][21]~DUPLICATE ; ; ; +; register_file:REGS|regs[8][26] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[8][26]~DUPLICATE ; ; ; +; register_file:REGS|regs[8][27] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[8][27]~DUPLICATE ; ; ; +; register_file:REGS|regs[8][29] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[8][29]~DUPLICATE ; ; ; +; register_file:REGS|regs[8][30] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[8][30]~DUPLICATE ; ; ; +; register_file:REGS|regs[9][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[9][0]~DUPLICATE ; ; ; +; register_file:REGS|regs[9][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[9][2]~DUPLICATE ; ; ; +; register_file:REGS|regs[9][3] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[9][3]~DUPLICATE ; ; ; +; register_file:REGS|regs[9][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[9][4]~DUPLICATE ; ; ; +; register_file:REGS|regs[9][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[9][6]~DUPLICATE ; ; ; +; register_file:REGS|regs[9][8] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[9][8]~DUPLICATE ; ; ; +; register_file:REGS|regs[9][9] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[9][9]~DUPLICATE ; ; ; +; register_file:REGS|regs[9][16] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[9][16]~DUPLICATE ; ; ; +; register_file:REGS|regs[9][18] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[9][18]~DUPLICATE ; ; ; +; register_file:REGS|regs[9][21] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[9][21]~DUPLICATE ; ; ; +; register_file:REGS|regs[9][24] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[9][24]~DUPLICATE ; ; ; +; register_file:REGS|regs[9][25] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[9][25]~DUPLICATE ; ; ; +; register_file:REGS|regs[9][26] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[9][26]~DUPLICATE ; ; ; +; register_file:REGS|regs[9][30] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[9][30]~DUPLICATE ; ; ; +; register_file:REGS|regs[9][31] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[9][31]~DUPLICATE ; ; ; +; register_file:REGS|regs[10][1] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[10][1]~DUPLICATE ; ; ; +; register_file:REGS|regs[10][5] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[10][5]~DUPLICATE ; ; ; +; register_file:REGS|regs[10][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[10][6]~DUPLICATE ; ; ; +; register_file:REGS|regs[10][14] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[10][14]~DUPLICATE ; ; ; +; register_file:REGS|regs[10][22] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[10][22]~DUPLICATE ; ; ; +; register_file:REGS|regs[11][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[11][0]~DUPLICATE ; ; ; +; register_file:REGS|regs[11][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[11][6]~DUPLICATE ; ; ; +; register_file:REGS|regs[11][12] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[11][12]~DUPLICATE ; ; ; +; register_file:REGS|regs[11][16] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[11][16]~DUPLICATE ; ; ; +; register_file:REGS|regs[11][17] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[11][17]~DUPLICATE ; ; ; +; register_file:REGS|regs[11][26] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[11][26]~DUPLICATE ; ; ; +; register_file:REGS|regs[11][27] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[11][27]~DUPLICATE ; ; ; +; register_file:REGS|regs[11][31] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[11][31]~DUPLICATE ; ; ; +; register_file:REGS|regs[12][5] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[12][5]~DUPLICATE ; ; ; +; register_file:REGS|regs[12][8] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[12][8]~DUPLICATE ; ; ; +; register_file:REGS|regs[12][9] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[12][9]~DUPLICATE ; ; ; +; register_file:REGS|regs[12][14] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[12][14]~DUPLICATE ; ; ; +; register_file:REGS|regs[12][17] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[12][17]~DUPLICATE ; ; ; +; register_file:REGS|regs[12][20] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[12][20]~DUPLICATE ; ; ; +; register_file:REGS|regs[12][28] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[12][28]~DUPLICATE ; ; ; +; register_file:REGS|regs[12][30] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[12][30]~DUPLICATE ; ; ; +; register_file:REGS|regs[13][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[13][0]~DUPLICATE ; ; ; +; register_file:REGS|regs[13][1] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[13][1]~DUPLICATE ; ; ; +; register_file:REGS|regs[13][15] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[13][15]~DUPLICATE ; ; ; +; register_file:REGS|regs[13][16] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[13][16]~DUPLICATE ; ; ; +; register_file:REGS|regs[13][21] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[13][21]~DUPLICATE ; ; ; +; register_file:REGS|regs[13][24] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[13][24]~DUPLICATE ; ; ; +; register_file:REGS|regs[14][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[14][0]~DUPLICATE ; ; ; +; register_file:REGS|regs[14][7] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[14][7]~DUPLICATE ; ; ; +; register_file:REGS|regs[15][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[15][0]~DUPLICATE ; ; ; +; register_file:REGS|regs[15][1] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[15][1]~DUPLICATE ; ; ; +; register_file:REGS|regs[15][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[15][6]~DUPLICATE ; ; ; +; register_file:REGS|regs[15][8] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[15][8]~DUPLICATE ; ; ; +; register_file:REGS|regs[15][11] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[15][11]~DUPLICATE ; ; ; +; register_file:REGS|regs[15][17] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[15][17]~DUPLICATE ; ; ; +; register_file:REGS|regs[15][19] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[15][19]~DUPLICATE ; ; ; +; register_file:REGS|regs[16][7] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[16][7]~DUPLICATE ; ; ; +; register_file:REGS|regs[16][9] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[16][9]~DUPLICATE ; ; ; +; register_file:REGS|regs[16][17] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[16][17]~DUPLICATE ; ; ; +; register_file:REGS|regs[16][24] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[16][24]~DUPLICATE ; ; ; +; register_file:REGS|regs[17][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[17][6]~DUPLICATE ; ; ; +; register_file:REGS|regs[17][10] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[17][10]~DUPLICATE ; ; ; +; register_file:REGS|regs[17][11] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[17][11]~DUPLICATE ; ; ; +; register_file:REGS|regs[17][16] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[17][16]~DUPLICATE ; ; ; +; register_file:REGS|regs[17][17] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[17][17]~DUPLICATE ; ; ; +; register_file:REGS|regs[18][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[18][2]~DUPLICATE ; ; ; +; register_file:REGS|regs[18][8] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[18][8]~DUPLICATE ; ; ; +; register_file:REGS|regs[18][11] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[18][11]~DUPLICATE ; ; ; +; register_file:REGS|regs[18][23] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[18][23]~DUPLICATE ; ; ; +; register_file:REGS|regs[19][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[19][0]~DUPLICATE ; ; ; +; register_file:REGS|regs[19][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[19][4]~DUPLICATE ; ; ; +; register_file:REGS|regs[19][5] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[19][5]~DUPLICATE ; ; ; +; register_file:REGS|regs[19][19] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[19][19]~DUPLICATE ; ; ; +; register_file:REGS|regs[19][20] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[19][20]~DUPLICATE ; ; ; +; register_file:REGS|regs[19][30] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[19][30]~DUPLICATE ; ; ; +; register_file:REGS|regs[20][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[20][0]~DUPLICATE ; ; ; +; register_file:REGS|regs[20][5] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[20][5]~DUPLICATE ; ; ; +; register_file:REGS|regs[20][16] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[20][16]~DUPLICATE ; ; ; +; register_file:REGS|regs[20][18] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[20][18]~DUPLICATE ; ; ; +; register_file:REGS|regs[20][20] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[20][20]~DUPLICATE ; ; ; +; register_file:REGS|regs[20][21] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[20][21]~DUPLICATE ; ; ; +; register_file:REGS|regs[20][22] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[20][22]~DUPLICATE ; ; ; +; register_file:REGS|regs[20][23] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[20][23]~DUPLICATE ; ; ; +; register_file:REGS|regs[20][24] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[20][24]~DUPLICATE ; ; ; +; register_file:REGS|regs[20][26] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[20][26]~DUPLICATE ; ; ; +; register_file:REGS|regs[20][27] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[20][27]~DUPLICATE ; ; ; +; register_file:REGS|regs[20][31] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[20][31]~DUPLICATE ; ; ; +; register_file:REGS|regs[22][11] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[22][11]~DUPLICATE ; ; ; +; register_file:REGS|regs[23][3] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[23][3]~DUPLICATE ; ; ; +; register_file:REGS|regs[23][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[23][4]~DUPLICATE ; ; ; +; register_file:REGS|regs[23][5] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[23][5]~DUPLICATE ; ; ; +; register_file:REGS|regs[23][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[23][6]~DUPLICATE ; ; ; +; register_file:REGS|regs[23][14] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[23][14]~DUPLICATE ; ; ; +; register_file:REGS|regs[23][16] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[23][16]~DUPLICATE ; ; ; +; register_file:REGS|regs[23][19] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[23][19]~DUPLICATE ; ; ; +; register_file:REGS|regs[23][20] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[23][20]~DUPLICATE ; ; ; +; register_file:REGS|regs[23][26] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[23][26]~DUPLICATE ; ; ; +; register_file:REGS|regs[23][28] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[23][28]~DUPLICATE ; ; ; +; register_file:REGS|regs[24][22] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[24][22]~DUPLICATE ; ; ; +; register_file:REGS|regs[24][26] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[24][26]~DUPLICATE ; ; ; +; register_file:REGS|regs[24][28] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[24][28]~DUPLICATE ; ; ; +; register_file:REGS|regs[25][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[25][0]~DUPLICATE ; ; ; +; register_file:REGS|regs[25][19] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[25][19]~DUPLICATE ; ; ; +; register_file:REGS|regs[26][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[26][6]~DUPLICATE ; ; ; +; register_file:REGS|regs[26][7] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[26][7]~DUPLICATE ; ; ; +; register_file:REGS|regs[26][11] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[26][11]~DUPLICATE ; ; ; +; register_file:REGS|regs[26][17] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[26][17]~DUPLICATE ; ; ; +; register_file:REGS|regs[26][21] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[26][21]~DUPLICATE ; ; ; +; register_file:REGS|regs[26][27] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[26][27]~DUPLICATE ; ; ; +; register_file:REGS|regs[27][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[27][0]~DUPLICATE ; ; ; +; register_file:REGS|regs[27][5] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[27][5]~DUPLICATE ; ; ; +; register_file:REGS|regs[27][6] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[27][6]~DUPLICATE ; ; ; +; register_file:REGS|regs[27][8] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[27][8]~DUPLICATE ; ; ; +; register_file:REGS|regs[27][12] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[27][12]~DUPLICATE ; ; ; +; register_file:REGS|regs[27][14] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[27][14]~DUPLICATE ; ; ; +; register_file:REGS|regs[27][15] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[27][15]~DUPLICATE ; ; ; +; register_file:REGS|regs[27][16] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[27][16]~DUPLICATE ; ; ; +; register_file:REGS|regs[27][17] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[27][17]~DUPLICATE ; ; ; +; register_file:REGS|regs[27][19] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[27][19]~DUPLICATE ; ; ; +; register_file:REGS|regs[27][20] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[27][20]~DUPLICATE ; ; ; +; register_file:REGS|regs[27][21] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[27][21]~DUPLICATE ; ; ; +; register_file:REGS|regs[28][1] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[28][1]~DUPLICATE ; ; ; +; register_file:REGS|regs[28][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[28][4]~DUPLICATE ; ; ; +; register_file:REGS|regs[28][5] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[28][5]~DUPLICATE ; ; ; +; register_file:REGS|regs[28][10] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[28][10]~DUPLICATE ; ; ; +; register_file:REGS|regs[28][12] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[28][12]~DUPLICATE ; ; ; +; register_file:REGS|regs[28][16] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[28][16]~DUPLICATE ; ; ; +; register_file:REGS|regs[28][28] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[28][28]~DUPLICATE ; ; ; +; register_file:REGS|regs[29][0] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[29][0]~DUPLICATE ; ; ; +; register_file:REGS|regs[29][1] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[29][1]~DUPLICATE ; ; ; +; register_file:REGS|regs[29][2] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[29][2]~DUPLICATE ; ; ; +; register_file:REGS|regs[29][3] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[29][3]~DUPLICATE ; ; ; +; register_file:REGS|regs[29][10] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[29][10]~DUPLICATE ; ; ; +; register_file:REGS|regs[29][11] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[29][11]~DUPLICATE ; ; ; +; register_file:REGS|regs[29][15] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[29][15]~DUPLICATE ; ; ; +; register_file:REGS|regs[29][16] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[29][16]~DUPLICATE ; ; ; +; register_file:REGS|regs[29][22] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[29][22]~DUPLICATE ; ; ; +; register_file:REGS|regs[29][25] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[29][25]~DUPLICATE ; ; ; +; register_file:REGS|regs[29][30] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[29][30]~DUPLICATE ; ; ; +; register_file:REGS|regs[30][1] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[30][1]~DUPLICATE ; ; ; +; register_file:REGS|regs[30][3] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[30][3]~DUPLICATE ; ; ; +; register_file:REGS|regs[30][4] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[30][4]~DUPLICATE ; ; ; +; register_file:REGS|regs[30][5] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[30][5]~DUPLICATE ; ; ; +; register_file:REGS|regs[30][8] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[30][8]~DUPLICATE ; ; ; +; register_file:REGS|regs[30][10] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[30][10]~DUPLICATE ; ; ; +; register_file:REGS|regs[30][14] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[30][14]~DUPLICATE ; ; ; +; register_file:REGS|regs[30][15] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[30][15]~DUPLICATE ; ; ; +; register_file:REGS|regs[30][19] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[30][19]~DUPLICATE ; ; ; +; register_file:REGS|regs[30][22] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[30][22]~DUPLICATE ; ; ; +; register_file:REGS|regs[31][12] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[31][12]~DUPLICATE ; ; ; +; register_file:REGS|regs[31][14] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[31][14]~DUPLICATE ; ; ; +; register_file:REGS|regs[31][17] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[31][17]~DUPLICATE ; ; ; +; register_file:REGS|regs[31][30] ; Duplicated ; Router Logic Cell Insertion and Logic Duplication ; Routability optimization ; ; ; register_file:REGS|regs[31][30]~DUPLICATE ; ; ; ++---------------------------------+------------+---------------------------------------------------+----------------------------+-----------+----------------+-------------------------------------------+------------------+-----------------------+ + + +----------------------------------------------------------------------------------------------+ ; Ignored Assignments ; +--------------+----------------+--------------+--------------+---------------+----------------+ @@ -167,19 +403,19 @@ on the Quartus Prime software download page. +--------------+----------------+--------------+--------------+---------------+----------------+ -+-------------------------------------------------------------------------------------------------+ -; Incremental Compilation Preservation Summary ; -+---------------------+-------------------+----------------------------+--------------------------+ -; Type ; Total [A + B] ; From Design Partitions [A] ; From Rapid Recompile [B] ; -+---------------------+-------------------+----------------------------+--------------------------+ -; Placement (by node) ; ; ; ; -; -- Requested ; 0.00 % ( 0 / 81 ) ; 0.00 % ( 0 / 81 ) ; 0.00 % ( 0 / 81 ) ; -; -- Achieved ; 0.00 % ( 0 / 81 ) ; 0.00 % ( 0 / 81 ) ; 0.00 % ( 0 / 81 ) ; -; ; ; ; ; -; Routing (by net) ; ; ; ; -; -- Requested ; 0.00 % ( 0 / 0 ) ; 0.00 % ( 0 / 0 ) ; 0.00 % ( 0 / 0 ) ; -; -- Achieved ; 0.00 % ( 0 / 0 ) ; 0.00 % ( 0 / 0 ) ; 0.00 % ( 0 / 0 ) ; -+---------------------+-------------------+----------------------------+--------------------------+ ++---------------------------------------------------------------------------------------------------+ +; Incremental Compilation Preservation Summary ; ++---------------------+---------------------+----------------------------+--------------------------+ +; Type ; Total [A + B] ; From Design Partitions [A] ; From Rapid Recompile [B] ; ++---------------------+---------------------+----------------------------+--------------------------+ +; Placement (by node) ; ; ; ; +; -- Requested ; 0.00 % ( 0 / 4404 ) ; 0.00 % ( 0 / 4404 ) ; 0.00 % ( 0 / 4404 ) ; +; -- Achieved ; 0.00 % ( 0 / 4404 ) ; 0.00 % ( 0 / 4404 ) ; 0.00 % ( 0 / 4404 ) ; +; ; ; ; ; +; Routing (by net) ; ; ; ; +; -- Requested ; 0.00 % ( 0 / 0 ) ; 0.00 % ( 0 / 0 ) ; 0.00 % ( 0 / 0 ) ; +; -- Achieved ; 0.00 % ( 0 / 0 ) ; 0.00 % ( 0 / 0 ) ; 0.00 % ( 0 / 0 ) ; ++---------------------+---------------------+----------------------------+--------------------------+ +----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ @@ -197,7 +433,7 @@ on the Quartus Prime software download page. +--------------------------------+-----------------------+-------------------------+-------------------+---------------------+-------+ ; Partition Name ; Preservation Achieved ; Preservation Level Used ; Netlist Type Used ; Preservation Method ; Notes ; +--------------------------------+-----------------------+-------------------------+-------------------+---------------------+-------+ -; Top ; 0.00 % ( 0 / 81 ) ; N/A ; Source File ; N/A ; ; +; Top ; 0.00 % ( 0 / 4404 ) ; N/A ; Source File ; N/A ; ; ; hard_block:auto_generated_inst ; 0.00 % ( 0 / 0 ) ; N/A ; Source File ; N/A ; ; +--------------------------------+-----------------------+-------------------------+-------------------+---------------------+-------+ @@ -208,172 +444,173 @@ on the Quartus Prime software download page. The pin-out file can be found in /home/oliver/Documents/FPGA_Dev/FPGA_Uni/Quartus/A2/output_files/assignment2.pin. -+------------------------------------------------------------------------------------------+ -; Fitter Resource Usage Summary ; -+-------------------------------------------------------------+--------------------+-------+ -; Resource ; Usage ; % ; -+-------------------------------------------------------------+--------------------+-------+ -; Logic utilization (ALMs needed / total ALMs on device) ; 1 / 29,080 ; < 1 % ; -; ALMs needed [=A-B+C] ; 1 ; ; -; [A] ALMs used in final placement [=a+b+c+d] ; 1 / 29,080 ; < 1 % ; -; [a] ALMs used for LUT logic and registers ; 0 ; ; -; [b] ALMs used for LUT logic ; 1 ; ; -; [c] ALMs used for registers ; 0 ; ; -; [d] ALMs used for memory (up to half of total ALMs) ; 0 ; ; -; [B] Estimate of ALMs recoverable by dense packing ; 0 / 29,080 ; 0 % ; -; [C] Estimate of ALMs unavailable [=a+b+c+d] ; 0 / 29,080 ; 0 % ; -; [a] Due to location constrained logic ; 0 ; ; -; [b] Due to LAB-wide signal conflicts ; 0 ; ; -; [c] Due to LAB input limits ; 0 ; ; -; [d] Due to virtual I/Os ; 0 ; ; -; ; ; ; -; Difficulty packing design ; Low ; ; -; ; ; ; -; Total LABs: partially or completely used ; 1 / 2,908 ; < 1 % ; -; -- Logic LABs ; 1 ; ; -; -- Memory LABs (up to half of total LABs) ; 0 ; ; -; ; ; ; -; Combinational ALUT usage for logic ; 1 ; ; -; -- 7 input functions ; 0 ; ; -; -- 6 input functions ; 0 ; ; -; -- 5 input functions ; 0 ; ; -; -- 4 input functions ; 0 ; ; -; -- <=3 input functions ; 1 ; ; -; Combinational ALUT usage for route-throughs ; 0 ; ; -; ; ; ; -; Dedicated logic registers ; 0 ; ; -; -- By type: ; ; ; -; -- Primary logic registers ; 0 / 58,160 ; 0 % ; -; -- Secondary logic registers ; 0 / 58,160 ; 0 % ; -; -- By function: ; ; ; -; -- Design implementation registers ; 0 ; ; -; -- Routing optimization registers ; 0 ; ; -; ; ; ; -; Virtual pins ; 0 ; ; -; I/O pins ; 40 / 364 ; 11 % ; -; -- Clock pins ; 1 / 14 ; 7 % ; -; -- Dedicated input pins ; 0 / 23 ; 0 % ; -; ; ; ; -; M10K blocks ; 0 / 446 ; 0 % ; -; Total MLAB memory bits ; 0 ; ; -; Total block memory bits ; 0 / 4,567,040 ; 0 % ; -; Total block memory implementation bits ; 0 / 4,567,040 ; 0 % ; -; ; ; ; -; Total DSP Blocks ; 0 / 150 ; 0 % ; -; ; ; ; -; Fractional PLLs ; 0 / 6 ; 0 % ; -; Global signals ; 0 ; ; -; -- Global clocks ; 0 / 16 ; 0 % ; -; -- Quadrant clocks ; 0 / 88 ; 0 % ; -; -- Horizontal periphery clocks ; 0 / 12 ; 0 % ; -; SERDES Transmitters ; 0 / 88 ; 0 % ; -; SERDES Receivers ; 0 / 88 ; 0 % ; -; JTAGs ; 0 / 1 ; 0 % ; -; ASMI blocks ; 0 / 1 ; 0 % ; -; CRC blocks ; 0 / 1 ; 0 % ; -; Remote update blocks ; 0 / 1 ; 0 % ; -; Oscillator blocks ; 0 / 1 ; 0 % ; -; Hard IPs ; 0 / 2 ; 0 % ; -; Standard RX PCSs ; 0 / 6 ; 0 % ; -; HSSI PMA RX Deserializers ; 0 / 6 ; 0 % ; -; Standard TX PCSs ; 0 / 6 ; 0 % ; -; HSSI PMA TX Serializers ; 0 / 6 ; 0 % ; -; Channel PLLs ; 0 / 6 ; 0 % ; -; Impedance control blocks ; 0 / 3 ; 0 % ; -; Hard Memory Controllers ; 0 / 2 ; 0 % ; -; Average interconnect usage (total/H/V) ; 0.0% / 0.0% / 0.0% ; ; -; Peak interconnect usage (total/H/V) ; 0.0% / 0.0% / 0.0% ; ; -; Maximum fan-out ; 1 ; ; -; Highest non-global fan-out ; 1 ; ; -; Total fan-out ; 40 ; ; -; Average fan-out ; 0.49 ; ; -+-------------------------------------------------------------+--------------------+-------+ ++---------------------------------------------------------------------------------------------+ +; Fitter Resource Usage Summary ; ++-------------------------------------------------------------+-----------------------+-------+ +; Resource ; Usage ; % ; ++-------------------------------------------------------------+-----------------------+-------+ +; Logic utilization (ALMs needed / total ALMs on device) ; 1,735 / 29,080 ; 6 % ; +; ALMs needed [=A-B+C] ; 1,735 ; ; +; [A] ALMs used in final placement [=a+b+c+d] ; 2,157 / 29,080 ; 7 % ; +; [a] ALMs used for LUT logic and registers ; 410 ; ; +; [b] ALMs used for LUT logic ; 1,006 ; ; +; [c] ALMs used for registers ; 741 ; ; +; [d] ALMs used for memory (up to half of total ALMs) ; 0 ; ; +; [B] Estimate of ALMs recoverable by dense packing ; 467 / 29,080 ; 2 % ; +; [C] Estimate of ALMs unavailable [=a+b+c+d] ; 45 / 29,080 ; < 1 % ; +; [a] Due to location constrained logic ; 0 ; ; +; [b] Due to LAB-wide signal conflicts ; 37 ; ; +; [c] Due to LAB input limits ; 8 ; ; +; [d] Due to virtual I/Os ; 0 ; ; +; ; ; ; +; Difficulty packing design ; Low ; ; +; ; ; ; +; Total LABs: partially or completely used ; 289 / 2,908 ; 10 % ; +; -- Logic LABs ; 289 ; ; +; -- Memory LABs (up to half of total LABs) ; 0 ; ; +; ; ; ; +; Combinational ALUT usage for logic ; 2,019 ; ; +; -- 7 input functions ; 0 ; ; +; -- 6 input functions ; 1,205 ; ; +; -- 5 input functions ; 431 ; ; +; -- 4 input functions ; 234 ; ; +; -- <=3 input functions ; 149 ; ; +; Combinational ALUT usage for route-throughs ; 441 ; ; +; ; ; ; +; Dedicated logic registers ; 2,524 ; ; +; -- By type: ; ; ; +; -- Primary logic registers ; 2,300 / 58,160 ; 4 % ; +; -- Secondary logic registers ; 224 / 58,160 ; < 1 % ; +; -- By function: ; ; ; +; -- Design implementation registers ; 2,302 ; ; +; -- Routing optimization registers ; 222 ; ; +; ; ; ; +; Virtual pins ; 0 ; ; +; I/O pins ; 41 / 364 ; 11 % ; +; -- Clock pins ; 1 / 14 ; 7 % ; +; -- Dedicated input pins ; 0 / 23 ; 0 % ; +; ; ; ; +; M10K blocks ; 0 / 446 ; 0 % ; +; Total MLAB memory bits ; 0 ; ; +; Total block memory bits ; 0 / 4,567,040 ; 0 % ; +; Total block memory implementation bits ; 0 / 4,567,040 ; 0 % ; +; ; ; ; +; Total DSP Blocks ; 0 / 150 ; 0 % ; +; ; ; ; +; Fractional PLLs ; 0 / 6 ; 0 % ; +; Global signals ; 1 ; ; +; -- Global clocks ; 1 / 16 ; 6 % ; +; -- Quadrant clocks ; 0 / 88 ; 0 % ; +; -- Horizontal periphery clocks ; 0 / 12 ; 0 % ; +; SERDES Transmitters ; 0 / 88 ; 0 % ; +; SERDES Receivers ; 0 / 88 ; 0 % ; +; JTAGs ; 0 / 1 ; 0 % ; +; ASMI blocks ; 0 / 1 ; 0 % ; +; CRC blocks ; 0 / 1 ; 0 % ; +; Remote update blocks ; 0 / 1 ; 0 % ; +; Oscillator blocks ; 0 / 1 ; 0 % ; +; Hard IPs ; 0 / 2 ; 0 % ; +; Standard RX PCSs ; 0 / 6 ; 0 % ; +; HSSI PMA RX Deserializers ; 0 / 6 ; 0 % ; +; Standard TX PCSs ; 0 / 6 ; 0 % ; +; HSSI PMA TX Serializers ; 0 / 6 ; 0 % ; +; Channel PLLs ; 0 / 6 ; 0 % ; +; Impedance control blocks ; 0 / 3 ; 0 % ; +; Hard Memory Controllers ; 0 / 2 ; 0 % ; +; Average interconnect usage (total/H/V) ; 3.3% / 3.2% / 3.4% ; ; +; Peak interconnect usage (total/H/V) ; 33.0% / 32.1% / 35.8% ; ; +; Maximum fan-out ; 2524 ; ; +; Highest non-global fan-out ; 307 ; ; +; Total fan-out ; 18851 ; ; +; Average fan-out ; 3.72 ; ; ++-------------------------------------------------------------+-----------------------+-------+ -+--------------------------------------------------------------------------------------------------------------------+ -; Fitter Partition Statistics ; -+-------------------------------------------------------------+---------------------+--------------------------------+ -; Statistic ; Top ; hard_block:auto_generated_inst ; -+-------------------------------------------------------------+---------------------+--------------------------------+ -; Logic utilization (ALMs needed / total ALMs on device) ; 1 / 29080 ( < 1 % ) ; 0 / 29080 ( 0 % ) ; -; ALMs needed [=A-B+C] ; 1 ; 0 ; -; [A] ALMs used in final placement [=a+b+c+d] ; 1 / 29080 ( < 1 % ) ; 0 / 29080 ( 0 % ) ; -; [a] ALMs used for LUT logic and registers ; 0 ; 0 ; -; [b] ALMs used for LUT logic ; 1 ; 0 ; -; [c] ALMs used for registers ; 0 ; 0 ; -; [d] ALMs used for memory (up to half of total ALMs) ; 0 ; 0 ; -; [B] Estimate of ALMs recoverable by dense packing ; 0 / 29080 ( 0 % ) ; 0 / 29080 ( 0 % ) ; -; [C] Estimate of ALMs unavailable [=a+b+c+d] ; 0 / 29080 ( 0 % ) ; 0 / 29080 ( 0 % ) ; -; [a] Due to location constrained logic ; 0 ; 0 ; -; [b] Due to LAB-wide signal conflicts ; 0 ; 0 ; -; [c] Due to LAB input limits ; 0 ; 0 ; -; [d] Due to virtual I/Os ; 0 ; 0 ; -; ; ; ; -; Difficulty packing design ; Low ; Low ; -; ; ; ; -; Total LABs: partially or completely used ; 1 / 2908 ( < 1 % ) ; 0 / 2908 ( 0 % ) ; -; -- Logic LABs ; 1 ; 0 ; -; -- Memory LABs (up to half of total LABs) ; 0 ; 0 ; -; ; ; ; -; Combinational ALUT usage for logic ; 1 ; 0 ; -; -- 7 input functions ; 0 ; 0 ; -; -- 6 input functions ; 0 ; 0 ; -; -- 5 input functions ; 0 ; 0 ; -; -- 4 input functions ; 0 ; 0 ; -; -- <=3 input functions ; 1 ; 0 ; -; Combinational ALUT usage for route-throughs ; 0 ; 0 ; -; Memory ALUT usage ; 0 ; 0 ; -; -- 64-address deep ; 0 ; 0 ; -; -- 32-address deep ; 0 ; 0 ; -; ; ; ; -; Dedicated logic registers ; 0 ; 0 ; -; -- By type: ; ; ; -; -- Primary logic registers ; 0 / 58160 ( 0 % ) ; 0 / 58160 ( 0 % ) ; -; -- Secondary logic registers ; 0 / 58160 ( 0 % ) ; 0 / 58160 ( 0 % ) ; -; -- By function: ; ; ; -; -- Design implementation registers ; 0 ; 0 ; -; -- Routing optimization registers ; 0 ; 0 ; -; ; ; ; -; ; ; ; -; Virtual pins ; 0 ; 0 ; -; I/O pins ; 40 ; 0 ; -; I/O registers ; 0 ; 0 ; -; Total block memory bits ; 0 ; 0 ; -; Total block memory implementation bits ; 0 ; 0 ; -; ; ; ; -; Connections ; ; ; -; -- Input Connections ; 0 ; 0 ; -; -- Registered Input Connections ; 0 ; 0 ; -; -- Output Connections ; 0 ; 0 ; -; -- Registered Output Connections ; 0 ; 0 ; -; ; ; ; -; Internal Connections ; ; ; -; -- Total Connections ; 40 ; 0 ; -; -- Registered Connections ; 0 ; 0 ; -; ; ; ; -; External Connections ; ; ; -; -- Top ; 0 ; 0 ; -; -- hard_block:auto_generated_inst ; 0 ; 0 ; -; ; ; ; -; Partition Interface ; ; ; -; -- Input Ports ; 8 ; 0 ; -; -- Output Ports ; 32 ; 0 ; -; -- Bidir Ports ; 0 ; 0 ; -; ; ; ; -; Registered Ports ; ; ; -; -- Registered Input Ports ; 0 ; 0 ; -; -- Registered Output Ports ; 0 ; 0 ; -; ; ; ; -; Port Connectivity ; ; ; -; -- Input Ports driven by GND ; 0 ; 0 ; -; -- Output Ports driven by GND ; 0 ; 0 ; -; -- Input Ports driven by VCC ; 0 ; 0 ; -; -- Output Ports driven by VCC ; 0 ; 0 ; -; -- Input Ports with no Source ; 0 ; 0 ; -; -- Output Ports with no Source ; 0 ; 0 ; -; -- Input Ports with no Fanout ; 0 ; 0 ; -; -- Output Ports with no Fanout ; 0 ; 0 ; -+-------------------------------------------------------------+---------------------+--------------------------------+ ++----------------------------------------------------------------------------------------------------------------------+ +; Fitter Partition Statistics ; ++-------------------------------------------------------------+-----------------------+--------------------------------+ +; Statistic ; Top ; hard_block:auto_generated_inst ; ++-------------------------------------------------------------+-----------------------+--------------------------------+ +; Logic utilization (ALMs needed / total ALMs on device) ; 1735 / 29080 ( 6 % ) ; 0 / 29080 ( 0 % ) ; +; ALMs needed [=A-B+C] ; 1735 ; 0 ; +; [A] ALMs used in final placement [=a+b+c+d] ; 2157 / 29080 ( 7 % ) ; 0 / 29080 ( 0 % ) ; +; [a] ALMs used for LUT logic and registers ; 410 ; 0 ; +; [b] ALMs used for LUT logic ; 1006 ; 0 ; +; [c] ALMs used for registers ; 741 ; 0 ; +; [d] ALMs used for memory (up to half of total ALMs) ; 0 ; 0 ; +; [B] Estimate of ALMs recoverable by dense packing ; 467 / 29080 ( 2 % ) ; 0 / 29080 ( 0 % ) ; +; [C] Estimate of ALMs unavailable [=a+b+c+d] ; 45 / 29080 ( < 1 % ) ; 0 / 29080 ( 0 % ) ; +; [a] Due to location constrained logic ; 0 ; 0 ; +; [b] Due to LAB-wide signal conflicts ; 37 ; 0 ; +; [c] Due to LAB input limits ; 8 ; 0 ; +; [d] Due to virtual I/Os ; 0 ; 0 ; +; ; ; ; +; Difficulty packing design ; Low ; Low ; +; ; ; ; +; Total LABs: partially or completely used ; 289 / 2908 ( 10 % ) ; 0 / 2908 ( 0 % ) ; +; -- Logic LABs ; 289 ; 0 ; +; -- Memory LABs (up to half of total LABs) ; 0 ; 0 ; +; ; ; ; +; Combinational ALUT usage for logic ; 2019 ; 0 ; +; -- 7 input functions ; 0 ; 0 ; +; -- 6 input functions ; 1205 ; 0 ; +; -- 5 input functions ; 431 ; 0 ; +; -- 4 input functions ; 234 ; 0 ; +; -- <=3 input functions ; 149 ; 0 ; +; Combinational ALUT usage for route-throughs ; 441 ; 0 ; +; Memory ALUT usage ; 0 ; 0 ; +; -- 64-address deep ; 0 ; 0 ; +; -- 32-address deep ; 0 ; 0 ; +; ; ; ; +; Dedicated logic registers ; 0 ; 0 ; +; -- By type: ; ; ; +; -- Primary logic registers ; 2300 / 58160 ( 4 % ) ; 0 / 58160 ( 0 % ) ; +; -- Secondary logic registers ; 224 / 58160 ( < 1 % ) ; 0 / 58160 ( 0 % ) ; +; -- By function: ; ; ; +; -- Design implementation registers ; 2302 ; 0 ; +; -- Routing optimization registers ; 222 ; 0 ; +; ; ; ; +; ; ; ; +; Virtual pins ; 0 ; 0 ; +; I/O pins ; 41 ; 0 ; +; I/O registers ; 0 ; 0 ; +; Total block memory bits ; 0 ; 0 ; +; Total block memory implementation bits ; 0 ; 0 ; +; Clock enable block ; 1 / 116 ( < 1 % ) ; 0 / 116 ( 0 % ) ; +; ; ; ; +; Connections ; ; ; +; -- Input Connections ; 0 ; 0 ; +; -- Registered Input Connections ; 0 ; 0 ; +; -- Output Connections ; 0 ; 0 ; +; -- Registered Output Connections ; 0 ; 0 ; +; ; ; ; +; Internal Connections ; ; ; +; -- Total Connections ; 18883 ; 0 ; +; -- Registered Connections ; 4184 ; 0 ; +; ; ; ; +; External Connections ; ; ; +; -- Top ; 0 ; 0 ; +; -- hard_block:auto_generated_inst ; 0 ; 0 ; +; ; ; ; +; Partition Interface ; ; ; +; -- Input Ports ; 9 ; 0 ; +; -- Output Ports ; 32 ; 0 ; +; -- Bidir Ports ; 0 ; 0 ; +; ; ; ; +; Registered Ports ; ; ; +; -- Registered Input Ports ; 0 ; 0 ; +; -- Registered Output Ports ; 0 ; 0 ; +; ; ; ; +; Port Connectivity ; ; ; +; -- Input Ports driven by GND ; 0 ; 0 ; +; -- Output Ports driven by GND ; 0 ; 0 ; +; -- Input Ports driven by VCC ; 0 ; 0 ; +; -- Output Ports driven by VCC ; 0 ; 0 ; +; -- Input Ports with no Source ; 0 ; 0 ; +; -- Output Ports with no Source ; 0 ; 0 ; +; -- Input Ports with no Fanout ; 0 ; 0 ; +; -- Output Ports with no Fanout ; 0 ; 0 ; ++-------------------------------------------------------------+-----------------------+--------------------------------+ +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ @@ -381,14 +618,15 @@ The pin-out file can be found in /home/oliver/Documents/FPGA_Dev/FPGA_Uni/Quartu +-----------------+-------+----------+--------------+--------------+--------------+-----------------------+--------------------+--------+----------------+-----------------+----------+--------------+--------------+-------------+---------------------------+----------------------+-----------+ ; Name ; Pin # ; I/O Bank ; X coordinate ; Y coordinate ; Z coordinate ; Combinational Fan-Out ; Registered Fan-Out ; Global ; Input Register ; PCI I/O Enabled ; Bus Hold ; Weak Pull Up ; I/O Standard ; Termination ; Termination Control Block ; Location assigned by ; Slew Rate ; +-----------------+-------+----------+--------------+--------------+--------------+-----------------------+--------------------+--------+----------------+-----------------+----------+--------------+--------------+-------------+---------------------------+----------------------+-----------+ -; HID_Hi_Low[0] ; AC8 ; 3B ; 14 ; 0 ; 51 ; 0 ; 0 ; no ; no ; no ; no ; Off ; 1.2 V ; Off ; -- ; User ; no ; -; HID_PC[0] ; W11 ; 3B ; 10 ; 0 ; 40 ; 0 ; 0 ; no ; no ; no ; no ; Off ; 1.2 V ; Off ; -- ; User ; no ; -; HID_Register[0] ; AB10 ; 3B ; 12 ; 0 ; 34 ; 0 ; 0 ; no ; no ; no ; no ; Off ; 1.2 V ; Off ; -- ; User ; no ; -; HID_Register[1] ; V10 ; 3B ; 17 ; 0 ; 74 ; 0 ; 0 ; no ; no ; no ; no ; Off ; 1.2 V ; Off ; -- ; User ; no ; -; HID_Register[2] ; AC10 ; 3B ; 12 ; 0 ; 51 ; 0 ; 0 ; no ; no ; no ; no ; Off ; 1.2 V ; Off ; -- ; User ; no ; -; HID_Register[3] ; Y11 ; 3B ; 10 ; 0 ; 57 ; 0 ; 0 ; no ; no ; no ; no ; Off ; 1.2 V ; Off ; -- ; User ; no ; -; HID_Register[4] ; AE19 ; 4A ; 50 ; 0 ; 34 ; 0 ; 0 ; no ; no ; no ; no ; Off ; 1.2 V ; Off ; -- ; User ; no ; -; clk[0] ; Y16 ; 4A ; 46 ; 0 ; 17 ; 0 ; 0 ; no ; no ; no ; no ; Off ; 1.2 V ; Off ; -- ; User ; no ; +; HID_Hi_Low[0] ; AC8 ; 3B ; 14 ; 0 ; 51 ; 161 ; 0 ; no ; no ; no ; no ; Off ; 1.2 V ; Off ; -- ; User ; no ; +; HID_PC[0] ; W11 ; 3B ; 10 ; 0 ; 40 ; 16 ; 0 ; no ; no ; no ; no ; Off ; 1.2 V ; Off ; -- ; User ; no ; +; HID_Register[0] ; AB10 ; 3B ; 12 ; 0 ; 34 ; 154 ; 0 ; no ; no ; no ; no ; Off ; 1.2 V ; Off ; -- ; User ; no ; +; HID_Register[1] ; V10 ; 3B ; 17 ; 0 ; 74 ; 157 ; 0 ; no ; no ; no ; no ; Off ; 1.2 V ; Off ; -- ; User ; no ; +; HID_Register[2] ; AC10 ; 3B ; 12 ; 0 ; 51 ; 154 ; 0 ; no ; no ; no ; no ; Off ; 1.2 V ; Off ; -- ; User ; no ; +; HID_Register[3] ; Y11 ; 3B ; 10 ; 0 ; 57 ; 46 ; 0 ; no ; no ; no ; no ; Off ; 1.2 V ; Off ; -- ; User ; no ; +; HID_Register[4] ; AE19 ; 4A ; 50 ; 0 ; 34 ; 18 ; 0 ; no ; no ; no ; no ; Off ; 1.2 V ; Off ; -- ; User ; no ; +; clk[0] ; Y16 ; 4A ; 46 ; 0 ; 17 ; 2524 ; 0 ; yes ; no ; no ; no ; Off ; 1.2 V ; Off ; -- ; User ; no ; +; rst[0] ; AC9 ; 3B ; 14 ; 0 ; 34 ; 307 ; 0 ; no ; no ; no ; no ; Off ; 1.2 V ; Off ; -- ; User ; no ; +-----------------+-------+----------+--------------+--------------+--------------+-----------------------+--------------------+--------+----------------+-----------------+----------+--------------+--------------+-------------+---------------------------+----------------------+-----------+ @@ -397,7 +635,7 @@ The pin-out file can be found in /home/oliver/Documents/FPGA_Dev/FPGA_Uni/Quartu +--------------+-------+----------+--------------+--------------+--------------+-----------------+------------------------+-----------+-----------------+------------+---------------+----------+--------------+--------------+------------------+-----------------------------------+---------------------------+----------------------------+-----------------------------+---------------------+-----------------------------+----------------------+----------------------+---------------------+ ; Name ; Pin # ; I/O Bank ; X coordinate ; Y coordinate ; Z coordinate ; Output Register ; Output Enable Register ; Slew Rate ; PCI I/O Enabled ; Open Drain ; TRI Primitive ; Bus Hold ; Weak Pull Up ; I/O Standard ; Current Strength ; Termination ; Termination Control Block ; Output Buffer Pre-emphasis ; Voltage Output Differential ; Output Buffer Delay ; Output Buffer Delay Control ; Location assigned by ; Output Enable Source ; Output Enable Group ; +--------------+-------+----------+--------------+--------------+--------------+-----------------+------------------------+-----------+-----------------+------------+---------------+----------+--------------+--------------+------------------+-----------------------------------+---------------------------+----------------------------+-----------------------------+---------------------+-----------------------------+----------------------+----------------------+---------------------+ -; out_seg_0[0] ; J25 ; 6A ; 68 ; 32 ; 77 ; no ; no ; 1 ; no ; no ; no ; no ; Off ; 2.5 V ; Default ; Series 50 Ohm without Calibration ; -- ; no ; no ; 0 ; Off ; Fitter ; - ; - ; +; out_seg_0[0] ; F7 ; 8A ; 14 ; 61 ; 51 ; no ; no ; 1 ; no ; no ; no ; no ; Off ; 2.5 V ; Default ; Series 50 Ohm without Calibration ; -- ; no ; no ; 0 ; Off ; User ; - ; - ; ; out_seg_0[1] ; V19 ; 4A ; 66 ; 0 ; 0 ; no ; no ; 1 ; no ; no ; no ; no ; Off ; 1.2 V ; Default ; Series 50 Ohm without Calibration ; -- ; no ; no ; 0 ; Off ; User ; - ; - ; ; out_seg_0[2] ; V18 ; 4A ; 64 ; 0 ; 0 ; no ; no ; 1 ; no ; no ; no ; no ; Off ; 1.2 V ; Default ; Series 50 Ohm without Calibration ; -- ; no ; no ; 0 ; Off ; User ; - ; - ; ; out_seg_0[3] ; V17 ; 4A ; 64 ; 0 ; 17 ; no ; no ; 1 ; no ; no ; no ; no ; Off ; 1.2 V ; Default ; Series 50 Ohm without Calibration ; -- ; no ; no ; 0 ; Off ; User ; - ; - ; @@ -405,7 +643,7 @@ The pin-out file can be found in /home/oliver/Documents/FPGA_Dev/FPGA_Uni/Quartu ; out_seg_0[5] ; Y20 ; 4A ; 65 ; 0 ; 0 ; no ; no ; 1 ; no ; no ; no ; no ; Off ; 1.2 V ; Default ; Series 50 Ohm without Calibration ; -- ; no ; no ; 0 ; Off ; User ; - ; - ; ; out_seg_0[6] ; Y19 ; 4A ; 65 ; 0 ; 17 ; no ; no ; 1 ; no ; no ; no ; no ; Off ; 1.2 V ; Default ; Series 50 Ohm without Calibration ; -- ; no ; no ; 0 ; Off ; User ; - ; - ; ; out_seg_0[7] ; Y18 ; 4A ; 62 ; 0 ; 40 ; no ; no ; 1 ; no ; no ; no ; no ; Off ; 1.2 V ; Default ; Series 50 Ohm without Calibration ; -- ; no ; no ; 0 ; Off ; User ; - ; - ; -; out_seg_1[0] ; D7 ; 8A ; 17 ; 61 ; 74 ; no ; no ; 1 ; no ; no ; no ; no ; Off ; 2.5 V ; Default ; Series 50 Ohm without Calibration ; -- ; no ; no ; 0 ; Off ; Fitter ; - ; - ; +; out_seg_1[0] ; F6 ; 8A ; 15 ; 61 ; 34 ; no ; no ; 1 ; no ; no ; no ; no ; Off ; 2.5 V ; Default ; Series 50 Ohm without Calibration ; -- ; no ; no ; 0 ; Off ; User ; - ; - ; ; out_seg_1[1] ; AA18 ; 4A ; 62 ; 0 ; 57 ; no ; no ; 1 ; no ; no ; no ; no ; Off ; 1.2 V ; Default ; Series 50 Ohm without Calibration ; -- ; no ; no ; 0 ; Off ; User ; - ; - ; ; out_seg_1[2] ; AD26 ; 4A ; 64 ; 0 ; 34 ; no ; no ; 1 ; no ; no ; no ; no ; Off ; 1.2 V ; Default ; Series 50 Ohm without Calibration ; -- ; no ; no ; 0 ; Off ; User ; - ; - ; ; out_seg_1[3] ; AB19 ; 4A ; 65 ; 0 ; 34 ; no ; no ; 1 ; no ; no ; no ; no ; Off ; 1.2 V ; Default ; Series 50 Ohm without Calibration ; -- ; no ; no ; 0 ; Off ; User ; - ; - ; @@ -413,7 +651,7 @@ The pin-out file can be found in /home/oliver/Documents/FPGA_Dev/FPGA_Uni/Quartu ; out_seg_1[5] ; AE25 ; 4A ; 62 ; 0 ; 74 ; no ; no ; 1 ; no ; no ; no ; no ; Off ; 1.2 V ; Default ; Series 50 Ohm without Calibration ; -- ; no ; no ; 0 ; Off ; User ; - ; - ; ; out_seg_1[6] ; AC19 ; 4A ; 65 ; 0 ; 51 ; no ; no ; 1 ; no ; no ; no ; no ; Off ; 1.2 V ; Default ; Series 50 Ohm without Calibration ; -- ; no ; no ; 0 ; Off ; User ; - ; - ; ; out_seg_1[7] ; AF24 ; 4A ; 62 ; 0 ; 91 ; no ; no ; 1 ; no ; no ; no ; no ; Off ; 1.2 V ; Default ; Series 50 Ohm without Calibration ; -- ; no ; no ; 0 ; Off ; User ; - ; - ; -; out_seg_2[0] ; H18 ; 7A ; 64 ; 61 ; 0 ; no ; no ; 1 ; no ; no ; no ; no ; Off ; 2.5 V ; Default ; Series 50 Ohm without Calibration ; -- ; no ; no ; 0 ; Off ; Fitter ; - ; - ; +; out_seg_2[0] ; G6 ; 8A ; 15 ; 61 ; 51 ; no ; no ; 1 ; no ; no ; no ; no ; Off ; 2.5 V ; Default ; Series 50 Ohm without Calibration ; -- ; no ; no ; 0 ; Off ; User ; - ; - ; ; out_seg_2[1] ; AD7 ; 3A ; 7 ; 0 ; 34 ; no ; no ; 1 ; no ; no ; no ; no ; Off ; 2.5 V ; Default ; Series 50 Ohm without Calibration ; -- ; no ; no ; 0 ; Off ; User ; - ; - ; ; out_seg_2[2] ; AD6 ; 3A ; 7 ; 0 ; 51 ; no ; no ; 1 ; no ; no ; no ; no ; Off ; 2.5 V ; Default ; Series 50 Ohm without Calibration ; -- ; no ; no ; 0 ; Off ; User ; - ; - ; ; out_seg_2[3] ; U20 ; 5A ; 68 ; 13 ; 20 ; no ; no ; 1 ; no ; no ; no ; no ; Off ; 2.5 V ; Default ; Series 50 Ohm without Calibration ; -- ; no ; no ; 0 ; Off ; User ; - ; - ; @@ -421,7 +659,7 @@ The pin-out file can be found in /home/oliver/Documents/FPGA_Dev/FPGA_Uni/Quartu ; out_seg_2[5] ; V20 ; 5A ; 68 ; 10 ; 60 ; no ; no ; 1 ; no ; no ; no ; no ; Off ; 2.5 V ; Default ; Series 50 Ohm without Calibration ; -- ; no ; no ; 0 ; Off ; User ; - ; - ; ; out_seg_2[6] ; W21 ; 5A ; 68 ; 11 ; 20 ; no ; no ; 1 ; no ; no ; no ; no ; Off ; 2.5 V ; Default ; Series 50 Ohm without Calibration ; -- ; no ; no ; 0 ; Off ; User ; - ; - ; ; out_seg_2[7] ; W20 ; 5A ; 68 ; 11 ; 3 ; no ; no ; 1 ; no ; no ; no ; no ; Off ; 2.5 V ; Default ; Series 50 Ohm without Calibration ; -- ; no ; no ; 0 ; Off ; User ; - ; - ; -; out_seg_3[0] ; H14 ; 7A ; 53 ; 61 ; 0 ; no ; no ; 1 ; no ; no ; no ; no ; Off ; 2.5 V ; Default ; Series 50 Ohm without Calibration ; -- ; no ; no ; 0 ; Off ; Fitter ; - ; - ; +; out_seg_3[0] ; G7 ; 8A ; 14 ; 61 ; 34 ; no ; no ; 1 ; no ; no ; no ; no ; Off ; 2.5 V ; Default ; Series 50 Ohm without Calibration ; -- ; no ; no ; 0 ; Off ; User ; - ; - ; ; out_seg_3[1] ; Y24 ; 5A ; 68 ; 13 ; 54 ; no ; no ; 1 ; no ; no ; no ; no ; Off ; 2.5 V ; Default ; Series 50 Ohm without Calibration ; -- ; no ; no ; 0 ; Off ; User ; - ; - ; ; out_seg_3[2] ; Y23 ; 5A ; 68 ; 13 ; 37 ; no ; no ; 1 ; no ; no ; no ; no ; Off ; 2.5 V ; Default ; Series 50 Ohm without Calibration ; -- ; no ; no ; 0 ; Off ; User ; - ; - ; ; out_seg_3[3] ; AA23 ; 5A ; 68 ; 11 ; 54 ; no ; no ; 1 ; no ; no ; no ; no ; Off ; 2.5 V ; Default ; Series 50 Ohm without Calibration ; -- ; no ; no ; 0 ; Off ; User ; - ; - ; @@ -440,13 +678,13 @@ The pin-out file can be found in /home/oliver/Documents/FPGA_Dev/FPGA_Uni/Quartu ; B1L ; 0 / 14 ( 0 % ) ; -- ; -- ; -- ; ; B0L ; 0 / 14 ( 0 % ) ; -- ; -- ; -- ; ; 3A ; 2 / 16 ( 13 % ) ; 2.5V ; -- ; 2.5V ; -; 3B ; 6 / 32 ( 19 % ) ; 1.2V ; -- ; 2.5V ; +; 3B ; 7 / 32 ( 22 % ) ; 1.2V ; -- ; 2.5V ; ; 4A ; 16 / 80 ( 20 % ) ; 1.2V ; -- ; 2.5V ; ; 5A ; 12 / 16 ( 75 % ) ; 2.5V ; -- ; 2.5V ; ; 5B ; 0 / 32 ( 0 % ) ; 2.5V ; -- ; 2.5V ; -; 6A ; 1 / 48 ( 2 % ) ; 2.5V ; -- ; 2.5V ; -; 7A ; 2 / 80 ( 3 % ) ; 2.5V ; -- ; 2.5V ; -; 8A ; 1 / 32 ( 3 % ) ; 2.5V ; -- ; 2.5V ; +; 6A ; 0 / 48 ( 0 % ) ; 2.5V ; -- ; 2.5V ; +; 7A ; 0 / 80 ( 0 % ) ; 2.5V ; -- ; 2.5V ; +; 8A ; 4 / 32 ( 13 % ) ; 2.5V ; -- ; 2.5V ; +----------+------------------+---------------+--------------+---------------+ @@ -539,7 +777,7 @@ The pin-out file can be found in /home/oliver/Documents/FPGA_Dev/FPGA_Uni/Quartu ; AC6 ; ; 3A ; VCCIO3A ; power ; ; 2.5V ; -- ; ; -- ; -- ; ; AC7 ; ; 3A ; VREFB3AN0 ; power ; ; ; -- ; ; -- ; -- ; ; AC8 ; 62 ; 3B ; HID_Hi_Low[0] ; input ; 1.2 V ; ; Column I/O ; Y ; no ; Off ; -; AC9 ; 64 ; 3B ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ; +; AC9 ; 64 ; 3B ; rst[0] ; input ; 1.2 V ; ; Column I/O ; Y ; no ; Off ; ; AC10 ; 59 ; 3B ; HID_Register[2] ; input ; 1.2 V ; ; Column I/O ; Y ; no ; Off ; ; AC11 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ; ; AC12 ; ; 3B ; VREFB3BN0 ; power ; ; ; -- ; ; -- ; -- ; @@ -691,7 +929,7 @@ The pin-out file can be found in /home/oliver/Documents/FPGA_Dev/FPGA_Uni/Quartu ; D4 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ; ; D5 ; 395 ; 9A ; ^nCE ; ; ; ; -- ; ; -- ; -- ; ; D6 ; 352 ; 8A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ; -; D7 ; 356 ; 8A ; out_seg_1[0] ; output ; 2.5 V ; ; Column I/O ; N ; no ; Off ; +; D7 ; 356 ; 8A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ; ; D8 ; 372 ; 8A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ; ; D9 ; ; 8A ; VCCIO8A ; power ; ; 2.5V ; -- ; ; -- ; -- ; ; D10 ; 316 ; 7A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ; @@ -742,8 +980,8 @@ The pin-out file can be found in /home/oliver/Documents/FPGA_Dev/FPGA_Uni/Quartu ; F3 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ; ; F4 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ; ; F5 ; 398 ; 9A ; ^nCONFIG ; ; ; ; -- ; ; -- ; -- ; -; F6 ; 360 ; 8A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ; -; F7 ; 366 ; 8A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ; +; F6 ; 360 ; 8A ; out_seg_1[0] ; output ; 2.5 V ; ; Column I/O ; Y ; no ; Off ; +; F7 ; 366 ; 8A ; out_seg_0[0] ; output ; 2.5 V ; ; Column I/O ; Y ; no ; Off ; ; F8 ; ; -- ; VCCPGM ; power ; ; 1.8V/2.5V/3.0V/3.3V ; -- ; ; -- ; -- ; ; F9 ; ; 7A, 8A ; VCCPD7A8A ; power ; ; 2.5V ; -- ; ; -- ; -- ; ; F10 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ; @@ -768,8 +1006,8 @@ The pin-out file can be found in /home/oliver/Documents/FPGA_Dev/FPGA_Uni/Quartu ; G3 ; ; ; NC ; ; ; ; -- ; ; -- ; -- ; ; G4 ; ; ; NC ; ; ; ; -- ; ; -- ; -- ; ; G5 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ; -; G6 ; 362 ; 8A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ; -; G7 ; 364 ; 8A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ; +; G6 ; 362 ; 8A ; out_seg_2[0] ; output ; 2.5 V ; ; Column I/O ; Y ; no ; Off ; +; G7 ; 364 ; 8A ; out_seg_3[0] ; output ; 2.5 V ; ; Column I/O ; Y ; no ; Off ; ; G8 ; ; 8A ; VCCIO8A ; power ; ; 2.5V ; -- ; ; -- ; -- ; ; G9 ; ; -- ; VCC_AUX ; power ; ; 2.5V ; -- ; ; -- ; -- ; ; G10 ; 357 ; 8A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ; @@ -802,11 +1040,11 @@ The pin-out file can be found in /home/oliver/Documents/FPGA_Dev/FPGA_Uni/Quartu ; H11 ; ; 7A ; VCCIO7A ; power ; ; 2.5V ; -- ; ; -- ; -- ; ; H12 ; 327 ; 7A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ; ; H13 ; 297 ; 7A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ; -; H14 ; 295 ; 7A ; out_seg_3[0] ; output ; 2.5 V ; ; Column I/O ; N ; no ; Off ; +; H14 ; 295 ; 7A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ; ; H15 ; 263 ; 7A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ; ; H16 ; ; ; GND ; gnd ; ; ; -- ; ; -- ; -- ; ; H17 ; 273 ; 7A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ; -; H18 ; 271 ; 7A ; out_seg_2[0] ; output ; 2.5 V ; ; Column I/O ; N ; no ; Off ; +; H18 ; 271 ; 7A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Column I/O ; ; no ; On ; ; H19 ; 250 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ; ; H20 ; 252 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ; ; H21 ; ; 6A ; VCCIO6A ; power ; ; 2.5V ; -- ; ; -- ; -- ; @@ -839,7 +1077,7 @@ The pin-out file can be found in /home/oliver/Documents/FPGA_Dev/FPGA_Uni/Quartu ; J22 ; ; 6A ; VCCPD6A ; power ; ; 2.5V ; -- ; ; -- ; -- ; ; J23 ; 244 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ; ; J24 ; ; 6A ; VCCIO6A ; power ; ; 2.5V ; -- ; ; -- ; -- ; -; J25 ; 215 ; 6A ; out_seg_0[0] ; output ; 2.5 V ; ; Row I/O ; N ; no ; Off ; +; J25 ; 215 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ; ; J26 ; 217 ; 6A ; RESERVED_INPUT_WITH_WEAK_PULLUP ; ; ; ; Row I/O ; ; no ; On ; ; K1 ; 2 ; B1L ; GXB_NC ; ; ; ; -- ; ; -- ; -- ; ; K2 ; 3 ; B1L ; GXB_NC ; ; ; ; -- ; ; -- ; -- ; @@ -1168,20 +1406,30 @@ Note: Pin directions (input, output or bidir) are based on device operating in u ; out_seg_3[5] ; Incomplete set of assignments ; ; out_seg_3[6] ; Incomplete set of assignments ; ; out_seg_3[7] ; Incomplete set of assignments ; -; out_seg_0[0] ; Missing location assignment ; -; out_seg_1[0] ; Missing location assignment ; -; out_seg_2[0] ; Missing location assignment ; -; out_seg_3[0] ; Missing location assignment ; +--------------+--------------------------------------+ -+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ -; Fitter Resource Utilization by Entity ; -+----------------------------+----------------------+----------------------------------+---------------------------------------------------+----------------------------------+----------------------+---------------------+---------------------------+---------------+-------------------+-------+------------+------+--------------+---------------------+-------------+--------------+ -; Compilation Hierarchy Node ; ALMs needed [=A-B+C] ; [A] ALMs used in final placement ; [B] Estimate of ALMs recoverable by dense packing ; [C] Estimate of ALMs unavailable ; ALMs used for memory ; Combinational ALUTs ; Dedicated Logic Registers ; I/O Registers ; Block Memory Bits ; M10Ks ; DSP Blocks ; Pins ; Virtual Pins ; Full Hierarchy Name ; Entity Name ; Library Name ; -+----------------------------+----------------------+----------------------------------+---------------------------------------------------+----------------------------------+----------------------+---------------------+---------------------------+---------------+-------------------+-------+------------+------+--------------+---------------------+-------------+--------------+ -; |assignment2 ; 0.5 (0.5) ; 0.5 (0.5) ; 0.0 (0.0) ; 0.0 (0.0) ; 0.0 (0.0) ; 1 (1) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 40 ; 0 ; |assignment2 ; assignment2 ; work ; -+----------------------------+----------------------+----------------------------------+---------------------------------------------------+----------------------------------+----------------------+---------------------+---------------------------+---------------+-------------------+-------+------------+------+--------------+---------------------+-------------+--------------+ ++-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ +; Fitter Resource Utilization by Entity ; ++-------------------------------------------+----------------------+----------------------------------+---------------------------------------------------+----------------------------------+----------------------+---------------------+---------------------------+---------------+-------------------+-------+------------+------+--------------+--------------------------------------------------------------------------+------------------------+--------------+ +; Compilation Hierarchy Node ; ALMs needed [=A-B+C] ; [A] ALMs used in final placement ; [B] Estimate of ALMs recoverable by dense packing ; [C] Estimate of ALMs unavailable ; ALMs used for memory ; Combinational ALUTs ; Dedicated Logic Registers ; I/O Registers ; Block Memory Bits ; M10Ks ; DSP Blocks ; Pins ; Virtual Pins ; Full Hierarchy Name ; Entity Name ; Library Name ; ++-------------------------------------------+----------------------+----------------------------------+---------------------------------------------------+----------------------------------+----------------------+---------------------+---------------------------+---------------+-------------------+-------+------------+------+--------------+--------------------------------------------------------------------------+------------------------+--------------+ +; |assignment2 ; 1734.5 (712.4) ; 2155.5 (764.0) ; 465.5 (54.7) ; 44.5 (3.1) ; 0.0 (0.0) ; 2019 (1143) ; 2524 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 41 ; 0 ; |assignment2 ; assignment2 ; work ; +; |alu:ALU| ; 60.9 (28.7) ; 64.2 (32.8) ; 4.2 (4.2) ; 0.9 (0.0) ; 0.0 (0.0) ; 100 (50) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; |assignment2|alu:ALU ; alu ; work ; +; |asu:adder_unit| ; 31.7 (31.7) ; 30.8 (30.8) ; 0.0 (0.0) ; 0.8 (0.8) ; 0.0 (0.0) ; 49 (49) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; |assignment2|alu:ALU|asu:adder_unit ; asu ; work ; +; |lu:logic_unit| ; 0.5 (0.5) ; 0.5 (0.5) ; 0.0 (0.0) ; 0.0 (0.0) ; 0.0 (0.0) ; 1 (1) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; |assignment2|alu:ALU|lu:logic_unit ; lu ; work ; +; |control_unit:CONTROL_UNIT| ; 4.7 (3.5) ; 5.3 (4.2) ; 0.7 (0.7) ; 0.0 (0.0) ; 0.0 (0.0) ; 9 (7) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; |assignment2|control_unit:CONTROL_UNIT ; control_unit ; work ; +; |instruction_classifier:CLASSIFIER| ; 1.2 (1.2) ; 1.2 (1.2) ; 0.0 (0.0) ; 0.0 (0.0) ; 0.0 (0.0) ; 2 (2) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; |assignment2|control_unit:CONTROL_UNIT|instruction_classifier:CLASSIFIER ; instruction_classifier ; work ; +; |instruction_counter:PC| ; 7.5 (7.5) ; 8.9 (8.9) ; 1.4 (1.4) ; 0.0 (0.0) ; 0.0 (0.0) ; 0 (0) ; 46 (46) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; |assignment2|instruction_counter:PC ; instruction_counter ; work ; +; |ram:RAM| ; 476.6 (476.6) ; 649.3 (649.3) ; 204.7 (204.7) ; 31.9 (31.9) ; 0.0 (0.0) ; 313 (313) ; 1280 (1280) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; |assignment2|ram:RAM ; ram ; work ; +; |register_file:REGS| ; 442.3 (442.3) ; 635.6 (635.6) ; 201.9 (201.9) ; 8.6 (8.6) ; 0.0 (0.0) ; 400 (400) ; 1198 (1198) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; |assignment2|register_file:REGS ; register_file ; work ; +; |rom:ROM| ; 14.2 (14.2) ; 14.2 (14.2) ; 0.0 (0.0) ; 0.0 (0.0) ; 0.0 (0.0) ; 26 (26) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; |assignment2|rom:ROM ; rom ; work ; +; |seven_seg_4digit:display| ; 14.0 (0.0) ; 14.0 (0.0) ; 0.0 (0.0) ; 0.0 (0.0) ; 0.0 (0.0) ; 28 (0) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; |assignment2|seven_seg_4digit:display ; seven_seg_4digit ; work ; +; |seven_seg:digit0| ; 3.5 (3.5) ; 3.5 (3.5) ; 0.0 (0.0) ; 0.0 (0.0) ; 0.0 (0.0) ; 7 (7) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; |assignment2|seven_seg_4digit:display|seven_seg:digit0 ; seven_seg ; work ; +; |seven_seg:digit1| ; 3.5 (3.5) ; 3.5 (3.5) ; 0.0 (0.0) ; 0.0 (0.0) ; 0.0 (0.0) ; 7 (7) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; |assignment2|seven_seg_4digit:display|seven_seg:digit1 ; seven_seg ; work ; +; |seven_seg:digit2| ; 3.5 (3.5) ; 3.5 (3.5) ; 0.0 (0.0) ; 0.0 (0.0) ; 0.0 (0.0) ; 7 (7) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; |assignment2|seven_seg_4digit:display|seven_seg:digit2 ; seven_seg ; work ; +; |seven_seg:digit3| ; 3.5 (3.5) ; 3.5 (3.5) ; 0.0 (0.0) ; 0.0 (0.0) ; 0.0 (0.0) ; 7 (7) ; 0 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; |assignment2|seven_seg_4digit:display|seven_seg:digit3 ; seven_seg ; work ; ++-------------------------------------------+----------------------+----------------------------------+---------------------------------------------------+----------------------------------+----------------------+---------------------+---------------------------+---------------+-------------------+-------+------------+------+--------------+--------------------------------------------------------------------------+------------------------+--------------+ Note: For table entries with two numbers listed, the numbers in parentheses indicate the number of resources of the given type used by the specific entity alone. The numbers listed outside of parentheses indicate the total resources of the given type used by the specific entity and all of its sub-entities in the hierarchy. @@ -1190,7 +1438,6 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi +-----------------+----------+----+------+------+----+------+-------+--------+------------------------+--------------------------+ ; Name ; Pin Type ; D1 ; D3_0 ; D3_1 ; D4 ; D5 ; D5 OE ; D5 OCT ; T11 (Postamble Gating) ; T11 (Postamble Ungating) ; +-----------------+----------+----+------+------+----+------+-------+--------+------------------------+--------------------------+ -; HID_PC[0] ; Input ; -- ; -- ; -- ; -- ; -- ; -- ; -- ; -- ; -- ; ; out_seg_0[0] ; Output ; -- ; -- ; -- ; -- ; (0) ; (31) ; -- ; -- ; -- ; ; out_seg_0[1] ; Output ; -- ; -- ; -- ; -- ; (0) ; (31) ; -- ; -- ; -- ; ; out_seg_0[2] ; Output ; -- ; -- ; -- ; -- ; (0) ; (31) ; -- ; -- ; -- ; @@ -1223,56 +1470,1378 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi ; out_seg_3[5] ; Output ; -- ; -- ; -- ; -- ; (0) ; (31) ; -- ; -- ; -- ; ; out_seg_3[6] ; Output ; -- ; -- ; -- ; -- ; (0) ; (31) ; -- ; -- ; -- ; ; out_seg_3[7] ; Output ; -- ; -- ; -- ; -- ; (0) ; (31) ; -- ; -- ; -- ; -; HID_Hi_Low[0] ; Input ; -- ; -- ; -- ; -- ; -- ; -- ; -- ; -- ; -- ; -; HID_Register[4] ; Input ; -- ; -- ; -- ; -- ; -- ; -- ; -- ; -- ; -- ; -; HID_Register[2] ; Input ; -- ; -- ; -- ; -- ; -- ; -- ; -- ; -- ; -- ; -; HID_Register[0] ; Input ; -- ; -- ; -- ; -- ; -- ; -- ; -- ; -- ; -- ; -; HID_Register[1] ; Input ; -- ; -- ; -- ; -- ; -- ; -- ; -- ; -- ; -- ; -; HID_Register[3] ; Input ; -- ; -- ; -- ; -- ; -- ; -- ; -- ; -- ; -- ; -; clk[0] ; Input ; -- ; -- ; -- ; -- ; -- ; -- ; -- ; -- ; -- ; +; HID_Hi_Low[0] ; Input ; -- ; -- ; (0) ; -- ; -- ; -- ; -- ; -- ; -- ; +; HID_Register[4] ; Input ; -- ; -- ; (0) ; -- ; -- ; -- ; -- ; -- ; -- ; +; HID_Register[3] ; Input ; -- ; -- ; (0) ; -- ; -- ; -- ; -- ; -- ; -- ; +; HID_Register[1] ; Input ; -- ; (0) ; -- ; -- ; -- ; -- ; -- ; -- ; -- ; +; HID_Register[2] ; Input ; -- ; -- ; (0) ; -- ; -- ; -- ; -- ; -- ; -- ; +; HID_Register[0] ; Input ; -- ; (0) ; -- ; -- ; -- ; -- ; -- ; -- ; -- ; +; HID_PC[0] ; Input ; -- ; -- ; (0) ; -- ; -- ; -- ; -- ; -- ; -- ; +; clk[0] ; Input ; -- ; (0) ; -- ; -- ; -- ; -- ; -- ; -- ; -- ; +; rst[0] ; Input ; -- ; -- ; (0) ; -- ; -- ; -- ; -- ; -- ; -- ; +-----------------+----------+----+------+------+----+------+-------+--------+------------------------+--------------------------+ -+---------------------------------------------------+ -; Pad To Core Delay Chain Fanout ; -+---------------------+-------------------+---------+ -; Source Pin / Fanout ; Pad To Core Index ; Setting ; -+---------------------+-------------------+---------+ -; HID_PC[0] ; ; ; -; HID_Hi_Low[0] ; ; ; -; HID_Register[4] ; ; ; -; HID_Register[2] ; ; ; -; HID_Register[0] ; ; ; -; HID_Register[1] ; ; ; -; HID_Register[3] ; ; ; -; clk[0] ; ; ; -+---------------------+-------------------+---------+ ++------------------------------------------------------------------------------+ +; Pad To Core Delay Chain Fanout ; ++------------------------------------------------+-------------------+---------+ +; Source Pin / Fanout ; Pad To Core Index ; Setting ; ++------------------------------------------------+-------------------+---------+ +; HID_Hi_Low[0] ; ; ; +; - PC_Reg_Display[0]~15 ; 1 ; 0 ; +; - PC_Reg_Display[0]~21 ; 1 ; 0 ; +; - PC_Reg_Display[1]~37 ; 1 ; 0 ; +; - PC_Reg_Display[1]~43 ; 1 ; 0 ; +; - PC_Reg_Display[2]~44 ; 1 ; 0 ; +; - PC_Reg_Display[2]~45 ; 1 ; 0 ; +; - PC_Reg_Display[2]~46 ; 1 ; 0 ; +; - PC_Reg_Display[2]~47 ; 1 ; 0 ; +; - PC_Reg_Display[2]~53 ; 1 ; 0 ; +; - PC_Reg_Display[2]~58 ; 1 ; 0 ; +; - PC_Reg_Display[2]~63 ; 1 ; 0 ; +; - PC_Reg_Display[2]~65 ; 1 ; 0 ; +; - PC_Reg_Display[3]~66 ; 1 ; 0 ; +; - PC_Reg_Display[3]~67 ; 1 ; 0 ; +; - PC_Reg_Display[3]~68 ; 1 ; 0 ; +; - PC_Reg_Display[3]~69 ; 1 ; 0 ; +; - PC_Reg_Display[3]~75 ; 1 ; 0 ; +; - PC_Reg_Display[3]~80 ; 1 ; 0 ; +; - PC_Reg_Display[3]~85 ; 1 ; 0 ; +; - PC_Reg_Display[3]~87 ; 1 ; 0 ; +; - PC_Reg_Display[4]~88 ; 1 ; 0 ; +; - PC_Reg_Display[4]~89 ; 1 ; 0 ; +; - PC_Reg_Display[4]~90 ; 1 ; 0 ; +; - PC_Reg_Display[4]~91 ; 1 ; 0 ; +; - PC_Reg_Display[4]~97 ; 1 ; 0 ; +; - PC_Reg_Display[4]~98 ; 1 ; 0 ; +; - PC_Reg_Display[4]~99 ; 1 ; 0 ; +; - PC_Reg_Display[4]~100 ; 1 ; 0 ; +; - PC_Reg_Display[4]~101 ; 1 ; 0 ; +; - PC_Reg_Display[4]~103 ; 1 ; 0 ; +; - PC_Reg_Display[4]~104 ; 1 ; 0 ; +; - PC_Reg_Display[4]~105 ; 1 ; 0 ; +; - PC_Reg_Display[4]~106 ; 1 ; 0 ; +; - PC_Reg_Display[4]~109 ; 1 ; 0 ; +; - PC_Reg_Display[5]~110 ; 1 ; 0 ; +; - PC_Reg_Display[5]~111 ; 1 ; 0 ; +; - PC_Reg_Display[5]~112 ; 1 ; 0 ; +; - PC_Reg_Display[5]~113 ; 1 ; 0 ; +; - PC_Reg_Display[5]~115 ; 1 ; 0 ; +; - PC_Reg_Display[5]~116 ; 1 ; 0 ; +; - PC_Reg_Display[5]~117 ; 1 ; 0 ; +; - PC_Reg_Display[5]~118 ; 1 ; 0 ; +; - PC_Reg_Display[5]~124 ; 1 ; 0 ; +; - PC_Reg_Display[5]~129 ; 1 ; 0 ; +; - PC_Reg_Display[5]~131 ; 1 ; 0 ; +; - PC_Reg_Display[6]~132 ; 1 ; 0 ; +; - PC_Reg_Display[6]~133 ; 1 ; 0 ; +; - PC_Reg_Display[6]~134 ; 1 ; 0 ; +; - PC_Reg_Display[6]~135 ; 1 ; 0 ; +; - PC_Reg_Display[6]~141 ; 1 ; 0 ; +; - PC_Reg_Display[6]~146 ; 1 ; 0 ; +; - PC_Reg_Display[6]~151 ; 1 ; 0 ; +; - PC_Reg_Display[6]~153 ; 1 ; 0 ; +; - PC_Reg_Display[7]~154 ; 1 ; 0 ; +; - PC_Reg_Display[7]~155 ; 1 ; 0 ; +; - PC_Reg_Display[7]~156 ; 1 ; 0 ; +; - PC_Reg_Display[7]~157 ; 1 ; 0 ; +; - PC_Reg_Display[7]~163 ; 1 ; 0 ; +; - PC_Reg_Display[7]~168 ; 1 ; 0 ; +; - PC_Reg_Display[7]~173 ; 1 ; 0 ; +; - PC_Reg_Display[7]~175 ; 1 ; 0 ; +; - PC_Reg_Display[8]~176 ; 1 ; 0 ; +; - PC_Reg_Display[8]~177 ; 1 ; 0 ; +; - PC_Reg_Display[8]~178 ; 1 ; 0 ; +; - PC_Reg_Display[8]~179 ; 1 ; 0 ; +; - PC_Reg_Display[8]~185 ; 1 ; 0 ; +; - PC_Reg_Display[8]~186 ; 1 ; 0 ; +; - PC_Reg_Display[8]~187 ; 1 ; 0 ; +; - PC_Reg_Display[8]~188 ; 1 ; 0 ; +; - PC_Reg_Display[8]~189 ; 1 ; 0 ; +; - PC_Reg_Display[8]~191 ; 1 ; 0 ; +; - PC_Reg_Display[8]~192 ; 1 ; 0 ; +; - PC_Reg_Display[8]~193 ; 1 ; 0 ; +; - PC_Reg_Display[8]~194 ; 1 ; 0 ; +; - PC_Reg_Display[8]~197 ; 1 ; 0 ; +; - PC_Reg_Display[9]~198 ; 1 ; 0 ; +; - PC_Reg_Display[9]~199 ; 1 ; 0 ; +; - PC_Reg_Display[9]~200 ; 1 ; 0 ; +; - PC_Reg_Display[9]~201 ; 1 ; 0 ; +; - PC_Reg_Display[9]~203 ; 1 ; 0 ; +; - PC_Reg_Display[9]~204 ; 1 ; 0 ; +; - PC_Reg_Display[9]~205 ; 1 ; 0 ; +; - PC_Reg_Display[9]~206 ; 1 ; 0 ; +; - PC_Reg_Display[9]~212 ; 1 ; 0 ; +; - PC_Reg_Display[9]~217 ; 1 ; 0 ; +; - PC_Reg_Display[9]~219 ; 1 ; 0 ; +; - PC_Reg_Display[10]~220 ; 1 ; 0 ; +; - PC_Reg_Display[10]~221 ; 1 ; 0 ; +; - PC_Reg_Display[10]~222 ; 1 ; 0 ; +; - PC_Reg_Display[10]~223 ; 1 ; 0 ; +; - PC_Reg_Display[10]~229 ; 1 ; 0 ; +; - PC_Reg_Display[10]~230 ; 1 ; 0 ; +; - PC_Reg_Display[10]~231 ; 1 ; 0 ; +; - PC_Reg_Display[10]~232 ; 1 ; 0 ; +; - PC_Reg_Display[10]~233 ; 1 ; 0 ; +; - PC_Reg_Display[10]~235 ; 1 ; 0 ; +; - PC_Reg_Display[10]~236 ; 1 ; 0 ; +; - PC_Reg_Display[10]~237 ; 1 ; 0 ; +; - PC_Reg_Display[10]~238 ; 1 ; 0 ; +; - PC_Reg_Display[10]~241 ; 1 ; 0 ; +; - PC_Reg_Display[11]~242 ; 1 ; 0 ; +; - PC_Reg_Display[11]~243 ; 1 ; 0 ; +; - PC_Reg_Display[11]~244 ; 1 ; 0 ; +; - PC_Reg_Display[11]~245 ; 1 ; 0 ; +; - PC_Reg_Display[11]~247 ; 1 ; 0 ; +; - PC_Reg_Display[11]~248 ; 1 ; 0 ; +; - PC_Reg_Display[11]~249 ; 1 ; 0 ; +; - PC_Reg_Display[11]~250 ; 1 ; 0 ; +; - PC_Reg_Display[11]~256 ; 1 ; 0 ; +; - PC_Reg_Display[11]~261 ; 1 ; 0 ; +; - PC_Reg_Display[11]~263 ; 1 ; 0 ; +; - PC_Reg_Display[12]~264 ; 1 ; 0 ; +; - PC_Reg_Display[12]~265 ; 1 ; 0 ; +; - PC_Reg_Display[12]~266 ; 1 ; 0 ; +; - PC_Reg_Display[12]~267 ; 1 ; 0 ; +; - PC_Reg_Display[12]~273 ; 1 ; 0 ; +; - PC_Reg_Display[12]~274 ; 1 ; 0 ; +; - PC_Reg_Display[12]~275 ; 1 ; 0 ; +; - PC_Reg_Display[12]~276 ; 1 ; 0 ; +; - PC_Reg_Display[12]~277 ; 1 ; 0 ; +; - PC_Reg_Display[12]~279 ; 1 ; 0 ; +; - PC_Reg_Display[12]~280 ; 1 ; 0 ; +; - PC_Reg_Display[12]~281 ; 1 ; 0 ; +; - PC_Reg_Display[12]~282 ; 1 ; 0 ; +; - PC_Reg_Display[12]~285 ; 1 ; 0 ; +; - PC_Reg_Display[13]~286 ; 1 ; 0 ; +; - PC_Reg_Display[13]~287 ; 1 ; 0 ; +; - PC_Reg_Display[13]~288 ; 1 ; 0 ; +; - PC_Reg_Display[13]~289 ; 1 ; 0 ; +; - PC_Reg_Display[13]~291 ; 1 ; 0 ; +; - PC_Reg_Display[13]~292 ; 1 ; 0 ; +; - PC_Reg_Display[13]~293 ; 1 ; 0 ; +; - PC_Reg_Display[13]~294 ; 1 ; 0 ; +; - PC_Reg_Display[13]~300 ; 1 ; 0 ; +; - PC_Reg_Display[13]~305 ; 1 ; 0 ; +; - PC_Reg_Display[13]~307 ; 1 ; 0 ; +; - PC_Reg_Display[14]~308 ; 1 ; 0 ; +; - PC_Reg_Display[14]~309 ; 1 ; 0 ; +; - PC_Reg_Display[14]~310 ; 1 ; 0 ; +; - PC_Reg_Display[14]~311 ; 1 ; 0 ; +; - PC_Reg_Display[14]~317 ; 1 ; 0 ; +; - PC_Reg_Display[14]~318 ; 1 ; 0 ; +; - PC_Reg_Display[14]~319 ; 1 ; 0 ; +; - PC_Reg_Display[14]~320 ; 1 ; 0 ; +; - PC_Reg_Display[14]~321 ; 1 ; 0 ; +; - PC_Reg_Display[14]~323 ; 1 ; 0 ; +; - PC_Reg_Display[14]~324 ; 1 ; 0 ; +; - PC_Reg_Display[14]~325 ; 1 ; 0 ; +; - PC_Reg_Display[14]~326 ; 1 ; 0 ; +; - PC_Reg_Display[14]~329 ; 1 ; 0 ; +; - PC_Reg_Display[15]~330 ; 1 ; 0 ; +; - PC_Reg_Display[15]~331 ; 1 ; 0 ; +; - PC_Reg_Display[15]~332 ; 1 ; 0 ; +; - PC_Reg_Display[15]~333 ; 1 ; 0 ; +; - PC_Reg_Display[15]~335 ; 1 ; 0 ; +; - PC_Reg_Display[15]~336 ; 1 ; 0 ; +; - PC_Reg_Display[15]~337 ; 1 ; 0 ; +; - PC_Reg_Display[15]~338 ; 1 ; 0 ; +; - PC_Reg_Display[15]~344 ; 1 ; 0 ; +; - PC_Reg_Display[15]~349 ; 1 ; 0 ; +; - PC_Reg_Display[15]~351 ; 1 ; 0 ; +; HID_Register[4] ; ; ; +; - PC_Reg_Display[0]~15 ; 1 ; 0 ; +; - PC_Reg_Display[0]~21 ; 1 ; 0 ; +; - PC_Reg_Display[1]~37 ; 1 ; 0 ; +; - PC_Reg_Display[1]~43 ; 1 ; 0 ; +; - PC_Reg_Display[2]~64 ; 1 ; 0 ; +; - PC_Reg_Display[3]~86 ; 1 ; 0 ; +; - PC_Reg_Display[4]~108 ; 1 ; 0 ; +; - PC_Reg_Display[5]~130 ; 1 ; 0 ; +; - PC_Reg_Display[6]~152 ; 1 ; 0 ; +; - PC_Reg_Display[7]~174 ; 1 ; 0 ; +; - PC_Reg_Display[8]~196 ; 1 ; 0 ; +; - PC_Reg_Display[9]~218 ; 1 ; 0 ; +; - PC_Reg_Display[10]~240 ; 1 ; 0 ; +; - PC_Reg_Display[11]~262 ; 1 ; 0 ; +; - PC_Reg_Display[12]~284 ; 1 ; 0 ; +; - PC_Reg_Display[13]~306 ; 1 ; 0 ; +; - PC_Reg_Display[14]~328 ; 1 ; 0 ; +; - PC_Reg_Display[15]~350 ; 1 ; 0 ; +; HID_Register[3] ; ; ; +; - PC_Reg_Display[0]~0 ; 1 ; 0 ; +; - PC_Reg_Display[0]~1 ; 1 ; 0 ; +; - PC_Reg_Display[0]~2 ; 1 ; 0 ; +; - PC_Reg_Display[0]~3 ; 1 ; 0 ; +; - PC_Reg_Display[0]~5 ; 1 ; 0 ; +; - PC_Reg_Display[0]~6 ; 1 ; 0 ; +; - PC_Reg_Display[0]~7 ; 1 ; 0 ; +; - PC_Reg_Display[0]~8 ; 1 ; 0 ; +; - PC_Reg_Display[0]~10 ; 1 ; 0 ; +; - PC_Reg_Display[0]~11 ; 1 ; 0 ; +; - PC_Reg_Display[0]~12 ; 1 ; 0 ; +; - PC_Reg_Display[0]~13 ; 1 ; 0 ; +; - PC_Reg_Display[0]~16 ; 1 ; 0 ; +; - PC_Reg_Display[0]~17 ; 1 ; 0 ; +; - PC_Reg_Display[0]~18 ; 1 ; 0 ; +; - PC_Reg_Display[0]~19 ; 1 ; 0 ; +; - PC_Reg_Display[1]~22 ; 1 ; 0 ; +; - PC_Reg_Display[1]~23 ; 1 ; 0 ; +; - PC_Reg_Display[1]~24 ; 1 ; 0 ; +; - PC_Reg_Display[1]~25 ; 1 ; 0 ; +; - PC_Reg_Display[1]~27 ; 1 ; 0 ; +; - PC_Reg_Display[1]~28 ; 1 ; 0 ; +; - PC_Reg_Display[1]~29 ; 1 ; 0 ; +; - PC_Reg_Display[1]~30 ; 1 ; 0 ; +; - PC_Reg_Display[1]~32 ; 1 ; 0 ; +; - PC_Reg_Display[1]~33 ; 1 ; 0 ; +; - PC_Reg_Display[1]~34 ; 1 ; 0 ; +; - PC_Reg_Display[1]~35 ; 1 ; 0 ; +; - PC_Reg_Display[1]~38 ; 1 ; 0 ; +; - PC_Reg_Display[1]~39 ; 1 ; 0 ; +; - PC_Reg_Display[1]~40 ; 1 ; 0 ; +; - PC_Reg_Display[1]~41 ; 1 ; 0 ; +; - PC_Reg_Display[2]~64 ; 1 ; 0 ; +; - PC_Reg_Display[3]~86 ; 1 ; 0 ; +; - PC_Reg_Display[4]~108 ; 1 ; 0 ; +; - PC_Reg_Display[5]~130 ; 1 ; 0 ; +; - PC_Reg_Display[6]~152 ; 1 ; 0 ; +; - PC_Reg_Display[7]~174 ; 1 ; 0 ; +; - PC_Reg_Display[8]~196 ; 1 ; 0 ; +; - PC_Reg_Display[9]~218 ; 1 ; 0 ; +; - PC_Reg_Display[10]~240 ; 1 ; 0 ; +; - PC_Reg_Display[11]~262 ; 1 ; 0 ; +; - PC_Reg_Display[12]~284 ; 1 ; 0 ; +; - PC_Reg_Display[13]~306 ; 1 ; 0 ; +; - PC_Reg_Display[14]~328 ; 1 ; 0 ; +; - PC_Reg_Display[15]~350 ; 1 ; 0 ; +; HID_Register[1] ; ; ; +; - PC_Reg_Display[0]~0 ; 0 ; 0 ; +; - PC_Reg_Display[0]~1 ; 0 ; 0 ; +; - PC_Reg_Display[0]~2 ; 0 ; 0 ; +; - PC_Reg_Display[0]~3 ; 0 ; 0 ; +; - PC_Reg_Display[0]~9 ; 0 ; 0 ; +; - PC_Reg_Display[0]~14 ; 0 ; 0 ; +; - PC_Reg_Display[0]~16 ; 0 ; 0 ; +; - PC_Reg_Display[0]~17 ; 0 ; 0 ; +; - PC_Reg_Display[0]~18 ; 0 ; 0 ; +; - PC_Reg_Display[0]~19 ; 0 ; 0 ; +; - PC_Reg_Display[1]~22 ; 0 ; 0 ; +; - PC_Reg_Display[1]~23 ; 0 ; 0 ; +; - PC_Reg_Display[1]~24 ; 0 ; 0 ; +; - PC_Reg_Display[1]~25 ; 0 ; 0 ; +; - PC_Reg_Display[1]~31 ; 0 ; 0 ; +; - PC_Reg_Display[1]~36 ; 0 ; 0 ; +; - PC_Reg_Display[1]~38 ; 0 ; 0 ; +; - PC_Reg_Display[1]~39 ; 0 ; 0 ; +; - PC_Reg_Display[1]~40 ; 0 ; 0 ; +; - PC_Reg_Display[1]~41 ; 0 ; 0 ; +; - PC_Reg_Display[2]~48 ; 0 ; 0 ; +; - PC_Reg_Display[2]~49 ; 0 ; 0 ; +; - PC_Reg_Display[2]~50 ; 0 ; 0 ; +; - PC_Reg_Display[2]~51 ; 0 ; 0 ; +; - PC_Reg_Display[2]~52 ; 0 ; 0 ; +; - PC_Reg_Display[2]~54 ; 0 ; 0 ; +; - PC_Reg_Display[2]~55 ; 0 ; 0 ; +; - PC_Reg_Display[2]~56 ; 0 ; 0 ; +; - PC_Reg_Display[2]~57 ; 0 ; 0 ; +; - PC_Reg_Display[2]~59 ; 0 ; 0 ; +; - PC_Reg_Display[2]~60 ; 0 ; 0 ; +; - PC_Reg_Display[2]~61 ; 0 ; 0 ; +; - PC_Reg_Display[2]~62 ; 0 ; 0 ; +; - PC_Reg_Display[3]~70 ; 0 ; 0 ; +; - PC_Reg_Display[3]~71 ; 0 ; 0 ; +; - PC_Reg_Display[3]~72 ; 0 ; 0 ; +; - PC_Reg_Display[3]~73 ; 0 ; 0 ; +; - PC_Reg_Display[3]~74 ; 0 ; 0 ; +; - PC_Reg_Display[3]~76 ; 0 ; 0 ; +; - PC_Reg_Display[3]~77 ; 0 ; 0 ; +; - PC_Reg_Display[3]~78 ; 0 ; 0 ; +; - PC_Reg_Display[3]~79 ; 0 ; 0 ; +; - PC_Reg_Display[3]~81 ; 0 ; 0 ; +; - PC_Reg_Display[3]~82 ; 0 ; 0 ; +; - PC_Reg_Display[3]~83 ; 0 ; 0 ; +; - PC_Reg_Display[3]~84 ; 0 ; 0 ; +; - PC_Reg_Display[4]~92 ; 0 ; 0 ; +; - PC_Reg_Display[4]~97 ; 0 ; 0 ; +; - PC_Reg_Display[4]~98 ; 0 ; 0 ; +; - PC_Reg_Display[4]~99 ; 0 ; 0 ; +; - PC_Reg_Display[4]~100 ; 0 ; 0 ; +; - PC_Reg_Display[4]~101 ; 0 ; 0 ; +; - PC_Reg_Display[4]~103 ; 0 ; 0 ; +; - PC_Reg_Display[4]~104 ; 0 ; 0 ; +; - PC_Reg_Display[4]~105 ; 0 ; 0 ; +; - PC_Reg_Display[4]~106 ; 0 ; 0 ; +; - PC_Reg_Display[5]~114 ; 0 ; 0 ; +; - PC_Reg_Display[5]~115 ; 0 ; 0 ; +; - PC_Reg_Display[5]~116 ; 0 ; 0 ; +; - PC_Reg_Display[5]~117 ; 0 ; 0 ; +; - PC_Reg_Display[5]~118 ; 0 ; 0 ; +; - PC_Reg_Display[5]~124 ; 0 ; 0 ; +; - PC_Reg_Display[5]~129 ; 0 ; 0 ; +; - PC_Reg_Display[6]~136 ; 0 ; 0 ; +; - PC_Reg_Display[6]~137 ; 0 ; 0 ; +; - PC_Reg_Display[6]~138 ; 0 ; 0 ; +; - PC_Reg_Display[6]~139 ; 0 ; 0 ; +; - PC_Reg_Display[6]~140 ; 0 ; 0 ; +; - PC_Reg_Display[6]~142 ; 0 ; 0 ; +; - PC_Reg_Display[6]~143 ; 0 ; 0 ; +; - PC_Reg_Display[6]~144 ; 0 ; 0 ; +; - PC_Reg_Display[6]~145 ; 0 ; 0 ; +; - PC_Reg_Display[6]~147 ; 0 ; 0 ; +; - PC_Reg_Display[6]~148 ; 0 ; 0 ; +; - PC_Reg_Display[6]~149 ; 0 ; 0 ; +; - PC_Reg_Display[6]~150 ; 0 ; 0 ; +; - PC_Reg_Display[7]~158 ; 0 ; 0 ; +; - PC_Reg_Display[7]~159 ; 0 ; 0 ; +; - PC_Reg_Display[7]~160 ; 0 ; 0 ; +; - PC_Reg_Display[7]~161 ; 0 ; 0 ; +; - PC_Reg_Display[7]~162 ; 0 ; 0 ; +; - PC_Reg_Display[7]~164 ; 0 ; 0 ; +; - PC_Reg_Display[7]~165 ; 0 ; 0 ; +; - PC_Reg_Display[7]~166 ; 0 ; 0 ; +; - PC_Reg_Display[7]~167 ; 0 ; 0 ; +; - PC_Reg_Display[7]~169 ; 0 ; 0 ; +; - PC_Reg_Display[7]~170 ; 0 ; 0 ; +; - PC_Reg_Display[7]~171 ; 0 ; 0 ; +; - PC_Reg_Display[7]~172 ; 0 ; 0 ; +; - PC_Reg_Display[8]~180 ; 0 ; 0 ; +; - PC_Reg_Display[8]~185 ; 0 ; 0 ; +; - PC_Reg_Display[8]~186 ; 0 ; 0 ; +; - PC_Reg_Display[8]~187 ; 0 ; 0 ; +; - PC_Reg_Display[8]~188 ; 0 ; 0 ; +; - PC_Reg_Display[8]~189 ; 0 ; 0 ; +; - PC_Reg_Display[8]~191 ; 0 ; 0 ; +; - PC_Reg_Display[8]~192 ; 0 ; 0 ; +; - PC_Reg_Display[8]~193 ; 0 ; 0 ; +; - PC_Reg_Display[8]~194 ; 0 ; 0 ; +; - PC_Reg_Display[9]~202 ; 0 ; 0 ; +; - PC_Reg_Display[9]~203 ; 0 ; 0 ; +; - PC_Reg_Display[9]~204 ; 0 ; 0 ; +; - PC_Reg_Display[9]~205 ; 0 ; 0 ; +; - PC_Reg_Display[9]~206 ; 0 ; 0 ; +; - PC_Reg_Display[9]~212 ; 0 ; 0 ; +; - PC_Reg_Display[9]~217 ; 0 ; 0 ; +; - PC_Reg_Display[10]~224 ; 0 ; 0 ; +; - PC_Reg_Display[10]~229 ; 0 ; 0 ; +; - PC_Reg_Display[10]~230 ; 0 ; 0 ; +; - PC_Reg_Display[10]~231 ; 0 ; 0 ; +; - PC_Reg_Display[10]~232 ; 0 ; 0 ; +; - PC_Reg_Display[10]~233 ; 0 ; 0 ; +; - PC_Reg_Display[10]~235 ; 0 ; 0 ; +; - PC_Reg_Display[10]~236 ; 0 ; 0 ; +; - PC_Reg_Display[10]~237 ; 0 ; 0 ; +; - PC_Reg_Display[10]~238 ; 0 ; 0 ; +; - PC_Reg_Display[11]~246 ; 0 ; 0 ; +; - PC_Reg_Display[11]~247 ; 0 ; 0 ; +; - PC_Reg_Display[11]~248 ; 0 ; 0 ; +; - PC_Reg_Display[11]~249 ; 0 ; 0 ; +; - PC_Reg_Display[11]~250 ; 0 ; 0 ; +; - PC_Reg_Display[11]~256 ; 0 ; 0 ; +; - PC_Reg_Display[11]~261 ; 0 ; 0 ; +; - PC_Reg_Display[12]~268 ; 0 ; 0 ; +; - PC_Reg_Display[12]~273 ; 0 ; 0 ; +; - PC_Reg_Display[12]~274 ; 0 ; 0 ; +; - PC_Reg_Display[12]~275 ; 0 ; 0 ; +; - PC_Reg_Display[12]~276 ; 0 ; 0 ; +; - PC_Reg_Display[12]~277 ; 0 ; 0 ; +; - PC_Reg_Display[12]~279 ; 0 ; 0 ; +; - PC_Reg_Display[12]~280 ; 0 ; 0 ; +; - PC_Reg_Display[12]~281 ; 0 ; 0 ; +; - PC_Reg_Display[12]~282 ; 0 ; 0 ; +; - PC_Reg_Display[13]~290 ; 0 ; 0 ; +; - PC_Reg_Display[13]~291 ; 0 ; 0 ; +; - PC_Reg_Display[13]~292 ; 0 ; 0 ; +; - PC_Reg_Display[13]~293 ; 0 ; 0 ; +; - PC_Reg_Display[13]~294 ; 0 ; 0 ; +; - PC_Reg_Display[13]~300 ; 0 ; 0 ; +; - PC_Reg_Display[13]~305 ; 0 ; 0 ; +; - PC_Reg_Display[14]~312 ; 0 ; 0 ; +; - PC_Reg_Display[14]~317 ; 0 ; 0 ; +; - PC_Reg_Display[14]~318 ; 0 ; 0 ; +; - PC_Reg_Display[14]~319 ; 0 ; 0 ; +; - PC_Reg_Display[14]~320 ; 0 ; 0 ; +; - PC_Reg_Display[14]~321 ; 0 ; 0 ; +; - PC_Reg_Display[14]~323 ; 0 ; 0 ; +; - PC_Reg_Display[14]~324 ; 0 ; 0 ; +; - PC_Reg_Display[14]~325 ; 0 ; 0 ; +; - PC_Reg_Display[14]~326 ; 0 ; 0 ; +; - PC_Reg_Display[15]~334 ; 0 ; 0 ; +; - PC_Reg_Display[15]~335 ; 0 ; 0 ; +; - PC_Reg_Display[15]~336 ; 0 ; 0 ; +; - PC_Reg_Display[15]~337 ; 0 ; 0 ; +; - PC_Reg_Display[15]~338 ; 0 ; 0 ; +; - PC_Reg_Display[15]~344 ; 0 ; 0 ; +; - PC_Reg_Display[15]~349 ; 0 ; 0 ; +; HID_Register[2] ; ; ; +; - PC_Reg_Display[0]~4 ; 1 ; 0 ; +; - PC_Reg_Display[0]~5 ; 1 ; 0 ; +; - PC_Reg_Display[0]~6 ; 1 ; 0 ; +; - PC_Reg_Display[0]~7 ; 1 ; 0 ; +; - PC_Reg_Display[0]~8 ; 1 ; 0 ; +; - PC_Reg_Display[0]~10 ; 1 ; 0 ; +; - PC_Reg_Display[0]~11 ; 1 ; 0 ; +; - PC_Reg_Display[0]~12 ; 1 ; 0 ; +; - PC_Reg_Display[0]~13 ; 1 ; 0 ; +; - PC_Reg_Display[0]~20 ; 1 ; 0 ; +; - PC_Reg_Display[1]~26 ; 1 ; 0 ; +; - PC_Reg_Display[1]~27 ; 1 ; 0 ; +; - PC_Reg_Display[1]~28 ; 1 ; 0 ; +; - PC_Reg_Display[1]~29 ; 1 ; 0 ; +; - PC_Reg_Display[1]~30 ; 1 ; 0 ; +; - PC_Reg_Display[1]~32 ; 1 ; 0 ; +; - PC_Reg_Display[1]~33 ; 1 ; 0 ; +; - PC_Reg_Display[1]~34 ; 1 ; 0 ; +; - PC_Reg_Display[1]~35 ; 1 ; 0 ; +; - PC_Reg_Display[1]~42 ; 1 ; 0 ; +; - PC_Reg_Display[2]~48 ; 1 ; 0 ; +; - PC_Reg_Display[2]~49 ; 1 ; 0 ; +; - PC_Reg_Display[2]~50 ; 1 ; 0 ; +; - PC_Reg_Display[2]~51 ; 1 ; 0 ; +; - PC_Reg_Display[2]~52 ; 1 ; 0 ; +; - PC_Reg_Display[2]~54 ; 1 ; 0 ; +; - PC_Reg_Display[2]~55 ; 1 ; 0 ; +; - PC_Reg_Display[2]~56 ; 1 ; 0 ; +; - PC_Reg_Display[2]~57 ; 1 ; 0 ; +; - PC_Reg_Display[2]~59 ; 1 ; 0 ; +; - PC_Reg_Display[2]~60 ; 1 ; 0 ; +; - PC_Reg_Display[2]~61 ; 1 ; 0 ; +; - PC_Reg_Display[2]~62 ; 1 ; 0 ; +; - PC_Reg_Display[3]~70 ; 1 ; 0 ; +; - PC_Reg_Display[3]~71 ; 1 ; 0 ; +; - PC_Reg_Display[3]~72 ; 1 ; 0 ; +; - PC_Reg_Display[3]~73 ; 1 ; 0 ; +; - PC_Reg_Display[3]~74 ; 1 ; 0 ; +; - PC_Reg_Display[3]~76 ; 1 ; 0 ; +; - PC_Reg_Display[3]~77 ; 1 ; 0 ; +; - PC_Reg_Display[3]~78 ; 1 ; 0 ; +; - PC_Reg_Display[3]~79 ; 1 ; 0 ; +; - PC_Reg_Display[3]~81 ; 1 ; 0 ; +; - PC_Reg_Display[3]~82 ; 1 ; 0 ; +; - PC_Reg_Display[3]~83 ; 1 ; 0 ; +; - PC_Reg_Display[3]~84 ; 1 ; 0 ; +; - PC_Reg_Display[4]~92 ; 1 ; 0 ; +; - PC_Reg_Display[4]~93 ; 1 ; 0 ; +; - PC_Reg_Display[4]~94 ; 1 ; 0 ; +; - PC_Reg_Display[4]~95 ; 1 ; 0 ; +; - PC_Reg_Display[4]~96 ; 1 ; 0 ; +; - PC_Reg_Display[4]~102 ; 1 ; 0 ; +; - PC_Reg_Display[4]~107 ; 1 ; 0 ; +; - PC_Reg_Display[5]~114 ; 1 ; 0 ; +; - PC_Reg_Display[5]~119 ; 1 ; 0 ; +; - PC_Reg_Display[5]~120 ; 1 ; 0 ; +; - PC_Reg_Display[5]~121 ; 1 ; 0 ; +; - PC_Reg_Display[5]~122 ; 1 ; 0 ; +; - PC_Reg_Display[5]~123 ; 1 ; 0 ; +; - PC_Reg_Display[5]~125 ; 1 ; 0 ; +; - PC_Reg_Display[5]~126 ; 1 ; 0 ; +; - PC_Reg_Display[5]~127 ; 1 ; 0 ; +; - PC_Reg_Display[5]~128 ; 1 ; 0 ; +; - PC_Reg_Display[6]~136 ; 1 ; 0 ; +; - PC_Reg_Display[6]~141 ; 1 ; 0 ; +; - PC_Reg_Display[6]~142 ; 1 ; 0 ; +; - PC_Reg_Display[6]~143 ; 1 ; 0 ; +; - PC_Reg_Display[6]~144 ; 1 ; 0 ; +; - PC_Reg_Display[6]~145 ; 1 ; 0 ; +; - PC_Reg_Display[6]~147 ; 1 ; 0 ; +; - PC_Reg_Display[6]~148 ; 1 ; 0 ; +; - PC_Reg_Display[6]~149 ; 1 ; 0 ; +; - PC_Reg_Display[6]~150 ; 1 ; 0 ; +; - PC_Reg_Display[7]~158 ; 1 ; 0 ; +; - PC_Reg_Display[7]~159 ; 1 ; 0 ; +; - PC_Reg_Display[7]~160 ; 1 ; 0 ; +; - PC_Reg_Display[7]~161 ; 1 ; 0 ; +; - PC_Reg_Display[7]~162 ; 1 ; 0 ; +; - PC_Reg_Display[7]~164 ; 1 ; 0 ; +; - PC_Reg_Display[7]~165 ; 1 ; 0 ; +; - PC_Reg_Display[7]~166 ; 1 ; 0 ; +; - PC_Reg_Display[7]~167 ; 1 ; 0 ; +; - PC_Reg_Display[7]~169 ; 1 ; 0 ; +; - PC_Reg_Display[7]~170 ; 1 ; 0 ; +; - PC_Reg_Display[7]~171 ; 1 ; 0 ; +; - PC_Reg_Display[7]~172 ; 1 ; 0 ; +; - PC_Reg_Display[8]~180 ; 1 ; 0 ; +; - PC_Reg_Display[8]~181 ; 1 ; 0 ; +; - PC_Reg_Display[8]~182 ; 1 ; 0 ; +; - PC_Reg_Display[8]~183 ; 1 ; 0 ; +; - PC_Reg_Display[8]~184 ; 1 ; 0 ; +; - PC_Reg_Display[8]~190 ; 1 ; 0 ; +; - PC_Reg_Display[8]~195 ; 1 ; 0 ; +; - PC_Reg_Display[9]~202 ; 1 ; 0 ; +; - PC_Reg_Display[9]~207 ; 1 ; 0 ; +; - PC_Reg_Display[9]~208 ; 1 ; 0 ; +; - PC_Reg_Display[9]~209 ; 1 ; 0 ; +; - PC_Reg_Display[9]~210 ; 1 ; 0 ; +; - PC_Reg_Display[9]~211 ; 1 ; 0 ; +; - PC_Reg_Display[9]~213 ; 1 ; 0 ; +; - PC_Reg_Display[9]~214 ; 1 ; 0 ; +; - PC_Reg_Display[9]~215 ; 1 ; 0 ; +; - PC_Reg_Display[9]~216 ; 1 ; 0 ; +; - PC_Reg_Display[10]~224 ; 1 ; 0 ; +; - PC_Reg_Display[10]~225 ; 1 ; 0 ; +; - PC_Reg_Display[10]~226 ; 1 ; 0 ; +; - PC_Reg_Display[10]~227 ; 1 ; 0 ; +; - PC_Reg_Display[10]~228 ; 1 ; 0 ; +; - PC_Reg_Display[10]~234 ; 1 ; 0 ; +; - PC_Reg_Display[10]~239 ; 1 ; 0 ; +; - PC_Reg_Display[11]~246 ; 1 ; 0 ; +; - PC_Reg_Display[11]~251 ; 1 ; 0 ; +; - PC_Reg_Display[11]~252 ; 1 ; 0 ; +; - PC_Reg_Display[11]~253 ; 1 ; 0 ; +; - PC_Reg_Display[11]~254 ; 1 ; 0 ; +; - PC_Reg_Display[11]~255 ; 1 ; 0 ; +; - PC_Reg_Display[11]~257 ; 1 ; 0 ; +; - PC_Reg_Display[11]~258 ; 1 ; 0 ; +; - PC_Reg_Display[11]~259 ; 1 ; 0 ; +; - PC_Reg_Display[11]~260 ; 1 ; 0 ; +; - PC_Reg_Display[12]~268 ; 1 ; 0 ; +; - PC_Reg_Display[12]~269 ; 1 ; 0 ; +; - PC_Reg_Display[12]~270 ; 1 ; 0 ; +; - PC_Reg_Display[12]~271 ; 1 ; 0 ; +; - PC_Reg_Display[12]~272 ; 1 ; 0 ; +; - PC_Reg_Display[12]~278 ; 1 ; 0 ; +; - PC_Reg_Display[12]~283 ; 1 ; 0 ; +; - PC_Reg_Display[13]~290 ; 1 ; 0 ; +; - PC_Reg_Display[13]~295 ; 1 ; 0 ; +; - PC_Reg_Display[13]~296 ; 1 ; 0 ; +; - PC_Reg_Display[13]~297 ; 1 ; 0 ; +; - PC_Reg_Display[13]~298 ; 1 ; 0 ; +; - PC_Reg_Display[13]~299 ; 1 ; 0 ; +; - PC_Reg_Display[13]~301 ; 1 ; 0 ; +; - PC_Reg_Display[13]~302 ; 1 ; 0 ; +; - PC_Reg_Display[13]~303 ; 1 ; 0 ; +; - PC_Reg_Display[13]~304 ; 1 ; 0 ; +; - PC_Reg_Display[14]~312 ; 1 ; 0 ; +; - PC_Reg_Display[14]~313 ; 1 ; 0 ; +; - PC_Reg_Display[14]~314 ; 1 ; 0 ; +; - PC_Reg_Display[14]~315 ; 1 ; 0 ; +; - PC_Reg_Display[14]~316 ; 1 ; 0 ; +; - PC_Reg_Display[14]~322 ; 1 ; 0 ; +; - PC_Reg_Display[14]~327 ; 1 ; 0 ; +; - PC_Reg_Display[15]~334 ; 1 ; 0 ; +; - PC_Reg_Display[15]~339 ; 1 ; 0 ; +; - PC_Reg_Display[15]~340 ; 1 ; 0 ; +; - PC_Reg_Display[15]~341 ; 1 ; 0 ; +; - PC_Reg_Display[15]~342 ; 1 ; 0 ; +; - PC_Reg_Display[15]~343 ; 1 ; 0 ; +; - PC_Reg_Display[15]~345 ; 1 ; 0 ; +; - PC_Reg_Display[15]~346 ; 1 ; 0 ; +; - PC_Reg_Display[15]~347 ; 1 ; 0 ; +; - PC_Reg_Display[15]~348 ; 1 ; 0 ; +; HID_Register[0] ; ; ; +; - PC_Reg_Display[0]~4 ; 0 ; 0 ; +; - PC_Reg_Display[0]~9 ; 0 ; 0 ; +; - PC_Reg_Display[0]~14 ; 0 ; 0 ; +; - PC_Reg_Display[0]~20 ; 0 ; 0 ; +; - PC_Reg_Display[1]~26 ; 0 ; 0 ; +; - PC_Reg_Display[1]~31 ; 0 ; 0 ; +; - PC_Reg_Display[1]~36 ; 0 ; 0 ; +; - PC_Reg_Display[1]~42 ; 0 ; 0 ; +; - PC_Reg_Display[2]~44 ; 0 ; 0 ; +; - PC_Reg_Display[2]~45 ; 0 ; 0 ; +; - PC_Reg_Display[2]~46 ; 0 ; 0 ; +; - PC_Reg_Display[2]~47 ; 0 ; 0 ; +; - PC_Reg_Display[2]~53 ; 0 ; 0 ; +; - PC_Reg_Display[2]~58 ; 0 ; 0 ; +; - PC_Reg_Display[2]~63 ; 0 ; 0 ; +; - PC_Reg_Display[3]~66 ; 0 ; 0 ; +; - PC_Reg_Display[3]~67 ; 0 ; 0 ; +; - PC_Reg_Display[3]~68 ; 0 ; 0 ; +; - PC_Reg_Display[3]~69 ; 0 ; 0 ; +; - PC_Reg_Display[3]~75 ; 0 ; 0 ; +; - PC_Reg_Display[3]~80 ; 0 ; 0 ; +; - PC_Reg_Display[3]~85 ; 0 ; 0 ; +; - PC_Reg_Display[4]~88 ; 0 ; 0 ; +; - PC_Reg_Display[4]~89 ; 0 ; 0 ; +; - PC_Reg_Display[4]~90 ; 0 ; 0 ; +; - PC_Reg_Display[4]~91 ; 0 ; 0 ; +; - PC_Reg_Display[4]~93 ; 0 ; 0 ; +; - PC_Reg_Display[4]~94 ; 0 ; 0 ; +; - PC_Reg_Display[4]~95 ; 0 ; 0 ; +; - PC_Reg_Display[4]~96 ; 0 ; 0 ; +; - PC_Reg_Display[4]~102 ; 0 ; 0 ; +; - PC_Reg_Display[4]~107 ; 0 ; 0 ; +; - PC_Reg_Display[5]~110 ; 0 ; 0 ; +; - PC_Reg_Display[5]~111 ; 0 ; 0 ; +; - PC_Reg_Display[5]~112 ; 0 ; 0 ; +; - PC_Reg_Display[5]~113 ; 0 ; 0 ; +; - PC_Reg_Display[5]~119 ; 0 ; 0 ; +; - PC_Reg_Display[5]~120 ; 0 ; 0 ; +; - PC_Reg_Display[5]~121 ; 0 ; 0 ; +; - PC_Reg_Display[5]~122 ; 0 ; 0 ; +; - PC_Reg_Display[5]~123 ; 0 ; 0 ; +; - PC_Reg_Display[5]~125 ; 0 ; 0 ; +; - PC_Reg_Display[5]~126 ; 0 ; 0 ; +; - PC_Reg_Display[5]~127 ; 0 ; 0 ; +; - PC_Reg_Display[5]~128 ; 0 ; 0 ; +; - PC_Reg_Display[6]~132 ; 0 ; 0 ; +; - PC_Reg_Display[6]~133 ; 0 ; 0 ; +; - PC_Reg_Display[6]~134 ; 0 ; 0 ; +; - PC_Reg_Display[6]~135 ; 0 ; 0 ; +; - PC_Reg_Display[6]~137 ; 0 ; 0 ; +; - PC_Reg_Display[6]~138 ; 0 ; 0 ; +; - PC_Reg_Display[6]~139 ; 0 ; 0 ; +; - PC_Reg_Display[6]~140 ; 0 ; 0 ; +; - PC_Reg_Display[6]~146 ; 0 ; 0 ; +; - PC_Reg_Display[6]~151 ; 0 ; 0 ; +; - PC_Reg_Display[7]~154 ; 0 ; 0 ; +; - PC_Reg_Display[7]~155 ; 0 ; 0 ; +; - PC_Reg_Display[7]~156 ; 0 ; 0 ; +; - PC_Reg_Display[7]~157 ; 0 ; 0 ; +; - PC_Reg_Display[7]~163 ; 0 ; 0 ; +; - PC_Reg_Display[7]~168 ; 0 ; 0 ; +; - PC_Reg_Display[7]~173 ; 0 ; 0 ; +; - PC_Reg_Display[8]~176 ; 0 ; 0 ; +; - PC_Reg_Display[8]~177 ; 0 ; 0 ; +; - PC_Reg_Display[8]~178 ; 0 ; 0 ; +; - PC_Reg_Display[8]~179 ; 0 ; 0 ; +; - PC_Reg_Display[8]~181 ; 0 ; 0 ; +; - PC_Reg_Display[8]~182 ; 0 ; 0 ; +; - PC_Reg_Display[8]~183 ; 0 ; 0 ; +; - PC_Reg_Display[8]~184 ; 0 ; 0 ; +; - PC_Reg_Display[8]~190 ; 0 ; 0 ; +; - PC_Reg_Display[8]~195 ; 0 ; 0 ; +; - PC_Reg_Display[9]~198 ; 0 ; 0 ; +; - PC_Reg_Display[9]~199 ; 0 ; 0 ; +; - PC_Reg_Display[9]~200 ; 0 ; 0 ; +; - PC_Reg_Display[9]~201 ; 0 ; 0 ; +; - PC_Reg_Display[9]~207 ; 0 ; 0 ; +; - PC_Reg_Display[9]~208 ; 0 ; 0 ; +; - PC_Reg_Display[9]~209 ; 0 ; 0 ; +; - PC_Reg_Display[9]~210 ; 0 ; 0 ; +; - PC_Reg_Display[9]~211 ; 0 ; 0 ; +; - PC_Reg_Display[9]~213 ; 0 ; 0 ; +; - PC_Reg_Display[9]~214 ; 0 ; 0 ; +; - PC_Reg_Display[9]~215 ; 0 ; 0 ; +; - PC_Reg_Display[9]~216 ; 0 ; 0 ; +; - PC_Reg_Display[10]~220 ; 0 ; 0 ; +; - PC_Reg_Display[10]~221 ; 0 ; 0 ; +; - PC_Reg_Display[10]~222 ; 0 ; 0 ; +; - PC_Reg_Display[10]~223 ; 0 ; 0 ; +; - PC_Reg_Display[10]~225 ; 0 ; 0 ; +; - PC_Reg_Display[10]~226 ; 0 ; 0 ; +; - PC_Reg_Display[10]~227 ; 0 ; 0 ; +; - PC_Reg_Display[10]~228 ; 0 ; 0 ; +; - PC_Reg_Display[10]~234 ; 0 ; 0 ; +; - PC_Reg_Display[10]~239 ; 0 ; 0 ; +; - PC_Reg_Display[11]~242 ; 0 ; 0 ; +; - PC_Reg_Display[11]~243 ; 0 ; 0 ; +; - PC_Reg_Display[11]~244 ; 0 ; 0 ; +; - PC_Reg_Display[11]~245 ; 0 ; 0 ; +; - PC_Reg_Display[11]~251 ; 0 ; 0 ; +; - PC_Reg_Display[11]~252 ; 0 ; 0 ; +; - PC_Reg_Display[11]~253 ; 0 ; 0 ; +; - PC_Reg_Display[11]~254 ; 0 ; 0 ; +; - PC_Reg_Display[11]~255 ; 0 ; 0 ; +; - PC_Reg_Display[11]~257 ; 0 ; 0 ; +; - PC_Reg_Display[11]~258 ; 0 ; 0 ; +; - PC_Reg_Display[11]~259 ; 0 ; 0 ; +; - PC_Reg_Display[11]~260 ; 0 ; 0 ; +; - PC_Reg_Display[12]~264 ; 0 ; 0 ; +; - PC_Reg_Display[12]~265 ; 0 ; 0 ; +; - PC_Reg_Display[12]~266 ; 0 ; 0 ; +; - PC_Reg_Display[12]~267 ; 0 ; 0 ; +; - PC_Reg_Display[12]~269 ; 0 ; 0 ; +; - PC_Reg_Display[12]~270 ; 0 ; 0 ; +; - PC_Reg_Display[12]~271 ; 0 ; 0 ; +; - PC_Reg_Display[12]~272 ; 0 ; 0 ; +; - PC_Reg_Display[12]~278 ; 0 ; 0 ; +; - PC_Reg_Display[12]~283 ; 0 ; 0 ; +; - PC_Reg_Display[13]~286 ; 0 ; 0 ; +; - PC_Reg_Display[13]~287 ; 0 ; 0 ; +; - PC_Reg_Display[13]~288 ; 0 ; 0 ; +; - PC_Reg_Display[13]~289 ; 0 ; 0 ; +; - PC_Reg_Display[13]~295 ; 0 ; 0 ; +; - PC_Reg_Display[13]~296 ; 0 ; 0 ; +; - PC_Reg_Display[13]~297 ; 0 ; 0 ; +; - PC_Reg_Display[13]~298 ; 0 ; 0 ; +; - PC_Reg_Display[13]~299 ; 0 ; 0 ; +; - PC_Reg_Display[13]~301 ; 0 ; 0 ; +; - PC_Reg_Display[13]~302 ; 0 ; 0 ; +; - PC_Reg_Display[13]~303 ; 0 ; 0 ; +; - PC_Reg_Display[13]~304 ; 0 ; 0 ; +; - PC_Reg_Display[14]~308 ; 0 ; 0 ; +; - PC_Reg_Display[14]~309 ; 0 ; 0 ; +; - PC_Reg_Display[14]~310 ; 0 ; 0 ; +; - PC_Reg_Display[14]~311 ; 0 ; 0 ; +; - PC_Reg_Display[14]~313 ; 0 ; 0 ; +; - PC_Reg_Display[14]~314 ; 0 ; 0 ; +; - PC_Reg_Display[14]~315 ; 0 ; 0 ; +; - PC_Reg_Display[14]~316 ; 0 ; 0 ; +; - PC_Reg_Display[14]~322 ; 0 ; 0 ; +; - PC_Reg_Display[14]~327 ; 0 ; 0 ; +; - PC_Reg_Display[15]~330 ; 0 ; 0 ; +; - PC_Reg_Display[15]~331 ; 0 ; 0 ; +; - PC_Reg_Display[15]~332 ; 0 ; 0 ; +; - PC_Reg_Display[15]~333 ; 0 ; 0 ; +; - PC_Reg_Display[15]~339 ; 0 ; 0 ; +; - PC_Reg_Display[15]~340 ; 0 ; 0 ; +; - PC_Reg_Display[15]~341 ; 0 ; 0 ; +; - PC_Reg_Display[15]~342 ; 0 ; 0 ; +; - PC_Reg_Display[15]~343 ; 0 ; 0 ; +; - PC_Reg_Display[15]~345 ; 0 ; 0 ; +; - PC_Reg_Display[15]~346 ; 0 ; 0 ; +; - PC_Reg_Display[15]~347 ; 0 ; 0 ; +; - PC_Reg_Display[15]~348 ; 0 ; 0 ; +; HID_PC[0] ; ; ; +; - PC_Reg_Display[0]~21 ; 1 ; 0 ; +; - PC_Reg_Display[1]~43 ; 1 ; 0 ; +; - PC_Reg_Display[2]~65 ; 1 ; 0 ; +; - PC_Reg_Display[3]~87 ; 1 ; 0 ; +; - PC_Reg_Display[4]~109 ; 1 ; 0 ; +; - PC_Reg_Display[5]~131 ; 1 ; 0 ; +; - PC_Reg_Display[6]~153 ; 1 ; 0 ; +; - PC_Reg_Display[7]~175 ; 1 ; 0 ; +; - PC_Reg_Display[8]~197 ; 1 ; 0 ; +; - PC_Reg_Display[9]~219 ; 1 ; 0 ; +; - PC_Reg_Display[10]~241 ; 1 ; 0 ; +; - PC_Reg_Display[11]~263 ; 1 ; 0 ; +; - PC_Reg_Display[12]~285 ; 1 ; 0 ; +; - PC_Reg_Display[13]~307 ; 1 ; 0 ; +; - PC_Reg_Display[14]~329 ; 1 ; 0 ; +; - PC_Reg_Display[15]~351 ; 1 ; 0 ; +; clk[0] ; ; ; +; rst[0] ; ; ; +; - instruction_counter:PC|pc[2] ; 1 ; 0 ; +; - instruction_counter:PC|pc[3] ; 1 ; 0 ; +; - instruction_counter:PC|pc[4] ; 1 ; 0 ; +; - instruction_counter:PC|pc[5] ; 1 ; 0 ; +; - instruction_counter:PC|pc[6] ; 1 ; 0 ; +; - instruction_counter:PC|pc[7] ; 1 ; 0 ; +; - instruction_counter:PC|pc[8] ; 1 ; 0 ; +; - instruction_counter:PC|pc[9] ; 1 ; 0 ; +; - instruction_counter:PC|pc[10] ; 1 ; 0 ; +; - instruction_counter:PC|pc[11] ; 1 ; 0 ; +; - instruction_counter:PC|pc[12] ; 1 ; 0 ; +; - instruction_counter:PC|pc[13] ; 1 ; 0 ; +; - instruction_counter:PC|pc[14] ; 1 ; 0 ; +; - instruction_counter:PC|pc[15] ; 1 ; 0 ; +; - instruction_counter:PC|pc[16] ; 1 ; 0 ; +; - instruction_counter:PC|pc[17] ; 1 ; 0 ; +; - instruction_counter:PC|pc[18] ; 1 ; 0 ; +; - instruction_counter:PC|pc[19] ; 1 ; 0 ; +; - instruction_counter:PC|pc[20] ; 1 ; 0 ; +; - instruction_counter:PC|pc[21] ; 1 ; 0 ; +; - instruction_counter:PC|pc[22] ; 1 ; 0 ; +; - instruction_counter:PC|pc[23] ; 1 ; 0 ; +; - instruction_counter:PC|pc[24] ; 1 ; 0 ; +; - instruction_counter:PC|pc[25] ; 1 ; 0 ; +; - instruction_counter:PC|pc[26] ; 1 ; 0 ; +; - instruction_counter:PC|pc[27] ; 1 ; 0 ; +; - instruction_counter:PC|pc[28] ; 1 ; 0 ; +; - instruction_counter:PC|pc[29] ; 1 ; 0 ; +; - instruction_counter:PC|pc[30] ; 1 ; 0 ; +; - instruction_counter:PC|pc[31] ; 1 ; 0 ; +; - ram:RAM|mem~0 ; 1 ; 0 ; +; - ram:RAM|mem[64][1]~1 ; 1 ; 0 ; +; - ram:RAM|mem[65][3]~2 ; 1 ; 0 ; +; - ram:RAM|mem[66][2]~3 ; 1 ; 0 ; +; - ram:RAM|mem[67][3]~4 ; 1 ; 0 ; +; - ram:RAM|mem[80][0]~5 ; 1 ; 0 ; +; - ram:RAM|mem[81][0]~6 ; 1 ; 0 ; +; - ram:RAM|mem[82][1]~7 ; 1 ; 0 ; +; - ram:RAM|mem[83][0]~8 ; 1 ; 0 ; +; - ram:RAM|mem[96][1]~9 ; 1 ; 0 ; +; - ram:RAM|mem[97][4]~10 ; 1 ; 0 ; +; - ram:RAM|mem[98][3]~11 ; 1 ; 0 ; +; - ram:RAM|mem[99][0]~12 ; 1 ; 0 ; +; - ram:RAM|mem[112][1]~13 ; 1 ; 0 ; +; - ram:RAM|mem[113][0]~14 ; 1 ; 0 ; +; - ram:RAM|mem[114][0]~15 ; 1 ; 0 ; +; - ram:RAM|mem[115][2]~16 ; 1 ; 0 ; +; - ram:RAM|mem[68][0]~17 ; 1 ; 0 ; +; - ram:RAM|mem[69][1]~18 ; 1 ; 0 ; +; - ram:RAM|mem[70][4]~19 ; 1 ; 0 ; +; - ram:RAM|mem[71][3]~20 ; 1 ; 0 ; +; - ram:RAM|mem[84][1]~21 ; 1 ; 0 ; +; - ram:RAM|mem[85][1]~22 ; 1 ; 0 ; +; - ram:RAM|mem[86][3]~23 ; 1 ; 0 ; +; - ram:RAM|mem[87][4]~24 ; 1 ; 0 ; +; - ram:RAM|mem[100][0]~25 ; 1 ; 0 ; +; - ram:RAM|mem[101][1]~26 ; 1 ; 0 ; +; - ram:RAM|mem[102][1]~27 ; 1 ; 0 ; +; - ram:RAM|mem[103][1]~28 ; 1 ; 0 ; +; - ram:RAM|mem[116][0]~29 ; 1 ; 0 ; +; - ram:RAM|mem[117][2]~30 ; 1 ; 0 ; +; - ram:RAM|mem[118][4]~31 ; 1 ; 0 ; +; - ram:RAM|mem[119][4]~32 ; 1 ; 0 ; +; - ram:RAM|mem[72][3]~33 ; 1 ; 0 ; +; - ram:RAM|mem[73][1]~34 ; 1 ; 0 ; +; - ram:RAM|mem[74][1]~35 ; 1 ; 0 ; +; - ram:RAM|mem[75][2]~36 ; 1 ; 0 ; +; - ram:RAM|mem[88][4]~37 ; 1 ; 0 ; +; - ram:RAM|mem[89][2]~38 ; 1 ; 0 ; +; - ram:RAM|mem[90][0]~39 ; 1 ; 0 ; +; - ram:RAM|mem[91][0]~40 ; 1 ; 0 ; +; - ram:RAM|mem[104][0]~41 ; 1 ; 0 ; +; - ram:RAM|mem[105][0]~42 ; 1 ; 0 ; +; - ram:RAM|mem[106][0]~43 ; 1 ; 0 ; +; - ram:RAM|mem[107][2]~44 ; 1 ; 0 ; +; - ram:RAM|mem[120][0]~45 ; 1 ; 0 ; +; - ram:RAM|mem[121][2]~46 ; 1 ; 0 ; +; - ram:RAM|mem[122][2]~47 ; 1 ; 0 ; +; - ram:RAM|mem[123][1]~48 ; 1 ; 0 ; +; - ram:RAM|mem[76][2]~49 ; 1 ; 0 ; +; - ram:RAM|mem[92][2]~50 ; 1 ; 0 ; +; - ram:RAM|mem[108][3]~51 ; 1 ; 0 ; +; - ram:RAM|mem[124][2]~52 ; 1 ; 0 ; +; - ram:RAM|mem[77][3]~53 ; 1 ; 0 ; +; - ram:RAM|mem[93][2]~54 ; 1 ; 0 ; +; - ram:RAM|mem[109][1]~55 ; 1 ; 0 ; +; - ram:RAM|mem[125][4]~56 ; 1 ; 0 ; +; - ram:RAM|mem[78][0]~57 ; 1 ; 0 ; +; - ram:RAM|mem[94][4]~58 ; 1 ; 0 ; +; - ram:RAM|mem[110][0]~59 ; 1 ; 0 ; +; - ram:RAM|mem[126][1]~60 ; 1 ; 0 ; +; - ram:RAM|mem[79][0]~61 ; 1 ; 0 ; +; - ram:RAM|mem[95][4]~62 ; 1 ; 0 ; +; - ram:RAM|mem[111][2]~63 ; 1 ; 0 ; +; - ram:RAM|mem[127][1]~64 ; 1 ; 0 ; +; - ram:RAM|mem[0][3]~65 ; 1 ; 0 ; +; - ram:RAM|mem[4][0]~66 ; 1 ; 0 ; +; - ram:RAM|mem[8][2]~67 ; 1 ; 0 ; +; - ram:RAM|mem[12][3]~68 ; 1 ; 0 ; +; - ram:RAM|mem[1][0]~69 ; 1 ; 0 ; +; - ram:RAM|mem[5][0]~70 ; 1 ; 0 ; +; - ram:RAM|mem[9][2]~71 ; 1 ; 0 ; +; - ram:RAM|mem[13][1]~72 ; 1 ; 0 ; +; - ram:RAM|mem[2][0]~73 ; 1 ; 0 ; +; - ram:RAM|mem[6][2]~74 ; 1 ; 0 ; +; - ram:RAM|mem[10][4]~75 ; 1 ; 0 ; +; - ram:RAM|mem[14][1]~76 ; 1 ; 0 ; +; - ram:RAM|mem[3][2]~77 ; 1 ; 0 ; +; - ram:RAM|mem[7][0]~78 ; 1 ; 0 ; +; - ram:RAM|mem[11][3]~79 ; 1 ; 0 ; +; - ram:RAM|mem[15][4]~80 ; 1 ; 0 ; +; - ram:RAM|mem[16][4]~81 ; 1 ; 0 ; +; - ram:RAM|mem[20][4]~82 ; 1 ; 0 ; +; - ram:RAM|mem[24][3]~83 ; 1 ; 0 ; +; - ram:RAM|mem[28][0]~84 ; 1 ; 0 ; +; - ram:RAM|mem[17][0]~85 ; 1 ; 0 ; +; - ram:RAM|mem[21][3]~86 ; 1 ; 0 ; +; - ram:RAM|mem[25][2]~87 ; 1 ; 0 ; +; - ram:RAM|mem[29][2]~88 ; 1 ; 0 ; +; - ram:RAM|mem[18][0]~89 ; 1 ; 0 ; +; - ram:RAM|mem[22][2]~90 ; 1 ; 0 ; +; - ram:RAM|mem[26][4]~91 ; 1 ; 0 ; +; - ram:RAM|mem[30][3]~92 ; 1 ; 0 ; +; - ram:RAM|mem[19][3]~93 ; 1 ; 0 ; +; - ram:RAM|mem[23][0]~94 ; 1 ; 0 ; +; - ram:RAM|mem[27][1]~95 ; 1 ; 0 ; +; - ram:RAM|mem[31][2]~96 ; 1 ; 0 ; +; - ram:RAM|mem[32][1]~97 ; 1 ; 0 ; +; - ram:RAM|mem[33][3]~98 ; 1 ; 0 ; +; - ram:RAM|mem[34][3]~99 ; 1 ; 0 ; +; - ram:RAM|mem[35][2]~100 ; 1 ; 0 ; +; - ram:RAM|mem[36][2]~101 ; 1 ; 0 ; +; - ram:RAM|mem[37][0]~102 ; 1 ; 0 ; +; - ram:RAM|mem[38][0]~103 ; 1 ; 0 ; +; - ram:RAM|mem[39][4]~104 ; 1 ; 0 ; +; - ram:RAM|mem[40][4]~105 ; 1 ; 0 ; +; - ram:RAM|mem[41][1]~106 ; 1 ; 0 ; +; - ram:RAM|mem[42][4]~107 ; 1 ; 0 ; +; - ram:RAM|mem[43][0]~108 ; 1 ; 0 ; +; - ram:RAM|mem[44][1]~109 ; 1 ; 0 ; +; - ram:RAM|mem[45][4]~110 ; 1 ; 0 ; +; - ram:RAM|mem[46][2]~111 ; 1 ; 0 ; +; - ram:RAM|mem[47][0]~112 ; 1 ; 0 ; +; - ram:RAM|mem[48][2]~113 ; 1 ; 0 ; +; - ram:RAM|mem[52][0]~114 ; 1 ; 0 ; +; - ram:RAM|mem[56][4]~115 ; 1 ; 0 ; +; - ram:RAM|mem[60][4]~116 ; 1 ; 0 ; +; - ram:RAM|mem[49][0]~117 ; 1 ; 0 ; +; - ram:RAM|mem[53][2]~118 ; 1 ; 0 ; +; - ram:RAM|mem[57][2]~119 ; 1 ; 0 ; +; - ram:RAM|mem[61][0]~120 ; 1 ; 0 ; +; - ram:RAM|mem[50][2]~121 ; 1 ; 0 ; +; - ram:RAM|mem[54][1]~122 ; 1 ; 0 ; +; - ram:RAM|mem[58][2]~123 ; 1 ; 0 ; +; - ram:RAM|mem[62][2]~124 ; 1 ; 0 ; +; - ram:RAM|mem[51][0]~125 ; 1 ; 0 ; +; - ram:RAM|mem[55][2]~126 ; 1 ; 0 ; +; - ram:RAM|mem[59][2]~127 ; 1 ; 0 ; +; - ram:RAM|mem[63][2]~128 ; 1 ; 0 ; +; - ram:RAM|mem[128][4]~129 ; 1 ; 0 ; +; - ram:RAM|mem[132][0]~130 ; 1 ; 0 ; +; - ram:RAM|mem[136][1]~131 ; 1 ; 0 ; +; - ram:RAM|mem[140][4]~132 ; 1 ; 0 ; +; - ram:RAM|mem[129][0]~133 ; 1 ; 0 ; +; - ram:RAM|mem[133][1]~134 ; 1 ; 0 ; +; - ram:RAM|mem[137][1]~135 ; 1 ; 0 ; +; - ram:RAM|mem[141][4]~136 ; 1 ; 0 ; +; - ram:RAM|mem[130][1]~137 ; 1 ; 0 ; +; - ram:RAM|mem[134][4]~138 ; 1 ; 0 ; +; - ram:RAM|mem[138][3]~139 ; 1 ; 0 ; +; - ram:RAM|mem[142][1]~140 ; 1 ; 0 ; +; - ram:RAM|mem[131][0]~141 ; 1 ; 0 ; +; - ram:RAM|mem[135][3]~142 ; 1 ; 0 ; +; - ram:RAM|mem[139][3]~143 ; 1 ; 0 ; +; - ram:RAM|mem[143][3]~144 ; 1 ; 0 ; +; - ram:RAM|mem[144][3]~145 ; 1 ; 0 ; +; - ram:RAM|mem[148][1]~146 ; 1 ; 0 ; +; - ram:RAM|mem[152][3]~147 ; 1 ; 0 ; +; - ram:RAM|mem[156][1]~148 ; 1 ; 0 ; +; - ram:RAM|mem[145][3]~149 ; 1 ; 0 ; +; - ram:RAM|mem[149][4]~150 ; 1 ; 0 ; +; - ram:RAM|mem[153][0]~151 ; 1 ; 0 ; +; - ram:RAM|mem[157][3]~152 ; 1 ; 0 ; +; - ram:RAM|mem[146][4]~153 ; 1 ; 0 ; +; - ram:RAM|mem[150][3]~154 ; 1 ; 0 ; +; - ram:RAM|mem[154][2]~155 ; 1 ; 0 ; +; - ram:RAM|mem[158][4]~156 ; 1 ; 0 ; +; - ram:RAM|mem[147][1]~157 ; 1 ; 0 ; +; - ram:RAM|mem[151][3]~158 ; 1 ; 0 ; +; - ram:RAM|mem[155][0]~159 ; 1 ; 0 ; +; - ram:RAM|mem[159][3]~160 ; 1 ; 0 ; +; - ram:RAM|mem[160][3]~161 ; 1 ; 0 ; +; - ram:RAM|mem[161][0]~162 ; 1 ; 0 ; +; - ram:RAM|mem[162][0]~163 ; 1 ; 0 ; +; - ram:RAM|mem[163][3]~164 ; 1 ; 0 ; +; - ram:RAM|mem[164][4]~165 ; 1 ; 0 ; +; - ram:RAM|mem[165][2]~166 ; 1 ; 0 ; +; - ram:RAM|mem[166][2]~167 ; 1 ; 0 ; +; - ram:RAM|mem[167][1]~168 ; 1 ; 0 ; +; - ram:RAM|mem[168][2]~169 ; 1 ; 0 ; +; - ram:RAM|mem[169][2]~170 ; 1 ; 0 ; +; - ram:RAM|mem[170][4]~171 ; 1 ; 0 ; +; - ram:RAM|mem[171][2]~172 ; 1 ; 0 ; +; - ram:RAM|mem[172][2]~173 ; 1 ; 0 ; +; - ram:RAM|mem[173][1]~174 ; 1 ; 0 ; +; - ram:RAM|mem[174][4]~175 ; 1 ; 0 ; +; - ram:RAM|mem[175][0]~176 ; 1 ; 0 ; +; - ram:RAM|mem[176][1]~177 ; 1 ; 0 ; +; - ram:RAM|mem[180][4]~178 ; 1 ; 0 ; +; - ram:RAM|mem[184][4]~179 ; 1 ; 0 ; +; - ram:RAM|mem[188][2]~180 ; 1 ; 0 ; +; - ram:RAM|mem[177][3]~181 ; 1 ; 0 ; +; - ram:RAM|mem[181][4]~182 ; 1 ; 0 ; +; - ram:RAM|mem[185][4]~183 ; 1 ; 0 ; +; - ram:RAM|mem[189][3]~184 ; 1 ; 0 ; +; - ram:RAM|mem[178][3]~185 ; 1 ; 0 ; +; - ram:RAM|mem[182][0]~186 ; 1 ; 0 ; +; - ram:RAM|mem[186][0]~187 ; 1 ; 0 ; +; - ram:RAM|mem[190][2]~188 ; 1 ; 0 ; +; - ram:RAM|mem[179][4]~189 ; 1 ; 0 ; +; - ram:RAM|mem[183][4]~190 ; 1 ; 0 ; +; - ram:RAM|mem[187][0]~191 ; 1 ; 0 ; +; - ram:RAM|mem[191][2]~192 ; 1 ; 0 ; +; - ram:RAM|mem[192][3]~193 ; 1 ; 0 ; +; - ram:RAM|mem[208][4]~194 ; 1 ; 0 ; +; - ram:RAM|mem[224][1]~195 ; 1 ; 0 ; +; - ram:RAM|mem[240][1]~196 ; 1 ; 0 ; +; - ram:RAM|mem[196][0]~197 ; 1 ; 0 ; +; - ram:RAM|mem[212][1]~198 ; 1 ; 0 ; +; - ram:RAM|mem[228][4]~199 ; 1 ; 0 ; +; - ram:RAM|mem[244][2]~200 ; 1 ; 0 ; +; - ram:RAM|mem[200][2]~201 ; 1 ; 0 ; +; - ram:RAM|mem[216][3]~202 ; 1 ; 0 ; +; - ram:RAM|mem[232][3]~203 ; 1 ; 0 ; +; - ram:RAM|mem[248][3]~204 ; 1 ; 0 ; +; - ram:RAM|mem[204][1]~205 ; 1 ; 0 ; +; - ram:RAM|mem[220][4]~206 ; 1 ; 0 ; +; - ram:RAM|mem[236][3]~207 ; 1 ; 0 ; +; - ram:RAM|mem[252][3]~208 ; 1 ; 0 ; +; - ram:RAM|mem[193][1]~209 ; 1 ; 0 ; +; - ram:RAM|mem[209][0]~210 ; 1 ; 0 ; +; - ram:RAM|mem[225][3]~211 ; 1 ; 0 ; +; - ram:RAM|mem[241][4]~212 ; 1 ; 0 ; +; - ram:RAM|mem[197][1]~213 ; 1 ; 0 ; +; - ram:RAM|mem[213][2]~214 ; 1 ; 0 ; +; - ram:RAM|mem[229][2]~215 ; 1 ; 0 ; +; - ram:RAM|mem[245][0]~216 ; 1 ; 0 ; +; - ram:RAM|mem[201][4]~217 ; 1 ; 0 ; +; - ram:RAM|mem[217][1]~218 ; 1 ; 0 ; +; - ram:RAM|mem[233][0]~219 ; 1 ; 0 ; +; - ram:RAM|mem[249][1]~220 ; 1 ; 0 ; +; - ram:RAM|mem[205][3]~221 ; 1 ; 0 ; +; - ram:RAM|mem[221][3]~222 ; 1 ; 0 ; +; - ram:RAM|mem[237][2]~223 ; 1 ; 0 ; +; - ram:RAM|mem[253][2]~224 ; 1 ; 0 ; +; - ram:RAM|mem[194][4]~225 ; 1 ; 0 ; +; - ram:RAM|mem[210][3]~226 ; 1 ; 0 ; +; - ram:RAM|mem[226][3]~227 ; 1 ; 0 ; +; - ram:RAM|mem[242][0]~228 ; 1 ; 0 ; +; - ram:RAM|mem[198][3]~229 ; 1 ; 0 ; +; - ram:RAM|mem[214][2]~230 ; 1 ; 0 ; +; - ram:RAM|mem[230][1]~231 ; 1 ; 0 ; +; - ram:RAM|mem[246][2]~232 ; 1 ; 0 ; +; - ram:RAM|mem[202][4]~233 ; 1 ; 0 ; +; - ram:RAM|mem[218][2]~234 ; 1 ; 0 ; +; - ram:RAM|mem[234][0]~235 ; 1 ; 0 ; +; - ram:RAM|mem[250][4]~236 ; 1 ; 0 ; +; - ram:RAM|mem[206][0]~237 ; 1 ; 0 ; +; - ram:RAM|mem[222][3]~238 ; 1 ; 0 ; +; - ram:RAM|mem[238][1]~239 ; 1 ; 0 ; +; - ram:RAM|mem[254][4]~240 ; 1 ; 0 ; +; - ram:RAM|mem[195][0]~241 ; 1 ; 0 ; +; - ram:RAM|mem[199][3]~242 ; 1 ; 0 ; +; - ram:RAM|mem[203][4]~243 ; 1 ; 0 ; +; - ram:RAM|mem[207][0]~244 ; 1 ; 0 ; +; - ram:RAM|mem[211][1]~245 ; 1 ; 0 ; +; - ram:RAM|mem[215][1]~246 ; 1 ; 0 ; +; - ram:RAM|mem[219][0]~247 ; 1 ; 0 ; +; - ram:RAM|mem[223][2]~248 ; 1 ; 0 ; +; - ram:RAM|mem[227][3]~249 ; 1 ; 0 ; +; - ram:RAM|mem[231][2]~250 ; 1 ; 0 ; +; - ram:RAM|mem[235][2]~251 ; 1 ; 0 ; +; - ram:RAM|mem[239][1]~252 ; 1 ; 0 ; +; - ram:RAM|mem[243][2]~253 ; 1 ; 0 ; +; - ram:RAM|mem[247][4]~254 ; 1 ; 0 ; +; - ram:RAM|mem[251][2]~255 ; 1 ; 0 ; +; - ram:RAM|mem[255][3]~256 ; 1 ; 0 ; +; - ram:RAM|mem~257 ; 1 ; 0 ; +; - ram:RAM|mem~258 ; 1 ; 0 ; +; - ram:RAM|mem~259 ; 1 ; 0 ; +; - ram:RAM|mem~260 ; 1 ; 0 ; +; - instruction_counter:PC|pc[16]~DUPLICATE ; 1 ; 0 ; +; - instruction_counter:PC|pc[17]~DUPLICATE ; 1 ; 0 ; +; - instruction_counter:PC|pc[2]~DUPLICATE ; 1 ; 0 ; +; - instruction_counter:PC|pc[19]~DUPLICATE ; 1 ; 0 ; +; - instruction_counter:PC|pc[3]~DUPLICATE ; 1 ; 0 ; +; - instruction_counter:PC|pc[20]~DUPLICATE ; 1 ; 0 ; +; - instruction_counter:PC|pc[4]~DUPLICATE ; 1 ; 0 ; +; - instruction_counter:PC|pc[5]~DUPLICATE ; 1 ; 0 ; +; - instruction_counter:PC|pc[6]~DUPLICATE ; 1 ; 0 ; +; - instruction_counter:PC|pc[7]~DUPLICATE ; 1 ; 0 ; +; - instruction_counter:PC|pc[8]~DUPLICATE ; 1 ; 0 ; +; - instruction_counter:PC|pc[9]~DUPLICATE ; 1 ; 0 ; +; - instruction_counter:PC|pc[10]~DUPLICATE ; 1 ; 0 ; +; - instruction_counter:PC|pc[29]~DUPLICATE ; 1 ; 0 ; +; - instruction_counter:PC|pc[13]~DUPLICATE ; 1 ; 0 ; +; - instruction_counter:PC|pc[15]~DUPLICATE ; 1 ; 0 ; ++------------------------------------------------+-------------------+---------+ -+----------------------------------------------------+ -; Routing Usage Summary ; -+------------------------------+---------------------+ -; Routing Resource Type ; Usage ; -+------------------------------+---------------------+ -; Block interconnects ; 0 / 217,884 ( 0 % ) ; -; C12 interconnects ; 0 / 10,080 ( 0 % ) ; -; C2 interconnects ; 0 / 87,208 ( 0 % ) ; -; C4 interconnects ; 0 / 41,360 ( 0 % ) ; -; DQS bus muxes ; 0 / 21 ( 0 % ) ; -; DQS-18 I/O buses ; 0 / 21 ( 0 % ) ; -; DQS-9 I/O buses ; 0 / 21 ( 0 % ) ; -; Direct links ; 0 / 217,884 ( 0 % ) ; -; Global clocks ; 0 / 16 ( 0 % ) ; -; Horizontal periphery clocks ; 0 / 12 ( 0 % ) ; -; Local interconnects ; 0 / 58,160 ( 0 % ) ; -; Quadrant clocks ; 0 / 88 ( 0 % ) ; -; R14 interconnects ; 0 / 9,228 ( 0 % ) ; -; R14/C12 interconnect drivers ; 0 / 15,096 ( 0 % ) ; -; R3 interconnects ; 0 / 94,896 ( 0 % ) ; -; R6 interconnects ; 0 / 194,640 ( 0 % ) ; -; Spine clocks ; 0 / 180 ( 0 % ) ; -; Wire stub REs ; 0 / 11,606 ( 0 % ) ; -+------------------------------+---------------------+ ++---------------------------------------------------------------------------------------------------------------------------------------------------------------+ +; Control Signals ; ++--------------------------------+----------------------+---------+--------------+--------+----------------------+------------------+---------------------------+ +; Name ; Location ; Fan-Out ; Usage ; Global ; Global Resource Used ; Global Line Name ; Enable Signal Source Name ; ++--------------------------------+----------------------+---------+--------------+--------+----------------------+------------------+---------------------------+ +; clk[0] ; PIN_Y16 ; 2524 ; Clock ; yes ; Global Clock ; GCLK5 ; -- ; +; ram:RAM|mem[0][3]~65 ; MLABCELL_X42_Y11_N33 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[100][0]~25 ; MLABCELL_X47_Y6_N3 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[101][1]~26 ; LABCELL_X48_Y12_N57 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[102][1]~27 ; LABCELL_X54_Y13_N42 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[103][1]~28 ; MLABCELL_X42_Y7_N9 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[104][0]~41 ; LABCELL_X53_Y13_N45 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[105][0]~42 ; MLABCELL_X42_Y14_N36 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[106][0]~43 ; MLABCELL_X42_Y14_N45 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[107][2]~44 ; LABCELL_X43_Y13_N12 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[108][3]~51 ; LABCELL_X49_Y9_N15 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[109][1]~55 ; LABCELL_X53_Y7_N21 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[10][4]~75 ; LABCELL_X53_Y11_N39 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[110][0]~59 ; LABCELL_X48_Y9_N54 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[111][2]~63 ; LABCELL_X48_Y9_N42 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[112][1]~13 ; MLABCELL_X55_Y9_N36 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[113][0]~14 ; MLABCELL_X47_Y5_N36 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[114][0]~15 ; MLABCELL_X50_Y9_N36 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[115][2]~16 ; MLABCELL_X47_Y10_N24 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[116][0]~29 ; MLABCELL_X50_Y11_N36 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[117][2]~30 ; LABCELL_X53_Y13_N36 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[118][4]~31 ; MLABCELL_X50_Y9_N33 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[119][4]~32 ; LABCELL_X46_Y8_N33 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[11][3]~79 ; LABCELL_X41_Y15_N6 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[120][0]~45 ; LABCELL_X54_Y9_N0 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[121][2]~46 ; LABCELL_X48_Y13_N51 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[122][2]~47 ; LABCELL_X49_Y8_N12 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[123][1]~48 ; LABCELL_X45_Y10_N54 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[124][2]~52 ; LABCELL_X51_Y10_N57 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[125][4]~56 ; LABCELL_X51_Y13_N42 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[126][1]~60 ; MLABCELL_X50_Y9_N30 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[127][1]~64 ; LABCELL_X46_Y8_N24 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[128][4]~129 ; LABCELL_X51_Y8_N3 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[129][0]~133 ; MLABCELL_X42_Y5_N36 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[12][3]~68 ; LABCELL_X53_Y6_N51 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[130][1]~137 ; MLABCELL_X42_Y5_N9 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[131][0]~141 ; LABCELL_X45_Y13_N3 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[132][0]~130 ; MLABCELL_X42_Y10_N33 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[133][1]~134 ; LABCELL_X43_Y13_N6 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[134][4]~138 ; LABCELL_X45_Y5_N36 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[135][3]~142 ; LABCELL_X43_Y13_N30 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[136][1]~131 ; LABCELL_X53_Y9_N51 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[137][1]~135 ; LABCELL_X48_Y9_N9 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[138][3]~139 ; LABCELL_X53_Y9_N39 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[139][3]~143 ; MLABCELL_X42_Y9_N57 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[13][1]~72 ; LABCELL_X46_Y14_N15 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[140][4]~132 ; LABCELL_X46_Y5_N48 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[141][4]~136 ; LABCELL_X48_Y14_N51 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[142][1]~140 ; LABCELL_X46_Y11_N24 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[143][3]~144 ; LABCELL_X45_Y13_N6 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[144][3]~145 ; LABCELL_X51_Y9_N12 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[145][3]~149 ; MLABCELL_X42_Y12_N48 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[146][4]~153 ; LABCELL_X48_Y7_N6 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[147][1]~157 ; LABCELL_X45_Y15_N51 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[148][1]~146 ; LABCELL_X45_Y6_N3 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[149][4]~150 ; LABCELL_X43_Y8_N24 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[14][1]~76 ; LABCELL_X49_Y11_N15 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[150][3]~154 ; LABCELL_X49_Y7_N54 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[151][3]~158 ; MLABCELL_X42_Y13_N12 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[152][3]~147 ; LABCELL_X51_Y11_N51 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[153][0]~151 ; LABCELL_X51_Y12_N9 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[154][2]~155 ; LABCELL_X46_Y6_N6 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[155][0]~159 ; MLABCELL_X42_Y13_N36 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[156][1]~148 ; MLABCELL_X42_Y4_N51 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[157][3]~152 ; MLABCELL_X47_Y13_N3 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[158][4]~156 ; LABCELL_X46_Y6_N36 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[159][3]~160 ; MLABCELL_X42_Y13_N42 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[15][4]~80 ; LABCELL_X41_Y15_N3 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[160][3]~161 ; LABCELL_X45_Y11_N36 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[161][0]~162 ; LABCELL_X48_Y6_N12 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[162][0]~163 ; LABCELL_X45_Y11_N9 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[163][3]~164 ; LABCELL_X45_Y11_N12 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[164][4]~165 ; MLABCELL_X47_Y9_N36 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[165][2]~166 ; MLABCELL_X47_Y9_N45 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[166][2]~167 ; LABCELL_X45_Y5_N42 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[167][1]~168 ; MLABCELL_X42_Y13_N21 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[168][2]~169 ; LABCELL_X51_Y11_N6 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[169][2]~170 ; LABCELL_X43_Y13_N21 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[16][4]~81 ; MLABCELL_X42_Y11_N36 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[170][4]~171 ; LABCELL_X45_Y11_N57 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[171][2]~172 ; LABCELL_X43_Y6_N9 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[172][2]~173 ; LABCELL_X46_Y5_N30 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[173][1]~174 ; LABCELL_X46_Y10_N33 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[174][4]~175 ; LABCELL_X45_Y8_N6 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[175][0]~176 ; LABCELL_X46_Y10_N54 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[176][1]~177 ; LABCELL_X51_Y8_N48 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[177][3]~181 ; LABCELL_X49_Y6_N45 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[178][3]~185 ; LABCELL_X45_Y6_N54 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[179][4]~189 ; MLABCELL_X42_Y5_N33 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[17][0]~85 ; LABCELL_X41_Y13_N18 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[180][4]~178 ; LABCELL_X45_Y6_N45 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[181][4]~182 ; LABCELL_X49_Y11_N45 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[182][0]~186 ; LABCELL_X45_Y8_N18 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[183][4]~190 ; LABCELL_X43_Y11_N45 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[184][4]~179 ; LABCELL_X51_Y8_N33 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[185][4]~183 ; LABCELL_X51_Y12_N3 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[186][0]~187 ; LABCELL_X45_Y4_N12 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[187][0]~191 ; MLABCELL_X42_Y6_N45 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[188][2]~180 ; LABCELL_X45_Y7_N21 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[189][3]~184 ; LABCELL_X45_Y7_N54 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[18][0]~89 ; MLABCELL_X42_Y11_N42 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[190][2]~188 ; LABCELL_X45_Y7_N18 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[191][2]~192 ; LABCELL_X43_Y6_N42 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[192][3]~193 ; LABCELL_X51_Y9_N21 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[193][1]~209 ; MLABCELL_X42_Y9_N18 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[194][4]~225 ; LABCELL_X49_Y9_N54 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[195][0]~241 ; LABCELL_X48_Y13_N33 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[196][0]~197 ; LABCELL_X49_Y10_N36 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[197][1]~213 ; LABCELL_X48_Y11_N0 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[198][3]~229 ; LABCELL_X49_Y10_N12 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[199][3]~242 ; LABCELL_X49_Y10_N45 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[19][3]~93 ; MLABCELL_X42_Y14_N24 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[1][0]~69 ; LABCELL_X40_Y15_N51 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[200][2]~201 ; LABCELL_X54_Y7_N21 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[201][4]~217 ; LABCELL_X53_Y12_N48 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[202][4]~233 ; LABCELL_X53_Y10_N6 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[203][4]~243 ; LABCELL_X48_Y13_N57 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[204][1]~205 ; LABCELL_X53_Y8_N36 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[205][3]~221 ; LABCELL_X53_Y12_N45 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[206][0]~237 ; LABCELL_X54_Y10_N0 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[207][0]~244 ; LABCELL_X49_Y13_N3 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[208][4]~194 ; MLABCELL_X47_Y7_N45 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[209][0]~210 ; MLABCELL_X42_Y9_N24 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[20][4]~82 ; MLABCELL_X50_Y11_N18 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[210][3]~226 ; LABCELL_X43_Y12_N18 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[211][1]~245 ; LABCELL_X43_Y12_N42 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[212][1]~198 ; LABCELL_X48_Y7_N30 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[213][2]~214 ; LABCELL_X48_Y11_N6 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[214][2]~230 ; LABCELL_X51_Y10_N6 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[215][1]~246 ; LABCELL_X43_Y8_N27 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[216][3]~202 ; LABCELL_X54_Y7_N42 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[217][1]~218 ; LABCELL_X53_Y10_N51 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[218][2]~234 ; LABCELL_X53_Y10_N3 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[219][0]~247 ; MLABCELL_X47_Y12_N30 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[21][3]~86 ; MLABCELL_X42_Y15_N15 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[220][4]~206 ; LABCELL_X53_Y8_N57 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[221][3]~222 ; LABCELL_X54_Y11_N24 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[222][3]~238 ; LABCELL_X54_Y11_N6 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[223][2]~248 ; LABCELL_X54_Y10_N57 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[224][1]~195 ; LABCELL_X48_Y5_N36 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[225][3]~211 ; LABCELL_X43_Y5_N6 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[226][3]~227 ; LABCELL_X43_Y5_N42 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[227][3]~249 ; LABCELL_X43_Y5_N54 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[228][4]~199 ; MLABCELL_X47_Y11_N57 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[229][2]~215 ; LABCELL_X49_Y12_N9 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[22][2]~90 ; LABCELL_X49_Y7_N39 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[230][1]~231 ; LABCELL_X48_Y5_N42 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[231][2]~250 ; LABCELL_X43_Y9_N6 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[232][3]~203 ; LABCELL_X54_Y7_N36 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[233][0]~219 ; LABCELL_X48_Y9_N0 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[234][0]~235 ; LABCELL_X45_Y9_N36 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[235][2]~251 ; LABCELL_X45_Y9_N3 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[236][3]~207 ; LABCELL_X49_Y6_N0 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[237][2]~223 ; LABCELL_X53_Y12_N3 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[238][1]~239 ; LABCELL_X49_Y13_N48 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[239][1]~252 ; LABCELL_X48_Y10_N57 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[23][0]~94 ; LABCELL_X43_Y14_N51 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[240][1]~196 ; MLABCELL_X50_Y8_N21 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[241][4]~212 ; LABCELL_X49_Y9_N3 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[242][0]~228 ; MLABCELL_X47_Y8_N30 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[243][2]~253 ; MLABCELL_X47_Y8_N27 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[244][2]~200 ; MLABCELL_X50_Y6_N51 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[245][0]~216 ; LABCELL_X48_Y11_N12 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[246][2]~232 ; LABCELL_X49_Y8_N57 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[247][4]~254 ; LABCELL_X43_Y8_N6 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[248][3]~204 ; LABCELL_X48_Y7_N3 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[249][1]~220 ; LABCELL_X48_Y8_N12 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[24][3]~83 ; LABCELL_X56_Y8_N51 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[250][4]~236 ; LABCELL_X49_Y8_N0 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[251][2]~255 ; LABCELL_X45_Y12_N18 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[252][3]~208 ; LABCELL_X51_Y10_N21 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[253][2]~224 ; LABCELL_X51_Y10_N42 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[254][4]~240 ; MLABCELL_X47_Y8_N42 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[255][3]~256 ; LABCELL_X54_Y10_N36 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[25][2]~87 ; MLABCELL_X42_Y16_N0 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[26][4]~91 ; LABCELL_X46_Y13_N12 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[27][1]~95 ; LABCELL_X41_Y13_N12 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[28][0]~84 ; LABCELL_X46_Y15_N36 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[29][2]~88 ; MLABCELL_X42_Y15_N39 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[2][0]~73 ; MLABCELL_X47_Y11_N42 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[30][3]~92 ; LABCELL_X48_Y11_N30 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[31][2]~96 ; MLABCELL_X42_Y13_N18 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[32][1]~97 ; MLABCELL_X42_Y11_N9 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[33][3]~98 ; LABCELL_X43_Y15_N0 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[34][3]~99 ; MLABCELL_X42_Y15_N42 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[35][2]~100 ; LABCELL_X41_Y11_N48 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[36][2]~101 ; LABCELL_X49_Y12_N54 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[37][0]~102 ; LABCELL_X49_Y14_N45 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[38][0]~103 ; MLABCELL_X50_Y14_N18 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[39][4]~104 ; LABCELL_X43_Y10_N36 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[3][2]~77 ; LABCELL_X40_Y15_N12 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[40][4]~105 ; LABCELL_X45_Y12_N27 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[41][1]~106 ; LABCELL_X41_Y16_N36 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[42][4]~107 ; MLABCELL_X42_Y16_N57 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[43][0]~108 ; LABCELL_X41_Y16_N57 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[44][1]~109 ; MLABCELL_X47_Y11_N24 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[45][4]~110 ; LABCELL_X46_Y14_N27 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[46][2]~111 ; MLABCELL_X47_Y11_N12 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[47][0]~112 ; MLABCELL_X47_Y11_N36 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[48][2]~113 ; MLABCELL_X50_Y14_N54 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[49][0]~117 ; LABCELL_X43_Y15_N12 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[4][0]~66 ; MLABCELL_X47_Y12_N24 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[50][2]~121 ; LABCELL_X43_Y13_N45 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[51][0]~125 ; LABCELL_X46_Y9_N21 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[52][0]~114 ; LABCELL_X48_Y12_N0 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[53][2]~118 ; MLABCELL_X47_Y11_N33 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[54][1]~122 ; LABCELL_X49_Y12_N12 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[55][2]~126 ; LABCELL_X46_Y13_N57 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[56][4]~115 ; LABCELL_X45_Y12_N30 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[57][2]~119 ; MLABCELL_X42_Y16_N42 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[58][2]~123 ; LABCELL_X45_Y13_N21 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[59][2]~127 ; LABCELL_X46_Y9_N42 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[5][0]~70 ; MLABCELL_X42_Y15_N30 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[60][4]~116 ; LABCELL_X46_Y15_N3 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[61][0]~120 ; LABCELL_X45_Y14_N27 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[62][2]~124 ; MLABCELL_X47_Y9_N3 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[63][2]~128 ; LABCELL_X46_Y13_N21 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[64][1]~1 ; MLABCELL_X55_Y9_N51 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[65][3]~2 ; LABCELL_X51_Y9_N30 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[66][2]~3 ; LABCELL_X54_Y8_N24 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[67][3]~4 ; LABCELL_X51_Y9_N42 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[68][0]~17 ; MLABCELL_X50_Y11_N9 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[69][1]~18 ; LABCELL_X49_Y11_N27 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[6][2]~74 ; MLABCELL_X50_Y11_N0 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[70][4]~19 ; LABCELL_X51_Y7_N0 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[71][3]~20 ; MLABCELL_X42_Y7_N48 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[72][3]~33 ; LABCELL_X54_Y9_N24 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[73][1]~34 ; LABCELL_X51_Y13_N51 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[74][1]~35 ; MLABCELL_X50_Y8_N3 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[75][2]~36 ; LABCELL_X45_Y10_N45 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[76][2]~49 ; MLABCELL_X55_Y10_N18 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[77][3]~53 ; MLABCELL_X55_Y11_N57 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[78][0]~57 ; LABCELL_X54_Y8_N39 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[79][0]~61 ; LABCELL_X46_Y7_N24 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[7][0]~78 ; MLABCELL_X42_Y15_N24 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[80][0]~5 ; MLABCELL_X55_Y9_N30 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[81][0]~6 ; MLABCELL_X47_Y13_N48 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[82][1]~7 ; MLABCELL_X47_Y7_N36 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[83][0]~8 ; MLABCELL_X47_Y7_N24 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[84][1]~21 ; MLABCELL_X50_Y11_N30 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[85][1]~22 ; MLABCELL_X50_Y10_N45 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[86][3]~23 ; LABCELL_X51_Y7_N45 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[87][4]~24 ; MLABCELL_X42_Y7_N6 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[88][4]~37 ; LABCELL_X54_Y9_N30 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[89][2]~38 ; LABCELL_X51_Y13_N54 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[8][2]~67 ; LABCELL_X46_Y11_N36 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[90][0]~39 ; LABCELL_X49_Y6_N24 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[91][0]~40 ; LABCELL_X45_Y10_N30 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[92][2]~50 ; MLABCELL_X55_Y10_N6 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[93][2]~54 ; MLABCELL_X55_Y11_N42 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[94][4]~58 ; MLABCELL_X50_Y10_N9 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[95][4]~62 ; LABCELL_X46_Y7_N18 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[96][1]~9 ; LABCELL_X54_Y13_N27 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[97][4]~10 ; LABCELL_X49_Y13_N42 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[98][3]~11 ; MLABCELL_X47_Y7_N54 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[99][0]~12 ; MLABCELL_X47_Y10_N45 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; ram:RAM|mem[9][2]~71 ; MLABCELL_X42_Y15_N3 ; 5 ; Clock enable ; no ; -- ; -- ; -- ; +; register_file:REGS|Decoder0~10 ; LABCELL_X28_Y10_N57 ; 42 ; Clock enable ; no ; -- ; -- ; -- ; +; register_file:REGS|Decoder0~11 ; LABCELL_X28_Y12_N54 ; 37 ; Clock enable ; no ; -- ; -- ; -- ; +; register_file:REGS|Decoder0~13 ; LABCELL_X28_Y10_N18 ; 34 ; Clock enable ; no ; -- ; -- ; -- ; +; register_file:REGS|Decoder0~14 ; LABCELL_X28_Y12_N51 ; 38 ; Clock enable ; no ; -- ; -- ; -- ; +; register_file:REGS|Decoder0~15 ; LABCELL_X28_Y10_N15 ; 44 ; Clock enable ; no ; -- ; -- ; -- ; +; register_file:REGS|Decoder0~16 ; LABCELL_X28_Y12_N57 ; 32 ; Clock enable ; no ; -- ; -- ; -- ; +; register_file:REGS|Decoder0~17 ; LABCELL_X28_Y10_N48 ; 43 ; Clock enable ; no ; -- ; -- ; -- ; +; register_file:REGS|Decoder0~18 ; LABCELL_X28_Y12_N48 ; 42 ; Clock enable ; no ; -- ; -- ; -- ; +; register_file:REGS|Decoder0~19 ; MLABCELL_X25_Y9_N27 ; 36 ; Clock enable ; no ; -- ; -- ; -- ; +; register_file:REGS|Decoder0~2 ; LABCELL_X28_Y12_N42 ; 36 ; Clock enable ; no ; -- ; -- ; -- ; +; register_file:REGS|Decoder0~22 ; MLABCELL_X25_Y9_N0 ; 39 ; Clock enable ; no ; -- ; -- ; -- ; +; register_file:REGS|Decoder0~24 ; LABCELL_X28_Y12_N30 ; 53 ; Clock enable ; no ; -- ; -- ; -- ; +; register_file:REGS|Decoder0~26 ; MLABCELL_X25_Y9_N42 ; 40 ; Clock enable ; no ; -- ; -- ; -- ; +; register_file:REGS|Decoder0~28 ; MLABCELL_X25_Y9_N12 ; 38 ; Clock enable ; no ; -- ; -- ; -- ; +; register_file:REGS|Decoder0~29 ; LABCELL_X28_Y12_N3 ; 47 ; Clock enable ; no ; -- ; -- ; -- ; +; register_file:REGS|Decoder0~30 ; LABCELL_X27_Y12_N3 ; 39 ; Clock enable ; no ; -- ; -- ; -- ; +; register_file:REGS|Decoder0~31 ; LABCELL_X28_Y10_N36 ; 38 ; Clock enable ; no ; -- ; -- ; -- ; +; register_file:REGS|Decoder0~32 ; LABCELL_X28_Y10_N21 ; 44 ; Clock enable ; no ; -- ; -- ; -- ; +; register_file:REGS|Decoder0~33 ; LABCELL_X28_Y10_N33 ; 37 ; Clock enable ; no ; -- ; -- ; -- ; +; register_file:REGS|Decoder0~34 ; MLABCELL_X25_Y9_N3 ; 37 ; Clock enable ; no ; -- ; -- ; -- ; +; register_file:REGS|Decoder0~35 ; LABCELL_X30_Y6_N15 ; 34 ; Clock enable ; no ; -- ; -- ; -- ; +; register_file:REGS|Decoder0~36 ; MLABCELL_X25_Y9_N9 ; 32 ; Clock enable ; no ; -- ; -- ; -- ; +; register_file:REGS|Decoder0~37 ; LABCELL_X28_Y12_N6 ; 40 ; Clock enable ; no ; -- ; -- ; -- ; +; register_file:REGS|Decoder0~38 ; LABCELL_X27_Y12_N45 ; 32 ; Clock enable ; no ; -- ; -- ; -- ; +; register_file:REGS|Decoder0~39 ; LABCELL_X30_Y6_N12 ; 39 ; Clock enable ; no ; -- ; -- ; -- ; +; register_file:REGS|Decoder0~4 ; LABCELL_X28_Y10_N6 ; 35 ; Clock enable ; no ; -- ; -- ; -- ; +; register_file:REGS|Decoder0~5 ; LABCELL_X28_Y12_N45 ; 36 ; Clock enable ; no ; -- ; -- ; -- ; +; register_file:REGS|Decoder0~6 ; LABCELL_X28_Y10_N51 ; 38 ; Clock enable ; no ; -- ; -- ; -- ; +; register_file:REGS|Decoder0~7 ; LABCELL_X28_Y12_N24 ; 44 ; Clock enable ; no ; -- ; -- ; -- ; +; register_file:REGS|Decoder0~8 ; LABCELL_X28_Y10_N54 ; 39 ; Clock enable ; no ; -- ; -- ; -- ; +; register_file:REGS|Decoder0~9 ; LABCELL_X28_Y12_N27 ; 33 ; Clock enable ; no ; -- ; -- ; -- ; +; rst[0] ; PIN_AC9 ; 307 ; Async. clear ; no ; -- ; -- ; -- ; ++--------------------------------+----------------------+---------+--------------+--------+----------------------+------------------+---------------------------+ + + ++---------------------------------------------------------------------------------------------------+ +; Global & Other Fast Signals ; ++--------+----------+---------+----------------------+------------------+---------------------------+ +; Name ; Location ; Fan-Out ; Global Resource Used ; Global Line Name ; Enable Signal Source Name ; ++--------+----------+---------+----------------------+------------------+---------------------------+ +; clk[0] ; PIN_Y16 ; 2524 ; Global Clock ; GCLK5 ; -- ; ++--------+----------+---------+----------------------+------------------+---------------------------+ + + ++--------------------------------------------------------+ +; Routing Usage Summary ; ++------------------------------+-------------------------+ +; Routing Resource Type ; Usage ; ++------------------------------+-------------------------+ +; Block interconnects ; 7,986 / 217,884 ( 4 % ) ; +; C12 interconnects ; 176 / 10,080 ( 2 % ) ; +; C2 interconnects ; 3,009 / 87,208 ( 3 % ) ; +; C4 interconnects ; 1,655 / 41,360 ( 4 % ) ; +; DQS bus muxes ; 0 / 21 ( 0 % ) ; +; DQS-18 I/O buses ; 0 / 21 ( 0 % ) ; +; DQS-9 I/O buses ; 0 / 21 ( 0 % ) ; +; Direct links ; 325 / 217,884 ( < 1 % ) ; +; Global clocks ; 1 / 16 ( 6 % ) ; +; Horizontal periphery clocks ; 0 / 12 ( 0 % ) ; +; Local interconnects ; 1,491 / 58,160 ( 3 % ) ; +; Quadrant clocks ; 0 / 88 ( 0 % ) ; +; R14 interconnects ; 213 / 9,228 ( 2 % ) ; +; R14/C12 interconnect drivers ; 351 / 15,096 ( 2 % ) ; +; R3 interconnects ; 3,547 / 94,896 ( 4 % ) ; +; R6 interconnects ; 5,058 / 194,640 ( 3 % ) ; +; Spine clocks ; 4 / 180 ( 2 % ) ; +; Wire stub REs ; 0 / 11,606 ( 0 % ) ; ++------------------------------+-------------------------+ +------------------------------------------+ @@ -1325,56 +2894,57 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi +--------------+-----------+-----------------------------------+------------------------------------------------------------------------------------+----------+--------------------------------------------------------------------------+---------------------+-------------------+ -+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ -; I/O Rules Matrix ; -+--------------------+--------------+--------------+--------------+--------------+--------------+-----------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+-----------+-----------+--------------+ -; Pin/Rules ; IO_000002 ; IO_000001 ; IO_000003 ; IO_000004 ; IO_000005 ; IO_000006 ; IO_000007 ; IO_000008 ; IO_000047 ; IO_000046 ; IO_000045 ; IO_000027 ; IO_000026 ; IO_000024 ; IO_000023 ; IO_000022 ; IO_000021 ; IO_000020 ; IO_000019 ; IO_000018 ; IO_000015 ; IO_000014 ; IO_000013 ; IO_000012 ; IO_000011 ; IO_000010 ; IO_000009 ; IO_000034 ; -+--------------------+--------------+--------------+--------------+--------------+--------------+-----------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+-----------+-----------+--------------+ -; Total Pass ; 0 ; 36 ; 36 ; 0 ; 0 ; 40 ; 36 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 32 ; 0 ; 0 ; 0 ; 0 ; 32 ; 0 ; 0 ; 0 ; 0 ; 32 ; 0 ; 40 ; 40 ; 0 ; -; Total Unchecked ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; -; Total Inapplicable ; 40 ; 4 ; 4 ; 40 ; 40 ; 0 ; 4 ; 40 ; 40 ; 40 ; 40 ; 40 ; 40 ; 8 ; 40 ; 40 ; 40 ; 40 ; 8 ; 40 ; 40 ; 40 ; 40 ; 8 ; 40 ; 0 ; 0 ; 40 ; -; Total Fail ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; -; HID_PC[0] ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; -; out_seg_0[0] ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; -; out_seg_0[1] ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; -; out_seg_0[2] ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; -; out_seg_0[3] ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; -; out_seg_0[4] ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; -; out_seg_0[5] ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; -; out_seg_0[6] ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; -; out_seg_0[7] ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; -; out_seg_1[0] ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; -; out_seg_1[1] ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; -; out_seg_1[2] ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; -; out_seg_1[3] ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; -; out_seg_1[4] ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; -; out_seg_1[5] ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; -; out_seg_1[6] ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; -; out_seg_1[7] ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; -; out_seg_2[0] ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; -; out_seg_2[1] ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; -; out_seg_2[2] ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; -; out_seg_2[3] ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; -; out_seg_2[4] ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; -; out_seg_2[5] ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; -; out_seg_2[6] ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; -; out_seg_2[7] ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; -; out_seg_3[0] ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; -; out_seg_3[1] ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; -; out_seg_3[2] ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; -; out_seg_3[3] ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; -; out_seg_3[4] ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; -; out_seg_3[5] ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; -; out_seg_3[6] ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; -; out_seg_3[7] ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; -; HID_Hi_Low[0] ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; -; HID_Register[4] ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; -; HID_Register[2] ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; -; HID_Register[0] ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; -; HID_Register[1] ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; -; HID_Register[3] ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; -; clk[0] ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; -+--------------------+--------------+--------------+--------------+--------------+--------------+-----------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+-----------+-----------+--------------+ ++--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ +; I/O Rules Matrix ; ++--------------------+--------------+-----------+-----------+--------------+--------------+-----------+-----------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+-----------+-----------+--------------+ +; Pin/Rules ; IO_000002 ; IO_000001 ; IO_000003 ; IO_000004 ; IO_000005 ; IO_000006 ; IO_000007 ; IO_000008 ; IO_000047 ; IO_000046 ; IO_000045 ; IO_000027 ; IO_000026 ; IO_000024 ; IO_000023 ; IO_000022 ; IO_000021 ; IO_000020 ; IO_000019 ; IO_000018 ; IO_000015 ; IO_000014 ; IO_000013 ; IO_000012 ; IO_000011 ; IO_000010 ; IO_000009 ; IO_000034 ; ++--------------------+--------------+-----------+-----------+--------------+--------------+-----------+-----------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+-----------+-----------+--------------+ +; Total Pass ; 0 ; 41 ; 41 ; 0 ; 0 ; 41 ; 41 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 32 ; 0 ; 0 ; 0 ; 0 ; 32 ; 0 ; 0 ; 0 ; 0 ; 32 ; 0 ; 41 ; 41 ; 0 ; +; Total Unchecked ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; +; Total Inapplicable ; 41 ; 0 ; 0 ; 41 ; 41 ; 0 ; 0 ; 41 ; 41 ; 41 ; 41 ; 41 ; 41 ; 9 ; 41 ; 41 ; 41 ; 41 ; 9 ; 41 ; 41 ; 41 ; 41 ; 9 ; 41 ; 0 ; 0 ; 41 ; +; Total Fail ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; +; out_seg_0[0] ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; +; out_seg_0[1] ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; +; out_seg_0[2] ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; +; out_seg_0[3] ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; +; out_seg_0[4] ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; +; out_seg_0[5] ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; +; out_seg_0[6] ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; +; out_seg_0[7] ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; +; out_seg_1[0] ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; +; out_seg_1[1] ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; +; out_seg_1[2] ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; +; out_seg_1[3] ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; +; out_seg_1[4] ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; +; out_seg_1[5] ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; +; out_seg_1[6] ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; +; out_seg_1[7] ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; +; out_seg_2[0] ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; +; out_seg_2[1] ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; +; out_seg_2[2] ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; +; out_seg_2[3] ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; +; out_seg_2[4] ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; +; out_seg_2[5] ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; +; out_seg_2[6] ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; +; out_seg_2[7] ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; +; out_seg_3[0] ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; +; out_seg_3[1] ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; +; out_seg_3[2] ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; +; out_seg_3[3] ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; +; out_seg_3[4] ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; +; out_seg_3[5] ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; +; out_seg_3[6] ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; +; out_seg_3[7] ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Inapplicable ; Pass ; Pass ; Inapplicable ; +; HID_Hi_Low[0] ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; +; HID_Register[4] ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; +; HID_Register[3] ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; +; HID_Register[1] ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; +; HID_Register[2] ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; +; HID_Register[0] ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; +; HID_PC[0] ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; +; clk[0] ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; +; rst[0] ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Inapplicable ; Pass ; Pass ; Inapplicable ; ++--------------------+--------------+-----------+-----------+--------------+--------------+-----------+-----------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+--------------+-----------+-----------+--------------+ +------------------------------------------------------------------------------------------------+ @@ -1420,6 +2990,44 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi +---------------------------+--------+ ++------------------------------------------------------------+ +; Estimated Delay Added for Hold Timing Summary ; ++-----------------+----------------------+-------------------+ +; Source Clock(s) ; Destination Clock(s) ; Delay Added in ns ; ++-----------------+----------------------+-------------------+ +; clk[0] ; clk[0] ; 7.2 ; ++-----------------+----------------------+-------------------+ +Note: For more information on problematic transfers, consider running the Fitter again with the Optimize hold timing option (Settings Menu) turned off. +This will disable optimization of problematic paths and expose them for further analysis using the Timing Analyzer. + + ++-----------------------------------------------------------------------------------+ +; Estimated Delay Added for Hold Timing Details ; ++-------------------------------+-------------------------------+-------------------+ +; Source Register ; Destination Register ; Delay Added in ns ; ++-------------------------------+-------------------------------+-------------------+ +; instruction_counter:PC|pc[9] ; instruction_counter:PC|pc[31] ; 0.499 ; +; instruction_counter:PC|pc[3] ; instruction_counter:PC|pc[31] ; 0.487 ; +; instruction_counter:PC|pc[17] ; instruction_counter:PC|pc[31] ; 0.486 ; +; instruction_counter:PC|pc[11] ; instruction_counter:PC|pc[31] ; 0.486 ; +; instruction_counter:PC|pc[2] ; instruction_counter:PC|pc[31] ; 0.483 ; +; instruction_counter:PC|pc[14] ; instruction_counter:PC|pc[31] ; 0.482 ; +; instruction_counter:PC|pc[7] ; instruction_counter:PC|pc[31] ; 0.431 ; +; instruction_counter:PC|pc[10] ; instruction_counter:PC|pc[31] ; 0.429 ; +; instruction_counter:PC|pc[5] ; instruction_counter:PC|pc[31] ; 0.426 ; +; instruction_counter:PC|pc[8] ; instruction_counter:PC|pc[31] ; 0.424 ; +; instruction_counter:PC|pc[18] ; instruction_counter:PC|pc[31] ; 0.422 ; +; instruction_counter:PC|pc[15] ; instruction_counter:PC|pc[31] ; 0.421 ; +; instruction_counter:PC|pc[19] ; instruction_counter:PC|pc[31] ; 0.373 ; +; instruction_counter:PC|pc[4] ; instruction_counter:PC|pc[31] ; 0.371 ; +; instruction_counter:PC|pc[16] ; instruction_counter:PC|pc[31] ; 0.336 ; +; instruction_counter:PC|pc[12] ; instruction_counter:PC|pc[31] ; 0.254 ; +; instruction_counter:PC|pc[6] ; instruction_counter:PC|pc[31] ; 0.219 ; +; instruction_counter:PC|pc[13] ; instruction_counter:PC|pc[31] ; 0.196 ; ++-------------------------------+-------------------------------+-------------------+ +Note: This table only shows the top 18 path(s) that have the largest delay added for hold. + + +-----------------+ ; Fitter Messages ; +-----------------+ @@ -1430,44 +3038,42 @@ Info (21077): High junction temperature is 85 degrees C Info (171003): Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time Warning (292013): Feature LogicLock is only available with a valid subscription license. You can purchase a software subscription to gain full access to this feature. Warning (15714): Some pins have incomplete I/O assignments. Refer to the I/O Assignment Warnings report for details -Critical Warning (169085): No exact pin location assignment(s) for 4 pins of 40 total pins. For the list of pins please refer to the I/O Assignment Warnings table in the fitter report. Info (184020): Starting Fitter periphery placement operations +Info (11191): Automatically promoted 1 clock (1 global) + Info (11162): clk[0]~inputCLKENA0 with 2302 fanout uses global clock CLKCTRL_G5 Info (184021): Fitter periphery placement operations ending: elapsed time is 00:00:00 Info (176233): Starting register packing Info (176235): Finished register packing Extra Info (176219): No registers were packed into other blocks -Info (11798): Fitter preparation operations ending: elapsed time is 00:00:07 +Info (11798): Fitter preparation operations ending: elapsed time is 00:00:08 Critical Warning (332012): Synopsys Design Constraints File file not found: 'assignment2.sdc'. A Synopsys Design Constraints File is required by the Timing Analyzer to get proper timing constraints. Without it, the Compiler will not properly optimize the design. Info (332144): No user constrained base clocks found in the design -Info (332096): The command derive_clocks did not find any clocks to derive. No clocks were created or changed. -Warning (332068): No clocks defined in design. Info (332143): No user constrained clock uncertainty found in the design. Calling "derive_clock_uncertainty" -Info (332154): The derive_clock_uncertainty command did not apply clock uncertainty to any clock-to-clock transfers. +Info (332123): Deriving Clock Uncertainty. Please refer to report_sdc in the Timing Analyzer to see clock uncertainties. Info (332130): Timing requirements not specified -- quality metrics such as performance may be sacrificed to reduce compilation time. Info (170189): Fitter placement preparation operations beginning Info (14951): The Fitter is using Advanced Physical Optimization. -Info (170190): Fitter placement preparation operations ending: elapsed time is 00:00:00 +Info (170190): Fitter placement preparation operations ending: elapsed time is 00:00:13 Info (170191): Fitter placement operations beginning Info (170137): Fitter placement was successful -Info (170192): Fitter placement operations ending: elapsed time is 00:00:00 +Info (170192): Fitter placement operations ending: elapsed time is 00:00:08 Info (170193): Fitter routing operations beginning -Info (170195): Router estimated average interconnect usage is 0% of the available device resources - Info (170196): Router estimated peak interconnect usage is 0% of the available device resources in the region that extends from location X0_Y24 to location X10_Y36 +Info (170195): Router estimated average interconnect usage is 2% of the available device resources + Info (170196): Router estimated peak interconnect usage is 25% of the available device resources in the region that extends from location X34_Y0 to location X45_Y11 Info (170199): The Fitter performed an Auto Fit compilation. Optimizations were skipped to reduce compilation time. Info (170201): Optimizations that may affect the design's routability were skipped - Info (170200): Optimizations that may affect the design's timing were skipped -Info (170194): Fitter routing operations ending: elapsed time is 00:00:01 -Info (11888): Total time spent on timing analysis during the Fitter is 0.04 seconds. +Info (170194): Fitter routing operations ending: elapsed time is 00:00:39 +Info (11888): Total time spent on timing analysis during the Fitter is 5.60 seconds. Info (334003): Started post-fitting delay annotation Info (334004): Delay annotation completed successfully Info (334003): Started post-fitting delay annotation Info (334004): Delay annotation completed successfully -Info (11801): Fitter post-fit operations ending: elapsed time is 00:00:04 +Info (11801): Fitter post-fit operations ending: elapsed time is 00:00:17 Warning (171167): Found invalid Fitter assignments. See the Ignored Assignments panel in the Fitter Compilation Report for more information. -Info: Quartus Prime Fitter was successful. 0 errors, 6 warnings - Info: Peak virtual memory: 1336 megabytes - Info: Processing ended: Fri Oct 16 09:58:49 2026 - Info: Elapsed time: 00:00:29 - Info: Total CPU time (on all processors): 00:00:39 +Info: Quartus Prime Fitter was successful. 0 errors, 4 warnings + Info: Peak virtual memory: 1435 megabytes + Info: Processing ended: Fri Oct 16 14:23:00 2026 + Info: Elapsed time: 00:01:56 + Info: Total CPU time (on all processors): 00:02:52 diff --git a/Quartus/A2/output_files/assignment2.fit.summary b/Quartus/A2/output_files/assignment2.fit.summary index 5ba69f8..8b9f1e0 100644 --- a/Quartus/A2/output_files/assignment2.fit.summary +++ b/Quartus/A2/output_files/assignment2.fit.summary @@ -1,13 +1,13 @@ -Fitter Status : Successful - Fri Oct 16 09:58:48 2026 +Fitter Status : Successful - Fri Oct 16 14:22:59 2026 Quartus Prime Version : 25.1std.0 Build 1129 10/21/2025 SC Lite Edition Revision Name : assignment2 Top-level Entity Name : assignment2 Family : Cyclone V Device : 5CGXFC5C6F27C7 Timing Models : Final -Logic utilization (in ALMs) : 1 / 29,080 ( < 1 % ) -Total registers : 0 -Total pins : 40 / 364 ( 11 % ) +Logic utilization (in ALMs) : 1,735 / 29,080 ( 6 % ) +Total registers : 2524 +Total pins : 41 / 364 ( 11 % ) Total virtual pins : 0 Total block memory bits : 0 / 4,567,040 ( 0 % ) Total RAM Blocks : 0 / 446 ( 0 % ) diff --git a/Quartus/A2/output_files/assignment2.flow.rpt b/Quartus/A2/output_files/assignment2.flow.rpt index 3d5d4cc..159988d 100644 --- a/Quartus/A2/output_files/assignment2.flow.rpt +++ b/Quartus/A2/output_files/assignment2.flow.rpt @@ -1,5 +1,5 @@ Flow report for assignment2 -Fri Oct 16 09:59:05 2026 +Fri Oct 16 14:23:31 2026 Quartus Prime Version 25.1std.0 Build 1129 10/21/2025 SC Lite Edition @@ -41,16 +41,16 @@ on the Quartus Prime software download page. +-----------------------------------------------------------------------------------+ ; Flow Summary ; +---------------------------------+-------------------------------------------------+ -; Flow Status ; Successful - Fri Oct 16 09:59:05 2026 ; +; Flow Status ; Successful - Fri Oct 16 14:23:31 2026 ; ; Quartus Prime Version ; 25.1std.0 Build 1129 10/21/2025 SC Lite Edition ; ; Revision Name ; assignment2 ; ; Top-level Entity Name ; assignment2 ; ; Family ; Cyclone V ; ; Device ; 5CGXFC5C6F27C7 ; ; Timing Models ; Final ; -; Logic utilization (in ALMs) ; 1 / 29,080 ( < 1 % ) ; -; Total registers ; 0 ; -; Total pins ; 40 / 364 ( 11 % ) ; +; Logic utilization (in ALMs) ; 1,735 / 29,080 ( 6 % ) ; +; Total registers ; 2524 ; +; Total pins ; 41 / 364 ( 11 % ) ; ; Total virtual pins ; 0 ; ; Total block memory bits ; 0 / 4,567,040 ( 0 % ) ; ; Total DSP Blocks ; 0 / 150 ( 0 % ) ; @@ -68,7 +68,7 @@ on the Quartus Prime software download page. +-------------------+---------------------+ ; Option ; Setting ; +-------------------+---------------------+ -; Start date & time ; 10/16/2026 09:58:06 ; +; Start date & time ; 10/16/2026 14:20:44 ; ; Main task ; Compilation ; ; Revision Name ; assignment2 ; +-------------------+---------------------+ @@ -79,7 +79,7 @@ on the Quartus Prime software download page. +-------------------------------------+----------------------------------------+---------------+-------------+-----------------------------------+ ; Assignment Name ; Value ; Default Value ; Entity Name ; Section Id ; +-------------------------------------+----------------------------------------+---------------+-------------+-----------------------------------+ -; COMPILER_SIGNATURE_ID ; 231344018423319.179210508627966 ; -- ; -- ; -- ; +; COMPILER_SIGNATURE_ID ; 248825844801641.179212084341235 ; -- ; -- ; -- ; ; EDA_GENERATE_FUNCTIONAL_NETLIST ; Off ; -- ; -- ; eda_board_design_timing ; ; EDA_GENERATE_FUNCTIONAL_NETLIST ; Off ; -- ; -- ; eda_board_design_boundary_scan ; ; EDA_GENERATE_FUNCTIONAL_NETLIST ; Off ; -- ; -- ; eda_board_design_signal_integrity ; @@ -103,12 +103,12 @@ on the Quartus Prime software download page. +----------------------+--------------+-------------------------+---------------------+------------------------------------+ ; Module Name ; Elapsed Time ; Average Processors Used ; Peak Virtual Memory ; Total CPU Time (on all processors) ; +----------------------+--------------+-------------------------+---------------------+------------------------------------+ -; Analysis & Synthesis ; 00:00:12 ; 1.0 ; 427 MB ; 00:00:26 ; -; Fitter ; 00:00:28 ; 1.0 ; 1336 MB ; 00:00:38 ; -; Assembler ; 00:00:06 ; 1.0 ; 520 MB ; 00:00:05 ; -; Timing Analyzer ; 00:00:05 ; 1.0 ; 765 MB ; 00:00:05 ; -; EDA Netlist Writer ; 00:00:01 ; 1.0 ; 669 MB ; 00:00:01 ; -; Total ; 00:00:52 ; -- ; -- ; 00:01:15 ; +; Analysis & Synthesis ; 00:00:19 ; 1.0 ; 448 MB ; 00:00:32 ; +; Fitter ; 00:01:55 ; 1.1 ; 1435 MB ; 00:02:51 ; +; Assembler ; 00:00:07 ; 1.0 ; 548 MB ; 00:00:06 ; +; Timing Analyzer ; 00:00:17 ; 1.6 ; 854 MB ; 00:00:27 ; +; EDA Netlist Writer ; 00:00:02 ; 1.0 ; 693 MB ; 00:00:02 ; +; Total ; 00:02:40 ; -- ; -- ; 00:03:58 ; +----------------------+--------------+-------------------------+---------------------+------------------------------------+ diff --git a/Quartus/A2/output_files/assignment2.map.rpt b/Quartus/A2/output_files/assignment2.map.rpt index ff93163..61edf31 100644 --- a/Quartus/A2/output_files/assignment2.map.rpt +++ b/Quartus/A2/output_files/assignment2.map.rpt @@ -1,5 +1,5 @@ Analysis & Synthesis report for assignment2 -Fri Oct 16 09:58:19 2026 +Fri Oct 16 14:21:03 2026 Quartus Prime Version 25.1std.0 Build 1129 10/21/2025 SC Lite Edition @@ -14,31 +14,29 @@ Quartus Prime Version 25.1std.0 Build 1129 10/21/2025 SC Lite Edition 6. Analysis & Synthesis Resource Usage Summary 7. Analysis & Synthesis Resource Utilization by Entity 8. Registers Removed During Synthesis - 9. Removed Registers Triggering Further Register Optimizations - 10. General Register Statistics - 11. Multiplexer Restructuring Statistics (Restructuring Performed) - 12. Parameter Settings for User Entity Instance: Top-level Entity: |assignment2 - 13. Parameter Settings for User Entity Instance: instruction_counter:PC - 14. Parameter Settings for User Entity Instance: rom:ROM - 15. Parameter Settings for User Entity Instance: ram:RAM - 16. Parameter Settings for User Entity Instance: register_file:REGS - 17. Parameter Settings for User Entity Instance: sign_extender:SIGNEXT - 18. Parameter Settings for User Entity Instance: alu:ALU - 19. Parameter Settings for User Entity Instance: alu:ALU|asu:adder_unit - 20. Parameter Settings for User Entity Instance: alu:ALU|lu:logic_unit - 21. Port Connectivity Checks: "seven_seg_4digit:display|seven_seg:digit3" - 22. Port Connectivity Checks: "seven_seg_4digit:display|seven_seg:digit2" - 23. Port Connectivity Checks: "seven_seg_4digit:display|seven_seg:digit1" - 24. Port Connectivity Checks: "seven_seg_4digit:display|seven_seg:digit0" - 25. Port Connectivity Checks: "alu:ALU" - 26. Port Connectivity Checks: "sign_extender:SIGNEXT" - 27. Port Connectivity Checks: "control_unit:CONTROL_UNIT|instruction_classifier:CLASSIFIER" - 28. Port Connectivity Checks: "control_unit:CONTROL_UNIT" - 29. Port Connectivity Checks: "ram:RAM" - 30. Port Connectivity Checks: "instruction_counter:PC" - 31. Post-Synthesis Netlist Statistics for Top Partition - 32. Elapsed Time Per Partition - 33. Analysis & Synthesis Messages + 9. General Register Statistics + 10. Multiplexer Restructuring Statistics (Restructuring Performed) + 11. Parameter Settings for User Entity Instance: Top-level Entity: |assignment2 + 12. Parameter Settings for User Entity Instance: instruction_counter:PC + 13. Parameter Settings for User Entity Instance: rom:ROM + 14. Parameter Settings for User Entity Instance: ram:RAM + 15. Parameter Settings for User Entity Instance: register_file:REGS + 16. Parameter Settings for User Entity Instance: sign_extender:SIGNEXT + 17. Parameter Settings for User Entity Instance: alu:ALU + 18. Parameter Settings for User Entity Instance: alu:ALU|asu:adder_unit + 19. Parameter Settings for User Entity Instance: alu:ALU|lu:logic_unit + 20. Port Connectivity Checks: "seven_seg_4digit:display|seven_seg:digit3" + 21. Port Connectivity Checks: "seven_seg_4digit:display|seven_seg:digit2" + 22. Port Connectivity Checks: "seven_seg_4digit:display|seven_seg:digit1" + 23. Port Connectivity Checks: "seven_seg_4digit:display|seven_seg:digit0" + 24. Port Connectivity Checks: "alu:ALU" + 25. Port Connectivity Checks: "sign_extender:SIGNEXT" + 26. Port Connectivity Checks: "control_unit:CONTROL_UNIT|instruction_classifier:CLASSIFIER" + 27. Port Connectivity Checks: "ram:RAM" + 28. Port Connectivity Checks: "rom:ROM" + 29. Post-Synthesis Netlist Statistics for Top Partition + 30. Elapsed Time Per Partition + 31. Analysis & Synthesis Messages @@ -65,14 +63,14 @@ on the Quartus Prime software download page. +-----------------------------------------------------------------------------------+ ; Analysis & Synthesis Summary ; +---------------------------------+-------------------------------------------------+ -; Analysis & Synthesis Status ; Successful - Fri Oct 16 09:58:19 2026 ; +; Analysis & Synthesis Status ; Successful - Fri Oct 16 14:21:03 2026 ; ; Quartus Prime Version ; 25.1std.0 Build 1129 10/21/2025 SC Lite Edition ; ; Revision Name ; assignment2 ; ; Top-level Entity Name ; assignment2 ; ; Family ; Cyclone V ; ; Logic utilization (in ALMs) ; N/A ; -; Total registers ; 0 ; -; Total pins ; 40 ; +; Total registers ; 2302 ; +; Total pins ; 41 ; ; Total virtual pins ; 0 ; ; Total block memory bits ; 0 ; ; Total DSP Blocks ; 0 ; @@ -182,5605 +180,129 @@ on the Quartus Prime software download page. ; Maximum allowed ; 2 ; ; ; ; ; Average used ; 1.00 ; -; Maximum used ; 1 ; +; Maximum used ; 2 ; ; ; ; ; Usage by Processor ; % Time Used ; ; Processor 1 ; 100.0% ; +; Processor 2 ; 0.1% ; +----------------------------+-------------+ -+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ -; Analysis & Synthesis Source Files Read ; -+----------------------------------------------------------------------------------+-----------------+------------------------------------+----------------------------------------------------------------------------------+---------+ -; File Name with User-Entered Path ; Used in Netlist ; File Type ; File Name with Absolute Path ; Library ; -+----------------------------------------------------------------------------------+-----------------+------------------------------------+----------------------------------------------------------------------------------+---------+ -; ../../modules/assignment2.sv ; yes ; User SystemVerilog HDL File ; /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv ; ; -; ../../modules/rom.sv ; yes ; Auto-Found SystemVerilog HDL File ; /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/rom.sv ; ; -; ../../modules/ram.sv ; yes ; Auto-Found SystemVerilog HDL File ; /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/ram.sv ; ; -; ../../modules/register_file.sv ; yes ; Auto-Found SystemVerilog HDL File ; /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/register_file.sv ; ; -; ../../modules/instruction_counter.sv ; yes ; Auto-Found SystemVerilog HDL File ; /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/instruction_counter.sv ; ; -; ../../modules/instruction_classifier.sv ; yes ; Auto-Found SystemVerilog HDL File ; /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/instruction_classifier.sv ; ; -; ../../modules/control_unit.sv ; yes ; Auto-Found SystemVerilog HDL File ; /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/control_unit.sv ; ; -; ../../modules/asu.sv ; yes ; Auto-Found SystemVerilog HDL File ; /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/asu.sv ; ; -; ../../modules/lu.sv ; yes ; Auto-Found SystemVerilog HDL File ; /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/lu.sv ; ; -; ../../modules/alu.sv ; yes ; Auto-Found SystemVerilog HDL File ; /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/alu.sv ; ; -; ../../modules/shifter.sv ; yes ; Auto-Found SystemVerilog HDL File ; /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/shifter.sv ; ; -; ../../modules/sign_extender.sv ; yes ; Auto-Found SystemVerilog HDL File ; /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/sign_extender.sv ; ; -; ../../modules/seven_seg.sv ; yes ; Auto-Found SystemVerilog HDL File ; /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/seven_seg.sv ; ; -; ../../modules/seven_seg_4digit.sv ; yes ; Auto-Found SystemVerilog HDL File ; /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/seven_seg_4digit.sv ; ; -; /home/oliver/Documents/FPGA_Dev/FPGA_Uni/asm/bin/ELEC4720-2026s2-Ass-02-Demo.txt ; yes ; Auto-Found File ; /home/oliver/Documents/FPGA_Dev/FPGA_Uni/asm/bin/ELEC4720-2026s2-Ass-02-Demo.txt ; ; -+----------------------------------------------------------------------------------+-----------------+------------------------------------+----------------------------------------------------------------------------------+---------+ ++-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ +; Analysis & Synthesis Source Files Read ; ++----------------------------------------------------------------------------------+-----------------+---------------------------------------------+----------------------------------------------------------------------------------+---------+ +; File Name with User-Entered Path ; Used in Netlist ; File Type ; File Name with Absolute Path ; Library ; ++----------------------------------------------------------------------------------+-----------------+---------------------------------------------+----------------------------------------------------------------------------------+---------+ +; ../../modules/assignment2.sv ; yes ; User SystemVerilog HDL File ; /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv ; ; +; ../../modules/rom.sv ; yes ; Auto-Found SystemVerilog HDL File ; /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/rom.sv ; ; +; ../../modules/ram.sv ; yes ; Auto-Found SystemVerilog HDL File ; /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/ram.sv ; ; +; ../../modules/register_file.sv ; yes ; Auto-Found SystemVerilog HDL File ; /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/register_file.sv ; ; +; ../../modules/instruction_counter.sv ; yes ; Auto-Found SystemVerilog HDL File ; /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/instruction_counter.sv ; ; +; ../../modules/instruction_classifier.sv ; yes ; Auto-Found SystemVerilog HDL File ; /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/instruction_classifier.sv ; ; +; ../../modules/control_unit.sv ; yes ; Auto-Found SystemVerilog HDL File ; /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/control_unit.sv ; ; +; ../../modules/asu.sv ; yes ; Auto-Found SystemVerilog HDL File ; /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/asu.sv ; ; +; ../../modules/lu.sv ; yes ; Auto-Found SystemVerilog HDL File ; /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/lu.sv ; ; +; ../../modules/alu.sv ; yes ; Auto-Found SystemVerilog HDL File ; /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/alu.sv ; ; +; ../../modules/shifter.sv ; yes ; Auto-Found SystemVerilog HDL File ; /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/shifter.sv ; ; +; ../../modules/sign_extender.sv ; yes ; Auto-Found SystemVerilog HDL File ; /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/sign_extender.sv ; ; +; ../../modules/seven_seg.sv ; yes ; Auto-Found SystemVerilog HDL File ; /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/seven_seg.sv ; ; +; ../../modules/seven_seg_4digit.sv ; yes ; Auto-Found SystemVerilog HDL File ; /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/seven_seg_4digit.sv ; ; +; /home/oliver/Documents/FPGA_Dev/FPGA_Uni/asm/bin/ELEC4720-2026s2-Ass-02-Demo.hex ; yes ; Auto-Found Hexadecimal (Intel-Format) File ; /home/oliver/Documents/FPGA_Dev/FPGA_Uni/asm/bin/ELEC4720-2026s2-Ass-02-Demo.hex ; ; ++----------------------------------------------------------------------------------+-----------------+---------------------------------------------+----------------------------------------------------------------------------------+---------+ -+---------------------------------------------------------+ -; Analysis & Synthesis Resource Usage Summary ; -+---------------------------------------------+-----------+ -; Resource ; Usage ; -+---------------------------------------------+-----------+ -; Estimate of Logic utilization (ALMs needed) ; 0 ; -; ; ; -; Combinational ALUT usage for logic ; 0 ; -; -- 7 input functions ; 0 ; -; -- 6 input functions ; 0 ; -; -- 5 input functions ; 0 ; -; -- 4 input functions ; 0 ; -; -- <=3 input functions ; 0 ; -; ; ; -; Dedicated logic registers ; 0 ; -; ; ; -; I/O pins ; 40 ; -; ; ; -; Total DSP Blocks ; 0 ; -; ; ; -; Maximum fan-out node ; HID_PC[0] ; -; Maximum fan-out ; 1 ; -; Total fan-out ; 40 ; -; Average fan-out ; 0.50 ; -+---------------------------------------------+-----------+ ++------------------------------------------------------------+ +; Analysis & Synthesis Resource Usage Summary ; ++---------------------------------------------+--------------+ +; Resource ; Usage ; ++---------------------------------------------+--------------+ +; Estimate of Logic utilization (ALMs needed) ; 2016 ; +; ; ; +; Combinational ALUT usage for logic ; 2018 ; +; -- 7 input functions ; 0 ; +; -- 6 input functions ; 1205 ; +; -- 5 input functions ; 431 ; +; -- 4 input functions ; 234 ; +; -- <=3 input functions ; 148 ; +; ; ; +; Dedicated logic registers ; 2302 ; +; ; ; +; I/O pins ; 41 ; +; ; ; +; Total DSP Blocks ; 0 ; +; ; ; +; Maximum fan-out node ; clk[0]~input ; +; Maximum fan-out ; 2302 ; +; Total fan-out ; 17743 ; +; Average fan-out ; 4.03 ; ++---------------------------------------------+--------------+ -+----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ -; Analysis & Synthesis Resource Utilization by Entity ; -+----------------------------+---------------------+---------------------------+-------------------+------------+------+--------------+---------------------+-------------+--------------+ -; Compilation Hierarchy Node ; Combinational ALUTs ; Dedicated Logic Registers ; Block Memory Bits ; DSP Blocks ; Pins ; Virtual Pins ; Full Hierarchy Name ; Entity Name ; Library Name ; -+----------------------------+---------------------+---------------------------+-------------------+------------+------+--------------+---------------------+-------------+--------------+ -; |assignment2 ; 0 (0) ; 0 (0) ; 0 ; 0 ; 40 ; 0 ; |assignment2 ; assignment2 ; work ; -+----------------------------+---------------------+---------------------------+-------------------+------------+------+--------------+---------------------+-------------+--------------+ ++-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ +; Analysis & Synthesis Resource Utilization by Entity ; ++-------------------------------------------+---------------------+---------------------------+-------------------+------------+------+--------------+--------------------------------------------------------------------------+------------------------+--------------+ +; Compilation Hierarchy Node ; Combinational ALUTs ; Dedicated Logic Registers ; Block Memory Bits ; DSP Blocks ; Pins ; Virtual Pins ; Full Hierarchy Name ; Entity Name ; Library Name ; ++-------------------------------------------+---------------------+---------------------------+-------------------+------------+------+--------------+--------------------------------------------------------------------------+------------------------+--------------+ +; |assignment2 ; 2018 (1142) ; 2302 (0) ; 0 ; 0 ; 41 ; 0 ; |assignment2 ; assignment2 ; work ; +; |alu:ALU| ; 100 (50) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; |assignment2|alu:ALU ; alu ; work ; +; |asu:adder_unit| ; 49 (49) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; |assignment2|alu:ALU|asu:adder_unit ; asu ; work ; +; |lu:logic_unit| ; 1 (1) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; |assignment2|alu:ALU|lu:logic_unit ; lu ; work ; +; |control_unit:CONTROL_UNIT| ; 9 (7) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; |assignment2|control_unit:CONTROL_UNIT ; control_unit ; work ; +; |instruction_classifier:CLASSIFIER| ; 2 (2) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; |assignment2|control_unit:CONTROL_UNIT|instruction_classifier:CLASSIFIER ; instruction_classifier ; work ; +; |instruction_counter:PC| ; 0 (0) ; 30 (30) ; 0 ; 0 ; 0 ; 0 ; |assignment2|instruction_counter:PC ; instruction_counter ; work ; +; |ram:RAM| ; 313 (313) ; 1280 (1280) ; 0 ; 0 ; 0 ; 0 ; |assignment2|ram:RAM ; ram ; work ; +; |register_file:REGS| ; 400 (400) ; 992 (992) ; 0 ; 0 ; 0 ; 0 ; |assignment2|register_file:REGS ; register_file ; work ; +; |rom:ROM| ; 26 (26) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; |assignment2|rom:ROM ; rom ; work ; +; |seven_seg_4digit:display| ; 28 (0) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; |assignment2|seven_seg_4digit:display ; seven_seg_4digit ; work ; +; |seven_seg:digit0| ; 7 (7) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; |assignment2|seven_seg_4digit:display|seven_seg:digit0 ; seven_seg ; work ; +; |seven_seg:digit1| ; 7 (7) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; |assignment2|seven_seg_4digit:display|seven_seg:digit1 ; seven_seg ; work ; +; |seven_seg:digit2| ; 7 (7) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; |assignment2|seven_seg_4digit:display|seven_seg:digit2 ; seven_seg ; work ; +; |seven_seg:digit3| ; 7 (7) ; 0 (0) ; 0 ; 0 ; 0 ; 0 ; |assignment2|seven_seg_4digit:display|seven_seg:digit3 ; seven_seg ; work ; ++-------------------------------------------+---------------------+---------------------------+-------------------+------------+------+--------------+--------------------------------------------------------------------------+------------------------+--------------+ Note: For table entries with two numbers listed, the numbers in parentheses indicate the number of resources of the given type used by the specific entity alone. The numbers listed outside of parentheses indicate the total resources of the given type used by the specific entity and all of its sub-entities in the hierarchy. -+----------------------------------------------------------------------------------------+ -; Registers Removed During Synthesis ; -+------------------------------------------+---------------------------------------------+ -; Register name ; Reason for Removal ; -+------------------------------------------+---------------------------------------------+ -; instruction_counter:PC|pc[0,1] ; Stuck at GND due to stuck port clock_enable ; -; register_file:REGS|regs[0][3] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[1][3] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[2][3] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[3][3] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[4][3] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[5][3] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[6][3] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[7][3] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[8][3] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[9][3] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[10][3] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[11][3] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[12][3] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[13][3] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[14][3] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[15][3] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[16][3] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[17][3] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[18][3] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[19][3] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[20][3] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[21][3] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[22][3] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[23][3] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[24][3] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[25][3] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[26][3] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[27][3] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[28][3] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[29][3] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[30][3] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[31][3] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[0][19] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[1][19] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[2][19] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[3][19] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[4][19] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[5][19] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[6][19] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[7][19] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[8][19] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[9][19] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[10][19] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[11][19] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[12][19] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[13][19] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[14][19] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[15][19] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[16][19] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[17][19] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[18][19] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[19][19] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[20][19] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[21][19] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[22][19] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[23][19] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[24][19] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[25][19] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[26][19] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[27][19] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[28][19] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[29][19] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[30][19] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[31][19] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[0][2] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[1][2] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[2][2] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[3][2] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[4][2] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[5][2] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[6][2] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[7][2] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[8][2] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[9][2] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[10][2] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[11][2] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[12][2] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[13][2] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[14][2] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[15][2] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[16][2] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[17][2] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[18][2] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[19][2] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[20][2] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[21][2] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[22][2] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[23][2] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[24][2] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[25][2] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[26][2] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[27][2] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[28][2] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[29][2] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[30][2] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[31][2] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[0][18] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[1][18] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[2][18] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[3][18] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[4][18] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[5][18] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[6][18] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[7][18] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[8][18] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[9][18] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[10][18] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[11][18] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[12][18] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[13][18] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[14][18] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[15][18] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[16][18] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[17][18] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[18][18] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[19][18] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[20][18] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[21][18] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[22][18] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[23][18] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[24][18] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[25][18] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[26][18] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[27][18] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[28][18] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[29][18] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[30][18] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[31][18] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[0][17] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[1][17] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[2][17] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[3][17] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[4][17] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[5][17] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[6][17] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[7][17] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[8][17] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[9][17] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[10][17] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[11][17] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[12][17] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[13][17] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[14][17] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[15][17] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[16][17] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[17][17] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[18][17] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[19][17] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[20][17] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[21][17] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[22][17] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[23][17] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[24][17] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[25][17] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[26][17] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[27][17] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[28][17] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[29][17] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[30][17] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[31][17] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[0][16] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[1][16] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[2][16] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[3][16] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[4][16] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[5][16] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[6][16] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[7][16] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[8][16] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[9][16] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[10][16] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[11][16] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[12][16] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[13][16] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[14][16] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[15][16] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[16][16] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[17][16] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[18][16] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[19][16] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[20][16] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[21][16] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[22][16] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[23][16] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[24][16] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[25][16] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[26][16] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[27][16] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[28][16] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[29][16] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[30][16] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[31][16] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[0][7] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[1][7] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[2][7] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[3][7] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[4][7] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[5][7] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[6][7] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[7][7] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[8][7] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[9][7] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[10][7] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[11][7] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[12][7] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[13][7] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[14][7] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[15][7] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[16][7] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[17][7] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[18][7] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[19][7] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[20][7] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[21][7] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[22][7] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[23][7] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[24][7] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[25][7] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[26][7] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[27][7] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[28][7] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[29][7] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[30][7] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[31][7] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[0][23] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[1][23] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[2][23] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[3][23] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[4][23] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[5][23] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[6][23] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[7][23] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[8][23] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[9][23] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[10][23] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[11][23] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[12][23] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[13][23] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[14][23] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[15][23] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[16][23] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[17][23] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[18][23] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[19][23] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[20][23] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[21][23] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[22][23] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[23][23] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[24][23] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[25][23] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[26][23] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[27][23] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[28][23] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[29][23] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[30][23] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[31][23] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[0][6] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[1][6] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[2][6] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[3][6] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[4][6] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[5][6] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[6][6] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[7][6] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[8][6] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[9][6] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[10][6] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[11][6] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[12][6] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[13][6] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[14][6] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[15][6] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[16][6] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[17][6] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[18][6] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[19][6] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[20][6] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[21][6] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[22][6] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[23][6] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[24][6] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[25][6] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[26][6] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[27][6] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[28][6] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[29][6] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[30][6] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[31][6] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[0][22] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[1][22] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[2][22] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[3][22] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[4][22] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[5][22] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[6][22] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[7][22] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[8][22] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[9][22] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[10][22] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[11][22] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[12][22] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[13][22] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[14][22] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[15][22] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[16][22] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[17][22] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[18][22] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[19][22] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[20][22] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[21][22] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[22][22] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[23][22] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[24][22] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[25][22] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[26][22] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[27][22] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[28][22] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[29][22] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[30][22] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[31][22] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[0][5] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[1][5] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[2][5] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[3][5] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[4][5] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[5][5] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[6][5] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[7][5] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[8][5] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[9][5] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[10][5] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[11][5] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[12][5] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[13][5] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[14][5] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[15][5] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[16][5] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[17][5] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[18][5] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[19][5] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[20][5] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[21][5] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[22][5] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[23][5] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[24][5] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[25][5] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[26][5] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[27][5] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[28][5] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[29][5] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[30][5] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[31][5] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[0][21] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[1][21] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[2][21] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[3][21] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[4][21] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[5][21] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[6][21] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[7][21] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[8][21] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[9][21] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[10][21] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[11][21] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[12][21] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[13][21] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[14][21] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[15][21] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[16][21] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[17][21] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[18][21] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[19][21] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[20][21] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[21][21] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[22][21] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[23][21] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[24][21] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[25][21] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[26][21] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[27][21] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[28][21] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[29][21] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[30][21] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[31][21] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[0][4] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[1][4] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[2][4] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[3][4] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[4][4] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[5][4] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[6][4] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[7][4] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[8][4] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[9][4] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[10][4] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[11][4] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[12][4] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[13][4] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[14][4] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[15][4] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[16][4] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[17][4] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[18][4] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[19][4] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[20][4] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[21][4] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[22][4] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[23][4] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[24][4] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[25][4] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[26][4] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[27][4] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[28][4] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[29][4] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[30][4] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[31][4] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[0][20] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[1][20] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[2][20] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[3][20] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[4][20] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[5][20] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[6][20] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[7][20] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[8][20] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[9][20] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[10][20] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[11][20] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[12][20] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[13][20] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[14][20] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[15][20] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[16][20] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[17][20] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[18][20] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[19][20] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[20][20] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[21][20] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[22][20] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[23][20] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[24][20] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[25][20] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[26][20] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[27][20] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[28][20] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[29][20] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[30][20] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[31][20] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[0][11] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[1][11] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[2][11] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[3][11] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[4][11] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[5][11] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[6][11] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[7][11] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[8][11] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[9][11] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[10][11] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[11][11] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[12][11] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[13][11] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[14][11] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[15][11] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[16][11] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[17][11] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[18][11] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[19][11] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[20][11] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[21][11] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[22][11] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[23][11] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[24][11] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[25][11] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[26][11] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[27][11] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[28][11] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[29][11] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[30][11] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[31][11] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[0][27] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[1][27] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[2][27] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[3][27] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[4][27] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[5][27] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[6][27] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[7][27] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[8][27] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[9][27] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[10][27] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[11][27] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[12][27] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[13][27] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[14][27] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[15][27] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[16][27] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[17][27] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[18][27] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[19][27] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[20][27] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[21][27] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[22][27] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[23][27] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[24][27] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[25][27] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[26][27] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[27][27] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[28][27] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[29][27] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[30][27] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[31][27] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[0][10] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[1][10] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[2][10] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[3][10] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[4][10] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[5][10] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[6][10] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[7][10] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[8][10] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[9][10] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[10][10] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[11][10] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[12][10] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[13][10] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[14][10] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[15][10] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[16][10] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[17][10] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[18][10] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[19][10] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[20][10] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[21][10] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[22][10] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[23][10] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[24][10] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[25][10] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[26][10] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[27][10] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[28][10] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[29][10] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[30][10] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[31][10] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[0][26] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[1][26] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[2][26] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[3][26] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[4][26] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[5][26] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[6][26] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[7][26] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[8][26] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[9][26] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[10][26] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[11][26] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[12][26] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[13][26] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[14][26] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[15][26] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[16][26] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[17][26] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[18][26] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[19][26] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[20][26] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[21][26] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[22][26] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[23][26] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[24][26] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[25][26] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[26][26] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[27][26] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[28][26] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[29][26] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[30][26] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[31][26] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[0][9] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[1][9] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[2][9] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[3][9] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[4][9] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[5][9] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[6][9] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[7][9] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[8][9] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[9][9] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[10][9] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[11][9] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[12][9] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[13][9] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[14][9] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[15][9] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[16][9] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[17][9] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[18][9] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[19][9] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[20][9] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[21][9] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[22][9] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[23][9] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[24][9] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[25][9] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[26][9] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[27][9] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[28][9] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[29][9] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[30][9] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[31][9] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[0][25] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[1][25] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[2][25] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[3][25] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[4][25] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[5][25] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[6][25] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[7][25] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[8][25] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[9][25] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[10][25] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[11][25] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[12][25] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[13][25] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[14][25] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[15][25] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[16][25] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[17][25] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[18][25] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[19][25] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[20][25] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[21][25] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[22][25] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[23][25] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[24][25] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[25][25] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[26][25] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[27][25] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[28][25] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[29][25] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[30][25] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[31][25] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[0][8] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[1][8] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[2][8] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[3][8] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[4][8] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[5][8] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[6][8] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[7][8] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[8][8] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[9][8] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[10][8] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[11][8] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[12][8] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[13][8] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[14][8] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[15][8] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[16][8] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[17][8] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[18][8] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[19][8] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[20][8] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[21][8] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[22][8] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[23][8] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[24][8] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[25][8] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[26][8] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[27][8] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[28][8] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[29][8] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[30][8] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[31][8] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[0][24] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[1][24] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[2][24] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[3][24] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[4][24] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[5][24] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[6][24] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[7][24] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[8][24] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[9][24] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[10][24] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[11][24] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[12][24] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[13][24] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[14][24] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[15][24] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[16][24] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[17][24] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[18][24] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[19][24] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[20][24] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[21][24] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[22][24] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[23][24] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[24][24] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[25][24] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[26][24] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[27][24] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[28][24] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[29][24] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[30][24] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[31][24] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[0][15] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[1][15] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[2][15] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[3][15] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[4][15] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[5][15] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[6][15] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[7][15] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[8][15] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[9][15] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[10][15] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[11][15] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[12][15] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[13][15] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[14][15] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[15][15] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[16][15] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[17][15] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[18][15] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[19][15] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[20][15] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[21][15] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[22][15] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[23][15] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[24][15] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[25][15] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[26][15] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[27][15] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[28][15] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[29][15] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[30][15] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[31][15] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[0][31] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[1][31] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[2][31] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[3][31] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[4][31] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[5][31] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[6][31] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[7][31] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[8][31] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[9][31] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[10][31] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[11][31] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[12][31] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[13][31] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[14][31] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[15][31] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[16][31] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[17][31] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[18][31] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[19][31] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[20][31] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[21][31] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[22][31] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[23][31] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[24][31] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[25][31] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[26][31] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[27][31] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[28][31] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[29][31] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[30][31] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[31][31] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[0][14] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[1][14] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[2][14] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[3][14] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[4][14] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[5][14] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[6][14] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[7][14] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[8][14] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[9][14] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[10][14] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[11][14] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[12][14] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[13][14] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[14][14] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[15][14] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[16][14] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[17][14] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[18][14] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[19][14] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[20][14] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[21][14] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[22][14] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[23][14] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[24][14] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[25][14] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[26][14] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[27][14] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[28][14] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[29][14] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[30][14] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[31][14] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[0][30] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[1][30] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[2][30] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[3][30] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[4][30] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[5][30] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[6][30] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[7][30] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[8][30] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[9][30] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[10][30] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[11][30] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[12][30] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[13][30] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[14][30] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[15][30] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[16][30] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[17][30] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[18][30] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[19][30] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[20][30] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[21][30] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[22][30] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[23][30] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[24][30] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[25][30] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[26][30] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[27][30] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[28][30] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[29][30] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[30][30] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[31][30] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[0][13] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[1][13] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[2][13] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[3][13] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[4][13] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[5][13] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[6][13] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[7][13] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[8][13] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[9][13] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[10][13] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[11][13] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[12][13] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[13][13] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[14][13] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[15][13] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[16][13] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[17][13] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[18][13] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[19][13] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[20][13] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[21][13] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[22][13] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[23][13] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[24][13] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[25][13] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[26][13] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[27][13] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[28][13] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[29][13] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[30][13] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[31][13] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[0][29] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[1][29] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[2][29] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[3][29] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[4][29] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[5][29] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[6][29] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[7][29] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[8][29] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[9][29] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[10][29] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[11][29] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[12][29] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[13][29] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[14][29] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[15][29] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[16][29] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[17][29] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[18][29] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[19][29] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[20][29] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[21][29] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[22][29] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[23][29] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[24][29] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[25][29] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[26][29] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[27][29] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[28][29] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[29][29] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[30][29] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[31][29] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[0][12] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[1][12] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[2][12] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[3][12] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[4][12] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[5][12] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[6][12] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[7][12] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[8][12] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[9][12] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[10][12] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[11][12] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[12][12] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[13][12] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[14][12] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[15][12] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[16][12] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[17][12] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[18][12] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[19][12] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[20][12] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[21][12] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[22][12] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[23][12] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[24][12] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[25][12] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[26][12] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[27][12] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[28][12] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[29][12] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[30][12] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[31][12] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[0][28] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[1][28] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[2][28] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[3][28] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[4][28] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[5][28] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[6][28] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[7][28] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[8][28] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[9][28] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[10][28] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[11][28] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[12][28] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[13][28] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[14][28] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[15][28] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[16][28] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[17][28] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[18][28] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[19][28] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[20][28] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[21][28] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[22][28] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[23][28] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[24][28] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[25][28] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[26][28] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[27][28] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[28][28] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[29][28] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[30][28] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[31][28] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[0][1] ; Stuck at GND due to stuck port clock_enable ; -; register_file:REGS|regs[16][1] ; Stuck at GND due to stuck port clock_enable ; -; register_file:REGS|regs[17][1] ; Stuck at GND due to stuck port clock_enable ; -; register_file:REGS|regs[18][1] ; Stuck at GND due to stuck port clock_enable ; -; register_file:REGS|regs[19][1] ; Stuck at GND due to stuck port clock_enable ; -; register_file:REGS|regs[20][1] ; Stuck at GND due to stuck port clock_enable ; -; register_file:REGS|regs[21][1] ; Stuck at GND due to stuck port clock_enable ; -; register_file:REGS|regs[22][1] ; Stuck at GND due to stuck port clock_enable ; -; register_file:REGS|regs[23][1] ; Stuck at GND due to stuck port clock_enable ; -; register_file:REGS|regs[24][1] ; Stuck at GND due to stuck port clock_enable ; -; register_file:REGS|regs[25][1] ; Stuck at GND due to stuck port clock_enable ; -; register_file:REGS|regs[26][1] ; Stuck at GND due to stuck port clock_enable ; -; register_file:REGS|regs[27][1] ; Stuck at GND due to stuck port clock_enable ; -; register_file:REGS|regs[28][1] ; Stuck at GND due to stuck port clock_enable ; -; register_file:REGS|regs[29][1] ; Stuck at GND due to stuck port clock_enable ; -; register_file:REGS|regs[30][1] ; Stuck at GND due to stuck port clock_enable ; -; register_file:REGS|regs[31][1] ; Stuck at GND due to stuck port clock_enable ; -; register_file:REGS|regs[0][0] ; Stuck at GND due to stuck port clock_enable ; -; register_file:REGS|regs[16][0] ; Stuck at GND due to stuck port clock_enable ; -; register_file:REGS|regs[17][0] ; Stuck at GND due to stuck port clock_enable ; -; register_file:REGS|regs[18][0] ; Stuck at GND due to stuck port clock_enable ; -; register_file:REGS|regs[19][0] ; Stuck at GND due to stuck port clock_enable ; -; register_file:REGS|regs[20][0] ; Stuck at GND due to stuck port clock_enable ; -; register_file:REGS|regs[21][0] ; Stuck at GND due to stuck port clock_enable ; -; register_file:REGS|regs[22][0] ; Stuck at GND due to stuck port clock_enable ; -; register_file:REGS|regs[23][0] ; Stuck at GND due to stuck port clock_enable ; -; register_file:REGS|regs[24][0] ; Stuck at GND due to stuck port clock_enable ; -; register_file:REGS|regs[25][0] ; Stuck at GND due to stuck port clock_enable ; -; register_file:REGS|regs[26][0] ; Stuck at GND due to stuck port clock_enable ; -; register_file:REGS|regs[27][0] ; Stuck at GND due to stuck port clock_enable ; -; register_file:REGS|regs[28][0] ; Stuck at GND due to stuck port clock_enable ; -; register_file:REGS|regs[29][0] ; Stuck at GND due to stuck port clock_enable ; -; register_file:REGS|regs[30][0] ; Stuck at GND due to stuck port clock_enable ; -; register_file:REGS|regs[31][0] ; Stuck at GND due to stuck port clock_enable ; -; register_file:REGS|regs[1][1] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[2][1] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[3][1] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[15][1] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[5][1] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[6][1] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[7][1] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[11][1] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[1][0] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[2][0] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[3][0] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[15][0] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[5][0] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[6][0] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[7][0] ; Stuck at GND due to stuck port data_in ; -; register_file:REGS|regs[11][0] ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~0 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~4 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~6 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~8 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~10 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~12 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~14 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~16 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~18 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~20 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~22 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~24 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~26 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~28 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~30 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~32 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~34 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~36 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~38 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~40 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~42 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~44 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~46 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~48 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~50 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~52 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~54 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~56 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~58 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~60 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~62 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~64 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~66 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~68 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~70 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~72 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~74 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~76 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~78 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~80 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~82 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~84 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~86 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~88 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~90 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~92 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~94 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~96 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~98 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~100 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~102 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~104 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~106 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~108 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~110 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~112 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~114 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~116 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~118 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~120 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~122 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~124 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~126 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~128 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~130 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~132 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~134 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~136 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~138 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~140 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~142 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~144 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~146 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~148 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~150 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~152 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~154 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~156 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~158 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~160 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~162 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~164 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~166 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~168 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~170 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~172 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~174 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~176 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~178 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~180 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~182 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~184 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~186 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~188 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~190 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~192 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~194 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~196 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~198 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~200 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~202 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~204 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~206 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~208 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~210 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~212 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~214 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~216 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~218 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~220 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~222 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~224 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~226 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~228 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~230 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~232 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~234 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~236 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~238 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~240 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~242 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~244 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~246 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~248 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~250 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~252 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~254 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~256 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~258 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~260 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~262 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~264 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~266 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~268 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~270 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~272 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~274 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~276 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~278 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~280 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~282 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~284 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~286 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~288 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~290 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~292 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~294 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~296 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~298 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~300 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~302 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~304 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~306 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~308 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~310 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~312 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~314 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~316 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~318 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~320 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~322 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~324 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~326 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~328 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~330 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~332 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~334 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~336 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~338 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~340 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~342 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~344 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~346 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~348 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~350 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~352 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~354 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~356 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~358 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~360 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~362 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~364 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~366 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~368 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~370 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~372 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~374 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~376 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~378 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~380 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~382 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~384 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~386 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~388 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~390 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~392 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~394 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~396 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~398 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~400 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~402 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~404 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~406 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~408 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~410 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~412 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~414 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~416 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~418 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~420 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~422 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~424 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~426 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~428 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~430 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~432 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~434 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~436 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~438 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~440 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~442 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~444 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~446 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~448 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~450 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~452 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~454 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~456 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~458 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~460 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~462 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~464 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~466 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~468 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~470 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~472 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~474 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~476 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~478 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~480 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~482 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~484 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~486 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~488 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~490 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~492 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~494 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~496 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~498 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~500 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~502 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~504 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~506 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~508 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~510 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~512 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~514 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~516 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~518 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~520 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~522 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~524 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~526 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~528 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~530 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~532 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~534 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~536 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~538 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~540 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~542 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~544 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~546 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~548 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~550 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~552 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~554 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~556 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~558 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~560 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~562 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~564 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~566 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~568 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~570 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~572 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~574 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~576 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~578 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~580 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~582 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~584 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~586 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~588 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~590 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~592 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~594 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~596 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~598 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~600 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~602 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~604 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~606 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~608 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~610 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~612 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~614 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~616 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~618 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~620 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~622 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~624 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~626 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~628 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~630 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~632 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~634 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~636 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~638 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~640 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~642 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~644 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~646 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~648 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~650 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~652 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~654 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~656 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~658 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~660 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~662 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~664 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~666 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~668 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~670 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~672 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~674 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~676 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~678 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~680 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~682 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~684 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~686 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~688 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~690 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~692 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~694 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~696 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~698 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~700 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~702 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~704 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~706 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~708 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~710 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~712 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~714 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~716 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~718 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~720 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~722 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~724 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~726 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~728 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~730 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~732 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~734 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~736 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~738 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~740 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~742 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~744 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~746 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~748 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~750 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~752 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~754 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~756 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~758 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~760 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~762 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~764 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~766 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~768 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~770 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~772 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~774 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~776 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~778 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~780 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~782 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~784 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~786 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~788 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~790 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~792 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~794 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~796 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~798 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~800 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~802 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~804 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~806 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~808 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~810 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~812 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~814 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~816 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~818 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~820 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~822 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~824 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~826 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~828 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~830 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~832 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~834 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~836 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~838 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~840 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~842 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~844 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~846 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~848 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~850 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~852 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~854 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~856 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~858 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~860 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~862 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~864 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~866 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~868 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~870 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~872 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~874 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~876 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~878 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~880 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~882 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~884 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~886 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~888 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~890 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~892 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~894 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~896 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~898 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~900 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~902 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~904 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~906 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~908 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~910 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~912 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~914 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~916 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~918 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~920 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~922 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~924 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~926 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~928 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~930 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~932 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~934 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~936 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~938 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~940 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~942 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~944 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~946 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~948 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~950 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~952 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~954 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~956 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~958 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~960 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~962 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~964 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~966 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~968 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~970 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~972 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~974 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~976 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~978 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~980 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~982 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~984 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~986 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~988 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~990 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~992 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~994 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~996 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~998 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1000 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1002 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1004 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1006 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1008 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1010 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1012 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1014 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1016 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1018 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1020 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1022 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1024 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1026 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1028 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1030 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1032 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1034 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1036 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1038 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1040 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1042 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1044 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1046 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1048 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1050 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1052 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1054 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1056 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1058 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1060 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1062 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1064 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1066 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1068 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1070 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1072 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1074 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1076 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1078 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1080 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1082 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1084 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1086 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1088 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1090 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1092 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1094 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1096 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1098 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1100 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1102 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1104 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1106 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1108 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1110 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1112 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1114 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1116 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1118 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1120 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1122 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1124 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1126 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1128 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1130 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1132 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1134 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1136 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1138 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1140 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1142 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1144 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1146 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1148 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1150 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1152 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1154 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1156 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1158 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1160 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1162 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1164 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1166 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1168 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1170 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1172 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1174 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1176 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1178 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1180 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1182 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1184 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1186 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1188 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1190 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1192 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1194 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1196 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1198 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1200 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1202 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1204 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1206 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1208 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1210 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1212 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1214 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1216 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1218 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1220 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1222 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1224 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1226 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1228 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1230 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1232 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1234 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1236 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1238 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1240 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1242 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1244 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1246 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1248 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1250 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1252 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1254 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1256 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1258 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1260 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1262 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1264 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1266 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1268 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1270 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1272 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1274 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1276 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1278 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1280 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1282 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1284 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1286 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1288 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1290 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1292 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1294 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1296 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1298 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1300 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1302 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1304 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1306 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1308 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1310 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1312 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1314 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1316 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1318 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1320 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1322 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1324 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1326 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1328 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1330 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1332 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1334 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1336 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1338 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1340 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1342 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1344 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1346 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1348 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1350 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1352 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1354 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1356 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1358 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1360 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1362 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1364 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1366 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1368 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1370 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1372 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1374 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1376 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1378 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1380 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1382 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1384 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1386 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1388 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1390 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1392 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1394 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1396 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1398 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1400 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1402 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1404 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1406 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1408 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1410 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1412 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1414 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1416 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1418 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1420 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1422 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1424 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1426 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1428 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1430 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1432 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1434 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1436 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1438 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1440 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1442 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1444 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1446 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1448 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1450 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1452 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1454 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1456 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1458 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1460 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1462 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1464 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1466 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1468 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1470 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1472 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1474 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1476 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1478 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1480 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1482 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1484 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1486 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1488 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1490 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1492 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1494 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1496 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1498 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1500 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1502 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1504 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1506 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1508 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1510 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1512 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1514 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1516 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1518 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1520 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1522 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1524 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1526 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1528 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1530 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1532 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1534 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1536 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1538 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1540 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1542 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1544 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1546 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1548 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1550 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1552 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1554 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1556 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1558 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1560 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1562 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1564 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1566 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1568 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1570 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1572 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1574 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1576 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1578 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1580 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1582 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1584 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1586 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1588 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1590 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1592 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1594 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1596 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1598 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1600 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1602 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1604 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1606 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1608 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1610 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1612 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1614 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1616 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1618 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1620 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1622 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1624 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1626 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1628 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1630 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1632 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1634 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1636 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1638 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1640 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1642 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1644 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1646 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1648 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1650 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1652 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1654 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1656 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1658 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1660 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1662 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1664 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1666 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1668 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1670 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1672 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1674 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1676 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1678 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1680 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1682 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1684 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1686 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1688 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1690 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1692 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1694 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1696 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1698 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1700 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1702 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1704 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1706 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1708 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1710 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1712 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1714 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1716 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1718 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1720 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1722 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1724 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1726 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1728 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1730 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1732 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1734 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1736 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1738 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1740 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1742 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1744 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1746 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1748 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1750 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1752 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1754 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1756 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1758 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1760 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1762 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1764 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1766 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1768 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1770 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1772 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1774 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1776 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1778 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1780 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1782 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1784 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1786 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1788 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1790 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1792 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1794 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1796 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1798 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1800 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1802 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1804 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1806 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1808 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1810 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1812 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1814 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1816 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1818 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1820 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1822 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1824 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1826 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1828 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1830 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1832 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1834 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1836 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1838 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1840 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1842 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1844 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1846 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1848 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1850 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1852 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1854 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1856 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1858 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1860 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1862 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1864 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1866 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1868 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1870 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1872 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1874 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1876 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1878 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1880 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1882 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1884 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1886 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1888 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1890 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1892 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1894 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1896 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1898 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1900 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1902 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1904 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1906 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1908 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1910 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1912 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1914 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1916 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1918 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1920 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1922 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1924 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1926 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1928 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1930 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1932 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1934 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1936 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1938 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1940 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1942 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1944 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1946 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1948 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1950 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1952 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1954 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1956 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1958 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1960 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1962 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1964 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1966 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1968 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1970 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1972 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1974 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1976 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1978 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1980 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1982 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1984 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1986 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1988 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1990 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1992 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1994 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1996 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1998 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2000 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2002 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2004 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2006 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2008 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2010 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2012 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2014 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2016 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2018 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2020 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2022 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2024 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2026 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2028 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2030 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2032 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2034 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2036 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2038 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2040 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2042 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2044 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2046 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2048 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2050 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2052 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2054 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2056 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2058 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2060 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2062 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2064 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2066 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2068 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2070 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2072 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2074 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2076 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2078 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2080 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2082 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2084 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2086 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2088 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2090 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2092 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2094 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2096 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2098 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2100 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2102 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2104 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2106 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2108 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2110 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2112 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2114 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2116 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2118 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2120 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2122 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2124 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2126 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2128 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2130 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2132 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2134 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2136 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2138 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2140 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2142 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2144 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2146 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2148 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2150 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2152 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2154 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2156 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2158 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2160 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2162 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2164 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2166 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2168 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2170 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2172 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2174 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2176 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2178 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2180 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2182 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2184 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2186 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2188 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2190 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2192 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2194 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2196 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2198 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2200 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2202 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2204 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2206 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2208 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2210 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2212 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2214 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2216 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2218 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2220 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2222 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2224 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2226 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2228 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2230 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2232 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2234 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2236 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2238 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2240 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2242 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2244 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2246 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2248 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2250 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2252 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2254 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2256 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2258 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2260 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2262 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2264 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2266 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2268 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2270 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2272 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2274 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2276 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2278 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2280 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2282 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2284 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2286 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2288 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2290 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2292 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2294 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2296 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2298 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2300 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2302 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2304 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2306 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2308 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2310 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2312 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2314 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2316 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2318 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2320 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2322 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2324 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2326 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2328 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2330 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2332 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2334 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2336 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2338 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2340 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2342 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2344 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2346 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2348 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2350 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2352 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2354 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2356 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2358 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2360 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2362 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2364 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2366 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2368 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2370 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2372 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2374 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2376 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2378 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2380 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2382 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2384 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2386 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2388 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2390 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2392 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2394 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2396 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2398 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2400 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2402 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2404 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2406 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2408 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2410 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2412 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2414 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2416 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2418 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2420 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2422 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2424 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2426 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2428 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2430 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2432 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2434 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2436 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2438 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2440 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2442 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2444 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2446 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2448 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2450 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2452 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2454 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2456 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2458 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2460 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2462 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2464 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2466 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2468 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2470 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2472 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2474 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2476 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2478 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2480 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2482 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2484 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2486 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2488 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2490 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2492 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2494 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2496 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2498 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2500 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2502 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2504 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2506 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2508 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2510 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2512 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2514 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2516 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2518 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2520 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2522 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2524 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2526 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2528 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2530 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2532 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2534 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2536 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2538 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2540 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2542 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2544 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2546 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2548 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2550 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2552 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2554 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2556 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2558 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2560 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2562 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2564 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2566 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2568 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2570 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2572 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2574 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2576 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2578 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2580 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2582 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2584 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2586 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2588 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2590 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2592 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2594 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2596 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2598 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2600 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2602 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2604 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2606 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2608 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2610 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2612 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2614 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2616 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2618 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2620 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2622 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2624 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2626 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2628 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2630 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2632 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2634 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2636 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2638 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2640 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2642 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2644 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2646 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2648 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2650 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2652 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2654 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2656 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2658 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2660 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2662 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2664 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2666 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2668 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2670 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2672 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2674 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2676 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2678 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2680 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2682 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2684 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2686 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2688 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2690 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2692 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2694 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2696 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2698 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2700 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2702 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2704 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2706 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2708 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2710 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2712 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2714 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2716 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2718 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2720 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2722 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2724 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2726 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2728 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2730 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2732 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2734 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2736 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2738 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2740 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2742 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2744 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2746 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2748 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2750 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2752 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2754 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2756 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2758 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2760 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2762 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2764 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2766 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2768 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2770 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2772 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2774 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2776 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2778 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2780 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2782 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2784 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2786 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2788 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2790 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2792 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2794 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2796 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2798 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2800 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2802 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2804 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2806 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2808 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2810 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2812 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2814 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2816 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2818 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2820 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2822 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2824 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2826 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2828 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2830 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2832 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2834 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2836 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2838 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2840 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2842 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2844 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2846 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2848 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2850 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2852 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2854 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2856 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2858 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2860 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2862 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2864 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2866 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2868 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2870 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2872 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2874 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2876 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2878 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2880 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2882 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2884 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2886 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2888 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2890 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2892 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2894 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2896 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2898 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2900 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2902 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2904 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2906 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2908 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2910 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2912 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2914 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2916 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2918 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2920 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2922 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2924 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2926 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2928 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2930 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2932 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2934 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2936 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2938 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2940 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2942 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2944 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2946 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2948 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2950 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2952 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2954 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2956 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2958 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2960 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2962 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2964 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2966 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2968 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2970 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2972 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2974 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2976 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2978 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2980 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2982 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2984 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2986 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2988 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2990 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2992 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2994 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2996 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2998 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3000 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3002 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3004 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3006 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3008 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3010 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3012 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3014 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3016 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3018 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3020 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3022 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3024 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3026 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3028 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3030 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3032 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3034 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3036 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3038 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3040 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3042 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3044 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3046 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3048 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3050 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3052 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3054 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3056 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3058 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3060 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3062 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3064 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3066 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3068 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3070 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3072 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3074 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3076 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3078 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3080 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3082 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3084 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3086 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3088 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3090 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3092 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3094 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3096 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3098 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3100 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3102 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3104 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3106 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3108 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3110 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3112 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3114 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3116 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3118 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3120 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3122 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3124 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3126 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3128 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3130 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3132 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3134 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3136 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3138 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3140 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3142 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3144 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3146 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3148 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3150 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3152 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3154 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3156 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3158 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3160 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3162 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3164 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3166 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3168 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3170 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3172 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3174 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3176 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3178 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3180 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3182 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3184 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3186 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3188 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3190 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3192 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3194 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3196 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3198 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3200 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3202 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3204 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3206 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3208 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3210 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3212 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3214 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3216 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3218 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3220 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3222 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3224 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3226 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3228 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3230 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3232 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3234 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3236 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3238 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3240 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3242 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3244 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3246 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3248 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3250 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3252 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3254 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3256 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3258 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3260 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3262 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3264 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3266 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3268 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3270 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3272 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3274 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3276 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3278 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3280 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3282 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3284 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3286 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3288 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3290 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3292 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3294 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3296 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3298 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3300 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3302 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3304 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3306 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3308 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3310 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3312 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3314 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3316 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3318 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3320 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3322 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3324 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3326 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3328 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3330 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3332 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3334 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3336 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3338 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3340 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3342 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3344 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3346 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3348 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3350 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3352 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3354 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3356 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3358 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3360 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3362 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3364 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3366 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3368 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3370 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3372 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3374 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3376 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3378 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3380 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3382 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3384 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3386 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3388 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3390 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3392 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3394 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3396 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3398 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3400 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3402 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3404 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3406 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3408 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3410 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3412 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3414 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3416 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3418 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3420 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3422 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3424 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3426 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3428 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3430 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3432 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3434 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3436 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3438 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3440 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3442 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3444 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3446 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3448 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3450 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3452 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3454 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3456 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3458 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3460 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3462 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3464 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3466 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3468 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3470 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3472 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3474 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3476 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3478 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3480 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3482 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3484 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3486 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3488 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3490 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3492 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3494 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3496 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3498 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3500 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3502 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3504 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3506 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3508 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3510 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3512 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3514 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3516 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3518 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3520 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3522 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3524 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3526 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3528 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3530 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3532 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3534 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3536 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3538 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3540 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3542 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3544 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3546 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3548 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3550 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3552 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3554 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3556 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3558 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3560 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3562 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3564 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3566 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3568 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3570 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3572 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3574 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3576 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3578 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3580 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3582 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3584 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3586 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3588 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3590 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3592 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3594 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3596 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3598 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3600 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3602 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3604 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3606 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3608 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3610 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3612 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3614 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3616 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3618 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3620 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3622 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3624 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3626 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3628 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3630 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3632 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3634 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3636 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3638 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3640 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3642 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3644 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3646 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3648 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3650 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3652 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3654 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3656 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3658 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3660 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3662 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3664 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3666 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3668 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3670 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3672 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3674 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3676 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3678 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3680 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3682 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3684 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3686 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3688 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3690 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3692 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3694 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3696 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3698 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3700 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3702 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3704 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3706 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3708 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3710 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3712 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3714 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3716 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3718 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3720 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3722 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3724 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3726 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3728 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3730 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3732 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3734 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3736 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3738 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3740 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3742 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3744 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3746 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3748 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3750 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3752 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3754 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3756 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3758 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3760 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3762 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3764 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3766 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3768 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3770 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3772 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3774 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3776 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3778 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3780 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3782 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3784 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3786 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3788 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3790 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3792 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3794 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3796 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3798 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3800 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3802 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3804 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3806 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3808 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3810 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3812 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3814 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3816 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3818 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3820 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3822 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3824 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3826 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3828 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3830 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3832 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3834 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3836 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3838 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3840 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3842 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3844 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3846 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3848 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3850 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3852 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3854 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3856 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3858 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3860 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3862 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3864 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3866 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3868 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3870 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3872 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3874 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3876 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3878 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3880 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3882 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3884 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3886 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3888 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3890 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3892 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3894 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3896 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3898 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3900 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3902 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3904 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3906 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3908 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3910 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3912 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3914 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3916 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3918 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3920 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3922 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3924 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3926 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3928 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3930 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3932 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3934 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3936 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3938 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3940 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3942 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3944 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3946 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3948 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3950 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3952 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3954 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3956 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3958 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3960 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3962 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3964 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3966 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3968 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3970 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3972 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3974 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3976 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3978 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3980 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3982 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3984 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3986 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3988 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3990 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3992 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3994 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3996 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3998 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~4000 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~4002 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~4004 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~4006 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~4008 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~4010 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~4012 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~4014 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~4016 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~4018 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~4020 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~4022 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~4024 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~4026 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~4028 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~4030 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~4032 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~4034 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~4036 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~4038 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~4040 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~4042 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~4044 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~4046 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~4048 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~4050 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~4052 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~4054 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~4056 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~4058 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~4060 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~4062 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~4064 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~4066 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~4068 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~4070 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~4072 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~4074 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~4076 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~4078 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~4080 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~4082 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~4084 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~4086 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~4088 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~4090 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~4092 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~4094 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~5 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~7 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~9 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~11 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~13 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~15 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~17 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~19 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~21 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~23 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~25 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~27 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~29 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~31 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~33 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~35 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~37 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~39 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~41 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~43 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~45 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~47 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~49 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~51 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~53 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~55 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~57 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~59 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~61 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~63 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~65 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~67 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~69 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~71 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~73 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~75 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~77 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~79 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~81 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~83 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~85 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~87 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~89 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~91 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~93 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~95 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~97 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~99 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~101 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~103 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~105 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~107 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~109 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~111 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~113 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~115 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~117 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~119 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~121 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~123 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~125 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~127 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~129 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~131 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~133 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~135 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~137 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~139 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~141 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~143 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~145 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~147 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~149 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~151 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~153 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~155 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~157 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~159 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~161 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~163 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~165 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~167 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~169 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~171 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~173 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~175 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~177 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~179 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~181 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~183 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~185 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~187 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~189 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~191 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~193 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~195 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~197 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~199 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~201 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~203 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~205 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~207 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~209 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~211 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~213 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~215 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~217 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~219 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~221 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~223 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~225 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~227 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~229 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~231 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~233 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~235 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~237 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~239 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~241 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~243 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~245 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~247 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~249 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~251 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~253 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~255 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~257 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~259 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~261 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~263 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~265 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~267 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~269 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~271 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~273 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~275 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~277 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~279 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~281 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~283 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~285 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~287 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~289 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~291 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~293 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~295 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~297 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~299 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~301 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~303 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~305 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~307 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~309 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~311 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~313 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~315 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~317 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~319 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~321 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~323 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~325 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~327 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~329 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~331 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~333 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~335 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~337 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~339 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~341 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~343 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~345 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~347 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~349 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~351 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~353 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~355 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~357 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~359 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~361 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~363 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~365 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~367 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~369 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~371 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~373 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~375 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~377 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~379 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~381 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~383 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~385 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~387 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~389 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~391 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~393 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~395 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~397 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~399 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~401 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~403 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~405 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~407 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~409 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~411 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~413 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~415 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~417 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~419 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~421 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~423 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~425 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~427 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~429 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~431 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~433 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~435 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~437 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~439 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~441 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~443 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~445 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~447 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~449 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~451 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~453 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~455 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~457 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~459 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~461 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~463 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~465 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~467 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~469 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~471 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~473 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~475 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~477 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~479 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~481 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~483 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~485 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~487 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~489 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~491 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~493 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~495 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~497 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~499 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~501 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~503 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~505 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~507 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~509 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~511 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~513 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~515 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~517 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~519 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~521 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~523 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~525 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~527 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~529 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~531 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~533 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~535 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~537 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~539 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~541 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~543 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~545 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~547 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~549 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~551 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~553 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~555 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~557 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~559 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~561 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~563 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~565 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~567 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~569 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~571 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~573 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~575 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~577 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~579 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~581 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~583 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~585 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~587 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~589 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~591 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~593 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~595 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~597 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~599 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~601 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~603 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~605 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~607 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~609 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~611 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~613 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~615 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~617 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~619 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~621 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~623 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~625 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~627 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~629 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~631 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~633 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~635 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~637 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~639 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~641 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~643 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~645 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~647 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~649 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~651 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~653 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~655 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~657 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~659 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~661 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~663 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~665 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~667 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~669 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~671 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~673 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~675 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~677 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~679 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~681 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~683 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~685 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~687 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~689 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~691 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~693 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~695 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~697 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~699 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~701 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~703 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~705 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~707 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~709 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~711 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~713 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~715 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~717 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~719 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~721 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~723 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~725 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~727 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~729 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~731 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~733 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~735 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~737 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~739 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~741 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~743 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~745 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~747 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~749 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~751 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~753 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~755 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~757 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~759 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~761 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~763 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~765 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~767 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~769 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~771 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~773 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~775 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~777 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~779 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~781 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~783 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~785 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~787 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~789 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~791 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~793 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~795 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~797 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~799 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~801 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~803 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~805 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~807 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~809 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~811 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~813 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~815 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~817 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~819 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~821 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~823 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~825 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~827 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~829 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~831 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~833 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~835 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~837 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~839 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~841 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~843 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~845 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~847 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~849 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~851 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~853 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~855 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~857 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~859 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~861 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~863 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~865 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~867 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~869 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~871 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~873 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~875 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~877 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~879 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~881 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~883 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~885 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~887 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~889 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~891 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~893 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~895 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~897 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~899 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~901 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~903 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~905 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~907 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~909 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~911 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~913 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~915 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~917 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~919 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~921 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~923 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~925 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~927 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~929 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~931 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~933 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~935 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~937 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~939 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~941 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~943 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~945 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~947 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~949 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~951 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~953 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~955 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~957 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~959 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~961 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~963 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~965 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~967 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~969 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~971 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~973 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~975 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~977 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~979 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~981 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~983 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~985 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~987 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~989 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~991 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~993 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~995 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~997 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~999 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1001 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1003 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1005 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1007 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1009 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1011 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1013 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1015 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1017 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1019 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1021 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1023 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1025 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1027 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1029 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1031 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1033 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1035 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1037 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1039 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1041 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1043 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1045 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1047 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1049 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1051 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1053 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1055 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1057 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1059 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1061 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1063 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1065 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1067 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1069 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1071 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1073 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1075 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1077 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1079 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1081 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1083 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1085 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1087 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1089 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1091 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1093 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1095 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1097 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1099 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1101 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1103 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1105 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1107 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1109 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1111 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1113 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1115 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1117 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1119 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1121 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1123 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1125 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1127 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1129 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1131 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1133 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1135 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1137 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1139 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1141 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1143 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1145 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1147 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1149 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1151 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1153 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1155 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1157 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1159 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1161 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1163 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1165 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1167 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1169 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1171 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1173 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1175 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1177 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1179 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1181 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1183 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1185 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1187 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1189 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1191 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1193 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1195 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1197 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1199 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1201 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1203 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1205 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1207 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1209 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1211 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1213 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1215 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1217 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1219 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1221 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1223 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1225 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1227 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1229 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1231 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1233 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1235 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1237 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1239 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1241 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1243 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1245 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1247 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1249 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1251 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1253 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1255 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1257 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1259 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1261 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1263 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1265 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1267 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1269 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1271 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1273 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1275 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1277 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1279 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1281 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1283 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1285 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1287 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1289 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1291 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1293 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1295 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1297 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1299 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1301 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1303 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1305 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1307 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1309 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1311 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1313 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1315 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1317 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1319 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1321 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1323 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1325 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1327 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1329 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1331 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1333 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1335 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1337 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1339 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1341 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1343 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1345 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1347 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1349 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1351 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1353 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1355 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1357 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1359 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1361 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1363 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1365 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1367 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1369 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1371 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1373 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1375 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1377 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1379 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1381 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1383 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1385 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1387 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1389 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1391 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1393 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1395 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1397 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1399 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1401 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1403 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1405 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1407 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1409 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1411 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1413 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1415 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1417 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1419 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1421 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1423 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1425 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1427 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1429 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1431 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1433 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1435 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1437 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1439 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1441 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1443 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1445 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1447 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1449 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1451 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1453 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1455 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1457 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1459 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1461 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1463 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1465 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1467 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1469 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1471 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1473 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1475 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1477 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1479 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1481 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1483 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1485 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1487 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1489 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1491 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1493 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1495 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1497 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1499 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1501 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1503 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1505 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1507 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1509 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1511 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1513 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1515 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1517 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1519 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1521 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1523 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1525 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1527 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1529 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1531 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1533 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1535 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1537 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1539 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1541 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1543 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1545 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1547 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1549 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1551 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1553 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1555 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1557 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1559 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1561 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1563 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1565 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1567 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1569 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1571 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1573 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1575 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1577 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1579 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1581 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1583 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1585 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1587 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1589 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1591 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1593 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1595 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1597 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1599 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1601 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1603 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1605 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1607 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1609 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1611 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1613 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1615 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1617 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1619 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1621 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1623 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1625 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1627 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1629 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1631 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1633 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1635 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1637 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1639 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1641 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1643 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1645 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1647 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1649 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1651 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1653 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1655 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1657 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1659 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1661 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1663 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1665 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1667 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1669 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1671 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1673 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1675 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1677 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1679 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1681 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1683 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1685 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1687 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1689 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1691 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1693 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1695 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1697 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1699 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1701 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1703 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1705 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1707 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1709 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1711 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1713 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1715 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1717 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1719 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1721 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1723 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1725 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1727 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1729 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1731 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1733 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1735 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1737 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1739 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1741 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1743 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1745 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1747 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1749 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1751 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1753 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1755 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1757 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1759 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1761 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1763 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1765 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1767 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1769 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1771 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1773 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1775 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1777 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1779 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1781 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1783 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1785 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1787 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1789 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1791 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1793 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1795 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1797 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1799 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1801 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1803 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1805 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1807 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1809 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1811 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1813 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1815 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1817 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1819 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1821 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1823 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1825 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1827 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1829 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1831 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1833 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1835 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1837 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1839 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1841 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1843 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1845 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1847 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1849 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1851 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1853 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1855 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1857 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1859 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1861 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1863 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1865 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1867 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1869 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1871 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1873 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1875 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1877 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1879 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1881 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1883 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1885 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1887 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1889 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1891 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1893 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1895 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1897 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1899 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1901 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1903 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1905 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1907 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1909 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1911 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1913 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1915 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1917 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1919 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1921 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1923 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1925 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1927 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1929 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1931 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1933 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1935 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1937 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1939 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1941 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1943 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1945 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1947 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1949 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1951 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1953 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1955 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1957 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1959 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1961 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1963 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1965 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1967 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1969 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1971 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1973 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1975 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1977 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1979 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1981 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1983 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1985 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1987 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1989 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1991 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1993 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1995 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1997 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~1999 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2001 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2003 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2005 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2007 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2009 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2011 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2013 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2015 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2017 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2019 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2021 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2023 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2025 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2027 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2029 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2031 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2033 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2035 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2037 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2039 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2041 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2043 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2045 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2047 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2049 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2051 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2053 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2055 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2057 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2059 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2061 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2063 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2065 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2067 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2069 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2071 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2073 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2075 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2077 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2079 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2081 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2083 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2085 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2087 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2089 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2091 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2093 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2095 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2097 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2099 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2101 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2103 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2105 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2107 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2109 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2111 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2113 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2115 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2117 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2119 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2121 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2123 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2125 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2127 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2129 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2131 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2133 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2135 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2137 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2139 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2141 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2143 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2145 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2147 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2149 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2151 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2153 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2155 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2157 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2159 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2161 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2163 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2165 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2167 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2169 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2171 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2173 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2175 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2177 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2179 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2181 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2183 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2185 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2187 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2189 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2191 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2193 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2195 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2197 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2199 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2201 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2203 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2205 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2207 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2209 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2211 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2213 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2215 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2217 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2219 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2221 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2223 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2225 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2227 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2229 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2231 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2233 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2235 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2237 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2239 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2241 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2243 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2245 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2247 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2249 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2251 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2253 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2255 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2257 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2259 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2261 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2263 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2265 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2267 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2269 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2271 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2273 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2275 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2277 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2279 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2281 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2283 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2285 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2287 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2289 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2291 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2293 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2295 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2297 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2299 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2301 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2303 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2305 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2307 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2309 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2311 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2313 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2315 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2317 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2319 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2321 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2323 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2325 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2327 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2329 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2331 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2333 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2335 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2337 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2339 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2341 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2343 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2345 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2347 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2349 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2351 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2353 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2355 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2357 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2359 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2361 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2363 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2365 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2367 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2369 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2371 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2373 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2375 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2377 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2379 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2381 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2383 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2385 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2387 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2389 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2391 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2393 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2395 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2397 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2399 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2401 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2403 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2405 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2407 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2409 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2411 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2413 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2415 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2417 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2419 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2421 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2423 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2425 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2427 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2429 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2431 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2433 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2435 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2437 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2439 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2441 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2443 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2445 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2447 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2449 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2451 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2453 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2455 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2457 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2459 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2461 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2463 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2465 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2467 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2469 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2471 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2473 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2475 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2477 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2479 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2481 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2483 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2485 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2487 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2489 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2491 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2493 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2495 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2497 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2499 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2501 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2503 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2505 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2507 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2509 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2511 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2513 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2515 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2517 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2519 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2521 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2523 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2525 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2527 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2529 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2531 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2533 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2535 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2537 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2539 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2541 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2543 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2545 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2547 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2549 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2551 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2553 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2555 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2557 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2559 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2561 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2563 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2565 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2567 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2569 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2571 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2573 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2575 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2577 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2579 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2581 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2583 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2585 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2587 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2589 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2591 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2593 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2595 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2597 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2599 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2601 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2603 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2605 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2607 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2609 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2611 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2613 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2615 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2617 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2619 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2621 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2623 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2625 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2627 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2629 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2631 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2633 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2635 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2637 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2639 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2641 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2643 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2645 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2647 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2649 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2651 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2653 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2655 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2657 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2659 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2661 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2663 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2665 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2667 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2669 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2671 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2673 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2675 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2677 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2679 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2681 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2683 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2685 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2687 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2689 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2691 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2693 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2695 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2697 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2699 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2701 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2703 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2705 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2707 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2709 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2711 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2713 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2715 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2717 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2719 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2721 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2723 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2725 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2727 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2729 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2731 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2733 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2735 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2737 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2739 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2741 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2743 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2745 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2747 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2749 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2751 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2753 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2755 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2757 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2759 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2761 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2763 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2765 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2767 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2769 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2771 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2773 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2775 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2777 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2779 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2781 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2783 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2785 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2787 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2789 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2791 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2793 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2795 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2797 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2799 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2801 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2803 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2805 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2807 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2809 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2811 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2813 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2815 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2817 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2819 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2821 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2823 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2825 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2827 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2829 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2831 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2833 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2835 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2837 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2839 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2841 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2843 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2845 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2847 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2849 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2851 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2853 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2855 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2857 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2859 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2861 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2863 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2865 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2867 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2869 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2871 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2873 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2875 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2877 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2879 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2881 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2883 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2885 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2887 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2889 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2891 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2893 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2895 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2897 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2899 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2901 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2903 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2905 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2907 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2909 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2911 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2913 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2915 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2917 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2919 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2921 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2923 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2925 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2927 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2929 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2931 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2933 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2935 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2937 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2939 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2941 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2943 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2945 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2947 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2949 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2951 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2953 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2955 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2957 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2959 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2961 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2963 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2965 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2967 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2969 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2971 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2973 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2975 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2977 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2979 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2981 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2983 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2985 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2987 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2989 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2991 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2993 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2995 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2997 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~2999 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3001 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3003 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3005 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3007 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3009 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3011 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3013 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3015 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3017 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3019 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3021 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3023 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3025 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3027 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3029 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3031 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3033 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3035 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3037 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3039 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3041 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3043 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3045 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3047 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3049 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3051 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3053 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3055 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3057 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3059 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3061 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3063 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3065 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3067 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3069 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3071 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3073 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3075 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3077 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3079 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3081 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3083 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3085 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3087 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3089 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3091 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3093 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3095 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3097 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3099 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3101 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3103 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3105 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3107 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3109 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3111 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3113 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3115 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3117 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3119 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3121 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3123 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3125 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3127 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3129 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3131 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3133 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3135 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3137 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3139 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3141 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3143 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3145 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3147 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3149 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3151 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3153 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3155 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3157 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3159 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3161 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3163 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3165 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3167 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3169 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3171 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3173 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3175 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3177 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3179 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3181 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3183 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3185 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3187 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3189 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3191 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3193 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3195 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3197 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3199 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3201 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3203 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3205 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3207 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3209 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3211 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3213 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3215 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3217 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3219 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3221 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3223 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3225 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3227 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3229 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3231 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3233 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3235 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3237 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3239 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3241 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3243 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3245 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3247 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3249 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3251 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3253 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3255 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3257 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3259 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3261 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3263 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3265 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3267 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3269 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3271 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3273 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3275 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3277 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3279 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3281 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3283 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3285 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3287 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3289 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3291 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3293 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3295 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3297 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3299 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3301 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3303 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3305 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3307 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3309 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3311 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3313 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3315 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3317 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3319 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3321 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3323 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3325 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3327 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3329 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3331 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3333 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3335 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3337 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3339 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3341 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3343 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3345 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3347 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3349 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3351 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3353 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3355 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3357 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3359 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3361 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3363 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3365 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3367 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3369 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3371 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3373 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3375 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3377 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3379 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3381 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3383 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3385 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3387 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3389 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3391 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3393 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3395 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3397 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3399 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3401 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3403 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3405 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3407 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3409 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3411 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3413 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3415 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3417 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3419 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3421 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3423 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3425 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3427 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3429 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3431 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3433 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3435 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3437 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3439 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3441 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3443 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3445 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3447 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3449 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3451 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3453 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3455 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3457 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3459 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3461 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3463 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3465 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3467 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3469 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3471 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3473 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3475 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3477 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3479 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3481 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3483 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3485 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3487 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3489 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3491 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3493 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3495 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3497 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3499 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3501 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3503 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3505 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3507 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3509 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3511 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3513 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3515 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3517 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3519 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3521 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3523 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3525 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3527 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3529 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3531 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3533 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3535 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3537 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3539 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3541 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3543 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3545 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3547 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3549 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3551 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3553 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3555 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3557 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3559 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3561 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3563 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3565 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3567 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3569 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3571 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3573 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3575 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3577 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3579 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3581 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3583 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3585 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3587 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3589 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3591 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3593 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3595 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3597 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3599 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3601 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3603 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3605 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3607 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3609 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3611 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3613 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3615 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3617 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3619 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3621 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3623 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3625 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3627 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3629 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3631 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3633 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3635 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3637 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3639 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3641 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3643 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3645 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3647 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3649 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3651 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3653 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3655 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3657 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3659 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3661 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3663 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3665 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3667 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3669 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3671 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3673 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3675 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3677 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3679 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3681 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3683 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3685 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3687 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3689 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3691 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3693 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3695 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3697 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3699 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3701 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3703 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3705 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3707 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3709 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3711 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3713 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3715 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3717 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3719 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3721 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3723 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3725 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3727 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3729 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3731 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3733 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3735 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3737 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3739 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3741 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3743 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3745 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3747 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3749 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3751 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3753 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3755 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3757 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3759 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3761 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3763 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3765 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3767 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3769 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3771 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3773 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3775 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3777 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3779 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3781 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3783 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3785 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3787 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3789 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3791 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3793 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3795 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3797 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3799 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3801 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3803 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3805 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3807 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3809 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3811 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3813 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3815 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3817 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3819 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3821 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3823 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3825 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3827 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3829 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3831 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3833 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3835 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3837 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3839 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3841 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3843 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3845 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3847 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3849 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3851 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3853 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3855 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3857 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3859 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3861 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3863 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3865 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3867 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3869 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3871 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3873 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3875 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3877 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3879 ; Stuck at GND due to stuck port data_in ; -; ram:RAM|mem~3881 ; Stuck at GND due to stuck port data_in ; -; Total Number of Removed Registers = 5152 ; ; -+------------------------------------------+---------------------------------------------+ -* Table truncated at 5000 items. To change the number of removed registers reported, set the "Number of Removed Registers Reported" option under Assignments->Settings->Analysis and Synthesis Settings->More Settings - - -+-----------------------------------------------------------------------------------------------------------------------------------+ -; Removed Registers Triggering Further Register Optimizations ; -+------------------------------+--------------------------------+-------------------------------------------------------------------+ -; Register name ; Reason for Removal ; Registers Removed due to This Register ; -+------------------------------+--------------------------------+-------------------------------------------------------------------+ -; instruction_counter:PC|pc[0] ; Stuck at GND ; register_file:REGS|regs[0][3], register_file:REGS|regs[1][3], ; -; ; due to stuck port clock_enable ; register_file:REGS|regs[2][3], register_file:REGS|regs[3][3], ; -; ; ; register_file:REGS|regs[4][3], register_file:REGS|regs[5][3], ; -; ; ; register_file:REGS|regs[6][3], register_file:REGS|regs[7][3], ; -; ; ; register_file:REGS|regs[8][3], register_file:REGS|regs[9][3], ; -; ; ; register_file:REGS|regs[10][3], register_file:REGS|regs[11][3], ; -; ; ; register_file:REGS|regs[12][3], register_file:REGS|regs[13][3], ; -; ; ; register_file:REGS|regs[14][3], register_file:REGS|regs[15][3], ; -; ; ; register_file:REGS|regs[16][3], register_file:REGS|regs[17][3], ; -; ; ; register_file:REGS|regs[18][3], register_file:REGS|regs[19][3], ; -; ; ; register_file:REGS|regs[20][3], register_file:REGS|regs[21][3], ; -; ; ; register_file:REGS|regs[22][3], register_file:REGS|regs[23][3], ; -; ; ; register_file:REGS|regs[24][3], register_file:REGS|regs[25][3], ; -; ; ; register_file:REGS|regs[26][3], register_file:REGS|regs[27][3], ; -; ; ; register_file:REGS|regs[28][3], register_file:REGS|regs[29][3], ; -; ; ; register_file:REGS|regs[30][3], register_file:REGS|regs[31][3], ; -; ; ; register_file:REGS|regs[0][19], register_file:REGS|regs[1][19], ; -; ; ; register_file:REGS|regs[2][19], register_file:REGS|regs[3][19], ; -; ; ; register_file:REGS|regs[4][19], register_file:REGS|regs[5][19], ; -; ; ; register_file:REGS|regs[6][19], register_file:REGS|regs[7][19], ; -; ; ; register_file:REGS|regs[8][19], register_file:REGS|regs[9][19], ; -; ; ; register_file:REGS|regs[10][19], register_file:REGS|regs[11][19], ; -; ; ; register_file:REGS|regs[12][19], register_file:REGS|regs[13][19], ; -; ; ; register_file:REGS|regs[14][19], register_file:REGS|regs[15][19], ; -; ; ; register_file:REGS|regs[16][19], register_file:REGS|regs[17][19], ; -; ; ; register_file:REGS|regs[18][19], register_file:REGS|regs[19][19], ; -; ; ; register_file:REGS|regs[20][19], register_file:REGS|regs[21][19], ; -; ; ; register_file:REGS|regs[22][19], register_file:REGS|regs[23][19], ; -; ; ; register_file:REGS|regs[24][19], register_file:REGS|regs[25][19], ; -; ; ; register_file:REGS|regs[26][19], register_file:REGS|regs[27][19], ; -; ; ; register_file:REGS|regs[28][19], register_file:REGS|regs[29][19], ; -; ; ; register_file:REGS|regs[30][19], register_file:REGS|regs[31][19], ; -; ; ; register_file:REGS|regs[0][2], register_file:REGS|regs[1][2], ; -; ; ; register_file:REGS|regs[2][2], register_file:REGS|regs[3][2], ; -; ; ; register_file:REGS|regs[4][2], register_file:REGS|regs[5][2], ; -; ; ; register_file:REGS|regs[6][2], register_file:REGS|regs[7][2], ; -; ; ; register_file:REGS|regs[8][2], register_file:REGS|regs[9][2], ; -; ; ; register_file:REGS|regs[10][2], register_file:REGS|regs[11][2], ; -; ; ; register_file:REGS|regs[12][2], register_file:REGS|regs[13][2], ; -; ; ; register_file:REGS|regs[14][2], register_file:REGS|regs[15][2], ; -; ; ; register_file:REGS|regs[16][2], register_file:REGS|regs[17][2], ; -; ; ; register_file:REGS|regs[18][2], register_file:REGS|regs[19][2], ; -; ; ; register_file:REGS|regs[20][2], register_file:REGS|regs[21][2], ; -; ; ; register_file:REGS|regs[22][2], register_file:REGS|regs[23][2], ; -; ; ; register_file:REGS|regs[24][2], register_file:REGS|regs[25][2], ; -; ; ; register_file:REGS|regs[26][2], register_file:REGS|regs[27][2], ; -; ; ; register_file:REGS|regs[28][2], register_file:REGS|regs[29][2], ; -; ; ; register_file:REGS|regs[30][2], register_file:REGS|regs[31][2], ; -; ; ; register_file:REGS|regs[0][18], register_file:REGS|regs[1][18], ; -; ; ; register_file:REGS|regs[2][18], register_file:REGS|regs[3][18], ; -; ; ; register_file:REGS|regs[4][18], register_file:REGS|regs[5][18], ; -; ; ; register_file:REGS|regs[6][18], register_file:REGS|regs[7][18], ; -; ; ; register_file:REGS|regs[8][18], register_file:REGS|regs[9][18], ; -; ; ; register_file:REGS|regs[10][18], register_file:REGS|regs[11][18], ; -; ; ; register_file:REGS|regs[12][18], register_file:REGS|regs[13][18], ; -; ; ; register_file:REGS|regs[14][18], register_file:REGS|regs[15][18], ; -; ; ; register_file:REGS|regs[16][18], register_file:REGS|regs[17][18], ; -; ; ; register_file:REGS|regs[18][18], register_file:REGS|regs[19][18], ; -; ; ; register_file:REGS|regs[20][18], register_file:REGS|regs[21][18], ; -; ; ; register_file:REGS|regs[22][18], register_file:REGS|regs[23][18], ; -; ; ; register_file:REGS|regs[24][18], register_file:REGS|regs[25][18], ; -; ; ; register_file:REGS|regs[26][18], register_file:REGS|regs[27][18], ; -; ; ; register_file:REGS|regs[28][18], register_file:REGS|regs[29][18], ; -; ; ; register_file:REGS|regs[30][18], register_file:REGS|regs[31][18], ; -; ; ; register_file:REGS|regs[0][17], register_file:REGS|regs[1][17], ; -; ; ; register_file:REGS|regs[2][17], register_file:REGS|regs[3][17], ; -; ; ; register_file:REGS|regs[4][17], register_file:REGS|regs[5][17], ; -; ; ; register_file:REGS|regs[6][17], register_file:REGS|regs[7][17], ; -; ; ; register_file:REGS|regs[8][17], register_file:REGS|regs[9][17], ; -; ; ; register_file:REGS|regs[10][17], register_file:REGS|regs[11][17], ; -; ; ; register_file:REGS|regs[12][17], register_file:REGS|regs[13][17], ; -; ; ; register_file:REGS|regs[14][17], register_file:REGS|regs[15][17], ; -; ; ; register_file:REGS|regs[16][17], register_file:REGS|regs[17][17], ; -; ; ; register_file:REGS|regs[18][17], register_file:REGS|regs[19][17], ; -; ; ; register_file:REGS|regs[20][17], register_file:REGS|regs[21][17], ; -; ; ; register_file:REGS|regs[22][17], register_file:REGS|regs[23][17], ; -; ; ; register_file:REGS|regs[24][17], register_file:REGS|regs[25][17], ; -; ; ; register_file:REGS|regs[26][17], register_file:REGS|regs[27][17], ; -; ; ; register_file:REGS|regs[28][17], register_file:REGS|regs[29][17], ; -; ; ; register_file:REGS|regs[30][17], register_file:REGS|regs[31][17], ; -; ; ; register_file:REGS|regs[0][16], register_file:REGS|regs[1][16], ; -; ; ; register_file:REGS|regs[2][16], register_file:REGS|regs[3][16], ; -; ; ; register_file:REGS|regs[4][16], register_file:REGS|regs[5][16], ; -; ; ; register_file:REGS|regs[6][16], register_file:REGS|regs[7][16], ; -; ; ; register_file:REGS|regs[8][16], register_file:REGS|regs[9][16], ; -; ; ; register_file:REGS|regs[10][16], register_file:REGS|regs[11][16], ; -; ; ; register_file:REGS|regs[12][16], register_file:REGS|regs[13][16], ; -; ; ; register_file:REGS|regs[14][16], register_file:REGS|regs[15][16], ; -; ; ; register_file:REGS|regs[16][16], register_file:REGS|regs[17][16], ; -; ; ; register_file:REGS|regs[18][16], register_file:REGS|regs[19][16], ; -; ; ; register_file:REGS|regs[20][16], register_file:REGS|regs[21][16], ; -; ; ; register_file:REGS|regs[22][16], register_file:REGS|regs[23][16], ; -; ; ; register_file:REGS|regs[24][16], register_file:REGS|regs[25][16], ; -; ; ; register_file:REGS|regs[26][16], register_file:REGS|regs[27][16], ; -; ; ; register_file:REGS|regs[28][16], register_file:REGS|regs[29][16], ; -; ; ; register_file:REGS|regs[30][16], register_file:REGS|regs[31][16], ; -; ; ; register_file:REGS|regs[0][7], register_file:REGS|regs[1][7], ; -; ; ; register_file:REGS|regs[2][7], register_file:REGS|regs[3][7], ; -; ; ; register_file:REGS|regs[4][7], register_file:REGS|regs[5][7], ; -; ; ; register_file:REGS|regs[6][7], register_file:REGS|regs[7][7], ; -; ; ; register_file:REGS|regs[8][7], register_file:REGS|regs[9][7], ; -; ; ; register_file:REGS|regs[10][7], register_file:REGS|regs[11][7], ; -; ; ; register_file:REGS|regs[12][7], register_file:REGS|regs[13][7], ; -; ; ; register_file:REGS|regs[14][7], register_file:REGS|regs[15][7], ; -; ; ; register_file:REGS|regs[16][7], register_file:REGS|regs[17][7], ; -; ; ; register_file:REGS|regs[18][7], register_file:REGS|regs[19][7], ; -; ; ; register_file:REGS|regs[20][7], register_file:REGS|regs[21][7], ; -; ; ; register_file:REGS|regs[22][7], register_file:REGS|regs[23][7], ; -; ; ; register_file:REGS|regs[24][7], register_file:REGS|regs[25][7], ; -; ; ; register_file:REGS|regs[26][7], register_file:REGS|regs[27][7], ; -; ; ; register_file:REGS|regs[28][7], register_file:REGS|regs[29][7], ; -; ; ; register_file:REGS|regs[30][7], register_file:REGS|regs[31][7], ; -; ; ; register_file:REGS|regs[0][23], register_file:REGS|regs[1][23], ; -; ; ; register_file:REGS|regs[2][23], register_file:REGS|regs[3][23], ; -; ; ; register_file:REGS|regs[4][23], register_file:REGS|regs[5][23], ; -; ; ; register_file:REGS|regs[6][23], register_file:REGS|regs[7][23], ; -; ; ; register_file:REGS|regs[8][23], register_file:REGS|regs[9][23], ; -; ; ; register_file:REGS|regs[10][23], register_file:REGS|regs[11][23], ; -; ; ; register_file:REGS|regs[12][23], register_file:REGS|regs[13][23], ; -; ; ; register_file:REGS|regs[14][23], register_file:REGS|regs[15][23], ; -; ; ; register_file:REGS|regs[16][23], register_file:REGS|regs[17][23], ; -; ; ; register_file:REGS|regs[18][23], register_file:REGS|regs[19][23], ; -; ; ; register_file:REGS|regs[20][23], register_file:REGS|regs[21][23], ; -; ; ; register_file:REGS|regs[22][23], register_file:REGS|regs[23][23], ; -; ; ; register_file:REGS|regs[24][23], register_file:REGS|regs[25][23], ; -; ; ; register_file:REGS|regs[26][23], register_file:REGS|regs[27][23], ; -; ; ; register_file:REGS|regs[28][23], register_file:REGS|regs[29][23], ; -; ; ; register_file:REGS|regs[30][23], register_file:REGS|regs[31][23], ; -; ; ; register_file:REGS|regs[0][6], register_file:REGS|regs[1][6], ; -; ; ; register_file:REGS|regs[2][6], register_file:REGS|regs[3][6], ; -; ; ; register_file:REGS|regs[4][6], register_file:REGS|regs[5][6], ; -; ; ; register_file:REGS|regs[6][6], register_file:REGS|regs[7][6], ; -; ; ; register_file:REGS|regs[8][6], register_file:REGS|regs[9][6], ; -; ; ; register_file:REGS|regs[10][6], register_file:REGS|regs[11][6], ; -; ; ; register_file:REGS|regs[12][6], register_file:REGS|regs[13][6], ; -; ; ; register_file:REGS|regs[14][6], register_file:REGS|regs[15][6], ; -; ; ; register_file:REGS|regs[16][6], register_file:REGS|regs[17][6], ; -; ; ; register_file:REGS|regs[18][6], register_file:REGS|regs[19][6], ; -; ; ; register_file:REGS|regs[20][6], register_file:REGS|regs[21][6], ; -; ; ; register_file:REGS|regs[22][6], register_file:REGS|regs[23][6], ; -; ; ; register_file:REGS|regs[24][6], register_file:REGS|regs[25][6], ; -; ; ; register_file:REGS|regs[26][6], register_file:REGS|regs[27][6], ; -; ; ; register_file:REGS|regs[28][6], register_file:REGS|regs[29][6], ; -; ; ; register_file:REGS|regs[30][6], register_file:REGS|regs[31][6], ; -; ; ; register_file:REGS|regs[0][22], register_file:REGS|regs[1][22], ; -; ; ; register_file:REGS|regs[2][22], register_file:REGS|regs[3][22], ; -; ; ; register_file:REGS|regs[4][22], register_file:REGS|regs[5][22], ; -; ; ; register_file:REGS|regs[6][22], register_file:REGS|regs[7][22], ; -; ; ; register_file:REGS|regs[8][22], register_file:REGS|regs[9][22], ; -; ; ; register_file:REGS|regs[10][22], register_file:REGS|regs[11][22], ; -; ; ; register_file:REGS|regs[12][22], register_file:REGS|regs[13][22], ; -; ; ; register_file:REGS|regs[14][22], register_file:REGS|regs[15][22], ; -; ; ; register_file:REGS|regs[16][22], register_file:REGS|regs[17][22], ; -; ; ; register_file:REGS|regs[18][22], register_file:REGS|regs[19][22], ; -; ; ; register_file:REGS|regs[20][22], register_file:REGS|regs[21][22], ; -; ; ; register_file:REGS|regs[22][22], register_file:REGS|regs[23][22], ; -; ; ; register_file:REGS|regs[24][22], register_file:REGS|regs[25][22], ; -; ; ; register_file:REGS|regs[26][22], register_file:REGS|regs[27][22], ; -; ; ; register_file:REGS|regs[28][22], register_file:REGS|regs[29][22], ; -; ; ; register_file:REGS|regs[30][22], register_file:REGS|regs[31][22], ; -; ; ; register_file:REGS|regs[0][5], register_file:REGS|regs[1][5], ; -; ; ; register_file:REGS|regs[2][5], register_file:REGS|regs[3][5], ; -; ; ; register_file:REGS|regs[4][5], register_file:REGS|regs[5][5], ; -; ; ; register_file:REGS|regs[6][5], register_file:REGS|regs[7][5], ; -; ; ; register_file:REGS|regs[8][5], register_file:REGS|regs[9][5], ; -; ; ; register_file:REGS|regs[10][5], register_file:REGS|regs[11][5], ; -; ; ; register_file:REGS|regs[12][5], register_file:REGS|regs[13][5], ; -; ; ; register_file:REGS|regs[14][5], register_file:REGS|regs[15][5], ; -; ; ; register_file:REGS|regs[16][5], register_file:REGS|regs[17][5], ; -; ; ; register_file:REGS|regs[18][5], register_file:REGS|regs[19][5], ; -; ; ; register_file:REGS|regs[20][5], register_file:REGS|regs[21][5], ; -; ; ; register_file:REGS|regs[22][5], register_file:REGS|regs[23][5], ; -; ; ; register_file:REGS|regs[24][5], register_file:REGS|regs[25][5], ; -; ; ; register_file:REGS|regs[26][5], register_file:REGS|regs[27][5], ; -; ; ; register_file:REGS|regs[28][5], register_file:REGS|regs[29][5], ; -; ; ; register_file:REGS|regs[30][5], register_file:REGS|regs[31][5], ; -; ; ; register_file:REGS|regs[0][21], register_file:REGS|regs[1][21], ; -; ; ; register_file:REGS|regs[2][21], register_file:REGS|regs[3][21], ; -; ; ; register_file:REGS|regs[4][21], register_file:REGS|regs[5][21], ; -; ; ; register_file:REGS|regs[6][21], register_file:REGS|regs[7][21], ; -; ; ; register_file:REGS|regs[8][21], register_file:REGS|regs[9][21], ; -; ; ; register_file:REGS|regs[10][21], register_file:REGS|regs[11][21], ; -; ; ; register_file:REGS|regs[12][21], register_file:REGS|regs[13][21], ; -; ; ; register_file:REGS|regs[14][21], register_file:REGS|regs[15][21], ; -; ; ; register_file:REGS|regs[16][21], register_file:REGS|regs[17][21], ; -; ; ; register_file:REGS|regs[18][21], register_file:REGS|regs[19][21], ; -; ; ; register_file:REGS|regs[20][21], register_file:REGS|regs[21][21], ; -; ; ; register_file:REGS|regs[22][21], register_file:REGS|regs[23][21], ; -; ; ; register_file:REGS|regs[24][21], register_file:REGS|regs[25][21], ; -; ; ; register_file:REGS|regs[26][21], register_file:REGS|regs[27][21], ; -; ; ; register_file:REGS|regs[28][21], register_file:REGS|regs[29][21], ; -; ; ; register_file:REGS|regs[30][21], register_file:REGS|regs[31][21], ; -; ; ; register_file:REGS|regs[0][4], register_file:REGS|regs[1][4], ; -; ; ; register_file:REGS|regs[2][4], register_file:REGS|regs[3][4], ; -; ; ; register_file:REGS|regs[4][4], register_file:REGS|regs[5][4], ; -; ; ; register_file:REGS|regs[6][4], register_file:REGS|regs[7][4], ; -; ; ; register_file:REGS|regs[8][4], register_file:REGS|regs[9][4], ; -; ; ; register_file:REGS|regs[10][4], register_file:REGS|regs[11][4], ; -; ; ; register_file:REGS|regs[12][4], register_file:REGS|regs[13][4], ; -; ; ; register_file:REGS|regs[14][4], register_file:REGS|regs[15][4], ; -; ; ; register_file:REGS|regs[16][4], register_file:REGS|regs[17][4], ; -; ; ; register_file:REGS|regs[18][4], register_file:REGS|regs[19][4], ; -; ; ; register_file:REGS|regs[20][4], register_file:REGS|regs[21][4], ; -; ; ; register_file:REGS|regs[22][4], register_file:REGS|regs[23][4], ; -; ; ; register_file:REGS|regs[24][4], register_file:REGS|regs[25][4], ; -; ; ; register_file:REGS|regs[26][4], register_file:REGS|regs[27][4], ; -; ; ; register_file:REGS|regs[28][4], register_file:REGS|regs[29][4], ; -; ; ; register_file:REGS|regs[30][4], register_file:REGS|regs[31][4], ; -; ; ; register_file:REGS|regs[0][20], register_file:REGS|regs[1][20], ; -; ; ; register_file:REGS|regs[2][20], register_file:REGS|regs[3][20], ; -; ; ; register_file:REGS|regs[4][20], register_file:REGS|regs[5][20], ; -; ; ; register_file:REGS|regs[6][20], register_file:REGS|regs[7][20], ; -; ; ; register_file:REGS|regs[8][20], register_file:REGS|regs[9][20], ; -; ; ; register_file:REGS|regs[10][20], register_file:REGS|regs[11][20], ; -; ; ; register_file:REGS|regs[12][20], register_file:REGS|regs[13][20], ; -; ; ; register_file:REGS|regs[14][20], register_file:REGS|regs[15][20], ; -; ; ; register_file:REGS|regs[16][20], register_file:REGS|regs[17][20], ; -; ; ; register_file:REGS|regs[18][20], register_file:REGS|regs[19][20], ; -; ; ; register_file:REGS|regs[20][20], register_file:REGS|regs[21][20], ; -; ; ; register_file:REGS|regs[22][20], register_file:REGS|regs[23][20], ; -; ; ; register_file:REGS|regs[24][20], register_file:REGS|regs[25][20], ; -; ; ; register_file:REGS|regs[26][20], register_file:REGS|regs[27][20], ; -; ; ; register_file:REGS|regs[28][20], register_file:REGS|regs[29][20], ; -; ; ; register_file:REGS|regs[30][20], register_file:REGS|regs[31][20], ; -; ; ; register_file:REGS|regs[0][11], register_file:REGS|regs[1][11], ; -; ; ; register_file:REGS|regs[2][11], register_file:REGS|regs[3][11], ; -; ; ; register_file:REGS|regs[4][11], register_file:REGS|regs[5][11], ; -; ; ; register_file:REGS|regs[6][11], register_file:REGS|regs[7][11], ; -; ; ; register_file:REGS|regs[8][11], register_file:REGS|regs[9][11], ; -; ; ; register_file:REGS|regs[10][11], register_file:REGS|regs[11][11], ; -; ; ; register_file:REGS|regs[12][11], register_file:REGS|regs[13][11], ; -; ; ; register_file:REGS|regs[14][11], register_file:REGS|regs[15][11], ; -; ; ; register_file:REGS|regs[16][11], register_file:REGS|regs[17][11], ; -; ; ; register_file:REGS|regs[18][11], register_file:REGS|regs[19][11], ; -; ; ; register_file:REGS|regs[20][11], register_file:REGS|regs[21][11], ; -; ; ; register_file:REGS|regs[22][11], register_file:REGS|regs[23][11], ; -; ; ; register_file:REGS|regs[24][11], register_file:REGS|regs[25][11], ; -; ; ; register_file:REGS|regs[26][11], register_file:REGS|regs[27][11], ; -; ; ; register_file:REGS|regs[28][11], register_file:REGS|regs[29][11], ; -; ; ; register_file:REGS|regs[30][11], register_file:REGS|regs[31][11], ; -; ; ; register_file:REGS|regs[0][27], register_file:REGS|regs[1][27], ; -; ; ; register_file:REGS|regs[2][27], register_file:REGS|regs[3][27], ; -; ; ; register_file:REGS|regs[4][27], register_file:REGS|regs[5][27], ; -; ; ; register_file:REGS|regs[6][27], register_file:REGS|regs[7][27], ; -; ; ; register_file:REGS|regs[8][27], register_file:REGS|regs[9][27], ; -; ; ; register_file:REGS|regs[10][27], register_file:REGS|regs[11][27], ; -; ; ; register_file:REGS|regs[12][27], register_file:REGS|regs[13][27], ; -; ; ; register_file:REGS|regs[14][27], register_file:REGS|regs[15][27], ; -; ; ; register_file:REGS|regs[16][27], register_file:REGS|regs[17][27], ; -; ; ; register_file:REGS|regs[18][27], register_file:REGS|regs[19][27], ; -; ; ; register_file:REGS|regs[20][27], register_file:REGS|regs[21][27], ; -; ; ; register_file:REGS|regs[22][27], register_file:REGS|regs[23][27], ; -; ; ; register_file:REGS|regs[24][27], register_file:REGS|regs[25][27], ; -; ; ; register_file:REGS|regs[26][27], register_file:REGS|regs[27][27], ; -; ; ; register_file:REGS|regs[28][27], register_file:REGS|regs[29][27], ; -; ; ; register_file:REGS|regs[30][27], register_file:REGS|regs[31][27], ; -; ; ; register_file:REGS|regs[0][10], register_file:REGS|regs[1][10], ; -; ; ; register_file:REGS|regs[2][10], register_file:REGS|regs[3][10], ; -; ; ; register_file:REGS|regs[4][10], register_file:REGS|regs[5][10], ; -; ; ; register_file:REGS|regs[6][10], register_file:REGS|regs[7][10], ; -; ; ; register_file:REGS|regs[8][10], register_file:REGS|regs[9][10], ; -; ; ; register_file:REGS|regs[10][10], register_file:REGS|regs[11][10], ; -; ; ; register_file:REGS|regs[12][10], register_file:REGS|regs[13][10], ; -; ; ; register_file:REGS|regs[14][10], register_file:REGS|regs[15][10], ; -; ; ; register_file:REGS|regs[16][10], register_file:REGS|regs[17][10], ; -; ; ; register_file:REGS|regs[18][10], register_file:REGS|regs[19][10], ; -; ; ; register_file:REGS|regs[20][10], register_file:REGS|regs[21][10], ; -; ; ; register_file:REGS|regs[22][10], register_file:REGS|regs[23][10], ; -; ; ; register_file:REGS|regs[24][10], register_file:REGS|regs[25][10], ; -; ; ; register_file:REGS|regs[26][10], register_file:REGS|regs[27][10], ; -; ; ; register_file:REGS|regs[28][10], register_file:REGS|regs[29][10], ; -; ; ; register_file:REGS|regs[30][10], register_file:REGS|regs[31][10], ; -; ; ; register_file:REGS|regs[0][26], register_file:REGS|regs[1][26], ; -; ; ; register_file:REGS|regs[2][26], register_file:REGS|regs[3][26], ; -; ; ; register_file:REGS|regs[4][26], register_file:REGS|regs[5][26], ; -; ; ; register_file:REGS|regs[6][26], register_file:REGS|regs[7][26], ; -; ; ; register_file:REGS|regs[8][26], register_file:REGS|regs[9][26], ; -; ; ; register_file:REGS|regs[10][26], register_file:REGS|regs[11][26], ; -; ; ; register_file:REGS|regs[12][26], register_file:REGS|regs[13][26], ; -; ; ; register_file:REGS|regs[14][26], register_file:REGS|regs[15][26], ; -; ; ; register_file:REGS|regs[16][26], register_file:REGS|regs[17][26], ; -; ; ; register_file:REGS|regs[18][26], register_file:REGS|regs[19][26], ; -; ; ; register_file:REGS|regs[20][26], register_file:REGS|regs[21][26], ; -; ; ; register_file:REGS|regs[22][26], register_file:REGS|regs[23][26], ; -; ; ; register_file:REGS|regs[24][26], register_file:REGS|regs[25][26], ; -; ; ; register_file:REGS|regs[26][26], register_file:REGS|regs[27][26], ; -; ; ; register_file:REGS|regs[28][26], register_file:REGS|regs[29][26], ; -; ; ; register_file:REGS|regs[30][26], register_file:REGS|regs[31][26], ; -; ; ; register_file:REGS|regs[0][9], register_file:REGS|regs[1][9], ; -; ; ; register_file:REGS|regs[2][9], register_file:REGS|regs[3][9], ; -; ; ; register_file:REGS|regs[4][9], register_file:REGS|regs[5][9], ; -; ; ; register_file:REGS|regs[6][9], register_file:REGS|regs[7][9], ; -; ; ; register_file:REGS|regs[8][9], register_file:REGS|regs[9][9], ; -; ; ; register_file:REGS|regs[10][9], register_file:REGS|regs[11][9], ; -; ; ; register_file:REGS|regs[12][9], register_file:REGS|regs[13][9], ; -; ; ; register_file:REGS|regs[14][9], register_file:REGS|regs[15][9], ; -; ; ; register_file:REGS|regs[16][9], register_file:REGS|regs[17][9], ; -; ; ; register_file:REGS|regs[18][9], register_file:REGS|regs[19][9], ; -; ; ; register_file:REGS|regs[20][9], register_file:REGS|regs[21][9], ; -; ; ; register_file:REGS|regs[22][9], register_file:REGS|regs[23][9], ; -; ; ; register_file:REGS|regs[24][9], register_file:REGS|regs[25][9], ; -; ; ; register_file:REGS|regs[26][9], register_file:REGS|regs[27][9], ; -; ; ; register_file:REGS|regs[28][9], register_file:REGS|regs[29][9], ; -; ; ; register_file:REGS|regs[30][9], register_file:REGS|regs[31][9], ; -; ; ; register_file:REGS|regs[0][25], register_file:REGS|regs[1][25], ; -; ; ; register_file:REGS|regs[2][25], register_file:REGS|regs[3][25], ; -; ; ; register_file:REGS|regs[4][25], register_file:REGS|regs[5][25], ; -; ; ; register_file:REGS|regs[6][25], register_file:REGS|regs[7][25], ; -; ; ; register_file:REGS|regs[8][25], register_file:REGS|regs[9][25], ; -; ; ; register_file:REGS|regs[10][25], register_file:REGS|regs[11][25], ; -; ; ; register_file:REGS|regs[12][25], register_file:REGS|regs[13][25], ; -; ; ; register_file:REGS|regs[14][25], register_file:REGS|regs[15][25], ; -; ; ; register_file:REGS|regs[16][25], register_file:REGS|regs[17][25], ; -; ; ; register_file:REGS|regs[18][25], register_file:REGS|regs[19][25], ; -; ; ; register_file:REGS|regs[20][25], register_file:REGS|regs[21][25], ; -; ; ; register_file:REGS|regs[22][25], register_file:REGS|regs[23][25], ; -; ; ; register_file:REGS|regs[24][25], register_file:REGS|regs[25][25], ; -; ; ; register_file:REGS|regs[26][25], register_file:REGS|regs[27][25], ; -; ; ; register_file:REGS|regs[28][25], register_file:REGS|regs[29][25], ; -; ; ; register_file:REGS|regs[30][25], register_file:REGS|regs[31][25], ; -; ; ; register_file:REGS|regs[0][8], register_file:REGS|regs[1][8], ; -; ; ; register_file:REGS|regs[2][8], register_file:REGS|regs[3][8], ; -; ; ; register_file:REGS|regs[4][8], register_file:REGS|regs[5][8], ; -; ; ; register_file:REGS|regs[6][8], register_file:REGS|regs[7][8], ; -; ; ; register_file:REGS|regs[8][8], register_file:REGS|regs[9][8], ; -; ; ; register_file:REGS|regs[10][8], register_file:REGS|regs[11][8], ; -; ; ; register_file:REGS|regs[12][8], register_file:REGS|regs[13][8], ; -; ; ; register_file:REGS|regs[14][8], register_file:REGS|regs[15][8], ; -; ; ; register_file:REGS|regs[16][8], register_file:REGS|regs[17][8], ; -; ; ; register_file:REGS|regs[18][8], register_file:REGS|regs[19][8], ; -; ; ; register_file:REGS|regs[20][8], register_file:REGS|regs[21][8], ; -; ; ; register_file:REGS|regs[22][8], register_file:REGS|regs[23][8], ; -; ; ; register_file:REGS|regs[24][8], register_file:REGS|regs[25][8], ; -; ; ; register_file:REGS|regs[26][8], register_file:REGS|regs[27][8], ; -; ; ; register_file:REGS|regs[28][8], register_file:REGS|regs[29][8], ; -; ; ; register_file:REGS|regs[30][8], register_file:REGS|regs[31][8], ; -; ; ; register_file:REGS|regs[0][24], register_file:REGS|regs[1][24], ; -; ; ; register_file:REGS|regs[2][24], register_file:REGS|regs[3][24], ; -; ; ; register_file:REGS|regs[4][24], register_file:REGS|regs[5][24], ; -; ; ; register_file:REGS|regs[6][24], register_file:REGS|regs[7][24], ; -; ; ; register_file:REGS|regs[8][24], register_file:REGS|regs[9][24], ; -; ; ; register_file:REGS|regs[10][24], register_file:REGS|regs[11][24], ; -; ; ; register_file:REGS|regs[12][24], register_file:REGS|regs[13][24], ; -; ; ; register_file:REGS|regs[14][24], register_file:REGS|regs[15][24], ; -; ; ; register_file:REGS|regs[16][24], register_file:REGS|regs[17][24], ; -; ; ; register_file:REGS|regs[18][24], register_file:REGS|regs[19][24], ; -; ; ; register_file:REGS|regs[20][24], register_file:REGS|regs[21][24], ; -; ; ; register_file:REGS|regs[22][24], register_file:REGS|regs[23][24], ; -; ; ; register_file:REGS|regs[24][24], register_file:REGS|regs[25][24], ; -; ; ; register_file:REGS|regs[26][24], register_file:REGS|regs[27][24], ; -; ; ; register_file:REGS|regs[28][24], register_file:REGS|regs[29][24], ; -; ; ; register_file:REGS|regs[30][24], register_file:REGS|regs[31][24], ; -; ; ; register_file:REGS|regs[0][15], register_file:REGS|regs[1][15], ; -; ; ; register_file:REGS|regs[2][15], register_file:REGS|regs[3][15], ; -; ; ; register_file:REGS|regs[4][15], register_file:REGS|regs[5][15], ; -; ; ; register_file:REGS|regs[6][15], register_file:REGS|regs[7][15], ; -; ; ; register_file:REGS|regs[8][15], register_file:REGS|regs[9][15], ; -; ; ; register_file:REGS|regs[10][15], register_file:REGS|regs[11][15], ; -; ; ; register_file:REGS|regs[12][15], register_file:REGS|regs[13][15], ; -; ; ; register_file:REGS|regs[14][15], register_file:REGS|regs[15][15], ; -; ; ; register_file:REGS|regs[16][15], register_file:REGS|regs[17][15], ; -; ; ; register_file:REGS|regs[18][15], register_file:REGS|regs[19][15], ; -; ; ; register_file:REGS|regs[20][15], register_file:REGS|regs[21][15], ; -; ; ; register_file:REGS|regs[22][15], register_file:REGS|regs[23][15], ; -; ; ; register_file:REGS|regs[24][15], register_file:REGS|regs[25][15], ; -; ; ; register_file:REGS|regs[26][15], register_file:REGS|regs[27][15], ; -; ; ; register_file:REGS|regs[28][15], register_file:REGS|regs[29][15], ; -; ; ; register_file:REGS|regs[30][15], register_file:REGS|regs[31][15], ; -; ; ; register_file:REGS|regs[0][31], register_file:REGS|regs[1][31], ; -; ; ; register_file:REGS|regs[2][31], register_file:REGS|regs[3][31], ; -; ; ; register_file:REGS|regs[4][31], register_file:REGS|regs[5][31], ; -; ; ; register_file:REGS|regs[6][31], register_file:REGS|regs[7][31], ; -; ; ; register_file:REGS|regs[8][31], register_file:REGS|regs[9][31], ; -; ; ; register_file:REGS|regs[10][31], register_file:REGS|regs[11][31], ; -; ; ; register_file:REGS|regs[12][31], register_file:REGS|regs[13][31], ; -; ; ; register_file:REGS|regs[14][31], register_file:REGS|regs[15][31], ; -; ; ; register_file:REGS|regs[16][31], register_file:REGS|regs[17][31], ; -; ; ; register_file:REGS|regs[18][31], register_file:REGS|regs[19][31], ; -; ; ; register_file:REGS|regs[20][31], register_file:REGS|regs[21][31], ; -; ; ; register_file:REGS|regs[22][31], register_file:REGS|regs[23][31], ; -; ; ; register_file:REGS|regs[24][31], register_file:REGS|regs[25][31], ; -; ; ; register_file:REGS|regs[26][31], register_file:REGS|regs[27][31], ; -; ; ; register_file:REGS|regs[28][31], register_file:REGS|regs[29][31], ; -; ; ; register_file:REGS|regs[30][31], register_file:REGS|regs[31][31], ; -; ; ; register_file:REGS|regs[0][14], register_file:REGS|regs[1][14], ; -; ; ; register_file:REGS|regs[2][14], register_file:REGS|regs[3][14], ; -; ; ; register_file:REGS|regs[4][14], register_file:REGS|regs[5][14], ; -; ; ; register_file:REGS|regs[6][14], register_file:REGS|regs[7][14], ; -; ; ; register_file:REGS|regs[8][14], register_file:REGS|regs[9][14], ; -; ; ; register_file:REGS|regs[10][14], register_file:REGS|regs[11][14], ; -; ; ; register_file:REGS|regs[12][14], register_file:REGS|regs[13][14], ; -; ; ; register_file:REGS|regs[14][14], register_file:REGS|regs[15][14], ; -; ; ; register_file:REGS|regs[16][14], register_file:REGS|regs[17][14], ; -; ; ; register_file:REGS|regs[18][14], register_file:REGS|regs[19][14], ; -; ; ; register_file:REGS|regs[20][14], register_file:REGS|regs[21][14], ; -; ; ; register_file:REGS|regs[22][14], register_file:REGS|regs[23][14], ; -; ; ; register_file:REGS|regs[24][14], register_file:REGS|regs[25][14], ; -; ; ; register_file:REGS|regs[26][14], register_file:REGS|regs[27][14], ; -; ; ; register_file:REGS|regs[28][14], register_file:REGS|regs[29][14], ; -; ; ; register_file:REGS|regs[30][14], register_file:REGS|regs[31][14], ; -; ; ; register_file:REGS|regs[0][30], register_file:REGS|regs[1][30], ; -; ; ; register_file:REGS|regs[2][30], register_file:REGS|regs[3][30], ; -; ; ; register_file:REGS|regs[4][30], register_file:REGS|regs[5][30], ; -; ; ; register_file:REGS|regs[6][30], register_file:REGS|regs[7][30], ; -; ; ; register_file:REGS|regs[8][30], register_file:REGS|regs[9][30], ; -; ; ; register_file:REGS|regs[10][30], register_file:REGS|regs[11][30], ; -; ; ; register_file:REGS|regs[12][30], register_file:REGS|regs[13][30], ; -; ; ; register_file:REGS|regs[14][30], register_file:REGS|regs[15][30], ; -; ; ; register_file:REGS|regs[16][30], register_file:REGS|regs[17][30], ; -; ; ; register_file:REGS|regs[18][30], register_file:REGS|regs[19][30], ; -; ; ; register_file:REGS|regs[20][30], register_file:REGS|regs[21][30], ; -; ; ; register_file:REGS|regs[22][30], register_file:REGS|regs[23][30], ; -; ; ; register_file:REGS|regs[24][30], register_file:REGS|regs[25][30], ; -; ; ; register_file:REGS|regs[26][30], register_file:REGS|regs[27][30], ; -; ; ; register_file:REGS|regs[28][30], register_file:REGS|regs[29][30], ; -; ; ; register_file:REGS|regs[30][30], register_file:REGS|regs[31][30], ; -; ; ; register_file:REGS|regs[0][13], register_file:REGS|regs[1][13], ; -; ; ; register_file:REGS|regs[2][13], register_file:REGS|regs[3][13], ; -; ; ; register_file:REGS|regs[4][13], register_file:REGS|regs[5][13], ; -; ; ; register_file:REGS|regs[6][13], register_file:REGS|regs[7][13], ; -; ; ; register_file:REGS|regs[8][13], register_file:REGS|regs[9][13], ; -; ; ; register_file:REGS|regs[10][13], register_file:REGS|regs[11][13], ; -; ; ; register_file:REGS|regs[12][13], register_file:REGS|regs[13][13], ; -; ; ; register_file:REGS|regs[14][13], register_file:REGS|regs[15][13], ; -; ; ; register_file:REGS|regs[16][13], register_file:REGS|regs[17][13], ; -; ; ; register_file:REGS|regs[18][13], register_file:REGS|regs[19][13], ; -; ; ; register_file:REGS|regs[20][13], register_file:REGS|regs[21][13], ; -; ; ; register_file:REGS|regs[22][13], register_file:REGS|regs[23][13], ; -; ; ; register_file:REGS|regs[24][13], register_file:REGS|regs[25][13], ; -; ; ; register_file:REGS|regs[26][13], register_file:REGS|regs[27][13], ; -; ; ; register_file:REGS|regs[28][13], register_file:REGS|regs[29][13], ; -; ; ; register_file:REGS|regs[30][13], register_file:REGS|regs[31][13], ; -; ; ; register_file:REGS|regs[0][29], register_file:REGS|regs[1][29], ; -; ; ; register_file:REGS|regs[2][29], register_file:REGS|regs[3][29], ; -; ; ; register_file:REGS|regs[4][29], register_file:REGS|regs[5][29], ; -; ; ; register_file:REGS|regs[6][29], register_file:REGS|regs[7][29], ; -; ; ; register_file:REGS|regs[8][29], register_file:REGS|regs[9][29], ; -; ; ; register_file:REGS|regs[10][29], register_file:REGS|regs[11][29], ; -; ; ; register_file:REGS|regs[12][29], register_file:REGS|regs[13][29], ; -; ; ; register_file:REGS|regs[14][29], register_file:REGS|regs[15][29], ; -; ; ; register_file:REGS|regs[16][29], register_file:REGS|regs[17][29], ; -; ; ; register_file:REGS|regs[18][29], register_file:REGS|regs[19][29], ; -; ; ; register_file:REGS|regs[20][29], register_file:REGS|regs[21][29], ; -; ; ; register_file:REGS|regs[22][29], register_file:REGS|regs[23][29], ; -; ; ; register_file:REGS|regs[24][29], register_file:REGS|regs[25][29], ; -; ; ; register_file:REGS|regs[26][29], register_file:REGS|regs[27][29], ; -; ; ; register_file:REGS|regs[28][29], register_file:REGS|regs[29][29], ; -; ; ; register_file:REGS|regs[30][29], register_file:REGS|regs[31][29], ; -; ; ; register_file:REGS|regs[0][12], register_file:REGS|regs[1][12], ; -; ; ; register_file:REGS|regs[2][12], register_file:REGS|regs[3][12], ; -; ; ; register_file:REGS|regs[4][12], register_file:REGS|regs[5][12], ; -; ; ; register_file:REGS|regs[6][12], register_file:REGS|regs[7][12], ; -; ; ; register_file:REGS|regs[8][12], register_file:REGS|regs[9][12], ; -; ; ; register_file:REGS|regs[10][12], register_file:REGS|regs[11][12], ; -; ; ; register_file:REGS|regs[12][12], register_file:REGS|regs[13][12], ; -; ; ; register_file:REGS|regs[14][12], register_file:REGS|regs[15][12], ; -; ; ; register_file:REGS|regs[16][12], register_file:REGS|regs[17][12], ; -; ; ; register_file:REGS|regs[18][12], register_file:REGS|regs[19][12], ; -; ; ; register_file:REGS|regs[20][12], register_file:REGS|regs[21][12], ; -; ; ; register_file:REGS|regs[22][12], register_file:REGS|regs[23][12], ; -; ; ; register_file:REGS|regs[24][12], register_file:REGS|regs[25][12], ; -; ; ; register_file:REGS|regs[26][12], register_file:REGS|regs[27][12], ; -; ; ; register_file:REGS|regs[28][12], register_file:REGS|regs[29][12], ; -; ; ; register_file:REGS|regs[30][12], register_file:REGS|regs[31][12], ; -; ; ; register_file:REGS|regs[0][28], register_file:REGS|regs[1][28], ; -; ; ; register_file:REGS|regs[2][28], register_file:REGS|regs[3][28], ; -; ; ; register_file:REGS|regs[4][28], register_file:REGS|regs[5][28], ; -; ; ; register_file:REGS|regs[6][28], register_file:REGS|regs[7][28], ; -; ; ; register_file:REGS|regs[8][28], register_file:REGS|regs[9][28], ; -; ; ; register_file:REGS|regs[10][28], register_file:REGS|regs[11][28], ; -; ; ; register_file:REGS|regs[12][28], register_file:REGS|regs[13][28], ; -; ; ; register_file:REGS|regs[14][28], register_file:REGS|regs[15][28], ; -; ; ; register_file:REGS|regs[16][28], register_file:REGS|regs[17][28], ; -; ; ; register_file:REGS|regs[18][28], register_file:REGS|regs[19][28], ; -; ; ; register_file:REGS|regs[20][28], register_file:REGS|regs[21][28], ; -; ; ; register_file:REGS|regs[22][28], register_file:REGS|regs[23][28], ; -; ; ; register_file:REGS|regs[24][28], register_file:REGS|regs[25][28], ; -; ; ; register_file:REGS|regs[26][28], register_file:REGS|regs[27][28], ; -; ; ; register_file:REGS|regs[28][28], register_file:REGS|regs[29][28], ; -; ; ; register_file:REGS|regs[30][28], register_file:REGS|regs[31][28], ; -; ; ; register_file:REGS|regs[0][1], register_file:REGS|regs[16][1], ; -; ; ; register_file:REGS|regs[17][1], register_file:REGS|regs[18][1], ; -; ; ; register_file:REGS|regs[19][1], register_file:REGS|regs[20][1], ; -; ; ; register_file:REGS|regs[21][1], register_file:REGS|regs[22][1], ; -; ; ; register_file:REGS|regs[23][1], register_file:REGS|regs[24][1], ; -; ; ; register_file:REGS|regs[25][1], register_file:REGS|regs[26][1], ; -; ; ; register_file:REGS|regs[27][1], register_file:REGS|regs[28][1], ; -; ; ; register_file:REGS|regs[29][1], register_file:REGS|regs[30][1], ; -; ; ; register_file:REGS|regs[31][1], register_file:REGS|regs[0][0], ; -; ; ; register_file:REGS|regs[16][0], register_file:REGS|regs[17][0], ; -; ; ; register_file:REGS|regs[18][0], register_file:REGS|regs[19][0], ; -; ; ; register_file:REGS|regs[20][0], register_file:REGS|regs[21][0], ; -; ; ; register_file:REGS|regs[22][0], register_file:REGS|regs[23][0], ; -; ; ; register_file:REGS|regs[24][0], register_file:REGS|regs[25][0], ; -; ; ; register_file:REGS|regs[26][0], register_file:REGS|regs[27][0], ; -; ; ; register_file:REGS|regs[28][0], register_file:REGS|regs[29][0], ; -; ; ; register_file:REGS|regs[30][0], register_file:REGS|regs[31][0], ; -; ; ; register_file:REGS|regs[1][1], register_file:REGS|regs[2][1], ; -; ; ; register_file:REGS|regs[3][1], register_file:REGS|regs[15][1], ; -; ; ; register_file:REGS|regs[5][1], register_file:REGS|regs[6][1], ; -; ; ; register_file:REGS|regs[7][1], register_file:REGS|regs[11][1], ; -; ; ; register_file:REGS|regs[1][0], register_file:REGS|regs[2][0], ; -; ; ; register_file:REGS|regs[3][0], register_file:REGS|regs[15][0], ; -; ; ; register_file:REGS|regs[5][0], register_file:REGS|regs[6][0], ; -; ; ; register_file:REGS|regs[7][0], register_file:REGS|regs[11][0], ; -; ; ; register_file:REGS|regs[4][0], register_file:REGS|regs[12][0], ; -; ; ; register_file:REGS|regs[13][0], register_file:REGS|regs[14][0], ; -; ; ; register_file:REGS|regs[8][0], register_file:REGS|regs[9][0], ; -; ; ; register_file:REGS|regs[10][0], register_file:REGS|regs[4][1], ; -; ; ; register_file:REGS|regs[12][1], register_file:REGS|regs[13][1], ; -; ; ; register_file:REGS|regs[14][1], register_file:REGS|regs[8][1], ; -; ; ; register_file:REGS|regs[9][1], register_file:REGS|regs[10][1], ; -; ; ; instruction_counter:PC|pc[2], instruction_counter:PC|pc[3], ; -; ; ; instruction_counter:PC|pc[4], instruction_counter:PC|pc[5], ; -; ; ; instruction_counter:PC|pc[6], instruction_counter:PC|pc[7], ; -; ; ; instruction_counter:PC|pc[8], instruction_counter:PC|pc[9] ; -+------------------------------+--------------------------------+-------------------------------------------------------------------+ ++--------------------------------------------------------------------------------------+ +; Registers Removed During Synthesis ; ++----------------------------------------+---------------------------------------------+ +; Register name ; Reason for Removal ; ++----------------------------------------+---------------------------------------------+ +; instruction_counter:PC|pc[0] ; Merged with instruction_counter:PC|pc[1] ; +; instruction_counter:PC|pc[1] ; Stuck at GND due to stuck port data_in ; +; register_file:REGS|regs[0][3] ; Stuck at GND due to stuck port clock_enable ; +; register_file:REGS|regs[0][19] ; Stuck at GND due to stuck port clock_enable ; +; register_file:REGS|regs[0][2] ; Stuck at GND due to stuck port clock_enable ; +; register_file:REGS|regs[0][18] ; Stuck at GND due to stuck port clock_enable ; +; register_file:REGS|regs[0][1] ; Stuck at GND due to stuck port clock_enable ; +; register_file:REGS|regs[0][17] ; Stuck at GND due to stuck port clock_enable ; +; register_file:REGS|regs[0][0] ; Stuck at GND due to stuck port clock_enable ; +; register_file:REGS|regs[0][16] ; Stuck at GND due to stuck port clock_enable ; +; register_file:REGS|regs[0][7] ; Stuck at GND due to stuck port clock_enable ; +; register_file:REGS|regs[0][23] ; Stuck at GND due to stuck port clock_enable ; +; register_file:REGS|regs[0][6] ; Stuck at GND due to stuck port clock_enable ; +; register_file:REGS|regs[0][22] ; Stuck at GND due to stuck port clock_enable ; +; register_file:REGS|regs[0][5] ; Stuck at GND due to stuck port clock_enable ; +; register_file:REGS|regs[0][21] ; Stuck at GND due to stuck port clock_enable ; +; register_file:REGS|regs[0][4] ; Stuck at GND due to stuck port clock_enable ; +; register_file:REGS|regs[0][20] ; Stuck at GND due to stuck port clock_enable ; +; register_file:REGS|regs[0][11] ; Stuck at GND due to stuck port clock_enable ; +; register_file:REGS|regs[0][27] ; Stuck at GND due to stuck port clock_enable ; +; register_file:REGS|regs[0][10] ; Stuck at GND due to stuck port clock_enable ; +; register_file:REGS|regs[0][26] ; Stuck at GND due to stuck port clock_enable ; +; register_file:REGS|regs[0][9] ; Stuck at GND due to stuck port clock_enable ; +; register_file:REGS|regs[0][25] ; Stuck at GND due to stuck port clock_enable ; +; register_file:REGS|regs[0][8] ; Stuck at GND due to stuck port clock_enable ; +; register_file:REGS|regs[0][24] ; Stuck at GND due to stuck port clock_enable ; +; register_file:REGS|regs[0][15] ; Stuck at GND due to stuck port clock_enable ; +; register_file:REGS|regs[0][31] ; Stuck at GND due to stuck port clock_enable ; +; register_file:REGS|regs[0][14] ; Stuck at GND due to stuck port clock_enable ; +; register_file:REGS|regs[0][30] ; Stuck at GND due to stuck port clock_enable ; +; register_file:REGS|regs[0][13] ; Stuck at GND due to stuck port clock_enable ; +; register_file:REGS|regs[0][29] ; Stuck at GND due to stuck port clock_enable ; +; register_file:REGS|regs[0][12] ; Stuck at GND due to stuck port clock_enable ; +; register_file:REGS|regs[0][28] ; Stuck at GND due to stuck port clock_enable ; +; Total Number of Removed Registers = 34 ; ; ++----------------------------------------+---------------------------------------------+ +------------------------------------------------------+ @@ -5788,12 +310,12 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi +----------------------------------------------+-------+ ; Statistic ; Value ; +----------------------------------------------+-------+ -; Total registers ; 0 ; +; Total registers ; 2302 ; ; Number of registers using Synchronous Clear ; 0 ; ; Number of registers using Synchronous Load ; 0 ; -; Number of registers using Asynchronous Clear ; 0 ; +; Number of registers using Asynchronous Clear ; 30 ; ; Number of registers using Asynchronous Load ; 0 ; -; Number of registers using Clock Enable ; 0 ; +; Number of registers using Clock Enable ; 2272 ; ; Number of registers using Preset ; 0 ; +----------------------------------------------+-------+ @@ -5803,11 +325,270 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi +--------------------+-----------+---------------+----------------------+------------------------+------------+---------------------------------------+ ; Multiplexer Inputs ; Bus Width ; Baseline Area ; Area if Restructured ; Saving if Restructured ; Registered ; Example Multiplexer Output ; +--------------------+-----------+---------------+----------------------+------------------------+------------+---------------------------------------+ -; 3:1 ; 6 bits ; 12 LEs ; 12 LEs ; 0 LEs ; No ; |assignment2|alu:ALU|Mux27 ; -; 8:1 ; 2 bits ; 10 LEs ; 10 LEs ; 0 LEs ; No ; |assignment2|register_file:REGS|Mux63 ; -; 7:1 ; 3 bits ; 12 LEs ; 9 LEs ; 3 LEs ; No ; |assignment2|alu:ALU|Mux26 ; -; 32:1 ; 2 bits ; 42 LEs ; 42 LEs ; 0 LEs ; No ; |assignment2|Mux30 ; -; 24:1 ; 2 bits ; 32 LEs ; 32 LEs ; 0 LEs ; No ; |assignment2|register_file:REGS|Mux31 ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[0][3] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[1][0] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[2][0] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[3][2] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[4][0] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[5][0] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[6][2] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[7][0] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[8][2] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[9][2] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[10][4] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[11][3] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[12][3] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[13][1] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[14][1] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[15][4] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[16][4] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[17][0] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[18][0] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[19][3] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[20][4] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[21][3] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[22][2] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[23][0] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[24][3] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[25][2] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[26][4] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[27][1] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[28][0] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[29][2] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[30][3] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[31][2] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[32][1] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[33][3] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[34][3] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[35][2] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[36][2] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[37][0] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[38][0] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[39][4] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[40][4] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[41][1] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[42][4] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[43][0] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[44][1] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[45][4] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[46][2] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[47][0] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[48][2] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[49][0] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[50][2] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[51][0] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[52][0] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[53][2] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[54][1] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[55][2] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[56][4] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[57][2] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[58][2] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[59][2] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[60][4] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[61][0] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[62][2] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[63][2] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[64][1] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[65][3] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[66][2] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[67][3] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[68][0] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[69][1] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[70][4] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[71][3] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[72][3] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[73][1] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[74][1] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[75][2] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[76][2] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[77][3] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[78][0] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[79][0] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[80][0] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[81][0] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[82][1] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[83][0] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[84][1] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[85][1] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[86][3] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[87][4] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[88][4] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[89][2] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[90][0] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[91][0] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[92][2] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[93][2] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[94][4] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[95][4] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[96][1] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[97][4] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[98][3] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[99][0] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[100][0] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[101][1] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[102][1] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[103][1] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[104][0] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[105][0] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[106][0] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[107][2] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[108][3] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[109][1] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[110][0] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[111][2] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[112][1] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[113][0] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[114][0] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[115][2] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[116][0] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[117][2] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[118][4] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[119][4] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[120][0] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[121][2] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[122][2] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[123][1] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[124][2] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[125][4] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[126][1] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[127][1] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[128][4] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[129][0] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[130][1] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[131][0] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[132][0] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[133][1] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[134][4] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[135][3] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[136][1] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[137][1] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[138][3] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[139][3] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[140][4] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[141][4] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[142][1] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[143][3] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[144][3] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[145][3] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[146][4] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[147][1] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[148][1] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[149][4] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[150][3] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[151][3] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[152][3] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[153][0] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[154][2] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[155][0] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[156][1] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[157][3] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[158][4] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[159][3] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[160][3] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[161][0] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[162][0] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[163][3] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[164][4] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[165][2] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[166][2] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[167][1] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[168][2] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[169][2] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[170][4] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[171][2] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[172][2] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[173][1] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[174][4] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[175][0] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[176][1] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[177][3] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[178][3] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[179][4] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[180][4] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[181][4] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[182][0] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[183][4] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[184][4] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[185][4] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[186][0] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[187][0] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[188][2] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[189][3] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[190][2] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[191][2] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[192][3] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[193][1] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[194][4] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[195][0] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[196][0] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[197][1] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[198][3] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[199][3] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[200][2] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[201][4] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[202][4] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[203][4] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[204][1] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[205][3] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[206][0] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[207][0] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[208][4] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[209][0] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[210][3] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[211][1] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[212][1] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[213][2] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[214][2] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[215][1] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[216][3] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[217][1] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[218][2] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[219][0] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[220][4] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[221][3] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[222][3] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[223][2] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[224][1] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[225][3] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[226][3] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[227][3] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[228][4] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[229][2] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[230][1] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[231][2] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[232][3] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[233][0] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[234][0] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[235][2] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[236][3] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[237][2] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[238][1] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[239][1] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[240][1] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[241][4] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[242][0] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[243][2] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[244][2] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[245][0] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[246][2] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[247][4] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[248][3] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[249][1] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[250][4] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[251][2] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[252][3] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[253][2] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[254][4] ; +; 3:1 ; 5 bits ; 10 LEs ; 5 LEs ; 5 LEs ; Yes ; |assignment2|ram:RAM|mem[255][3] ; +; 8:1 ; 32 bits ; 160 LEs ; 160 LEs ; 0 LEs ; No ; |assignment2|register_file:REGS|Mux7 ; +; 7:1 ; 31 bits ; 124 LEs ; 124 LEs ; 0 LEs ; No ; |assignment2|alu:ALU|Mux30 ; +; 257:1 ; 5 bits ; 855 LEs ; 855 LEs ; 0 LEs ; No ; |assignment2|rd[3] ; +; 66:1 ; 2 bits ; 88 LEs ; 88 LEs ; 0 LEs ; No ; |assignment2|PC_Reg_Display[1] ; +; 66:1 ; 14 bits ; 616 LEs ; 616 LEs ; 0 LEs ; No ; |assignment2|PC_Reg_Display[3] ; +; 24:1 ; 5 bits ; 80 LEs ; 80 LEs ; 0 LEs ; No ; |assignment2|register_file:REGS|Mux59 ; +; 25:1 ; 14 bits ; 224 LEs ; 224 LEs ; 0 LEs ; No ; |assignment2|rt_alu[31] ; +; 25:1 ; 13 bits ; 208 LEs ; 208 LEs ; 0 LEs ; No ; |assignment2|rt_alu[17] ; +--------------------+-----------+---------------+----------------------+------------------------+------------+---------------------------------------+ @@ -5839,7 +620,7 @@ Note: In order to hide this table in the UI and the text report file, please set ; Parameter Name ; Value ; Type ; +----------------+-------+-----------------------------+ ; m ; 10 ; Signed Integer ; -; p ; 32 ; Signed Integer ; +; p ; 5 ; Signed Integer ; +----------------+-------+-----------------------------+ Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off". @@ -5850,7 +631,7 @@ Note: In order to hide this table in the UI and the text report file, please set ; Parameter Name ; Value ; Type ; +----------------+-------+-----------------------------+ ; addrwidth ; 9 ; Signed Integer ; -; datawidth ; 32 ; Signed Integer ; +; datawidth ; 5 ; Signed Integer ; +----------------+-------+-----------------------------+ Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off". @@ -5912,7 +693,7 @@ Note: In order to hide this table in the UI and the text report file, please set +---------+-------+----------+------------------------------------------+ ; Port ; Type ; Severity ; Details ; +---------+-------+----------+------------------------------------------+ -; rbi_inv ; Input ; Info ; Stuck at GND ; +; rbi_inv ; Input ; Info ; Stuck at VCC ; +---------+-------+----------+------------------------------------------+ @@ -5921,7 +702,7 @@ Note: In order to hide this table in the UI and the text report file, please set +---------+-------+----------+------------------------------------------+ ; Port ; Type ; Severity ; Details ; +---------+-------+----------+------------------------------------------+ -; rbi_inv ; Input ; Info ; Stuck at GND ; +; rbi_inv ; Input ; Info ; Stuck at VCC ; +---------+-------+----------+------------------------------------------+ @@ -5930,7 +711,7 @@ Note: In order to hide this table in the UI and the text report file, please set +---------+-------+----------+------------------------------------------+ ; Port ; Type ; Severity ; Details ; +---------+-------+----------+------------------------------------------+ -; rbi_inv ; Input ; Info ; Stuck at GND ; +; rbi_inv ; Input ; Info ; Stuck at VCC ; +---------+-------+----------+------------------------------------------+ @@ -5939,18 +720,17 @@ Note: In order to hide this table in the UI and the text report file, please set +---------+-------+----------+------------------------------------------+ ; Port ; Type ; Severity ; Details ; +---------+-------+----------+------------------------------------------+ -; rbi_inv ; Input ; Info ; Stuck at GND ; +; rbi_inv ; Input ; Info ; Stuck at VCC ; +---------+-------+----------+------------------------------------------+ -+------------------------------------------------------------------------------------------------------------------------------------------------------+ -; Port Connectivity Checks: "alu:ALU" ; -+-------+--------+----------+--------------------------------------------------------------------------------------------------------------------------+ -; Port ; Type ; Severity ; Details ; -+-------+--------+----------+--------------------------------------------------------------------------------------------------------------------------+ -; flags ; Output ; Warning ; Output or bidir port (3 bits) is wider than the port expression (2 bits) it drives; bit(s) "flags[2..2]" have no fanouts ; -; flags ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ; -+-------+--------+----------+--------------------------------------------------------------------------------------------------------------------------+ ++-----------------------------------------------------------------------------------------------------------------------+ +; Port Connectivity Checks: "alu:ALU" ; ++-------------+--------+----------+-------------------------------------------------------------------------------------+ +; Port ; Type ; Severity ; Details ; ++-------------+--------+----------+-------------------------------------------------------------------------------------+ +; flags[1..0] ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ; ++-------------+--------+----------+-------------------------------------------------------------------------------------+ +---------------------------------------------------+ @@ -5971,33 +751,24 @@ Note: In order to hide this table in the UI and the text report file, please set +------+--------+----------+-------------------------------------------------------------------------------------+ -+----------------------------------------------------------------------------------------------------------------+ -; Port Connectivity Checks: "control_unit:CONTROL_UNIT" ; -+------+--------+----------+-------------------------------------------------------------------------------------+ -; Port ; Type ; Severity ; Details ; -+------+--------+----------+-------------------------------------------------------------------------------------+ -; B ; Output ; Info ; Connected to dangling logic. Logic that only feeds a dangling port will be removed. ; -+------+--------+----------+-------------------------------------------------------------------------------------+ ++-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ +; Port Connectivity Checks: "ram:RAM" ; ++----------+--------+----------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ +; Port ; Type ; Severity ; Details ; ++----------+--------+----------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ +; addr ; Input ; Warning ; Input port expression (32 bits) is wider than the input port (9 bits) it drives. The 23 most-significant bit(s) in the expression will be dangling if they have no other fanouts. ; +; data_in ; Input ; Warning ; Input port expression (32 bits) is wider than the input port (5 bits) it drives. The 27 most-significant bit(s) in the expression will be dangling if they have no other fanouts. ; +; data_out ; Output ; Warning ; Output or bidir port (5 bits) is smaller than the port expression (32 bits) it drives. The 27 most-significant bit(s) in the port expression will be connected to GND. ; ++----------+--------+----------+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ -+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ -; Port Connectivity Checks: "ram:RAM" ; -+------+-------+----------+----------------------------------------------------------------------------------------------------------------------------------------------------+ -; Port ; Type ; Severity ; Details ; -+------+-------+----------+----------------------------------------------------------------------------------------------------------------------------------------------------+ -; addr ; Input ; Warning ; Input port expression (32 bits) is smaller than the input port (512 bits) it drives. Extra input bit(s) "addr[511..32]" will be connected to GND. ; -+------+-------+----------+----------------------------------------------------------------------------------------------------------------------------------------------------+ - - -+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ -; Port Connectivity Checks: "instruction_counter:PC" ; -+------+--------+----------+-----------------------------------------------------------------------------------------------------------------------------------------------+ -; Port ; Type ; Severity ; Details ; -+------+--------+----------+-----------------------------------------------------------------------------------------------------------------------------------------------+ -; we ; Input ; Info ; Stuck at GND ; -; W ; Input ; Warning ; Input port expression (10 bits) is smaller than the input port (32 bits) it drives. Extra input bit(s) "W[31..10]" will be connected to GND. ; -; addr ; Output ; Warning ; Output or bidir port (32 bits) is wider than the port expression (10 bits) it drives; bit(s) "addr[31..10]" have no fanouts ; -+------+--------+----------+-----------------------------------------------------------------------------------------------------------------------------------------------+ ++---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ +; Port Connectivity Checks: "rom:ROM" ; ++------+-------+----------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ +; Port ; Type ; Severity ; Details ; ++------+-------+----------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ +; Ad ; Input ; Warning ; Input port expression (32 bits) is wider than the input port (10 bits) it drives. The 22 most-significant bit(s) in the expression will be dangling if they have no other fanouts. ; ++------+-------+----------+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ +-----------------------------------------------------+ @@ -6005,13 +776,30 @@ Note: In order to hide this table in the UI and the text report file, please set +-----------------------+-----------------------------+ ; Type ; Count ; +-----------------------+-----------------------------+ -; arriav_lcell_comb ; 1 ; -; normal ; 1 ; +; arriav_ff ; 2302 ; +; CLR ; 30 ; +; ENA ; 2272 ; +; arriav_lcell_comb ; 2023 ; +; arith ; 30 ; +; 2 data inputs ; 12 ; +; 3 data inputs ; 6 ; +; 5 data inputs ; 12 ; +; normal ; 1960 ; ; 0 data inputs ; 1 ; -; boundary_port ; 40 ; +; 1 data inputs ; 4 ; +; 2 data inputs ; 27 ; +; 3 data inputs ; 86 ; +; 4 data inputs ; 218 ; +; 5 data inputs ; 419 ; +; 6 data inputs ; 1205 ; +; shared ; 33 ; +; 0 data inputs ; 1 ; +; 2 data inputs ; 16 ; +; 4 data inputs ; 16 ; +; boundary_port ; 41 ; ; ; ; -; Max LUT depth ; 0.00 ; -; Average LUT depth ; 0.00 ; +; Max LUT depth ; 15.30 ; +; Average LUT depth ; 9.34 ; +-----------------------+-----------------------------+ @@ -6020,7 +808,7 @@ Note: In order to hide this table in the UI and the text report file, please set +----------------+--------------+ ; Partition Name ; Elapsed Time ; +----------------+--------------+ -; Top ; 00:00:01 ; +; Top ; 00:00:08 ; +----------------+--------------+ @@ -6030,7 +818,7 @@ Note: In order to hide this table in the UI and the text report file, please set Info: ******************************************************************* Info: Running Quartus Prime Analysis & Synthesis Info: Version 25.1std.0 Build 1129 10/21/2025 SC Lite Edition - Info: Processing started: Fri Oct 16 09:58:06 2026 + Info: Processing started: Fri Oct 16 14:20:43 2026 Info: Command: quartus_map --read_settings_files=on --write_settings_files=off assignment2 -c assignment2 Info (20032): Parallel compilation is enabled and will use up to 2 processors Info (12021): Found 14 design units, including 14 entities, in source file /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv @@ -6042,91 +830,52 @@ Info (12021): Found 14 design units, including 14 entities, in source file /home Info (12023): Found entity 6: control_unit File: /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/control_unit.sv Line: 5 Info (12023): Found entity 7: asu File: /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/asu.sv Line: 4 Info (12023): Found entity 8: lu File: /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/lu.sv Line: 3 - Info (12023): Found entity 9: alu File: /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/alu.sv Line: 9 + Info (12023): Found entity 9: alu File: /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/alu.sv Line: 10 Info (12023): Found entity 10: shifter File: /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/shifter.sv Line: 3 Info (12023): Found entity 11: sign_extender File: /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/sign_extender.sv Line: 4 Info (12023): Found entity 12: seven_seg File: /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/seven_seg.sv Line: 3 Info (12023): Found entity 13: seven_seg_4digit File: /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/seven_seg_4digit.sv Line: 5 Info (12023): Found entity 14: assignment2 File: /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv Line: 15 Info (12127): Elaborating entity "assignment2" for the top level hierarchy -Warning (10230): Verilog HDL assignment warning at assignment2.sv(87): truncated value with size 32 to match size of target (10) File: /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv Line: 87 -Warning (10030): Net "flags[2]" at assignment2.sv(48) has no driver or initial value, using a default initial value '0' File: /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv Line: 48 -Info (12128): Elaborating entity "instruction_counter" for hierarchy "instruction_counter:PC" File: /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv Line: 55 -Info (12128): Elaborating entity "rom" for hierarchy "rom:ROM" File: /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv Line: 57 +Info (12128): Elaborating entity "instruction_counter" for hierarchy "instruction_counter:PC" File: /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv Line: 59 +Info (12128): Elaborating entity "rom" for hierarchy "rom:ROM" File: /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv Line: 61 Warning (10850): Verilog HDL warning at rom.sv(16): number of words (18) in memory file does not match the number of elements in the address range [0:1023] File: /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/rom.sv Line: 16 Warning (10030): Net "mem.data_a" at rom.sv(9) has no driver or initial value, using a default initial value '0' File: /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/rom.sv Line: 9 Warning (10030): Net "mem.waddr_a" at rom.sv(9) has no driver or initial value, using a default initial value '0' File: /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/rom.sv Line: 9 Warning (10030): Net "mem.we_a" at rom.sv(9) has no driver or initial value, using a default initial value '0' File: /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/rom.sv Line: 9 -Info (12128): Elaborating entity "ram" for hierarchy "ram:RAM" File: /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv Line: 60 -Warning (10230): Verilog HDL assignment warning at ram.sv(18): truncated value with size 8 to match size of target (2) File: /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/ram.sv Line: 18 -Warning (10230): Verilog HDL assignment warning at ram.sv(24): truncated value with size 32 to match size of target (2) File: /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/ram.sv Line: 24 -Info (12128): Elaborating entity "control_unit" for hierarchy "control_unit:CONTROL_UNIT" File: /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv Line: 64 -Warning (10230): Verilog HDL assignment warning at control_unit.sv(29): truncated value with size 6 to match size of target (4) File: /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/control_unit.sv Line: 29 +Info (12128): Elaborating entity "ram" for hierarchy "ram:RAM" File: /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv Line: 64 +Warning (10230): Verilog HDL assignment warning at ram.sv(24): truncated value with size 32 to match size of target (5) File: /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/ram.sv Line: 24 +Info (12128): Elaborating entity "control_unit" for hierarchy "control_unit:CONTROL_UNIT" File: /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv Line: 68 +Warning (10230): Verilog HDL assignment warning at control_unit.sv(26): truncated value with size 6 to match size of target (1) File: /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/control_unit.sv Line: 26 +Warning (10230): Verilog HDL assignment warning at control_unit.sv(27): truncated value with size 6 to match size of target (1) File: /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/control_unit.sv Line: 27 +Warning (10230): Verilog HDL assignment warning at control_unit.sv(29): truncated value with size 8 to match size of target (4) File: /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/control_unit.sv Line: 29 Info (12128): Elaborating entity "instruction_classifier" for hierarchy "control_unit:CONTROL_UNIT|instruction_classifier:CLASSIFIER" File: /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/control_unit.sv Line: 23 -Info (12128): Elaborating entity "register_file" for hierarchy "register_file:REGS" File: /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv Line: 73 -Warning (10855): Verilog HDL warning at register_file.sv(14): initial value for variable regs should be constant File: /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/register_file.sv Line: 14 -Info (12128): Elaborating entity "sign_extender" for hierarchy "sign_extender:SIGNEXT" File: /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv Line: 76 -Info (12128): Elaborating entity "alu" for hierarchy "alu:ALU" File: /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv Line: 83 -Info (12128): Elaborating entity "asu" for hierarchy "alu:ALU|asu:adder_unit" File: /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/alu.sv Line: 18 -Info (12128): Elaborating entity "lu" for hierarchy "alu:ALU|lu:logic_unit" File: /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/alu.sv Line: 21 -Info (12128): Elaborating entity "seven_seg_4digit" for hierarchy "seven_seg_4digit:display" File: /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv Line: 104 +Info (12128): Elaborating entity "register_file" for hierarchy "register_file:REGS" File: /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv Line: 77 +Info (12128): Elaborating entity "sign_extender" for hierarchy "sign_extender:SIGNEXT" File: /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv Line: 80 +Warning (10230): Verilog HDL assignment warning at sign_extender.sv(10): truncated value with size 16 to match size of target (1) File: /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/sign_extender.sv Line: 10 +Info (12128): Elaborating entity "alu" for hierarchy "alu:ALU" File: /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv Line: 82 +Info (12128): Elaborating entity "asu" for hierarchy "alu:ALU|asu:adder_unit" File: /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/alu.sv Line: 21 +Info (12128): Elaborating entity "lu" for hierarchy "alu:ALU|lu:logic_unit" File: /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/alu.sv Line: 24 +Info (12128): Elaborating entity "seven_seg_4digit" for hierarchy "seven_seg_4digit:display" File: /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv Line: 110 Info (12128): Elaborating entity "seven_seg" for hierarchy "seven_seg_4digit:display|seven_seg:digit0" File: /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/seven_seg_4digit.sv Line: 18 -Info (276014): Found 1 instances of uninferred RAM logic - Info (276007): RAM logic "ram:RAM|mem" is uninferred due to asynchronous read logic File: /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/ram.sv Line: 13 -Warning (127007): Memory Initialization File or Hexadecimal (Intel-Format) File "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/Quartus/A2/db/assignment2.ram0_rom_d8639f5.hdl.mif" contains "don't care" values -- overwriting them with 0s -Warning (12241): 3 hierarchies have connectivity warnings - see the Connectivity Checks report folder +Warning (127007): Memory Initialization File or Hexadecimal (Intel-Format) File "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/Quartus/A2/db/assignment2.ram0_rom_a404080c.hdl.mif" contains "don't care" values -- overwriting them with 0s +Warning (12241): 2 hierarchies have connectivity warnings - see the Connectivity Checks report folder Warning (13024): Output pins are stuck at VCC or GND - Warning (13410): Pin "out_seg_0[0]" is stuck at VCC File: /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv Line: 23 - Warning (13410): Pin "out_seg_0[1]" is stuck at VCC File: /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv Line: 23 - Warning (13410): Pin "out_seg_0[2]" is stuck at VCC File: /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv Line: 23 - Warning (13410): Pin "out_seg_0[3]" is stuck at VCC File: /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv Line: 23 - Warning (13410): Pin "out_seg_0[4]" is stuck at VCC File: /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv Line: 23 - Warning (13410): Pin "out_seg_0[5]" is stuck at VCC File: /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv Line: 23 - Warning (13410): Pin "out_seg_0[6]" is stuck at VCC File: /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv Line: 23 - Warning (13410): Pin "out_seg_0[7]" is stuck at VCC File: /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv Line: 23 - Warning (13410): Pin "out_seg_1[0]" is stuck at VCC File: /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv Line: 24 - Warning (13410): Pin "out_seg_1[1]" is stuck at VCC File: /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv Line: 24 - Warning (13410): Pin "out_seg_1[2]" is stuck at VCC File: /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv Line: 24 - Warning (13410): Pin "out_seg_1[3]" is stuck at VCC File: /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv Line: 24 - Warning (13410): Pin "out_seg_1[4]" is stuck at VCC File: /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv Line: 24 - Warning (13410): Pin "out_seg_1[5]" is stuck at VCC File: /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv Line: 24 - Warning (13410): Pin "out_seg_1[6]" is stuck at VCC File: /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv Line: 24 - Warning (13410): Pin "out_seg_1[7]" is stuck at VCC File: /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv Line: 24 - Warning (13410): Pin "out_seg_2[0]" is stuck at VCC File: /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv Line: 25 - Warning (13410): Pin "out_seg_2[1]" is stuck at VCC File: /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv Line: 25 - Warning (13410): Pin "out_seg_2[2]" is stuck at VCC File: /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv Line: 25 - Warning (13410): Pin "out_seg_2[3]" is stuck at VCC File: /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv Line: 25 - Warning (13410): Pin "out_seg_2[4]" is stuck at VCC File: /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv Line: 25 - Warning (13410): Pin "out_seg_2[5]" is stuck at VCC File: /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv Line: 25 - Warning (13410): Pin "out_seg_2[6]" is stuck at VCC File: /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv Line: 25 - Warning (13410): Pin "out_seg_2[7]" is stuck at VCC File: /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv Line: 25 - Warning (13410): Pin "out_seg_3[0]" is stuck at VCC File: /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv Line: 28 - Warning (13410): Pin "out_seg_3[1]" is stuck at VCC File: /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv Line: 28 - Warning (13410): Pin "out_seg_3[2]" is stuck at VCC File: /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv Line: 28 - Warning (13410): Pin "out_seg_3[3]" is stuck at VCC File: /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv Line: 28 - Warning (13410): Pin "out_seg_3[4]" is stuck at VCC File: /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv Line: 28 - Warning (13410): Pin "out_seg_3[5]" is stuck at VCC File: /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv Line: 28 - Warning (13410): Pin "out_seg_3[6]" is stuck at VCC File: /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv Line: 28 - Warning (13410): Pin "out_seg_3[7]" is stuck at VCC File: /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv Line: 28 -Info (17049): 30 registers lost all their fanouts during netlist optimizations. + Warning (13410): Pin "out_seg_0[0]" is stuck at GND File: /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv Line: 23 + Warning (13410): Pin "out_seg_1[0]" is stuck at GND File: /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv Line: 24 + Warning (13410): Pin "out_seg_2[0]" is stuck at GND File: /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv Line: 25 + Warning (13410): Pin "out_seg_3[0]" is stuck at GND File: /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv Line: 28 +Info (286030): Timing-Driven Synthesis is running Info (16010): Generating hard_block partition "hard_block:auto_generated_inst" Info (16011): Adding 0 node(s), including 0 DDIO, 0 PLL, 0 transceiver and 0 LCELL -Warning (21074): Design contains 8 input pin(s) that do not drive logic - Warning (15610): No output dependent on input pin "HID_PC[0]" File: /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv Line: 20 - Warning (15610): No output dependent on input pin "HID_Hi_Low[0]" File: /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv Line: 21 - Warning (15610): No output dependent on input pin "HID_Register[4]" File: /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv Line: 19 - Warning (15610): No output dependent on input pin "HID_Register[2]" File: /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv Line: 19 - Warning (15610): No output dependent on input pin "HID_Register[0]" File: /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv Line: 19 - Warning (15610): No output dependent on input pin "HID_Register[1]" File: /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv Line: 19 - Warning (15610): No output dependent on input pin "HID_Register[3]" File: /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv Line: 19 - Warning (15610): No output dependent on input pin "clk[0]" File: /home/oliver/Documents/FPGA_Dev/FPGA_Uni/modules/assignment2.sv Line: 18 -Info (21057): Implemented 40 device resources after synthesis - the final resource count might be different - Info (21058): Implemented 8 input pins +Info (21057): Implemented 4331 device resources after synthesis - the final resource count might be different + Info (21058): Implemented 9 input pins Info (21059): Implemented 32 output pins -Info: Quartus Prime Analysis & Synthesis was successful. 0 errors, 54 warnings - Info: Peak virtual memory: 440 megabytes - Info: Processing ended: Fri Oct 16 09:58:19 2026 - Info: Elapsed time: 00:00:13 - Info: Total CPU time (on all processors): 00:00:27 + Info (21061): Implemented 4290 logic cells +Info: Quartus Prime Analysis & Synthesis was successful. 0 errors, 16 warnings + Info: Peak virtual memory: 465 megabytes + Info: Processing ended: Fri Oct 16 14:21:03 2026 + Info: Elapsed time: 00:00:20 + Info: Total CPU time (on all processors): 00:00:33 diff --git a/Quartus/A2/output_files/assignment2.map.summary b/Quartus/A2/output_files/assignment2.map.summary index fe6cf78..ec65787 100644 --- a/Quartus/A2/output_files/assignment2.map.summary +++ b/Quartus/A2/output_files/assignment2.map.summary @@ -1,11 +1,11 @@ -Analysis & Synthesis Status : Successful - Fri Oct 16 09:58:19 2026 +Analysis & Synthesis Status : Successful - Fri Oct 16 14:21:03 2026 Quartus Prime Version : 25.1std.0 Build 1129 10/21/2025 SC Lite Edition Revision Name : assignment2 Top-level Entity Name : assignment2 Family : Cyclone V Logic utilization (in ALMs) : N/A -Total registers : 0 -Total pins : 40 +Total registers : 2302 +Total pins : 41 Total virtual pins : 0 Total block memory bits : 0 Total DSP Blocks : 0 diff --git a/Quartus/A2/output_files/assignment2.pin b/Quartus/A2/output_files/assignment2.pin index 882ecda..1f9b07a 100644 --- a/Quartus/A2/output_files/assignment2.pin +++ b/Quartus/A2/output_files/assignment2.pin @@ -160,7 +160,7 @@ GND : AC5 : gnd : : VCCIO3A : AC6 : power : : 2.5V : 3A : VREFB3AN0 : AC7 : power : : : 3A : HID_Hi_Low[0] : AC8 : input : 1.2 V : : 3B : Y -RESERVED_INPUT_WITH_WEAK_PULLUP : AC9 : : : : 3B : +rst[0] : AC9 : input : 1.2 V : : 3B : Y HID_Register[2] : AC10 : input : 1.2 V : : 3B : Y GND : AC11 : gnd : : : : VREFB3BN0 : AC12 : power : : : 3B : @@ -312,7 +312,7 @@ GND : D3 : gnd : : GND : D4 : gnd : : : : nCE : D5 : : : : 9A : RESERVED_INPUT_WITH_WEAK_PULLUP : D6 : : : : 8A : -out_seg_1[0] : D7 : output : 2.5 V : : 8A : N +RESERVED_INPUT_WITH_WEAK_PULLUP : D7 : : : : 8A : RESERVED_INPUT_WITH_WEAK_PULLUP : D8 : : : : 8A : VCCIO8A : D9 : power : : 2.5V : 8A : RESERVED_INPUT_WITH_WEAK_PULLUP : D10 : : : : 7A : @@ -363,8 +363,8 @@ NC : F2 : : : GND : F3 : gnd : : : : GND : F4 : gnd : : : : nCONFIG : F5 : : : : 9A : -RESERVED_INPUT_WITH_WEAK_PULLUP : F6 : : : : 8A : -RESERVED_INPUT_WITH_WEAK_PULLUP : F7 : : : : 8A : +out_seg_1[0] : F6 : output : 2.5 V : : 8A : Y +out_seg_0[0] : F7 : output : 2.5 V : : 8A : Y VCCPGM : F8 : power : : 1.8V/2.5V/3.0V/3.3V : : VCCPD7A8A : F9 : power : : 2.5V : 7A, 8A : GND : F10 : gnd : : : : @@ -389,8 +389,8 @@ GND : G2 : gnd : : NC : G3 : : : : : NC : G4 : : : : : GND : G5 : gnd : : : : -RESERVED_INPUT_WITH_WEAK_PULLUP : G6 : : : : 8A : -RESERVED_INPUT_WITH_WEAK_PULLUP : G7 : : : : 8A : +out_seg_2[0] : G6 : output : 2.5 V : : 8A : Y +out_seg_3[0] : G7 : output : 2.5 V : : 8A : Y VCCIO8A : G8 : power : : 2.5V : 8A : VCC_AUX : G9 : power : : 2.5V : : RESERVED_INPUT_WITH_WEAK_PULLUP : G10 : : : : 8A : @@ -423,11 +423,11 @@ RESERVED_INPUT_WITH_WEAK_PULLUP : H10 : : : VCCIO7A : H11 : power : : 2.5V : 7A : RESERVED_INPUT_WITH_WEAK_PULLUP : H12 : : : : 7A : RESERVED_INPUT_WITH_WEAK_PULLUP : H13 : : : : 7A : -out_seg_3[0] : H14 : output : 2.5 V : : 7A : N +RESERVED_INPUT_WITH_WEAK_PULLUP : H14 : : : : 7A : RESERVED_INPUT_WITH_WEAK_PULLUP : H15 : : : : 7A : GND : H16 : gnd : : : : RESERVED_INPUT_WITH_WEAK_PULLUP : H17 : : : : 7A : -out_seg_2[0] : H18 : output : 2.5 V : : 7A : N +RESERVED_INPUT_WITH_WEAK_PULLUP : H18 : : : : 7A : RESERVED_INPUT_WITH_WEAK_PULLUP : H19 : : : : 6A : RESERVED_INPUT_WITH_WEAK_PULLUP : H20 : : : : 6A : VCCIO6A : H21 : power : : 2.5V : 6A : @@ -460,7 +460,7 @@ RESERVED_INPUT_WITH_WEAK_PULLUP : J21 : : : VCCPD6A : J22 : power : : 2.5V : 6A : RESERVED_INPUT_WITH_WEAK_PULLUP : J23 : : : : 6A : VCCIO6A : J24 : power : : 2.5V : 6A : -out_seg_0[0] : J25 : output : 2.5 V : : 6A : N +RESERVED_INPUT_WITH_WEAK_PULLUP : J25 : : : : 6A : RESERVED_INPUT_WITH_WEAK_PULLUP : J26 : : : : 6A : GXB_NC : K1 : : : : B1L : GXB_NC : K2 : : : : B1L : diff --git a/Quartus/A2/output_files/assignment2.sof b/Quartus/A2/output_files/assignment2.sof index 1c789f8..eb9c08b 100644 Binary files a/Quartus/A2/output_files/assignment2.sof and b/Quartus/A2/output_files/assignment2.sof differ diff --git a/Quartus/A2/output_files/assignment2.sta.rpt b/Quartus/A2/output_files/assignment2.sta.rpt index 5ea7ae9..0f4999e 100644 --- a/Quartus/A2/output_files/assignment2.sta.rpt +++ b/Quartus/A2/output_files/assignment2.sta.rpt @@ -1,5 +1,5 @@ Timing Analyzer report for assignment2 -Fri Oct 16 09:59:02 2026 +Fri Oct 16 14:23:28 2026 Quartus Prime Version 25.1std.0 Build 1129 10/21/2025 SC Lite Edition @@ -44,11 +44,17 @@ Quartus Prime Version 25.1std.0 Build 1129 10/21/2025 SC Lite Edition 36. Signal Integrity Metrics (Slow 1100mv 85c Model) 37. Signal Integrity Metrics (Fast 1100mv 0c Model) 38. Signal Integrity Metrics (Fast 1100mv 85c Model) - 39. Clock Transfers - 40. Report TCCS - 41. Report RSKM - 42. Unconstrained Paths Summary - 43. Timing Analyzer Messages + 39. Setup Transfers + 40. Hold Transfers + 41. Report TCCS + 42. Report RSKM + 43. Unconstrained Paths Summary + 44. Clock Status Summary + 45. Unconstrained Input Ports + 46. Unconstrained Output Ports + 47. Unconstrained Input Ports + 48. Unconstrained Output Ports + 49. Timing Analyzer Messages @@ -94,25 +100,32 @@ on the Quartus Prime software download page. ; Number detected on machine ; 4 ; ; Maximum allowed ; 2 ; ; ; ; -; Average used ; 1.00 ; +; Average used ; 1.58 ; ; Maximum used ; 2 ; ; ; ; ; Usage by Processor ; % Time Used ; ; Processor 1 ; 100.0% ; -; Processor 2 ; 0.0% ; +; Processor 2 ; 58.5% ; +----------------------------+-------------+ ----------- -; Clocks ; ----------- -No clocks to report. ++------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ +; Clocks ; ++------------+------+--------+------------+-------+-------+------------+-----------+-------------+-------+--------+-----------+------------+----------+--------+--------+------------+ +; Clock Name ; Type ; Period ; Frequency ; Rise ; Fall ; Duty Cycle ; Divide by ; Multiply by ; Phase ; Offset ; Edge List ; Edge Shift ; Inverted ; Master ; Source ; Targets ; ++------------+------+--------+------------+-------+-------+------------+-----------+-------------+-------+--------+-----------+------------+----------+--------+--------+------------+ +; clk[0] ; Base ; 1.000 ; 1000.0 MHz ; 0.000 ; 0.500 ; ; ; ; ; ; ; ; ; ; ; { clk[0] } ; ++------------+------+--------+------------+-------+-------+------------+-----------+-------------+-------+--------+-----------+------------+----------+--------+--------+------------+ --------------------------------------- -; Slow 1100mV 85C Model Fmax Summary ; --------------------------------------- -No paths to report. ++-------------------------------------------------+ +; Slow 1100mV 85C Model Fmax Summary ; ++-----------+-----------------+------------+------+ +; Fmax ; Restricted Fmax ; Clock Name ; Note ; ++-----------+-----------------+------------+------+ +; 62.97 MHz ; 62.97 MHz ; clk[0] ; ; ++-----------+-----------------+------------+------+ +This panel reports FMAX for every clock in the design, regardless of the user-specified clock periods. FMAX is only computed for paths where the source and destination registers or ports are driven by the same clock. Paths of different clocks, including generated clocks, are ignored. For paths between a clock and its inversion, FMAX is computed as if the rising and falling edges are scaled along with FMAX, such that the duty cycle (in terms of a percentage) is maintained. Altera recommends that you always use clock constraints and other slack reports for sign-off analysis. ---------------------------------- @@ -121,16 +134,22 @@ No paths to report. HTML report is unavailable in plain text report export. ---------------------------------------- ++-------------------------------------+ ; Slow 1100mV 85C Model Setup Summary ; ---------------------------------------- -No paths to report. ++--------+---------+------------------+ +; Clock ; Slack ; End Point TNS ; ++--------+---------+------------------+ +; clk[0] ; -14.881 ; -27730.277 ; ++--------+---------+------------------+ --------------------------------------- ++------------------------------------+ ; Slow 1100mV 85C Model Hold Summary ; --------------------------------------- -No paths to report. ++--------+-------+-------------------+ +; Clock ; Slack ; End Point TNS ; ++--------+-------+-------------------+ +; clk[0] ; 0.262 ; 0.000 ; ++--------+-------+-------------------+ ------------------------------------------ @@ -145,10 +164,13 @@ No paths to report. No paths to report. ------------------------------------------------------ ++---------------------------------------------------+ ; Slow 1100mV 85C Model Minimum Pulse Width Summary ; ------------------------------------------------------ -No paths to report. ++--------+--------+---------------------------------+ +; Clock ; Slack ; End Point TNS ; ++--------+--------+---------------------------------+ +; clk[0] ; -0.538 ; -1978.741 ; ++--------+--------+---------------------------------+ ----------------------------------------------- @@ -157,22 +179,32 @@ No paths to report. No synchronizer chains to report. -------------------------------------- -; Slow 1100mV 0C Model Fmax Summary ; -------------------------------------- -No paths to report. ++-------------------------------------------------+ +; Slow 1100mV 0C Model Fmax Summary ; ++-----------+-----------------+------------+------+ +; Fmax ; Restricted Fmax ; Clock Name ; Note ; ++-----------+-----------------+------------+------+ +; 64.35 MHz ; 64.35 MHz ; clk[0] ; ; ++-----------+-----------------+------------+------+ +This panel reports FMAX for every clock in the design, regardless of the user-specified clock periods. FMAX is only computed for paths where the source and destination registers or ports are driven by the same clock. Paths of different clocks, including generated clocks, are ignored. For paths between a clock and its inversion, FMAX is computed as if the rising and falling edges are scaled along with FMAX, such that the duty cycle (in terms of a percentage) is maintained. Altera recommends that you always use clock constraints and other slack reports for sign-off analysis. --------------------------------------- ++------------------------------------+ ; Slow 1100mV 0C Model Setup Summary ; --------------------------------------- -No paths to report. ++--------+---------+-----------------+ +; Clock ; Slack ; End Point TNS ; ++--------+---------+-----------------+ +; clk[0] ; -14.540 ; -27019.196 ; ++--------+---------+-----------------+ -------------------------------------- ++-----------------------------------+ ; Slow 1100mV 0C Model Hold Summary ; -------------------------------------- -No paths to report. ++--------+-------+------------------+ +; Clock ; Slack ; End Point TNS ; ++--------+-------+------------------+ +; clk[0] ; 0.245 ; 0.000 ; ++--------+-------+------------------+ ----------------------------------------- @@ -187,10 +219,13 @@ No paths to report. No paths to report. ----------------------------------------------------- ++--------------------------------------------------+ ; Slow 1100mV 0C Model Minimum Pulse Width Summary ; ----------------------------------------------------- -No paths to report. ++--------+--------+--------------------------------+ +; Clock ; Slack ; End Point TNS ; ++--------+--------+--------------------------------+ +; clk[0] ; -0.538 ; -2025.649 ; ++--------+--------+--------------------------------+ ---------------------------------------------- @@ -199,16 +234,22 @@ No paths to report. No synchronizer chains to report. ---------------------------------------- ++-------------------------------------+ ; Fast 1100mV 85C Model Setup Summary ; ---------------------------------------- -No paths to report. ++--------+--------+-------------------+ +; Clock ; Slack ; End Point TNS ; ++--------+--------+-------------------+ +; clk[0] ; -7.846 ; -13963.900 ; ++--------+--------+-------------------+ --------------------------------------- ++------------------------------------+ ; Fast 1100mV 85C Model Hold Summary ; --------------------------------------- -No paths to report. ++--------+-------+-------------------+ +; Clock ; Slack ; End Point TNS ; ++--------+-------+-------------------+ +; clk[0] ; 0.135 ; 0.000 ; ++--------+-------+-------------------+ ------------------------------------------ @@ -223,10 +264,13 @@ No paths to report. No paths to report. ------------------------------------------------------ ++---------------------------------------------------+ ; Fast 1100mV 85C Model Minimum Pulse Width Summary ; ------------------------------------------------------ -No paths to report. ++--------+-------+----------------------------------+ +; Clock ; Slack ; End Point TNS ; ++--------+-------+----------------------------------+ +; clk[0] ; 0.016 ; 0.000 ; ++--------+-------+----------------------------------+ ----------------------------------------------- @@ -235,16 +279,22 @@ No paths to report. No synchronizer chains to report. --------------------------------------- ++------------------------------------+ ; Fast 1100mV 0C Model Setup Summary ; --------------------------------------- -No paths to report. ++--------+--------+------------------+ +; Clock ; Slack ; End Point TNS ; ++--------+--------+------------------+ +; clk[0] ; -6.879 ; -12147.650 ; ++--------+--------+------------------+ -------------------------------------- ++-----------------------------------+ ; Fast 1100mV 0C Model Hold Summary ; -------------------------------------- -No paths to report. ++--------+-------+------------------+ +; Clock ; Slack ; End Point TNS ; ++--------+-------+------------------+ +; clk[0] ; 0.123 ; 0.000 ; ++--------+-------+------------------+ ----------------------------------------- @@ -259,10 +309,13 @@ No paths to report. No paths to report. ----------------------------------------------------- ++--------------------------------------------------+ ; Fast 1100mV 0C Model Minimum Pulse Width Summary ; ----------------------------------------------------- -No paths to report. ++--------+-------+---------------------------------+ +; Clock ; Slack ; End Point TNS ; ++--------+-------+---------------------------------+ +; clk[0] ; 0.015 ; 0.000 ; ++--------+-------+---------------------------------+ ---------------------------------------------- @@ -271,14 +324,16 @@ No paths to report. No synchronizer chains to report. -+----------------------------------------------------------------------------+ -; Multicorner Timing Analysis Summary ; -+------------------+-------+------+----------+---------+---------------------+ -; Clock ; Setup ; Hold ; Recovery ; Removal ; Minimum Pulse Width ; -+------------------+-------+------+----------+---------+---------------------+ -; Worst-case Slack ; N/A ; N/A ; N/A ; N/A ; N/A ; -; Design-wide TNS ; 0.0 ; 0.0 ; 0.0 ; 0.0 ; 0.0 ; -+------------------+-------+------+----------+---------+---------------------+ ++----------------------------------------------------------------------------------+ +; Multicorner Timing Analysis Summary ; ++------------------+------------+-------+----------+---------+---------------------+ +; Clock ; Setup ; Hold ; Recovery ; Removal ; Minimum Pulse Width ; ++------------------+------------+-------+----------+---------+---------------------+ +; Worst-case Slack ; -14.881 ; 0.123 ; N/A ; N/A ; -0.538 ; +; clk[0] ; -14.881 ; 0.123 ; N/A ; N/A ; -0.538 ; +; Design-wide TNS ; -27730.277 ; 0.0 ; 0.0 ; 0.0 ; -2025.649 ; +; clk[0] ; -27730.277 ; 0.000 ; N/A ; N/A ; -2025.649 ; ++------------------+------------+-------+----------+---------+---------------------+ +-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+ @@ -326,14 +381,15 @@ No synchronizer chains to report. +-----------------+--------------+-----------------+-----------------+ ; Pin ; I/O Standard ; 10-90 Rise Time ; 90-10 Fall Time ; +-----------------+--------------+-----------------+-----------------+ -; HID_PC[0] ; 1.2 V ; 960 ps ; 960 ps ; ; HID_Hi_Low[0] ; 1.2 V ; 960 ps ; 960 ps ; ; HID_Register[4] ; 1.2 V ; 960 ps ; 960 ps ; +; HID_Register[3] ; 1.2 V ; 960 ps ; 960 ps ; +; HID_Register[1] ; 1.2 V ; 960 ps ; 960 ps ; ; HID_Register[2] ; 1.2 V ; 960 ps ; 960 ps ; ; HID_Register[0] ; 1.2 V ; 960 ps ; 960 ps ; -; HID_Register[1] ; 1.2 V ; 960 ps ; 960 ps ; -; HID_Register[3] ; 1.2 V ; 960 ps ; 960 ps ; +; HID_PC[0] ; 1.2 V ; 960 ps ; 960 ps ; ; clk[0] ; 1.2 V ; 960 ps ; 960 ps ; +; rst[0] ; 1.2 V ; 960 ps ; 960 ps ; +-----------------+--------------+-----------------+-----------------+ @@ -342,7 +398,7 @@ No synchronizer chains to report. +--------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+ ; Pin ; I/O Standard ; Board Delay on Rise ; Board Delay on Fall ; Steady State Voh at FPGA Pin ; Steady State Vol at FPGA Pin ; Voh Max at FPGA Pin ; Vol Min at FPGA Pin ; Ringback Voltage on Rise at FPGA Pin ; Ringback Voltage on Fall at FPGA Pin ; 10-90 Rise Time at FPGA Pin ; 90-10 Fall Time at FPGA Pin ; Monotonic Rise at FPGA Pin ; Monotonic Fall at FPGA Pin ; Steady State Voh at Far-end ; Steady State Vol at Far-end ; Voh Max at Far-end ; Vol Min at Far-end ; Ringback Voltage on Rise at Far-end ; Ringback Voltage on Fall at Far-end ; 10-90 Rise Time at Far-end ; 90-10 Fall Time at Far-end ; Monotonic Rise at Far-end ; Monotonic Fall at Far-end ; +--------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+ -; out_seg_0[0] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 2.15e-07 V ; 2.41 V ; -0.0492 V ; 0.181 V ; 0.116 V ; 4.54e-10 s ; 4.44e-10 s ; No ; Yes ; 2.32 V ; 2.15e-07 V ; 2.41 V ; -0.0492 V ; 0.181 V ; 0.116 V ; 4.54e-10 s ; 4.44e-10 s ; No ; Yes ; +; out_seg_0[0] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 2.15e-07 V ; 2.41 V ; -0.0495 V ; 0.18 V ; 0.115 V ; 4.54e-10 s ; 4.44e-10 s ; No ; Yes ; 2.32 V ; 2.15e-07 V ; 2.41 V ; -0.0495 V ; 0.18 V ; 0.115 V ; 4.54e-10 s ; 4.44e-10 s ; No ; Yes ; ; out_seg_0[1] ; 1.2 V ; 0 s ; 0 s ; 1.09 V ; 1.26e-07 V ; 1.12 V ; -0.0464 V ; 0.081 V ; 0.112 V ; 6.59e-10 s ; 4.71e-10 s ; No ; No ; 1.09 V ; 1.26e-07 V ; 1.12 V ; -0.0464 V ; 0.081 V ; 0.112 V ; 6.59e-10 s ; 4.71e-10 s ; No ; No ; ; out_seg_0[2] ; 1.2 V ; 0 s ; 0 s ; 1.09 V ; 1.26e-07 V ; 1.12 V ; -0.0464 V ; 0.081 V ; 0.112 V ; 6.59e-10 s ; 4.71e-10 s ; No ; No ; 1.09 V ; 1.26e-07 V ; 1.12 V ; -0.0464 V ; 0.081 V ; 0.112 V ; 6.59e-10 s ; 4.71e-10 s ; No ; No ; ; out_seg_0[3] ; 1.2 V ; 0 s ; 0 s ; 1.09 V ; 1.12e-07 V ; 1.1 V ; -0.0175 V ; 0.055 V ; 0.073 V ; 6.35e-10 s ; 4.59e-10 s ; No ; No ; 1.09 V ; 1.12e-07 V ; 1.1 V ; -0.0175 V ; 0.055 V ; 0.073 V ; 6.35e-10 s ; 4.59e-10 s ; No ; No ; @@ -358,7 +414,7 @@ No synchronizer chains to report. ; out_seg_1[5] ; 1.2 V ; 0 s ; 0 s ; 1.09 V ; 1.24e-07 V ; 1.12 V ; -0.0538 V ; 0.13 V ; 0.103 V ; 4.91e-10 s ; 4.61e-10 s ; No ; No ; 1.09 V ; 1.24e-07 V ; 1.12 V ; -0.0538 V ; 0.13 V ; 0.103 V ; 4.91e-10 s ; 4.61e-10 s ; No ; No ; ; out_seg_1[6] ; 1.2 V ; 0 s ; 0 s ; 1.09 V ; 1.24e-07 V ; 1.12 V ; -0.0517 V ; 0.131 V ; 0.103 V ; 4.91e-10 s ; 4.61e-10 s ; No ; No ; 1.09 V ; 1.24e-07 V ; 1.12 V ; -0.0517 V ; 0.131 V ; 0.103 V ; 4.91e-10 s ; 4.61e-10 s ; No ; No ; ; out_seg_1[7] ; 1.2 V ; 0 s ; 0 s ; 1.09 V ; 1.24e-07 V ; 1.12 V ; -0.0517 V ; 0.131 V ; 0.103 V ; 4.91e-10 s ; 4.61e-10 s ; No ; No ; 1.09 V ; 1.24e-07 V ; 1.12 V ; -0.0517 V ; 0.131 V ; 0.103 V ; 4.91e-10 s ; 4.61e-10 s ; No ; No ; -; out_seg_2[0] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 2.19e-07 V ; 2.4 V ; -0.039 V ; 0.21 V ; 0.145 V ; 4.67e-10 s ; 4.63e-10 s ; No ; Yes ; 2.32 V ; 2.19e-07 V ; 2.4 V ; -0.039 V ; 0.21 V ; 0.145 V ; 4.67e-10 s ; 4.63e-10 s ; No ; Yes ; +; out_seg_2[0] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 2.15e-07 V ; 2.41 V ; -0.0495 V ; 0.18 V ; 0.115 V ; 4.54e-10 s ; 4.44e-10 s ; No ; Yes ; 2.32 V ; 2.15e-07 V ; 2.41 V ; -0.0495 V ; 0.18 V ; 0.115 V ; 4.54e-10 s ; 4.44e-10 s ; No ; Yes ; ; out_seg_2[1] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 2.15e-07 V ; 2.41 V ; -0.0492 V ; 0.181 V ; 0.116 V ; 4.54e-10 s ; 4.44e-10 s ; No ; Yes ; 2.32 V ; 2.15e-07 V ; 2.41 V ; -0.0492 V ; 0.181 V ; 0.116 V ; 4.54e-10 s ; 4.44e-10 s ; No ; Yes ; ; out_seg_2[2] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 2.15e-07 V ; 2.41 V ; -0.0495 V ; 0.18 V ; 0.115 V ; 4.54e-10 s ; 4.44e-10 s ; No ; Yes ; 2.32 V ; 2.15e-07 V ; 2.41 V ; -0.0495 V ; 0.18 V ; 0.115 V ; 4.54e-10 s ; 4.44e-10 s ; No ; Yes ; ; out_seg_2[3] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 1.88e-07 V ; 2.35 V ; -0.0185 V ; 0.153 V ; 0.099 V ; 4.6e-10 s ; 4.48e-10 s ; No ; Yes ; 2.32 V ; 1.88e-07 V ; 2.35 V ; -0.0185 V ; 0.153 V ; 0.099 V ; 4.6e-10 s ; 4.48e-10 s ; No ; Yes ; @@ -366,7 +422,7 @@ No synchronizer chains to report. ; out_seg_2[5] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 1.88e-07 V ; 2.35 V ; -0.0185 V ; 0.153 V ; 0.099 V ; 4.6e-10 s ; 4.48e-10 s ; No ; Yes ; 2.32 V ; 1.88e-07 V ; 2.35 V ; -0.0185 V ; 0.153 V ; 0.099 V ; 4.6e-10 s ; 4.48e-10 s ; No ; Yes ; ; out_seg_2[6] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 1.88e-07 V ; 2.35 V ; -0.0185 V ; 0.153 V ; 0.099 V ; 4.6e-10 s ; 4.48e-10 s ; No ; Yes ; 2.32 V ; 1.88e-07 V ; 2.35 V ; -0.0185 V ; 0.153 V ; 0.099 V ; 4.6e-10 s ; 4.48e-10 s ; No ; Yes ; ; out_seg_2[7] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 2.19e-07 V ; 2.4 V ; -0.039 V ; 0.21 V ; 0.145 V ; 4.67e-10 s ; 4.63e-10 s ; No ; Yes ; 2.32 V ; 2.19e-07 V ; 2.4 V ; -0.039 V ; 0.21 V ; 0.145 V ; 4.67e-10 s ; 4.63e-10 s ; No ; Yes ; -; out_seg_3[0] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 2.19e-07 V ; 2.4 V ; -0.039 V ; 0.21 V ; 0.145 V ; 4.67e-10 s ; 4.63e-10 s ; No ; Yes ; 2.32 V ; 2.19e-07 V ; 2.4 V ; -0.039 V ; 0.21 V ; 0.145 V ; 4.67e-10 s ; 4.63e-10 s ; No ; Yes ; +; out_seg_3[0] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 2.15e-07 V ; 2.41 V ; -0.0492 V ; 0.181 V ; 0.116 V ; 4.54e-10 s ; 4.44e-10 s ; No ; Yes ; 2.32 V ; 2.15e-07 V ; 2.41 V ; -0.0492 V ; 0.181 V ; 0.116 V ; 4.54e-10 s ; 4.44e-10 s ; No ; Yes ; ; out_seg_3[1] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 2.15e-07 V ; 2.41 V ; -0.0495 V ; 0.18 V ; 0.115 V ; 4.54e-10 s ; 4.44e-10 s ; No ; Yes ; 2.32 V ; 2.15e-07 V ; 2.41 V ; -0.0495 V ; 0.18 V ; 0.115 V ; 4.54e-10 s ; 4.44e-10 s ; No ; Yes ; ; out_seg_3[2] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 2.15e-07 V ; 2.41 V ; -0.0492 V ; 0.181 V ; 0.116 V ; 4.54e-10 s ; 4.44e-10 s ; No ; Yes ; 2.32 V ; 2.15e-07 V ; 2.41 V ; -0.0492 V ; 0.181 V ; 0.116 V ; 4.54e-10 s ; 4.44e-10 s ; No ; Yes ; ; out_seg_3[3] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 2.15e-07 V ; 2.41 V ; -0.0495 V ; 0.18 V ; 0.115 V ; 4.54e-10 s ; 4.44e-10 s ; No ; Yes ; 2.32 V ; 2.15e-07 V ; 2.41 V ; -0.0495 V ; 0.18 V ; 0.115 V ; 4.54e-10 s ; 4.44e-10 s ; No ; Yes ; @@ -382,7 +438,7 @@ No synchronizer chains to report. +--------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+ ; Pin ; I/O Standard ; Board Delay on Rise ; Board Delay on Fall ; Steady State Voh at FPGA Pin ; Steady State Vol at FPGA Pin ; Voh Max at FPGA Pin ; Vol Min at FPGA Pin ; Ringback Voltage on Rise at FPGA Pin ; Ringback Voltage on Fall at FPGA Pin ; 10-90 Rise Time at FPGA Pin ; 90-10 Fall Time at FPGA Pin ; Monotonic Rise at FPGA Pin ; Monotonic Fall at FPGA Pin ; Steady State Voh at Far-end ; Steady State Vol at Far-end ; Voh Max at Far-end ; Vol Min at Far-end ; Ringback Voltage on Rise at Far-end ; Ringback Voltage on Fall at Far-end ; 10-90 Rise Time at Far-end ; 90-10 Fall Time at Far-end ; Monotonic Rise at Far-end ; Monotonic Fall at Far-end ; +--------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+ -; out_seg_0[0] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 2.52e-05 V ; 2.38 V ; -0.032 V ; 0.204 V ; 0.181 V ; 4.74e-10 s ; 4.85e-10 s ; No ; Yes ; 2.32 V ; 2.52e-05 V ; 2.38 V ; -0.032 V ; 0.204 V ; 0.181 V ; 4.74e-10 s ; 4.85e-10 s ; No ; Yes ; +; out_seg_0[0] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 2.52e-05 V ; 2.38 V ; -0.0315 V ; 0.205 V ; 0.182 V ; 4.74e-10 s ; 4.85e-10 s ; No ; Yes ; 2.32 V ; 2.52e-05 V ; 2.38 V ; -0.0315 V ; 0.205 V ; 0.182 V ; 4.74e-10 s ; 4.85e-10 s ; No ; Yes ; ; out_seg_0[1] ; 1.2 V ; 0 s ; 0 s ; 1.09 V ; 1.76e-05 V ; 1.11 V ; -0.0281 V ; 0.09 V ; 0.14 V ; 6.73e-10 s ; 5.04e-10 s ; No ; No ; 1.09 V ; 1.76e-05 V ; 1.11 V ; -0.0281 V ; 0.09 V ; 0.14 V ; 6.73e-10 s ; 5.04e-10 s ; No ; No ; ; out_seg_0[2] ; 1.2 V ; 0 s ; 0 s ; 1.09 V ; 1.76e-05 V ; 1.11 V ; -0.0281 V ; 0.09 V ; 0.14 V ; 6.73e-10 s ; 5.04e-10 s ; No ; No ; 1.09 V ; 1.76e-05 V ; 1.11 V ; -0.0281 V ; 0.09 V ; 0.14 V ; 6.73e-10 s ; 5.04e-10 s ; No ; No ; ; out_seg_0[3] ; 1.2 V ; 0 s ; 0 s ; 1.09 V ; 1.61e-05 V ; 1.09 V ; -0.0084 V ; 0.066 V ; 0.108 V ; 6.59e-10 s ; 5.03e-10 s ; Yes ; Yes ; 1.09 V ; 1.61e-05 V ; 1.09 V ; -0.0084 V ; 0.066 V ; 0.108 V ; 6.59e-10 s ; 5.03e-10 s ; Yes ; Yes ; @@ -398,7 +454,7 @@ No synchronizer chains to report. ; out_seg_1[5] ; 1.2 V ; 0 s ; 0 s ; 1.09 V ; 1.73e-05 V ; 1.11 V ; -0.0321 V ; 0.075 V ; 0.122 V ; 6.54e-10 s ; 4.83e-10 s ; No ; No ; 1.09 V ; 1.73e-05 V ; 1.11 V ; -0.0321 V ; 0.075 V ; 0.122 V ; 6.54e-10 s ; 4.83e-10 s ; No ; No ; ; out_seg_1[6] ; 1.2 V ; 0 s ; 0 s ; 1.09 V ; 1.73e-05 V ; 1.11 V ; -0.0316 V ; 0.075 V ; 0.122 V ; 6.54e-10 s ; 4.82e-10 s ; No ; No ; 1.09 V ; 1.73e-05 V ; 1.11 V ; -0.0316 V ; 0.075 V ; 0.122 V ; 6.54e-10 s ; 4.82e-10 s ; No ; No ; ; out_seg_1[7] ; 1.2 V ; 0 s ; 0 s ; 1.09 V ; 1.73e-05 V ; 1.11 V ; -0.0316 V ; 0.075 V ; 0.122 V ; 6.54e-10 s ; 4.82e-10 s ; No ; No ; 1.09 V ; 1.73e-05 V ; 1.11 V ; -0.0316 V ; 0.075 V ; 0.122 V ; 6.54e-10 s ; 4.82e-10 s ; No ; No ; -; out_seg_2[0] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 2.56e-05 V ; 2.38 V ; -0.026 V ; 0.249 V ; 0.089 V ; 4.95e-10 s ; 6.01e-10 s ; No ; Yes ; 2.32 V ; 2.56e-05 V ; 2.38 V ; -0.026 V ; 0.249 V ; 0.089 V ; 4.95e-10 s ; 6.01e-10 s ; No ; Yes ; +; out_seg_2[0] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 2.52e-05 V ; 2.38 V ; -0.0315 V ; 0.205 V ; 0.182 V ; 4.74e-10 s ; 4.85e-10 s ; No ; Yes ; 2.32 V ; 2.52e-05 V ; 2.38 V ; -0.0315 V ; 0.205 V ; 0.182 V ; 4.74e-10 s ; 4.85e-10 s ; No ; Yes ; ; out_seg_2[1] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 2.52e-05 V ; 2.38 V ; -0.032 V ; 0.204 V ; 0.181 V ; 4.74e-10 s ; 4.85e-10 s ; No ; Yes ; 2.32 V ; 2.52e-05 V ; 2.38 V ; -0.032 V ; 0.204 V ; 0.181 V ; 4.74e-10 s ; 4.85e-10 s ; No ; Yes ; ; out_seg_2[2] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 2.52e-05 V ; 2.38 V ; -0.0315 V ; 0.205 V ; 0.182 V ; 4.74e-10 s ; 4.85e-10 s ; No ; Yes ; 2.32 V ; 2.52e-05 V ; 2.38 V ; -0.0315 V ; 0.205 V ; 0.182 V ; 4.74e-10 s ; 4.85e-10 s ; No ; Yes ; ; out_seg_2[3] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 2.27e-05 V ; 2.34 V ; -0.0089 V ; 0.206 V ; 0.058 V ; 4.97e-10 s ; 5.13e-10 s ; Yes ; Yes ; 2.32 V ; 2.27e-05 V ; 2.34 V ; -0.0089 V ; 0.206 V ; 0.058 V ; 4.97e-10 s ; 5.13e-10 s ; Yes ; Yes ; @@ -406,7 +462,7 @@ No synchronizer chains to report. ; out_seg_2[5] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 2.27e-05 V ; 2.34 V ; -0.0089 V ; 0.206 V ; 0.058 V ; 4.97e-10 s ; 5.13e-10 s ; Yes ; Yes ; 2.32 V ; 2.27e-05 V ; 2.34 V ; -0.0089 V ; 0.206 V ; 0.058 V ; 4.97e-10 s ; 5.13e-10 s ; Yes ; Yes ; ; out_seg_2[6] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 2.27e-05 V ; 2.34 V ; -0.0089 V ; 0.206 V ; 0.058 V ; 4.97e-10 s ; 5.13e-10 s ; Yes ; Yes ; 2.32 V ; 2.27e-05 V ; 2.34 V ; -0.0089 V ; 0.206 V ; 0.058 V ; 4.97e-10 s ; 5.13e-10 s ; Yes ; Yes ; ; out_seg_2[7] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 2.56e-05 V ; 2.38 V ; -0.026 V ; 0.249 V ; 0.089 V ; 4.95e-10 s ; 6.01e-10 s ; No ; Yes ; 2.32 V ; 2.56e-05 V ; 2.38 V ; -0.026 V ; 0.249 V ; 0.089 V ; 4.95e-10 s ; 6.01e-10 s ; No ; Yes ; -; out_seg_3[0] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 2.56e-05 V ; 2.38 V ; -0.026 V ; 0.249 V ; 0.089 V ; 4.95e-10 s ; 6.01e-10 s ; No ; Yes ; 2.32 V ; 2.56e-05 V ; 2.38 V ; -0.026 V ; 0.249 V ; 0.089 V ; 4.95e-10 s ; 6.01e-10 s ; No ; Yes ; +; out_seg_3[0] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 2.52e-05 V ; 2.38 V ; -0.032 V ; 0.204 V ; 0.181 V ; 4.74e-10 s ; 4.85e-10 s ; No ; Yes ; 2.32 V ; 2.52e-05 V ; 2.38 V ; -0.032 V ; 0.204 V ; 0.181 V ; 4.74e-10 s ; 4.85e-10 s ; No ; Yes ; ; out_seg_3[1] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 2.52e-05 V ; 2.38 V ; -0.0315 V ; 0.205 V ; 0.182 V ; 4.74e-10 s ; 4.85e-10 s ; No ; Yes ; 2.32 V ; 2.52e-05 V ; 2.38 V ; -0.0315 V ; 0.205 V ; 0.182 V ; 4.74e-10 s ; 4.85e-10 s ; No ; Yes ; ; out_seg_3[2] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 2.52e-05 V ; 2.38 V ; -0.032 V ; 0.204 V ; 0.181 V ; 4.74e-10 s ; 4.85e-10 s ; No ; Yes ; 2.32 V ; 2.52e-05 V ; 2.38 V ; -0.032 V ; 0.204 V ; 0.181 V ; 4.74e-10 s ; 4.85e-10 s ; No ; Yes ; ; out_seg_3[3] ; 2.5 V ; 0 s ; 0 s ; 2.32 V ; 2.52e-05 V ; 2.38 V ; -0.0315 V ; 0.205 V ; 0.182 V ; 4.74e-10 s ; 4.85e-10 s ; No ; Yes ; 2.32 V ; 2.52e-05 V ; 2.38 V ; -0.0315 V ; 0.205 V ; 0.182 V ; 4.74e-10 s ; 4.85e-10 s ; No ; Yes ; @@ -422,7 +478,7 @@ No synchronizer chains to report. +--------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+ ; Pin ; I/O Standard ; Board Delay on Rise ; Board Delay on Fall ; Steady State Voh at FPGA Pin ; Steady State Vol at FPGA Pin ; Voh Max at FPGA Pin ; Vol Min at FPGA Pin ; Ringback Voltage on Rise at FPGA Pin ; Ringback Voltage on Fall at FPGA Pin ; 10-90 Rise Time at FPGA Pin ; 90-10 Fall Time at FPGA Pin ; Monotonic Rise at FPGA Pin ; Monotonic Fall at FPGA Pin ; Steady State Voh at Far-end ; Steady State Vol at Far-end ; Voh Max at Far-end ; Vol Min at Far-end ; Ringback Voltage on Rise at Far-end ; Ringback Voltage on Fall at Far-end ; 10-90 Rise Time at Far-end ; 90-10 Fall Time at Far-end ; Monotonic Rise at Far-end ; Monotonic Fall at Far-end ; +--------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+ -; out_seg_0[0] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 4.14e-06 V ; 2.91 V ; -0.119 V ; 0.326 V ; 0.298 V ; 2.74e-10 s ; 2.8e-10 s ; No ; No ; 2.75 V ; 4.14e-06 V ; 2.91 V ; -0.119 V ; 0.326 V ; 0.298 V ; 2.74e-10 s ; 2.8e-10 s ; No ; No ; +; out_seg_0[0] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 4.14e-06 V ; 2.91 V ; -0.121 V ; 0.326 V ; 0.297 V ; 2.74e-10 s ; 2.8e-10 s ; No ; No ; 2.75 V ; 4.14e-06 V ; 2.91 V ; -0.121 V ; 0.326 V ; 0.297 V ; 2.74e-10 s ; 2.8e-10 s ; No ; No ; ; out_seg_0[1] ; 1.2 V ; 0 s ; 0 s ; 1.32 V ; 2.04e-06 V ; 1.41 V ; -0.082 V ; 0.189 V ; 0.214 V ; 2.71e-10 s ; 2.9e-10 s ; No ; No ; 1.32 V ; 2.04e-06 V ; 1.41 V ; -0.082 V ; 0.189 V ; 0.214 V ; 2.71e-10 s ; 2.9e-10 s ; No ; No ; ; out_seg_0[2] ; 1.2 V ; 0 s ; 0 s ; 1.32 V ; 2.04e-06 V ; 1.41 V ; -0.082 V ; 0.189 V ; 0.214 V ; 2.71e-10 s ; 2.9e-10 s ; No ; No ; 1.32 V ; 2.04e-06 V ; 1.41 V ; -0.082 V ; 0.189 V ; 0.214 V ; 2.71e-10 s ; 2.9e-10 s ; No ; No ; ; out_seg_0[3] ; 1.2 V ; 0 s ; 0 s ; 1.32 V ; 1.78e-06 V ; 1.36 V ; -0.0397 V ; 0.144 V ; 0.155 V ; 2.76e-10 s ; 2.9e-10 s ; No ; No ; 1.32 V ; 1.78e-06 V ; 1.36 V ; -0.0397 V ; 0.144 V ; 0.155 V ; 2.76e-10 s ; 2.9e-10 s ; No ; No ; @@ -438,7 +494,7 @@ No synchronizer chains to report. ; out_seg_1[5] ; 1.2 V ; 0 s ; 0 s ; 1.32 V ; 2e-06 V ; 1.42 V ; -0.0985 V ; 0.168 V ; 0.193 V ; 2.62e-10 s ; 2.77e-10 s ; No ; No ; 1.32 V ; 2e-06 V ; 1.42 V ; -0.0985 V ; 0.168 V ; 0.193 V ; 2.62e-10 s ; 2.77e-10 s ; No ; No ; ; out_seg_1[6] ; 1.2 V ; 0 s ; 0 s ; 1.32 V ; 2e-06 V ; 1.42 V ; -0.0978 V ; 0.167 V ; 0.193 V ; 2.62e-10 s ; 2.77e-10 s ; No ; No ; 1.32 V ; 2e-06 V ; 1.42 V ; -0.0978 V ; 0.167 V ; 0.193 V ; 2.62e-10 s ; 2.77e-10 s ; No ; No ; ; out_seg_1[7] ; 1.2 V ; 0 s ; 0 s ; 1.32 V ; 2e-06 V ; 1.42 V ; -0.0978 V ; 0.167 V ; 0.193 V ; 2.62e-10 s ; 2.77e-10 s ; No ; No ; 1.32 V ; 2e-06 V ; 1.42 V ; -0.0978 V ; 0.167 V ; 0.193 V ; 2.62e-10 s ; 2.77e-10 s ; No ; No ; -; out_seg_2[0] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 4.25e-06 V ; 2.9 V ; -0.107 V ; 0.378 V ; 0.16 V ; 2.87e-10 s ; 4.28e-10 s ; No ; No ; 2.75 V ; 4.25e-06 V ; 2.9 V ; -0.107 V ; 0.378 V ; 0.16 V ; 2.87e-10 s ; 4.28e-10 s ; No ; No ; +; out_seg_2[0] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 4.14e-06 V ; 2.91 V ; -0.121 V ; 0.326 V ; 0.297 V ; 2.74e-10 s ; 2.8e-10 s ; No ; No ; 2.75 V ; 4.14e-06 V ; 2.91 V ; -0.121 V ; 0.326 V ; 0.297 V ; 2.74e-10 s ; 2.8e-10 s ; No ; No ; ; out_seg_2[1] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 4.14e-06 V ; 2.91 V ; -0.119 V ; 0.326 V ; 0.298 V ; 2.74e-10 s ; 2.8e-10 s ; No ; No ; 2.75 V ; 4.14e-06 V ; 2.91 V ; -0.119 V ; 0.326 V ; 0.298 V ; 2.74e-10 s ; 2.8e-10 s ; No ; No ; ; out_seg_2[2] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 4.14e-06 V ; 2.91 V ; -0.121 V ; 0.326 V ; 0.297 V ; 2.74e-10 s ; 2.8e-10 s ; No ; No ; 2.75 V ; 4.14e-06 V ; 2.91 V ; -0.121 V ; 0.326 V ; 0.297 V ; 2.74e-10 s ; 2.8e-10 s ; No ; No ; ; out_seg_2[3] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 3.54e-06 V ; 2.81 V ; -0.0578 V ; 0.303 V ; 0.28 V ; 2.93e-10 s ; 3.01e-10 s ; No ; No ; 2.75 V ; 3.54e-06 V ; 2.81 V ; -0.0578 V ; 0.303 V ; 0.28 V ; 2.93e-10 s ; 3.01e-10 s ; No ; No ; @@ -446,7 +502,7 @@ No synchronizer chains to report. ; out_seg_2[5] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 3.54e-06 V ; 2.81 V ; -0.0578 V ; 0.303 V ; 0.28 V ; 2.93e-10 s ; 3.01e-10 s ; No ; No ; 2.75 V ; 3.54e-06 V ; 2.81 V ; -0.0578 V ; 0.303 V ; 0.28 V ; 2.93e-10 s ; 3.01e-10 s ; No ; No ; ; out_seg_2[6] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 3.54e-06 V ; 2.81 V ; -0.0578 V ; 0.303 V ; 0.28 V ; 2.93e-10 s ; 3.01e-10 s ; No ; No ; 2.75 V ; 3.54e-06 V ; 2.81 V ; -0.0578 V ; 0.303 V ; 0.28 V ; 2.93e-10 s ; 3.01e-10 s ; No ; No ; ; out_seg_2[7] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 4.25e-06 V ; 2.9 V ; -0.107 V ; 0.378 V ; 0.16 V ; 2.87e-10 s ; 4.28e-10 s ; No ; No ; 2.75 V ; 4.25e-06 V ; 2.9 V ; -0.107 V ; 0.378 V ; 0.16 V ; 2.87e-10 s ; 4.28e-10 s ; No ; No ; -; out_seg_3[0] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 4.25e-06 V ; 2.9 V ; -0.107 V ; 0.378 V ; 0.16 V ; 2.87e-10 s ; 4.28e-10 s ; No ; No ; 2.75 V ; 4.25e-06 V ; 2.9 V ; -0.107 V ; 0.378 V ; 0.16 V ; 2.87e-10 s ; 4.28e-10 s ; No ; No ; +; out_seg_3[0] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 4.14e-06 V ; 2.91 V ; -0.119 V ; 0.326 V ; 0.298 V ; 2.74e-10 s ; 2.8e-10 s ; No ; No ; 2.75 V ; 4.14e-06 V ; 2.91 V ; -0.119 V ; 0.326 V ; 0.298 V ; 2.74e-10 s ; 2.8e-10 s ; No ; No ; ; out_seg_3[1] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 4.14e-06 V ; 2.91 V ; -0.121 V ; 0.326 V ; 0.297 V ; 2.74e-10 s ; 2.8e-10 s ; No ; No ; 2.75 V ; 4.14e-06 V ; 2.91 V ; -0.121 V ; 0.326 V ; 0.297 V ; 2.74e-10 s ; 2.8e-10 s ; No ; No ; ; out_seg_3[2] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 4.14e-06 V ; 2.91 V ; -0.119 V ; 0.326 V ; 0.298 V ; 2.74e-10 s ; 2.8e-10 s ; No ; No ; 2.75 V ; 4.14e-06 V ; 2.91 V ; -0.119 V ; 0.326 V ; 0.298 V ; 2.74e-10 s ; 2.8e-10 s ; No ; No ; ; out_seg_3[3] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 4.14e-06 V ; 2.91 V ; -0.121 V ; 0.326 V ; 0.297 V ; 2.74e-10 s ; 2.8e-10 s ; No ; No ; 2.75 V ; 4.14e-06 V ; 2.91 V ; -0.121 V ; 0.326 V ; 0.297 V ; 2.74e-10 s ; 2.8e-10 s ; No ; No ; @@ -462,7 +518,7 @@ No synchronizer chains to report. +--------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+ ; Pin ; I/O Standard ; Board Delay on Rise ; Board Delay on Fall ; Steady State Voh at FPGA Pin ; Steady State Vol at FPGA Pin ; Voh Max at FPGA Pin ; Vol Min at FPGA Pin ; Ringback Voltage on Rise at FPGA Pin ; Ringback Voltage on Fall at FPGA Pin ; 10-90 Rise Time at FPGA Pin ; 90-10 Fall Time at FPGA Pin ; Monotonic Rise at FPGA Pin ; Monotonic Fall at FPGA Pin ; Steady State Voh at Far-end ; Steady State Vol at Far-end ; Voh Max at Far-end ; Vol Min at Far-end ; Ringback Voltage on Rise at Far-end ; Ringback Voltage on Fall at Far-end ; 10-90 Rise Time at Far-end ; 90-10 Fall Time at Far-end ; Monotonic Rise at Far-end ; Monotonic Fall at Far-end ; +--------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+ -; out_seg_0[0] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 0.000242 V ; 2.86 V ; -0.0805 V ; 0.358 V ; 0.156 V ; 3.01e-10 s ; 4.34e-10 s ; No ; No ; 2.75 V ; 0.000242 V ; 2.86 V ; -0.0805 V ; 0.358 V ; 0.156 V ; 3.01e-10 s ; 4.34e-10 s ; No ; No ; +; out_seg_0[0] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 0.000242 V ; 2.86 V ; -0.0814 V ; 0.36 V ; 0.156 V ; 3e-10 s ; 4.34e-10 s ; No ; No ; 2.75 V ; 0.000242 V ; 2.86 V ; -0.0814 V ; 0.36 V ; 0.156 V ; 3e-10 s ; 4.34e-10 s ; No ; No ; ; out_seg_0[1] ; 1.2 V ; 0 s ; 0 s ; 1.32 V ; 0.000148 V ; 1.39 V ; -0.0478 V ; 0.214 V ; 0.125 V ; 2.99e-10 s ; 4.71e-10 s ; No ; No ; 1.32 V ; 0.000148 V ; 1.39 V ; -0.0478 V ; 0.214 V ; 0.125 V ; 2.99e-10 s ; 4.71e-10 s ; No ; No ; ; out_seg_0[2] ; 1.2 V ; 0 s ; 0 s ; 1.32 V ; 0.000148 V ; 1.39 V ; -0.0478 V ; 0.214 V ; 0.125 V ; 2.99e-10 s ; 4.71e-10 s ; No ; No ; 1.32 V ; 0.000148 V ; 1.39 V ; -0.0478 V ; 0.214 V ; 0.125 V ; 2.99e-10 s ; 4.71e-10 s ; No ; No ; ; out_seg_0[3] ; 1.2 V ; 0 s ; 0 s ; 1.32 V ; 0.000132 V ; 1.35 V ; -0.0188 V ; 0.072 V ; 0.082 V ; 4.35e-10 s ; 4.57e-10 s ; No ; No ; 1.32 V ; 0.000132 V ; 1.35 V ; -0.0188 V ; 0.072 V ; 0.082 V ; 4.35e-10 s ; 4.57e-10 s ; No ; No ; @@ -478,7 +534,7 @@ No synchronizer chains to report. ; out_seg_1[5] ; 1.2 V ; 0 s ; 0 s ; 1.32 V ; 0.000145 V ; 1.4 V ; -0.056 V ; 0.186 V ; 0.116 V ; 2.8e-10 s ; 4.6e-10 s ; No ; No ; 1.32 V ; 0.000145 V ; 1.4 V ; -0.056 V ; 0.186 V ; 0.116 V ; 2.8e-10 s ; 4.6e-10 s ; No ; No ; ; out_seg_1[6] ; 1.2 V ; 0 s ; 0 s ; 1.32 V ; 0.000145 V ; 1.4 V ; -0.0574 V ; 0.186 V ; 0.115 V ; 2.8e-10 s ; 4.6e-10 s ; No ; No ; 1.32 V ; 0.000145 V ; 1.4 V ; -0.0574 V ; 0.186 V ; 0.115 V ; 2.8e-10 s ; 4.6e-10 s ; No ; No ; ; out_seg_1[7] ; 1.2 V ; 0 s ; 0 s ; 1.32 V ; 0.000145 V ; 1.4 V ; -0.0574 V ; 0.186 V ; 0.115 V ; 2.8e-10 s ; 4.6e-10 s ; No ; No ; 1.32 V ; 0.000145 V ; 1.4 V ; -0.0574 V ; 0.186 V ; 0.115 V ; 2.8e-10 s ; 4.6e-10 s ; No ; No ; -; out_seg_2[0] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 0.000247 V ; 2.85 V ; -0.0711 V ; 0.204 V ; 0.181 V ; 4.55e-10 s ; 4.49e-10 s ; No ; No ; 2.75 V ; 0.000247 V ; 2.85 V ; -0.0711 V ; 0.204 V ; 0.181 V ; 4.55e-10 s ; 4.49e-10 s ; No ; No ; +; out_seg_2[0] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 0.000242 V ; 2.86 V ; -0.0814 V ; 0.36 V ; 0.156 V ; 3e-10 s ; 4.34e-10 s ; No ; No ; 2.75 V ; 0.000242 V ; 2.86 V ; -0.0814 V ; 0.36 V ; 0.156 V ; 3e-10 s ; 4.34e-10 s ; No ; No ; ; out_seg_2[1] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 0.000242 V ; 2.86 V ; -0.0805 V ; 0.358 V ; 0.156 V ; 3.01e-10 s ; 4.34e-10 s ; No ; No ; 2.75 V ; 0.000242 V ; 2.86 V ; -0.0805 V ; 0.358 V ; 0.156 V ; 3.01e-10 s ; 4.34e-10 s ; No ; No ; ; out_seg_2[2] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 0.000242 V ; 2.86 V ; -0.0814 V ; 0.36 V ; 0.156 V ; 3e-10 s ; 4.34e-10 s ; No ; No ; 2.75 V ; 0.000242 V ; 2.86 V ; -0.0814 V ; 0.36 V ; 0.156 V ; 3e-10 s ; 4.34e-10 s ; No ; No ; ; out_seg_2[3] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 0.000213 V ; 2.79 V ; -0.0324 V ; 0.139 V ; 0.119 V ; 4.42e-10 s ; 4.33e-10 s ; No ; Yes ; 2.75 V ; 0.000213 V ; 2.79 V ; -0.0324 V ; 0.139 V ; 0.119 V ; 4.42e-10 s ; 4.33e-10 s ; No ; Yes ; @@ -486,7 +542,7 @@ No synchronizer chains to report. ; out_seg_2[5] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 0.000213 V ; 2.79 V ; -0.0324 V ; 0.139 V ; 0.119 V ; 4.42e-10 s ; 4.33e-10 s ; No ; Yes ; 2.75 V ; 0.000213 V ; 2.79 V ; -0.0324 V ; 0.139 V ; 0.119 V ; 4.42e-10 s ; 4.33e-10 s ; No ; Yes ; ; out_seg_2[6] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 0.000213 V ; 2.79 V ; -0.0324 V ; 0.139 V ; 0.119 V ; 4.42e-10 s ; 4.33e-10 s ; No ; Yes ; 2.75 V ; 0.000213 V ; 2.79 V ; -0.0324 V ; 0.139 V ; 0.119 V ; 4.42e-10 s ; 4.33e-10 s ; No ; Yes ; ; out_seg_2[7] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 0.000247 V ; 2.85 V ; -0.0711 V ; 0.204 V ; 0.181 V ; 4.55e-10 s ; 4.49e-10 s ; No ; No ; 2.75 V ; 0.000247 V ; 2.85 V ; -0.0711 V ; 0.204 V ; 0.181 V ; 4.55e-10 s ; 4.49e-10 s ; No ; No ; -; out_seg_3[0] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 0.000247 V ; 2.85 V ; -0.0711 V ; 0.204 V ; 0.181 V ; 4.55e-10 s ; 4.49e-10 s ; No ; No ; 2.75 V ; 0.000247 V ; 2.85 V ; -0.0711 V ; 0.204 V ; 0.181 V ; 4.55e-10 s ; 4.49e-10 s ; No ; No ; +; out_seg_3[0] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 0.000242 V ; 2.86 V ; -0.0805 V ; 0.358 V ; 0.156 V ; 3.01e-10 s ; 4.34e-10 s ; No ; No ; 2.75 V ; 0.000242 V ; 2.86 V ; -0.0805 V ; 0.358 V ; 0.156 V ; 3.01e-10 s ; 4.34e-10 s ; No ; No ; ; out_seg_3[1] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 0.000242 V ; 2.86 V ; -0.0814 V ; 0.36 V ; 0.156 V ; 3e-10 s ; 4.34e-10 s ; No ; No ; 2.75 V ; 0.000242 V ; 2.86 V ; -0.0814 V ; 0.36 V ; 0.156 V ; 3e-10 s ; 4.34e-10 s ; No ; No ; ; out_seg_3[2] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 0.000242 V ; 2.86 V ; -0.0805 V ; 0.358 V ; 0.156 V ; 3.01e-10 s ; 4.34e-10 s ; No ; No ; 2.75 V ; 0.000242 V ; 2.86 V ; -0.0805 V ; 0.358 V ; 0.156 V ; 3.01e-10 s ; 4.34e-10 s ; No ; No ; ; out_seg_3[3] ; 2.5 V ; 0 s ; 0 s ; 2.75 V ; 0.000242 V ; 2.86 V ; -0.0814 V ; 0.36 V ; 0.156 V ; 3e-10 s ; 4.34e-10 s ; No ; No ; 2.75 V ; 0.000242 V ; 2.86 V ; -0.0814 V ; 0.36 V ; 0.156 V ; 3e-10 s ; 4.34e-10 s ; No ; No ; @@ -497,10 +553,24 @@ No synchronizer chains to report. +--------------+--------------+---------------------+---------------------+------------------------------+------------------------------+---------------------+---------------------+--------------------------------------+--------------------------------------+-----------------------------+-----------------------------+----------------------------+----------------------------+-----------------------------+-----------------------------+--------------------+--------------------+-------------------------------------+-------------------------------------+----------------------------+----------------------------+---------------------------+---------------------------+ -------------------- -; Clock Transfers ; -------------------- -Nothing to report. ++--------------------------------------------------------------------+ +; Setup Transfers ; ++------------+----------+-----------+----------+----------+----------+ +; From Clock ; To Clock ; RR Paths ; FR Paths ; RF Paths ; FF Paths ; ++------------+----------+-----------+----------+----------+----------+ +; clk[0] ; clk[0] ; 359099286 ; 0 ; 0 ; 0 ; ++------------+----------+-----------+----------+----------+----------+ +Entries labeled "false path" only account for clock-to-clock false paths and not path-based false paths. As a result, actual path counts may be lower than reported. + + ++--------------------------------------------------------------------+ +; Hold Transfers ; ++------------+----------+-----------+----------+----------+----------+ +; From Clock ; To Clock ; RR Paths ; FR Paths ; RF Paths ; FF Paths ; ++------------+----------+-----------+----------+----------+----------+ +; clk[0] ; clk[0] ; 359099286 ; 0 ; 0 ; 0 ; ++------------+----------+-----------+----------+----------+----------+ +Entries labeled "false path" only account for clock-to-clock false paths and not path-based false paths. As a result, actual path counts may be lower than reported. --------------- @@ -522,20 +592,133 @@ No non-DPA dedicated SERDES Receiver circuitry present in device or used in desi +---------------------------------+-------+------+ ; Illegal Clocks ; 0 ; 0 ; ; Unconstrained Clocks ; 0 ; 0 ; -; Unconstrained Input Ports ; 0 ; 0 ; -; Unconstrained Input Port Paths ; 0 ; 0 ; -; Unconstrained Output Ports ; 0 ; 0 ; -; Unconstrained Output Port Paths ; 0 ; 0 ; +; Unconstrained Input Ports ; 8 ; 8 ; +; Unconstrained Input Port Paths ; 1522 ; 1522 ; +; Unconstrained Output Ports ; 28 ; 28 ; +; Unconstrained Output Port Paths ; 7350 ; 7350 ; +---------------------------------+-------+------+ ++--------------------------------------+ +; Clock Status Summary ; ++--------+--------+------+-------------+ +; Target ; Clock ; Type ; Status ; ++--------+--------+------+-------------+ +; clk[0] ; clk[0] ; Base ; Constrained ; ++--------+--------+------+-------------+ + + ++--------------------------------------------------------------------------------------------------------+ +; Unconstrained Input Ports ; ++-----------------+--------------------------------------------------------------------------------------+ +; Input Port ; Comment ; ++-----------------+--------------------------------------------------------------------------------------+ +; HID_Hi_Low[0] ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ; +; HID_PC[0] ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ; +; HID_Register[0] ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ; +; HID_Register[1] ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ; +; HID_Register[2] ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ; +; HID_Register[3] ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ; +; HID_Register[4] ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ; +; rst[0] ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ; ++-----------------+--------------------------------------------------------------------------------------+ + + ++------------------------------------------------------------------------------------------------------+ +; Unconstrained Output Ports ; ++--------------+---------------------------------------------------------------------------------------+ +; Output Port ; Comment ; ++--------------+---------------------------------------------------------------------------------------+ +; out_seg_0[1] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; +; out_seg_0[2] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; +; out_seg_0[3] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; +; out_seg_0[4] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; +; out_seg_0[5] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; +; out_seg_0[6] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; +; out_seg_0[7] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; +; out_seg_1[1] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; +; out_seg_1[2] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; +; out_seg_1[3] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; +; out_seg_1[4] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; +; out_seg_1[5] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; +; out_seg_1[6] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; +; out_seg_1[7] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; +; out_seg_2[1] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; +; out_seg_2[2] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; +; out_seg_2[3] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; +; out_seg_2[4] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; +; out_seg_2[5] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; +; out_seg_2[6] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; +; out_seg_2[7] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; +; out_seg_3[1] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; +; out_seg_3[2] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; +; out_seg_3[3] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; +; out_seg_3[4] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; +; out_seg_3[5] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; +; out_seg_3[6] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; +; out_seg_3[7] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ++--------------+---------------------------------------------------------------------------------------+ + + ++--------------------------------------------------------------------------------------------------------+ +; Unconstrained Input Ports ; ++-----------------+--------------------------------------------------------------------------------------+ +; Input Port ; Comment ; ++-----------------+--------------------------------------------------------------------------------------+ +; HID_Hi_Low[0] ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ; +; HID_PC[0] ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ; +; HID_Register[0] ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ; +; HID_Register[1] ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ; +; HID_Register[2] ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ; +; HID_Register[3] ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ; +; HID_Register[4] ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ; +; rst[0] ; No input delay, min/max delays, false-path exceptions, or max skew assignments found ; ++-----------------+--------------------------------------------------------------------------------------+ + + ++------------------------------------------------------------------------------------------------------+ +; Unconstrained Output Ports ; ++--------------+---------------------------------------------------------------------------------------+ +; Output Port ; Comment ; ++--------------+---------------------------------------------------------------------------------------+ +; out_seg_0[1] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; +; out_seg_0[2] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; +; out_seg_0[3] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; +; out_seg_0[4] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; +; out_seg_0[5] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; +; out_seg_0[6] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; +; out_seg_0[7] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; +; out_seg_1[1] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; +; out_seg_1[2] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; +; out_seg_1[3] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; +; out_seg_1[4] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; +; out_seg_1[5] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; +; out_seg_1[6] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; +; out_seg_1[7] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; +; out_seg_2[1] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; +; out_seg_2[2] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; +; out_seg_2[3] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; +; out_seg_2[4] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; +; out_seg_2[5] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; +; out_seg_2[6] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; +; out_seg_2[7] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; +; out_seg_3[1] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; +; out_seg_3[2] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; +; out_seg_3[3] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; +; out_seg_3[4] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; +; out_seg_3[5] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; +; out_seg_3[6] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; +; out_seg_3[7] ; No output delay, min/max delays, false-path exceptions, or max skew assignments found ; ++--------------+---------------------------------------------------------------------------------------+ + + +--------------------------+ ; Timing Analyzer Messages ; +--------------------------+ Info: ******************************************************************* Info: Running Quartus Prime Timing Analyzer Info: Version 25.1std.0 Build 1129 10/21/2025 SC Lite Edition - Info: Processing started: Fri Oct 16 09:58:57 2026 + Info: Processing started: Fri Oct 16 14:23:10 2026 Info: Command: quartus_sta assignment2 -c assignment2 Info: qsta_default_script.tcl version: #1 Info (20032): Parallel compilation is enabled and will use up to 2 processors @@ -543,60 +726,92 @@ Info (21077): Low junction temperature is 0 degrees C Info (21077): High junction temperature is 85 degrees C Critical Warning (332012): Synopsys Design Constraints File file not found: 'assignment2.sdc'. A Synopsys Design Constraints File is required by the Timing Analyzer to get proper timing constraints. Without it, the Compiler will not properly optimize the design. Info (332142): No user constrained base clocks found in the design. Calling "derive_clocks -period 1.0" -Info (332096): The command derive_clocks did not find any clocks to derive. No clocks were created or changed. -Warning (332068): No clocks defined in design. +Info (332105): Deriving Clocks + Info (332105): create_clock -period 1.000 -name clk[0] clk[0] Info (332143): No user constrained clock uncertainty found in the design. Calling "derive_clock_uncertainty" -Info (332154): The derive_clock_uncertainty command did not apply clock uncertainty to any clock-to-clock transfers. +Info (332123): Deriving Clock Uncertainty. Please refer to report_sdc in the Timing Analyzer to see clock uncertainties. Info: Found TIMING_ANALYZER_REPORT_SCRIPT_INCLUDE_DEFAULT_ANALYSIS = ON -Info (332159): No clocks to report Info: Analyzing Slow 1100mV 85C Model -Info (332140): No fmax paths to report -Info (332140): No Setup paths to report -Info (332140): No Hold paths to report +Critical Warning (332148): Timing requirements not met + Info (11105): For recommendations on closing timing, run Report Timing Closure Recommendations in the Timing Analyzer. +Info (332146): Worst-case setup slack is -14.881 + Info (332119): Slack End Point TNS Clock + Info (332119): ========= =================== ===================== + Info (332119): -14.881 -27730.277 clk[0] +Info (332146): Worst-case hold slack is 0.262 + Info (332119): Slack End Point TNS Clock + Info (332119): ========= =================== ===================== + Info (332119): 0.262 0.000 clk[0] Info (332140): No Recovery paths to report Info (332140): No Removal paths to report -Info (332140): No Minimum Pulse Width paths to report +Info (332146): Worst-case minimum pulse width slack is -0.538 + Info (332119): Slack End Point TNS Clock + Info (332119): ========= =================== ===================== + Info (332119): -0.538 -1978.741 clk[0] Info: Analyzing Slow 1100mV 0C Model Info (334003): Started post-fitting delay annotation Info (334004): Delay annotation completed successfully -Info (332142): No user constrained base clocks found in the design. Calling "derive_clocks -period 1.0" -Info (332096): The command derive_clocks did not find any clocks to derive. No clocks were created or changed. -Warning (332068): No clocks defined in design. -Info (332154): The derive_clock_uncertainty command did not apply clock uncertainty to any clock-to-clock transfers. -Info (332140): No fmax paths to report -Info (332140): No Setup paths to report -Info (332140): No Hold paths to report +Info (332123): Deriving Clock Uncertainty. Please refer to report_sdc in the Timing Analyzer to see clock uncertainties. +Critical Warning (332148): Timing requirements not met + Info (11105): For recommendations on closing timing, run Report Timing Closure Recommendations in the Timing Analyzer. +Info (332146): Worst-case setup slack is -14.540 + Info (332119): Slack End Point TNS Clock + Info (332119): ========= =================== ===================== + Info (332119): -14.540 -27019.196 clk[0] +Info (332146): Worst-case hold slack is 0.245 + Info (332119): Slack End Point TNS Clock + Info (332119): ========= =================== ===================== + Info (332119): 0.245 0.000 clk[0] Info (332140): No Recovery paths to report Info (332140): No Removal paths to report -Info (332140): No Minimum Pulse Width paths to report +Info (332146): Worst-case minimum pulse width slack is -0.538 + Info (332119): Slack End Point TNS Clock + Info (332119): ========= =================== ===================== + Info (332119): -0.538 -2025.649 clk[0] Info: Analyzing Fast 1100mV 85C Model Info (334003): Started post-fitting delay annotation Info (334004): Delay annotation completed successfully -Info (332142): No user constrained base clocks found in the design. Calling "derive_clocks -period 1.0" -Info (332096): The command derive_clocks did not find any clocks to derive. No clocks were created or changed. -Warning (332068): No clocks defined in design. -Info (332154): The derive_clock_uncertainty command did not apply clock uncertainty to any clock-to-clock transfers. -Info (332140): No Setup paths to report -Info (332140): No Hold paths to report +Info (332123): Deriving Clock Uncertainty. Please refer to report_sdc in the Timing Analyzer to see clock uncertainties. +Critical Warning (332148): Timing requirements not met + Info (11105): For recommendations on closing timing, run Report Timing Closure Recommendations in the Timing Analyzer. +Info (332146): Worst-case setup slack is -7.846 + Info (332119): Slack End Point TNS Clock + Info (332119): ========= =================== ===================== + Info (332119): -7.846 -13963.900 clk[0] +Info (332146): Worst-case hold slack is 0.135 + Info (332119): Slack End Point TNS Clock + Info (332119): ========= =================== ===================== + Info (332119): 0.135 0.000 clk[0] Info (332140): No Recovery paths to report Info (332140): No Removal paths to report -Info (332140): No Minimum Pulse Width paths to report +Info (332146): Worst-case minimum pulse width slack is 0.016 + Info (332119): Slack End Point TNS Clock + Info (332119): ========= =================== ===================== + Info (332119): 0.016 0.000 clk[0] Info: Analyzing Fast 1100mV 0C Model -Info (332142): No user constrained base clocks found in the design. Calling "derive_clocks -period 1.0" -Info (332096): The command derive_clocks did not find any clocks to derive. No clocks were created or changed. -Warning (332068): No clocks defined in design. -Info (332154): The derive_clock_uncertainty command did not apply clock uncertainty to any clock-to-clock transfers. -Info (332140): No Setup paths to report -Info (332140): No Hold paths to report +Info (332123): Deriving Clock Uncertainty. Please refer to report_sdc in the Timing Analyzer to see clock uncertainties. +Critical Warning (332148): Timing requirements not met + Info (11105): For recommendations on closing timing, run Report Timing Closure Recommendations in the Timing Analyzer. +Info (332146): Worst-case setup slack is -6.879 + Info (332119): Slack End Point TNS Clock + Info (332119): ========= =================== ===================== + Info (332119): -6.879 -12147.650 clk[0] +Info (332146): Worst-case hold slack is 0.123 + Info (332119): Slack End Point TNS Clock + Info (332119): ========= =================== ===================== + Info (332119): 0.123 0.000 clk[0] Info (332140): No Recovery paths to report Info (332140): No Removal paths to report -Info (332140): No Minimum Pulse Width paths to report -Info (332101): Design is fully constrained for setup requirements -Info (332101): Design is fully constrained for hold requirements +Info (332146): Worst-case minimum pulse width slack is 0.015 + Info (332119): Slack End Point TNS Clock + Info (332119): ========= =================== ===================== + Info (332119): 0.015 0.000 clk[0] +Info (332102): Design is not fully constrained for setup requirements +Info (332102): Design is not fully constrained for hold requirements Info: Quartus Prime Timing Analyzer was successful. 0 errors, 5 warnings - Info: Peak virtual memory: 765 megabytes - Info: Processing ended: Fri Oct 16 09:59:02 2026 - Info: Elapsed time: 00:00:05 - Info: Total CPU time (on all processors): 00:00:05 + Info: Peak virtual memory: 854 megabytes + Info: Processing ended: Fri Oct 16 14:23:28 2026 + Info: Elapsed time: 00:00:18 + Info: Total CPU time (on all processors): 00:00:27 diff --git a/Quartus/A2/output_files/assignment2.sta.summary b/Quartus/A2/output_files/assignment2.sta.summary index aa5b327..4f81236 100644 --- a/Quartus/A2/output_files/assignment2.sta.summary +++ b/Quartus/A2/output_files/assignment2.sta.summary @@ -2,4 +2,52 @@ Timing Analyzer Summary ------------------------------------------------------------ +Type : Slow 1100mV 85C Model Setup 'clk[0]' +Slack : -14.881 +TNS : -27730.277 + +Type : Slow 1100mV 85C Model Hold 'clk[0]' +Slack : 0.262 +TNS : 0.000 + +Type : Slow 1100mV 85C Model Minimum Pulse Width 'clk[0]' +Slack : -0.538 +TNS : -1978.741 + +Type : Slow 1100mV 0C Model Setup 'clk[0]' +Slack : -14.540 +TNS : -27019.196 + +Type : Slow 1100mV 0C Model Hold 'clk[0]' +Slack : 0.245 +TNS : 0.000 + +Type : Slow 1100mV 0C Model Minimum Pulse Width 'clk[0]' +Slack : -0.538 +TNS : -2025.649 + +Type : Fast 1100mV 85C Model Setup 'clk[0]' +Slack : -7.846 +TNS : -13963.900 + +Type : Fast 1100mV 85C Model Hold 'clk[0]' +Slack : 0.135 +TNS : 0.000 + +Type : Fast 1100mV 85C Model Minimum Pulse Width 'clk[0]' +Slack : 0.016 +TNS : 0.000 + +Type : Fast 1100mV 0C Model Setup 'clk[0]' +Slack : -6.879 +TNS : -12147.650 + +Type : Fast 1100mV 0C Model Hold 'clk[0]' +Slack : 0.123 +TNS : 0.000 + +Type : Fast 1100mV 0C Model Minimum Pulse Width 'clk[0]' +Slack : 0.015 +TNS : 0.000 + ------------------------------------------------------------ diff --git a/Quartus/A2/simulation/questa/assignment2.svo b/Quartus/A2/simulation/questa/assignment2.svo index 180cccc..543c89b 100644 --- a/Quartus/A2/simulation/questa/assignment2.svo +++ b/Quartus/A2/simulation/questa/assignment2.svo @@ -17,7 +17,7 @@ // PROGRAM "Quartus Prime" // VERSION "Version 25.1std.0 Build 1129 10/21/2025 SC Lite Edition" -// DATE "10/16/2026 09:59:05" +// DATE "10/16/2026 14:23:30" // // Device: Altera 5CGXFC5C6F27C7 Package FBGA672 @@ -31,6 +31,7 @@ module assignment2 ( clk, + rst, HID_Register, HID_PC, HID_Hi_Low, @@ -39,6 +40,7 @@ module assignment2 ( out_seg_2, out_seg_3); input [0:0] clk; +input [0:0] rst; input [4:0] HID_Register; input [0:0] HID_PC; input [0:0] HID_Hi_Low; @@ -48,8 +50,7 @@ output [7:0] out_seg_2; output [7:0] out_seg_3; // Design Ports Information -// HID_PC[0] => Location: PIN_W11, I/O Standard: 1.2 V, Current Strength: Default -// out_seg_0[0] => Location: PIN_J25, I/O Standard: 2.5 V, Current Strength: Default +// out_seg_0[0] => Location: PIN_F7, I/O Standard: 2.5 V, Current Strength: Default // out_seg_0[1] => Location: PIN_V19, I/O Standard: 1.2 V, Current Strength: Default // out_seg_0[2] => Location: PIN_V18, I/O Standard: 1.2 V, Current Strength: Default // out_seg_0[3] => Location: PIN_V17, I/O Standard: 1.2 V, Current Strength: Default @@ -57,7 +58,7 @@ output [7:0] out_seg_3; // out_seg_0[5] => Location: PIN_Y20, I/O Standard: 1.2 V, Current Strength: Default // out_seg_0[6] => Location: PIN_Y19, I/O Standard: 1.2 V, Current Strength: Default // out_seg_0[7] => Location: PIN_Y18, I/O Standard: 1.2 V, Current Strength: Default -// out_seg_1[0] => Location: PIN_D7, I/O Standard: 2.5 V, Current Strength: Default +// out_seg_1[0] => Location: PIN_F6, I/O Standard: 2.5 V, Current Strength: Default // out_seg_1[1] => Location: PIN_AA18, I/O Standard: 1.2 V, Current Strength: Default // out_seg_1[2] => Location: PIN_AD26, I/O Standard: 1.2 V, Current Strength: Default // out_seg_1[3] => Location: PIN_AB19, I/O Standard: 1.2 V, Current Strength: Default @@ -65,7 +66,7 @@ output [7:0] out_seg_3; // out_seg_1[5] => Location: PIN_AE25, I/O Standard: 1.2 V, Current Strength: Default // out_seg_1[6] => Location: PIN_AC19, I/O Standard: 1.2 V, Current Strength: Default // out_seg_1[7] => Location: PIN_AF24, I/O Standard: 1.2 V, Current Strength: Default -// out_seg_2[0] => Location: PIN_H18, I/O Standard: 2.5 V, Current Strength: Default +// out_seg_2[0] => Location: PIN_G6, I/O Standard: 2.5 V, Current Strength: Default // out_seg_2[1] => Location: PIN_AD7, I/O Standard: 2.5 V, Current Strength: Default // out_seg_2[2] => Location: PIN_AD6, I/O Standard: 2.5 V, Current Strength: Default // out_seg_2[3] => Location: PIN_U20, I/O Standard: 2.5 V, Current Strength: Default @@ -73,7 +74,7 @@ output [7:0] out_seg_3; // out_seg_2[5] => Location: PIN_V20, I/O Standard: 2.5 V, Current Strength: Default // out_seg_2[6] => Location: PIN_W21, I/O Standard: 2.5 V, Current Strength: Default // out_seg_2[7] => Location: PIN_W20, I/O Standard: 2.5 V, Current Strength: Default -// out_seg_3[0] => Location: PIN_H14, I/O Standard: 2.5 V, Current Strength: Default +// out_seg_3[0] => Location: PIN_G7, I/O Standard: 2.5 V, Current Strength: Default // out_seg_3[1] => Location: PIN_Y24, I/O Standard: 2.5 V, Current Strength: Default // out_seg_3[2] => Location: PIN_Y23, I/O Standard: 2.5 V, Current Strength: Default // out_seg_3[3] => Location: PIN_AA23, I/O Standard: 2.5 V, Current Strength: Default @@ -83,11 +84,13 @@ output [7:0] out_seg_3; // out_seg_3[7] => Location: PIN_AC22, I/O Standard: 2.5 V, Current Strength: Default // HID_Hi_Low[0] => Location: PIN_AC8, I/O Standard: 1.2 V, Current Strength: Default // HID_Register[4] => Location: PIN_AE19, I/O Standard: 1.2 V, Current Strength: Default +// HID_Register[3] => Location: PIN_Y11, I/O Standard: 1.2 V, Current Strength: Default +// HID_Register[1] => Location: PIN_V10, I/O Standard: 1.2 V, Current Strength: Default // HID_Register[2] => Location: PIN_AC10, I/O Standard: 1.2 V, Current Strength: Default // HID_Register[0] => Location: PIN_AB10, I/O Standard: 1.2 V, Current Strength: Default -// HID_Register[1] => Location: PIN_V10, I/O Standard: 1.2 V, Current Strength: Default -// HID_Register[3] => Location: PIN_Y11, I/O Standard: 1.2 V, Current Strength: Default +// HID_PC[0] => Location: PIN_W11, I/O Standard: 1.2 V, Current Strength: Default // clk[0] => Location: PIN_Y16, I/O Standard: 1.2 V, Current Strength: Default +// rst[0] => Location: PIN_AC9, I/O Standard: 1.2 V, Current Strength: Default wire gnd; @@ -101,20 +104,5037 @@ assign unknown = 1'bx; tri1 devclrn; tri1 devpor; tri1 devoe; -wire \HID_PC[0]~input_o ; -wire \HID_Hi_Low[0]~input_o ; +wire \~QUARTUS_CREATED_GND~I_combout ; wire \HID_Register[4]~input_o ; +wire \HID_Hi_Low[0]~input_o ; +wire \clk[0]~input_o ; +wire \clk[0]~inputCLKENA0_outclk ; +wire \rst[0]~input_o ; +wire \PC|pc[9]~DUPLICATE_q ; +wire \PC|pc[5]~DUPLICATE_q ; +wire \PC|pc[2]~DUPLICATE_q ; +wire \PC|pc[7]~DUPLICATE_q ; +wire \ROM|mem~8_combout ; +wire \Add0~13_sumout ; +wire \ROM|mem~7_combout ; +wire \Add0~14 ; +wire \Add0~21_sumout ; +wire \PC|pc[3]~DUPLICATE_q ; +wire \ROM|mem~25_combout ; +wire \Add0~22 ; +wire \Add0~30 ; +wire \Add0~38 ; +wire \Add0~45_sumout ; +wire \PC|pc[6]~DUPLICATE_q ; +wire \ROM|mem~20_combout ; +wire \Add0~46 ; +wire \Add0~54 ; +wire \Add0~62 ; +wire \Add0~69_sumout ; +wire \Add0~37_sumout ; +wire \ROM|mem~17_combout ; +wire \ROM|mem~0_combout ; +wire \ROM|mem~2_combout ; +wire \ROM|mem~1_combout ; +wire \CONTROL_UNIT|M2R[0]~0_combout ; +wire \PC|pc[8]~DUPLICATE_q ; +wire \ROM|mem~4_combout ; +wire \ROM|mem~5_combout ; +wire \CONTROL_UNIT|CLASSIFIER|Equal0~0_combout ; +wire \CONTROL_UNIT|ALU_FN~1_combout ; +wire \CONTROL_UNIT|B~0_combout ; +wire \comb~4_combout ; +wire \comb~3_combout ; +wire \REGS|Decoder0~1_combout ; +wire \ROM|mem~11_combout ; +wire \ROM|mem~19_combout ; +wire \comb~2_combout ; +wire \comb~0_combout ; +wire \ROM|mem~18_combout ; +wire \ROM|mem~24_combout ; +wire \comb~1_combout ; +wire \REGS|Decoder0~23_combout ; +wire \REGS|Decoder0~24_combout ; +wire \REGS|regs[8][30]~DUPLICATE_q ; +wire \ROM|mem~14_combout ; +wire \rt_alu[17]~11_combout ; +wire \ROM|mem~10_combout ; +wire \rt_alu[17]~10_combout ; +wire \CONTROL_UNIT|CLASSIFIER|Equal0~1_combout ; +wire \rt_alu[31]~39_combout ; +wire \rt_alu[31]~40_combout ; +wire \rt_alu[17]~4_combout ; +wire \REGS|Decoder0~3_combout ; +wire \REGS|Decoder0~12_combout ; +wire \REGS|Decoder0~15_combout ; +wire \REGS|regs[27][30]~q ; +wire \REGS|Decoder0~0_combout ; +wire \REGS|Decoder0~14_combout ; +wire \REGS|regs[19][30]~DUPLICATE_q ; +wire \REGS|Mux33~3_combout ; +wire \rt_alu[17]~5_combout ; +wire \ROM|mem~13_combout ; +wire \REGS|Decoder0~19_combout ; +wire \REGS|regs[31][30]~q ; +wire \REGS|Decoder0~18_combout ; +wire \REGS|regs[23][30]~q ; +wire \REGS|Mux33~4_combout ; +wire \REGS|Decoder0~8_combout ; +wire \REGS|regs[28][30]~q ; +wire \REGS|Decoder0~17_combout ; +wire \REGS|regs[29][30]~q ; +wire \REGS|Decoder0~7_combout ; +wire \REGS|regs[20][30]~q ; +wire \rt_alu[30]~257_combout ; +wire \ROM|mem~12_combout ; +wire \REGS|Decoder0~9_combout ; +wire \REGS|regs[22][30]~q ; +wire \REGS|regs[30][30]~feeder_combout ; +wire \REGS|Decoder0~10_combout ; +wire \REGS|regs[30][30]~q ; +wire \REGS|Mux33~5_combout ; +wire \rt_alu[30]~258_combout ; +wire \REGS|Decoder0~4_combout ; +wire \REGS|regs[24][30]~q ; +wire \REGS|Decoder0~13_combout ; +wire \REGS|regs[25][30]~q ; +wire \REGS|regs[16][30]~feeder_combout ; +wire \REGS|Decoder0~2_combout ; +wire \REGS|regs[16][30]~q ; +wire \rt_alu[30]~259_combout ; +wire \rt_alu[30]~260_combout ; +wire \REGS|Decoder0~29_combout ; +wire \REGS|regs[9][30]~DUPLICATE_q ; +wire \REGS|Decoder0~20_combout ; +wire \REGS|Decoder0~27_combout ; +wire \REGS|Decoder0~28_combout ; +wire \REGS|regs[1][30]~DUPLICATE_q ; +wire \REGS|Decoder0~21_combout ; +wire \REGS|Decoder0~30_combout ; +wire \REGS|regs[5][30]~q ; +wire \REGS|Decoder0~25_combout ; +wire \REGS|Decoder0~31_combout ; +wire \REGS|regs[13][30]~q ; +wire \REGS|Mux33~0_combout ; +wire \REGS|Decoder0~22_combout ; +wire \REGS|regs[4][30]~q ; +wire \REGS|Decoder0~26_combout ; +wire \REGS|regs[12][30]~DUPLICATE_q ; +wire \REGS|Mux33~1_combout ; +wire \rt_alu[30]~254_combout ; +wire \REGS|Decoder0~32_combout ; +wire \REGS|regs[2][30]~q ; +wire \REGS|Decoder0~33_combout ; +wire \REGS|regs[10][30]~q ; +wire \REGS|Decoder0~37_combout ; +wire \REGS|regs[11][30]~q ; +wire \rt_alu[30]~252_combout ; +wire \REGS|Decoder0~39_combout ; +wire \REGS|regs[15][30]~q ; +wire \REGS|Decoder0~35_combout ; +wire \REGS|regs[14][30]~q ; +wire \REGS|Decoder0~34_combout ; +wire \REGS|regs[6][30]~q ; +wire \rt_alu[30]~253_combout ; +wire \rt_alu[30]~255_combout ; +wire \rt_alu[30]~256_combout ; +wire \rt_alu[30]~261_combout ; +wire \CONTROL_UNIT|ALU_FN~0_combout ; +wire \ALU|Mux15~0_combout ; +wire \ALU|Mux29~1_combout ; +wire \REGS|regs[25][29]~q ; +wire \REGS|regs[24][29]~q ; +wire \REGS|regs[16][29]~q ; +wire \rt_alu[29]~238_combout ; +wire \REGS|regs[19][29]~q ; +wire \REGS|regs[27][29]~q ; +wire \REGS|Mux34~5_combout ; +wire \REGS|regs[31][29]~q ; +wire \REGS|regs[23][29]~q ; +wire \REGS|Mux34~3_combout ; +wire \REGS|regs[29][29]~q ; +wire \REGS|regs[20][29]~q ; +wire \REGS|regs[28][29]~q ; +wire \rt_alu[29]~236_combout ; +wire \REGS|regs[30][29]~q ; +wire \REGS|regs[22][29]~q ; +wire \REGS|Mux34~2_combout ; +wire \rt_alu[29]~237_combout ; +wire \REGS|Decoder0~6_combout ; +wire \REGS|regs[26][29]~q ; +wire \REGS|Decoder0~5_combout ; +wire \REGS|regs[18][29]~q ; +wire \REGS|Mux34~4_combout ; +wire \rt_alu[29]~239_combout ; +wire \REGS|regs[8][29]~DUPLICATE_q ; +wire \rt_alu[29]~240_combout ; +wire \REGS|regs[1][29]~q ; +wire \REGS|regs[11][29]~q ; +wire \REGS|regs[10][29]~q ; +wire \REGS|regs[2][29]~q ; +wire \rt_alu[29]~231_combout ; +wire \REGS|regs[13][29]~q ; +wire \REGS|regs[5][29]~q ; +wire \REGS|Mux34~1_combout ; +wire \REGS|regs[12][29]~q ; +wire \REGS|regs[4][29]~DUPLICATE_q ; +wire \REGS|Mux34~0_combout ; +wire \rt_alu[29]~233_combout ; +wire \REGS|regs[6][29]~q ; +wire \REGS|regs[15][29]~q ; +wire \REGS|regs[14][29]~q ; +wire \rt_alu[29]~232_combout ; +wire \rt_alu[29]~234_combout ; +wire \rt_alu[29]~235_combout ; +wire \rt_alu[29]~241_combout ; +wire \ALU|Mux2~0_combout ; +wire \ALU|adder_unit|operand[29]~13_combout ; +wire \REGS|regs[9][28]~q ; +wire \ROM|mem~15_combout ; +wire \REGS|Mux3~1_combout ; +wire \REGS|regs[13][28]~q ; +wire \REGS|regs[5][28]~q ; +wire \REGS|Mux35~0_combout ; +wire \REGS|regs[12][28]~q ; +wire \REGS|regs[4][28]~feeder_combout ; +wire \REGS|regs[4][28]~q ; +wire \REGS|Mux35~1_combout ; +wire \ROM|mem~16_combout ; +wire \REGS|regs[22][28]~q ; +wire \REGS|regs[30][28]~q ; +wire \REGS|Mux35~5_combout ; +wire \REGS|regs[23][28]~q ; +wire \REGS|regs[31][28]~q ; +wire \REGS|Mux35~4_combout ; +wire \REGS|Mux3~0_combout ; +wire \REGS|regs[26][28]~q ; +wire \REGS|regs[18][28]~q ; +wire \REGS|Mux35~2_combout ; +wire \REGS|Mux3~2_combout ; +wire \ALU|Mux3~0_combout ; +wire \REGS|regs[18][27]~q ; +wire \REGS|regs[26][27]~DUPLICATE_q ; +wire \REGS|Mux36~4_combout ; +wire \REGS|regs[23][27]~q ; +wire \REGS|regs[31][27]~feeder_combout ; +wire \REGS|regs[31][27]~q ; +wire \REGS|Mux36~3_combout ; +wire \REGS|regs[4][27]~q ; +wire \REGS|regs[12][27]~q ; +wire \REGS|Mux36~0_combout ; +wire \REGS|regs[5][27]~q ; +wire \REGS|regs[13][27]~q ; +wire \REGS|Mux36~1_combout ; +wire \REGS|regs[30][27]~q ; +wire \REGS|regs[22][27]~q ; +wire \REGS|Mux36~2_combout ; +wire \REGS|Mux4~0_combout ; +wire \REGS|regs[9][27]~q ; +wire \REGS|Mux4~1_combout ; +wire \REGS|Mux4~2_combout ; +wire \REGS|regs[19][27]~q ; +wire \REGS|regs[27][27]~q ; +wire \REGS|Mux36~5_combout ; +wire \REGS|regs[16][27]~q ; +wire \REGS|regs[25][27]~q ; +wire \REGS|regs[24][27]~feeder_combout ; +wire \REGS|regs[24][27]~q ; +wire \rt_alu[27]~198_combout ; +wire \REGS|regs[29][27]~q ; +wire \REGS|regs[28][27]~q ; +wire \REGS|regs[20][27]~DUPLICATE_q ; +wire \rt_alu[27]~196_combout ; +wire \rt_alu[27]~197_combout ; +wire \rt_alu[27]~199_combout ; +wire \REGS|regs[1][27]~q ; +wire \REGS|regs[10][27]~feeder_combout ; +wire \REGS|regs[10][27]~q ; +wire \REGS|regs[11][27]~q ; +wire \REGS|regs[2][27]~feeder_combout ; +wire \REGS|regs[2][27]~q ; +wire \rt_alu[27]~191_combout ; +wire \REGS|regs[14][27]~q ; +wire \REGS|regs[15][27]~q ; +wire \REGS|regs[6][27]~q ; +wire \rt_alu[27]~192_combout ; +wire \rt_alu[27]~193_combout ; +wire \rt_alu[27]~194_combout ; +wire \rt_alu[27]~195_combout ; +wire \rt_alu[27]~201_combout ; +wire \ALU|Mux4~0_combout ; +wire \REGS|regs[4][26]~q ; +wire \REGS|regs[12][26]~q ; +wire \REGS|Mux37~1_combout ; +wire \REGS|regs[13][26]~q ; +wire \REGS|regs[5][26]~q ; +wire \REGS|Mux37~0_combout ; +wire \REGS|regs[30][26]~q ; +wire \REGS|regs[22][26]~q ; +wire \REGS|Mux37~5_combout ; +wire \REGS|regs[31][26]~q ; +wire \REGS|regs[23][26]~q ; +wire \REGS|Mux37~4_combout ; +wire \REGS|Mux5~0_combout ; +wire \REGS|regs[18][26]~feeder_combout ; +wire \REGS|regs[18][26]~q ; +wire \REGS|regs[26][26]~q ; +wire \REGS|Mux37~2_combout ; +wire \REGS|regs[8][26]~q ; +wire \REGS|regs[9][26]~q ; +wire \REGS|Mux5~1_combout ; +wire \REGS|Mux5~2_combout ; +wire \ALU|Mux5~0_combout ; +wire \REGS|regs[8][25]~q ; +wire \rt_alu[25]~161_combout ; +wire \REGS|regs[25][25]~q ; +wire \REGS|regs[24][25]~q ; +wire \REGS|regs[16][25]~q ; +wire \rt_alu[25]~159_combout ; +wire \REGS|regs[27][25]~q ; +wire \REGS|regs[19][25]~q ; +wire \REGS|Mux38~5_combout ; +wire \REGS|regs[22][25]~feeder_combout ; +wire \REGS|regs[22][25]~q ; +wire \REGS|regs[30][25]~q ; +wire \REGS|Mux38~2_combout ; +wire \REGS|regs[20][25]~q ; +wire \REGS|regs[29][25]~q ; +wire \REGS|regs[28][25]~q ; +wire \rt_alu[25]~157_combout ; +wire \rt_alu[25]~158_combout ; +wire \REGS|regs[26][25]~q ; +wire \REGS|regs[18][25]~q ; +wire \REGS|Mux38~4_combout ; +wire \rt_alu[25]~160_combout ; +wire \REGS|regs[9][25]~DUPLICATE_q ; +wire \REGS|regs[1][25]~q ; +wire \REGS|regs[10][25]~q ; +wire \REGS|regs[11][25]~q ; +wire \REGS|regs[2][25]~DUPLICATE_q ; +wire \rt_alu[25]~152_combout ; +wire \REGS|regs[13][25]~q ; +wire \REGS|regs[5][25]~q ; +wire \REGS|Mux38~1_combout ; +wire \REGS|regs[4][25]~q ; +wire \REGS|regs[12][25]~feeder_combout ; +wire \REGS|regs[12][25]~q ; +wire \REGS|Mux38~0_combout ; +wire \rt_alu[25]~154_combout ; +wire \REGS|regs[15][25]~q ; +wire \REGS|regs[14][25]~q ; +wire \REGS|regs[6][25]~q ; +wire \rt_alu[25]~153_combout ; +wire \rt_alu[25]~155_combout ; +wire \rt_alu[25]~156_combout ; +wire \rt_alu[25]~162_combout ; +wire \ALU|Mux6~0_combout ; +wire \ALU|adder_unit|operand[25]~9_combout ; +wire \REGS|regs[8][24]~q ; +wire \REGS|regs[9][24]~q ; +wire \REGS|regs[1][24]~DUPLICATE_q ; +wire \REGS|regs[12][24]~q ; +wire \REGS|regs[4][24]~q ; +wire \REGS|Mux39~1_combout ; +wire \REGS|regs[5][24]~q ; +wire \REGS|regs[13][24]~q ; +wire \REGS|Mux39~0_combout ; +wire \rt_alu[24]~135_combout ; +wire \REGS|regs[11][24]~q ; +wire \REGS|regs[2][24]~q ; +wire \REGS|regs[10][24]~q ; +wire \rt_alu[24]~133_combout ; +wire \REGS|regs[14][24]~q ; +wire \REGS|regs[15][24]~q ; +wire \REGS|regs[6][24]~DUPLICATE_q ; +wire \rt_alu[24]~134_combout ; +wire \rt_alu[24]~136_combout ; +wire \rt_alu[24]~137_combout ; +wire \REGS|regs[26][24]~feeder_combout ; +wire \REGS|regs[26][24]~q ; +wire \REGS|regs[18][24]~q ; +wire \REGS|Mux39~2_combout ; +wire \REGS|regs[27][24]~q ; +wire \REGS|regs[19][24]~q ; +wire \REGS|Mux39~3_combout ; +wire \REGS|regs[29][24]~q ; +wire \REGS|regs[28][24]~q ; +wire \REGS|regs[20][24]~DUPLICATE_q ; +wire \rt_alu[24]~138_combout ; +wire \REGS|regs[30][24]~q ; +wire \REGS|regs[22][24]~q ; +wire \REGS|Mux39~5_combout ; +wire \rt_alu[24]~139_combout ; +wire \REGS|regs[24][24]~q ; +wire \REGS|regs[16][24]~q ; +wire \REGS|regs[25][24]~q ; +wire \rt_alu[24]~140_combout ; +wire \rt_alu[24]~141_combout ; +wire \rt_alu[24]~142_combout ; +wire \ALU|Mux7~0_combout ; +wire \REGS|regs[1][23]~q ; +wire \REGS|regs[9][23]~q ; +wire \REGS|regs[10][23]~q ; +wire \REGS|regs[11][23]~q ; +wire \REGS|regs[2][23]~q ; +wire \rt_alu[23]~122_combout ; +wire \REGS|regs[14][23]~q ; +wire \REGS|regs[15][23]~q ; +wire \REGS|regs[6][23]~q ; +wire \rt_alu[23]~123_combout ; +wire \REGS|regs[13][23]~q ; +wire \REGS|regs[5][23]~q ; +wire \REGS|Mux40~1_combout ; +wire \REGS|regs[12][23]~q ; +wire \REGS|regs[4][23]~feeder_combout ; +wire \REGS|regs[4][23]~q ; +wire \REGS|Mux40~0_combout ; +wire \rt_alu[23]~124_combout ; +wire \rt_alu[23]~125_combout ; +wire \rt_alu[23]~126_combout ; +wire \REGS|regs[8][23]~feeder_combout ; +wire \REGS|regs[8][23]~q ; +wire \rt_alu[23]~131_combout ; +wire \REGS|regs[27][23]~q ; +wire \REGS|regs[19][23]~feeder_combout ; +wire \REGS|regs[19][23]~q ; +wire \REGS|Mux40~5_combout ; +wire \REGS|regs[25][23]~q ; +wire \REGS|regs[16][23]~q ; +wire \REGS|regs[24][23]~q ; +wire \rt_alu[23]~129_combout ; +wire \REGS|regs[31][23]~q ; +wire \REGS|regs[23][23]~q ; +wire \REGS|Mux40~3_combout ; +wire \REGS|regs[30][23]~q ; +wire \REGS|regs[22][23]~q ; +wire \REGS|Mux40~2_combout ; +wire \REGS|regs[28][23]~q ; +wire \REGS|regs[29][23]~q ; +wire \REGS|regs[20][23]~q ; +wire \rt_alu[23]~127_combout ; +wire \rt_alu[23]~128_combout ; +wire \rt_alu[23]~130_combout ; +wire \rt_alu[23]~132_combout ; +wire \ALU|Mux8~0_combout ; +wire \ALU|adder_unit|operand[23]~8_combout ; +wire \REGS|regs[8][22]~q ; +wire \REGS|regs[18][22]~q ; +wire \REGS|regs[26][22]~q ; +wire \REGS|Mux41~2_combout ; +wire \REGS|regs[27][22]~q ; +wire \REGS|regs[19][22]~q ; +wire \REGS|Mux41~3_combout ; +wire \REGS|regs[23][22]~q ; +wire \REGS|regs[31][22]~feeder_combout ; +wire \REGS|regs[31][22]~q ; +wire \REGS|Mux41~4_combout ; +wire \REGS|regs[28][22]~q ; +wire \REGS|regs[20][22]~DUPLICATE_q ; +wire \REGS|regs[29][22]~q ; +wire \rt_alu[22]~117_combout ; +wire \rt_alu[22]~118_combout ; +wire \REGS|regs[16][22]~q ; +wire \REGS|regs[25][22]~q ; +wire \REGS|regs[24][22]~DUPLICATE_q ; +wire \rt_alu[22]~119_combout ; +wire \rt_alu[22]~120_combout ; +wire \REGS|regs[1][22]~q ; +wire \REGS|regs[9][22]~q ; +wire \REGS|regs[11][22]~q ; +wire \REGS|regs[10][22]~DUPLICATE_q ; +wire \REGS|regs[2][22]~DUPLICATE_q ; +wire \rt_alu[22]~112_combout ; +wire \REGS|regs[14][22]~q ; +wire \REGS|regs[15][22]~q ; +wire \REGS|regs[6][22]~q ; +wire \rt_alu[22]~113_combout ; +wire \REGS|regs[5][22]~q ; +wire \REGS|regs[13][22]~q ; +wire \REGS|Mux41~0_combout ; +wire \REGS|regs[12][22]~q ; +wire \REGS|regs[4][22]~q ; +wire \REGS|Mux41~1_combout ; +wire \rt_alu[22]~114_combout ; +wire \rt_alu[22]~115_combout ; +wire \rt_alu[22]~116_combout ; +wire \rt_alu[22]~121_combout ; +wire \ALU|Mux9~0_combout ; +wire \REGS|regs[9][21]~feeder_combout ; +wire \REGS|regs[9][21]~DUPLICATE_q ; +wire \REGS|regs[8][21]~DUPLICATE_q ; +wire \REGS|Mux10~1_combout ; +wire \REGS|regs[18][21]~feeder_combout ; +wire \REGS|regs[18][21]~q ; +wire \REGS|regs[26][21]~q ; +wire \REGS|Mux42~4_combout ; +wire \REGS|regs[22][21]~q ; +wire \REGS|regs[30][21]~q ; +wire \REGS|Mux42~2_combout ; +wire \REGS|regs[23][21]~q ; +wire \REGS|regs[31][21]~q ; +wire \REGS|Mux42~3_combout ; +wire \REGS|regs[13][21]~feeder_combout ; +wire \REGS|regs[13][21]~DUPLICATE_q ; +wire \REGS|regs[5][21]~q ; +wire \REGS|Mux42~1_combout ; +wire \REGS|regs[4][21]~q ; +wire \REGS|regs[12][21]~q ; +wire \REGS|Mux42~0_combout ; +wire \REGS|Mux10~0_combout ; +wire \REGS|Mux10~2_combout ; +wire \REGS|regs[24][21]~feeder_combout ; +wire \REGS|regs[24][21]~q ; +wire \REGS|regs[25][21]~q ; +wire \REGS|regs[16][21]~feeder_combout ; +wire \REGS|regs[16][21]~q ; +wire \rt_alu[21]~108_combout ; +wire \REGS|regs[27][21]~q ; +wire \REGS|regs[19][21]~q ; +wire \REGS|Mux42~5_combout ; +wire \REGS|regs[28][21]~q ; +wire \REGS|regs[20][21]~DUPLICATE_q ; +wire \REGS|regs[29][21]~q ; +wire \rt_alu[21]~106_combout ; +wire \rt_alu[21]~107_combout ; +wire \rt_alu[21]~109_combout ; +wire \REGS|regs[1][21]~DUPLICATE_q ; +wire \REGS|regs[6][21]~q ; +wire \REGS|regs[15][21]~feeder_combout ; +wire \REGS|regs[15][21]~q ; +wire \REGS|regs[14][21]~q ; +wire \rt_alu[21]~102_combout ; +wire \REGS|regs[2][21]~feeder_combout ; +wire \REGS|regs[2][21]~q ; +wire \REGS|regs[11][21]~feeder_combout ; +wire \REGS|regs[11][21]~q ; +wire \REGS|regs[10][21]~feeder_combout ; +wire \REGS|regs[10][21]~q ; +wire \rt_alu[21]~101_combout ; +wire \rt_alu[21]~103_combout ; +wire \rt_alu[21]~104_combout ; +wire \rt_alu[21]~105_combout ; +wire \rt_alu[21]~111_combout ; +wire \ALU|Mux10~0_combout ; +wire \REGS|regs[24][20]~q ; +wire \REGS|regs[16][20]~q ; +wire \REGS|regs[25][20]~q ; +wire \rt_alu[20]~98_combout ; +wire \REGS|regs[26][20]~q ; +wire \REGS|regs[18][20]~q ; +wire \REGS|Mux43~2_combout ; +wire \REGS|regs[27][20]~feeder_combout ; +wire \REGS|regs[27][20]~q ; +wire \REGS|regs[19][20]~feeder_combout ; +wire \REGS|regs[19][20]~DUPLICATE_q ; +wire \REGS|Mux43~3_combout ; +wire \REGS|regs[28][20]~q ; +wire \REGS|regs[29][20]~q ; +wire \REGS|regs[20][20]~DUPLICATE_q ; +wire \rt_alu[20]~96_combout ; +wire \REGS|regs[22][20]~q ; +wire \REGS|regs[30][20]~q ; +wire \REGS|Mux43~5_combout ; +wire \REGS|regs[23][20]~DUPLICATE_q ; +wire \REGS|regs[31][20]~q ; +wire \REGS|Mux43~4_combout ; +wire \rt_alu[20]~97_combout ; +wire \rt_alu[20]~99_combout ; +wire \REGS|regs[9][20]~q ; +wire \REGS|regs[1][20]~q ; +wire \REGS|regs[10][20]~q ; +wire \REGS|regs[11][20]~q ; +wire \REGS|regs[2][20]~q ; +wire \rt_alu[20]~91_combout ; +wire \REGS|regs[14][20]~q ; +wire \REGS|regs[15][20]~q ; +wire \REGS|regs[6][20]~q ; +wire \rt_alu[20]~92_combout ; +wire \REGS|regs[4][20]~q ; +wire \REGS|regs[12][20]~DUPLICATE_q ; +wire \REGS|Mux43~1_combout ; +wire \REGS|regs[5][20]~q ; +wire \REGS|regs[13][20]~q ; +wire \REGS|Mux43~0_combout ; +wire \rt_alu[20]~93_combout ; +wire \rt_alu[20]~94_combout ; +wire \rt_alu[20]~95_combout ; +wire \rt_alu[20]~100_combout ; +wire \ALU|Mux11~0_combout ; +wire \REGS|regs[26][19]~q ; +wire \REGS|regs[18][19]~q ; +wire \REGS|Mux44~4_combout ; +wire \REGS|regs[9][19]~q ; +wire \REGS|Mux12~1_combout ; +wire \REGS|regs[31][19]~q ; +wire \REGS|regs[23][19]~DUPLICATE_q ; +wire \REGS|Mux44~3_combout ; +wire \REGS|regs[5][19]~q ; +wire \REGS|regs[13][19]~q ; +wire \REGS|Mux44~1_combout ; +wire \REGS|regs[12][19]~q ; +wire \REGS|regs[4][19]~q ; +wire \REGS|Mux44~0_combout ; +wire \REGS|regs[22][19]~q ; +wire \REGS|regs[30][19]~q ; +wire \REGS|Mux44~2_combout ; +wire \REGS|Mux12~0_combout ; +wire \REGS|Mux12~2_combout ; +wire \REGS|regs[9][18]~q ; +wire \REGS|Mux13~1_combout ; +wire \REGS|regs[26][18]~q ; +wire \REGS|regs[18][18]~q ; +wire \REGS|Mux45~2_combout ; +wire \REGS|regs[23][18]~q ; +wire \REGS|regs[31][18]~q ; +wire \REGS|Mux45~4_combout ; +wire \REGS|regs[22][18]~q ; +wire \REGS|regs[30][18]~q ; +wire \REGS|Mux45~5_combout ; +wire \REGS|regs[5][18]~q ; +wire \REGS|regs[13][18]~q ; +wire \REGS|Mux45~0_combout ; +wire \REGS|regs[12][18]~q ; +wire \REGS|regs[4][18]~q ; +wire \REGS|Mux45~1_combout ; +wire \REGS|Mux13~0_combout ; +wire \REGS|Mux13~2_combout ; +wire \ALU|Mux13~0_combout ; +wire \rt_alu[3]~0_combout ; +wire \REGS|regs[26][17]~feeder_combout ; +wire \REGS|regs[26][17]~q ; +wire \REGS|regs[18][17]~feeder_combout ; +wire \REGS|regs[18][17]~q ; +wire \REGS|Mux46~4_combout ; +wire \REGS|regs[31][17]~DUPLICATE_q ; +wire \REGS|regs[23][17]~q ; +wire \REGS|Mux46~3_combout ; +wire \REGS|regs[30][17]~q ; +wire \REGS|regs[22][17]~q ; +wire \REGS|Mux46~2_combout ; +wire \REGS|regs[4][17]~q ; +wire \REGS|regs[12][17]~q ; +wire \REGS|Mux46~0_combout ; +wire \REGS|regs[13][17]~q ; +wire \REGS|regs[5][17]~feeder_combout ; +wire \REGS|regs[5][17]~q ; +wire \REGS|Mux46~1_combout ; +wire \REGS|Mux14~0_combout ; +wire \REGS|regs[9][17]~q ; +wire \REGS|regs[8][17]~feeder_combout ; +wire \REGS|regs[8][17]~q ; +wire \REGS|Mux14~1_combout ; +wire \REGS|Mux14~2_combout ; +wire \REGS|Mux46~7_combout ; +wire \REGS|regs[11][17]~q ; +wire \REGS|regs[2][17]~q ; +wire \REGS|regs[10][17]~q ; +wire \rt_alu[17]~65_combout ; +wire \REGS|regs[1][17]~feeder_combout ; +wire \REGS|regs[1][17]~q ; +wire \REGS|Mux46~6_combout ; +wire \REGS|regs[6][17]~feeder_combout ; +wire \REGS|regs[6][17]~q ; +wire \REGS|regs[15][17]~DUPLICATE_q ; +wire \REGS|regs[14][17]~q ; +wire \rt_alu[17]~66_combout ; +wire \rt_alu[17]~67_combout ; +wire \rt_alu[17]~68_combout ; +wire \rt_alu[17]~69_combout ; +wire \ALU|Mux14~0_combout ; +wire \REGS|regs[5][16]~q ; +wire \REGS|regs[13][16]~q ; +wire \REGS|Mux47~6_combout ; +wire \REGS|regs[22][16]~q ; +wire \REGS|regs[30][16]~q ; +wire \REGS|Mux47~3_combout ; +wire \REGS|regs[23][16]~DUPLICATE_q ; +wire \REGS|regs[31][16]~feeder_combout ; +wire \REGS|regs[31][16]~q ; +wire \REGS|Mux47~2_combout ; +wire \REGS|regs[12][16]~q ; +wire \REGS|regs[4][16]~feeder_combout ; +wire \REGS|regs[4][16]~q ; +wire \REGS|Mux47~7_combout ; +wire \REGS|Mux15~0_combout ; +wire \REGS|regs[26][16]~q ; +wire \REGS|regs[18][16]~feeder_combout ; +wire \REGS|regs[18][16]~q ; +wire \REGS|Mux47~0_combout ; +wire \REGS|regs[8][16]~feeder_combout ; +wire \REGS|regs[8][16]~DUPLICATE_q ; +wire \REGS|regs[9][16]~q ; +wire \REGS|Mux15~1_combout ; +wire \REGS|Mux15~2_combout ; +wire \REGS|regs[16][16]~q ; +wire \REGS|Decoder0~11_combout ; +wire \REGS|regs[17][16]~DUPLICATE_q ; +wire \rt_alu[16]~3_combout ; +wire \REGS|regs[27][16]~feeder_combout ; +wire \REGS|regs[27][16]~q ; +wire \REGS|regs[19][16]~feeder_combout ; +wire \REGS|regs[19][16]~q ; +wire \REGS|Mux47~1_combout ; +wire \REGS|regs[29][16]~q ; +wire \REGS|regs[28][16]~DUPLICATE_q ; +wire \REGS|regs[20][16]~DUPLICATE_q ; +wire \rt_alu[16]~1_combout ; +wire \rt_alu[16]~2_combout ; +wire \rt_alu[16]~6_combout ; +wire \REGS|regs[1][16]~feeder_combout ; +wire \REGS|regs[1][16]~q ; +wire \REGS|Mux47~4_combout ; +wire \REGS|regs[8][16]~q ; +wire \REGS|Mux47~5_combout ; +wire \REGS|regs[10][16]~q ; +wire \REGS|regs[2][16]~q ; +wire \REGS|regs[11][16]~DUPLICATE_q ; +wire \rt_alu[16]~7_combout ; +wire \REGS|regs[15][16]~q ; +wire \REGS|regs[6][16]~q ; +wire \REGS|regs[14][16]~feeder_combout ; +wire \REGS|regs[14][16]~q ; +wire \rt_alu[16]~8_combout ; +wire \rt_alu[16]~9_combout ; +wire \rt_alu[16]~12_combout ; +wire \rt_alu[16]~13_combout ; +wire \rt_alu[15]~280_combout ; +wire \REGS|regs[26][15]~q ; +wire \REGS|regs[18][15]~q ; +wire \REGS|Mux48~4_combout ; +wire \REGS|regs[8][15]~q ; +wire \REGS|regs[9][15]~q ; +wire \REGS|Mux16~1_combout ; +wire \REGS|regs[12][15]~feeder_combout ; +wire \REGS|regs[12][15]~q ; +wire \REGS|regs[4][15]~feeder_combout ; +wire \REGS|regs[4][15]~q ; +wire \REGS|Mux48~0_combout ; +wire \REGS|regs[5][15]~DUPLICATE_q ; +wire \REGS|regs[13][15]~feeder_combout ; +wire \REGS|regs[13][15]~DUPLICATE_q ; +wire \REGS|Mux48~1_combout ; +wire \REGS|regs[31][15]~feeder_combout ; +wire \REGS|regs[31][15]~q ; +wire \REGS|regs[23][15]~q ; +wire \REGS|Mux48~3_combout ; +wire \REGS|regs[22][15]~q ; +wire \REGS|regs[30][15]~DUPLICATE_q ; +wire \REGS|Mux48~2_combout ; +wire \REGS|Mux16~0_combout ; +wire \REGS|Mux16~2_combout ; +wire \REGS|regs[1][15]~q ; +wire \REGS|Mux48~5_combout ; +wire \REGS|Mux48~6_combout ; +wire \REGS|regs[2][15]~feeder_combout ; +wire \REGS|regs[2][15]~q ; +wire \REGS|regs[11][15]~q ; +wire \REGS|regs[10][15]~q ; +wire \rt_alu[15]~272_combout ; +wire \REGS|regs[6][15]~q ; +wire \REGS|regs[14][15]~q ; +wire \REGS|regs[15][15]~feeder_combout ; +wire \REGS|regs[15][15]~q ; +wire \rt_alu[15]~273_combout ; +wire \rt_alu[15]~274_combout ; +wire \rt_alu[15]~275_combout ; +wire \rt_alu[15]~281_combout ; +wire \ALU|Mux16~0_combout ; +wire \rt_alu[5]~32_combout ; +wire \REGS|regs[8][14]~feeder_combout ; +wire \REGS|regs[8][14]~DUPLICATE_q ; +wire \REGS|regs[9][14]~q ; +wire \REGS|Mux17~1_combout ; +wire \REGS|regs[26][14]~q ; +wire \REGS|regs[18][14]~q ; +wire \REGS|Mux49~0_combout ; +wire \REGS|regs[31][14]~q ; +wire \REGS|regs[23][14]~q ; +wire \REGS|Mux49~2_combout ; +wire \REGS|regs[13][14]~q ; +wire \REGS|regs[5][14]~q ; +wire \REGS|Mux49~6_combout ; +wire \REGS|regs[30][14]~feeder_combout ; +wire \REGS|regs[30][14]~q ; +wire \REGS|regs[22][14]~q ; +wire \REGS|Mux49~3_combout ; +wire \REGS|regs[12][14]~q ; +wire \REGS|regs[4][14]~DUPLICATE_q ; +wire \REGS|Mux49~7_combout ; +wire \REGS|Mux17~0_combout ; +wire \REGS|Mux17~2_combout ; +wire \ROM|mem~23_combout ; +wire \rt_alu[13]~246_combout ; +wire \REGS|regs[18][13]~q ; +wire \REGS|regs[26][13]~q ; +wire \REGS|Mux50~4_combout ; +wire \REGS|regs[9][13]~q ; +wire \REGS|Mux18~1_combout ; +wire \REGS|regs[13][13]~q ; +wire \REGS|regs[5][13]~q ; +wire \REGS|Mux50~1_combout ; +wire \REGS|regs[22][13]~q ; +wire \REGS|regs[30][13]~q ; +wire \REGS|Mux50~2_combout ; +wire \REGS|regs[12][13]~q ; +wire \REGS|regs[4][13]~feeder_combout ; +wire \REGS|regs[4][13]~q ; +wire \REGS|Mux50~0_combout ; +wire \REGS|regs[23][13]~q ; +wire \REGS|regs[31][13]~feeder_combout ; +wire \REGS|regs[31][13]~q ; +wire \REGS|Mux50~3_combout ; +wire \REGS|Mux18~0_combout ; +wire \REGS|Mux18~2_combout ; +wire \REGS|regs[27][13]~q ; +wire \REGS|regs[19][13]~q ; +wire \REGS|Mux50~7_combout ; +wire \REGS|regs[17][13]~q ; +wire \REGS|regs[16][13]~q ; +wire \rt_alu[13]~249_combout ; +wire \REGS|regs[28][13]~q ; +wire \REGS|regs[20][13]~q ; +wire \REGS|regs[29][13]~q ; +wire \rt_alu[13]~247_combout ; +wire \rt_alu[13]~248_combout ; +wire \rt_alu[13]~250_combout ; +wire \rt_alu[13]~251_combout ; +wire \ALU|Mux18~0_combout ; +wire \REGS|regs[26][12]~q ; +wire \REGS|regs[18][12]~q ; +wire \REGS|Mux51~4_combout ; +wire \REGS|regs[12][12]~q ; +wire \REGS|regs[4][12]~q ; +wire \REGS|Mux51~3_combout ; +wire \REGS|regs[13][12]~q ; +wire \REGS|regs[5][12]~DUPLICATE_q ; +wire \REGS|Mux51~2_combout ; +wire \REGS|regs[31][12]~feeder_combout ; +wire \REGS|regs[31][12]~q ; +wire \REGS|regs[23][12]~q ; +wire \REGS|Mux51~6_combout ; +wire \REGS|regs[30][12]~feeder_combout ; +wire \REGS|regs[30][12]~q ; +wire \REGS|regs[22][12]~q ; +wire \REGS|Mux51~7_combout ; +wire \REGS|Mux19~0_combout ; +wire \REGS|regs[9][12]~q ; +wire \REGS|Mux19~1_combout ; +wire \REGS|Mux19~2_combout ; +wire \ALU|Mux19~0_combout ; +wire \ROM|mem~21_combout ; +wire \rt_alu[11]~206_combout ; +wire \REGS|regs[11][11]~q ; +wire \REGS|regs[10][11]~q ; +wire \REGS|regs[2][11]~q ; +wire \rt_alu[11]~202_combout ; +wire \REGS|regs[8][11]~q ; +wire \REGS|Mux52~6_combout ; +wire \REGS|regs[1][11]~q ; +wire \REGS|regs[9][11]~feeder_combout ; +wire \REGS|regs[9][11]~q ; +wire \REGS|Mux52~5_combout ; +wire \REGS|regs[14][11]~q ; +wire \REGS|regs[15][11]~q ; +wire \REGS|regs[6][11]~q ; +wire \rt_alu[11]~203_combout ; +wire \REGS|regs[4][11]~q ; +wire \REGS|regs[12][11]~q ; +wire \REGS|Mux52~0_combout ; +wire \REGS|regs[13][11]~q ; +wire \REGS|regs[5][11]~q ; +wire \REGS|Mux52~1_combout ; +wire \rt_alu[11]~204_combout ; +wire \rt_alu[11]~205_combout ; +wire \REGS|regs[16][11]~q ; +wire \REGS|regs[17][11]~q ; +wire \rt_alu[11]~209_combout ; +wire \REGS|regs[19][11]~q ; +wire \REGS|regs[27][11]~feeder_combout ; +wire \REGS|regs[27][11]~q ; +wire \REGS|Mux52~7_combout ; +wire \REGS|regs[23][11]~feeder_combout ; +wire \REGS|regs[23][11]~q ; +wire \REGS|regs[31][11]~q ; +wire \REGS|Mux52~3_combout ; +wire \REGS|regs[29][11]~DUPLICATE_q ; +wire \REGS|regs[20][11]~q ; +wire \REGS|regs[28][11]~q ; +wire \rt_alu[11]~207_combout ; +wire \REGS|regs[22][11]~q ; +wire \REGS|regs[30][11]~q ; +wire \REGS|Mux52~2_combout ; +wire \rt_alu[11]~208_combout ; +wire \rt_alu[11]~210_combout ; +wire \rt_alu[11]~211_combout ; +wire \ALU|Mux20~0_combout ; +wire \ALU|adder_unit|operand[11]~12_combout ; +wire \REGS|regs[27][10]~q ; +wire \REGS|regs[19][10]~q ; +wire \REGS|Mux53~5_combout ; +wire \REGS|regs[16][10]~feeder_combout ; +wire \REGS|regs[16][10]~q ; +wire \REGS|regs[17][10]~DUPLICATE_q ; +wire \rt_alu[10]~188_combout ; +wire \REGS|regs[29][10]~DUPLICATE_q ; +wire \REGS|regs[28][10]~DUPLICATE_q ; +wire \REGS|regs[20][10]~q ; +wire \rt_alu[10]~186_combout ; +wire \REGS|regs[30][10]~q ; +wire \REGS|regs[22][10]~q ; +wire \REGS|Mux53~7_combout ; +wire \REGS|regs[23][10]~q ; +wire \REGS|regs[31][10]~q ; +wire \REGS|Mux53~6_combout ; +wire \rt_alu[10]~187_combout ; +wire \rt_alu[10]~189_combout ; +wire \REGS|regs[9][10]~feeder_combout ; +wire \REGS|regs[9][10]~q ; +wire \REGS|regs[1][10]~q ; +wire \REGS|Mux53~0_combout ; +wire \REGS|regs[8][10]~feeder_combout ; +wire \REGS|regs[8][10]~DUPLICATE_q ; +wire \REGS|Mux53~1_combout ; +wire \REGS|regs[11][10]~q ; +wire \REGS|regs[2][10]~feeder_combout ; +wire \REGS|regs[2][10]~DUPLICATE_q ; +wire \REGS|regs[10][10]~feeder_combout ; +wire \REGS|regs[10][10]~q ; +wire \rt_alu[10]~182_combout ; +wire \REGS|regs[12][10]~q ; +wire \REGS|regs[4][10]~q ; +wire \REGS|Mux53~3_combout ; +wire \REGS|regs[14][10]~q ; +wire \REGS|regs[15][10]~q ; +wire \REGS|regs[6][10]~q ; +wire \rt_alu[10]~183_combout ; +wire \REGS|regs[13][10]~q ; +wire \REGS|regs[5][10]~q ; +wire \REGS|Mux53~2_combout ; +wire \rt_alu[10]~184_combout ; +wire \rt_alu[10]~185_combout ; +wire \rt_alu[10]~190_combout ; +wire \ALU|Mux21~0_combout ; +wire \REGS|regs[8][9]~DUPLICATE_q ; +wire \REGS|Mux54~6_combout ; +wire \REGS|regs[2][9]~feeder_combout ; +wire \REGS|regs[2][9]~q ; +wire \REGS|regs[10][9]~feeder_combout ; +wire \REGS|regs[10][9]~q ; +wire \REGS|regs[11][9]~q ; +wire \rt_alu[9]~163_combout ; +wire \REGS|regs[1][9]~feeder_combout ; +wire \REGS|regs[1][9]~q ; +wire \REGS|regs[9][9]~DUPLICATE_q ; +wire \REGS|Mux54~5_combout ; +wire \REGS|regs[12][9]~feeder_combout ; +wire \REGS|regs[12][9]~DUPLICATE_q ; +wire \REGS|regs[4][9]~feeder_combout ; +wire \REGS|regs[4][9]~q ; +wire \REGS|Mux54~0_combout ; +wire \REGS|regs[5][9]~q ; +wire \REGS|regs[13][9]~q ; +wire \REGS|Mux54~1_combout ; +wire \REGS|regs[14][9]~feeder_combout ; +wire \REGS|regs[14][9]~q ; +wire \REGS|regs[6][9]~feeder_combout ; +wire \REGS|regs[6][9]~q ; +wire \REGS|regs[15][9]~q ; +wire \rt_alu[9]~164_combout ; +wire \rt_alu[9]~165_combout ; +wire \rt_alu[9]~166_combout ; +wire \rt_alu[9]~171_combout ; +wire \REGS|regs[8][9]~q ; +wire \REGS|Mux22~1_combout ; +wire \REGS|regs[30][9]~q ; +wire \REGS|regs[22][9]~q ; +wire \REGS|Mux54~2_combout ; +wire \REGS|regs[31][9]~q ; +wire \REGS|regs[23][9]~q ; +wire \REGS|Mux54~3_combout ; +wire \REGS|Mux22~0_combout ; +wire \REGS|Mux22~2_combout ; +wire \ALU|Mux22~0_combout ; +wire \REGS|regs[26][8]~q ; +wire \REGS|regs[18][8]~DUPLICATE_q ; +wire \REGS|Mux55~4_combout ; +wire \REGS|regs[8][8]~feeder_combout ; +wire \REGS|regs[8][8]~q ; +wire \REGS|Mux23~1_combout ; +wire \REGS|regs[30][8]~DUPLICATE_q ; +wire \REGS|regs[22][8]~q ; +wire \REGS|Mux55~7_combout ; +wire \REGS|regs[5][8]~q ; +wire \REGS|regs[13][8]~q ; +wire \REGS|Mux55~2_combout ; +wire \REGS|regs[4][8]~q ; +wire \REGS|regs[12][8]~DUPLICATE_q ; +wire \REGS|Mux55~3_combout ; +wire \REGS|regs[23][8]~feeder_combout ; +wire \REGS|regs[23][8]~q ; +wire \REGS|regs[31][8]~feeder_combout ; +wire \REGS|regs[31][8]~q ; +wire \REGS|Mux55~6_combout ; +wire \REGS|Mux23~0_combout ; +wire \REGS|Mux23~2_combout ; +wire \ALU|Mux23~0_combout ; +wire \REGS|regs[18][7]~q ; +wire \REGS|regs[26][7]~DUPLICATE_q ; +wire \REGS|Mux56~4_combout ; +wire \REGS|regs[12][7]~q ; +wire \REGS|regs[4][7]~feeder_combout ; +wire \REGS|regs[4][7]~q ; +wire \REGS|Mux56~0_combout ; +wire \REGS|regs[22][7]~q ; +wire \REGS|regs[30][7]~q ; +wire \REGS|Mux56~2_combout ; +wire \REGS|regs[13][7]~q ; +wire \REGS|regs[5][7]~q ; +wire \REGS|Mux56~1_combout ; +wire \REGS|regs[23][7]~q ; +wire \REGS|regs[31][7]~q ; +wire \REGS|Mux56~3_combout ; +wire \REGS|Mux24~0_combout ; +wire \REGS|regs[8][7]~feeder_combout ; +wire \REGS|regs[8][7]~DUPLICATE_q ; +wire \REGS|regs[9][7]~q ; +wire \REGS|Mux24~1_combout ; +wire \REGS|Mux24~2_combout ; +wire \REGS|regs[1][7]~feeder_combout ; +wire \REGS|regs[1][7]~q ; +wire \REGS|Mux56~5_combout ; +wire \REGS|regs[2][7]~feeder_combout ; +wire \REGS|regs[2][7]~q ; +wire \REGS|regs[10][7]~feeder_combout ; +wire \REGS|regs[10][7]~q ; +wire \REGS|regs[11][7]~feeder_combout ; +wire \REGS|regs[11][7]~q ; +wire \rt_alu[7]~14_combout ; +wire \REGS|regs[8][7]~q ; +wire \REGS|Mux56~6_combout ; +wire \REGS|regs[15][7]~q ; +wire \REGS|regs[14][7]~q ; +wire \REGS|regs[6][7]~q ; +wire \rt_alu[7]~15_combout ; +wire \rt_alu[7]~16_combout ; +wire \rt_alu[7]~17_combout ; +wire \rt_alu[7]~22_combout ; +wire \ALU|Mux24~0_combout ; +wire \REGS|regs[8][6]~feeder_combout ; +wire \REGS|regs[8][6]~DUPLICATE_q ; +wire \REGS|regs[9][6]~feeder_combout ; +wire \REGS|regs[9][6]~DUPLICATE_q ; +wire \REGS|Mux25~1_combout ; +wire \REGS|regs[26][6]~feeder_combout ; +wire \REGS|regs[26][6]~q ; +wire \REGS|regs[18][6]~q ; +wire \REGS|Mux57~4_combout ; +wire \REGS|regs[30][6]~q ; +wire \REGS|regs[22][6]~q ; +wire \REGS|Mux57~7_combout ; +wire \REGS|regs[12][6]~q ; +wire \REGS|regs[4][6]~feeder_combout ; +wire \REGS|regs[4][6]~q ; +wire \REGS|Mux57~3_combout ; +wire \REGS|regs[13][6]~q ; +wire \REGS|regs[5][6]~q ; +wire \REGS|Mux57~2_combout ; +wire \REGS|regs[23][6]~DUPLICATE_q ; +wire \REGS|regs[31][6]~q ; +wire \REGS|Mux57~6_combout ; +wire \REGS|Mux25~0_combout ; +wire \REGS|Mux25~2_combout ; +wire \rt_alu[5]~53_combout ; +wire \REGS|regs[26][5]~q ; +wire \REGS|regs[18][5]~q ; +wire \REGS|Mux58~4_combout ; +wire \REGS|regs[19][5]~feeder_combout ; +wire \REGS|regs[19][5]~q ; +wire \REGS|regs[27][5]~feeder_combout ; +wire \REGS|regs[27][5]~q ; +wire \REGS|Mux58~7_combout ; +wire \REGS|regs[17][5]~q ; +wire \REGS|regs[16][5]~q ; +wire \rt_alu[5]~56_combout ; +wire \REGS|regs[30][5]~feeder_combout ; +wire \REGS|regs[30][5]~q ; +wire \REGS|regs[22][5]~feeder_combout ; +wire \REGS|regs[22][5]~q ; +wire \REGS|Mux58~2_combout ; +wire \REGS|regs[28][5]~q ; +wire \REGS|regs[20][5]~q ; +wire \REGS|regs[29][5]~q ; +wire \rt_alu[5]~54_combout ; +wire \REGS|regs[23][5]~q ; +wire \REGS|regs[31][5]~q ; +wire \REGS|Mux58~3_combout ; +wire \rt_alu[5]~55_combout ; +wire \rt_alu[5]~57_combout ; +wire \rt_alu[5]~58_combout ; +wire \REGS|regs[8][5]~DUPLICATE_q ; +wire \REGS|Mux26~1_combout ; +wire \REGS|regs[12][5]~q ; +wire \REGS|regs[4][5]~q ; +wire \REGS|Mux58~0_combout ; +wire \REGS|regs[13][5]~feeder_combout ; +wire \REGS|regs[13][5]~q ; +wire \REGS|regs[5][5]~feeder_combout ; +wire \REGS|regs[5][5]~q ; +wire \REGS|Mux58~1_combout ; +wire \REGS|Mux26~0_combout ; +wire \REGS|Mux26~2_combout ; +wire \ALU|Mux26~0_combout ; +wire \REGS|regs[8][4]~q ; +wire \REGS|Mux59~15_combout ; +wire \REGS|regs[19][4]~feeder_combout ; +wire \REGS|regs[19][4]~q ; +wire \REGS|regs[27][4]~feeder_combout ; +wire \REGS|regs[27][4]~q ; +wire \REGS|Mux59~1_combout ; +wire \REGS|regs[24][4]~feeder_combout ; +wire \REGS|regs[24][4]~q ; +wire \REGS|regs[25][4]~feeder_combout ; +wire \REGS|regs[25][4]~q ; +wire \REGS|regs[16][4]~feeder_combout ; +wire \REGS|regs[16][4]~q ; +wire \REGS|Mux59~6_combout ; +wire \REGS|regs[23][4]~DUPLICATE_q ; +wire \REGS|regs[31][4]~q ; +wire \REGS|Mux59~3_combout ; +wire \REGS|regs[20][4]~q ; +wire \REGS|regs[29][4]~q ; +wire \REGS|regs[28][4]~q ; +wire \REGS|Mux59~2_combout ; +wire \REGS|regs[30][4]~feeder_combout ; +wire \REGS|regs[30][4]~q ; +wire \REGS|regs[22][4]~q ; +wire \REGS|Mux59~4_combout ; +wire \REGS|Mux59~5_combout ; +wire \REGS|Mux59~7_combout ; +wire \REGS|regs[9][4]~feeder_combout ; +wire \REGS|regs[9][4]~q ; +wire \REGS|regs[1][4]~q ; +wire \REGS|regs[11][4]~q ; +wire \REGS|regs[2][4]~feeder_combout ; +wire \REGS|regs[2][4]~DUPLICATE_q ; +wire \REGS|regs[10][4]~q ; +wire \REGS|Mux59~12_combout ; +wire \REGS|Mux59~13_combout ; +wire \REGS|regs[13][4]~q ; +wire \REGS|regs[5][4]~DUPLICATE_q ; +wire \REGS|Mux59~9_combout ; +wire \REGS|regs[4][4]~q ; +wire \REGS|regs[12][4]~q ; +wire \REGS|Mux59~10_combout ; +wire \REGS|regs[14][4]~q ; +wire \REGS|regs[15][4]~q ; +wire \REGS|regs[6][4]~q ; +wire \REGS|Mux59~8_combout ; +wire \REGS|Mux59~11_combout ; +wire \REGS|Mux59~14_combout ; +wire \rt_alu[4]~48_combout ; +wire \ALU|Mux27~0_combout ; +wire \REGS|regs[2][3]~q ; +wire \REGS|regs[10][3]~q ; +wire \REGS|regs[11][3]~q ; +wire \REGS|Mux60~12_combout ; +wire \REGS|regs[1][3]~q ; +wire \REGS|regs[9][3]~q ; +wire \REGS|regs[8][3]~q ; +wire \REGS|Mux60~13_combout ; +wire \REGS|regs[6][3]~q ; +wire \REGS|regs[14][3]~q ; +wire \REGS|regs[15][3]~q ; +wire \REGS|Mux60~10_combout ; +wire \REGS|regs[4][3]~DUPLICATE_q ; +wire \REGS|regs[12][3]~q ; +wire \REGS|Mux60~0_combout ; +wire \REGS|regs[13][3]~q ; +wire \REGS|regs[5][3]~q ; +wire \REGS|Mux60~1_combout ; +wire \REGS|Mux60~11_combout ; +wire \REGS|Mux60~14_combout ; +wire \REGS|regs[27][3]~feeder_combout ; +wire \REGS|regs[27][3]~q ; +wire \REGS|regs[19][3]~feeder_combout ; +wire \REGS|regs[19][3]~q ; +wire \REGS|Mux60~5_combout ; +wire \REGS|regs[26][3]~q ; +wire \REGS|regs[18][3]~feeder_combout ; +wire \REGS|regs[18][3]~q ; +wire \REGS|Mux60~4_combout ; +wire \REGS|regs[31][3]~q ; +wire \REGS|regs[23][3]~feeder_combout ; +wire \REGS|regs[23][3]~q ; +wire \REGS|Mux60~3_combout ; +wire \REGS|regs[28][3]~q ; +wire \REGS|regs[29][3]~q ; +wire \REGS|regs[20][3]~feeder_combout ; +wire \REGS|regs[20][3]~q ; +wire \REGS|Mux60~6_combout ; +wire \REGS|regs[22][3]~q ; +wire \REGS|regs[30][3]~q ; +wire \REGS|Mux60~2_combout ; +wire \REGS|Mux60~7_combout ; +wire \REGS|regs[24][3]~feeder_combout ; +wire \REGS|regs[24][3]~q ; +wire \REGS|regs[25][3]~q ; +wire \REGS|regs[16][3]~feeder_combout ; +wire \REGS|regs[16][3]~q ; +wire \REGS|Mux60~8_combout ; +wire \REGS|Mux60~9_combout ; +wire \rt_alu[3]~60_combout ; +wire \ALU|Mux28~0_combout ; +wire \ALU|adder_unit|operand[3]~4_combout ; +wire \REGS|regs[8][2]~DUPLICATE_q ; +wire \REGS|regs[9][2]~feeder_combout ; +wire \REGS|regs[9][2]~q ; +wire \REGS|Mux29~1_combout ; +wire \REGS|regs[26][2]~q ; +wire \REGS|regs[18][2]~feeder_combout ; +wire \REGS|regs[18][2]~DUPLICATE_q ; +wire \REGS|Mux61~0_combout ; +wire \REGS|regs[13][2]~q ; +wire \REGS|regs[5][2]~q ; +wire \REGS|Mux61~9_combout ; +wire \REGS|regs[4][2]~q ; +wire \REGS|regs[12][2]~q ; +wire \REGS|Mux61~10_combout ; +wire \REGS|regs[23][2]~q ; +wire \REGS|regs[31][2]~q ; +wire \REGS|Mux61~3_combout ; +wire \REGS|regs[30][2]~feeder_combout ; +wire \REGS|regs[30][2]~q ; +wire \REGS|regs[22][2]~q ; +wire \REGS|Mux61~4_combout ; +wire \REGS|Mux29~0_combout ; +wire \REGS|Mux29~2_combout ; +wire \ALU|Mux29~2_combout ; +wire \REGS|regs[27][1]~q ; +wire \REGS|regs[19][1]~feeder_combout ; +wire \REGS|regs[19][1]~q ; +wire \REGS|Mux62~5_combout ; +wire \REGS|regs[26][1]~q ; +wire \REGS|regs[18][1]~q ; +wire \REGS|Mux62~4_combout ; +wire \REGS|regs[24][1]~feeder_combout ; +wire \REGS|regs[24][1]~q ; +wire \REGS|regs[25][1]~q ; +wire \REGS|regs[16][1]~feeder_combout ; +wire \REGS|regs[16][1]~q ; +wire \REGS|Mux62~8_combout ; +wire \REGS|regs[31][1]~q ; +wire \REGS|regs[23][1]~q ; +wire \REGS|Mux62~3_combout ; +wire \REGS|regs[29][1]~DUPLICATE_q ; +wire \REGS|regs[28][1]~DUPLICATE_q ; +wire \REGS|regs[20][1]~q ; +wire \REGS|Mux62~6_combout ; +wire \REGS|regs[22][1]~q ; +wire \REGS|regs[30][1]~DUPLICATE_q ; +wire \REGS|Mux62~2_combout ; +wire \REGS|Mux62~7_combout ; +wire \REGS|Mux62~9_combout ; +wire \REGS|regs[8][1]~DUPLICATE_q ; +wire \REGS|regs[1][1]~feeder_combout ; +wire \REGS|regs[1][1]~q ; +wire \REGS|Mux62~13_combout ; +wire \REGS|regs[13][1]~feeder_combout ; +wire \REGS|regs[13][1]~DUPLICATE_q ; +wire \REGS|regs[5][1]~q ; +wire \REGS|Mux62~1_combout ; +wire \REGS|regs[4][1]~q ; +wire \REGS|regs[12][1]~q ; +wire \REGS|Mux62~0_combout ; +wire \REGS|regs[6][1]~q ; +wire \REGS|regs[14][1]~q ; +wire \REGS|regs[15][1]~feeder_combout ; +wire \REGS|regs[15][1]~DUPLICATE_q ; +wire \REGS|Mux62~10_combout ; +wire \REGS|Mux62~11_combout ; +wire \REGS|regs[10][1]~feeder_combout ; +wire \REGS|regs[10][1]~q ; +wire \REGS|regs[2][1]~q ; +wire \REGS|regs[11][1]~q ; +wire \REGS|Mux62~12_combout ; +wire \REGS|Mux62~14_combout ; +wire \RAM|mem~257_combout ; +wire \RAM|mem[241][1]~feeder_combout ; +wire \RAM|Decoder0~11_combout ; +wire \REGS|regs[16][31]~feeder_combout ; +wire \REGS|regs[16][31]~q ; +wire \REGS|regs[25][31]~q ; +wire \REGS|regs[24][31]~feeder_combout ; +wire \REGS|regs[24][31]~q ; +wire \rt_alu[31]~43_combout ; +wire \REGS|regs[23][31]~q ; +wire \REGS|regs[31][31]~q ; +wire \REGS|Mux32~3_combout ; +wire \REGS|regs[28][31]~q ; +wire \REGS|regs[20][31]~q ; +wire \REGS|regs[29][31]~q ; +wire \rt_alu[31]~41_combout ; +wire \REGS|regs[30][31]~q ; +wire \REGS|regs[22][31]~q ; +wire \REGS|Mux32~2_combout ; +wire \rt_alu[31]~42_combout ; +wire \REGS|regs[26][31]~q ; +wire \REGS|regs[18][31]~q ; +wire \REGS|Mux32~4_combout ; +wire \REGS|regs[27][31]~q ; +wire \REGS|regs[19][31]~q ; +wire \REGS|Mux32~5_combout ; +wire \rt_alu[31]~44_combout ; +wire \rt_alu[31]~45_combout ; +wire \REGS|regs[1][31]~feeder_combout ; +wire \REGS|regs[1][31]~q ; +wire \REGS|regs[9][31]~DUPLICATE_q ; +wire \REGS|regs[10][31]~q ; +wire \REGS|regs[2][31]~DUPLICATE_q ; +wire \REGS|regs[11][31]~DUPLICATE_q ; +wire \rt_alu[31]~34_combout ; +wire \REGS|regs[13][31]~q ; +wire \REGS|regs[5][31]~q ; +wire \REGS|Mux32~1_combout ; +wire \REGS|regs[4][31]~feeder_combout ; +wire \REGS|regs[4][31]~q ; +wire \REGS|regs[12][31]~feeder_combout ; +wire \REGS|regs[12][31]~q ; +wire \REGS|Mux32~0_combout ; +wire \rt_alu[31]~36_combout ; +wire \REGS|regs[6][31]~q ; +wire \REGS|regs[15][31]~q ; +wire \REGS|regs[14][31]~q ; +wire \rt_alu[31]~35_combout ; +wire \rt_alu[31]~37_combout ; +wire \rt_alu[31]~38_combout ; +wire \rt_alu[31]~271_combout ; +wire \ALU|Mux0~0_combout ; +wire \ALU|adder_unit|operand[31]~0_combout ; +wire \rt_alu[1]~46_combout ; +wire \ALU|adder_unit|operand[1]~2_combout ; +wire \REGS|regs[24][0]~q ; +wire \REGS|regs[16][0]~feeder_combout ; +wire \REGS|regs[16][0]~q ; +wire \REGS|regs[25][0]~q ; +wire \REGS|Mux63~8_combout ; +wire \REGS|regs[19][0]~feeder_combout ; +wire \REGS|regs[19][0]~DUPLICATE_q ; +wire \REGS|regs[27][0]~feeder_combout ; +wire \REGS|regs[27][0]~q ; +wire \REGS|Mux63~5_combout ; +wire \REGS|regs[30][0]~q ; +wire \REGS|regs[22][0]~q ; +wire \REGS|Mux63~2_combout ; +wire \REGS|regs[20][0]~feeder_combout ; +wire \REGS|regs[20][0]~q ; +wire \REGS|regs[28][0]~q ; +wire \REGS|regs[29][0]~feeder_combout ; +wire \REGS|regs[29][0]~DUPLICATE_q ; +wire \REGS|Mux63~6_combout ; +wire \REGS|regs[23][0]~q ; +wire \REGS|regs[31][0]~q ; +wire \REGS|Mux63~3_combout ; +wire \REGS|Mux63~7_combout ; +wire \REGS|Mux63~9_combout ; +wire \REGS|regs[2][0]~DUPLICATE_q ; +wire \REGS|regs[10][0]~q ; +wire \REGS|regs[11][0]~q ; +wire \REGS|Mux63~12_combout ; +wire \REGS|regs[9][0]~feeder_combout ; +wire \REGS|regs[9][0]~DUPLICATE_q ; +wire \REGS|regs[8][0]~DUPLICATE_q ; +wire \REGS|regs[1][0]~feeder_combout ; +wire \REGS|regs[1][0]~q ; +wire \REGS|Mux63~13_combout ; +wire \REGS|regs[12][0]~q ; +wire \REGS|regs[4][0]~q ; +wire \REGS|Mux63~0_combout ; +wire \REGS|regs[14][0]~q ; +wire \REGS|regs[15][0]~DUPLICATE_q ; +wire \REGS|regs[6][0]~q ; +wire \REGS|Mux63~10_combout ; +wire \REGS|regs[13][0]~DUPLICATE_q ; +wire \REGS|regs[5][0]~q ; +wire \REGS|Mux63~1_combout ; +wire \REGS|Mux63~11_combout ; +wire \REGS|Mux63~14_combout ; +wire \RAM|mem~0_combout ; +wire \rt_alu[1]~47_combout ; +wire \ALU|Mux30~0_combout ; +wire \rt_alu[0]~33_combout ; +wire \ALU|adder_unit|_~14 ; +wire \ALU|Mux30~1_combout ; +wire \RAM|Decoder0~8_combout ; +wire \ALU|Mux25~0_combout ; +wire \RAM|Decoder0~31_combout ; +wire \RAM|Decoder0~32_combout ; +wire \RAM|mem[51][0]~125_combout ; +wire \RAM|mem[51][0]~q ; +wire \RAM|mem[59][2]~127_combout ; +wire \RAM|mem[59][0]~q ; +wire \ALU|logic_unit|Mux31~0_combout ; +wire \ALU|Mux31~0_combout ; +wire \ALU|Mux31~1_combout ; +wire \ALU|Mux31~2_combout ; +wire \RAM|Decoder0~1_combout ; +wire \RAM|Decoder0~14_combout ; +wire \ALU|OUT_1~0_combout ; +wire \RAM|Decoder0~16_combout ; +wire \RAM|mem[55][2]~126_combout ; +wire \RAM|mem[55][0]~q ; +wire \RAM|Decoder0~25_combout ; +wire \ALU|Mux31~3_combout ; +wire \RAM|mem[63][2]~128_combout ; +wire \RAM|mem[63][0]~q ; +wire \rd[0]~40_combout ; +wire \RAM|mem[57][2]~119_combout ; +wire \RAM|mem[57][0]~q ; +wire \RAM|mem[49][0]~117_combout ; +wire \RAM|mem[49][0]~q ; +wire \RAM|mem[53][2]~118_combout ; +wire \RAM|mem[53][0]~q ; +wire \RAM|Decoder0~20_combout ; +wire \RAM|Decoder0~34_combout ; +wire \RAM|Decoder0~35_combout ; +wire \RAM|mem[61][0]~120_combout ; +wire \RAM|mem[61][0]~q ; +wire \rd[0]~38_combout ; +wire \RAM|Decoder0~15_combout ; +wire \RAM|mem[54][1]~122_combout ; +wire \RAM|mem[54][0]~q ; +wire \RAM|Decoder0~2_combout ; +wire \RAM|Decoder0~3_combout ; +wire \RAM|Decoder0~33_combout ; +wire \RAM|mem[50][2]~121_combout ; +wire \RAM|mem[50][0]~q ; +wire \RAM|mem[58][2]~123_combout ; +wire \RAM|mem[58][0]~q ; +wire \RAM|Decoder0~26_combout ; +wire \RAM|mem[62][2]~124_combout ; +wire \RAM|mem[62][0]~q ; +wire \rd[0]~39_combout ; +wire \RAM|mem[56][0]~feeder_combout ; +wire \RAM|Decoder0~19_combout ; +wire \RAM|mem[56][4]~115_combout ; +wire \RAM|mem[56][0]~q ; +wire \RAM|mem[52][0]~114_combout ; +wire \RAM|mem[52][0]~q ; +wire \RAM|Decoder0~12_combout ; +wire \RAM|mem[48][2]~113_combout ; +wire \RAM|mem[48][0]~q ; +wire \RAM|Decoder0~7_combout ; +wire \RAM|mem[60][4]~116_combout ; +wire \RAM|mem[60][0]~q ; +wire \rd[0]~37_combout ; +wire \rd[0]~41_combout ; +wire \pc_we[0]~1_combout ; +wire \RAM|mem[24][3]~83_combout ; +wire \RAM|mem[24][0]~q ; +wire \RAM|mem[16][4]~81_combout ; +wire \RAM|mem[16][0]~q ; +wire \RAM|mem[28][0]~84_combout ; +wire \RAM|mem[28][0]~q ; +wire \RAM|Decoder0~29_combout ; +wire \RAM|mem[20][4]~82_combout ; +wire \RAM|mem[20][0]~q ; +wire \rd[0]~27_combout ; +wire \RAM|mem[22][0]~feeder_combout ; +wire \RAM|Decoder0~30_combout ; +wire \RAM|mem[22][2]~90_combout ; +wire \RAM|mem[22][0]~q ; +wire \RAM|mem[26][0]~feeder_combout ; +wire \RAM|mem[26][4]~91_combout ; +wire \RAM|mem[26][0]~q ; +wire \RAM|mem[18][0]~89_combout ; +wire \RAM|mem[18][0]~q ; +wire \RAM|mem[30][3]~92_combout ; +wire \RAM|mem[30][0]~q ; +wire \rd[0]~29_combout ; +wire \RAM|mem[31][0]~feeder_combout ; +wire \RAM|mem[31][2]~96_combout ; +wire \RAM|mem[31][0]~q ; +wire \RAM|mem[23][0]~94_combout ; +wire \RAM|mem[23][0]~q ; +wire \RAM|mem[27][1]~95_combout ; +wire \RAM|mem[27][0]~q ; +wire \RAM|mem[19][3]~93_combout ; +wire \RAM|mem[19][0]~q ; +wire \rd[0]~30_combout ; +wire \RAM|mem[21][3]~86_combout ; +wire \RAM|mem[21][0]~q ; +wire \RAM|mem[29][2]~88_combout ; +wire \RAM|mem[29][0]~q ; +wire \RAM|mem[25][2]~87_combout ; +wire \RAM|mem[25][0]~q ; +wire \RAM|mem[17][0]~85_combout ; +wire \RAM|mem[17][0]~q ; +wire \rd[0]~28_combout ; +wire \rd[0]~31_combout ; +wire \RAM|mem[1][0]~69_combout ; +wire \RAM|mem[1][0]~q ; +wire \RAM|Decoder0~28_combout ; +wire \RAM|mem[13][1]~72_combout ; +wire \RAM|mem[13][0]~q ; +wire \RAM|mem[9][2]~71_combout ; +wire \RAM|mem[9][0]~q ; +wire \RAM|mem[5][0]~70_combout ; +wire \RAM|mem[5][0]~q ; +wire \rd[0]~23_combout ; +wire \RAM|Decoder0~6_combout ; +wire \RAM|mem[10][4]~75_combout ; +wire \RAM|mem[10][0]~q ; +wire \RAM|mem[6][2]~74_combout ; +wire \RAM|mem[6][0]~q ; +wire \RAM|mem[2][0]~73_combout ; +wire \RAM|mem[2][0]~q ; +wire \RAM|mem[14][1]~76_combout ; +wire \RAM|mem[14][0]~q ; +wire \rd[0]~24_combout ; +wire \RAM|mem[11][3]~79_combout ; +wire \RAM|mem[11][0]~q ; +wire \RAM|mem[7][0]~feeder_combout ; +wire \RAM|mem[7][0]~78_combout ; +wire \RAM|mem[7][0]~q ; +wire \RAM|mem[3][0]~feeder_combout ; +wire \RAM|mem[3][2]~77_combout ; +wire \RAM|mem[3][0]~q ; +wire \RAM|Decoder0~27_combout ; +wire \RAM|mem[15][4]~80_combout ; +wire \RAM|mem[15][0]~q ; +wire \rd[0]~25_combout ; +wire \RAM|mem[12][3]~68_combout ; +wire \RAM|mem[12][0]~q ; +wire \RAM|mem[0][3]~65_combout ; +wire \RAM|mem[0][0]~q ; +wire \RAM|mem[8][2]~67_combout ; +wire \RAM|mem[8][0]~q ; +wire \RAM|mem[4][0]~66_combout ; +wire \RAM|mem[4][0]~q ; +wire \rd[0]~22_combout ; +wire \rd[0]~26_combout ; +wire \RAM|mem[32][0]~feeder_combout ; +wire \pc_we[0]~0_combout ; +wire \RAM|mem[32][1]~97_combout ; +wire \RAM|mem[32][0]~q ; +wire \RAM|mem[33][3]~98_combout ; +wire \RAM|mem[33][0]~q ; +wire \RAM|mem[34][0]~feeder_combout ; +wire \RAM|mem[34][3]~99_combout ; +wire \RAM|mem[34][0]~q ; +wire \RAM|mem[35][2]~100_combout ; +wire \RAM|mem[35][0]~q ; +wire \rd[0]~32_combout ; +wire \RAM|mem[44][1]~109_combout ; +wire \RAM|mem[44][0]~q ; +wire \RAM|mem[45][4]~110_combout ; +wire \RAM|mem[45][0]~q ; +wire \RAM|mem[46][2]~111_combout ; +wire \RAM|mem[46][0]~q ; +wire \RAM|Decoder0~22_combout ; +wire \RAM|mem[47][0]~112_combout ; +wire \RAM|mem[47][0]~q ; +wire \rd[0]~35_combout ; +wire \RAM|mem[36][2]~101_combout ; +wire \RAM|mem[36][0]~q ; +wire \RAM|mem[37][0]~102_combout ; +wire \RAM|mem[37][0]~q ; +wire \RAM|mem[38][0]~103_combout ; +wire \RAM|mem[38][0]~q ; +wire \RAM|mem[39][4]~104_combout ; +wire \RAM|mem[39][0]~q ; +wire \rd[0]~33_combout ; +wire \RAM|mem[42][0]~feeder_combout ; +wire \RAM|mem[42][4]~107_combout ; +wire \RAM|mem[42][0]~q ; +wire \RAM|mem[41][0]~feeder_combout ; +wire \RAM|mem[41][1]~106_combout ; +wire \RAM|mem[41][0]~q ; +wire \RAM|Decoder0~17_combout ; +wire \RAM|mem[40][4]~105_combout ; +wire \RAM|mem[40][0]~q ; +wire \RAM|mem[43][0]~108_combout ; +wire \RAM|mem[43][0]~q ; +wire \rd[0]~34_combout ; +wire \rd[0]~36_combout ; +wire \rd[0]~42_combout ; +wire \rd[3]~457_combout ; +wire \RAM|Decoder0~36_combout ; +wire \RAM|Decoder0~37_combout ; +wire \RAM|mem[148][1]~146_combout ; +wire \RAM|mem[148][0]~q ; +wire \RAM|mem[144][0]~feeder_combout ; +wire \RAM|mem[144][3]~145_combout ; +wire \RAM|mem[144][0]~q ; +wire \RAM|mem[152][3]~147_combout ; +wire \RAM|mem[152][0]~q ; +wire \RAM|mem[156][1]~148_combout ; +wire \RAM|mem[156][0]~q ; +wire \rd[0]~48_combout ; +wire \RAM|Decoder0~38_combout ; +wire \RAM|mem[145][3]~149_combout ; +wire \RAM|mem[145][0]~q ; +wire \RAM|mem[153][0]~151_combout ; +wire \RAM|mem[153][0]~q ; +wire \RAM|mem[149][4]~150_combout ; +wire \RAM|mem[149][0]~q ; +wire \RAM|Decoder0~39_combout ; +wire \RAM|mem[157][3]~152_combout ; +wire \RAM|mem[157][0]~q ; +wire \rd[0]~49_combout ; +wire \RAM|mem[147][0]~feeder_combout ; +wire \RAM|mem[147][1]~157_combout ; +wire \RAM|mem[147][0]~q ; +wire \RAM|mem[155][0]~159_combout ; +wire \RAM|mem[155][0]~q ; +wire \RAM|mem[151][3]~158_combout ; +wire \RAM|mem[151][0]~q ; +wire \RAM|mem[159][3]~160_combout ; +wire \RAM|mem[159][0]~q ; +wire \rd[0]~51_combout ; +wire \RAM|mem[146][0]~feeder_combout ; +wire \RAM|mem[146][4]~153_combout ; +wire \RAM|mem[146][0]~q ; +wire \RAM|mem[154][0]~feeder_combout ; +wire \RAM|mem[154][2]~155_combout ; +wire \RAM|mem[154][0]~q ; +wire \RAM|mem[150][0]~feeder_combout ; +wire \RAM|mem[150][3]~154_combout ; +wire \RAM|mem[150][0]~q ; +wire \RAM|mem[158][0]~feeder_combout ; +wire \RAM|mem[158][4]~156_combout ; +wire \RAM|mem[158][0]~q ; +wire \rd[0]~50_combout ; +wire \rd[0]~52_combout ; +wire \RAM|mem[186][0]~187_combout ; +wire \RAM|mem[186][0]~q ; +wire \RAM|mem[178][0]~feeder_combout ; +wire \RAM|mem[178][3]~185_combout ; +wire \RAM|mem[178][0]~q ; +wire \RAM|mem[182][0]~feeder_combout ; +wire \RAM|Decoder0~13_combout ; +wire \RAM|mem[182][0]~186_combout ; +wire \RAM|mem[182][0]~q ; +wire \RAM|mem[190][2]~188_combout ; +wire \RAM|mem[190][0]~q ; +wire \rd[0]~60_combout ; +wire \RAM|Decoder0~40_combout ; +wire \RAM|mem[183][4]~190_combout ; +wire \RAM|mem[183][0]~q ; +wire \RAM|mem[179][4]~189_combout ; +wire \RAM|mem[179][0]~q ; +wire \RAM|mem[187][0]~191_combout ; +wire \RAM|mem[187][0]~q ; +wire \RAM|mem[191][2]~192_combout ; +wire \RAM|mem[191][0]~q ; +wire \rd[0]~61_combout ; +wire \RAM|mem[177][3]~181_combout ; +wire \RAM|mem[177][0]~q ; +wire \RAM|mem[181][4]~182_combout ; +wire \RAM|mem[181][0]~q ; +wire \RAM|mem[185][4]~183_combout ; +wire \RAM|mem[185][0]~q ; +wire \RAM|mem[189][3]~184_combout ; +wire \RAM|mem[189][0]~q ; +wire \rd[0]~59_combout ; +wire \RAM|mem[176][1]~177_combout ; +wire \RAM|mem[176][0]~q ; +wire \RAM|mem[184][4]~179_combout ; +wire \RAM|mem[184][0]~q ; +wire \RAM|mem[180][4]~178_combout ; +wire \RAM|mem[180][0]~q ; +wire \RAM|mem[188][2]~180_combout ; +wire \RAM|mem[188][0]~q ; +wire \rd[0]~58_combout ; +wire \rd[0]~62_combout ; +wire \RAM|mem[129][0]~133_combout ; +wire \RAM|mem[129][0]~q ; +wire \RAM|mem[137][0]~feeder_combout ; +wire \RAM|mem[137][1]~135_combout ; +wire \RAM|mem[137][0]~q ; +wire \RAM|mem[141][4]~136_combout ; +wire \RAM|mem[141][0]~q ; +wire \RAM|mem[133][1]~134_combout ; +wire \RAM|mem[133][0]~q ; +wire \rd[0]~44_combout ; +wire \RAM|mem[136][1]~131_combout ; +wire \RAM|mem[136][0]~q ; +wire \RAM|mem[140][4]~132_combout ; +wire \RAM|mem[140][0]~q ; +wire \RAM|mem[128][4]~129_combout ; +wire \RAM|mem[128][0]~q ; +wire \RAM|mem[132][0]~130_combout ; +wire \RAM|mem[132][0]~q ; +wire \rd[0]~43_combout ; +wire \RAM|mem[138][3]~139_combout ; +wire \RAM|mem[138][0]~q ; +wire \RAM|mem[142][1]~140_combout ; +wire \RAM|mem[142][0]~q ; +wire \RAM|mem[130][1]~137_combout ; +wire \RAM|mem[130][0]~q ; +wire \RAM|mem[134][0]~feeder_combout ; +wire \RAM|Decoder0~10_combout ; +wire \RAM|mem[134][4]~138_combout ; +wire \RAM|mem[134][0]~q ; +wire \rd[0]~45_combout ; +wire \RAM|mem[135][3]~142_combout ; +wire \RAM|mem[135][0]~q ; +wire \RAM|mem[139][0]~feeder_combout ; +wire \RAM|mem[139][3]~143_combout ; +wire \RAM|mem[139][0]~q ; +wire \RAM|mem[131][0]~feeder_combout ; +wire \RAM|mem[131][0]~141_combout ; +wire \RAM|mem[131][0]~q ; +wire \RAM|mem[143][3]~144_combout ; +wire \RAM|mem[143][0]~q ; +wire \rd[0]~46_combout ; +wire \rd[0]~47_combout ; +wire \RAM|mem[169][0]~feeder_combout ; +wire \RAM|mem[169][2]~170_combout ; +wire \RAM|mem[169][0]~q ; +wire \RAM|mem[170][4]~171_combout ; +wire \RAM|mem[170][0]~q ; +wire \RAM|mem[168][2]~169_combout ; +wire \RAM|mem[168][0]~q ; +wire \RAM|Decoder0~41_combout ; +wire \RAM|mem[171][2]~172_combout ; +wire \RAM|mem[171][0]~q ; +wire \rd[0]~55_combout ; +wire \RAM|mem[166][2]~167_combout ; +wire \RAM|mem[166][0]~q ; +wire \RAM|mem[165][2]~166_combout ; +wire \RAM|mem[165][0]~q ; +wire \RAM|mem[164][4]~165_combout ; +wire \RAM|mem[164][0]~q ; +wire \RAM|mem[167][1]~168_combout ; +wire \RAM|mem[167][0]~q ; +wire \rd[0]~54_combout ; +wire \RAM|mem[161][0]~feeder_combout ; +wire \RAM|mem[161][0]~162_combout ; +wire \RAM|mem[161][0]~q ; +wire \RAM|mem[160][3]~161_combout ; +wire \RAM|mem[160][0]~q ; +wire \RAM|mem[162][0]~163_combout ; +wire \RAM|mem[162][0]~q ; +wire \RAM|mem[163][3]~164_combout ; +wire \RAM|mem[163][0]~q ; +wire \rd[0]~53_combout ; +wire \RAM|mem[172][2]~173_combout ; +wire \RAM|mem[172][0]~q ; +wire \RAM|mem[174][4]~175_combout ; +wire \RAM|mem[174][0]~q ; +wire \RAM|mem[173][1]~174_combout ; +wire \RAM|mem[173][0]~q ; +wire \RAM|mem[175][0]~176_combout ; +wire \RAM|mem[175][0]~q ; +wire \rd[0]~56_combout ; +wire \rd[0]~57_combout ; +wire \rd[0]~63_combout ; +wire \RAM|mem[225][0]~feeder_combout ; +wire \RAM|Decoder0~44_combout ; +wire \RAM|mem[225][3]~211_combout ; +wire \RAM|mem[225][0]~q ; +wire \RAM|Decoder0~0_combout ; +wire \RAM|mem[193][1]~209_combout ; +wire \RAM|mem[193][0]~q ; +wire \RAM|mem[241][0]~q ; +wire \RAM|mem[209][0]~210_combout ; +wire \RAM|mem[209][0]~q ; +wire \rd[0]~69_combout ; +wire \RAM|Decoder0~46_combout ; +wire \RAM|mem[201][4]~217_combout ; +wire \RAM|mem[201][0]~q ; +wire \RAM|Decoder0~43_combout ; +wire \RAM|mem[217][1]~218_combout ; +wire \RAM|mem[217][0]~q ; +wire \RAM|mem[233][0]~219_combout ; +wire \RAM|mem[233][0]~q ; +wire \RAM|mem[249][1]~220_combout ; +wire \RAM|mem[249][0]~q ; +wire \rd[0]~71_combout ; +wire \RAM|Decoder0~21_combout ; +wire \RAM|mem[205][3]~221_combout ; +wire \RAM|mem[205][0]~q ; +wire \RAM|mem[221][3]~222_combout ; +wire \RAM|mem[221][0]~q ; +wire \RAM|Decoder0~23_combout ; +wire \RAM|mem[237][2]~223_combout ; +wire \RAM|mem[237][0]~q ; +wire \RAM|Decoder0~24_combout ; +wire \RAM|mem[253][2]~224_combout ; +wire \RAM|mem[253][0]~q ; +wire \rd[0]~72_combout ; +wire \RAM|mem[229][2]~215_combout ; +wire \RAM|mem[229][0]~q ; +wire \RAM|mem[245][0]~216_combout ; +wire \RAM|mem[245][0]~q ; +wire \RAM|mem[213][2]~214_combout ; +wire \RAM|mem[213][0]~q ; +wire \RAM|mem[197][1]~213_combout ; +wire \RAM|mem[197][0]~q ; +wire \rd[0]~70_combout ; +wire \rd[0]~73_combout ; +wire \RAM|Decoder0~49_combout ; +wire \RAM|mem[235][2]~251_combout ; +wire \RAM|mem[235][0]~q ; +wire \RAM|mem[231][2]~250_combout ; +wire \RAM|mem[231][0]~q ; +wire \RAM|mem[227][3]~249_combout ; +wire \RAM|mem[227][0]~q ; +wire \RAM|Decoder0~42_combout ; +wire \RAM|mem[239][1]~252_combout ; +wire \RAM|mem[239][0]~q ; +wire \rd[0]~81_combout ; +wire \RAM|Decoder0~51_combout ; +wire \RAM|mem[243][2]~253_combout ; +wire \RAM|mem[243][0]~q ; +wire \RAM|mem[247][4]~254_combout ; +wire \RAM|mem[247][0]~q ; +wire \RAM|mem[255][0]~feeder_combout ; +wire \RAM|mem[255][3]~256_combout ; +wire \RAM|mem[255][0]~q ; +wire \RAM|mem[251][2]~255_combout ; +wire \RAM|mem[251][0]~q ; +wire \rd[0]~82_combout ; +wire \RAM|Decoder0~50_combout ; +wire \RAM|mem[215][1]~246_combout ; +wire \RAM|mem[215][0]~q ; +wire \RAM|mem[219][0]~247_combout ; +wire \RAM|mem[219][0]~q ; +wire \RAM|mem[211][1]~245_combout ; +wire \RAM|mem[211][0]~q ; +wire \RAM|mem[223][2]~248_combout ; +wire \RAM|mem[223][0]~q ; +wire \rd[0]~80_combout ; +wire \RAM|Decoder0~48_combout ; +wire \RAM|mem[195][0]~241_combout ; +wire \RAM|mem[195][0]~q ; +wire \RAM|mem[199][3]~242_combout ; +wire \RAM|mem[199][0]~q ; +wire \RAM|mem[203][0]~feeder_combout ; +wire \RAM|mem[203][4]~243_combout ; +wire \RAM|mem[203][0]~q ; +wire \RAM|mem[207][0]~244_combout ; +wire \RAM|mem[207][0]~q ; +wire \rd[0]~79_combout ; +wire \rd[0]~83_combout ; +wire \RAM|mem[228][4]~199_combout ; +wire \RAM|mem[228][0]~q ; +wire \RAM|mem[244][2]~200_combout ; +wire \RAM|mem[244][0]~q ; +wire \RAM|mem[212][1]~198_combout ; +wire \RAM|mem[212][0]~q ; +wire \RAM|mem[196][0]~197_combout ; +wire \RAM|mem[196][0]~q ; +wire \rd[0]~65_combout ; +wire \RAM|mem[192][3]~193_combout ; +wire \RAM|mem[192][0]~q ; +wire \RAM|mem[240][0]~feeder_combout ; +wire \RAM|mem[240][1]~196_combout ; +wire \RAM|mem[240][0]~q ; +wire \RAM|mem[208][4]~194_combout ; +wire \RAM|mem[208][0]~q ; +wire \RAM|mem[224][1]~195_combout ; +wire \RAM|mem[224][0]~q ; +wire \rd[0]~64_combout ; +wire \RAM|mem[232][3]~203_combout ; +wire \RAM|mem[232][0]~q ; +wire \RAM|mem[216][3]~202_combout ; +wire \RAM|mem[216][0]~q ; +wire \RAM|mem[200][0]~feeder_combout ; +wire \RAM|mem[200][2]~201_combout ; +wire \RAM|mem[200][0]~q ; +wire \RAM|mem[248][3]~204_combout ; +wire \RAM|mem[248][0]~q ; +wire \rd[0]~66_combout ; +wire \RAM|mem[204][1]~205_combout ; +wire \RAM|mem[204][0]~q ; +wire \RAM|mem[236][3]~207_combout ; +wire \RAM|mem[236][0]~q ; +wire \RAM|mem[220][4]~206_combout ; +wire \RAM|mem[220][0]~q ; +wire \RAM|mem[252][3]~208_combout ; +wire \RAM|mem[252][0]~q ; +wire \rd[0]~67_combout ; +wire \rd[0]~68_combout ; +wire \RAM|mem[202][4]~233_combout ; +wire \RAM|mem[202][0]~q ; +wire \RAM|mem[218][0]~feeder_combout ; +wire \RAM|mem[218][2]~234_combout ; +wire \RAM|mem[218][0]~q ; +wire \RAM|Decoder0~47_combout ; +wire \RAM|mem[234][0]~235_combout ; +wire \RAM|mem[234][0]~q ; +wire \RAM|mem[250][4]~236_combout ; +wire \RAM|mem[250][0]~q ; +wire \rd[0]~76_combout ; +wire \RAM|mem[214][2]~230_combout ; +wire \RAM|mem[214][0]~q ; +wire \RAM|mem[198][3]~229_combout ; +wire \RAM|mem[198][0]~q ; +wire \RAM|mem[230][1]~231_combout ; +wire \RAM|mem[230][0]~q ; +wire \RAM|mem[246][2]~232_combout ; +wire \RAM|mem[246][0]~q ; +wire \rd[0]~75_combout ; +wire \RAM|mem[206][0]~feeder_combout ; +wire \RAM|mem[206][0]~237_combout ; +wire \RAM|mem[206][0]~q ; +wire \RAM|mem[222][3]~238_combout ; +wire \RAM|mem[222][0]~q ; +wire \RAM|mem[238][1]~239_combout ; +wire \RAM|mem[238][0]~q ; +wire \RAM|mem[254][4]~240_combout ; +wire \RAM|mem[254][0]~q ; +wire \rd[0]~77_combout ; +wire \RAM|mem[210][3]~226_combout ; +wire \RAM|mem[210][0]~q ; +wire \RAM|mem[194][4]~225_combout ; +wire \RAM|mem[194][0]~q ; +wire \RAM|mem[226][3]~227_combout ; +wire \RAM|mem[226][0]~q ; +wire \RAM|mem[242][0]~228_combout ; +wire \RAM|mem[242][0]~q ; +wire \rd[0]~74_combout ; +wire \rd[0]~78_combout ; +wire \rd[0]~84_combout ; +wire \rd[0]~85_combout ; +wire \RAM|mem[89][0]~feeder_combout ; +wire \RAM|Decoder0~5_combout ; +wire \RAM|mem[89][2]~38_combout ; +wire \RAM|mem[89][0]~q ; +wire \RAM|mem[88][4]~37_combout ; +wire \RAM|mem[88][0]~q ; +wire \RAM|mem[90][0]~feeder_combout ; +wire \RAM|mem[90][0]~39_combout ; +wire \RAM|mem[90][0]~q ; +wire \RAM|mem[91][0]~40_combout ; +wire \RAM|mem[91][0]~q ; +wire \rd[0]~12_combout ; +wire \RAM|Decoder0~9_combout ; +wire \RAM|mem[121][2]~46_combout ; +wire \RAM|mem[121][0]~q ; +wire \RAM|mem[120][0]~45_combout ; +wire \RAM|mem[120][0]~q ; +wire \RAM|Decoder0~18_combout ; +wire \RAM|mem[122][2]~47_combout ; +wire \RAM|mem[122][0]~q ; +wire \RAM|mem[123][1]~48_combout ; +wire \RAM|mem[123][0]~q ; +wire \rd[0]~14_combout ; +wire \RAM|mem[107][2]~44_combout ; +wire \RAM|mem[107][0]~q ; +wire \RAM|mem[106][0]~43_combout ; +wire \RAM|mem[106][0]~q ; +wire \RAM|mem[104][0]~41_combout ; +wire \RAM|mem[104][0]~q ; +wire \RAM|mem[105][0]~42_combout ; +wire \RAM|mem[105][0]~q ; +wire \rd[0]~13_combout ; +wire \RAM|mem[72][3]~33_combout ; +wire \RAM|mem[72][0]~q ; +wire \RAM|mem[73][1]~34_combout ; +wire \RAM|mem[73][0]~q ; +wire \RAM|mem[74][0]~feeder_combout ; +wire \RAM|mem[74][1]~35_combout ; +wire \RAM|mem[74][0]~q ; +wire \RAM|mem[75][2]~36_combout ; +wire \RAM|mem[75][0]~q ; +wire \rd[0]~11_combout ; +wire \rd[0]~15_combout ; +wire \RAM|mem[111][2]~63_combout ; +wire \RAM|mem[111][0]~q ; +wire \RAM|mem[95][4]~62_combout ; +wire \RAM|mem[95][0]~q ; +wire \RAM|mem[79][0]~61_combout ; +wire \RAM|mem[79][0]~q ; +wire \RAM|mem[127][1]~64_combout ; +wire \RAM|mem[127][0]~q ; +wire \rd[0]~19_combout ; +wire \RAM|mem[109][1]~55_combout ; +wire \RAM|mem[109][0]~q ; +wire \RAM|mem[93][2]~54_combout ; +wire \RAM|mem[93][0]~q ; +wire \RAM|mem[77][3]~53_combout ; +wire \RAM|mem[77][0]~q ; +wire \RAM|mem[125][4]~56_combout ; +wire \RAM|mem[125][0]~q ; +wire \rd[0]~17_combout ; +wire \RAM|mem[94][4]~58_combout ; +wire \RAM|mem[94][0]~q ; +wire \RAM|mem[110][0]~feeder_combout ; +wire \RAM|mem[110][0]~59_combout ; +wire \RAM|mem[110][0]~q ; +wire \RAM|mem[78][0]~57_combout ; +wire \RAM|mem[78][0]~q ; +wire \RAM|mem[126][1]~60_combout ; +wire \RAM|mem[126][0]~q ; +wire \rd[0]~18_combout ; +wire \RAM|mem[76][0]~feeder_combout ; +wire \RAM|mem[76][2]~49_combout ; +wire \RAM|mem[76][0]~q ; +wire \RAM|mem[108][3]~51_combout ; +wire \RAM|mem[108][0]~q ; +wire \RAM|mem[92][2]~50_combout ; +wire \RAM|mem[92][0]~q ; +wire \RAM|mem[124][2]~52_combout ; +wire \RAM|mem[124][0]~q ; +wire \rd[0]~16_combout ; +wire \rd[0]~20_combout ; +wire \RAM|mem[112][1]~13_combout ; +wire \RAM|mem[112][0]~q ; +wire \RAM|mem[114][0]~feeder_combout ; +wire \RAM|mem[114][0]~15_combout ; +wire \RAM|mem[114][0]~q ; +wire \RAM|mem[113][0]~feeder_combout ; +wire \RAM|mem[113][0]~14_combout ; +wire \RAM|mem[113][0]~q ; +wire \RAM|mem[115][2]~16_combout ; +wire \RAM|mem[115][0]~q ; +wire \rd[0]~4_combout ; +wire \RAM|mem[67][3]~4_combout ; +wire \RAM|mem[67][0]~q ; +wire \RAM|mem[66][2]~3_combout ; +wire \RAM|mem[66][0]~q ; +wire \RAM|mem[64][1]~1_combout ; +wire \RAM|mem[64][0]~q ; +wire \RAM|mem[65][3]~2_combout ; +wire \RAM|mem[65][0]~q ; +wire \rd[0]~1_combout ; +wire \RAM|mem[98][3]~11_combout ; +wire \RAM|mem[98][0]~q ; +wire \RAM|mem[96][1]~9_combout ; +wire \RAM|mem[96][0]~q ; +wire \RAM|mem[97][4]~10_combout ; +wire \RAM|mem[97][0]~q ; +wire \RAM|mem[99][0]~12_combout ; +wire \RAM|mem[99][0]~q ; +wire \rd[0]~3_combout ; +wire \RAM|mem[80][0]~5_combout ; +wire \RAM|mem[80][0]~q ; +wire \RAM|mem[82][1]~7_combout ; +wire \RAM|mem[82][0]~q ; +wire \RAM|mem[81][0]~6_combout ; +wire \RAM|mem[81][0]~q ; +wire \RAM|mem[83][0]~8_combout ; +wire \RAM|mem[83][0]~q ; +wire \rd[0]~2_combout ; +wire \rd[0]~5_combout ; +wire \RAM|mem[101][1]~26_combout ; +wire \RAM|mem[101][0]~q ; +wire \RAM|mem[102][1]~27_combout ; +wire \RAM|mem[102][0]~q ; +wire \RAM|mem[100][0]~25_combout ; +wire \RAM|mem[100][0]~q ; +wire \RAM|mem[103][1]~28_combout ; +wire \RAM|mem[103][0]~q ; +wire \rd[0]~8_combout ; +wire \RAM|mem[70][4]~19_combout ; +wire \RAM|mem[70][0]~q ; +wire \RAM|mem[69][1]~18_combout ; +wire \RAM|mem[69][0]~q ; +wire \RAM|mem[68][0]~feeder_combout ; +wire \RAM|mem[68][0]~17_combout ; +wire \RAM|mem[68][0]~q ; +wire \RAM|mem[71][3]~20_combout ; +wire \RAM|mem[71][0]~q ; +wire \rd[0]~6_combout ; +wire \RAM|mem[84][1]~21_combout ; +wire \RAM|mem[84][0]~q ; +wire \RAM|mem[86][3]~23_combout ; +wire \RAM|mem[86][0]~q ; +wire \RAM|mem[85][1]~22_combout ; +wire \RAM|mem[85][0]~q ; +wire \RAM|mem[87][4]~24_combout ; +wire \RAM|mem[87][0]~q ; +wire \rd[0]~7_combout ; +wire \RAM|mem[117][2]~30_combout ; +wire \RAM|mem[117][0]~q ; +wire \RAM|mem[116][0]~29_combout ; +wire \RAM|mem[116][0]~q ; +wire \RAM|mem[118][4]~31_combout ; +wire \RAM|mem[118][0]~q ; +wire \RAM|mem[119][4]~32_combout ; +wire \RAM|mem[119][0]~q ; +wire \rd[0]~9_combout ; +wire \rd[0]~10_combout ; +wire \rd[0]~21_combout ; +wire \rd[0]~86_combout ; +wire \REGS|regs[26][0]~q ; +wire \REGS|regs[18][0]~feeder_combout ; +wire \REGS|regs[18][0]~q ; +wire \REGS|Mux63~4_combout ; +wire \REGS|regs[8][0]~q ; +wire \REGS|regs[9][0]~q ; +wire \REGS|Mux31~1_combout ; +wire \REGS|Mux31~0_combout ; +wire \REGS|Mux31~2_combout ; +wire \ALU|adder_unit|_~13 ; +wire \ALU|adder_unit|_~17 ; +wire \ALU|adder_unit|_~26 ; +wire \ALU|adder_unit|_~29 ; +wire \ALU|adder_unit|_~20 ; +wire \ALU|adder_unit|_~23 ; +wire \ALU|adder_unit|_~8 ; +wire \ALU|adder_unit|_~5 ; +wire \ALU|adder_unit|_~56 ; +wire \ALU|adder_unit|_~62 ; +wire \ALU|adder_unit|_~68 ; +wire \ALU|adder_unit|_~74 ; +wire \ALU|adder_unit|_~80 ; +wire \ALU|adder_unit|_~86 ; +wire \ALU|adder_unit|_~92 ; +wire \ALU|adder_unit|_~98 ; +wire \ALU|adder_unit|_~2 ; +wire \ALU|adder_unit|_~32 ; +wire \ALU|adder_unit|_~35 ; +wire \ALU|adder_unit|_~38 ; +wire \ALU|adder_unit|_~41 ; +wire \ALU|adder_unit|_~44 ; +wire \ALU|adder_unit|_~47 ; +wire \ALU|adder_unit|_~50 ; +wire \ALU|adder_unit|_~53 ; +wire \ALU|adder_unit|_~59 ; +wire \ALU|adder_unit|_~65 ; +wire \ALU|adder_unit|_~71 ; +wire \ALU|adder_unit|_~77 ; +wire \ALU|adder_unit|_~83 ; +wire \ALU|adder_unit|_~88 ; +wire \ALU|adder_unit|_~89 ; +wire \rd[31]~455_combout ; +wire \REGS|regs[8][31]~q ; +wire \REGS|Mux0~1_combout ; +wire \REGS|Mux0~0_combout ; +wire \REGS|Mux0~2_combout ; +wire \ALU|adder_unit|_~94 ; +wire \ALU|adder_unit|_~95 ; +wire \RAM|Decoder0~4_combout ; +wire \RAM|Decoder0~45_combout ; +wire \RAM|mem[241][4]~212_combout ; +wire \RAM|mem[241][1]~q ; +wire \RAM|mem[249][1]~q ; +wire \RAM|mem[245][1]~q ; +wire \RAM|mem[253][1]~q ; +wire \rd[1]~104_combout ; +wire \RAM|mem[240][1]~feeder_combout ; +wire \RAM|mem[240][1]~q ; +wire \RAM|mem[248][1]~q ; +wire \RAM|mem[244][1]~feeder_combout ; +wire \RAM|mem[244][1]~q ; +wire \RAM|mem[252][1]~q ; +wire \rd[1]~103_combout ; +wire \RAM|mem[247][1]~q ; +wire \RAM|mem[251][1]~q ; +wire \RAM|mem[243][1]~q ; +wire \RAM|mem[255][1]~q ; +wire \rd[1]~106_combout ; +wire \RAM|mem[254][1]~q ; +wire \RAM|mem[246][1]~q ; +wire \RAM|mem[250][1]~q ; +wire \RAM|mem[242][1]~q ; +wire \rd[1]~105_combout ; +wire \rd[1]~107_combout ; +wire \RAM|mem[205][1]~q ; +wire \RAM|mem[201][1]~q ; +wire \RAM|mem[197][1]~q ; +wire \RAM|mem[193][1]~q ; +wire \rd[1]~89_combout ; +wire \RAM|mem[203][1]~q ; +wire \RAM|mem[195][1]~q ; +wire \RAM|mem[199][1]~q ; +wire \RAM|mem[207][1]~q ; +wire \rd[1]~91_combout ; +wire \RAM|mem[204][1]~q ; +wire \RAM|mem[192][1]~q ; +wire \RAM|mem[200][1]~feeder_combout ; +wire \RAM|mem[200][1]~q ; +wire \RAM|mem[196][1]~q ; +wire \rd[1]~88_combout ; +wire \RAM|mem[202][1]~feeder_combout ; +wire \RAM|mem[202][1]~q ; +wire \RAM|mem[206][1]~q ; +wire \RAM|mem[194][1]~q ; +wire \RAM|mem[198][1]~q ; +wire \rd[1]~90_combout ; +wire \rd[1]~92_combout ; +wire \RAM|mem[217][1]~feeder_combout ; +wire \RAM|mem[217][1]~q ; +wire \RAM|mem[213][1]~q ; +wire \RAM|mem[209][1]~q ; +wire \RAM|mem[221][1]~q ; +wire \rd[1]~94_combout ; +wire \RAM|mem[220][1]~q ; +wire \RAM|mem[216][1]~feeder_combout ; +wire \RAM|mem[216][1]~q ; +wire \RAM|mem[208][1]~q ; +wire \RAM|mem[212][1]~q ; +wire \rd[1]~93_combout ; +wire \RAM|mem[218][1]~feeder_combout ; +wire \RAM|mem[218][1]~q ; +wire \RAM|mem[214][1]~feeder_combout ; +wire \RAM|mem[214][1]~q ; +wire \RAM|mem[210][1]~q ; +wire \RAM|mem[222][1]~q ; +wire \rd[1]~95_combout ; +wire \RAM|mem[215][1]~q ; +wire \RAM|mem[211][1]~q ; +wire \RAM|mem[219][1]~q ; +wire \RAM|mem[223][1]~q ; +wire \rd[1]~96_combout ; +wire \rd[1]~97_combout ; +wire \RAM|mem[232][1]~feeder_combout ; +wire \RAM|mem[232][1]~q ; +wire \RAM|mem[233][1]~q ; +wire \RAM|mem[234][1]~q ; +wire \RAM|mem[235][1]~q ; +wire \rd[1]~100_combout ; +wire \RAM|mem[230][1]~feeder_combout ; +wire \RAM|mem[230][1]~q ; +wire \RAM|mem[228][1]~q ; +wire \RAM|mem[229][1]~q ; +wire \RAM|mem[231][1]~q ; +wire \rd[1]~99_combout ; +wire \RAM|mem[238][1]~q ; +wire \RAM|mem[236][1]~q ; +wire \RAM|mem[237][1]~q ; +wire \RAM|mem[239][1]~q ; +wire \rd[1]~101_combout ; +wire \RAM|mem[226][1]~q ; +wire \RAM|mem[225][1]~q ; +wire \RAM|mem[224][1]~feeder_combout ; +wire \RAM|mem[224][1]~q ; +wire \RAM|mem[227][1]~q ; +wire \rd[1]~98_combout ; +wire \rd[1]~102_combout ; +wire \rd[1]~108_combout ; +wire \RAM|mem[33][1]~feeder_combout ; +wire \RAM|mem[33][1]~q ; +wire \RAM|mem[32][1]~q ; +wire \RAM|mem[34][1]~q ; +wire \RAM|mem[35][1]~q ; +wire \rd[1]~111_combout ; +wire \RAM|mem[51][1]~feeder_combout ; +wire \RAM|mem[51][1]~q ; +wire \RAM|mem[49][1]~feeder_combout ; +wire \RAM|mem[49][1]~q ; +wire \RAM|mem[48][1]~feeder_combout ; +wire \RAM|mem[48][1]~q ; +wire \RAM|mem[50][1]~q ; +wire \rd[1]~112_combout ; +wire \RAM|mem[19][1]~feeder_combout ; +wire \RAM|mem[19][1]~q ; +wire \RAM|mem[16][1]~q ; +wire \RAM|mem[18][1]~feeder_combout ; +wire \RAM|mem[18][1]~q ; +wire \RAM|mem[17][1]~q ; +wire \rd[1]~110_combout ; +wire \RAM|mem[0][1]~q ; +wire \RAM|mem[2][1]~q ; +wire \RAM|mem[3][1]~q ; +wire \RAM|mem[1][1]~q ; +wire \rd[1]~109_combout ; +wire \rd[1]~113_combout ; +wire \RAM|mem[61][1]~q ; +wire \RAM|mem[13][1]~q ; +wire \RAM|mem[29][1]~q ; +wire \RAM|mem[45][1]~q ; +wire \rd[1]~125_combout ; +wire \RAM|mem[62][1]~q ; +wire \RAM|mem[14][1]~q ; +wire \RAM|mem[30][1]~feeder_combout ; +wire \RAM|mem[30][1]~q ; +wire \RAM|mem[46][1]~q ; +wire \rd[1]~126_combout ; +wire \RAM|mem[47][1]~q ; +wire \RAM|mem[31][1]~q ; +wire \RAM|mem[15][1]~q ; +wire \RAM|mem[63][1]~q ; +wire \rd[1]~127_combout ; +wire \RAM|mem[44][1]~q ; +wire \RAM|mem[12][1]~q ; +wire \RAM|mem[28][1]~feeder_combout ; +wire \RAM|mem[28][1]~q ; +wire \RAM|mem[60][1]~q ; +wire \rd[1]~124_combout ; +wire \rd[1]~128_combout ; +wire \RAM|mem[7][1]~q ; +wire \RAM|mem[6][1]~q ; +wire \RAM|mem[4][1]~q ; +wire \RAM|mem[5][1]~q ; +wire \rd[1]~114_combout ; +wire \RAM|mem[36][1]~q ; +wire \RAM|mem[38][1]~feeder_combout ; +wire \RAM|mem[38][1]~q ; +wire \RAM|mem[37][1]~q ; +wire \RAM|mem[39][1]~q ; +wire \rd[1]~116_combout ; +wire \RAM|mem[54][1]~q ; +wire \RAM|mem[53][1]~q ; +wire \RAM|mem[52][1]~q ; +wire \RAM|mem[55][1]~q ; +wire \rd[1]~117_combout ; +wire \RAM|mem[23][1]~q ; +wire \RAM|mem[20][1]~q ; +wire \RAM|mem[22][1]~feeder_combout ; +wire \RAM|mem[22][1]~q ; +wire \RAM|mem[21][1]~q ; +wire \rd[1]~115_combout ; +wire \rd[1]~118_combout ; +wire \RAM|mem[24][1]~feeder_combout ; +wire \RAM|mem[24][1]~q ; +wire \RAM|mem[25][1]~feeder_combout ; +wire \RAM|mem[25][1]~q ; +wire \RAM|mem[26][1]~q ; +wire \RAM|mem[27][1]~q ; +wire \rd[1]~120_combout ; +wire \RAM|mem[57][1]~feeder_combout ; +wire \RAM|mem[57][1]~q ; +wire \RAM|mem[58][1]~q ; +wire \RAM|mem[56][1]~q ; +wire \RAM|mem[59][1]~q ; +wire \rd[1]~122_combout ; +wire \RAM|mem[9][1]~feeder_combout ; +wire \RAM|mem[9][1]~q ; +wire \RAM|mem[8][1]~q ; +wire \RAM|mem[10][1]~q ; +wire \RAM|mem[11][1]~q ; +wire \rd[1]~119_combout ; +wire \RAM|mem[42][1]~feeder_combout ; +wire \RAM|mem[42][1]~q ; +wire \RAM|mem[40][1]~q ; +wire \RAM|mem[41][1]~feeder_combout ; +wire \RAM|mem[41][1]~q ; +wire \RAM|mem[43][1]~q ; +wire \rd[1]~121_combout ; +wire \rd[1]~123_combout ; +wire \rd[1]~129_combout ; +wire \RAM|mem[113][1]~q ; +wire \RAM|mem[97][1]~feeder_combout ; +wire \RAM|mem[97][1]~q ; +wire \RAM|mem[65][1]~q ; +wire \RAM|mem[81][1]~q ; +wire \rd[1]~156_combout ; +wire \RAM|mem[77][1]~feeder_combout ; +wire \RAM|mem[77][1]~q ; +wire \RAM|mem[93][1]~feeder_combout ; +wire \RAM|mem[93][1]~q ; +wire \RAM|mem[109][1]~q ; +wire \RAM|mem[125][1]~q ; +wire \rd[1]~159_combout ; +wire \RAM|mem[69][1]~q ; +wire \RAM|mem[101][1]~feeder_combout ; +wire \RAM|mem[101][1]~q ; +wire \RAM|mem[117][1]~feeder_combout ; +wire \RAM|mem[117][1]~q ; +wire \RAM|mem[85][1]~q ; +wire \rd[1]~157_combout ; +wire \RAM|mem[73][1]~feeder_combout ; +wire \RAM|mem[73][1]~q ; +wire \RAM|mem[89][1]~q ; +wire \RAM|mem[105][1]~feeder_combout ; +wire \RAM|mem[105][1]~q ; +wire \RAM|mem[121][1]~q ; +wire \rd[1]~158_combout ; +wire \rd[1]~160_combout ; +wire \RAM|mem[82][1]~q ; +wire \RAM|mem[98][1]~q ; +wire \RAM|mem[66][1]~q ; +wire \RAM|mem[114][1]~q ; +wire \rd[1]~161_combout ; +wire \RAM|mem[78][1]~q ; +wire \RAM|mem[94][1]~q ; +wire \RAM|mem[110][1]~feeder_combout ; +wire \RAM|mem[110][1]~q ; +wire \RAM|mem[126][1]~q ; +wire \rd[1]~164_combout ; +wire \RAM|mem[74][1]~feeder_combout ; +wire \RAM|mem[74][1]~q ; +wire \RAM|mem[90][1]~q ; +wire \RAM|mem[106][1]~feeder_combout ; +wire \RAM|mem[106][1]~q ; +wire \RAM|mem[122][1]~q ; +wire \rd[1]~163_combout ; +wire \RAM|mem[70][1]~feeder_combout ; +wire \RAM|mem[70][1]~q ; +wire \RAM|mem[102][1]~feeder_combout ; +wire \RAM|mem[102][1]~q ; +wire \RAM|mem[86][1]~feeder_combout ; +wire \RAM|mem[86][1]~q ; +wire \RAM|mem[118][1]~q ; +wire \rd[1]~162_combout ; +wire \rd[1]~165_combout ; +wire \RAM|mem[127][1]~q ; +wire \RAM|mem[115][1]~q ; +wire \RAM|mem[119][1]~q ; +wire \RAM|mem[123][1]~q ; +wire \rd[1]~169_combout ; +wire \RAM|mem[107][1]~q ; +wire \RAM|mem[99][1]~q ; +wire \RAM|mem[103][1]~q ; +wire \RAM|mem[111][1]~q ; +wire \rd[1]~168_combout ; +wire \RAM|mem[87][1]~q ; +wire \RAM|mem[83][1]~q ; +wire \RAM|mem[91][1]~q ; +wire \RAM|mem[95][1]~q ; +wire \rd[1]~167_combout ; +wire \RAM|mem[67][1]~feeder_combout ; +wire \RAM|mem[67][1]~q ; +wire \RAM|mem[71][1]~q ; +wire \RAM|mem[75][1]~q ; +wire \RAM|mem[79][1]~q ; +wire \rd[1]~166_combout ; +wire \rd[1]~170_combout ; +wire \RAM|mem[64][1]~q ; +wire \RAM|mem[96][1]~feeder_combout ; +wire \RAM|mem[96][1]~q ; +wire \RAM|mem[112][1]~feeder_combout ; +wire \RAM|mem[112][1]~q ; +wire \RAM|mem[80][1]~q ; +wire \rd[1]~151_combout ; +wire \RAM|mem[88][1]~q ; +wire \RAM|mem[104][1]~feeder_combout ; +wire \RAM|mem[104][1]~q ; +wire \RAM|mem[72][1]~feeder_combout ; +wire \RAM|mem[72][1]~q ; +wire \RAM|mem[120][1]~q ; +wire \rd[1]~153_combout ; +wire \RAM|mem[116][1]~feeder_combout ; +wire \RAM|mem[116][1]~q ; +wire \RAM|mem[100][1]~feeder_combout ; +wire \RAM|mem[100][1]~q ; +wire \RAM|mem[68][1]~q ; +wire \RAM|mem[84][1]~q ; +wire \rd[1]~152_combout ; +wire \RAM|mem[92][1]~q ; +wire \RAM|mem[108][1]~feeder_combout ; +wire \RAM|mem[108][1]~q ; +wire \RAM|mem[76][1]~q ; +wire \RAM|mem[124][1]~q ; +wire \rd[1]~154_combout ; +wire \rd[1]~155_combout ; +wire \rd[1]~171_combout ; +wire \RAM|mem[184][1]~q ; +wire \RAM|mem[185][1]~q ; +wire \RAM|mem[186][1]~q ; +wire \RAM|mem[187][1]~q ; +wire \rd[1]~143_combout ; +wire \RAM|mem[152][1]~q ; +wire \RAM|mem[154][1]~feeder_combout ; +wire \RAM|mem[154][1]~q ; +wire \RAM|mem[153][1]~q ; +wire \RAM|mem[155][1]~q ; +wire \rd[1]~141_combout ; +wire \RAM|mem[136][1]~q ; +wire \RAM|mem[138][1]~q ; +wire \RAM|mem[137][1]~feeder_combout ; +wire \RAM|mem[137][1]~q ; +wire \RAM|mem[139][1]~q ; +wire \rd[1]~140_combout ; +wire \RAM|mem[168][1]~feeder_combout ; +wire \RAM|mem[168][1]~q ; +wire \RAM|mem[170][1]~feeder_combout ; +wire \RAM|mem[170][1]~q ; +wire \RAM|mem[169][1]~q ; +wire \RAM|mem[171][1]~q ; +wire \rd[1]~142_combout ; +wire \rd[1]~144_combout ; +wire \RAM|mem[158][1]~feeder_combout ; +wire \RAM|mem[158][1]~q ; +wire \RAM|mem[142][1]~q ; +wire \RAM|mem[174][1]~q ; +wire \RAM|mem[190][1]~q ; +wire \rd[1]~147_combout ; +wire \RAM|mem[143][1]~q ; +wire \RAM|mem[175][1]~q ; +wire \RAM|mem[159][1]~q ; +wire \RAM|mem[191][1]~q ; +wire \rd[1]~148_combout ; +wire \RAM|mem[172][1]~feeder_combout ; +wire \RAM|mem[172][1]~q ; +wire \RAM|mem[156][1]~feeder_combout ; +wire \RAM|mem[156][1]~q ; +wire \RAM|mem[140][1]~feeder_combout ; +wire \RAM|mem[140][1]~q ; +wire \RAM|mem[188][1]~q ; +wire \rd[1]~145_combout ; +wire \RAM|mem[173][1]~q ; +wire \RAM|mem[157][1]~feeder_combout ; +wire \RAM|mem[157][1]~q ; +wire \RAM|mem[141][1]~q ; +wire \RAM|mem[189][1]~q ; +wire \rd[1]~146_combout ; +wire \rd[1]~149_combout ; +wire \RAM|mem[144][1]~q ; +wire \RAM|mem[147][1]~feeder_combout ; +wire \RAM|mem[147][1]~q ; +wire \RAM|mem[146][1]~q ; +wire \RAM|mem[145][1]~q ; +wire \rd[1]~131_combout ; +wire \RAM|mem[128][1]~q ; +wire \RAM|mem[130][1]~q ; +wire \RAM|mem[131][1]~q ; +wire \RAM|mem[129][1]~q ; +wire \rd[1]~130_combout ; +wire \RAM|mem[162][1]~q ; +wire \RAM|mem[160][1]~q ; +wire \RAM|mem[161][1]~q ; +wire \RAM|mem[163][1]~q ; +wire \rd[1]~132_combout ; +wire \RAM|mem[178][1]~q ; +wire \RAM|mem[176][1]~q ; +wire \RAM|mem[177][1]~q ; +wire \RAM|mem[179][1]~q ; +wire \rd[1]~133_combout ; +wire \rd[1]~134_combout ; +wire \RAM|mem[150][1]~q ; +wire \RAM|mem[148][1]~q ; +wire \RAM|mem[151][1]~q ; +wire \RAM|mem[149][1]~q ; +wire \rd[1]~136_combout ; +wire \RAM|mem[164][1]~q ; +wire \RAM|mem[165][1]~q ; +wire \RAM|mem[166][1]~feeder_combout ; +wire \RAM|mem[166][1]~q ; +wire \RAM|mem[167][1]~q ; +wire \rd[1]~137_combout ; +wire \RAM|mem[132][1]~q ; +wire \RAM|mem[134][1]~feeder_combout ; +wire \RAM|mem[134][1]~q ; +wire \RAM|mem[135][1]~q ; +wire \RAM|mem[133][1]~q ; +wire \rd[1]~135_combout ; +wire \RAM|mem[181][1]~q ; +wire \RAM|mem[180][1]~q ; +wire \RAM|mem[182][1]~q ; +wire \RAM|mem[183][1]~q ; +wire \rd[1]~138_combout ; +wire \rd[1]~139_combout ; +wire \rd[1]~150_combout ; +wire \rd[1]~172_combout ; +wire \rd[1]~173_combout ; +wire \REGS|regs[9][1]~q ; +wire \REGS|regs[8][1]~q ; +wire \REGS|Mux30~1_combout ; +wire \REGS|Mux30~0_combout ; +wire \REGS|Mux30~2_combout ; +wire \ALU|adder_unit|_~16 ; +wire \ALU|Mux29~3_combout ; +wire \REGS|regs[2][2]~DUPLICATE_q ; +wire \REGS|regs[10][2]~q ; +wire \REGS|regs[11][2]~q ; +wire \REGS|Mux61~12_combout ; +wire \REGS|regs[8][2]~q ; +wire \REGS|regs[1][2]~q ; +wire \REGS|regs[9][2]~DUPLICATE_q ; +wire \REGS|Mux61~13_combout ; +wire \REGS|regs[15][2]~q ; +wire \REGS|regs[14][2]~q ; +wire \REGS|regs[6][2]~DUPLICATE_q ; +wire \REGS|Mux61~8_combout ; +wire \REGS|Mux61~11_combout ; +wire \REGS|Mux61~14_combout ; +wire \RAM|mem~258_combout ; +wire \RAM|mem[175][2]~q ; +wire \RAM|mem[167][2]~q ; +wire \RAM|mem[163][2]~q ; +wire \RAM|mem[171][2]~q ; +wire \rd[2]~234_combout ; +wire \RAM|mem[155][2]~q ; +wire \RAM|mem[151][2]~q ; +wire \RAM|mem[147][2]~q ; +wire \RAM|mem[159][2]~q ; +wire \rd[2]~233_combout ; +wire \RAM|mem[139][2]~q ; +wire \RAM|mem[135][2]~feeder_combout ; +wire \RAM|mem[135][2]~q ; +wire \RAM|mem[131][2]~q ; +wire \RAM|mem[143][2]~q ; +wire \rd[2]~232_combout ; +wire \RAM|mem[187][2]~feeder_combout ; +wire \RAM|mem[187][2]~q ; +wire \RAM|mem[183][2]~q ; +wire \RAM|mem[179][2]~q ; +wire \RAM|mem[191][2]~q ; +wire \rd[2]~235_combout ; +wire \rd[2]~236_combout ; +wire \RAM|mem[161][2]~q ; +wire \RAM|mem[129][2]~q ; +wire \RAM|mem[177][2]~feeder_combout ; +wire \RAM|mem[177][2]~q ; +wire \RAM|mem[145][2]~q ; +wire \rd[2]~222_combout ; +wire \RAM|mem[141][2]~q ; +wire \RAM|mem[157][2]~q ; +wire \RAM|mem[189][2]~q ; +wire \RAM|mem[173][2]~feeder_combout ; +wire \RAM|mem[173][2]~q ; +wire \rd[2]~225_combout ; +wire \RAM|mem[133][2]~q ; +wire \RAM|mem[165][2]~q ; +wire \RAM|mem[181][2]~feeder_combout ; +wire \RAM|mem[181][2]~q ; +wire \RAM|mem[149][2]~q ; +wire \rd[2]~223_combout ; +wire \RAM|mem[137][2]~q ; +wire \RAM|mem[153][2]~q ; +wire \RAM|mem[169][2]~q ; +wire \RAM|mem[185][2]~q ; +wire \rd[2]~224_combout ; +wire \rd[2]~226_combout ; +wire \RAM|mem[156][2]~feeder_combout ; +wire \RAM|mem[156][2]~q ; +wire \RAM|mem[172][2]~q ; +wire \RAM|mem[140][2]~q ; +wire \RAM|mem[188][2]~q ; +wire \rd[2]~220_combout ; +wire \RAM|mem[148][2]~q ; +wire \RAM|mem[180][2]~feeder_combout ; +wire \RAM|mem[180][2]~q ; +wire \RAM|mem[164][2]~feeder_combout ; +wire \RAM|mem[164][2]~q ; +wire \RAM|mem[132][2]~q ; +wire \rd[2]~218_combout ; +wire \RAM|mem[136][2]~feeder_combout ; +wire \RAM|mem[136][2]~q ; +wire \RAM|mem[168][2]~feeder_combout ; +wire \RAM|mem[168][2]~q ; +wire \RAM|mem[184][2]~feeder_combout ; +wire \RAM|mem[184][2]~q ; +wire \RAM|mem[152][2]~feeder_combout ; +wire \RAM|mem[152][2]~q ; +wire \rd[2]~219_combout ; +wire \RAM|mem[176][2]~q ; +wire \RAM|mem[160][2]~q ; +wire \RAM|mem[128][2]~q ; +wire \RAM|mem[144][2]~q ; +wire \rd[2]~217_combout ; +wire \rd[2]~221_combout ; +wire \RAM|mem[150][2]~q ; +wire \RAM|mem[166][2]~q ; +wire \RAM|mem[134][2]~q ; +wire \RAM|mem[182][2]~q ; +wire \rd[2]~228_combout ; +wire \RAM|mem[142][2]~q ; +wire \RAM|mem[158][2]~q ; +wire \RAM|mem[174][2]~feeder_combout ; +wire \RAM|mem[174][2]~q ; +wire \RAM|mem[190][2]~q ; +wire \rd[2]~230_combout ; +wire \RAM|mem[146][2]~feeder_combout ; +wire \RAM|mem[146][2]~q ; +wire \RAM|mem[130][2]~q ; +wire \RAM|mem[162][2]~q ; +wire \RAM|mem[178][2]~feeder_combout ; +wire \RAM|mem[178][2]~q ; +wire \rd[2]~227_combout ; +wire \RAM|mem[170][2]~q ; +wire \RAM|mem[154][2]~q ; +wire \RAM|mem[138][2]~feeder_combout ; +wire \RAM|mem[138][2]~q ; +wire \RAM|mem[186][2]~q ; +wire \rd[2]~229_combout ; +wire \rd[2]~231_combout ; +wire \rd[2]~237_combout ; +wire \RAM|mem[3][2]~q ; +wire \RAM|mem[7][2]~feeder_combout ; +wire \RAM|mem[7][2]~q ; +wire \RAM|mem[11][2]~q ; +wire \RAM|mem[15][2]~q ; +wire \rd[2]~253_combout ; +wire \RAM|mem[63][2]~feeder_combout ; +wire \RAM|mem[63][2]~q ; +wire \RAM|mem[55][2]~q ; +wire \RAM|mem[51][2]~feeder_combout ; +wire \RAM|mem[51][2]~q ; +wire \RAM|mem[59][2]~q ; +wire \rd[2]~256_combout ; +wire \RAM|mem[47][2]~q ; +wire \RAM|mem[39][2]~q ; +wire \RAM|mem[43][2]~q ; +wire \RAM|mem[35][2]~q ; +wire \rd[2]~255_combout ; +wire \RAM|mem[19][2]~feeder_combout ; +wire \RAM|mem[19][2]~q ; +wire \RAM|mem[27][2]~q ; +wire \RAM|mem[23][2]~feeder_combout ; +wire \RAM|mem[23][2]~q ; +wire \RAM|mem[31][2]~q ; +wire \rd[2]~254_combout ; +wire \rd[2]~257_combout ; +wire \RAM|mem[8][2]~q ; +wire \RAM|mem[24][2]~q ; +wire \RAM|mem[56][2]~q ; +wire \RAM|mem[40][2]~q ; +wire \rd[2]~240_combout ; +wire \RAM|mem[52][2]~feeder_combout ; +wire \RAM|mem[52][2]~q ; +wire \RAM|mem[4][2]~q ; +wire \RAM|mem[36][2]~q ; +wire \RAM|mem[20][2]~q ; +wire \rd[2]~239_combout ; +wire \RAM|mem[0][2]~q ; +wire \RAM|mem[32][2]~q ; +wire \RAM|mem[48][2]~feeder_combout ; +wire \RAM|mem[48][2]~q ; +wire \RAM|mem[16][2]~q ; +wire \rd[2]~238_combout ; +wire \RAM|mem[28][2]~q ; +wire \RAM|mem[44][2]~q ; +wire \RAM|mem[12][2]~feeder_combout ; +wire \RAM|mem[12][2]~q ; +wire \RAM|mem[60][2]~q ; +wire \rd[2]~241_combout ; +wire \rd[2]~242_combout ; +wire \RAM|mem[18][2]~q ; +wire \RAM|mem[34][2]~q ; +wire \RAM|mem[2][2]~feeder_combout ; +wire \RAM|mem[2][2]~q ; +wire \RAM|mem[50][2]~q ; +wire \rd[2]~248_combout ; +wire \RAM|mem[14][2]~feeder_combout ; +wire \RAM|mem[14][2]~q ; +wire \RAM|mem[30][2]~q ; +wire \RAM|mem[46][2]~q ; +wire \RAM|mem[62][2]~q ; +wire \rd[2]~251_combout ; +wire \RAM|mem[22][2]~feeder_combout ; +wire \RAM|mem[22][2]~q ; +wire \RAM|mem[38][2]~feeder_combout ; +wire \RAM|mem[38][2]~q ; +wire \RAM|mem[6][2]~feeder_combout ; +wire \RAM|mem[6][2]~q ; +wire \RAM|mem[54][2]~q ; +wire \rd[2]~249_combout ; +wire \RAM|mem[26][2]~feeder_combout ; +wire \RAM|mem[26][2]~q ; +wire \RAM|mem[10][2]~feeder_combout ; +wire \RAM|mem[10][2]~q ; +wire \RAM|mem[42][2]~feeder_combout ; +wire \RAM|mem[42][2]~q ; +wire \RAM|mem[58][2]~q ; +wire \rd[2]~250_combout ; +wire \rd[2]~252_combout ; +wire \RAM|mem[13][2]~feeder_combout ; +wire \RAM|mem[13][2]~q ; +wire \RAM|mem[45][2]~feeder_combout ; +wire \RAM|mem[45][2]~q ; +wire \RAM|mem[29][2]~q ; +wire \RAM|mem[61][2]~q ; +wire \rd[2]~246_combout ; +wire \RAM|mem[37][2]~q ; +wire \RAM|mem[5][2]~feeder_combout ; +wire \RAM|mem[5][2]~q ; +wire \RAM|mem[53][2]~feeder_combout ; +wire \RAM|mem[53][2]~q ; +wire \RAM|mem[21][2]~q ; +wire \rd[2]~244_combout ; +wire \RAM|mem[49][2]~q ; +wire \RAM|mem[33][2]~q ; +wire \RAM|mem[1][2]~q ; +wire \RAM|mem[17][2]~q ; +wire \rd[2]~243_combout ; +wire \RAM|mem[41][2]~q ; +wire \RAM|mem[25][2]~q ; +wire \RAM|mem[9][2]~q ; +wire \RAM|mem[57][2]~q ; +wire \rd[2]~245_combout ; +wire \rd[2]~247_combout ; +wire \rd[2]~258_combout ; +wire \rd[2]~259_combout ; +wire \RAM|mem[206][2]~q ; +wire \RAM|mem[238][2]~feeder_combout ; +wire \RAM|mem[238][2]~q ; +wire \RAM|mem[222][2]~q ; +wire \RAM|mem[254][2]~q ; +wire \rd[2]~192_combout ; +wire \RAM|mem[221][2]~feeder_combout ; +wire \RAM|mem[221][2]~q ; +wire \RAM|mem[237][2]~feeder_combout ; +wire \RAM|mem[237][2]~q ; +wire \RAM|mem[205][2]~feeder_combout ; +wire \RAM|mem[205][2]~q ; +wire \RAM|mem[253][2]~q ; +wire \rd[2]~191_combout ; +wire \RAM|mem[220][2]~q ; +wire \RAM|mem[204][2]~q ; +wire \RAM|mem[236][2]~feeder_combout ; +wire \RAM|mem[236][2]~q ; +wire \RAM|mem[252][2]~q ; +wire \rd[2]~190_combout ; +wire \RAM|mem[223][2]~q ; +wire \RAM|mem[239][2]~q ; +wire \RAM|mem[207][2]~q ; +wire \RAM|mem[255][2]~q ; +wire \rd[2]~193_combout ; +wire \rd[2]~194_combout ; +wire \RAM|mem[200][2]~feeder_combout ; +wire \RAM|mem[200][2]~q ; +wire \RAM|mem[201][2]~feeder_combout ; +wire \RAM|mem[201][2]~q ; +wire \RAM|mem[202][2]~q ; +wire \RAM|mem[203][2]~q ; +wire \rd[2]~185_combout ; +wire \RAM|mem[249][2]~q ; +wire \RAM|mem[248][2]~q ; +wire \RAM|mem[250][2]~q ; +wire \RAM|mem[251][2]~q ; +wire \rd[2]~188_combout ; +wire \RAM|mem[218][2]~q ; +wire \RAM|mem[216][2]~feeder_combout ; +wire \RAM|mem[216][2]~q ; +wire \RAM|mem[217][2]~q ; +wire \RAM|mem[219][2]~q ; +wire \rd[2]~186_combout ; +wire \RAM|mem[234][2]~q ; +wire \RAM|mem[232][2]~feeder_combout ; +wire \RAM|mem[232][2]~q ; +wire \RAM|mem[233][2]~q ; +wire \RAM|mem[235][2]~q ; +wire \rd[2]~187_combout ; +wire \rd[2]~189_combout ; +wire \RAM|mem[210][2]~q ; +wire \RAM|mem[209][2]~q ; +wire \RAM|mem[208][2]~q ; +wire \RAM|mem[211][2]~q ; +wire \rd[2]~176_combout ; +wire \RAM|mem[192][2]~q ; +wire \RAM|mem[195][2]~feeder_combout ; +wire \RAM|mem[195][2]~q ; +wire \RAM|mem[194][2]~q ; +wire \RAM|mem[193][2]~q ; +wire \rd[2]~175_combout ; +wire \RAM|mem[241][2]~feeder_combout ; +wire \RAM|mem[241][2]~q ; +wire \RAM|mem[240][2]~feeder_combout ; +wire \RAM|mem[240][2]~q ; +wire \RAM|mem[242][2]~q ; +wire \RAM|mem[243][2]~q ; +wire \rd[2]~178_combout ; +wire \RAM|mem[224][2]~feeder_combout ; +wire \RAM|mem[224][2]~q ; +wire \RAM|mem[226][2]~q ; +wire \RAM|mem[225][2]~q ; +wire \RAM|mem[227][2]~q ; +wire \rd[2]~177_combout ; +wire \rd[2]~179_combout ; +wire \RAM|mem[213][2]~q ; +wire \RAM|mem[212][2]~q ; +wire \RAM|mem[214][2]~q ; +wire \RAM|mem[215][2]~q ; +wire \rd[2]~181_combout ; +wire \RAM|mem[229][2]~q ; +wire \RAM|mem[228][2]~feeder_combout ; +wire \RAM|mem[228][2]~q ; +wire \RAM|mem[230][2]~feeder_combout ; +wire \RAM|mem[230][2]~q ; +wire \RAM|mem[231][2]~q ; +wire \rd[2]~182_combout ; +wire \RAM|mem[244][2]~feeder_combout ; +wire \RAM|mem[244][2]~q ; +wire \RAM|mem[246][2]~q ; +wire \RAM|mem[245][2]~q ; +wire \RAM|mem[247][2]~q ; +wire \rd[2]~183_combout ; +wire \RAM|mem[197][2]~q ; +wire \RAM|mem[198][2]~q ; +wire \RAM|mem[196][2]~q ; +wire \RAM|mem[199][2]~q ; +wire \rd[2]~180_combout ; +wire \rd[2]~184_combout ; +wire \rd[2]~195_combout ; +wire \RAM|mem[117][2]~q ; +wire \RAM|mem[121][2]~q ; +wire \RAM|mem[113][2]~feeder_combout ; +wire \RAM|mem[113][2]~q ; +wire \RAM|mem[125][2]~feeder_combout ; +wire \RAM|mem[125][2]~q ; +wire \rd[2]~212_combout ; +wire \RAM|mem[123][2]~q ; +wire \RAM|mem[119][2]~q ; +wire \RAM|mem[115][2]~q ; +wire \RAM|mem[127][2]~q ; +wire \rd[2]~214_combout ; +wire \RAM|mem[118][2]~q ; +wire \RAM|mem[122][2]~q ; +wire \RAM|mem[114][2]~q ; +wire \RAM|mem[126][2]~q ; +wire \rd[2]~213_combout ; +wire \RAM|mem[116][2]~q ; +wire \RAM|mem[120][2]~q ; +wire \RAM|mem[112][2]~q ; +wire \RAM|mem[124][2]~q ; +wire \rd[2]~211_combout ; +wire \rd[2]~215_combout ; +wire \RAM|mem[83][2]~q ; +wire \RAM|mem[95][2]~q ; +wire \RAM|mem[87][2]~q ; +wire \RAM|mem[91][2]~q ; +wire \rd[2]~204_combout ; +wire \RAM|mem[86][2]~feeder_combout ; +wire \RAM|mem[86][2]~q ; +wire \RAM|mem[82][2]~q ; +wire \RAM|mem[90][2]~feeder_combout ; +wire \RAM|mem[90][2]~q ; +wire \RAM|mem[94][2]~q ; +wire \rd[2]~203_combout ; +wire \RAM|mem[88][2]~feeder_combout ; +wire \RAM|mem[88][2]~q ; +wire \RAM|mem[80][2]~q ; +wire \RAM|mem[92][2]~q ; +wire \RAM|mem[84][2]~q ; +wire \rd[2]~201_combout ; +wire \RAM|mem[93][2]~q ; +wire \RAM|mem[89][2]~feeder_combout ; +wire \RAM|mem[89][2]~q ; +wire \RAM|mem[81][2]~q ; +wire \RAM|mem[85][2]~q ; +wire \rd[2]~202_combout ; +wire \rd[2]~205_combout ; +wire \RAM|mem[107][2]~feeder_combout ; +wire \RAM|mem[107][2]~q ; +wire \RAM|mem[104][2]~feeder_combout ; +wire \RAM|mem[104][2]~q ; +wire \RAM|mem[106][2]~feeder_combout ; +wire \RAM|mem[106][2]~q ; +wire \RAM|mem[105][2]~q ; +wire \rd[2]~208_combout ; +wire \RAM|mem[97][2]~feeder_combout ; +wire \RAM|mem[97][2]~q ; +wire \RAM|mem[96][2]~feeder_combout ; +wire \RAM|mem[96][2]~q ; +wire \RAM|mem[98][2]~q ; +wire \RAM|mem[99][2]~q ; +wire \rd[2]~206_combout ; +wire \RAM|mem[100][2]~q ; +wire \RAM|mem[102][2]~feeder_combout ; +wire \RAM|mem[102][2]~q ; +wire \RAM|mem[101][2]~feeder_combout ; +wire \RAM|mem[101][2]~q ; +wire \RAM|mem[103][2]~q ; +wire \rd[2]~207_combout ; +wire \RAM|mem[108][2]~q ; +wire \RAM|mem[110][2]~q ; +wire \RAM|mem[109][2]~feeder_combout ; +wire \RAM|mem[109][2]~q ; +wire \RAM|mem[111][2]~q ; +wire \rd[2]~209_combout ; +wire \rd[2]~210_combout ; +wire \RAM|mem[65][2]~q ; +wire \RAM|mem[77][2]~q ; +wire \RAM|mem[73][2]~feeder_combout ; +wire \RAM|mem[73][2]~q ; +wire \RAM|mem[69][2]~q ; +wire \rd[2]~197_combout ; +wire \RAM|mem[79][2]~feeder_combout ; +wire \RAM|mem[79][2]~q ; +wire \RAM|mem[75][2]~q ; +wire \RAM|mem[67][2]~q ; +wire \RAM|mem[71][2]~q ; +wire \rd[2]~199_combout ; +wire \RAM|mem[76][2]~q ; +wire \RAM|mem[64][2]~q ; +wire \RAM|mem[72][2]~q ; +wire \RAM|mem[68][2]~q ; +wire \rd[2]~196_combout ; +wire \RAM|mem[66][2]~q ; +wire \RAM|mem[70][2]~q ; +wire \RAM|mem[74][2]~q ; +wire \RAM|mem[78][2]~q ; +wire \rd[2]~198_combout ; +wire \rd[2]~200_combout ; +wire \rd[2]~216_combout ; +wire \rd[2]~260_combout ; +wire \REGS|regs[25][2]~q ; +wire \REGS|regs[24][2]~q ; +wire \REGS|regs[16][2]~feeder_combout ; +wire \REGS|regs[16][2]~q ; +wire \REGS|Mux61~6_combout ; +wire \REGS|regs[27][2]~feeder_combout ; +wire \REGS|regs[27][2]~q ; +wire \REGS|regs[19][2]~feeder_combout ; +wire \REGS|regs[19][2]~q ; +wire \REGS|Mux61~1_combout ; +wire \REGS|regs[28][2]~q ; +wire \REGS|regs[29][2]~DUPLICATE_q ; +wire \REGS|regs[20][2]~feeder_combout ; +wire \REGS|regs[20][2]~q ; +wire \REGS|Mux61~2_combout ; +wire \REGS|Mux61~5_combout ; +wire \REGS|Mux61~7_combout ; +wire \rt_alu[2]~59_combout ; +wire \ALU|adder_unit|_~25 ; +wire \ALU|Mux28~1_combout ; +wire \RAM|mem~259_combout ; +wire \RAM|mem[211][3]~q ; +wire \RAM|mem[195][3]~q ; +wire \RAM|mem[227][3]~q ; +wire \RAM|mem[243][3]~q ; +wire \rd[3]~340_combout ; +wire \RAM|mem[215][3]~q ; +wire \RAM|mem[231][3]~q ; +wire \RAM|mem[247][3]~q ; +wire \RAM|mem[199][3]~q ; +wire \rd[3]~341_combout ; +wire \RAM|mem[223][3]~q ; +wire \RAM|mem[255][3]~q ; +wire \RAM|mem[207][3]~q ; +wire \RAM|mem[239][3]~q ; +wire \rd[3]~343_combout ; +wire \RAM|mem[219][3]~q ; +wire \RAM|mem[235][3]~q ; +wire \RAM|mem[203][3]~q ; +wire \RAM|mem[251][3]~q ; +wire \rd[3]~342_combout ; +wire \rd[3]~344_combout ; +wire \RAM|mem[250][3]~q ; +wire \RAM|mem[218][3]~feeder_combout ; +wire \RAM|mem[218][3]~q ; +wire \RAM|mem[202][3]~feeder_combout ; +wire \RAM|mem[202][3]~q ; +wire \RAM|mem[234][3]~q ; +wire \rd[3]~337_combout ; +wire \RAM|mem[222][3]~q ; +wire \RAM|mem[206][3]~q ; +wire \RAM|mem[238][3]~q ; +wire \RAM|mem[254][3]~q ; +wire \rd[3]~338_combout ; +wire \RAM|mem[194][3]~feeder_combout ; +wire \RAM|mem[194][3]~q ; +wire \RAM|mem[210][3]~q ; +wire \RAM|mem[226][3]~q ; +wire \RAM|mem[242][3]~q ; +wire \rd[3]~335_combout ; +wire \RAM|mem[230][3]~feeder_combout ; +wire \RAM|mem[230][3]~q ; +wire \RAM|mem[198][3]~feeder_combout ; +wire \RAM|mem[198][3]~q ; +wire \RAM|mem[214][3]~q ; +wire \RAM|mem[246][3]~q ; +wire \rd[3]~336_combout ; +wire \rd[3]~339_combout ; +wire \RAM|mem[196][3]~feeder_combout ; +wire \RAM|mem[196][3]~q ; +wire \RAM|mem[244][3]~q ; +wire \RAM|mem[228][3]~feeder_combout ; +wire \RAM|mem[228][3]~q ; +wire \RAM|mem[212][3]~q ; +wire \rd[3]~326_combout ; +wire \RAM|mem[240][3]~q ; +wire \RAM|mem[192][3]~feeder_combout ; +wire \RAM|mem[192][3]~q ; +wire \RAM|mem[224][3]~feeder_combout ; +wire \RAM|mem[224][3]~q ; +wire \RAM|mem[208][3]~q ; +wire \rd[3]~325_combout ; +wire \RAM|mem[232][3]~q ; +wire \RAM|mem[216][3]~q ; +wire \RAM|mem[200][3]~q ; +wire \RAM|mem[248][3]~q ; +wire \rd[3]~327_combout ; +wire \RAM|mem[236][3]~q ; +wire \RAM|mem[204][3]~q ; +wire \RAM|mem[220][3]~feeder_combout ; +wire \RAM|mem[220][3]~q ; +wire \RAM|mem[252][3]~q ; +wire \rd[3]~328_combout ; +wire \rd[3]~329_combout ; +wire \RAM|mem[221][3]~q ; +wire \RAM|mem[253][3]~feeder_combout ; +wire \RAM|mem[253][3]~q ; +wire \RAM|mem[205][3]~q ; +wire \RAM|mem[237][3]~q ; +wire \rd[3]~333_combout ; +wire \RAM|mem[217][3]~feeder_combout ; +wire \RAM|mem[217][3]~q ; +wire \RAM|mem[233][3]~q ; +wire \RAM|mem[201][3]~q ; +wire \RAM|mem[249][3]~q ; +wire \rd[3]~332_combout ; +wire \RAM|mem[229][3]~q ; +wire \RAM|mem[245][3]~q ; +wire \RAM|mem[197][3]~q ; +wire \RAM|mem[213][3]~q ; +wire \rd[3]~331_combout ; +wire \RAM|mem[241][3]~feeder_combout ; +wire \RAM|mem[241][3]~q ; +wire \RAM|mem[193][3]~q ; +wire \RAM|mem[225][3]~q ; +wire \RAM|mem[209][3]~q ; +wire \rd[3]~330_combout ; +wire \rd[3]~334_combout ; +wire \rd[3]~345_combout ; +wire \RAM|mem[186][3]~q ; +wire \RAM|mem[182][3]~q ; +wire \RAM|mem[178][3]~q ; +wire \RAM|mem[190][3]~q ; +wire \rd[3]~321_combout ; +wire \RAM|mem[185][3]~q ; +wire \RAM|mem[181][3]~q ; +wire \RAM|mem[177][3]~q ; +wire \RAM|mem[189][3]~q ; +wire \rd[3]~320_combout ; +wire \RAM|mem[183][3]~feeder_combout ; +wire \RAM|mem[183][3]~q ; +wire \RAM|mem[187][3]~q ; +wire \RAM|mem[179][3]~feeder_combout ; +wire \RAM|mem[179][3]~q ; +wire \RAM|mem[191][3]~q ; +wire \rd[3]~322_combout ; +wire \RAM|mem[184][3]~feeder_combout ; +wire \RAM|mem[184][3]~q ; +wire \RAM|mem[176][3]~feeder_combout ; +wire \RAM|mem[176][3]~q ; +wire \RAM|mem[180][3]~feeder_combout ; +wire \RAM|mem[180][3]~q ; +wire \RAM|mem[188][3]~q ; +wire \rd[3]~319_combout ; +wire \rd[3]~323_combout ; +wire \RAM|mem[169][3]~q ; +wire \RAM|mem[165][3]~q ; +wire \RAM|mem[161][3]~q ; +wire \RAM|mem[173][3]~q ; +wire \rd[3]~315_combout ; +wire \RAM|mem[164][3]~q ; +wire \RAM|mem[172][3]~q ; +wire \RAM|mem[160][3]~q ; +wire \RAM|mem[168][3]~q ; +wire \rd[3]~314_combout ; +wire \RAM|mem[163][3]~q ; +wire \RAM|mem[167][3]~q ; +wire \RAM|mem[171][3]~q ; +wire \RAM|mem[175][3]~q ; +wire \rd[3]~317_combout ; +wire \RAM|mem[162][3]~q ; +wire \RAM|mem[166][3]~q ; +wire \RAM|mem[170][3]~q ; +wire \RAM|mem[174][3]~q ; +wire \rd[3]~316_combout ; +wire \rd[3]~318_combout ; +wire \RAM|mem[153][3]~q ; +wire \RAM|mem[157][3]~q ; +wire \RAM|mem[145][3]~q ; +wire \RAM|mem[149][3]~q ; +wire \rd[3]~310_combout ; +wire \RAM|mem[155][3]~q ; +wire \RAM|mem[151][3]~q ; +wire \RAM|mem[147][3]~feeder_combout ; +wire \RAM|mem[147][3]~q ; +wire \RAM|mem[159][3]~q ; +wire \rd[3]~312_combout ; +wire \RAM|mem[152][3]~feeder_combout ; +wire \RAM|mem[152][3]~q ; +wire \RAM|mem[144][3]~feeder_combout ; +wire \RAM|mem[144][3]~q ; +wire \RAM|mem[156][3]~feeder_combout ; +wire \RAM|mem[156][3]~q ; +wire \RAM|mem[148][3]~q ; +wire \rd[3]~309_combout ; +wire \RAM|mem[154][3]~q ; +wire \RAM|mem[158][3]~q ; +wire \RAM|mem[146][3]~q ; +wire \RAM|mem[150][3]~q ; +wire \rd[3]~311_combout ; +wire \rd[3]~313_combout ; +wire \RAM|mem[134][3]~q ; +wire \RAM|mem[130][3]~feeder_combout ; +wire \RAM|mem[130][3]~q ; +wire \RAM|mem[138][3]~feeder_combout ; +wire \RAM|mem[138][3]~q ; +wire \RAM|mem[142][3]~q ; +wire \rd[3]~306_combout ; +wire \RAM|mem[136][3]~feeder_combout ; +wire \RAM|mem[136][3]~q ; +wire \RAM|mem[140][3]~q ; +wire \RAM|mem[128][3]~feeder_combout ; +wire \RAM|mem[128][3]~q ; +wire \RAM|mem[132][3]~q ; +wire \rd[3]~304_combout ; +wire \RAM|mem[129][3]~feeder_combout ; +wire \RAM|mem[129][3]~q ; +wire \RAM|mem[141][3]~q ; +wire \RAM|mem[137][3]~q ; +wire \RAM|mem[133][3]~q ; +wire \rd[3]~305_combout ; +wire \RAM|mem[135][3]~q ; +wire \RAM|mem[139][3]~feeder_combout ; +wire \RAM|mem[139][3]~q ; +wire \RAM|mem[131][3]~feeder_combout ; +wire \RAM|mem[131][3]~q ; +wire \RAM|mem[143][3]~q ; +wire \rd[3]~307_combout ; +wire \rd[3]~308_combout ; +wire \rd[3]~324_combout ; +wire \rd[3]~346_combout ; +wire \RAM|mem[107][3]~q ; +wire \RAM|mem[75][3]~q ; +wire \RAM|mem[123][3]~q ; +wire \RAM|mem[91][3]~q ; +wire \rd[3]~275_combout ; +wire \RAM|mem[105][3]~feeder_combout ; +wire \RAM|mem[105][3]~q ; +wire \RAM|mem[73][3]~q ; +wire \RAM|mem[121][3]~q ; +wire \RAM|mem[89][3]~q ; +wire \rd[3]~273_combout ; +wire \RAM|mem[106][3]~feeder_combout ; +wire \RAM|mem[106][3]~q ; +wire \RAM|mem[122][3]~q ; +wire \RAM|mem[74][3]~q ; +wire \RAM|mem[90][3]~q ; +wire \rd[3]~274_combout ; +wire \RAM|mem[104][3]~q ; +wire \RAM|mem[88][3]~q ; +wire \RAM|mem[72][3]~q ; +wire \RAM|mem[120][3]~q ; +wire \rd[3]~272_combout ; +wire \rd[3]~276_combout ; +wire \RAM|mem[117][3]~q ; +wire \RAM|mem[118][3]~q ; +wire \RAM|mem[116][3]~q ; +wire \RAM|mem[119][3]~q ; +wire \rd[3]~270_combout ; +wire \RAM|mem[85][3]~q ; +wire \RAM|mem[86][3]~q ; +wire \RAM|mem[84][3]~q ; +wire \RAM|mem[87][3]~q ; +wire \rd[3]~268_combout ; +wire \RAM|mem[69][3]~feeder_combout ; +wire \RAM|mem[69][3]~q ; +wire \RAM|mem[68][3]~q ; +wire \RAM|mem[70][3]~q ; +wire \RAM|mem[71][3]~q ; +wire \rd[3]~267_combout ; +wire \RAM|mem[100][3]~q ; +wire \RAM|mem[102][3]~q ; +wire \RAM|mem[101][3]~q ; +wire \RAM|mem[103][3]~q ; +wire \rd[3]~269_combout ; +wire \rd[3]~271_combout ; +wire \RAM|mem[93][3]~feeder_combout ; +wire \RAM|mem[93][3]~q ; +wire \RAM|mem[94][3]~q ; +wire \RAM|mem[92][3]~q ; +wire \RAM|mem[95][3]~q ; +wire \rd[3]~278_combout ; +wire \RAM|mem[78][3]~q ; +wire \RAM|mem[76][3]~q ; +wire \RAM|mem[77][3]~q ; +wire \RAM|mem[79][3]~q ; +wire \rd[3]~277_combout ; +wire \RAM|mem[124][3]~q ; +wire \RAM|mem[126][3]~q ; +wire \RAM|mem[125][3]~q ; +wire \RAM|mem[127][3]~q ; +wire \rd[3]~280_combout ; +wire \RAM|mem[110][3]~q ; +wire \RAM|mem[109][3]~q ; +wire \RAM|mem[111][3]~q ; +wire \RAM|mem[108][3]~q ; +wire \rd[3]~279_combout ; +wire \rd[3]~281_combout ; +wire \RAM|mem[81][3]~q ; +wire \RAM|mem[82][3]~q ; +wire \RAM|mem[80][3]~feeder_combout ; +wire \RAM|mem[80][3]~q ; +wire \RAM|mem[83][3]~q ; +wire \rd[3]~263_combout ; +wire \RAM|mem[97][3]~q ; +wire \RAM|mem[96][3]~q ; +wire \RAM|mem[98][3]~q ; +wire \RAM|mem[99][3]~q ; +wire \rd[3]~264_combout ; +wire \RAM|mem[64][3]~feeder_combout ; +wire \RAM|mem[64][3]~q ; +wire \RAM|mem[66][3]~q ; +wire \RAM|mem[67][3]~q ; +wire \RAM|mem[65][3]~q ; +wire \rd[3]~262_combout ; +wire \RAM|mem[114][3]~feeder_combout ; +wire \RAM|mem[114][3]~q ; +wire \RAM|mem[112][3]~feeder_combout ; +wire \RAM|mem[112][3]~q ; +wire \RAM|mem[113][3]~q ; +wire \RAM|mem[115][3]~q ; +wire \rd[3]~265_combout ; +wire \rd[3]~266_combout ; +wire \rd[3]~282_combout ; +wire \RAM|mem[40][3]~q ; +wire \RAM|mem[32][3]~q ; +wire \RAM|mem[36][3]~q ; +wire \RAM|mem[44][3]~q ; +wire \rd[3]~293_combout ; +wire \RAM|mem[37][3]~q ; +wire \RAM|mem[41][3]~q ; +wire \RAM|mem[33][3]~q ; +wire \RAM|mem[45][3]~q ; +wire \rd[3]~294_combout ; +wire \RAM|mem[42][3]~q ; +wire \RAM|mem[34][3]~q ; +wire \RAM|mem[38][3]~feeder_combout ; +wire \RAM|mem[38][3]~q ; +wire \RAM|mem[46][3]~q ; +wire \rd[3]~295_combout ; +wire \RAM|mem[39][3]~q ; +wire \RAM|mem[35][3]~q ; +wire \RAM|mem[47][3]~q ; +wire \RAM|mem[43][3]~q ; +wire \rd[3]~296_combout ; +wire \rd[3]~297_combout ; +wire \RAM|mem[4][3]~q ; +wire \RAM|mem[7][3]~q ; +wire \RAM|mem[6][3]~q ; +wire \RAM|mem[5][3]~q ; +wire \rd[3]~284_combout ; +wire \RAM|mem[13][3]~q ; +wire \RAM|mem[14][3]~q ; +wire \RAM|mem[12][3]~feeder_combout ; +wire \RAM|mem[12][3]~q ; +wire \RAM|mem[15][3]~q ; +wire \rd[3]~286_combout ; +wire \RAM|mem[3][3]~q ; +wire \RAM|mem[2][3]~q ; +wire \RAM|mem[0][3]~q ; +wire \RAM|mem[1][3]~q ; +wire \rd[3]~283_combout ; +wire \RAM|mem[10][3]~q ; +wire \RAM|mem[9][3]~q ; +wire \RAM|mem[8][3]~q ; +wire \RAM|mem[11][3]~q ; +wire \rd[3]~285_combout ; +wire \rd[3]~287_combout ; +wire \RAM|mem[19][3]~q ; +wire \RAM|mem[18][3]~q ; +wire \RAM|mem[16][3]~q ; +wire \RAM|mem[17][3]~q ; +wire \rd[3]~288_combout ; +wire \RAM|mem[25][3]~q ; +wire \RAM|mem[26][3]~feeder_combout ; +wire \RAM|mem[26][3]~q ; +wire \RAM|mem[24][3]~feeder_combout ; +wire \RAM|mem[24][3]~q ; +wire \RAM|mem[27][3]~q ; +wire \rd[3]~290_combout ; +wire \RAM|mem[29][3]~feeder_combout ; +wire \RAM|mem[29][3]~q ; +wire \RAM|mem[28][3]~feeder_combout ; +wire \RAM|mem[28][3]~q ; +wire \RAM|mem[30][3]~feeder_combout ; +wire \RAM|mem[30][3]~q ; +wire \RAM|mem[31][3]~q ; +wire \rd[3]~291_combout ; +wire \RAM|mem[20][3]~q ; +wire \RAM|mem[22][3]~q ; +wire \RAM|mem[23][3]~feeder_combout ; +wire \RAM|mem[23][3]~q ; +wire \RAM|mem[21][3]~q ; +wire \rd[3]~289_combout ; +wire \rd[3]~292_combout ; +wire \RAM|mem[58][3]~q ; +wire \RAM|mem[57][3]~q ; +wire \RAM|mem[56][3]~feeder_combout ; +wire \RAM|mem[56][3]~q ; +wire \RAM|mem[59][3]~q ; +wire \rd[3]~300_combout ; +wire \RAM|mem[50][3]~q ; +wire \RAM|mem[48][3]~q ; +wire \RAM|mem[49][3]~feeder_combout ; +wire \RAM|mem[49][3]~q ; +wire \RAM|mem[51][3]~q ; +wire \rd[3]~298_combout ; +wire \RAM|mem[54][3]~q ; +wire \RAM|mem[53][3]~q ; +wire \RAM|mem[52][3]~q ; +wire \RAM|mem[55][3]~q ; +wire \rd[3]~299_combout ; +wire \RAM|mem[61][3]~q ; +wire \RAM|mem[60][3]~q ; +wire \RAM|mem[62][3]~feeder_combout ; +wire \RAM|mem[62][3]~q ; +wire \RAM|mem[63][3]~q ; +wire \rd[3]~301_combout ; +wire \rd[3]~302_combout ; +wire \rd[3]~303_combout ; +wire \rd[3]~347_combout ; +wire \REGS|regs[8][3]~DUPLICATE_q ; +wire \REGS|regs[9][3]~DUPLICATE_q ; +wire \REGS|Mux28~1_combout ; +wire \REGS|Mux28~0_combout ; +wire \REGS|Mux28~2_combout ; +wire \ALU|adder_unit|_~28 ; +wire \ALU|Mux27~1_combout ; +wire \RAM|mem~260_combout ; +wire \RAM|mem[115][4]~q ; +wire \RAM|mem[119][4]~q ; +wire \RAM|mem[123][4]~q ; +wire \RAM|mem[127][4]~q ; +wire \rd[4]~388_combout ; +wire \RAM|mem[113][4]~q ; +wire \RAM|mem[121][4]~feeder_combout ; +wire \RAM|mem[121][4]~q ; +wire \RAM|mem[117][4]~q ; +wire \RAM|mem[125][4]~q ; +wire \rd[4]~386_combout ; +wire \RAM|mem[124][4]~q ; +wire \RAM|mem[120][4]~q ; +wire \RAM|mem[112][4]~feeder_combout ; +wire \RAM|mem[112][4]~q ; +wire \RAM|mem[116][4]~q ; +wire \rd[4]~385_combout ; +wire \RAM|mem[122][4]~q ; +wire \RAM|mem[114][4]~q ; +wire \RAM|mem[118][4]~q ; +wire \RAM|mem[126][4]~q ; +wire \rd[4]~387_combout ; +wire \rd[4]~389_combout ; +wire \RAM|mem[72][4]~q ; +wire \RAM|mem[64][4]~feeder_combout ; +wire \RAM|mem[64][4]~q ; +wire \RAM|mem[76][4]~feeder_combout ; +wire \RAM|mem[76][4]~q ; +wire \RAM|mem[68][4]~q ; +wire \rd[4]~370_combout ; +wire \RAM|mem[77][4]~q ; +wire \RAM|mem[73][4]~feeder_combout ; +wire \RAM|mem[73][4]~q ; +wire \RAM|mem[65][4]~q ; +wire \RAM|mem[69][4]~q ; +wire \rd[4]~371_combout ; +wire \RAM|mem[79][4]~q ; +wire \RAM|mem[75][4]~feeder_combout ; +wire \RAM|mem[75][4]~q ; +wire \RAM|mem[71][4]~q ; +wire \RAM|mem[67][4]~q ; +wire \rd[4]~373_combout ; +wire \RAM|mem[70][4]~q ; +wire \RAM|mem[66][4]~q ; +wire \RAM|mem[74][4]~q ; +wire \RAM|mem[78][4]~q ; +wire \rd[4]~372_combout ; +wire \rd[4]~374_combout ; +wire \RAM|mem[99][4]~q ; +wire \RAM|mem[98][4]~q ; +wire \RAM|mem[97][4]~q ; +wire \RAM|mem[96][4]~feeder_combout ; +wire \RAM|mem[96][4]~q ; +wire \rd[4]~380_combout ; +wire \RAM|mem[105][4]~q ; +wire \RAM|mem[104][4]~q ; +wire \RAM|mem[106][4]~q ; +wire \RAM|mem[107][4]~q ; +wire \rd[4]~382_combout ; +wire \RAM|mem[109][4]~feeder_combout ; +wire \RAM|mem[109][4]~q ; +wire \RAM|mem[110][4]~q ; +wire \RAM|mem[108][4]~feeder_combout ; +wire \RAM|mem[108][4]~q ; +wire \RAM|mem[111][4]~q ; +wire \rd[4]~383_combout ; +wire \RAM|mem[100][4]~q ; +wire \RAM|mem[101][4]~q ; +wire \RAM|mem[102][4]~feeder_combout ; +wire \RAM|mem[102][4]~q ; +wire \RAM|mem[103][4]~q ; +wire \rd[4]~381_combout ; +wire \rd[4]~384_combout ; +wire \RAM|mem[82][4]~q ; +wire \RAM|mem[86][4]~q ; +wire \RAM|mem[90][4]~q ; +wire \RAM|mem[94][4]~q ; +wire \rd[4]~377_combout ; +wire \RAM|mem[92][4]~feeder_combout ; +wire \RAM|mem[92][4]~q ; +wire \RAM|mem[88][4]~q ; +wire \RAM|mem[80][4]~q ; +wire \RAM|mem[84][4]~q ; +wire \rd[4]~375_combout ; +wire \RAM|mem[89][4]~feeder_combout ; +wire \RAM|mem[89][4]~q ; +wire \RAM|mem[93][4]~q ; +wire \RAM|mem[81][4]~q ; +wire \RAM|mem[85][4]~q ; +wire \rd[4]~376_combout ; +wire \RAM|mem[95][4]~q ; +wire \RAM|mem[91][4]~q ; +wire \RAM|mem[87][4]~q ; +wire \RAM|mem[83][4]~q ; +wire \rd[4]~378_combout ; +wire \rd[4]~379_combout ; +wire \rd[4]~390_combout ; +wire \RAM|mem[171][4]~q ; +wire \RAM|mem[163][4]~q ; +wire \RAM|mem[167][4]~q ; +wire \RAM|mem[175][4]~q ; +wire \rd[4]~408_combout ; +wire \RAM|mem[155][4]~q ; +wire \RAM|mem[147][4]~q ; +wire \RAM|mem[151][4]~q ; +wire \RAM|mem[159][4]~q ; +wire \rd[4]~407_combout ; +wire \RAM|mem[187][4]~feeder_combout ; +wire \RAM|mem[187][4]~q ; +wire \RAM|mem[179][4]~q ; +wire \RAM|mem[183][4]~q ; +wire \RAM|mem[191][4]~q ; +wire \rd[4]~409_combout ; +wire \RAM|mem[131][4]~feeder_combout ; +wire \RAM|mem[131][4]~q ; +wire \RAM|mem[135][4]~feeder_combout ; +wire \RAM|mem[135][4]~q ; +wire \RAM|mem[139][4]~q ; +wire \RAM|mem[143][4]~q ; +wire \rd[4]~406_combout ; +wire \rd[4]~410_combout ; +wire \RAM|mem[129][4]~q ; +wire \RAM|mem[177][4]~q ; +wire \RAM|mem[145][4]~q ; +wire \RAM|mem[161][4]~q ; +wire \rd[4]~396_combout ; +wire \RAM|mem[173][4]~q ; +wire \RAM|mem[141][4]~q ; +wire \RAM|mem[157][4]~q ; +wire \RAM|mem[189][4]~q ; +wire \rd[4]~399_combout ; +wire \RAM|mem[149][4]~q ; +wire \RAM|mem[181][4]~q ; +wire \RAM|mem[165][4]~q ; +wire \RAM|mem[133][4]~q ; +wire \rd[4]~397_combout ; +wire \RAM|mem[169][4]~q ; +wire \RAM|mem[137][4]~feeder_combout ; +wire \RAM|mem[137][4]~q ; +wire \RAM|mem[153][4]~feeder_combout ; +wire \RAM|mem[153][4]~q ; +wire \RAM|mem[185][4]~q ; +wire \rd[4]~398_combout ; +wire \rd[4]~400_combout ; +wire \RAM|mem[164][4]~q ; +wire \RAM|mem[132][4]~q ; +wire \RAM|mem[180][4]~q ; +wire \RAM|mem[148][4]~q ; +wire \rd[4]~392_combout ; +wire \RAM|mem[168][4]~feeder_combout ; +wire \RAM|mem[168][4]~q ; +wire \RAM|mem[136][4]~feeder_combout ; +wire \RAM|mem[136][4]~q ; +wire \RAM|mem[152][4]~feeder_combout ; +wire \RAM|mem[152][4]~q ; +wire \RAM|mem[184][4]~q ; +wire \rd[4]~393_combout ; +wire \RAM|mem[188][4]~feeder_combout ; +wire \RAM|mem[188][4]~q ; +wire \RAM|mem[172][4]~feeder_combout ; +wire \RAM|mem[172][4]~q ; +wire \RAM|mem[156][4]~q ; +wire \RAM|mem[140][4]~feeder_combout ; +wire \RAM|mem[140][4]~q ; +wire \rd[4]~394_combout ; +wire \RAM|mem[176][4]~feeder_combout ; +wire \RAM|mem[176][4]~q ; +wire \RAM|mem[128][4]~feeder_combout ; +wire \RAM|mem[128][4]~q ; +wire \RAM|mem[144][4]~feeder_combout ; +wire \RAM|mem[144][4]~q ; +wire \RAM|mem[160][4]~q ; +wire \rd[4]~391_combout ; +wire \rd[4]~395_combout ; +wire \RAM|mem[138][4]~feeder_combout ; +wire \RAM|mem[138][4]~q ; +wire \RAM|mem[154][4]~q ; +wire \RAM|mem[170][4]~q ; +wire \RAM|mem[186][4]~q ; +wire \rd[4]~403_combout ; +wire \RAM|mem[158][4]~q ; +wire \RAM|mem[142][4]~q ; +wire \RAM|mem[174][4]~q ; +wire \RAM|mem[190][4]~q ; +wire \rd[4]~404_combout ; +wire \RAM|mem[166][4]~q ; +wire \RAM|mem[134][4]~q ; +wire \RAM|mem[150][4]~q ; +wire \RAM|mem[182][4]~q ; +wire \rd[4]~402_combout ; +wire \RAM|mem[162][4]~q ; +wire \RAM|mem[130][4]~q ; +wire \RAM|mem[146][4]~q ; +wire \RAM|mem[178][4]~q ; +wire \rd[4]~401_combout ; +wire \rd[4]~405_combout ; +wire \rd[4]~411_combout ; +wire \RAM|mem[17][4]~feeder_combout ; +wire \RAM|mem[17][4]~q ; +wire \RAM|mem[33][4]~feeder_combout ; +wire \RAM|mem[33][4]~q ; +wire \RAM|mem[49][4]~q ; +wire \RAM|mem[1][4]~q ; +wire \rd[4]~417_combout ; +wire \RAM|mem[21][4]~q ; +wire \RAM|mem[37][4]~feeder_combout ; +wire \RAM|mem[37][4]~q ; +wire \RAM|mem[5][4]~q ; +wire \RAM|mem[53][4]~feeder_combout ; +wire \RAM|mem[53][4]~q ; +wire \rd[4]~418_combout ; +wire \RAM|mem[61][4]~q ; +wire \RAM|mem[13][4]~q ; +wire \RAM|mem[29][4]~feeder_combout ; +wire \RAM|mem[29][4]~q ; +wire \RAM|mem[45][4]~q ; +wire \rd[4]~420_combout ; +wire \RAM|mem[25][4]~feeder_combout ; +wire \RAM|mem[25][4]~q ; +wire \RAM|mem[41][4]~q ; +wire \RAM|mem[9][4]~feeder_combout ; +wire \RAM|mem[9][4]~q ; +wire \RAM|mem[57][4]~q ; +wire \rd[4]~419_combout ; +wire \rd[4]~421_combout ; +wire \RAM|mem[26][4]~q ; +wire \RAM|mem[42][4]~feeder_combout ; +wire \RAM|mem[42][4]~q ; +wire \RAM|mem[10][4]~feeder_combout ; +wire \RAM|mem[10][4]~q ; +wire \RAM|mem[58][4]~q ; +wire \rd[4]~424_combout ; +wire \RAM|mem[14][4]~q ; +wire \RAM|mem[30][4]~q ; +wire \RAM|mem[46][4]~q ; +wire \RAM|mem[62][4]~q ; +wire \rd[4]~425_combout ; +wire \RAM|mem[34][4]~q ; +wire \RAM|mem[18][4]~feeder_combout ; +wire \RAM|mem[18][4]~q ; +wire \RAM|mem[2][4]~q ; +wire \RAM|mem[50][4]~q ; +wire \rd[4]~422_combout ; +wire \RAM|mem[6][4]~feeder_combout ; +wire \RAM|mem[6][4]~q ; +wire \RAM|mem[22][4]~feeder_combout ; +wire \RAM|mem[22][4]~q ; +wire \RAM|mem[38][4]~q ; +wire \RAM|mem[54][4]~q ; +wire \rd[4]~423_combout ; +wire \rd[4]~426_combout ; +wire \RAM|mem[0][4]~q ; +wire \RAM|mem[48][4]~q ; +wire \RAM|mem[32][4]~q ; +wire \RAM|mem[16][4]~q ; +wire \rd[4]~412_combout ; +wire \RAM|mem[4][4]~q ; +wire \RAM|mem[36][4]~feeder_combout ; +wire \RAM|mem[36][4]~q ; +wire \RAM|mem[52][4]~feeder_combout ; +wire \RAM|mem[52][4]~q ; +wire \RAM|mem[20][4]~q ; +wire \rd[4]~413_combout ; +wire \RAM|mem[24][4]~q ; +wire \RAM|mem[8][4]~q ; +wire \RAM|mem[40][4]~q ; +wire \RAM|mem[56][4]~q ; +wire \rd[4]~414_combout ; +wire \RAM|mem[44][4]~q ; +wire \RAM|mem[12][4]~feeder_combout ; +wire \RAM|mem[12][4]~q ; +wire \RAM|mem[28][4]~q ; +wire \RAM|mem[60][4]~q ; +wire \rd[4]~415_combout ; +wire \rd[4]~416_combout ; +wire \RAM|mem[3][4]~q ; +wire \RAM|mem[7][4]~feeder_combout ; +wire \RAM|mem[7][4]~q ; +wire \RAM|mem[11][4]~q ; +wire \RAM|mem[15][4]~q ; +wire \rd[4]~427_combout ; +wire \RAM|mem[23][4]~feeder_combout ; +wire \RAM|mem[23][4]~q ; +wire \RAM|mem[27][4]~q ; +wire \RAM|mem[19][4]~feeder_combout ; +wire \RAM|mem[19][4]~q ; +wire \RAM|mem[31][4]~q ; +wire \rd[4]~428_combout ; +wire \RAM|mem[51][4]~q ; +wire \RAM|mem[59][4]~q ; +wire \RAM|mem[55][4]~q ; +wire \RAM|mem[63][4]~feeder_combout ; +wire \RAM|mem[63][4]~q ; +wire \rd[4]~430_combout ; +wire \RAM|mem[43][4]~q ; +wire \RAM|mem[35][4]~q ; +wire \RAM|mem[39][4]~q ; +wire \RAM|mem[47][4]~q ; +wire \rd[4]~429_combout ; +wire \rd[4]~431_combout ; +wire \rd[4]~432_combout ; +wire \rd[4]~433_combout ; +wire \RAM|mem[207][4]~q ; +wire \RAM|mem[223][4]~feeder_combout ; +wire \RAM|mem[223][4]~q ; +wire \RAM|mem[239][4]~q ; +wire \RAM|mem[255][4]~q ; +wire \rd[4]~367_combout ; +wire \RAM|mem[204][4]~feeder_combout ; +wire \RAM|mem[204][4]~q ; +wire \RAM|mem[220][4]~q ; +wire \RAM|mem[236][4]~q ; +wire \RAM|mem[252][4]~q ; +wire \rd[4]~364_combout ; +wire \RAM|mem[205][4]~q ; +wire \RAM|mem[237][4]~q ; +wire \RAM|mem[221][4]~feeder_combout ; +wire \RAM|mem[221][4]~q ; +wire \RAM|mem[253][4]~q ; +wire \rd[4]~365_combout ; +wire \RAM|mem[206][4]~feeder_combout ; +wire \RAM|mem[206][4]~q ; +wire \RAM|mem[222][4]~feeder_combout ; +wire \RAM|mem[222][4]~q ; +wire \RAM|mem[238][4]~feeder_combout ; +wire \RAM|mem[238][4]~q ; +wire \RAM|mem[254][4]~q ; +wire \rd[4]~366_combout ; +wire \rd[4]~368_combout ; +wire \RAM|mem[212][4]~q ; +wire \RAM|mem[214][4]~q ; +wire \RAM|mem[213][4]~q ; +wire \RAM|mem[215][4]~q ; +wire \rd[4]~355_combout ; +wire \RAM|mem[228][4]~feeder_combout ; +wire \RAM|mem[228][4]~q ; +wire \RAM|mem[229][4]~q ; +wire \RAM|mem[230][4]~feeder_combout ; +wire \RAM|mem[230][4]~q ; +wire \RAM|mem[231][4]~q ; +wire \rd[4]~356_combout ; +wire \RAM|mem[246][4]~q ; +wire \RAM|mem[245][4]~q ; +wire \RAM|mem[244][4]~q ; +wire \RAM|mem[247][4]~q ; +wire \rd[4]~357_combout ; +wire \RAM|mem[196][4]~q ; +wire \RAM|mem[198][4]~q ; +wire \RAM|mem[197][4]~q ; +wire \RAM|mem[199][4]~q ; +wire \rd[4]~354_combout ; +wire \rd[4]~358_combout ; +wire \RAM|mem[240][4]~q ; +wire \RAM|mem[241][4]~q ; +wire \RAM|mem[242][4]~q ; +wire \RAM|mem[243][4]~q ; +wire \rd[4]~352_combout ; +wire \RAM|mem[209][4]~q ; +wire \RAM|mem[208][4]~q ; +wire \RAM|mem[210][4]~q ; +wire \RAM|mem[211][4]~q ; +wire \rd[4]~350_combout ; +wire \RAM|mem[224][4]~q ; +wire \RAM|mem[225][4]~q ; +wire \RAM|mem[226][4]~q ; +wire \RAM|mem[227][4]~q ; +wire \rd[4]~351_combout ; +wire \RAM|mem[195][4]~feeder_combout ; +wire \RAM|mem[195][4]~q ; +wire \RAM|mem[194][4]~q ; +wire \RAM|mem[192][4]~q ; +wire \RAM|mem[193][4]~q ; +wire \rd[4]~349_combout ; +wire \rd[4]~353_combout ; +wire \RAM|mem[250][4]~q ; +wire \RAM|mem[248][4]~q ; +wire \RAM|mem[249][4]~q ; +wire \RAM|mem[251][4]~q ; +wire \rd[4]~362_combout ; +wire \RAM|mem[202][4]~q ; +wire \RAM|mem[201][4]~q ; +wire \RAM|mem[200][4]~q ; +wire \RAM|mem[203][4]~q ; +wire \rd[4]~359_combout ; +wire \RAM|mem[216][4]~q ; +wire \RAM|mem[218][4]~q ; +wire \RAM|mem[217][4]~q ; +wire \RAM|mem[219][4]~q ; +wire \rd[4]~360_combout ; +wire \RAM|mem[234][4]~q ; +wire \RAM|mem[232][4]~q ; +wire \RAM|mem[233][4]~q ; +wire \RAM|mem[235][4]~q ; +wire \rd[4]~361_combout ; +wire \rd[4]~363_combout ; +wire \rd[4]~369_combout ; +wire \rd[4]~434_combout ; +wire \REGS|regs[26][4]~q ; +wire \REGS|regs[18][4]~feeder_combout ; +wire \REGS|regs[18][4]~q ; +wire \REGS|Mux59~0_combout ; +wire \REGS|regs[8][4]~DUPLICATE_q ; +wire \REGS|Mux27~1_combout ; +wire \REGS|Mux27~0_combout ; +wire \REGS|Mux27~2_combout ; +wire \ALU|adder_unit|_~19 ; +wire \ALU|Mux26~1_combout ; +wire \rd[5]~436_combout ; +wire \REGS|regs[9][5]~feeder_combout ; +wire \REGS|regs[9][5]~q ; +wire \REGS|regs[1][5]~q ; +wire \REGS|Mux58~5_combout ; +wire \REGS|regs[8][5]~q ; +wire \REGS|Mux58~6_combout ; +wire \REGS|regs[2][5]~feeder_combout ; +wire \REGS|regs[2][5]~q ; +wire \REGS|regs[10][5]~feeder_combout ; +wire \REGS|regs[10][5]~q ; +wire \REGS|regs[11][5]~q ; +wire \rt_alu[5]~49_combout ; +wire \REGS|regs[15][5]~q ; +wire \REGS|regs[6][5]~feeder_combout ; +wire \REGS|regs[6][5]~q ; +wire \REGS|regs[14][5]~q ; +wire \rt_alu[5]~50_combout ; +wire \rt_alu[5]~51_combout ; +wire \rt_alu[5]~52_combout ; +wire \ALU|adder_unit|operand[5]~3_combout ; +wire \ALU|adder_unit|_~22 ; +wire \ALU|Mux25~1_combout ; +wire \rd[6]~438_combout ; +wire \REGS|regs[16][6]~feeder_combout ; +wire \REGS|regs[16][6]~q ; +wire \REGS|regs[17][6]~DUPLICATE_q ; +wire \rt_alu[6]~29_combout ; +wire \REGS|regs[27][6]~feeder_combout ; +wire \REGS|regs[27][6]~q ; +wire \REGS|regs[19][6]~q ; +wire \REGS|Mux57~5_combout ; +wire \REGS|regs[28][6]~q ; +wire \REGS|regs[29][6]~q ; +wire \REGS|regs[20][6]~q ; +wire \rt_alu[6]~27_combout ; +wire \rt_alu[6]~28_combout ; +wire \rt_alu[6]~30_combout ; +wire \REGS|regs[8][6]~q ; +wire \REGS|Mux57~1_combout ; +wire \REGS|regs[11][6]~q ; +wire \REGS|regs[10][6]~DUPLICATE_q ; +wire \REGS|regs[2][6]~DUPLICATE_q ; +wire \rt_alu[6]~23_combout ; +wire \REGS|regs[9][6]~q ; +wire \REGS|regs[1][6]~q ; +wire \REGS|Mux57~0_combout ; +wire \REGS|regs[6][6]~q ; +wire \REGS|regs[14][6]~q ; +wire \REGS|regs[15][6]~feeder_combout ; +wire \REGS|regs[15][6]~q ; +wire \rt_alu[6]~24_combout ; +wire \rt_alu[6]~25_combout ; +wire \rt_alu[6]~26_combout ; +wire \rt_alu[6]~31_combout ; +wire \ALU|adder_unit|_~7 ; +wire \ALU|Mux24~1_combout ; +wire \rd[7]~440_combout ; +wire \REGS|regs[19][7]~q ; +wire \REGS|regs[27][7]~feeder_combout ; +wire \REGS|regs[27][7]~q ; +wire \REGS|Mux56~7_combout ; +wire \REGS|regs[16][7]~feeder_combout ; +wire \REGS|regs[16][7]~DUPLICATE_q ; +wire \REGS|regs[17][7]~feeder_combout ; +wire \REGS|regs[17][7]~q ; +wire \rt_alu[7]~20_combout ; +wire \REGS|regs[29][7]~q ; +wire \REGS|regs[28][7]~q ; +wire \REGS|regs[20][7]~q ; +wire \rt_alu[7]~18_combout ; +wire \rt_alu[7]~19_combout ; +wire \rt_alu[7]~21_combout ; +wire \ALU|adder_unit|operand[7]~1_combout ; +wire \ALU|adder_unit|_~4 ; +wire \rd[8]~442_combout ; +wire \REGS|regs[9][8]~DUPLICATE_q ; +wire \REGS|regs[1][8]~q ; +wire \REGS|Mux55~0_combout ; +wire \REGS|Mux55~1_combout ; +wire \REGS|regs[11][8]~q ; +wire \REGS|regs[2][8]~feeder_combout ; +wire \REGS|regs[2][8]~q ; +wire \REGS|regs[10][8]~q ; +wire \rt_alu[8]~143_combout ; +wire \REGS|regs[14][8]~q ; +wire \REGS|regs[15][8]~q ; +wire \REGS|regs[6][8]~feeder_combout ; +wire \REGS|regs[6][8]~q ; +wire \rt_alu[8]~144_combout ; +wire \rt_alu[8]~145_combout ; +wire \rt_alu[8]~146_combout ; +wire \REGS|regs[19][8]~feeder_combout ; +wire \REGS|regs[19][8]~q ; +wire \REGS|regs[27][8]~feeder_combout ; +wire \REGS|regs[27][8]~q ; +wire \REGS|Mux55~5_combout ; +wire \REGS|regs[17][8]~q ; +wire \REGS|regs[16][8]~q ; +wire \rt_alu[8]~149_combout ; +wire \REGS|regs[28][8]~q ; +wire \REGS|regs[20][8]~q ; +wire \REGS|regs[29][8]~q ; +wire \rt_alu[8]~147_combout ; +wire \rt_alu[8]~148_combout ; +wire \rt_alu[8]~150_combout ; +wire \rt_alu[8]~151_combout ; +wire \ALU|adder_unit|_~55 ; +wire \ALU|Mux22~1_combout ; +wire \rd[9]~444_combout ; +wire \REGS|regs[18][9]~q ; +wire \REGS|regs[26][9]~q ; +wire \REGS|Mux54~4_combout ; +wire \REGS|regs[19][9]~q ; +wire \REGS|regs[27][9]~q ; +wire \REGS|Mux54~7_combout ; +wire \REGS|regs[29][9]~q ; +wire \REGS|regs[28][9]~feeder_combout ; +wire \REGS|regs[28][9]~q ; +wire \REGS|regs[20][9]~q ; +wire \rt_alu[9]~167_combout ; +wire \rt_alu[9]~168_combout ; +wire \REGS|regs[17][9]~q ; +wire \REGS|regs[16][9]~feeder_combout ; +wire \REGS|regs[16][9]~DUPLICATE_q ; +wire \rt_alu[9]~169_combout ; +wire \rt_alu[9]~170_combout ; +wire \ALU|adder_unit|operand[9]~10_combout ; +wire \ALU|adder_unit|_~61 ; +wire \rd[10]~446_combout ; +wire \REGS|regs[18][10]~q ; +wire \REGS|regs[26][10]~feeder_combout ; +wire \REGS|regs[26][10]~q ; +wire \REGS|Mux53~4_combout ; +wire \REGS|regs[8][10]~q ; +wire \REGS|Mux21~1_combout ; +wire \REGS|Mux21~0_combout ; +wire \REGS|Mux21~2_combout ; +wire \ALU|adder_unit|_~67 ; +wire \rd[11]~448_combout ; +wire \REGS|regs[26][11]~q ; +wire \REGS|regs[18][11]~DUPLICATE_q ; +wire \REGS|Mux52~4_combout ; +wire \REGS|regs[8][11]~DUPLICATE_q ; +wire \REGS|Mux20~1_combout ; +wire \REGS|Mux20~0_combout ; +wire \REGS|Mux20~2_combout ; +wire \ALU|adder_unit|_~73 ; +wire \rd[12]~450_combout ; +wire \REGS|regs[8][12]~DUPLICATE_q ; +wire \REGS|Mux51~1_combout ; +wire \REGS|regs[2][12]~DUPLICATE_q ; +wire \REGS|regs[10][12]~q ; +wire \REGS|regs[11][12]~DUPLICATE_q ; +wire \rt_alu[12]~222_combout ; +wire \REGS|regs[1][12]~q ; +wire \REGS|Mux51~0_combout ; +wire \REGS|regs[6][12]~q ; +wire \REGS|regs[15][12]~q ; +wire \REGS|regs[14][12]~q ; +wire \rt_alu[12]~223_combout ; +wire \rt_alu[12]~224_combout ; +wire \rt_alu[12]~225_combout ; +wire \ROM|mem~22_combout ; +wire \REGS|regs[17][12]~q ; +wire \REGS|regs[16][12]~q ; +wire \rt_alu[12]~228_combout ; +wire \REGS|regs[27][12]~DUPLICATE_q ; +wire \REGS|regs[19][12]~q ; +wire \REGS|Mux51~5_combout ; +wire \REGS|regs[28][12]~DUPLICATE_q ; +wire \REGS|regs[29][12]~q ; +wire \REGS|regs[20][12]~feeder_combout ; +wire \REGS|regs[20][12]~q ; +wire \rt_alu[12]~226_combout ; +wire \rt_alu[12]~227_combout ; +wire \rt_alu[12]~229_combout ; +wire \rt_alu[12]~230_combout ; +wire \ALU|adder_unit|_~79 ; +wire \rd[13]~452_combout ; +wire \REGS|regs[8][13]~q ; +wire \REGS|Mux50~6_combout ; +wire \REGS|regs[1][13]~q ; +wire \REGS|Mux50~5_combout ; +wire \REGS|regs[11][13]~q ; +wire \REGS|regs[2][13]~q ; +wire \REGS|regs[10][13]~q ; +wire \rt_alu[13]~242_combout ; +wire \REGS|regs[14][13]~q ; +wire \REGS|regs[6][13]~q ; +wire \REGS|regs[15][13]~feeder_combout ; +wire \REGS|regs[15][13]~q ; +wire \rt_alu[13]~243_combout ; +wire \rt_alu[13]~244_combout ; +wire \rt_alu[13]~245_combout ; +wire \ALU|adder_unit|operand[13]~14_combout ; +wire \ALU|adder_unit|_~85 ; +wire \ALU|Mux17~0_combout ; +wire \rd[14]~454_combout ; +wire \REGS|regs[17][14]~q ; +wire \REGS|regs[16][14]~feeder_combout ; +wire \REGS|regs[16][14]~q ; +wire \rt_alu[14]~264_combout ; +wire \REGS|regs[27][14]~q ; +wire \REGS|regs[19][14]~feeder_combout ; +wire \REGS|regs[19][14]~q ; +wire \REGS|Mux49~1_combout ; +wire \REGS|regs[29][14]~q ; +wire \REGS|regs[28][14]~q ; +wire \REGS|regs[20][14]~q ; +wire \rt_alu[14]~262_combout ; +wire \rt_alu[14]~263_combout ; +wire \rt_alu[14]~265_combout ; +wire \REGS|regs[1][14]~q ; +wire \REGS|Mux49~4_combout ; +wire \REGS|regs[8][14]~q ; +wire \REGS|Mux49~5_combout ; +wire \REGS|regs[11][14]~q ; +wire \REGS|regs[10][14]~DUPLICATE_q ; +wire \REGS|regs[2][14]~q ; +wire \rt_alu[14]~266_combout ; +wire \REGS|regs[6][14]~feeder_combout ; +wire \REGS|regs[6][14]~q ; +wire \REGS|regs[15][14]~q ; +wire \REGS|regs[14][14]~q ; +wire \rt_alu[14]~267_combout ; +wire \rt_alu[14]~268_combout ; +wire \rt_alu[14]~269_combout ; +wire \rt_alu[14]~270_combout ; +wire \ALU|adder_unit|_~91 ; +wire \rd[15]~456_combout ; +wire \REGS|regs[19][15]~q ; +wire \REGS|regs[27][15]~feeder_combout ; +wire \REGS|regs[27][15]~DUPLICATE_q ; +wire \REGS|Mux48~7_combout ; +wire \REGS|regs[16][15]~feeder_combout ; +wire \REGS|regs[16][15]~q ; +wire \REGS|regs[17][15]~q ; +wire \rt_alu[15]~278_combout ; +wire \REGS|regs[29][15]~q ; +wire \REGS|regs[20][15]~feeder_combout ; +wire \REGS|regs[20][15]~q ; +wire \REGS|regs[28][15]~q ; +wire \rt_alu[15]~276_combout ; +wire \rt_alu[15]~277_combout ; +wire \rt_alu[15]~279_combout ; +wire \ALU|adder_unit|operand[15]~15_combout ; +wire \ALU|adder_unit|_~97 ; +wire \ALU|adder_unit|_~1 ; +wire \ALU|Mux14~1_combout ; +wire \rd[17]~87_combout ; +wire \REGS|regs[27][17]~DUPLICATE_q ; +wire \REGS|regs[19][17]~q ; +wire \REGS|Mux46~5_combout ; +wire \REGS|regs[17][17]~DUPLICATE_q ; +wire \REGS|regs[16][17]~DUPLICATE_q ; +wire \rt_alu[17]~63_combout ; +wire \REGS|regs[29][17]~q ; +wire \REGS|regs[20][17]~feeder_combout ; +wire \REGS|regs[20][17]~q ; +wire \REGS|regs[28][17]~q ; +wire \rt_alu[17]~61_combout ; +wire \rt_alu[17]~62_combout ; +wire \rt_alu[17]~64_combout ; +wire \ALU|adder_unit|operand[17]~5_combout ; +wire \ALU|adder_unit|_~31 ; +wire \rd[18]~174_combout ; +wire \REGS|regs[8][18]~DUPLICATE_q ; +wire \REGS|regs[19][18]~q ; +wire \REGS|regs[27][18]~q ; +wire \REGS|Mux45~3_combout ; +wire \REGS|regs[25][18]~q ; +wire \REGS|regs[24][18]~feeder_combout ; +wire \REGS|regs[24][18]~q ; +wire \REGS|regs[16][18]~q ; +wire \rt_alu[18]~77_combout ; +wire \REGS|regs[28][18]~q ; +wire \REGS|regs[29][18]~q ; +wire \REGS|regs[20][18]~q ; +wire \rt_alu[18]~75_combout ; +wire \rt_alu[18]~76_combout ; +wire \rt_alu[18]~78_combout ; +wire \REGS|regs[9][18]~DUPLICATE_q ; +wire \REGS|regs[1][18]~q ; +wire \REGS|regs[2][18]~DUPLICATE_q ; +wire \REGS|regs[10][18]~q ; +wire \REGS|regs[11][18]~q ; +wire \rt_alu[18]~70_combout ; +wire \rt_alu[18]~72_combout ; +wire \REGS|regs[15][18]~q ; +wire \REGS|regs[6][18]~feeder_combout ; +wire \REGS|regs[6][18]~q ; +wire \REGS|regs[14][18]~q ; +wire \rt_alu[18]~71_combout ; +wire \rt_alu[18]~73_combout ; +wire \rt_alu[18]~74_combout ; +wire \rt_alu[18]~79_combout ; +wire \ALU|adder_unit|_~34 ; +wire \REGS|regs[24][19]~q ; +wire \REGS|regs[16][19]~q ; +wire \REGS|regs[25][19]~DUPLICATE_q ; +wire \rt_alu[19]~87_combout ; +wire \REGS|regs[19][19]~DUPLICATE_q ; +wire \REGS|regs[27][19]~DUPLICATE_q ; +wire \REGS|Mux44~5_combout ; +wire \REGS|regs[29][19]~q ; +wire \REGS|regs[20][19]~q ; +wire \REGS|regs[28][19]~q ; +wire \rt_alu[19]~85_combout ; +wire \rt_alu[19]~86_combout ; +wire \rt_alu[19]~88_combout ; +wire \REGS|regs[1][19]~q ; +wire \REGS|regs[10][19]~q ; +wire \REGS|regs[2][19]~q ; +wire \REGS|regs[11][19]~q ; +wire \rt_alu[19]~80_combout ; +wire \REGS|regs[15][19]~q ; +wire \REGS|regs[6][19]~q ; +wire \REGS|regs[14][19]~q ; +wire \rt_alu[19]~81_combout ; +wire \rt_alu[19]~82_combout ; +wire \rt_alu[19]~83_combout ; +wire \rt_alu[19]~84_combout ; +wire \rt_alu[19]~90_combout ; +wire \ALU|Mux12~0_combout ; +wire \rd[19]~261_combout ; +wire \REGS|regs[8][19]~feeder_combout ; +wire \REGS|regs[8][19]~q ; +wire \rt_alu[19]~89_combout ; +wire \ALU|adder_unit|operand[19]~6_combout ; +wire \ALU|adder_unit|_~37 ; +wire \rd[20]~348_combout ; +wire \REGS|regs[8][20]~q ; +wire \REGS|Mux11~1_combout ; +wire \REGS|Mux11~0_combout ; +wire \REGS|Mux11~2_combout ; +wire \ALU|adder_unit|_~40 ; +wire \rd[21]~435_combout ; +wire \REGS|regs[8][21]~q ; +wire \rt_alu[21]~110_combout ; +wire \ALU|adder_unit|operand[21]~7_combout ; +wire \ALU|adder_unit|_~43 ; +wire \rd[22]~437_combout ; +wire \REGS|regs[22][22]~q ; +wire \REGS|regs[30][22]~DUPLICATE_q ; +wire \REGS|Mux41~5_combout ; +wire \REGS|Mux9~0_combout ; +wire \REGS|Mux9~1_combout ; +wire \REGS|Mux9~2_combout ; +wire \ALU|adder_unit|_~46 ; +wire \ALU|Mux8~1_combout ; +wire \rd[23]~439_combout ; +wire \REGS|regs[26][23]~q ; +wire \REGS|regs[18][23]~q ; +wire \REGS|Mux40~4_combout ; +wire \REGS|Mux8~1_combout ; +wire \REGS|Mux8~0_combout ; +wire \REGS|Mux8~2_combout ; +wire \ALU|adder_unit|_~49 ; +wire \ALU|Mux7~1_combout ; +wire \rd[24]~441_combout ; +wire \REGS|regs[23][24]~q ; +wire \REGS|regs[31][24]~q ; +wire \REGS|Mux39~4_combout ; +wire \REGS|Mux7~0_combout ; +wire \REGS|regs[9][24]~DUPLICATE_q ; +wire \REGS|Mux7~1_combout ; +wire \REGS|Mux7~2_combout ; +wire \ALU|adder_unit|_~52 ; +wire \rd[25]~443_combout ; +wire \REGS|regs[23][25]~q ; +wire \REGS|regs[31][25]~q ; +wire \REGS|Mux38~3_combout ; +wire \REGS|Mux6~0_combout ; +wire \REGS|Mux6~1_combout ; +wire \REGS|Mux6~2_combout ; +wire \ALU|adder_unit|_~58 ; +wire \rd[26]~445_combout ; +wire \REGS|regs[9][26]~DUPLICATE_q ; +wire \REGS|regs[15][26]~feeder_combout ; +wire \REGS|regs[15][26]~q ; +wire \REGS|regs[14][26]~q ; +wire \REGS|regs[6][26]~q ; +wire \rt_alu[26]~173_combout ; +wire \REGS|regs[2][26]~q ; +wire \REGS|regs[11][26]~q ; +wire \REGS|regs[10][26]~q ; +wire \rt_alu[26]~172_combout ; +wire \rt_alu[26]~174_combout ; +wire \rt_alu[26]~175_combout ; +wire \REGS|regs[1][26]~DUPLICATE_q ; +wire \rt_alu[26]~176_combout ; +wire \REGS|regs[8][26]~DUPLICATE_q ; +wire \REGS|regs[27][26]~q ; +wire \REGS|regs[19][26]~q ; +wire \REGS|Mux37~3_combout ; +wire \REGS|regs[20][26]~DUPLICATE_q ; +wire \REGS|regs[28][26]~q ; +wire \REGS|regs[29][26]~q ; +wire \rt_alu[26]~177_combout ; +wire \rt_alu[26]~178_combout ; +wire \REGS|regs[25][26]~q ; +wire \REGS|regs[16][26]~q ; +wire \REGS|regs[24][26]~DUPLICATE_q ; +wire \rt_alu[26]~179_combout ; +wire \rt_alu[26]~180_combout ; +wire \rt_alu[26]~181_combout ; +wire \ALU|adder_unit|_~64 ; +wire \rd[27]~447_combout ; +wire \REGS|regs[8][27]~DUPLICATE_q ; +wire \rt_alu[27]~200_combout ; +wire \ALU|adder_unit|operand[27]~11_combout ; +wire \ALU|adder_unit|_~70 ; +wire \rd[28]~449_combout ; +wire \REGS|regs[8][28]~q ; +wire \REGS|regs[19][28]~q ; +wire \REGS|regs[27][28]~q ; +wire \REGS|Mux35~3_combout ; +wire \REGS|regs[20][28]~feeder_combout ; +wire \REGS|regs[20][28]~q ; +wire \REGS|regs[28][28]~DUPLICATE_q ; +wire \REGS|regs[29][28]~q ; +wire \rt_alu[28]~217_combout ; +wire \rt_alu[28]~218_combout ; +wire \REGS|regs[24][28]~DUPLICATE_q ; +wire \REGS|regs[25][28]~q ; +wire \REGS|regs[16][28]~q ; +wire \rt_alu[28]~219_combout ; +wire \rt_alu[28]~220_combout ; +wire \REGS|regs[1][28]~feeder_combout ; +wire \REGS|regs[1][28]~q ; +wire \REGS|regs[6][28]~q ; +wire \REGS|regs[14][28]~q ; +wire \REGS|regs[15][28]~q ; +wire \rt_alu[28]~213_combout ; +wire \REGS|regs[2][28]~feeder_combout ; +wire \REGS|regs[2][28]~q ; +wire \REGS|regs[10][28]~q ; +wire \REGS|regs[11][28]~q ; +wire \rt_alu[28]~212_combout ; +wire \rt_alu[28]~214_combout ; +wire \rt_alu[28]~215_combout ; +wire \rt_alu[28]~216_combout ; +wire \rt_alu[28]~221_combout ; +wire \ALU|adder_unit|_~76 ; +wire \rd[29]~451_combout ; +wire \REGS|regs[9][29]~q ; +wire \REGS|regs[8][29]~q ; +wire \REGS|Mux2~1_combout ; +wire \REGS|Mux2~0_combout ; +wire \REGS|Mux2~2_combout ; +wire \ALU|adder_unit|_~82 ; +wire \rd[30]~453_combout ; +wire \REGS|regs[18][30]~q ; +wire \REGS|regs[26][30]~q ; +wire \REGS|Mux33~2_combout ; +wire \REGS|regs[9][30]~q ; +wire \REGS|Mux1~1_combout ; +wire \REGS|Mux1~0_combout ; +wire \REGS|Mux1~2_combout ; +wire \ALU|Mux1~0_combout ; +wire \ALU|Mux15~1_combout ; +wire \pc_we[0]~12_combout ; +wire \pc_we[0]~13_combout ; +wire \pc_we[0]~8_combout ; +wire \pc_we[0]~9_combout ; +wire \pc_we[0]~10_combout ; +wire \pc_we[0]~11_combout ; +wire \pc_we[0]~4_combout ; +wire \pc_we[0]~5_combout ; +wire \pc_we[0]~6_combout ; +wire \pc_we[0]~7_combout ; +wire \pc_we[0]~2_combout ; +wire \pc_we[0]~3_combout ; +wire \Add0~53_sumout ; +wire \ROM|mem~3_combout ; +wire \ROM|mem~9_combout ; +wire \Add0~61_sumout ; +wire \Add0~29_sumout ; +wire \PC|pc[4]~DUPLICATE_q ; +wire \ROM|mem~6_combout ; +wire \ALU|Mux29~0_combout ; +wire \rd[16]~0_combout ; +wire \REGS|regs[9][16]~DUPLICATE_q ; +wire \HID_Register[3]~input_o ; +wire \REGS|regs[11][16]~q ; +wire \REGS|Decoder0~36_combout ; +wire \REGS|regs[3][16]~q ; +wire \HID_Register[1]~input_o ; +wire \PC_Reg_Display[0]~18_combout ; +wire \REGS|regs[4][16]~DUPLICATE_q ; +wire \PC_Reg_Display[0]~17_combout ; +wire \PC_Reg_Display[0]~16_combout ; +wire \REGS|regs[5][16]~DUPLICATE_q ; +wire \REGS|Decoder0~38_combout ; +wire \REGS|regs[7][16]~q ; +wire \REGS|regs[13][16]~DUPLICATE_q ; +wire \PC_Reg_Display[0]~19_combout ; wire \HID_Register[2]~input_o ; wire \HID_Register[0]~input_o ; -wire \HID_Register[1]~input_o ; -wire \HID_Register[3]~input_o ; -wire \clk[0]~input_o ; -wire \~QUARTUS_CREATED_GND~I_combout ; +wire \PC_Reg_Display[0]~20_combout ; +wire \HID_PC[0]~input_o ; +wire \PC|pc[16]~DUPLICATE_q ; +wire \Add0~70 ; +wire \Add0~77_sumout ; +wire \PC|pc[10]~DUPLICATE_q ; +wire \Add0~78 ; +wire \Add0~85_sumout ; +wire \Add0~86 ; +wire \Add0~93_sumout ; +wire \Add0~94 ; +wire \Add0~101_sumout ; +wire \Add0~102 ; +wire \Add0~109_sumout ; +wire \Add0~110 ; +wire \Add0~117_sumout ; +wire \Add0~118 ; +wire \Add0~1_sumout ; +wire \REGS|regs[17][16]~q ; +wire \REGS|regs[27][16]~DUPLICATE_q ; +wire \REGS|regs[25][16]~q ; +wire \PC_Reg_Display[0]~2_combout ; +wire \REGS|regs[23][16]~q ; +wire \REGS|Decoder0~16_combout ; +wire \REGS|regs[21][16]~q ; +wire \REGS|regs[29][16]~DUPLICATE_q ; +wire \PC_Reg_Display[0]~3_combout ; +wire \REGS|regs[20][16]~q ; +wire \REGS|regs[28][16]~q ; +wire \PC_Reg_Display[0]~1_combout ; +wire \REGS|regs[24][16]~q ; +wire \PC_Reg_Display[0]~0_combout ; +wire \PC_Reg_Display[0]~4_combout ; +wire \REGS|regs[27][0]~DUPLICATE_q ; +wire \REGS|regs[19][0]~q ; +wire \PC_Reg_Display[0]~8_combout ; +wire \REGS|regs[17][0]~q ; +wire \REGS|regs[25][0]~DUPLICATE_q ; +wire \REGS|regs[21][0]~q ; +wire \REGS|regs[29][0]~q ; +wire \PC_Reg_Display[0]~6_combout ; +wire \REGS|regs[20][0]~DUPLICATE_q ; +wire \PC_Reg_Display[0]~5_combout ; +wire \PC_Reg_Display[0]~7_combout ; +wire \PC_Reg_Display[0]~9_combout ; +wire \PC_Reg_Display[0]~10_combout ; +wire \REGS|regs[3][0]~q ; +wire \REGS|regs[11][0]~DUPLICATE_q ; +wire \REGS|regs[15][0]~q ; +wire \REGS|regs[7][0]~q ; +wire \PC_Reg_Display[0]~13_combout ; +wire \REGS|regs[14][0]~DUPLICATE_q ; +wire \REGS|regs[2][0]~q ; +wire \PC_Reg_Display[0]~12_combout ; +wire \REGS|regs[13][0]~q ; +wire \PC_Reg_Display[0]~11_combout ; +wire \PC_Reg_Display[0]~14_combout ; +wire \PC_Reg_Display[0]~15_combout ; +wire \PC_Reg_Display[0]~21_combout ; +wire \REGS|regs[15][19]~DUPLICATE_q ; +wire \PC_Reg_Display[3]~79_combout ; +wire \PC_Reg_Display[3]~76_combout ; +wire \PC_Reg_Display[3]~78_combout ; +wire \PC_Reg_Display[3]~77_combout ; +wire \PC_Reg_Display[3]~80_combout ; +wire \REGS|regs[29][3]~DUPLICATE_q ; +wire \PC_Reg_Display[3]~82_combout ; +wire \REGS|regs[30][19]~DUPLICATE_q ; +wire \PC_Reg_Display[3]~83_combout ; +wire \REGS|regs[30][3]~DUPLICATE_q ; +wire \PC_Reg_Display[3]~81_combout ; +wire \REGS|regs[27][19]~q ; +wire \REGS|regs[25][19]~q ; +wire \PC_Reg_Display[3]~84_combout ; +wire \PC_Reg_Display[3]~85_combout ; +wire \REGS|regs[19][19]~q ; +wire \REGS|regs[23][19]~q ; +wire \REGS|regs[17][19]~q ; +wire \REGS|regs[21][19]~q ; +wire \PC_Reg_Display[3]~74_combout ; +wire \REGS|regs[23][3]~DUPLICATE_q ; +wire \REGS|regs[21][3]~q ; +wire \REGS|regs[17][3]~q ; +wire \PC_Reg_Display[3]~72_combout ; +wire \PC_Reg_Display[3]~71_combout ; +wire \PC_Reg_Display[3]~73_combout ; +wire \PC_Reg_Display[3]~75_combout ; +wire \PC_Reg_Display[3]~66_combout ; +wire \REGS|regs[7][3]~q ; +wire \REGS|regs[7][19]~q ; +wire \PC_Reg_Display[3]~69_combout ; +wire \REGS|regs[3][3]~q ; +wire \REGS|regs[3][19]~q ; +wire \PC_Reg_Display[3]~67_combout ; +wire \REGS|regs[4][3]~q ; +wire \PC_Reg_Display[3]~68_combout ; +wire \PC_Reg_Display[3]~70_combout ; +wire \PC_Reg_Display[3]~86_combout ; +wire \PC|pc[19]~DUPLICATE_q ; +wire \Add0~2 ; +wire \Add0~5_sumout ; +wire \PC|pc[17]~DUPLICATE_q ; +wire \Add0~6 ; +wire \Add0~9_sumout ; +wire \Add0~10 ; +wire \Add0~17_sumout ; +wire \PC_Reg_Display[3]~87_combout ; +wire \PC_Reg_Display[1]~30_combout ; +wire \REGS|regs[17][1]~feeder_combout ; +wire \REGS|regs[17][1]~q ; +wire \REGS|regs[21][1]~q ; +wire \REGS|regs[29][1]~q ; +wire \PC_Reg_Display[1]~28_combout ; +wire \REGS|regs[28][1]~q ; +wire \PC_Reg_Display[1]~27_combout ; +wire \REGS|regs[30][1]~q ; +wire \PC_Reg_Display[1]~29_combout ; +wire \PC_Reg_Display[1]~31_combout ; +wire \REGS|regs[31][17]~q ; +wire \REGS|regs[21][17]~q ; +wire \PC_Reg_Display[1]~25_combout ; +wire \REGS|regs[16][17]~q ; +wire \REGS|regs[26][17]~DUPLICATE_q ; +wire \REGS|regs[24][17]~q ; +wire \PC_Reg_Display[1]~22_combout ; +wire \PC_Reg_Display[1]~23_combout ; +wire \REGS|regs[25][17]~q ; +wire \REGS|regs[27][17]~q ; +wire \REGS|regs[17][17]~q ; +wire \PC_Reg_Display[1]~24_combout ; +wire \PC_Reg_Display[1]~26_combout ; +wire \PC_Reg_Display[1]~32_combout ; +wire \REGS|regs[13][1]~q ; +wire \PC_Reg_Display[1]~33_combout ; +wire \REGS|regs[10][1]~DUPLICATE_q ; +wire \REGS|regs[6][1]~DUPLICATE_q ; +wire \PC_Reg_Display[1]~34_combout ; +wire \REGS|regs[15][1]~q ; +wire \REGS|regs[3][1]~q ; +wire \REGS|regs[7][1]~q ; +wire \PC_Reg_Display[1]~35_combout ; +wire \PC_Reg_Display[1]~36_combout ; +wire \PC_Reg_Display[1]~37_combout ; +wire \REGS|regs[12][17]~DUPLICATE_q ; +wire \PC_Reg_Display[1]~39_combout ; +wire \REGS|regs[15][17]~q ; +wire \REGS|regs[7][17]~q ; +wire \PC_Reg_Display[1]~41_combout ; +wire \PC_Reg_Display[1]~38_combout ; +wire \REGS|regs[11][17]~DUPLICATE_q ; +wire \REGS|regs[1][17]~DUPLICATE_q ; +wire \REGS|regs[3][17]~q ; +wire \PC_Reg_Display[1]~40_combout ; +wire \PC_Reg_Display[1]~42_combout ; +wire \PC_Reg_Display[1]~43_combout ; +wire \REGS|regs[6][2]~q ; +wire \REGS|regs[7][2]~feeder_combout ; +wire \REGS|regs[7][2]~q ; +wire \REGS|regs[6][18]~DUPLICATE_q ; +wire \REGS|regs[7][18]~q ; +wire \PC_Reg_Display[2]~47_combout ; +wire \REGS|regs[3][2]~q ; +wire \REGS|regs[2][18]~q ; +wire \REGS|regs[2][2]~q ; +wire \REGS|regs[3][18]~q ; +wire \PC_Reg_Display[2]~45_combout ; +wire \PC_Reg_Display[2]~46_combout ; +wire \PC_Reg_Display[2]~44_combout ; +wire \PC_Reg_Display[2]~48_combout ; +wire \PC_Reg_Display[2]~59_combout ; +wire \PC_Reg_Display[2]~61_combout ; +wire \PC_Reg_Display[2]~62_combout ; +wire \REGS|regs[29][2]~q ; +wire \PC_Reg_Display[2]~60_combout ; +wire \PC_Reg_Display[2]~63_combout ; +wire \REGS|regs[20][18]~DUPLICATE_q ; +wire \PC_Reg_Display[2]~51_combout ; +wire \REGS|regs[17][2]~feeder_combout ; +wire \REGS|regs[17][2]~q ; +wire \REGS|regs[21][2]~q ; +wire \PC_Reg_Display[2]~50_combout ; +wire \REGS|regs[18][2]~q ; +wire \PC_Reg_Display[2]~49_combout ; +wire \REGS|regs[17][18]~q ; +wire \REGS|regs[21][18]~q ; +wire \PC_Reg_Display[2]~52_combout ; +wire \PC_Reg_Display[2]~53_combout ; +wire \PC_Reg_Display[2]~54_combout ; +wire \REGS|regs[8][18]~q ; +wire \PC_Reg_Display[2]~56_combout ; +wire \PC_Reg_Display[2]~55_combout ; +wire \PC_Reg_Display[2]~57_combout ; +wire \PC_Reg_Display[2]~58_combout ; +wire \PC_Reg_Display[2]~64_combout ; +wire \PC_Reg_Display[2]~65_combout ; +wire \display|digit0|Mux5~0_combout ; +wire \display|digit0|Mux4~0_combout ; +wire \display|digit0|Mux3~0_combout ; +wire \display|digit0|Mux2~0_combout ; +wire \display|digit0|Mux1~0_combout ; +wire \display|digit0|Mux0~0_combout ; +wire \display|digit0|WideOr0~0_combout ; +wire \REGS|regs[3][4]~feeder_combout ; +wire \REGS|regs[3][4]~q ; +wire \REGS|regs[3][20]~q ; +wire \REGS|regs[2][4]~q ; +wire \PC_Reg_Display[4]~89_combout ; +wire \REGS|regs[7][4]~q ; +wire \REGS|regs[7][20]~q ; +wire \PC_Reg_Display[4]~91_combout ; +wire \REGS|regs[5][4]~q ; +wire \PC_Reg_Display[4]~90_combout ; +wire \PC_Reg_Display[4]~88_combout ; +wire \PC_Reg_Display[4]~92_combout ; +wire \PC_Reg_Display[4]~106_combout ; +wire \REGS|regs[28][4]~DUPLICATE_q ; +wire \REGS|regs[30][4]~DUPLICATE_q ; +wire \PC_Reg_Display[4]~104_combout ; +wire \PC_Reg_Display[4]~103_combout ; +wire \REGS|regs[27][20]~DUPLICATE_q ; +wire \PC_Reg_Display[4]~105_combout ; +wire \PC_Reg_Display[4]~107_combout ; +wire \REGS|regs[19][20]~q ; +wire \REGS|regs[23][20]~q ; +wire \PC_Reg_Display[4]~96_combout ; +wire \REGS|regs[23][4]~q ; +wire \REGS|regs[19][4]~DUPLICATE_q ; +wire \PC_Reg_Display[4]~95_combout ; +wire \REGS|regs[20][20]~q ; +wire \REGS|regs[21][20]~q ; +wire \REGS|regs[17][20]~q ; +wire \PC_Reg_Display[4]~94_combout ; +wire \REGS|regs[21][4]~q ; +wire \REGS|regs[17][4]~feeder_combout ; +wire \REGS|regs[17][4]~q ; +wire \PC_Reg_Display[4]~93_combout ; +wire \PC_Reg_Display[4]~97_combout ; +wire \REGS|regs[9][4]~DUPLICATE_q ; +wire \PC_Reg_Display[4]~100_combout ; +wire \PC_Reg_Display[4]~101_combout ; +wire \PC_Reg_Display[4]~98_combout ; +wire \REGS|regs[12][20]~q ; +wire \PC_Reg_Display[4]~99_combout ; +wire \PC_Reg_Display[4]~102_combout ; +wire \PC_Reg_Display[4]~108_combout ; +wire \PC|pc[20]~DUPLICATE_q ; +wire \Add0~18 ; +wire \Add0~25_sumout ; +wire \PC_Reg_Display[4]~109_combout ; +wire \Add0~26 ; +wire \Add0~33_sumout ; +wire \PC_Reg_Display[5]~112_combout ; +wire \REGS|regs[1][21]~q ; +wire \PC_Reg_Display[5]~110_combout ; +wire \REGS|regs[7][5]~q ; +wire \REGS|regs[7][21]~q ; +wire \PC_Reg_Display[5]~113_combout ; +wire \REGS|regs[3][5]~q ; +wire \REGS|regs[3][21]~q ; +wire \PC_Reg_Display[5]~111_combout ; +wire \PC_Reg_Display[5]~114_combout ; +wire \REGS|regs[28][5]~DUPLICATE_q ; +wire \REGS|regs[24][5]~q ; +wire \REGS|regs[25][5]~q ; +wire \PC_Reg_Display[5]~125_combout ; +wire \PC_Reg_Display[5]~126_combout ; +wire \REGS|regs[30][5]~DUPLICATE_q ; +wire \REGS|regs[27][5]~DUPLICATE_q ; +wire \PC_Reg_Display[5]~127_combout ; +wire \REGS|regs[27][21]~DUPLICATE_q ; +wire \REGS|regs[26][21]~DUPLICATE_q ; +wire \PC_Reg_Display[5]~128_combout ; +wire \PC_Reg_Display[5]~129_combout ; +wire \REGS|regs[13][21]~q ; +wire \REGS|regs[9][21]~q ; +wire \PC_Reg_Display[5]~121_combout ; +wire \REGS|regs[12][5]~DUPLICATE_q ; +wire \PC_Reg_Display[5]~120_combout ; +wire \REGS|regs[10][5]~DUPLICATE_q ; +wire \PC_Reg_Display[5]~122_combout ; +wire \PC_Reg_Display[5]~123_combout ; +wire \PC_Reg_Display[5]~124_combout ; +wire \PC_Reg_Display[5]~115_combout ; +wire \REGS|regs[19][5]~DUPLICATE_q ; +wire \REGS|regs[17][21]~q ; +wire \PC_Reg_Display[5]~117_combout ; +wire \REGS|regs[21][21]~q ; +wire \REGS|regs[21][5]~q ; +wire \REGS|regs[23][5]~DUPLICATE_q ; +wire \PC_Reg_Display[5]~118_combout ; +wire \REGS|regs[20][21]~q ; +wire \REGS|regs[20][5]~DUPLICATE_q ; +wire \PC_Reg_Display[5]~116_combout ; +wire \PC_Reg_Display[5]~119_combout ; +wire \PC_Reg_Display[5]~130_combout ; +wire \PC_Reg_Display[5]~131_combout ; +wire \Add0~34 ; +wire \Add0~41_sumout ; +wire \Add0~42 ; +wire \Add0~49_sumout ; +wire \REGS|regs[26][7]~q ; +wire \REGS|regs[24][7]~q ; +wire \PC_Reg_Display[7]~169_combout ; +wire \REGS|regs[25][7]~q ; +wire \PC_Reg_Display[7]~170_combout ; +wire \PC_Reg_Display[7]~171_combout ; +wire \PC_Reg_Display[7]~172_combout ; +wire \PC_Reg_Display[7]~173_combout ; +wire \REGS|regs[7][7]~q ; +wire \REGS|regs[7][23]~q ; +wire \PC_Reg_Display[7]~157_combout ; +wire \REGS|regs[3][7]~q ; +wire \REGS|regs[3][23]~q ; +wire \PC_Reg_Display[7]~155_combout ; +wire \PC_Reg_Display[7]~154_combout ; +wire \PC_Reg_Display[7]~156_combout ; +wire \PC_Reg_Display[7]~158_combout ; +wire \REGS|regs[17][23]~q ; +wire \REGS|regs[21][23]~q ; +wire \PC_Reg_Display[7]~162_combout ; +wire \REGS|regs[20][23]~DUPLICATE_q ; +wire \REGS|regs[18][23]~DUPLICATE_q ; +wire \PC_Reg_Display[7]~161_combout ; +wire \REGS|regs[21][7]~q ; +wire \PC_Reg_Display[7]~160_combout ; +wire \REGS|regs[16][7]~q ; +wire \PC_Reg_Display[7]~159_combout ; +wire \PC_Reg_Display[7]~163_combout ; +wire \PC_Reg_Display[7]~165_combout ; +wire \REGS|regs[14][7]~DUPLICATE_q ; +wire \PC_Reg_Display[7]~164_combout ; +wire \PC_Reg_Display[7]~166_combout ; +wire \PC_Reg_Display[7]~167_combout ; +wire \PC_Reg_Display[7]~168_combout ; +wire \PC_Reg_Display[7]~174_combout ; +wire \PC_Reg_Display[7]~175_combout ; +wire \REGS|regs[2][22]~q ; +wire \REGS|regs[3][6]~q ; +wire \REGS|regs[3][22]~q ; +wire \REGS|regs[2][6]~q ; +wire \PC_Reg_Display[6]~133_combout ; +wire \PC_Reg_Display[6]~134_combout ; +wire \REGS|regs[7][6]~q ; +wire \REGS|regs[7][22]~q ; +wire \PC_Reg_Display[6]~135_combout ; +wire \PC_Reg_Display[6]~132_combout ; +wire \PC_Reg_Display[6]~136_combout ; +wire \REGS|regs[24][22]~q ; +wire \REGS|regs[30][22]~q ; +wire \PC_Reg_Display[6]~149_combout ; +wire \REGS|regs[29][22]~DUPLICATE_q ; +wire \PC_Reg_Display[6]~150_combout ; +wire \REGS|regs[25][6]~q ; +wire \REGS|regs[27][6]~DUPLICATE_q ; +wire \PC_Reg_Display[6]~148_combout ; +wire \REGS|regs[26][6]~DUPLICATE_q ; +wire \REGS|regs[24][6]~q ; +wire \PC_Reg_Display[6]~147_combout ; +wire \PC_Reg_Display[6]~151_combout ; +wire \REGS|regs[17][22]~q ; +wire \PC_Reg_Display[6]~139_combout ; +wire \REGS|regs[17][6]~q ; +wire \PC_Reg_Display[6]~137_combout ; +wire \REGS|regs[23][6]~q ; +wire \REGS|regs[21][6]~q ; +wire \PC_Reg_Display[6]~138_combout ; +wire \REGS|regs[21][22]~q ; +wire \REGS|regs[20][22]~q ; +wire \PC_Reg_Display[6]~140_combout ; +wire \PC_Reg_Display[6]~141_combout ; +wire \REGS|regs[10][22]~q ; +wire \PC_Reg_Display[6]~144_combout ; +wire \REGS|regs[11][6]~DUPLICATE_q ; +wire \REGS|regs[15][6]~DUPLICATE_q ; +wire \PC_Reg_Display[6]~143_combout ; +wire \REGS|regs[10][6]~q ; +wire \PC_Reg_Display[6]~142_combout ; +wire \PC_Reg_Display[6]~145_combout ; +wire \PC_Reg_Display[6]~146_combout ; +wire \PC_Reg_Display[6]~152_combout ; +wire \PC_Reg_Display[6]~153_combout ; +wire \display|digit1|Mux5~0_combout ; +wire \display|digit1|Mux4~0_combout ; +wire \display|digit1|Mux3~0_combout ; +wire \display|digit1|Mux2~0_combout ; +wire \display|digit1|Mux1~0_combout ; +wire \display|digit1|Mux0~0_combout ; +wire \display|digit1|WideOr0~0_combout ; +wire \Add0~50 ; +wire \Add0~57_sumout ; +wire \Add0~58 ; +wire \Add0~65_sumout ; +wire \Add0~66 ; +wire \Add0~73_sumout ; +wire \Add0~74 ; +wire \Add0~81_sumout ; +wire \REGS|regs[21][11]~q ; +wire \REGS|regs[21][27]~q ; +wire \PC_Reg_Display[11]~250_combout ; +wire \REGS|regs[20][27]~q ; +wire \REGS|regs[22][11]~DUPLICATE_q ; +wire \PC_Reg_Display[11]~248_combout ; +wire \REGS|regs[17][11]~DUPLICATE_q ; +wire \REGS|regs[17][27]~q ; +wire \PC_Reg_Display[11]~249_combout ; +wire \REGS|regs[18][11]~q ; +wire \PC_Reg_Display[11]~247_combout ; +wire \PC_Reg_Display[11]~251_combout ; +wire \REGS|regs[26][11]~DUPLICATE_q ; +wire \PC_Reg_Display[11]~259_combout ; +wire \REGS|regs[26][27]~q ; +wire \PC_Reg_Display[11]~260_combout ; +wire \PC_Reg_Display[11]~258_combout ; +wire \REGS|regs[29][11]~q ; +wire \REGS|regs[24][11]~feeder_combout ; +wire \REGS|regs[24][11]~q ; +wire \REGS|regs[25][11]~q ; +wire \PC_Reg_Display[11]~257_combout ; +wire \PC_Reg_Display[11]~261_combout ; +wire \REGS|regs[8][27]~q ; +wire \PC_Reg_Display[11]~253_combout ; +wire \REGS|regs[11][27]~DUPLICATE_q ; +wire \PC_Reg_Display[11]~255_combout ; +wire \PC_Reg_Display[11]~252_combout ; +wire \REGS|regs[15][11]~DUPLICATE_q ; +wire \PC_Reg_Display[11]~254_combout ; +wire \PC_Reg_Display[11]~256_combout ; +wire \PC_Reg_Display[11]~244_combout ; +wire \PC_Reg_Display[11]~242_combout ; +wire \REGS|regs[3][11]~q ; +wire \REGS|regs[3][27]~q ; +wire \PC_Reg_Display[11]~243_combout ; +wire \REGS|regs[7][11]~q ; +wire \REGS|regs[7][27]~q ; +wire \PC_Reg_Display[11]~245_combout ; +wire \PC_Reg_Display[11]~246_combout ; +wire \PC_Reg_Display[11]~262_combout ; +wire \PC_Reg_Display[11]~263_combout ; +wire \PC_Reg_Display[9]~216_combout ; +wire \PC_Reg_Display[9]~215_combout ; +wire \REGS|regs[24][9]~feeder_combout ; +wire \REGS|regs[24][9]~q ; +wire \REGS|regs[25][9]~q ; +wire \PC_Reg_Display[9]~213_combout ; +wire \REGS|regs[29][25]~DUPLICATE_q ; +wire \PC_Reg_Display[9]~214_combout ; +wire \PC_Reg_Display[9]~217_combout ; +wire \PC_Reg_Display[9]~204_combout ; +wire \REGS|regs[21][9]~q ; +wire \REGS|regs[21][25]~q ; +wire \PC_Reg_Display[9]~206_combout ; +wire \REGS|regs[17][25]~q ; +wire \PC_Reg_Display[9]~205_combout ; +wire \REGS|regs[16][9]~q ; +wire \PC_Reg_Display[9]~203_combout ; +wire \PC_Reg_Display[9]~207_combout ; +wire \REGS|regs[9][9]~q ; +wire \REGS|regs[12][9]~q ; +wire \PC_Reg_Display[9]~208_combout ; +wire \PC_Reg_Display[9]~211_combout ; +wire \PC_Reg_Display[9]~210_combout ; +wire \REGS|regs[9][25]~q ; +wire \PC_Reg_Display[9]~209_combout ; +wire \PC_Reg_Display[9]~212_combout ; +wire \PC_Reg_Display[9]~200_combout ; +wire \REGS|regs[1][9]~DUPLICATE_q ; +wire \PC_Reg_Display[9]~198_combout ; +wire \REGS|regs[7][9]~q ; +wire \REGS|regs[7][25]~q ; +wire \PC_Reg_Display[9]~201_combout ; +wire \REGS|regs[2][25]~q ; +wire \REGS|regs[3][9]~q ; +wire \REGS|regs[3][25]~q ; +wire \PC_Reg_Display[9]~199_combout ; +wire \PC_Reg_Display[9]~202_combout ; +wire \PC_Reg_Display[9]~218_combout ; +wire \PC_Reg_Display[9]~219_combout ; +wire \REGS|regs[17][10]~q ; +wire \REGS|regs[21][10]~q ; +wire \PC_Reg_Display[10]~225_combout ; +wire \REGS|regs[23][26]~DUPLICATE_q ; +wire \PC_Reg_Display[10]~228_combout ; +wire \PC_Reg_Display[10]~227_combout ; +wire \REGS|regs[20][26]~q ; +wire \REGS|regs[17][26]~q ; +wire \REGS|regs[21][26]~q ; +wire \PC_Reg_Display[10]~226_combout ; +wire \PC_Reg_Display[10]~229_combout ; +wire \REGS|regs[28][10]~q ; +wire \REGS|regs[30][10]~DUPLICATE_q ; +wire \PC_Reg_Display[10]~236_combout ; +wire \REGS|regs[29][10]~q ; +wire \PC_Reg_Display[10]~238_combout ; +wire \REGS|regs[24][26]~q ; +wire \REGS|regs[24][10]~q ; +wire \PC_Reg_Display[10]~235_combout ; +wire \REGS|regs[25][10]~q ; +wire \PC_Reg_Display[10]~237_combout ; +wire \PC_Reg_Display[10]~239_combout ; +wire \PC_Reg_Display[10]~231_combout ; +wire \PC_Reg_Display[10]~230_combout ; +wire \REGS|regs[11][26]~DUPLICATE_q ; +wire \PC_Reg_Display[10]~232_combout ; +wire \PC_Reg_Display[10]~233_combout ; +wire \PC_Reg_Display[10]~234_combout ; +wire \REGS|regs[7][10]~q ; +wire \REGS|regs[7][26]~q ; +wire \PC_Reg_Display[10]~223_combout ; +wire \REGS|regs[1][26]~q ; +wire \PC_Reg_Display[10]~220_combout ; +wire \REGS|regs[2][10]~q ; +wire \REGS|regs[2][26]~DUPLICATE_q ; +wire \REGS|regs[3][26]~q ; +wire \REGS|regs[3][10]~q ; +wire \PC_Reg_Display[10]~221_combout ; +wire \REGS|regs[4][26]~DUPLICATE_q ; +wire \REGS|regs[4][10]~DUPLICATE_q ; +wire \PC_Reg_Display[10]~222_combout ; +wire \PC_Reg_Display[10]~224_combout ; +wire \PC_Reg_Display[10]~240_combout ; +wire \PC_Reg_Display[10]~241_combout ; +wire \REGS|regs[18][8]~q ; +wire \PC_Reg_Display[8]~183_combout ; +wire \REGS|regs[20][24]~q ; +wire \REGS|regs[16][24]~DUPLICATE_q ; +wire \REGS|regs[21][24]~q ; +wire \REGS|regs[17][24]~q ; +wire \PC_Reg_Display[8]~182_combout ; +wire \PC_Reg_Display[8]~184_combout ; +wire \REGS|regs[21][8]~q ; +wire \PC_Reg_Display[8]~181_combout ; +wire \PC_Reg_Display[8]~185_combout ; +wire \REGS|regs[3][8]~q ; +wire \REGS|regs[3][24]~q ; +wire \PC_Reg_Display[8]~177_combout ; +wire \REGS|regs[5][8]~DUPLICATE_q ; +wire \REGS|regs[4][8]~DUPLICATE_q ; +wire \PC_Reg_Display[8]~178_combout ; +wire \REGS|regs[1][24]~q ; +wire \PC_Reg_Display[8]~176_combout ; +wire \REGS|regs[7][8]~q ; +wire \REGS|regs[6][24]~q ; +wire \REGS|regs[7][24]~q ; +wire \PC_Reg_Display[8]~179_combout ; +wire \PC_Reg_Display[8]~180_combout ; +wire \REGS|regs[15][8]~DUPLICATE_q ; +wire \REGS|regs[13][24]~DUPLICATE_q ; +wire \PC_Reg_Display[8]~189_combout ; +wire \REGS|regs[9][8]~q ; +wire \PC_Reg_Display[8]~188_combout ; +wire \REGS|regs[12][8]~q ; +wire \PC_Reg_Display[8]~187_combout ; +wire \REGS|regs[8][8]~DUPLICATE_q ; +wire \PC_Reg_Display[8]~186_combout ; +wire \PC_Reg_Display[8]~190_combout ; +wire \PC_Reg_Display[8]~194_combout ; +wire \REGS|regs[30][8]~q ; +wire \PC_Reg_Display[8]~192_combout ; +wire \REGS|regs[27][8]~DUPLICATE_q ; +wire \REGS|regs[25][8]~q ; +wire \PC_Reg_Display[8]~193_combout ; +wire \REGS|regs[24][8]~q ; +wire \PC_Reg_Display[8]~191_combout ; +wire \PC_Reg_Display[8]~195_combout ; +wire \PC_Reg_Display[8]~196_combout ; +wire \PC_Reg_Display[8]~197_combout ; +wire \display|digit2|Mux5~0_combout ; +wire \display|digit2|Mux4~0_combout ; +wire \display|digit2|Mux3~0_combout ; +wire \display|digit2|Mux2~0_combout ; +wire \display|digit2|Mux1~0_combout ; +wire \display|digit2|Mux0~0_combout ; +wire \display|digit2|WideOr0~0_combout ; +wire \REGS|regs[8][30]~q ; +wire \REGS|regs[10][14]~q ; +wire \PC_Reg_Display[14]~318_combout ; +wire \PC_Reg_Display[14]~320_combout ; +wire \PC_Reg_Display[14]~321_combout ; +wire \REGS|regs[12][14]~DUPLICATE_q ; +wire \REGS|regs[12][30]~q ; +wire \PC_Reg_Display[14]~319_combout ; +wire \PC_Reg_Display[14]~322_combout ; +wire \REGS|regs[24][14]~q ; +wire \PC_Reg_Display[14]~323_combout ; +wire \REGS|regs[30][14]~DUPLICATE_q ; +wire \PC_Reg_Display[14]~324_combout ; +wire \REGS|regs[27][14]~DUPLICATE_q ; +wire \REGS|regs[25][14]~q ; +wire \PC_Reg_Display[14]~325_combout ; +wire \REGS|regs[29][30]~DUPLICATE_q ; +wire \REGS|regs[31][14]~DUPLICATE_q ; +wire \REGS|regs[31][30]~DUPLICATE_q ; +wire \PC_Reg_Display[14]~326_combout ; +wire \PC_Reg_Display[14]~327_combout ; +wire \REGS|regs[23][14]~DUPLICATE_q ; +wire \PC_Reg_Display[14]~315_combout ; +wire \REGS|regs[21][30]~q ; +wire \REGS|regs[17][30]~q ; +wire \PC_Reg_Display[14]~314_combout ; +wire \REGS|regs[19][30]~q ; +wire \PC_Reg_Display[14]~316_combout ; +wire \REGS|regs[21][14]~q ; +wire \PC_Reg_Display[14]~313_combout ; +wire \PC_Reg_Display[14]~317_combout ; +wire \REGS|regs[1][30]~q ; +wire \PC_Reg_Display[14]~308_combout ; +wire \REGS|regs[7][14]~q ; +wire \REGS|regs[7][30]~q ; +wire \PC_Reg_Display[14]~311_combout ; +wire \REGS|regs[3][14]~q ; +wire \REGS|regs[3][30]~q ; +wire \PC_Reg_Display[14]~309_combout ; +wire \REGS|regs[4][14]~q ; +wire \REGS|regs[5][14]~DUPLICATE_q ; +wire \PC_Reg_Display[14]~310_combout ; +wire \PC_Reg_Display[14]~312_combout ; +wire \PC_Reg_Display[14]~328_combout ; +wire \Add0~82 ; +wire \Add0~89_sumout ; +wire \Add0~90 ; +wire \Add0~97_sumout ; +wire \Add0~98 ; +wire \Add0~105_sumout ; +wire \PC_Reg_Display[14]~329_combout ; +wire \Add0~106 ; +wire \Add0~113_sumout ; +wire \REGS|regs[3][15]~q ; +wire \REGS|regs[3][31]~q ; +wire \REGS|regs[2][31]~q ; +wire \PC_Reg_Display[15]~331_combout ; +wire \PC_Reg_Display[15]~330_combout ; +wire \REGS|regs[7][15]~q ; +wire \REGS|regs[7][31]~q ; +wire \PC_Reg_Display[15]~333_combout ; +wire \REGS|regs[5][15]~q ; +wire \PC_Reg_Display[15]~332_combout ; +wire \PC_Reg_Display[15]~334_combout ; +wire \REGS|regs[21][15]~q ; +wire \REGS|regs[21][31]~q ; +wire \PC_Reg_Display[15]~338_combout ; +wire \REGS|regs[20][31]~DUPLICATE_q ; +wire \PC_Reg_Display[15]~336_combout ; +wire \PC_Reg_Display[15]~335_combout ; +wire \REGS|regs[17][31]~q ; +wire \PC_Reg_Display[15]~337_combout ; +wire \PC_Reg_Display[15]~339_combout ; +wire \PC_Reg_Display[15]~348_combout ; +wire \REGS|regs[27][15]~q ; +wire \REGS|regs[30][15]~q ; +wire \PC_Reg_Display[15]~347_combout ; +wire \PC_Reg_Display[15]~346_combout ; +wire \REGS|regs[29][15]~DUPLICATE_q ; +wire \REGS|regs[25][15]~q ; +wire \REGS|regs[24][15]~feeder_combout ; +wire \REGS|regs[24][15]~q ; +wire \PC_Reg_Display[15]~345_combout ; +wire \PC_Reg_Display[15]~349_combout ; +wire \REGS|regs[11][31]~q ; +wire \PC_Reg_Display[15]~343_combout ; +wire \PC_Reg_Display[15]~342_combout ; +wire \REGS|regs[13][15]~q ; +wire \PC_Reg_Display[15]~340_combout ; +wire \REGS|regs[9][31]~q ; +wire \PC_Reg_Display[15]~341_combout ; +wire \PC_Reg_Display[15]~344_combout ; +wire \PC_Reg_Display[15]~350_combout ; +wire \PC|pc[15]~DUPLICATE_q ; +wire \PC_Reg_Display[15]~351_combout ; +wire \REGS|regs[24][28]~q ; +wire \REGS|regs[24][12]~q ; +wire \PC_Reg_Display[12]~279_combout ; +wire \REGS|regs[27][12]~q ; +wire \REGS|regs[25][12]~q ; +wire \PC_Reg_Display[12]~281_combout ; +wire \REGS|regs[31][12]~DUPLICATE_q ; +wire \PC_Reg_Display[12]~282_combout ; +wire \REGS|regs[28][12]~q ; +wire \REGS|regs[28][28]~q ; +wire \PC_Reg_Display[12]~280_combout ; +wire \PC_Reg_Display[12]~283_combout ; +wire \REGS|regs[11][12]~q ; +wire \PC_Reg_Display[12]~276_combout ; +wire \REGS|regs[8][12]~q ; +wire \PC_Reg_Display[12]~274_combout ; +wire \REGS|regs[12][28]~DUPLICATE_q ; +wire \PC_Reg_Display[12]~275_combout ; +wire \PC_Reg_Display[12]~277_combout ; +wire \PC_Reg_Display[12]~278_combout ; +wire \PC_Reg_Display[12]~271_combout ; +wire \REGS|regs[21][28]~q ; +wire \REGS|regs[17][28]~q ; +wire \PC_Reg_Display[12]~270_combout ; +wire \REGS|regs[21][12]~q ; +wire \PC_Reg_Display[12]~269_combout ; +wire \REGS|regs[23][28]~DUPLICATE_q ; +wire \PC_Reg_Display[12]~272_combout ; +wire \PC_Reg_Display[12]~273_combout ; +wire \PC_Reg_Display[12]~264_combout ; +wire \REGS|regs[5][12]~q ; +wire \PC_Reg_Display[12]~266_combout ; +wire \REGS|regs[6][28]~DUPLICATE_q ; +wire \REGS|regs[7][28]~q ; +wire \REGS|regs[7][12]~q ; +wire \PC_Reg_Display[12]~267_combout ; +wire \REGS|regs[2][28]~DUPLICATE_q ; +wire \REGS|regs[2][12]~q ; +wire \REGS|regs[3][28]~q ; +wire \REGS|regs[3][12]~q ; +wire \PC_Reg_Display[12]~265_combout ; +wire \PC_Reg_Display[12]~268_combout ; +wire \PC_Reg_Display[12]~284_combout ; +wire \PC_Reg_Display[12]~285_combout ; +wire \PC|pc[13]~DUPLICATE_q ; +wire \PC_Reg_Display[13]~298_combout ; +wire \PC_Reg_Display[13]~297_combout ; +wire \PC_Reg_Display[13]~296_combout ; +wire \PC_Reg_Display[13]~299_combout ; +wire \PC_Reg_Display[13]~300_combout ; +wire \REGS|regs[5][29]~DUPLICATE_q ; +wire \REGS|regs[4][29]~q ; +wire \PC_Reg_Display[13]~288_combout ; +wire \REGS|regs[3][13]~q ; +wire \REGS|regs[3][29]~q ; +wire \PC_Reg_Display[13]~287_combout ; +wire \PC_Reg_Display[13]~286_combout ; +wire \REGS|regs[7][13]~q ; +wire \REGS|regs[7][29]~q ; +wire \PC_Reg_Display[13]~289_combout ; +wire \PC_Reg_Display[13]~290_combout ; +wire \PC_Reg_Display[13]~292_combout ; +wire \PC_Reg_Display[13]~291_combout ; +wire \REGS|regs[21][13]~q ; +wire \REGS|regs[21][29]~q ; +wire \PC_Reg_Display[13]~294_combout ; +wire \REGS|regs[17][29]~q ; +wire \PC_Reg_Display[13]~293_combout ; +wire \PC_Reg_Display[13]~295_combout ; +wire \PC_Reg_Display[13]~303_combout ; +wire \PC_Reg_Display[13]~302_combout ; +wire \PC_Reg_Display[13]~304_combout ; +wire \REGS|regs[25][13]~q ; +wire \REGS|regs[24][13]~q ; +wire \PC_Reg_Display[13]~301_combout ; +wire \PC_Reg_Display[13]~305_combout ; +wire \PC_Reg_Display[13]~306_combout ; +wire \PC|pc[29]~DUPLICATE_q ; +wire \PC_Reg_Display[13]~307_combout ; +wire \display|digit3|Mux5~0_combout ; +wire \display|digit3|Mux4~0_combout ; +wire \display|digit3|Mux3~0_combout ; +wire \display|digit3|Mux2~0_combout ; +wire \display|digit3|Mux1~0_combout ; +wire \display|digit3|Mux0~0_combout ; +wire \display|digit3|WideOr0~0_combout ; +wire [0:0] pc_we; +wire [0:0] \ALU|adder_unit|COUT ; +wire [31:0] \ALU|adder_unit|OUT_1 ; +wire [3:0] \CONTROL_UNIT|ALU_FN ; +wire [31:0] \PC|pc ; +wire [0:0] \CONTROL_UNIT|RW ; -// Location: IOOBUF_X68_Y32_N79 +// Location: IOOBUF_X14_Y61_N53 cyclonev_io_obuf \out_seg_0[0]~output ( - .i(vcc), + .i(gnd), .oe(vcc), .dynamicterminationcontrol(gnd), .seriesterminationcontrol(16'b0000000000000000), @@ -130,7 +5150,7 @@ defparam \out_seg_0[0]~output .shift_series_termination_control = "false"; // Location: IOOBUF_X66_Y0_N2 cyclonev_io_obuf \out_seg_0[1]~output ( - .i(vcc), + .i(\display|digit0|Mux5~0_combout ), .oe(vcc), .dynamicterminationcontrol(gnd), .seriesterminationcontrol(16'b0000000000000000), @@ -146,7 +5166,7 @@ defparam \out_seg_0[1]~output .shift_series_termination_control = "false"; // Location: IOOBUF_X64_Y0_N2 cyclonev_io_obuf \out_seg_0[2]~output ( - .i(vcc), + .i(\display|digit0|Mux4~0_combout ), .oe(vcc), .dynamicterminationcontrol(gnd), .seriesterminationcontrol(16'b0000000000000000), @@ -162,7 +5182,7 @@ defparam \out_seg_0[2]~output .shift_series_termination_control = "false"; // Location: IOOBUF_X64_Y0_N19 cyclonev_io_obuf \out_seg_0[3]~output ( - .i(vcc), + .i(\display|digit0|Mux3~0_combout ), .oe(vcc), .dynamicterminationcontrol(gnd), .seriesterminationcontrol(16'b0000000000000000), @@ -178,7 +5198,7 @@ defparam \out_seg_0[3]~output .shift_series_termination_control = "false"; // Location: IOOBUF_X66_Y0_N19 cyclonev_io_obuf \out_seg_0[4]~output ( - .i(vcc), + .i(\display|digit0|Mux2~0_combout ), .oe(vcc), .dynamicterminationcontrol(gnd), .seriesterminationcontrol(16'b0000000000000000), @@ -194,7 +5214,7 @@ defparam \out_seg_0[4]~output .shift_series_termination_control = "false"; // Location: IOOBUF_X65_Y0_N2 cyclonev_io_obuf \out_seg_0[5]~output ( - .i(vcc), + .i(\display|digit0|Mux1~0_combout ), .oe(vcc), .dynamicterminationcontrol(gnd), .seriesterminationcontrol(16'b0000000000000000), @@ -210,7 +5230,7 @@ defparam \out_seg_0[5]~output .shift_series_termination_control = "false"; // Location: IOOBUF_X65_Y0_N19 cyclonev_io_obuf \out_seg_0[6]~output ( - .i(vcc), + .i(\display|digit0|Mux0~0_combout ), .oe(vcc), .dynamicterminationcontrol(gnd), .seriesterminationcontrol(16'b0000000000000000), @@ -226,7 +5246,7 @@ defparam \out_seg_0[6]~output .shift_series_termination_control = "false"; // Location: IOOBUF_X62_Y0_N42 cyclonev_io_obuf \out_seg_0[7]~output ( - .i(vcc), + .i(!\display|digit0|WideOr0~0_combout ), .oe(vcc), .dynamicterminationcontrol(gnd), .seriesterminationcontrol(16'b0000000000000000), @@ -240,9 +5260,9 @@ defparam \out_seg_0[7]~output .open_drain_output = "false"; defparam \out_seg_0[7]~output .shift_series_termination_control = "false"; // synopsys translate_on -// Location: IOOBUF_X17_Y61_N76 +// Location: IOOBUF_X15_Y61_N36 cyclonev_io_obuf \out_seg_1[0]~output ( - .i(vcc), + .i(gnd), .oe(vcc), .dynamicterminationcontrol(gnd), .seriesterminationcontrol(16'b0000000000000000), @@ -258,7 +5278,7 @@ defparam \out_seg_1[0]~output .shift_series_termination_control = "false"; // Location: IOOBUF_X62_Y0_N59 cyclonev_io_obuf \out_seg_1[1]~output ( - .i(vcc), + .i(\display|digit1|Mux5~0_combout ), .oe(vcc), .dynamicterminationcontrol(gnd), .seriesterminationcontrol(16'b0000000000000000), @@ -274,7 +5294,7 @@ defparam \out_seg_1[1]~output .shift_series_termination_control = "false"; // Location: IOOBUF_X64_Y0_N36 cyclonev_io_obuf \out_seg_1[2]~output ( - .i(vcc), + .i(\display|digit1|Mux4~0_combout ), .oe(vcc), .dynamicterminationcontrol(gnd), .seriesterminationcontrol(16'b0000000000000000), @@ -290,7 +5310,7 @@ defparam \out_seg_1[2]~output .shift_series_termination_control = "false"; // Location: IOOBUF_X65_Y0_N36 cyclonev_io_obuf \out_seg_1[3]~output ( - .i(vcc), + .i(\display|digit1|Mux3~0_combout ), .oe(vcc), .dynamicterminationcontrol(gnd), .seriesterminationcontrol(16'b0000000000000000), @@ -306,7 +5326,7 @@ defparam \out_seg_1[3]~output .shift_series_termination_control = "false"; // Location: IOOBUF_X64_Y0_N53 cyclonev_io_obuf \out_seg_1[4]~output ( - .i(vcc), + .i(\display|digit1|Mux2~0_combout ), .oe(vcc), .dynamicterminationcontrol(gnd), .seriesterminationcontrol(16'b0000000000000000), @@ -322,7 +5342,7 @@ defparam \out_seg_1[4]~output .shift_series_termination_control = "false"; // Location: IOOBUF_X62_Y0_N76 cyclonev_io_obuf \out_seg_1[5]~output ( - .i(vcc), + .i(\display|digit1|Mux1~0_combout ), .oe(vcc), .dynamicterminationcontrol(gnd), .seriesterminationcontrol(16'b0000000000000000), @@ -338,7 +5358,7 @@ defparam \out_seg_1[5]~output .shift_series_termination_control = "false"; // Location: IOOBUF_X65_Y0_N53 cyclonev_io_obuf \out_seg_1[6]~output ( - .i(vcc), + .i(\display|digit1|Mux0~0_combout ), .oe(vcc), .dynamicterminationcontrol(gnd), .seriesterminationcontrol(16'b0000000000000000), @@ -354,7 +5374,7 @@ defparam \out_seg_1[6]~output .shift_series_termination_control = "false"; // Location: IOOBUF_X62_Y0_N93 cyclonev_io_obuf \out_seg_1[7]~output ( - .i(vcc), + .i(!\display|digit1|WideOr0~0_combout ), .oe(vcc), .dynamicterminationcontrol(gnd), .seriesterminationcontrol(16'b0000000000000000), @@ -368,9 +5388,9 @@ defparam \out_seg_1[7]~output .open_drain_output = "false"; defparam \out_seg_1[7]~output .shift_series_termination_control = "false"; // synopsys translate_on -// Location: IOOBUF_X64_Y61_N2 +// Location: IOOBUF_X15_Y61_N53 cyclonev_io_obuf \out_seg_2[0]~output ( - .i(vcc), + .i(gnd), .oe(vcc), .dynamicterminationcontrol(gnd), .seriesterminationcontrol(16'b0000000000000000), @@ -386,7 +5406,7 @@ defparam \out_seg_2[0]~output .shift_series_termination_control = "false"; // Location: IOOBUF_X7_Y0_N36 cyclonev_io_obuf \out_seg_2[1]~output ( - .i(vcc), + .i(\display|digit2|Mux5~0_combout ), .oe(vcc), .dynamicterminationcontrol(gnd), .seriesterminationcontrol(16'b0000000000000000), @@ -402,7 +5422,7 @@ defparam \out_seg_2[1]~output .shift_series_termination_control = "false"; // Location: IOOBUF_X7_Y0_N53 cyclonev_io_obuf \out_seg_2[2]~output ( - .i(vcc), + .i(\display|digit2|Mux4~0_combout ), .oe(vcc), .dynamicterminationcontrol(gnd), .seriesterminationcontrol(16'b0000000000000000), @@ -418,7 +5438,7 @@ defparam \out_seg_2[2]~output .shift_series_termination_control = "false"; // Location: IOOBUF_X68_Y13_N22 cyclonev_io_obuf \out_seg_2[3]~output ( - .i(vcc), + .i(\display|digit2|Mux3~0_combout ), .oe(vcc), .dynamicterminationcontrol(gnd), .seriesterminationcontrol(16'b0000000000000000), @@ -434,7 +5454,7 @@ defparam \out_seg_2[3]~output .shift_series_termination_control = "false"; // Location: IOOBUF_X68_Y12_N5 cyclonev_io_obuf \out_seg_2[4]~output ( - .i(vcc), + .i(\display|digit2|Mux2~0_combout ), .oe(vcc), .dynamicterminationcontrol(gnd), .seriesterminationcontrol(16'b0000000000000000), @@ -450,7 +5470,7 @@ defparam \out_seg_2[4]~output .shift_series_termination_control = "false"; // Location: IOOBUF_X68_Y10_N62 cyclonev_io_obuf \out_seg_2[5]~output ( - .i(vcc), + .i(\display|digit2|Mux1~0_combout ), .oe(vcc), .dynamicterminationcontrol(gnd), .seriesterminationcontrol(16'b0000000000000000), @@ -466,7 +5486,7 @@ defparam \out_seg_2[5]~output .shift_series_termination_control = "false"; // Location: IOOBUF_X68_Y11_N22 cyclonev_io_obuf \out_seg_2[6]~output ( - .i(vcc), + .i(\display|digit2|Mux0~0_combout ), .oe(vcc), .dynamicterminationcontrol(gnd), .seriesterminationcontrol(16'b0000000000000000), @@ -482,7 +5502,7 @@ defparam \out_seg_2[6]~output .shift_series_termination_control = "false"; // Location: IOOBUF_X68_Y11_N5 cyclonev_io_obuf \out_seg_2[7]~output ( - .i(vcc), + .i(!\display|digit2|WideOr0~0_combout ), .oe(vcc), .dynamicterminationcontrol(gnd), .seriesterminationcontrol(16'b0000000000000000), @@ -496,9 +5516,9 @@ defparam \out_seg_2[7]~output .open_drain_output = "false"; defparam \out_seg_2[7]~output .shift_series_termination_control = "false"; // synopsys translate_on -// Location: IOOBUF_X53_Y61_N2 +// Location: IOOBUF_X14_Y61_N36 cyclonev_io_obuf \out_seg_3[0]~output ( - .i(vcc), + .i(gnd), .oe(vcc), .dynamicterminationcontrol(gnd), .seriesterminationcontrol(16'b0000000000000000), @@ -514,7 +5534,7 @@ defparam \out_seg_3[0]~output .shift_series_termination_control = "false"; // Location: IOOBUF_X68_Y13_N56 cyclonev_io_obuf \out_seg_3[1]~output ( - .i(vcc), + .i(\display|digit3|Mux5~0_combout ), .oe(vcc), .dynamicterminationcontrol(gnd), .seriesterminationcontrol(16'b0000000000000000), @@ -530,7 +5550,7 @@ defparam \out_seg_3[1]~output .shift_series_termination_control = "false"; // Location: IOOBUF_X68_Y13_N39 cyclonev_io_obuf \out_seg_3[2]~output ( - .i(vcc), + .i(\display|digit3|Mux4~0_combout ), .oe(vcc), .dynamicterminationcontrol(gnd), .seriesterminationcontrol(16'b0000000000000000), @@ -546,7 +5566,7 @@ defparam \out_seg_3[2]~output .shift_series_termination_control = "false"; // Location: IOOBUF_X68_Y11_N56 cyclonev_io_obuf \out_seg_3[3]~output ( - .i(vcc), + .i(\display|digit3|Mux3~0_combout ), .oe(vcc), .dynamicterminationcontrol(gnd), .seriesterminationcontrol(16'b0000000000000000), @@ -562,7 +5582,7 @@ defparam \out_seg_3[3]~output .shift_series_termination_control = "false"; // Location: IOOBUF_X68_Y11_N39 cyclonev_io_obuf \out_seg_3[4]~output ( - .i(vcc), + .i(\display|digit3|Mux2~0_combout ), .oe(vcc), .dynamicterminationcontrol(gnd), .seriesterminationcontrol(16'b0000000000000000), @@ -578,7 +5598,7 @@ defparam \out_seg_3[4]~output .shift_series_termination_control = "false"; // Location: IOOBUF_X68_Y12_N39 cyclonev_io_obuf \out_seg_3[5]~output ( - .i(vcc), + .i(\display|digit3|Mux1~0_combout ), .oe(vcc), .dynamicterminationcontrol(gnd), .seriesterminationcontrol(16'b0000000000000000), @@ -594,7 +5614,7 @@ defparam \out_seg_3[5]~output .shift_series_termination_control = "false"; // Location: IOOBUF_X68_Y10_N96 cyclonev_io_obuf \out_seg_3[6]~output ( - .i(vcc), + .i(\display|digit3|Mux0~0_combout ), .oe(vcc), .dynamicterminationcontrol(gnd), .seriesterminationcontrol(16'b0000000000000000), @@ -610,7 +5630,7 @@ defparam \out_seg_3[6]~output .shift_series_termination_control = "false"; // Location: IOOBUF_X68_Y10_N79 cyclonev_io_obuf \out_seg_3[7]~output ( - .i(vcc), + .i(!\display|digit3|WideOr0~0_combout ), .oe(vcc), .dynamicterminationcontrol(gnd), .seriesterminationcontrol(16'b0000000000000000), @@ -624,15 +5644,15 @@ defparam \out_seg_3[7]~output .open_drain_output = "false"; defparam \out_seg_3[7]~output .shift_series_termination_control = "false"; // synopsys translate_on -// Location: IOIBUF_X10_Y0_N41 -cyclonev_io_ibuf \HID_PC[0]~input ( - .i(HID_PC[0]), +// Location: IOIBUF_X50_Y0_N35 +cyclonev_io_ibuf \HID_Register[4]~input ( + .i(HID_Register[4]), .ibar(gnd), .dynamicterminationcontrol(gnd), - .o(\HID_PC[0]~input_o )); + .o(\HID_Register[4]~input_o )); // synopsys translate_off -defparam \HID_PC[0]~input .bus_hold = "false"; -defparam \HID_PC[0]~input .simulate_z_as = "z"; +defparam \HID_Register[4]~input .bus_hold = "false"; +defparam \HID_Register[4]~input .simulate_z_as = "z"; // synopsys translate_on // Location: IOIBUF_X14_Y0_N52 @@ -646,15 +5666,92815 @@ defparam \HID_Hi_Low[0]~input .bus_hold = "false"; defparam \HID_Hi_Low[0]~input .simulate_z_as = "z"; // synopsys translate_on -// Location: IOIBUF_X50_Y0_N35 -cyclonev_io_ibuf \HID_Register[4]~input ( - .i(HID_Register[4]), +// Location: IOIBUF_X46_Y0_N18 +cyclonev_io_ibuf \clk[0]~input ( + .i(clk[0]), .ibar(gnd), .dynamicterminationcontrol(gnd), - .o(\HID_Register[4]~input_o )); + .o(\clk[0]~input_o )); // synopsys translate_off -defparam \HID_Register[4]~input .bus_hold = "false"; -defparam \HID_Register[4]~input .simulate_z_as = "z"; +defparam \clk[0]~input .bus_hold = "false"; +defparam \clk[0]~input .simulate_z_as = "z"; +// synopsys translate_on + +// Location: CLKCTRL_G5 +cyclonev_clkena \clk[0]~inputCLKENA0 ( + .inclk(\clk[0]~input_o ), + .ena(vcc), + .outclk(\clk[0]~inputCLKENA0_outclk ), + .enaout()); +// synopsys translate_off +defparam \clk[0]~inputCLKENA0 .clock_type = "global clock"; +defparam \clk[0]~inputCLKENA0 .disable_mode = "low"; +defparam \clk[0]~inputCLKENA0 .ena_register_mode = "always enabled"; +defparam \clk[0]~inputCLKENA0 .ena_register_power_up = "high"; +defparam \clk[0]~inputCLKENA0 .test_syn = "high"; +// synopsys translate_on + +// Location: IOIBUF_X14_Y0_N35 +cyclonev_io_ibuf \rst[0]~input ( + .i(rst[0]), + .ibar(gnd), + .dynamicterminationcontrol(gnd), + .o(\rst[0]~input_o )); +// synopsys translate_off +defparam \rst[0]~input .bus_hold = "false"; +defparam \rst[0]~input .simulate_z_as = "z"; +// synopsys translate_on + +// Location: FF_X36_Y8_N23 +dffeas \PC|pc[9]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\Add0~69_sumout ), + .asdata(vcc), + .clrn(!\rst[0]~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\PC|pc[9]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \PC|pc[9]~DUPLICATE .is_wysiwyg = "true"; +defparam \PC|pc[9]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: FF_X36_Y8_N11 +dffeas \PC|pc[5]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\Add0~37_sumout ), + .asdata(vcc), + .clrn(!\rst[0]~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\PC|pc[5]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \PC|pc[5]~DUPLICATE .is_wysiwyg = "true"; +defparam \PC|pc[5]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: FF_X36_Y8_N7 +dffeas \PC|pc[4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\Add0~29_sumout ), + .asdata(vcc), + .clrn(!\rst[0]~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\PC|pc [4]), + .prn(vcc)); +// synopsys translate_off +defparam \PC|pc[4] .is_wysiwyg = "true"; +defparam \PC|pc[4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X36_Y8_N2 +dffeas \PC|pc[2]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\Add0~13_sumout ), + .asdata(vcc), + .clrn(!\rst[0]~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\PC|pc[2]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \PC|pc[2]~DUPLICATE .is_wysiwyg = "true"; +defparam \PC|pc[2]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: FF_X36_Y8_N17 +dffeas \PC|pc[7]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\Add0~53_sumout ), + .asdata(vcc), + .clrn(!\rst[0]~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\PC|pc[7]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \PC|pc[7]~DUPLICATE .is_wysiwyg = "true"; +defparam \PC|pc[7]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: FF_X36_Y8_N13 +dffeas \PC|pc[6] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\Add0~45_sumout ), + .asdata(vcc), + .clrn(!\rst[0]~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\PC|pc [6]), + .prn(vcc)); +// synopsys translate_off +defparam \PC|pc[6] .is_wysiwyg = "true"; +defparam \PC|pc[6] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X36_Y9_N18 +cyclonev_lcell_comb \ROM|mem~8 ( +// Equation(s): +// \ROM|mem~8_combout = ( !\PC|pc [6] & ( \PC|pc[4]~DUPLICATE_q & ( (!\PC|pc[7]~DUPLICATE_q & ((!\PC|pc [5] & ((!\PC|pc [2]))) # (\PC|pc [5] & ((\PC|pc [2]) # (\PC|pc[3]~DUPLICATE_q ))))) ) ) ) # ( \PC|pc [6] & ( !\PC|pc[4]~DUPLICATE_q & ( (!\PC|pc [5] & +// (!\PC|pc[3]~DUPLICATE_q & !\PC|pc[7]~DUPLICATE_q )) ) ) ) # ( !\PC|pc [6] & ( !\PC|pc[4]~DUPLICATE_q & ( (!\PC|pc[7]~DUPLICATE_q & ((!\PC|pc [5] & (!\PC|pc[3]~DUPLICATE_q )) # (\PC|pc [5] & ((\PC|pc [2]))))) ) ) ) + + .dataa(!\PC|pc [5]), + .datab(!\PC|pc[3]~DUPLICATE_q ), + .datac(!\PC|pc [2]), + .datad(!\PC|pc[7]~DUPLICATE_q ), + .datae(!\PC|pc [6]), + .dataf(!\PC|pc[4]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\ROM|mem~8_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \ROM|mem~8 .extended_lut = "off"; +defparam \ROM|mem~8 .lut_mask = 64'h8D008800B5000000; +defparam \ROM|mem~8 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X36_Y8_N0 +cyclonev_lcell_comb \Add0~13 ( +// Equation(s): +// \Add0~13_sumout = SUM(( \PC|pc[2]~DUPLICATE_q ) + ( (!pc_we[0]) # ((!\PC|pc [8] & (!\PC|pc[9]~DUPLICATE_q & \ROM|mem~8_combout ))) ) + ( !VCC )) +// \Add0~14 = CARRY(( \PC|pc[2]~DUPLICATE_q ) + ( (!pc_we[0]) # ((!\PC|pc [8] & (!\PC|pc[9]~DUPLICATE_q & \ROM|mem~8_combout ))) ) + ( !VCC )) + + .dataa(!\PC|pc [8]), + .datab(!pc_we[0]), + .datac(!\PC|pc[9]~DUPLICATE_q ), + .datad(!\PC|pc[2]~DUPLICATE_q ), + .datae(gnd), + .dataf(!\ROM|mem~8_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(), + .sumout(\Add0~13_sumout ), + .cout(\Add0~14 ), + .shareout()); +// synopsys translate_off +defparam \Add0~13 .extended_lut = "off"; +defparam \Add0~13 .lut_mask = 64'h00003313000000FF; +defparam \Add0~13 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X36_Y8_N1 +dffeas \PC|pc[2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\Add0~13_sumout ), + .asdata(vcc), + .clrn(!\rst[0]~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\PC|pc [2]), + .prn(vcc)); +// synopsys translate_off +defparam \PC|pc[2] .is_wysiwyg = "true"; +defparam \PC|pc[2] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X35_Y7_N30 +cyclonev_lcell_comb \ROM|mem~7 ( +// Equation(s): +// \ROM|mem~7_combout = ( \PC|pc [4] & ( \PC|pc [2] & ( (!\PC|pc[6]~DUPLICATE_q & (!\PC|pc [7] & ((!\PC|pc[3]~DUPLICATE_q ) # (\PC|pc [5])))) ) ) ) # ( !\PC|pc [4] & ( \PC|pc [2] & ( (!\PC|pc [7] & ((!\PC|pc[3]~DUPLICATE_q & ((!\PC|pc [5]))) # +// (\PC|pc[3]~DUPLICATE_q & (!\PC|pc[6]~DUPLICATE_q & \PC|pc [5])))) ) ) ) # ( \PC|pc [4] & ( !\PC|pc [2] & ( (!\PC|pc[6]~DUPLICATE_q & (!\PC|pc [7] & (!\PC|pc[3]~DUPLICATE_q $ (!\PC|pc [5])))) ) ) ) # ( !\PC|pc [4] & ( !\PC|pc [2] & ( +// (!\PC|pc[6]~DUPLICATE_q & (!\PC|pc [7] & (!\PC|pc[3]~DUPLICATE_q $ (\PC|pc [5])))) ) ) ) + + .dataa(!\PC|pc[3]~DUPLICATE_q ), + .datab(!\PC|pc[6]~DUPLICATE_q ), + .datac(!\PC|pc [5]), + .datad(!\PC|pc [7]), + .datae(!\PC|pc [4]), + .dataf(!\PC|pc [2]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\ROM|mem~7_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \ROM|mem~7 .extended_lut = "off"; +defparam \ROM|mem~7 .lut_mask = 64'h84004800A4008C00; +defparam \ROM|mem~7 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X36_Y8_N3 +cyclonev_lcell_comb \Add0~21 ( +// Equation(s): +// \Add0~21_sumout = SUM(( \PC|pc[3]~DUPLICATE_q ) + ( (!\PC|pc [8] & (pc_we[0] & (!\PC|pc [9] & \ROM|mem~7_combout ))) ) + ( \Add0~14 )) +// \Add0~22 = CARRY(( \PC|pc[3]~DUPLICATE_q ) + ( (!\PC|pc [8] & (pc_we[0] & (!\PC|pc [9] & \ROM|mem~7_combout ))) ) + ( \Add0~14 )) + + .dataa(!\PC|pc [8]), + .datab(!pc_we[0]), + .datac(!\PC|pc [9]), + .datad(!\PC|pc[3]~DUPLICATE_q ), + .datae(gnd), + .dataf(!\ROM|mem~7_combout ), + .datag(gnd), + .cin(\Add0~14 ), + .sharein(gnd), + .combout(), + .sumout(\Add0~21_sumout ), + .cout(\Add0~22 ), + .shareout()); +// synopsys translate_off +defparam \Add0~21 .extended_lut = "off"; +defparam \Add0~21 .lut_mask = 64'h0000FFDF000000FF; +defparam \Add0~21 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X36_Y8_N5 +dffeas \PC|pc[3]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\Add0~21_sumout ), + .asdata(vcc), + .clrn(!\rst[0]~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\PC|pc[3]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \PC|pc[3]~DUPLICATE .is_wysiwyg = "true"; +defparam \PC|pc[3]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X36_Y9_N36 +cyclonev_lcell_comb \ROM|mem~25 ( +// Equation(s): +// \ROM|mem~25_combout = ( \PC|pc [6] & ( !\PC|pc[4]~DUPLICATE_q & ( (!\PC|pc [5] & (!\PC|pc[3]~DUPLICATE_q & !\PC|pc[7]~DUPLICATE_q )) ) ) ) # ( !\PC|pc [6] & ( !\PC|pc[4]~DUPLICATE_q & ( (!\PC|pc[7]~DUPLICATE_q & (((!\PC|pc[3]~DUPLICATE_q & \PC|pc +// [2])) # (\PC|pc [5]))) ) ) ) + + .dataa(!\PC|pc [5]), + .datab(!\PC|pc[3]~DUPLICATE_q ), + .datac(!\PC|pc [2]), + .datad(!\PC|pc[7]~DUPLICATE_q ), + .datae(!\PC|pc [6]), + .dataf(!\PC|pc[4]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\ROM|mem~25_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \ROM|mem~25 .extended_lut = "off"; +defparam \ROM|mem~25 .lut_mask = 64'h5D00880000000000; +defparam \ROM|mem~25 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X36_Y8_N6 +cyclonev_lcell_comb \Add0~29 ( +// Equation(s): +// \Add0~29_sumout = SUM(( (!\PC|pc [8] & (!\PC|pc [9] & (pc_we[0] & \ROM|mem~25_combout ))) ) + ( \PC|pc[4]~DUPLICATE_q ) + ( \Add0~22 )) +// \Add0~30 = CARRY(( (!\PC|pc [8] & (!\PC|pc [9] & (pc_we[0] & \ROM|mem~25_combout ))) ) + ( \PC|pc[4]~DUPLICATE_q ) + ( \Add0~22 )) + + .dataa(!\PC|pc [8]), + .datab(!\PC|pc [9]), + .datac(!pc_we[0]), + .datad(!\ROM|mem~25_combout ), + .datae(gnd), + .dataf(!\PC|pc[4]~DUPLICATE_q ), + .datag(gnd), + .cin(\Add0~22 ), + .sharein(gnd), + .combout(), + .sumout(\Add0~29_sumout ), + .cout(\Add0~30 ), + .shareout()); +// synopsys translate_off +defparam \Add0~29 .extended_lut = "off"; +defparam \Add0~29 .lut_mask = 64'h0000FF0000000008; +defparam \Add0~29 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X36_Y8_N9 +cyclonev_lcell_comb \Add0~37 ( +// Equation(s): +// \Add0~37_sumout = SUM(( (!\PC|pc [8] & (!\PC|pc [9] & (pc_we[0] & \ROM|mem~6_combout ))) ) + ( \PC|pc[5]~DUPLICATE_q ) + ( \Add0~30 )) +// \Add0~38 = CARRY(( (!\PC|pc [8] & (!\PC|pc [9] & (pc_we[0] & \ROM|mem~6_combout ))) ) + ( \PC|pc[5]~DUPLICATE_q ) + ( \Add0~30 )) + + .dataa(!\PC|pc [8]), + .datab(!\PC|pc [9]), + .datac(!pc_we[0]), + .datad(!\ROM|mem~6_combout ), + .datae(gnd), + .dataf(!\PC|pc[5]~DUPLICATE_q ), + .datag(gnd), + .cin(\Add0~30 ), + .sharein(gnd), + .combout(), + .sumout(\Add0~37_sumout ), + .cout(\Add0~38 ), + .shareout()); +// synopsys translate_off +defparam \Add0~37 .extended_lut = "off"; +defparam \Add0~37 .lut_mask = 64'h0000FF0000000008; +defparam \Add0~37 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X36_Y8_N12 +cyclonev_lcell_comb \Add0~45 ( +// Equation(s): +// \Add0~45_sumout = SUM(( (pc_we[0] & \ROM|mem~9_combout ) ) + ( \PC|pc[6]~DUPLICATE_q ) + ( \Add0~38 )) +// \Add0~46 = CARRY(( (pc_we[0] & \ROM|mem~9_combout ) ) + ( \PC|pc[6]~DUPLICATE_q ) + ( \Add0~38 )) + + .dataa(gnd), + .datab(!pc_we[0]), + .datac(gnd), + .datad(!\ROM|mem~9_combout ), + .datae(gnd), + .dataf(!\PC|pc[6]~DUPLICATE_q ), + .datag(gnd), + .cin(\Add0~38 ), + .sharein(gnd), + .combout(), + .sumout(\Add0~45_sumout ), + .cout(\Add0~46 ), + .shareout()); +// synopsys translate_off +defparam \Add0~45 .extended_lut = "off"; +defparam \Add0~45 .lut_mask = 64'h0000FF0000000033; +defparam \Add0~45 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X36_Y8_N14 +dffeas \PC|pc[6]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\Add0~45_sumout ), + .asdata(vcc), + .clrn(!\rst[0]~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\PC|pc[6]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \PC|pc[6]~DUPLICATE .is_wysiwyg = "true"; +defparam \PC|pc[6]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X35_Y6_N27 +cyclonev_lcell_comb \ROM|mem~20 ( +// Equation(s): +// \ROM|mem~20_combout = ( \PC|pc [4] & ( \PC|pc [2] & ( (!\PC|pc[6]~DUPLICATE_q & !\PC|pc [7]) ) ) ) # ( !\PC|pc [4] & ( \PC|pc [2] & ( (!\PC|pc [7] & ((!\PC|pc[6]~DUPLICATE_q & ((\PC|pc [5]))) # (\PC|pc[6]~DUPLICATE_q & (!\PC|pc[3]~DUPLICATE_q & +// !\PC|pc [5])))) ) ) ) # ( \PC|pc [4] & ( !\PC|pc [2] & ( (!\PC|pc[6]~DUPLICATE_q & (!\PC|pc[3]~DUPLICATE_q & !\PC|pc [7])) ) ) ) # ( !\PC|pc [4] & ( !\PC|pc [2] & ( (!\PC|pc [7] & ((!\PC|pc [5] & ((!\PC|pc[3]~DUPLICATE_q ))) # (\PC|pc [5] & +// (!\PC|pc[6]~DUPLICATE_q )))) ) ) ) + + .dataa(!\PC|pc[6]~DUPLICATE_q ), + .datab(!\PC|pc[3]~DUPLICATE_q ), + .datac(!\PC|pc [5]), + .datad(!\PC|pc [7]), + .datae(!\PC|pc [4]), + .dataf(!\PC|pc [2]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\ROM|mem~20_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \ROM|mem~20 .extended_lut = "off"; +defparam \ROM|mem~20 .lut_mask = 64'hCA0088004A00AA00; +defparam \ROM|mem~20 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X36_Y8_N15 +cyclonev_lcell_comb \Add0~53 ( +// Equation(s): +// \Add0~53_sumout = SUM(( \PC|pc [7] ) + ( (!\PC|pc [8] & (pc_we[0] & (!\PC|pc [9] & \ROM|mem~20_combout ))) ) + ( \Add0~46 )) +// \Add0~54 = CARRY(( \PC|pc [7] ) + ( (!\PC|pc [8] & (pc_we[0] & (!\PC|pc [9] & \ROM|mem~20_combout ))) ) + ( \Add0~46 )) + + .dataa(!\PC|pc [8]), + .datab(!pc_we[0]), + .datac(!\PC|pc [9]), + .datad(!\PC|pc [7]), + .datae(gnd), + .dataf(!\ROM|mem~20_combout ), + .datag(gnd), + .cin(\Add0~46 ), + .sharein(gnd), + .combout(), + .sumout(\Add0~53_sumout ), + .cout(\Add0~54 ), + .shareout()); +// synopsys translate_off +defparam \Add0~53 .extended_lut = "off"; +defparam \Add0~53 .lut_mask = 64'h0000FFDF000000FF; +defparam \Add0~53 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X36_Y8_N18 +cyclonev_lcell_comb \Add0~61 ( +// Equation(s): +// \Add0~61_sumout = SUM(( (\ROM|mem~9_combout & pc_we[0]) ) + ( \PC|pc [8] ) + ( \Add0~54 )) +// \Add0~62 = CARRY(( (\ROM|mem~9_combout & pc_we[0]) ) + ( \PC|pc [8] ) + ( \Add0~54 )) + + .dataa(gnd), + .datab(!\ROM|mem~9_combout ), + .datac(!\PC|pc [8]), + .datad(!pc_we[0]), + .datae(gnd), + .dataf(gnd), + .datag(gnd), + .cin(\Add0~54 ), + .sharein(gnd), + .combout(), + .sumout(\Add0~61_sumout ), + .cout(\Add0~62 ), + .shareout()); +// synopsys translate_off +defparam \Add0~61 .extended_lut = "off"; +defparam \Add0~61 .lut_mask = 64'h0000F0F000000033; +defparam \Add0~61 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X36_Y8_N21 +cyclonev_lcell_comb \Add0~69 ( +// Equation(s): +// \Add0~69_sumout = SUM(( \PC|pc[9]~DUPLICATE_q ) + ( (\ROM|mem~9_combout & pc_we[0]) ) + ( \Add0~62 )) +// \Add0~70 = CARRY(( \PC|pc[9]~DUPLICATE_q ) + ( (\ROM|mem~9_combout & pc_we[0]) ) + ( \Add0~62 )) + + .dataa(gnd), + .datab(!\ROM|mem~9_combout ), + .datac(!pc_we[0]), + .datad(!\PC|pc[9]~DUPLICATE_q ), + .datae(gnd), + .dataf(gnd), + .datag(gnd), + .cin(\Add0~62 ), + .sharein(gnd), + .combout(), + .sumout(\Add0~69_sumout ), + .cout(\Add0~70 ), + .shareout()); +// synopsys translate_off +defparam \Add0~69 .extended_lut = "off"; +defparam \Add0~69 .lut_mask = 64'h0000FCFC000000FF; +defparam \Add0~69 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X36_Y8_N22 +dffeas \PC|pc[9] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\Add0~69_sumout ), + .asdata(vcc), + .clrn(!\rst[0]~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\PC|pc [9]), + .prn(vcc)); +// synopsys translate_off +defparam \PC|pc[9] .is_wysiwyg = "true"; +defparam \PC|pc[9] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X36_Y8_N10 +dffeas \PC|pc[5] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\Add0~37_sumout ), + .asdata(vcc), + .clrn(!\rst[0]~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\PC|pc [5]), + .prn(vcc)); +// synopsys translate_off +defparam \PC|pc[5] .is_wysiwyg = "true"; +defparam \PC|pc[5] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X35_Y9_N12 +cyclonev_lcell_comb \ROM|mem~17 ( +// Equation(s): +// \ROM|mem~17_combout = ( !\PC|pc[6]~DUPLICATE_q & ( \PC|pc[4]~DUPLICATE_q & ( (\ROM|mem~3_combout & ((!\PC|pc [5] & (\PC|pc[3]~DUPLICATE_q & \PC|pc [2])) # (\PC|pc [5] & (!\PC|pc[3]~DUPLICATE_q )))) ) ) ) # ( \PC|pc[6]~DUPLICATE_q & ( +// !\PC|pc[4]~DUPLICATE_q & ( (!\PC|pc [5] & (!\PC|pc[3]~DUPLICATE_q & \ROM|mem~3_combout )) ) ) ) + + .dataa(!\PC|pc [5]), + .datab(!\PC|pc[3]~DUPLICATE_q ), + .datac(!\PC|pc [2]), + .datad(!\ROM|mem~3_combout ), + .datae(!\PC|pc[6]~DUPLICATE_q ), + .dataf(!\PC|pc[4]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\ROM|mem~17_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \ROM|mem~17 .extended_lut = "off"; +defparam \ROM|mem~17 .lut_mask = 64'h0000008800460000; +defparam \ROM|mem~17 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X35_Y8_N42 +cyclonev_lcell_comb \ROM|mem~0 ( +// Equation(s): +// \ROM|mem~0_combout = ( !\PC|pc[6]~DUPLICATE_q & ( (!\PC|pc [8] & (!\PC|pc[9]~DUPLICATE_q & !\PC|pc[7]~DUPLICATE_q )) ) ) + + .dataa(gnd), + .datab(!\PC|pc [8]), + .datac(!\PC|pc[9]~DUPLICATE_q ), + .datad(!\PC|pc[7]~DUPLICATE_q ), + .datae(gnd), + .dataf(!\PC|pc[6]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\ROM|mem~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \ROM|mem~0 .extended_lut = "off"; +defparam \ROM|mem~0 .lut_mask = 64'hC000C00000000000; +defparam \ROM|mem~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X36_Y9_N57 +cyclonev_lcell_comb \ROM|mem~2 ( +// Equation(s): +// \ROM|mem~2_combout = ( \PC|pc[3]~DUPLICATE_q & ( (!\PC|pc[4]~DUPLICATE_q & !\PC|pc [5]) ) ) + + .dataa(gnd), + .datab(gnd), + .datac(!\PC|pc[4]~DUPLICATE_q ), + .datad(!\PC|pc [5]), + .datae(gnd), + .dataf(!\PC|pc[3]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\ROM|mem~2_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \ROM|mem~2 .extended_lut = "off"; +defparam \ROM|mem~2 .lut_mask = 64'h00000000F000F000; +defparam \ROM|mem~2 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X35_Y8_N45 +cyclonev_lcell_comb \ROM|mem~1 ( +// Equation(s): +// \ROM|mem~1_combout = ( \PC|pc[4]~DUPLICATE_q & ( (!\PC|pc [2] & \PC|pc[3]~DUPLICATE_q ) ) ) # ( !\PC|pc[4]~DUPLICATE_q & ( (!\PC|pc[5]~DUPLICATE_q & (!\PC|pc [2] $ (!\PC|pc[3]~DUPLICATE_q ))) ) ) + + .dataa(!\PC|pc[5]~DUPLICATE_q ), + .datab(gnd), + .datac(!\PC|pc [2]), + .datad(!\PC|pc[3]~DUPLICATE_q ), + .datae(gnd), + .dataf(!\PC|pc[4]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\ROM|mem~1_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \ROM|mem~1 .extended_lut = "off"; +defparam \ROM|mem~1 .lut_mask = 64'h0AA00AA000F000F0; +defparam \ROM|mem~1 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X38_Y9_N12 +cyclonev_lcell_comb \CONTROL_UNIT|M2R[0]~0 ( +// Equation(s): +// \CONTROL_UNIT|M2R[0]~0_combout = ( !\ROM|mem~1_combout & ( (\ROM|mem~0_combout & \ROM|mem~2_combout ) ) ) + + .dataa(!\ROM|mem~0_combout ), + .datab(!\ROM|mem~2_combout ), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\ROM|mem~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\CONTROL_UNIT|M2R[0]~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \CONTROL_UNIT|M2R[0]~0 .extended_lut = "off"; +defparam \CONTROL_UNIT|M2R[0]~0 .lut_mask = 64'h1111111100000000; +defparam \CONTROL_UNIT|M2R[0]~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X36_Y8_N19 +dffeas \PC|pc[8]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\Add0~61_sumout ), + .asdata(vcc), + .clrn(!\rst[0]~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\PC|pc[8]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \PC|pc[8]~DUPLICATE .is_wysiwyg = "true"; +defparam \PC|pc[8]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X35_Y8_N0 +cyclonev_lcell_comb \ROM|mem~4 ( +// Equation(s): +// \ROM|mem~4_combout = ( !\PC|pc [5] & ( !\PC|pc[4]~DUPLICATE_q ) ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(!\PC|pc[4]~DUPLICATE_q ), + .datae(gnd), + .dataf(!\PC|pc [5]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\ROM|mem~4_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \ROM|mem~4 .extended_lut = "off"; +defparam \ROM|mem~4 .lut_mask = 64'hFF00FF0000000000; +defparam \ROM|mem~4 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X35_Y7_N3 +cyclonev_lcell_comb \ROM|mem~5 ( +// Equation(s): +// \ROM|mem~5_combout = ( !\PC|pc [5] & ( \PC|pc [2] & ( !\PC|pc [4] ) ) ) # ( \PC|pc [5] & ( !\PC|pc [2] & ( (\PC|pc [4] & \PC|pc[3]~DUPLICATE_q ) ) ) ) # ( !\PC|pc [5] & ( !\PC|pc [2] & ( (!\PC|pc [4] & \PC|pc[3]~DUPLICATE_q ) ) ) ) + + .dataa(gnd), + .datab(gnd), + .datac(!\PC|pc [4]), + .datad(!\PC|pc[3]~DUPLICATE_q ), + .datae(!\PC|pc [5]), + .dataf(!\PC|pc [2]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\ROM|mem~5_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \ROM|mem~5 .extended_lut = "off"; +defparam \ROM|mem~5 .lut_mask = 64'h00F0000FF0F00000; +defparam \ROM|mem~5 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X35_Y7_N6 +cyclonev_lcell_comb \CONTROL_UNIT|CLASSIFIER|Equal0~0 ( +// Equation(s): +// \CONTROL_UNIT|CLASSIFIER|Equal0~0_combout = ( \ROM|mem~1_combout & ( \ROM|mem~3_combout & ( (!\PC|pc[6]~DUPLICATE_q ) # ((\ROM|mem~4_combout & !\PC|pc[3]~DUPLICATE_q )) ) ) ) # ( !\ROM|mem~1_combout & ( \ROM|mem~3_combout & ( (!\PC|pc[6]~DUPLICATE_q +// & (((\ROM|mem~4_combout & \PC|pc[3]~DUPLICATE_q )) # (\ROM|mem~5_combout ))) # (\PC|pc[6]~DUPLICATE_q & (\ROM|mem~4_combout & ((!\PC|pc[3]~DUPLICATE_q )))) ) ) ) + + .dataa(!\ROM|mem~4_combout ), + .datab(!\PC|pc[6]~DUPLICATE_q ), + .datac(!\ROM|mem~5_combout ), + .datad(!\PC|pc[3]~DUPLICATE_q ), + .datae(!\ROM|mem~1_combout ), + .dataf(!\ROM|mem~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\CONTROL_UNIT|CLASSIFIER|Equal0~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \CONTROL_UNIT|CLASSIFIER|Equal0~0 .extended_lut = "off"; +defparam \CONTROL_UNIT|CLASSIFIER|Equal0~0 .lut_mask = 64'h000000001D4CDDCC; +defparam \CONTROL_UNIT|CLASSIFIER|Equal0~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X35_Y7_N27 +cyclonev_lcell_comb \CONTROL_UNIT|ALU_FN~1 ( +// Equation(s): +// \CONTROL_UNIT|ALU_FN~1_combout = ( !\CONTROL_UNIT|CLASSIFIER|Equal0~0_combout & ( (!\PC|pc[8]~DUPLICATE_q & (\ROM|mem~7_combout & !\PC|pc [9])) ) ) + + .dataa(!\PC|pc[8]~DUPLICATE_q ), + .datab(gnd), + .datac(!\ROM|mem~7_combout ), + .datad(!\PC|pc [9]), + .datae(gnd), + .dataf(!\CONTROL_UNIT|CLASSIFIER|Equal0~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\CONTROL_UNIT|ALU_FN~1_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \CONTROL_UNIT|ALU_FN~1 .extended_lut = "off"; +defparam \CONTROL_UNIT|ALU_FN~1 .lut_mask = 64'h0A000A0000000000; +defparam \CONTROL_UNIT|ALU_FN~1 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X35_Y7_N18 +cyclonev_lcell_comb \CONTROL_UNIT|B~0 ( +// Equation(s): +// \CONTROL_UNIT|B~0_combout = ( !\PC|pc [5] & ( \ROM|mem~3_combout & ( (\PC|pc[6]~DUPLICATE_q & (!\PC|pc[3]~DUPLICATE_q & !\PC|pc [4])) ) ) ) + + .dataa(gnd), + .datab(!\PC|pc[6]~DUPLICATE_q ), + .datac(!\PC|pc[3]~DUPLICATE_q ), + .datad(!\PC|pc [4]), + .datae(!\PC|pc [5]), + .dataf(!\ROM|mem~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\CONTROL_UNIT|B~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \CONTROL_UNIT|B~0 .extended_lut = "off"; +defparam \CONTROL_UNIT|B~0 .lut_mask = 64'h0000000030000000; +defparam \CONTROL_UNIT|B~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X35_Y6_N30 +cyclonev_lcell_comb \comb~4 ( +// Equation(s): +// \comb~4_combout = ( \PC|pc [4] & ( \PC|pc [2] & ( (!\PC|pc[6]~DUPLICATE_q & \ROM|mem~3_combout ) ) ) ) # ( !\PC|pc [4] & ( \PC|pc [2] & ( (\PC|pc[6]~DUPLICATE_q & (!\PC|pc[3]~DUPLICATE_q & (\ROM|mem~3_combout & !\PC|pc [5]))) ) ) ) # ( \PC|pc [4] & ( +// !\PC|pc [2] & ( (!\PC|pc[6]~DUPLICATE_q & (\ROM|mem~3_combout & (!\PC|pc[3]~DUPLICATE_q $ (!\PC|pc [5])))) ) ) ) # ( !\PC|pc [4] & ( !\PC|pc [2] & ( (\PC|pc[6]~DUPLICATE_q & (!\PC|pc[3]~DUPLICATE_q & (\ROM|mem~3_combout & !\PC|pc [5]))) ) ) ) + + .dataa(!\PC|pc[6]~DUPLICATE_q ), + .datab(!\PC|pc[3]~DUPLICATE_q ), + .datac(!\ROM|mem~3_combout ), + .datad(!\PC|pc [5]), + .datae(!\PC|pc [4]), + .dataf(!\PC|pc [2]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\comb~4_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \comb~4 .extended_lut = "off"; +defparam \comb~4 .lut_mask = 64'h0400020804000A0A; +defparam \comb~4 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X35_Y7_N12 +cyclonev_lcell_comb \comb~3 ( +// Equation(s): +// \comb~3_combout = ( \PC|pc [5] & ( \PC|pc [2] & ( (!\PC|pc[6]~DUPLICATE_q & (\ROM|mem~3_combout & ((!\PC|pc [4]) # (!\PC|pc[3]~DUPLICATE_q )))) ) ) ) # ( !\PC|pc [5] & ( \PC|pc [2] & ( (!\PC|pc [4] & (!\PC|pc[6]~DUPLICATE_q & (!\PC|pc[3]~DUPLICATE_q +// & \ROM|mem~3_combout ))) ) ) ) # ( !\PC|pc [5] & ( !\PC|pc [2] & ( (!\PC|pc[6]~DUPLICATE_q & (\ROM|mem~3_combout & ((\PC|pc[3]~DUPLICATE_q ) # (\PC|pc [4])))) ) ) ) + + .dataa(!\PC|pc [4]), + .datab(!\PC|pc[6]~DUPLICATE_q ), + .datac(!\PC|pc[3]~DUPLICATE_q ), + .datad(!\ROM|mem~3_combout ), + .datae(!\PC|pc [5]), + .dataf(!\PC|pc [2]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\comb~3_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \comb~3 .extended_lut = "off"; +defparam \comb~3 .lut_mask = 64'h004C0000008000C8; +defparam \comb~3 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X30_Y9_N30 +cyclonev_lcell_comb \REGS|Decoder0~1 ( +// Equation(s): +// \REGS|Decoder0~1_combout = ( !\comb~3_combout & ( !\comb~4_combout ) ) + + .dataa(gnd), + .datab(gnd), + .datac(!\comb~4_combout ), + .datad(gnd), + .datae(gnd), + .dataf(!\comb~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Decoder0~1_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Decoder0~1 .extended_lut = "off"; +defparam \REGS|Decoder0~1 .lut_mask = 64'hF0F0F0F000000000; +defparam \REGS|Decoder0~1 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X31_Y10_N48 +cyclonev_lcell_comb \CONTROL_UNIT|RW[0] ( +// Equation(s): +// \CONTROL_UNIT|RW [0] = ( \CONTROL_UNIT|CLASSIFIER|Equal0~0_combout & ( (!\ROM|mem~0_combout ) # (!\ROM|mem~1_combout $ (\ROM|mem~2_combout )) ) ) + + .dataa(!\ROM|mem~1_combout ), + .datab(!\ROM|mem~2_combout ), + .datac(!\ROM|mem~0_combout ), + .datad(gnd), + .datae(gnd), + .dataf(!\CONTROL_UNIT|CLASSIFIER|Equal0~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\CONTROL_UNIT|RW [0]), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \CONTROL_UNIT|RW[0] .extended_lut = "off"; +defparam \CONTROL_UNIT|RW[0] .lut_mask = 64'h00000000F9F9F9F9; +defparam \CONTROL_UNIT|RW[0] .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X35_Y8_N9 +cyclonev_lcell_comb \ROM|mem~11 ( +// Equation(s): +// \ROM|mem~11_combout = ( \PC|pc[4]~DUPLICATE_q & ( (!\PC|pc[3]~DUPLICATE_q & !\PC|pc[6]~DUPLICATE_q ) ) ) # ( !\PC|pc[4]~DUPLICATE_q & ( (\PC|pc [2] & (!\PC|pc[5]~DUPLICATE_q & (!\PC|pc[3]~DUPLICATE_q $ (!\PC|pc[6]~DUPLICATE_q )))) ) ) + + .dataa(!\PC|pc[3]~DUPLICATE_q ), + .datab(!\PC|pc[6]~DUPLICATE_q ), + .datac(!\PC|pc [2]), + .datad(!\PC|pc[5]~DUPLICATE_q ), + .datae(gnd), + .dataf(!\PC|pc[4]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\ROM|mem~11_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \ROM|mem~11 .extended_lut = "off"; +defparam \ROM|mem~11 .lut_mask = 64'h0600060088888888; +defparam \ROM|mem~11 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X36_Y8_N4 +dffeas \PC|pc[3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\Add0~21_sumout ), + .asdata(vcc), + .clrn(!\rst[0]~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\PC|pc [3]), + .prn(vcc)); +// synopsys translate_off +defparam \PC|pc[3] .is_wysiwyg = "true"; +defparam \PC|pc[3] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X33_Y8_N39 +cyclonev_lcell_comb \ROM|mem~19 ( +// Equation(s): +// \ROM|mem~19_combout = ( !\PC|pc[5]~DUPLICATE_q & ( \PC|pc [6] & ( (!\PC|pc[4]~DUPLICATE_q & !\PC|pc [3]) ) ) ) # ( \PC|pc[5]~DUPLICATE_q & ( !\PC|pc [6] & ( (\PC|pc [3] & ((!\PC|pc[4]~DUPLICATE_q ) # (\PC|pc [2]))) ) ) ) # ( !\PC|pc[5]~DUPLICATE_q & +// ( !\PC|pc [6] & ( (\PC|pc[4]~DUPLICATE_q & (!\PC|pc [3] $ (\PC|pc [2]))) ) ) ) + + .dataa(!\PC|pc[4]~DUPLICATE_q ), + .datab(gnd), + .datac(!\PC|pc [3]), + .datad(!\PC|pc [2]), + .datae(!\PC|pc[5]~DUPLICATE_q ), + .dataf(!\PC|pc [6]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\ROM|mem~19_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \ROM|mem~19 .extended_lut = "off"; +defparam \ROM|mem~19 .lut_mask = 64'h50050A0FA0A00000; +defparam \ROM|mem~19 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X35_Y6_N54 +cyclonev_lcell_comb \comb~2 ( +// Equation(s): +// \comb~2_combout = ( \ROM|mem~3_combout & ( (!\CONTROL_UNIT|CLASSIFIER|Equal0~0_combout & ((\ROM|mem~19_combout ))) # (\CONTROL_UNIT|CLASSIFIER|Equal0~0_combout & (\ROM|mem~11_combout )) ) ) + + .dataa(!\ROM|mem~11_combout ), + .datab(!\CONTROL_UNIT|CLASSIFIER|Equal0~0_combout ), + .datac(!\ROM|mem~19_combout ), + .datad(gnd), + .datae(!\ROM|mem~3_combout ), + .dataf(gnd), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\comb~2_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \comb~2 .extended_lut = "off"; +defparam \comb~2 .lut_mask = 64'h00001D1D00001D1D; +defparam \comb~2 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X38_Y9_N39 +cyclonev_lcell_comb \comb~0 ( +// Equation(s): +// \comb~0_combout = (!\PC|pc[8]~DUPLICATE_q & (!\PC|pc [9] & !\CONTROL_UNIT|CLASSIFIER|Equal0~0_combout )) + + .dataa(!\PC|pc[8]~DUPLICATE_q ), + .datab(gnd), + .datac(!\PC|pc [9]), + .datad(!\CONTROL_UNIT|CLASSIFIER|Equal0~0_combout ), + .datae(gnd), + .dataf(gnd), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\comb~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \comb~0 .extended_lut = "off"; +defparam \comb~0 .lut_mask = 64'hA000A000A000A000; +defparam \comb~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X31_Y10_N42 +cyclonev_lcell_comb \ROM|mem~18 ( +// Equation(s): +// \ROM|mem~18_combout = ( \PC|pc[3]~DUPLICATE_q & ( !\PC|pc [7] & ( (!\PC|pc [6] & (\PC|pc [5] & ((!\PC|pc[4]~DUPLICATE_q ) # (\PC|pc [2])))) ) ) ) # ( !\PC|pc[3]~DUPLICATE_q & ( !\PC|pc [7] & ( (!\PC|pc [6] & ((\PC|pc [5]))) # (\PC|pc [6] & +// (!\PC|pc[4]~DUPLICATE_q & !\PC|pc [5])) ) ) ) + + .dataa(!\PC|pc [2]), + .datab(!\PC|pc[4]~DUPLICATE_q ), + .datac(!\PC|pc [6]), + .datad(!\PC|pc [5]), + .datae(!\PC|pc[3]~DUPLICATE_q ), + .dataf(!\PC|pc [7]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\ROM|mem~18_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \ROM|mem~18 .extended_lut = "off"; +defparam \ROM|mem~18 .lut_mask = 64'h0CF000D000000000; +defparam \ROM|mem~18 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X31_Y10_N0 +cyclonev_lcell_comb \ROM|mem~24 ( +// Equation(s): +// \ROM|mem~24_combout = ( \PC|pc[3]~DUPLICATE_q & ( \PC|pc [5] ) ) # ( !\PC|pc[3]~DUPLICATE_q & ( \PC|pc [5] ) ) # ( \PC|pc[3]~DUPLICATE_q & ( !\PC|pc [5] & ( (!\PC|pc [2]) # (((!\PC|pc[4]~DUPLICATE_q ) # (\PC|pc [6])) # (\PC|pc [7])) ) ) ) # ( +// !\PC|pc[3]~DUPLICATE_q & ( !\PC|pc [5] & ( ((!\PC|pc [6] & (\PC|pc [2] & !\PC|pc[4]~DUPLICATE_q )) # (\PC|pc [6] & ((\PC|pc[4]~DUPLICATE_q )))) # (\PC|pc [7]) ) ) ) + + .dataa(!\PC|pc [2]), + .datab(!\PC|pc [7]), + .datac(!\PC|pc [6]), + .datad(!\PC|pc[4]~DUPLICATE_q ), + .datae(!\PC|pc[3]~DUPLICATE_q ), + .dataf(!\PC|pc [5]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\ROM|mem~24_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \ROM|mem~24 .extended_lut = "off"; +defparam \ROM|mem~24 .lut_mask = 64'h733FFFBFFFFFFFFF; +defparam \ROM|mem~24 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y12_N39 +cyclonev_lcell_comb \comb~1 ( +// Equation(s): +// \comb~1_combout = ( \comb~0_combout & ( (!\ROM|mem~24_combout ) # ((\CONTROL_UNIT|CLASSIFIER|Equal0~0_combout & \ROM|mem~0_combout )) ) ) # ( !\comb~0_combout & ( (\CONTROL_UNIT|CLASSIFIER|Equal0~0_combout & \ROM|mem~0_combout ) ) ) + + .dataa(!\CONTROL_UNIT|CLASSIFIER|Equal0~0_combout ), + .datab(!\ROM|mem~0_combout ), + .datac(!\ROM|mem~24_combout ), + .datad(gnd), + .datae(!\comb~0_combout ), + .dataf(gnd), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\comb~1_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \comb~1 .extended_lut = "off"; +defparam \comb~1 .lut_mask = 64'h1111F1F11111F1F1; +defparam \comb~1 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X28_Y10_N39 +cyclonev_lcell_comb \REGS|Decoder0~23 ( +// Equation(s): +// \REGS|Decoder0~23_combout = ( \comb~1_combout & ( (!\ROM|mem~9_combout & ((!\comb~0_combout ) # (!\ROM|mem~18_combout ))) ) ) + + .dataa(gnd), + .datab(!\ROM|mem~9_combout ), + .datac(!\comb~0_combout ), + .datad(!\ROM|mem~18_combout ), + .datae(gnd), + .dataf(!\comb~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Decoder0~23_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Decoder0~23 .extended_lut = "off"; +defparam \REGS|Decoder0~23 .lut_mask = 64'h00000000CCC0CCC0; +defparam \REGS|Decoder0~23 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X28_Y12_N30 +cyclonev_lcell_comb \REGS|Decoder0~24 ( +// Equation(s): +// \REGS|Decoder0~24_combout = ( !\comb~2_combout & ( \REGS|Decoder0~23_combout & ( (\REGS|Decoder0~1_combout & !\CONTROL_UNIT|RW [0]) ) ) ) + + .dataa(!\REGS|Decoder0~1_combout ), + .datab(gnd), + .datac(!\CONTROL_UNIT|RW [0]), + .datad(gnd), + .datae(!\comb~2_combout ), + .dataf(!\REGS|Decoder0~23_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Decoder0~24_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Decoder0~24 .extended_lut = "off"; +defparam \REGS|Decoder0~24 .lut_mask = 64'h0000000050500000; +defparam \REGS|Decoder0~24 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X31_Y9_N5 +dffeas \REGS|regs[8][30]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[30]~453_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~24_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[8][30]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[8][30]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[8][30]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X35_Y8_N36 +cyclonev_lcell_comb \ROM|mem~14 ( +// Equation(s): +// \ROM|mem~14_combout = ( \PC|pc[4]~DUPLICATE_q & ( (!\PC|pc[6]~DUPLICATE_q & ((!\PC|pc[5]~DUPLICATE_q & ((\PC|pc[3]~DUPLICATE_q ))) # (\PC|pc[5]~DUPLICATE_q & ((!\PC|pc[3]~DUPLICATE_q ) # (\PC|pc[2]~DUPLICATE_q ))))) ) ) # ( !\PC|pc[4]~DUPLICATE_q & +// ( (!\PC|pc[5]~DUPLICATE_q & (\PC|pc[6]~DUPLICATE_q & !\PC|pc[3]~DUPLICATE_q )) # (\PC|pc[5]~DUPLICATE_q & (!\PC|pc[6]~DUPLICATE_q )) ) ) + + .dataa(!\PC|pc[5]~DUPLICATE_q ), + .datab(!\PC|pc[6]~DUPLICATE_q ), + .datac(!\PC|pc[2]~DUPLICATE_q ), + .datad(!\PC|pc[3]~DUPLICATE_q ), + .datae(gnd), + .dataf(!\PC|pc[4]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\ROM|mem~14_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \ROM|mem~14 .extended_lut = "off"; +defparam \ROM|mem~14 .lut_mask = 64'h66446644448C448C; +defparam \ROM|mem~14 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X35_Y8_N51 +cyclonev_lcell_comb \rt_alu[17]~11 ( +// Equation(s): +// \rt_alu[17]~11_combout = ( \ROM|mem~11_combout & ( \ROM|mem~3_combout ) ) # ( !\ROM|mem~11_combout & ( (\ROM|mem~3_combout & \ROM|mem~14_combout ) ) ) + + .dataa(gnd), + .datab(gnd), + .datac(!\ROM|mem~3_combout ), + .datad(!\ROM|mem~14_combout ), + .datae(gnd), + .dataf(!\ROM|mem~11_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[17]~11_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[17]~11 .extended_lut = "off"; +defparam \rt_alu[17]~11 .lut_mask = 64'h000F000F0F0F0F0F; +defparam \rt_alu[17]~11 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X35_Y8_N21 +cyclonev_lcell_comb \ROM|mem~10 ( +// Equation(s): +// \ROM|mem~10_combout = ( \PC|pc [5] & ( (\PC|pc[4]~DUPLICATE_q & ((!\PC|pc[3]~DUPLICATE_q ) # (!\PC|pc[2]~DUPLICATE_q ))) ) ) # ( !\PC|pc [5] & ( (!\PC|pc[3]~DUPLICATE_q & ((!\PC|pc[2]~DUPLICATE_q ))) # (\PC|pc[3]~DUPLICATE_q & (!\PC|pc[4]~DUPLICATE_q +// & \PC|pc[2]~DUPLICATE_q )) ) ) + + .dataa(!\PC|pc[3]~DUPLICATE_q ), + .datab(gnd), + .datac(!\PC|pc[4]~DUPLICATE_q ), + .datad(!\PC|pc[2]~DUPLICATE_q ), + .datae(gnd), + .dataf(!\PC|pc [5]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\ROM|mem~10_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \ROM|mem~10 .extended_lut = "off"; +defparam \ROM|mem~10 .lut_mask = 64'hAA50AA500F0A0F0A; +defparam \ROM|mem~10 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X35_Y8_N27 +cyclonev_lcell_comb \rt_alu[17]~10 ( +// Equation(s): +// \rt_alu[17]~10_combout = ( \ROM|mem~10_combout & ( (\ROM|mem~11_combout & (\ROM|mem~3_combout & !\ROM|mem~14_combout )) ) ) # ( !\ROM|mem~10_combout & ( (\ROM|mem~3_combout & (!\ROM|mem~14_combout & ((!\PC|pc[6]~DUPLICATE_q ) # (\ROM|mem~11_combout +// )))) ) ) + + .dataa(!\PC|pc[6]~DUPLICATE_q ), + .datab(!\ROM|mem~11_combout ), + .datac(!\ROM|mem~3_combout ), + .datad(!\ROM|mem~14_combout ), + .datae(gnd), + .dataf(!\ROM|mem~10_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[17]~10_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[17]~10 .extended_lut = "off"; +defparam \rt_alu[17]~10 .lut_mask = 64'h0B000B0003000300; +defparam \rt_alu[17]~10 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X35_Y8_N24 +cyclonev_lcell_comb \CONTROL_UNIT|CLASSIFIER|Equal0~1 ( +// Equation(s): +// \CONTROL_UNIT|CLASSIFIER|Equal0~1_combout = ( \ROM|mem~2_combout & ( \ROM|mem~0_combout ) ) # ( !\ROM|mem~2_combout & ( (\ROM|mem~0_combout & \ROM|mem~1_combout ) ) ) + + .dataa(gnd), + .datab(gnd), + .datac(!\ROM|mem~0_combout ), + .datad(!\ROM|mem~1_combout ), + .datae(gnd), + .dataf(!\ROM|mem~2_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \CONTROL_UNIT|CLASSIFIER|Equal0~1 .extended_lut = "off"; +defparam \CONTROL_UNIT|CLASSIFIER|Equal0~1 .lut_mask = 64'h000F000F0F0F0F0F; +defparam \CONTROL_UNIT|CLASSIFIER|Equal0~1 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X35_Y8_N57 +cyclonev_lcell_comb \rt_alu[31]~39 ( +// Equation(s): +// \rt_alu[31]~39_combout = ( !\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout & ( ((!\rt_alu[17]~11_combout & !\rt_alu[17]~10_combout )) # (\ROM|mem~9_combout ) ) ) + + .dataa(!\ROM|mem~9_combout ), + .datab(!\rt_alu[17]~11_combout ), + .datac(!\rt_alu[17]~10_combout ), + .datad(gnd), + .datae(gnd), + .dataf(!\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[31]~39_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[31]~39 .extended_lut = "off"; +defparam \rt_alu[31]~39 .lut_mask = 64'hD5D5D5D500000000; +defparam \rt_alu[31]~39 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X35_Y8_N18 +cyclonev_lcell_comb \rt_alu[31]~40 ( +// Equation(s): +// \rt_alu[31]~40_combout = ( !\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout & ( ((\rt_alu[17]~10_combout ) # (\ROM|mem~9_combout )) # (\rt_alu[17]~11_combout ) ) ) + + .dataa(gnd), + .datab(!\rt_alu[17]~11_combout ), + .datac(!\ROM|mem~9_combout ), + .datad(!\rt_alu[17]~10_combout ), + .datae(gnd), + .dataf(!\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[31]~40_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[31]~40 .extended_lut = "off"; +defparam \rt_alu[31]~40 .lut_mask = 64'h3FFF3FFF00000000; +defparam \rt_alu[31]~40 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X35_Y8_N48 +cyclonev_lcell_comb \rt_alu[17]~4 ( +// Equation(s): +// \rt_alu[17]~4_combout = ( \ROM|mem~11_combout & ( (\ROM|mem~3_combout & (((\ROM|mem~14_combout ) # (\ROM|mem~10_combout )) # (\PC|pc[6]~DUPLICATE_q ))) ) ) # ( !\ROM|mem~11_combout & ( (\ROM|mem~3_combout & \ROM|mem~14_combout ) ) ) + + .dataa(!\PC|pc[6]~DUPLICATE_q ), + .datab(!\ROM|mem~3_combout ), + .datac(!\ROM|mem~10_combout ), + .datad(!\ROM|mem~14_combout ), + .datae(gnd), + .dataf(!\ROM|mem~11_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[17]~4_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[17]~4 .extended_lut = "off"; +defparam \rt_alu[17]~4 .lut_mask = 64'h0033003313331333; +defparam \rt_alu[17]~4 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X28_Y10_N12 +cyclonev_lcell_comb \REGS|Decoder0~3 ( +// Equation(s): +// \REGS|Decoder0~3_combout = ( \comb~1_combout & ( (!\CONTROL_UNIT|RW [0] & (((\comb~0_combout & \ROM|mem~18_combout )) # (\ROM|mem~9_combout ))) ) ) + + .dataa(!\CONTROL_UNIT|RW [0]), + .datab(!\ROM|mem~9_combout ), + .datac(!\comb~0_combout ), + .datad(!\ROM|mem~18_combout ), + .datae(gnd), + .dataf(!\comb~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Decoder0~3_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Decoder0~3 .extended_lut = "off"; +defparam \REGS|Decoder0~3 .lut_mask = 64'h00000000222A222A; +defparam \REGS|Decoder0~3 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X28_Y10_N9 +cyclonev_lcell_comb \REGS|Decoder0~12 ( +// Equation(s): +// \REGS|Decoder0~12_combout = ( \comb~3_combout & ( \REGS|Decoder0~3_combout ) ) + + .dataa(gnd), + .datab(!\REGS|Decoder0~3_combout ), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\comb~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Decoder0~12_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Decoder0~12 .extended_lut = "off"; +defparam \REGS|Decoder0~12 .lut_mask = 64'h0000000033333333; +defparam \REGS|Decoder0~12 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X28_Y10_N15 +cyclonev_lcell_comb \REGS|Decoder0~15 ( +// Equation(s): +// \REGS|Decoder0~15_combout = ( !\comb~4_combout & ( (\REGS|Decoder0~12_combout & \comb~2_combout ) ) ) + + .dataa(gnd), + .datab(gnd), + .datac(!\REGS|Decoder0~12_combout ), + .datad(!\comb~2_combout ), + .datae(gnd), + .dataf(!\comb~4_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Decoder0~15_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Decoder0~15 .extended_lut = "off"; +defparam \REGS|Decoder0~15 .lut_mask = 64'h000F000F00000000; +defparam \REGS|Decoder0~15 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X32_Y5_N20 +dffeas \REGS|regs[27][30] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[30]~453_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~15_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[27][30]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[27][30] .is_wysiwyg = "true"; +defparam \REGS|regs[27][30] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X27_Y11_N21 +cyclonev_lcell_comb \REGS|Decoder0~0 ( +// Equation(s): +// \REGS|Decoder0~0_combout = ( \comb~0_combout & ( !\CONTROL_UNIT|RW [0] & ( (!\comb~1_combout & ((\ROM|mem~18_combout ) # (\ROM|mem~9_combout ))) ) ) ) # ( !\comb~0_combout & ( !\CONTROL_UNIT|RW [0] & ( (\ROM|mem~9_combout & !\comb~1_combout ) ) ) ) + + .dataa(!\ROM|mem~9_combout ), + .datab(!\ROM|mem~18_combout ), + .datac(!\comb~1_combout ), + .datad(gnd), + .datae(!\comb~0_combout ), + .dataf(!\CONTROL_UNIT|RW [0]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Decoder0~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Decoder0~0 .extended_lut = "off"; +defparam \REGS|Decoder0~0 .lut_mask = 64'h5050707000000000; +defparam \REGS|Decoder0~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X28_Y12_N51 +cyclonev_lcell_comb \REGS|Decoder0~14 ( +// Equation(s): +// \REGS|Decoder0~14_combout = ( \REGS|Decoder0~0_combout & ( (!\comb~4_combout & (\comb~3_combout & \comb~2_combout )) ) ) + + .dataa(!\comb~4_combout ), + .datab(!\comb~3_combout ), + .datac(gnd), + .datad(!\comb~2_combout ), + .datae(gnd), + .dataf(!\REGS|Decoder0~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Decoder0~14_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Decoder0~14 .extended_lut = "off"; +defparam \REGS|Decoder0~14 .lut_mask = 64'h0000000000220022; +defparam \REGS|Decoder0~14 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X32_Y5_N5 +dffeas \REGS|regs[19][30]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[30]~453_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~14_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[19][30]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[19][30]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[19][30]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y5_N42 +cyclonev_lcell_comb \REGS|Mux33~3 ( +// Equation(s): +// \REGS|Mux33~3_combout = ( \REGS|regs[19][30]~DUPLICATE_q & ( \ROM|mem~0_combout & ( \REGS|regs[27][30]~q ) ) ) # ( !\REGS|regs[19][30]~DUPLICATE_q & ( \ROM|mem~0_combout & ( \REGS|regs[27][30]~q ) ) ) # ( \REGS|regs[19][30]~DUPLICATE_q & ( +// !\ROM|mem~0_combout ) ) + + .dataa(gnd), + .datab(gnd), + .datac(!\REGS|regs[27][30]~q ), + .datad(gnd), + .datae(!\REGS|regs[19][30]~DUPLICATE_q ), + .dataf(!\ROM|mem~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux33~3_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux33~3 .extended_lut = "off"; +defparam \REGS|Mux33~3 .lut_mask = 64'h0000FFFF0F0F0F0F; +defparam \REGS|Mux33~3 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X35_Y8_N30 +cyclonev_lcell_comb \rt_alu[17]~5 ( +// Equation(s): +// \rt_alu[17]~5_combout = ( \ROM|mem~11_combout & ( (\ROM|mem~3_combout & !\ROM|mem~14_combout ) ) ) + + .dataa(gnd), + .datab(!\ROM|mem~3_combout ), + .datac(!\ROM|mem~14_combout ), + .datad(gnd), + .datae(gnd), + .dataf(!\ROM|mem~11_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[17]~5_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[17]~5 .extended_lut = "off"; +defparam \rt_alu[17]~5 .lut_mask = 64'h0000000030303030; +defparam \rt_alu[17]~5 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X35_Y8_N54 +cyclonev_lcell_comb \ROM|mem~13 ( +// Equation(s): +// \ROM|mem~13_combout = ( \ROM|mem~0_combout & ( !\ROM|mem~10_combout ) ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(!\ROM|mem~10_combout ), + .datae(gnd), + .dataf(!\ROM|mem~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\ROM|mem~13_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \ROM|mem~13 .extended_lut = "off"; +defparam \ROM|mem~13 .lut_mask = 64'h00000000FF00FF00; +defparam \ROM|mem~13 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X25_Y9_N27 +cyclonev_lcell_comb \REGS|Decoder0~19 ( +// Equation(s): +// \REGS|Decoder0~19_combout = ( \comb~2_combout & ( \REGS|Decoder0~12_combout & ( \comb~4_combout ) ) ) + + .dataa(!\comb~4_combout ), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(!\comb~2_combout ), + .dataf(!\REGS|Decoder0~12_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Decoder0~19_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Decoder0~19 .extended_lut = "off"; +defparam \REGS|Decoder0~19 .lut_mask = 64'h0000000000005555; +defparam \REGS|Decoder0~19 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X27_Y9_N44 +dffeas \REGS|regs[31][30] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[30]~453_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~19_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[31][30]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[31][30] .is_wysiwyg = "true"; +defparam \REGS|regs[31][30] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X28_Y12_N48 +cyclonev_lcell_comb \REGS|Decoder0~18 ( +// Equation(s): +// \REGS|Decoder0~18_combout = ( \REGS|Decoder0~0_combout & ( (\comb~4_combout & (\comb~3_combout & \comb~2_combout )) ) ) + + .dataa(!\comb~4_combout ), + .datab(!\comb~3_combout ), + .datac(!\comb~2_combout ), + .datad(gnd), + .datae(gnd), + .dataf(!\REGS|Decoder0~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Decoder0~18_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Decoder0~18 .extended_lut = "off"; +defparam \REGS|Decoder0~18 .lut_mask = 64'h0000000001010101; +defparam \REGS|Decoder0~18 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X27_Y9_N53 +dffeas \REGS|regs[23][30] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[30]~453_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~18_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[23][30]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[23][30] .is_wysiwyg = "true"; +defparam \REGS|regs[23][30] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X27_Y9_N39 +cyclonev_lcell_comb \REGS|Mux33~4 ( +// Equation(s): +// \REGS|Mux33~4_combout = ( \ROM|mem~0_combout & ( \REGS|regs[31][30]~q ) ) # ( !\ROM|mem~0_combout & ( \REGS|regs[23][30]~q ) ) + + .dataa(gnd), + .datab(gnd), + .datac(!\REGS|regs[31][30]~q ), + .datad(!\REGS|regs[23][30]~q ), + .datae(gnd), + .dataf(!\ROM|mem~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux33~4_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux33~4 .extended_lut = "off"; +defparam \REGS|Mux33~4 .lut_mask = 64'h00FF00FF0F0F0F0F; +defparam \REGS|Mux33~4 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X28_Y10_N54 +cyclonev_lcell_comb \REGS|Decoder0~8 ( +// Equation(s): +// \REGS|Decoder0~8_combout = ( !\comb~3_combout & ( (\comb~4_combout & (\REGS|Decoder0~3_combout & !\comb~2_combout )) ) ) + + .dataa(!\comb~4_combout ), + .datab(!\REGS|Decoder0~3_combout ), + .datac(!\comb~2_combout ), + .datad(gnd), + .datae(gnd), + .dataf(!\comb~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Decoder0~8_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Decoder0~8 .extended_lut = "off"; +defparam \REGS|Decoder0~8 .lut_mask = 64'h1010101000000000; +defparam \REGS|Decoder0~8 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X23_Y10_N46 +dffeas \REGS|regs[28][30] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[30]~453_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~8_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[28][30]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[28][30] .is_wysiwyg = "true"; +defparam \REGS|regs[28][30] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X28_Y10_N48 +cyclonev_lcell_comb \REGS|Decoder0~17 ( +// Equation(s): +// \REGS|Decoder0~17_combout = ( \REGS|Decoder0~12_combout & ( (!\comb~2_combout & \comb~4_combout ) ) ) + + .dataa(!\comb~2_combout ), + .datab(gnd), + .datac(!\comb~4_combout ), + .datad(gnd), + .datae(gnd), + .dataf(!\REGS|Decoder0~12_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Decoder0~17_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Decoder0~17 .extended_lut = "off"; +defparam \REGS|Decoder0~17 .lut_mask = 64'h000000000A0A0A0A; +defparam \REGS|Decoder0~17 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X31_Y9_N14 +dffeas \REGS|regs[29][30] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[30]~453_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~17_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[29][30]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[29][30] .is_wysiwyg = "true"; +defparam \REGS|regs[29][30] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X28_Y12_N24 +cyclonev_lcell_comb \REGS|Decoder0~7 ( +// Equation(s): +// \REGS|Decoder0~7_combout = ( \REGS|Decoder0~0_combout & ( (\comb~4_combout & (!\comb~3_combout & !\comb~2_combout )) ) ) + + .dataa(!\comb~4_combout ), + .datab(!\comb~3_combout ), + .datac(!\comb~2_combout ), + .datad(gnd), + .datae(gnd), + .dataf(!\REGS|Decoder0~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Decoder0~7_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Decoder0~7 .extended_lut = "off"; +defparam \REGS|Decoder0~7 .lut_mask = 64'h0000000040404040; +defparam \REGS|Decoder0~7 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X31_Y10_N46 +dffeas \REGS|regs[20][30] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[30]~453_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~7_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[20][30]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[20][30] .is_wysiwyg = "true"; +defparam \REGS|regs[20][30] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X31_Y9_N57 +cyclonev_lcell_comb \rt_alu[30]~257 ( +// Equation(s): +// \rt_alu[30]~257_combout = ( \REGS|regs[20][30]~q & ( (!\ROM|mem~0_combout ) # ((!\ROM|mem~10_combout & ((\REGS|regs[29][30]~q ))) # (\ROM|mem~10_combout & (\REGS|regs[28][30]~q ))) ) ) # ( !\REGS|regs[20][30]~q & ( (\ROM|mem~0_combout & +// ((!\ROM|mem~10_combout & ((\REGS|regs[29][30]~q ))) # (\ROM|mem~10_combout & (\REGS|regs[28][30]~q )))) ) ) + + .dataa(!\REGS|regs[28][30]~q ), + .datab(!\ROM|mem~0_combout ), + .datac(!\REGS|regs[29][30]~q ), + .datad(!\ROM|mem~10_combout ), + .datae(gnd), + .dataf(!\REGS|regs[20][30]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[30]~257_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[30]~257 .extended_lut = "off"; +defparam \rt_alu[30]~257 .lut_mask = 64'h03110311CFDDCFDD; +defparam \rt_alu[30]~257 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X35_Y8_N39 +cyclonev_lcell_comb \ROM|mem~12 ( +// Equation(s): +// \ROM|mem~12_combout = ( \ROM|mem~11_combout & ( \ROM|mem~3_combout ) ) + + .dataa(gnd), + .datab(gnd), + .datac(!\ROM|mem~3_combout ), + .datad(gnd), + .datae(gnd), + .dataf(!\ROM|mem~11_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\ROM|mem~12_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \ROM|mem~12 .extended_lut = "off"; +defparam \ROM|mem~12 .lut_mask = 64'h000000000F0F0F0F; +defparam \ROM|mem~12 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X28_Y12_N27 +cyclonev_lcell_comb \REGS|Decoder0~9 ( +// Equation(s): +// \REGS|Decoder0~9_combout = ( \REGS|Decoder0~0_combout & ( (\comb~4_combout & (!\comb~3_combout & \comb~2_combout )) ) ) + + .dataa(!\comb~4_combout ), + .datab(!\comb~3_combout ), + .datac(gnd), + .datad(!\comb~2_combout ), + .datae(gnd), + .dataf(!\REGS|Decoder0~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Decoder0~9_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Decoder0~9 .extended_lut = "off"; +defparam \REGS|Decoder0~9 .lut_mask = 64'h0000000000440044; +defparam \REGS|Decoder0~9 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X27_Y5_N55 +dffeas \REGS|regs[22][30] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[30]~453_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~9_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[22][30]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[22][30] .is_wysiwyg = "true"; +defparam \REGS|regs[22][30] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X31_Y5_N15 +cyclonev_lcell_comb \REGS|regs[30][30]~feeder ( +// Equation(s): +// \REGS|regs[30][30]~feeder_combout = ( \rd[30]~453_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[30]~453_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[30][30]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[30][30]~feeder .extended_lut = "off"; +defparam \REGS|regs[30][30]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[30][30]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X28_Y10_N57 +cyclonev_lcell_comb \REGS|Decoder0~10 ( +// Equation(s): +// \REGS|Decoder0~10_combout = ( \comb~2_combout & ( (\comb~4_combout & (\REGS|Decoder0~3_combout & !\comb~3_combout )) ) ) + + .dataa(!\comb~4_combout ), + .datab(!\REGS|Decoder0~3_combout ), + .datac(!\comb~3_combout ), + .datad(gnd), + .datae(gnd), + .dataf(!\comb~2_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Decoder0~10_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Decoder0~10 .extended_lut = "off"; +defparam \REGS|Decoder0~10 .lut_mask = 64'h0000000010101010; +defparam \REGS|Decoder0~10 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X31_Y5_N17 +dffeas \REGS|regs[30][30] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[30][30]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~10_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[30][30]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[30][30] .is_wysiwyg = "true"; +defparam \REGS|regs[30][30] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X31_Y5_N30 +cyclonev_lcell_comb \REGS|Mux33~5 ( +// Equation(s): +// \REGS|Mux33~5_combout = ( \ROM|mem~0_combout & ( \REGS|regs[30][30]~q ) ) # ( !\ROM|mem~0_combout & ( \REGS|regs[30][30]~q & ( \REGS|regs[22][30]~q ) ) ) # ( !\ROM|mem~0_combout & ( !\REGS|regs[30][30]~q & ( \REGS|regs[22][30]~q ) ) ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(!\REGS|regs[22][30]~q ), + .datae(!\ROM|mem~0_combout ), + .dataf(!\REGS|regs[30][30]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux33~5_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux33~5 .extended_lut = "off"; +defparam \REGS|Mux33~5 .lut_mask = 64'h00FF000000FFFFFF; +defparam \REGS|Mux33~5 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X31_Y9_N0 +cyclonev_lcell_comb \rt_alu[30]~258 ( +// Equation(s): +// \rt_alu[30]~258_combout = ( \ROM|mem~12_combout & ( \REGS|Mux33~5_combout & ( (!\ROM|mem~13_combout ) # (\REGS|Mux33~4_combout ) ) ) ) # ( !\ROM|mem~12_combout & ( \REGS|Mux33~5_combout & ( \rt_alu[30]~257_combout ) ) ) # ( \ROM|mem~12_combout & ( +// !\REGS|Mux33~5_combout & ( (\ROM|mem~13_combout & \REGS|Mux33~4_combout ) ) ) ) # ( !\ROM|mem~12_combout & ( !\REGS|Mux33~5_combout & ( \rt_alu[30]~257_combout ) ) ) + + .dataa(gnd), + .datab(!\ROM|mem~13_combout ), + .datac(!\REGS|Mux33~4_combout ), + .datad(!\rt_alu[30]~257_combout ), + .datae(!\ROM|mem~12_combout ), + .dataf(!\REGS|Mux33~5_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[30]~258_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[30]~258 .extended_lut = "off"; +defparam \rt_alu[30]~258 .lut_mask = 64'h00FF030300FFCFCF; +defparam \rt_alu[30]~258 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X28_Y10_N6 +cyclonev_lcell_comb \REGS|Decoder0~4 ( +// Equation(s): +// \REGS|Decoder0~4_combout = (\REGS|Decoder0~3_combout & (!\comb~2_combout & \REGS|Decoder0~1_combout )) + + .dataa(gnd), + .datab(!\REGS|Decoder0~3_combout ), + .datac(!\comb~2_combout ), + .datad(!\REGS|Decoder0~1_combout ), + .datae(gnd), + .dataf(gnd), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Decoder0~4_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Decoder0~4 .extended_lut = "off"; +defparam \REGS|Decoder0~4 .lut_mask = 64'h0030003000300030; +defparam \REGS|Decoder0~4 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X27_Y10_N49 +dffeas \REGS|regs[24][30] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[30]~453_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~4_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[24][30]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[24][30] .is_wysiwyg = "true"; +defparam \REGS|regs[24][30] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X28_Y10_N18 +cyclonev_lcell_comb \REGS|Decoder0~13 ( +// Equation(s): +// \REGS|Decoder0~13_combout = ( \REGS|Decoder0~12_combout & ( (!\comb~2_combout & !\comb~4_combout ) ) ) + + .dataa(!\comb~2_combout ), + .datab(gnd), + .datac(!\comb~4_combout ), + .datad(gnd), + .datae(gnd), + .dataf(!\REGS|Decoder0~12_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Decoder0~13_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Decoder0~13 .extended_lut = "off"; +defparam \REGS|Decoder0~13 .lut_mask = 64'h00000000A0A0A0A0; +defparam \REGS|Decoder0~13 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X30_Y10_N53 +dffeas \REGS|regs[25][30] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[30]~453_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~13_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[25][30]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[25][30] .is_wysiwyg = "true"; +defparam \REGS|regs[25][30] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X22_Y9_N0 +cyclonev_lcell_comb \REGS|regs[16][30]~feeder ( +// Equation(s): +// \REGS|regs[16][30]~feeder_combout = ( \rd[30]~453_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[30]~453_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[16][30]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[16][30]~feeder .extended_lut = "off"; +defparam \REGS|regs[16][30]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[16][30]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X28_Y12_N42 +cyclonev_lcell_comb \REGS|Decoder0~2 ( +// Equation(s): +// \REGS|Decoder0~2_combout = ( \REGS|Decoder0~1_combout & ( (!\comb~2_combout & \REGS|Decoder0~0_combout ) ) ) + + .dataa(!\comb~2_combout ), + .datab(!\REGS|Decoder0~0_combout ), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\REGS|Decoder0~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Decoder0~2_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Decoder0~2 .extended_lut = "off"; +defparam \REGS|Decoder0~2 .lut_mask = 64'h0000000022222222; +defparam \REGS|Decoder0~2 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X22_Y9_N1 +dffeas \REGS|regs[16][30] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[16][30]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~2_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[16][30]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[16][30] .is_wysiwyg = "true"; +defparam \REGS|regs[16][30] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X30_Y10_N48 +cyclonev_lcell_comb \rt_alu[30]~259 ( +// Equation(s): +// \rt_alu[30]~259_combout = ( \ROM|mem~10_combout & ( \ROM|mem~0_combout & ( \REGS|regs[24][30]~q ) ) ) # ( !\ROM|mem~10_combout & ( \ROM|mem~0_combout & ( \REGS|regs[25][30]~q ) ) ) # ( \ROM|mem~10_combout & ( !\ROM|mem~0_combout & ( +// \REGS|regs[16][30]~q ) ) ) # ( !\ROM|mem~10_combout & ( !\ROM|mem~0_combout & ( \REGS|regs[16][30]~q ) ) ) + + .dataa(gnd), + .datab(!\REGS|regs[24][30]~q ), + .datac(!\REGS|regs[25][30]~q ), + .datad(!\REGS|regs[16][30]~q ), + .datae(!\ROM|mem~10_combout ), + .dataf(!\ROM|mem~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[30]~259_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[30]~259 .extended_lut = "off"; +defparam \rt_alu[30]~259 .lut_mask = 64'h00FF00FF0F0F3333; +defparam \rt_alu[30]~259 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X31_Y9_N36 +cyclonev_lcell_comb \rt_alu[30]~260 ( +// Equation(s): +// \rt_alu[30]~260_combout = ( \rt_alu[30]~258_combout & ( \rt_alu[30]~259_combout & ( (!\rt_alu[17]~5_combout ) # ((!\rt_alu[17]~4_combout & ((\REGS|Mux33~3_combout ))) # (\rt_alu[17]~4_combout & (\REGS|Mux33~2_combout ))) ) ) ) # ( +// !\rt_alu[30]~258_combout & ( \rt_alu[30]~259_combout & ( (!\rt_alu[17]~4_combout & (((!\rt_alu[17]~5_combout ) # (\REGS|Mux33~3_combout )))) # (\rt_alu[17]~4_combout & (\REGS|Mux33~2_combout & ((\rt_alu[17]~5_combout )))) ) ) ) # ( +// \rt_alu[30]~258_combout & ( !\rt_alu[30]~259_combout & ( (!\rt_alu[17]~4_combout & (((\REGS|Mux33~3_combout & \rt_alu[17]~5_combout )))) # (\rt_alu[17]~4_combout & (((!\rt_alu[17]~5_combout )) # (\REGS|Mux33~2_combout ))) ) ) ) # ( +// !\rt_alu[30]~258_combout & ( !\rt_alu[30]~259_combout & ( (\rt_alu[17]~5_combout & ((!\rt_alu[17]~4_combout & ((\REGS|Mux33~3_combout ))) # (\rt_alu[17]~4_combout & (\REGS|Mux33~2_combout )))) ) ) ) + + .dataa(!\REGS|Mux33~2_combout ), + .datab(!\rt_alu[17]~4_combout ), + .datac(!\REGS|Mux33~3_combout ), + .datad(!\rt_alu[17]~5_combout ), + .datae(!\rt_alu[30]~258_combout ), + .dataf(!\rt_alu[30]~259_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[30]~260_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[30]~260 .extended_lut = "off"; +defparam \rt_alu[30]~260 .lut_mask = 64'h001D331DCC1DFF1D; +defparam \rt_alu[30]~260 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X28_Y12_N3 +cyclonev_lcell_comb \REGS|Decoder0~29 ( +// Equation(s): +// \REGS|Decoder0~29_combout = ( !\comb~2_combout & ( (!\comb~4_combout & (\REGS|Decoder0~23_combout & (\comb~3_combout & !\CONTROL_UNIT|RW [0]))) ) ) + + .dataa(!\comb~4_combout ), + .datab(!\REGS|Decoder0~23_combout ), + .datac(!\comb~3_combout ), + .datad(!\CONTROL_UNIT|RW [0]), + .datae(!\comb~2_combout ), + .dataf(gnd), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Decoder0~29_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Decoder0~29 .extended_lut = "off"; +defparam \REGS|Decoder0~29 .lut_mask = 64'h0200000002000000; +defparam \REGS|Decoder0~29 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X31_Y9_N23 +dffeas \REGS|regs[9][30]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[30]~453_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~29_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[9][30]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[9][30]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[9][30]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X27_Y11_N48 +cyclonev_lcell_comb \REGS|Decoder0~20 ( +// Equation(s): +// \REGS|Decoder0~20_combout = ( \comb~0_combout & ( !\comb~1_combout & ( (!\ROM|mem~18_combout & !\ROM|mem~9_combout ) ) ) ) # ( !\comb~0_combout & ( !\comb~1_combout & ( !\ROM|mem~9_combout ) ) ) + + .dataa(gnd), + .datab(!\ROM|mem~18_combout ), + .datac(!\ROM|mem~9_combout ), + .datad(gnd), + .datae(!\comb~0_combout ), + .dataf(!\comb~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Decoder0~20_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Decoder0~20 .extended_lut = "off"; +defparam \REGS|Decoder0~20 .lut_mask = 64'hF0F0C0C000000000; +defparam \REGS|Decoder0~20 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X25_Y9_N15 +cyclonev_lcell_comb \REGS|Decoder0~27 ( +// Equation(s): +// \REGS|Decoder0~27_combout = ( \REGS|Decoder0~20_combout & ( (!\comb~4_combout & (\comb~3_combout & !\CONTROL_UNIT|RW [0])) ) ) + + .dataa(!\comb~4_combout ), + .datab(gnd), + .datac(!\comb~3_combout ), + .datad(!\CONTROL_UNIT|RW [0]), + .datae(gnd), + .dataf(!\REGS|Decoder0~20_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Decoder0~27_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Decoder0~27 .extended_lut = "off"; +defparam \REGS|Decoder0~27 .lut_mask = 64'h000000000A000A00; +defparam \REGS|Decoder0~27 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X25_Y9_N12 +cyclonev_lcell_comb \REGS|Decoder0~28 ( +// Equation(s): +// \REGS|Decoder0~28_combout = ( \REGS|Decoder0~27_combout & ( !\comb~2_combout ) ) + + .dataa(gnd), + .datab(gnd), + .datac(!\comb~2_combout ), + .datad(gnd), + .datae(gnd), + .dataf(!\REGS|Decoder0~27_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Decoder0~28_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Decoder0~28 .extended_lut = "off"; +defparam \REGS|Decoder0~28 .lut_mask = 64'h00000000F0F0F0F0; +defparam \REGS|Decoder0~28 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X30_Y7_N58 +dffeas \REGS|regs[1][30]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[30]~453_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~28_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[1][30]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[1][30]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[1][30]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X25_Y9_N30 +cyclonev_lcell_comb \REGS|Decoder0~21 ( +// Equation(s): +// \REGS|Decoder0~21_combout = ( !\CONTROL_UNIT|RW [0] & ( \REGS|Decoder0~20_combout & ( \comb~4_combout ) ) ) + + .dataa(gnd), + .datab(gnd), + .datac(!\comb~4_combout ), + .datad(gnd), + .datae(!\CONTROL_UNIT|RW [0]), + .dataf(!\REGS|Decoder0~20_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Decoder0~21_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Decoder0~21 .extended_lut = "off"; +defparam \REGS|Decoder0~21 .lut_mask = 64'h000000000F0F0000; +defparam \REGS|Decoder0~21 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X27_Y12_N3 +cyclonev_lcell_comb \REGS|Decoder0~30 ( +// Equation(s): +// \REGS|Decoder0~30_combout = ( !\comb~2_combout & ( \REGS|Decoder0~21_combout & ( \comb~3_combout ) ) ) + + .dataa(gnd), + .datab(gnd), + .datac(!\comb~3_combout ), + .datad(gnd), + .datae(!\comb~2_combout ), + .dataf(!\REGS|Decoder0~21_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Decoder0~30_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Decoder0~30 .extended_lut = "off"; +defparam \REGS|Decoder0~30 .lut_mask = 64'h000000000F0F0000; +defparam \REGS|Decoder0~30 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X27_Y8_N2 +dffeas \REGS|regs[5][30] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[30]~453_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~30_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[5][30]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[5][30] .is_wysiwyg = "true"; +defparam \REGS|regs[5][30] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X28_Y10_N30 +cyclonev_lcell_comb \REGS|Decoder0~25 ( +// Equation(s): +// \REGS|Decoder0~25_combout = ( \comb~4_combout & ( (!\CONTROL_UNIT|RW [0] & \REGS|Decoder0~23_combout ) ) ) + + .dataa(!\CONTROL_UNIT|RW [0]), + .datab(!\REGS|Decoder0~23_combout ), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\comb~4_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Decoder0~25_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Decoder0~25 .extended_lut = "off"; +defparam \REGS|Decoder0~25 .lut_mask = 64'h0000000022222222; +defparam \REGS|Decoder0~25 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X28_Y10_N36 +cyclonev_lcell_comb \REGS|Decoder0~31 ( +// Equation(s): +// \REGS|Decoder0~31_combout = ( \comb~3_combout & ( (!\comb~2_combout & \REGS|Decoder0~25_combout ) ) ) + + .dataa(!\comb~2_combout ), + .datab(gnd), + .datac(!\REGS|Decoder0~25_combout ), + .datad(gnd), + .datae(gnd), + .dataf(!\comb~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Decoder0~31_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Decoder0~31 .extended_lut = "off"; +defparam \REGS|Decoder0~31 .lut_mask = 64'h000000000A0A0A0A; +defparam \REGS|Decoder0~31 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X27_Y8_N41 +dffeas \REGS|regs[13][30] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[30]~453_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~31_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[13][30]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[13][30] .is_wysiwyg = "true"; +defparam \REGS|regs[13][30] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X30_Y9_N9 +cyclonev_lcell_comb \REGS|Mux33~0 ( +// Equation(s): +// \REGS|Mux33~0_combout = ( \REGS|regs[13][30]~q & ( \PC|pc[9]~DUPLICATE_q & ( \REGS|regs[5][30]~q ) ) ) # ( !\REGS|regs[13][30]~q & ( \PC|pc[9]~DUPLICATE_q & ( \REGS|regs[5][30]~q ) ) ) # ( \REGS|regs[13][30]~q & ( !\PC|pc[9]~DUPLICATE_q & ( +// ((!\PC|pc[6]~DUPLICATE_q & (!\PC|pc [7] & !\PC|pc[8]~DUPLICATE_q ))) # (\REGS|regs[5][30]~q ) ) ) ) # ( !\REGS|regs[13][30]~q & ( !\PC|pc[9]~DUPLICATE_q & ( (\REGS|regs[5][30]~q & (((\PC|pc[8]~DUPLICATE_q ) # (\PC|pc [7])) # (\PC|pc[6]~DUPLICATE_q ))) +// ) ) ) + + .dataa(!\PC|pc[6]~DUPLICATE_q ), + .datab(!\REGS|regs[5][30]~q ), + .datac(!\PC|pc [7]), + .datad(!\PC|pc[8]~DUPLICATE_q ), + .datae(!\REGS|regs[13][30]~q ), + .dataf(!\PC|pc[9]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux33~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux33~0 .extended_lut = "off"; +defparam \REGS|Mux33~0 .lut_mask = 64'h1333B33333333333; +defparam \REGS|Mux33~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X25_Y9_N0 +cyclonev_lcell_comb \REGS|Decoder0~22 ( +// Equation(s): +// \REGS|Decoder0~22_combout = ( \REGS|Decoder0~21_combout & ( (!\comb~2_combout & !\comb~3_combout ) ) ) + + .dataa(!\comb~2_combout ), + .datab(!\comb~3_combout ), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\REGS|Decoder0~21_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Decoder0~22_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Decoder0~22 .extended_lut = "off"; +defparam \REGS|Decoder0~22 .lut_mask = 64'h0000000088888888; +defparam \REGS|Decoder0~22 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X27_Y8_N22 +dffeas \REGS|regs[4][30] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[30]~453_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~22_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[4][30]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[4][30] .is_wysiwyg = "true"; +defparam \REGS|regs[4][30] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X25_Y9_N42 +cyclonev_lcell_comb \REGS|Decoder0~26 ( +// Equation(s): +// \REGS|Decoder0~26_combout = ( !\comb~2_combout & ( \REGS|Decoder0~25_combout & ( !\comb~3_combout ) ) ) + + .dataa(gnd), + .datab(!\comb~3_combout ), + .datac(gnd), + .datad(gnd), + .datae(!\comb~2_combout ), + .dataf(!\REGS|Decoder0~25_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Decoder0~26_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Decoder0~26 .extended_lut = "off"; +defparam \REGS|Decoder0~26 .lut_mask = 64'h00000000CCCC0000; +defparam \REGS|Decoder0~26 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X25_Y9_N8 +dffeas \REGS|regs[12][30]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[30]~453_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~26_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[12][30]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[12][30]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[12][30]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X25_Y9_N57 +cyclonev_lcell_comb \REGS|Mux33~1 ( +// Equation(s): +// \REGS|Mux33~1_combout = ( \PC|pc[6]~DUPLICATE_q & ( \PC|pc[7]~DUPLICATE_q & ( \REGS|regs[4][30]~q ) ) ) # ( !\PC|pc[6]~DUPLICATE_q & ( \PC|pc[7]~DUPLICATE_q & ( \REGS|regs[4][30]~q ) ) ) # ( \PC|pc[6]~DUPLICATE_q & ( !\PC|pc[7]~DUPLICATE_q & ( +// \REGS|regs[4][30]~q ) ) ) # ( !\PC|pc[6]~DUPLICATE_q & ( !\PC|pc[7]~DUPLICATE_q & ( (!\PC|pc [9] & ((!\PC|pc[8]~DUPLICATE_q & ((\REGS|regs[12][30]~DUPLICATE_q ))) # (\PC|pc[8]~DUPLICATE_q & (\REGS|regs[4][30]~q )))) # (\PC|pc [9] & +// (\REGS|regs[4][30]~q )) ) ) ) + + .dataa(!\REGS|regs[4][30]~q ), + .datab(!\REGS|regs[12][30]~DUPLICATE_q ), + .datac(!\PC|pc [9]), + .datad(!\PC|pc[8]~DUPLICATE_q ), + .datae(!\PC|pc[6]~DUPLICATE_q ), + .dataf(!\PC|pc[7]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux33~1_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux33~1 .extended_lut = "off"; +defparam \REGS|Mux33~1 .lut_mask = 64'h3555555555555555; +defparam \REGS|Mux33~1 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X31_Y9_N15 +cyclonev_lcell_comb \rt_alu[30]~254 ( +// Equation(s): +// \rt_alu[30]~254_combout = ( \ROM|mem~10_combout & ( \REGS|Mux33~1_combout ) ) # ( !\ROM|mem~10_combout & ( \REGS|Mux33~1_combout & ( (!\ROM|mem~0_combout ) # (\REGS|Mux33~0_combout ) ) ) ) # ( !\ROM|mem~10_combout & ( !\REGS|Mux33~1_combout & ( +// (\REGS|Mux33~0_combout & \ROM|mem~0_combout ) ) ) ) + + .dataa(gnd), + .datab(!\REGS|Mux33~0_combout ), + .datac(!\ROM|mem~0_combout ), + .datad(gnd), + .datae(!\ROM|mem~10_combout ), + .dataf(!\REGS|Mux33~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[30]~254_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[30]~254 .extended_lut = "off"; +defparam \rt_alu[30]~254 .lut_mask = 64'h03030000F3F3FFFF; +defparam \rt_alu[30]~254 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X28_Y10_N21 +cyclonev_lcell_comb \REGS|Decoder0~32 ( +// Equation(s): +// \REGS|Decoder0~32_combout = ( \REGS|Decoder0~20_combout & ( (\comb~2_combout & (!\CONTROL_UNIT|RW [0] & \REGS|Decoder0~1_combout )) ) ) + + .dataa(!\comb~2_combout ), + .datab(!\CONTROL_UNIT|RW [0]), + .datac(!\REGS|Decoder0~1_combout ), + .datad(gnd), + .datae(gnd), + .dataf(!\REGS|Decoder0~20_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Decoder0~32_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Decoder0~32 .extended_lut = "off"; +defparam \REGS|Decoder0~32 .lut_mask = 64'h0000000004040404; +defparam \REGS|Decoder0~32 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X30_Y9_N53 +dffeas \REGS|regs[2][30] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[30]~453_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~32_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[2][30]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[2][30] .is_wysiwyg = "true"; +defparam \REGS|regs[2][30] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X28_Y10_N33 +cyclonev_lcell_comb \REGS|Decoder0~33 ( +// Equation(s): +// \REGS|Decoder0~33_combout = ( \comb~2_combout & ( (!\CONTROL_UNIT|RW [0] & (\REGS|Decoder0~23_combout & \REGS|Decoder0~1_combout )) ) ) + + .dataa(!\CONTROL_UNIT|RW [0]), + .datab(!\REGS|Decoder0~23_combout ), + .datac(!\REGS|Decoder0~1_combout ), + .datad(gnd), + .datae(gnd), + .dataf(!\comb~2_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Decoder0~33_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Decoder0~33 .extended_lut = "off"; +defparam \REGS|Decoder0~33 .lut_mask = 64'h0000000002020202; +defparam \REGS|Decoder0~33 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X30_Y9_N2 +dffeas \REGS|regs[10][30] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[30]~453_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~33_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[10][30]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[10][30] .is_wysiwyg = "true"; +defparam \REGS|regs[10][30] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X28_Y12_N6 +cyclonev_lcell_comb \REGS|Decoder0~37 ( +// Equation(s): +// \REGS|Decoder0~37_combout = ( !\CONTROL_UNIT|RW [0] & ( \REGS|Decoder0~23_combout & ( (\comb~2_combout & (\comb~3_combout & !\comb~4_combout )) ) ) ) + + .dataa(!\comb~2_combout ), + .datab(!\comb~3_combout ), + .datac(!\comb~4_combout ), + .datad(gnd), + .datae(!\CONTROL_UNIT|RW [0]), + .dataf(!\REGS|Decoder0~23_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Decoder0~37_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Decoder0~37 .extended_lut = "off"; +defparam \REGS|Decoder0~37 .lut_mask = 64'h0000000010100000; +defparam \REGS|Decoder0~37 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X30_Y9_N23 +dffeas \REGS|regs[11][30] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[30]~453_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~37_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[11][30]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[11][30] .is_wysiwyg = "true"; +defparam \REGS|regs[11][30] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X30_Y9_N21 +cyclonev_lcell_comb \rt_alu[30]~252 ( +// Equation(s): +// \rt_alu[30]~252_combout = ( \REGS|regs[11][30]~q & ( \ROM|mem~0_combout & ( (!\ROM|mem~10_combout ) # (\REGS|regs[10][30]~q ) ) ) ) # ( !\REGS|regs[11][30]~q & ( \ROM|mem~0_combout & ( (\ROM|mem~10_combout & \REGS|regs[10][30]~q ) ) ) ) # ( +// \REGS|regs[11][30]~q & ( !\ROM|mem~0_combout & ( \REGS|regs[2][30]~q ) ) ) # ( !\REGS|regs[11][30]~q & ( !\ROM|mem~0_combout & ( \REGS|regs[2][30]~q ) ) ) + + .dataa(!\REGS|regs[2][30]~q ), + .datab(gnd), + .datac(!\ROM|mem~10_combout ), + .datad(!\REGS|regs[10][30]~q ), + .datae(!\REGS|regs[11][30]~q ), + .dataf(!\ROM|mem~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[30]~252_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[30]~252 .extended_lut = "off"; +defparam \rt_alu[30]~252 .lut_mask = 64'h55555555000FF0FF; +defparam \rt_alu[30]~252 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X30_Y6_N12 +cyclonev_lcell_comb \REGS|Decoder0~39 ( +// Equation(s): +// \REGS|Decoder0~39_combout = ( \REGS|Decoder0~25_combout & ( (\comb~3_combout & \comb~2_combout ) ) ) + + .dataa(!\comb~3_combout ), + .datab(!\comb~2_combout ), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\REGS|Decoder0~25_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Decoder0~39_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Decoder0~39 .extended_lut = "off"; +defparam \REGS|Decoder0~39 .lut_mask = 64'h0000000011111111; +defparam \REGS|Decoder0~39 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X32_Y6_N59 +dffeas \REGS|regs[15][30] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[30]~453_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~39_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[15][30]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[15][30] .is_wysiwyg = "true"; +defparam \REGS|regs[15][30] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X30_Y6_N15 +cyclonev_lcell_comb \REGS|Decoder0~35 ( +// Equation(s): +// \REGS|Decoder0~35_combout = ( \REGS|Decoder0~25_combout & ( (!\comb~3_combout & \comb~2_combout ) ) ) + + .dataa(!\comb~3_combout ), + .datab(!\comb~2_combout ), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\REGS|Decoder0~25_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Decoder0~35_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Decoder0~35 .extended_lut = "off"; +defparam \REGS|Decoder0~35 .lut_mask = 64'h0000000022222222; +defparam \REGS|Decoder0~35 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X28_Y6_N40 +dffeas \REGS|regs[14][30] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[30]~453_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~35_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[14][30]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[14][30] .is_wysiwyg = "true"; +defparam \REGS|regs[14][30] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X25_Y9_N3 +cyclonev_lcell_comb \REGS|Decoder0~34 ( +// Equation(s): +// \REGS|Decoder0~34_combout = ( \REGS|Decoder0~21_combout & ( (\comb~2_combout & !\comb~3_combout ) ) ) + + .dataa(!\comb~2_combout ), + .datab(!\comb~3_combout ), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\REGS|Decoder0~21_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Decoder0~34_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Decoder0~34 .extended_lut = "off"; +defparam \REGS|Decoder0~34 .lut_mask = 64'h0000000044444444; +defparam \REGS|Decoder0~34 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X32_Y6_N47 +dffeas \REGS|regs[6][30] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[30]~453_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~34_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[6][30]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[6][30] .is_wysiwyg = "true"; +defparam \REGS|regs[6][30] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y6_N6 +cyclonev_lcell_comb \rt_alu[30]~253 ( +// Equation(s): +// \rt_alu[30]~253_combout = ( \REGS|regs[6][30]~q & ( (!\ROM|mem~0_combout ) # ((!\ROM|mem~10_combout & (\REGS|regs[15][30]~q )) # (\ROM|mem~10_combout & ((\REGS|regs[14][30]~q )))) ) ) # ( !\REGS|regs[6][30]~q & ( (\ROM|mem~0_combout & +// ((!\ROM|mem~10_combout & (\REGS|regs[15][30]~q )) # (\ROM|mem~10_combout & ((\REGS|regs[14][30]~q ))))) ) ) + + .dataa(!\ROM|mem~10_combout ), + .datab(!\REGS|regs[15][30]~q ), + .datac(!\REGS|regs[14][30]~q ), + .datad(!\ROM|mem~0_combout ), + .datae(!\REGS|regs[6][30]~q ), + .dataf(gnd), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[30]~253_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[30]~253 .extended_lut = "off"; +defparam \rt_alu[30]~253 .lut_mask = 64'h0027FF270027FF27; +defparam \rt_alu[30]~253 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X31_Y9_N18 +cyclonev_lcell_comb \rt_alu[30]~255 ( +// Equation(s): +// \rt_alu[30]~255_combout = ( \rt_alu[30]~252_combout & ( \rt_alu[30]~253_combout & ( ((\rt_alu[30]~254_combout ) # (\ROM|mem~12_combout )) # (\rt_alu[17]~10_combout ) ) ) ) # ( !\rt_alu[30]~252_combout & ( \rt_alu[30]~253_combout & ( +// (!\rt_alu[17]~10_combout & ((\rt_alu[30]~254_combout ) # (\ROM|mem~12_combout ))) ) ) ) # ( \rt_alu[30]~252_combout & ( !\rt_alu[30]~253_combout & ( ((!\ROM|mem~12_combout & \rt_alu[30]~254_combout )) # (\rt_alu[17]~10_combout ) ) ) ) # ( +// !\rt_alu[30]~252_combout & ( !\rt_alu[30]~253_combout & ( (!\rt_alu[17]~10_combout & (!\ROM|mem~12_combout & \rt_alu[30]~254_combout )) ) ) ) + + .dataa(gnd), + .datab(!\rt_alu[17]~10_combout ), + .datac(!\ROM|mem~12_combout ), + .datad(!\rt_alu[30]~254_combout ), + .datae(!\rt_alu[30]~252_combout ), + .dataf(!\rt_alu[30]~253_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[30]~255_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[30]~255 .extended_lut = "off"; +defparam \rt_alu[30]~255 .lut_mask = 64'h00C033F30CCC3FFF; +defparam \rt_alu[30]~255 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X31_Y9_N48 +cyclonev_lcell_comb \rt_alu[30]~256 ( +// Equation(s): +// \rt_alu[30]~256_combout = ( \rt_alu[30]~255_combout & ( ((!\ROM|mem~0_combout & ((\REGS|regs[1][30]~DUPLICATE_q ))) # (\ROM|mem~0_combout & (\REGS|regs[9][30]~DUPLICATE_q ))) # (\rt_alu[17]~11_combout ) ) ) # ( !\rt_alu[30]~255_combout & ( +// (!\rt_alu[17]~11_combout & ((!\ROM|mem~0_combout & ((\REGS|regs[1][30]~DUPLICATE_q ))) # (\ROM|mem~0_combout & (\REGS|regs[9][30]~DUPLICATE_q )))) ) ) + + .dataa(!\REGS|regs[9][30]~DUPLICATE_q ), + .datab(!\ROM|mem~0_combout ), + .datac(!\REGS|regs[1][30]~DUPLICATE_q ), + .datad(!\rt_alu[17]~11_combout ), + .datae(gnd), + .dataf(!\rt_alu[30]~255_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[30]~256_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[30]~256 .extended_lut = "off"; +defparam \rt_alu[30]~256 .lut_mask = 64'h1D001D001DFF1DFF; +defparam \rt_alu[30]~256 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X31_Y9_N6 +cyclonev_lcell_comb \rt_alu[30]~261 ( +// Equation(s): +// \rt_alu[30]~261_combout = ( \rt_alu[30]~260_combout & ( \rt_alu[30]~256_combout & ( ((\REGS|regs[8][30]~DUPLICATE_q & (\rt_alu[31]~39_combout & \ROM|mem~0_combout ))) # (\rt_alu[31]~40_combout ) ) ) ) # ( !\rt_alu[30]~260_combout & ( +// \rt_alu[30]~256_combout & ( (!\rt_alu[31]~39_combout & (((\rt_alu[31]~40_combout )))) # (\rt_alu[31]~39_combout & (\REGS|regs[8][30]~DUPLICATE_q & (!\rt_alu[31]~40_combout & \ROM|mem~0_combout ))) ) ) ) # ( \rt_alu[30]~260_combout & ( +// !\rt_alu[30]~256_combout & ( (\rt_alu[31]~39_combout & (((\REGS|regs[8][30]~DUPLICATE_q & \ROM|mem~0_combout )) # (\rt_alu[31]~40_combout ))) ) ) ) # ( !\rt_alu[30]~260_combout & ( !\rt_alu[30]~256_combout & ( (\REGS|regs[8][30]~DUPLICATE_q & +// (\rt_alu[31]~39_combout & (!\rt_alu[31]~40_combout & \ROM|mem~0_combout ))) ) ) ) + + .dataa(!\REGS|regs[8][30]~DUPLICATE_q ), + .datab(!\rt_alu[31]~39_combout ), + .datac(!\rt_alu[31]~40_combout ), + .datad(!\ROM|mem~0_combout ), + .datae(!\rt_alu[30]~260_combout ), + .dataf(!\rt_alu[30]~256_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[30]~261_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[30]~261 .extended_lut = "off"; +defparam \rt_alu[30]~261 .lut_mask = 64'h001003130C1C0F1F; +defparam \rt_alu[30]~261 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X35_Y7_N48 +cyclonev_lcell_comb \CONTROL_UNIT|ALU_FN[1] ( +// Equation(s): +// \CONTROL_UNIT|ALU_FN [1] = ( \CONTROL_UNIT|CLASSIFIER|Equal0~0_combout & ( !\CONTROL_UNIT|B~0_combout ) ) # ( !\CONTROL_UNIT|CLASSIFIER|Equal0~0_combout & ( !\CONTROL_UNIT|B~0_combout & ( ((!\ROM|mem~7_combout ) # (\PC|pc[8]~DUPLICATE_q )) # (\PC|pc +// [9]) ) ) ) + + .dataa(!\PC|pc [9]), + .datab(gnd), + .datac(!\PC|pc[8]~DUPLICATE_q ), + .datad(!\ROM|mem~7_combout ), + .datae(!\CONTROL_UNIT|CLASSIFIER|Equal0~0_combout ), + .dataf(!\CONTROL_UNIT|B~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\CONTROL_UNIT|ALU_FN [1]), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \CONTROL_UNIT|ALU_FN[1] .extended_lut = "off"; +defparam \CONTROL_UNIT|ALU_FN[1] .lut_mask = 64'hFF5FFFFF00000000; +defparam \CONTROL_UNIT|ALU_FN[1] .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X38_Y9_N15 +cyclonev_lcell_comb \CONTROL_UNIT|ALU_FN~0 ( +// Equation(s): +// \CONTROL_UNIT|ALU_FN~0_combout = ( \ROM|mem~1_combout & ( (\ROM|mem~0_combout & (!\ROM|mem~2_combout & \ROM|mem~5_combout )) ) ) + + .dataa(!\ROM|mem~0_combout ), + .datab(!\ROM|mem~2_combout ), + .datac(gnd), + .datad(!\ROM|mem~5_combout ), + .datae(gnd), + .dataf(!\ROM|mem~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\CONTROL_UNIT|ALU_FN~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \CONTROL_UNIT|ALU_FN~0 .extended_lut = "off"; +defparam \CONTROL_UNIT|ALU_FN~0 .lut_mask = 64'h0000000000440044; +defparam \CONTROL_UNIT|ALU_FN~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X38_Y9_N36 +cyclonev_lcell_comb \CONTROL_UNIT|ALU_FN[0] ( +// Equation(s): +// \CONTROL_UNIT|ALU_FN [0] = ( !\CONTROL_UNIT|ALU_FN~0_combout & ( (((!\ROM|mem~8_combout ) # (\CONTROL_UNIT|CLASSIFIER|Equal0~0_combout )) # (\PC|pc [9])) # (\PC|pc[8]~DUPLICATE_q ) ) ) + + .dataa(!\PC|pc[8]~DUPLICATE_q ), + .datab(!\PC|pc [9]), + .datac(!\CONTROL_UNIT|CLASSIFIER|Equal0~0_combout ), + .datad(!\ROM|mem~8_combout ), + .datae(gnd), + .dataf(!\CONTROL_UNIT|ALU_FN~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\CONTROL_UNIT|ALU_FN [0]), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \CONTROL_UNIT|ALU_FN[0] .extended_lut = "off"; +defparam \CONTROL_UNIT|ALU_FN[0] .lut_mask = 64'hFF7FFF7F00000000; +defparam \CONTROL_UNIT|ALU_FN[0] .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X38_Y9_N30 +cyclonev_lcell_comb \ALU|Mux15~0 ( +// Equation(s): +// \ALU|Mux15~0_combout = ( \comb~0_combout & ( (!\ROM|mem~6_combout & (\ROM|mem~25_combout & ((!\CONTROL_UNIT|ALU_FN [0]) # (\CONTROL_UNIT|ALU_FN [1])))) ) ) + + .dataa(!\ROM|mem~6_combout ), + .datab(!\ROM|mem~25_combout ), + .datac(!\CONTROL_UNIT|ALU_FN [1]), + .datad(!\CONTROL_UNIT|ALU_FN [0]), + .datae(gnd), + .dataf(!\comb~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\ALU|Mux15~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \ALU|Mux15~0 .extended_lut = "off"; +defparam \ALU|Mux15~0 .lut_mask = 64'h0000000022022202; +defparam \ALU|Mux15~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X38_Y9_N33 +cyclonev_lcell_comb \ALU|Mux29~1 ( +// Equation(s): +// \ALU|Mux29~1_combout = ( !\CONTROL_UNIT|ALU_FN [1] & ( (!\ROM|mem~6_combout & (\ROM|mem~25_combout & (\comb~0_combout & \CONTROL_UNIT|ALU_FN [0]))) ) ) + + .dataa(!\ROM|mem~6_combout ), + .datab(!\ROM|mem~25_combout ), + .datac(!\comb~0_combout ), + .datad(!\CONTROL_UNIT|ALU_FN [0]), + .datae(gnd), + .dataf(!\CONTROL_UNIT|ALU_FN [1]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\ALU|Mux29~1_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \ALU|Mux29~1 .extended_lut = "off"; +defparam \ALU|Mux29~1 .lut_mask = 64'h0002000200000000; +defparam \ALU|Mux29~1 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X28_Y7_N5 +dffeas \REGS|regs[25][29] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[29]~451_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~13_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[25][29]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[25][29] .is_wysiwyg = "true"; +defparam \REGS|regs[25][29] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X28_Y10_N43 +dffeas \REGS|regs[24][29] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[29]~451_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~4_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[24][29]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[24][29] .is_wysiwyg = "true"; +defparam \REGS|regs[24][29] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X28_Y9_N50 +dffeas \REGS|regs[16][29] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[29]~451_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~2_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[16][29]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[16][29] .is_wysiwyg = "true"; +defparam \REGS|regs[16][29] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X28_Y7_N54 +cyclonev_lcell_comb \rt_alu[29]~238 ( +// Equation(s): +// \rt_alu[29]~238_combout = ( \REGS|regs[16][29]~q & ( \ROM|mem~10_combout & ( (!\ROM|mem~0_combout ) # (\REGS|regs[24][29]~q ) ) ) ) # ( !\REGS|regs[16][29]~q & ( \ROM|mem~10_combout & ( (\ROM|mem~0_combout & \REGS|regs[24][29]~q ) ) ) ) # ( +// \REGS|regs[16][29]~q & ( !\ROM|mem~10_combout & ( (!\ROM|mem~0_combout ) # (\REGS|regs[25][29]~q ) ) ) ) # ( !\REGS|regs[16][29]~q & ( !\ROM|mem~10_combout & ( (\ROM|mem~0_combout & \REGS|regs[25][29]~q ) ) ) ) + + .dataa(!\ROM|mem~0_combout ), + .datab(gnd), + .datac(!\REGS|regs[25][29]~q ), + .datad(!\REGS|regs[24][29]~q ), + .datae(!\REGS|regs[16][29]~q ), + .dataf(!\ROM|mem~10_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[29]~238_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[29]~238 .extended_lut = "off"; +defparam \rt_alu[29]~238 .lut_mask = 64'h0505AFAF0055AAFF; +defparam \rt_alu[29]~238 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X32_Y5_N2 +dffeas \REGS|regs[19][29] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[29]~451_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~14_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[19][29]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[19][29] .is_wysiwyg = "true"; +defparam \REGS|regs[19][29] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X32_Y5_N35 +dffeas \REGS|regs[27][29] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[29]~451_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~15_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[27][29]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[27][29] .is_wysiwyg = "true"; +defparam \REGS|regs[27][29] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y5_N12 +cyclonev_lcell_comb \REGS|Mux34~5 ( +// Equation(s): +// \REGS|Mux34~5_combout = ( \REGS|regs[27][29]~q & ( (\REGS|regs[19][29]~q ) # (\ROM|mem~0_combout ) ) ) # ( !\REGS|regs[27][29]~q & ( (!\ROM|mem~0_combout & \REGS|regs[19][29]~q ) ) ) + + .dataa(!\ROM|mem~0_combout ), + .datab(gnd), + .datac(!\REGS|regs[19][29]~q ), + .datad(gnd), + .datae(gnd), + .dataf(!\REGS|regs[27][29]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux34~5_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux34~5 .extended_lut = "off"; +defparam \REGS|Mux34~5 .lut_mask = 64'h0A0A0A0A5F5F5F5F; +defparam \REGS|Mux34~5 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X28_Y7_N31 +dffeas \REGS|regs[31][29] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[29]~451_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~19_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[31][29]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[31][29] .is_wysiwyg = "true"; +defparam \REGS|regs[31][29] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X31_Y5_N19 +dffeas \REGS|regs[23][29] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[29]~451_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~18_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[23][29]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[23][29] .is_wysiwyg = "true"; +defparam \REGS|regs[23][29] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X31_Y5_N48 +cyclonev_lcell_comb \REGS|Mux34~3 ( +// Equation(s): +// \REGS|Mux34~3_combout = ( \PC|pc [9] & ( \PC|pc[8]~DUPLICATE_q & ( \REGS|regs[23][29]~q ) ) ) # ( !\PC|pc [9] & ( \PC|pc[8]~DUPLICATE_q & ( \REGS|regs[23][29]~q ) ) ) # ( \PC|pc [9] & ( !\PC|pc[8]~DUPLICATE_q & ( \REGS|regs[23][29]~q ) ) ) # ( +// !\PC|pc [9] & ( !\PC|pc[8]~DUPLICATE_q & ( (!\PC|pc[6]~DUPLICATE_q & ((!\PC|pc [7] & (\REGS|regs[31][29]~q )) # (\PC|pc [7] & ((\REGS|regs[23][29]~q ))))) # (\PC|pc[6]~DUPLICATE_q & (((\REGS|regs[23][29]~q )))) ) ) ) + + .dataa(!\PC|pc[6]~DUPLICATE_q ), + .datab(!\REGS|regs[31][29]~q ), + .datac(!\PC|pc [7]), + .datad(!\REGS|regs[23][29]~q ), + .datae(!\PC|pc [9]), + .dataf(!\PC|pc[8]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux34~3_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux34~3 .extended_lut = "off"; +defparam \REGS|Mux34~3 .lut_mask = 64'h207F00FF00FF00FF; +defparam \REGS|Mux34~3 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X31_Y7_N17 +dffeas \REGS|regs[29][29] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[29]~451_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~17_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[29][29]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[29][29] .is_wysiwyg = "true"; +defparam \REGS|regs[29][29] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X31_Y7_N38 +dffeas \REGS|regs[20][29] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[29]~451_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~7_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[20][29]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[20][29] .is_wysiwyg = "true"; +defparam \REGS|regs[20][29] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X31_Y7_N20 +dffeas \REGS|regs[28][29] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[29]~451_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~8_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[28][29]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[28][29] .is_wysiwyg = "true"; +defparam \REGS|regs[28][29] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X31_Y7_N3 +cyclonev_lcell_comb \rt_alu[29]~236 ( +// Equation(s): +// \rt_alu[29]~236_combout = ( \REGS|regs[28][29]~q & ( (!\ROM|mem~0_combout & (((\REGS|regs[20][29]~q )))) # (\ROM|mem~0_combout & (((\ROM|mem~10_combout )) # (\REGS|regs[29][29]~q ))) ) ) # ( !\REGS|regs[28][29]~q & ( (!\ROM|mem~0_combout & +// (((\REGS|regs[20][29]~q )))) # (\ROM|mem~0_combout & (\REGS|regs[29][29]~q & (!\ROM|mem~10_combout ))) ) ) + + .dataa(!\ROM|mem~0_combout ), + .datab(!\REGS|regs[29][29]~q ), + .datac(!\ROM|mem~10_combout ), + .datad(!\REGS|regs[20][29]~q ), + .datae(gnd), + .dataf(!\REGS|regs[28][29]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[29]~236_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[29]~236 .extended_lut = "off"; +defparam \rt_alu[29]~236 .lut_mask = 64'h10BA10BA15BF15BF; +defparam \rt_alu[29]~236 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X32_Y5_N58 +dffeas \REGS|regs[30][29] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[29]~451_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~10_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[30][29]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[30][29] .is_wysiwyg = "true"; +defparam \REGS|regs[30][29] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X31_Y4_N40 +dffeas \REGS|regs[22][29] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[29]~451_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~9_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[22][29]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[22][29] .is_wysiwyg = "true"; +defparam \REGS|regs[22][29] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y5_N57 +cyclonev_lcell_comb \REGS|Mux34~2 ( +// Equation(s): +// \REGS|Mux34~2_combout = ( \REGS|regs[30][29]~q & ( \REGS|regs[22][29]~q ) ) # ( !\REGS|regs[30][29]~q & ( \REGS|regs[22][29]~q & ( (((\PC|pc[6]~DUPLICATE_q ) # (\PC|pc [9])) # (\PC|pc[8]~DUPLICATE_q )) # (\PC|pc [7]) ) ) ) # ( \REGS|regs[30][29]~q & +// ( !\REGS|regs[22][29]~q & ( (!\PC|pc [7] & (!\PC|pc[8]~DUPLICATE_q & (!\PC|pc [9] & !\PC|pc[6]~DUPLICATE_q ))) ) ) ) + + .dataa(!\PC|pc [7]), + .datab(!\PC|pc[8]~DUPLICATE_q ), + .datac(!\PC|pc [9]), + .datad(!\PC|pc[6]~DUPLICATE_q ), + .datae(!\REGS|regs[30][29]~q ), + .dataf(!\REGS|regs[22][29]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux34~2_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux34~2 .extended_lut = "off"; +defparam \REGS|Mux34~2 .lut_mask = 64'h000080007FFFFFFF; +defparam \REGS|Mux34~2 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X31_Y7_N21 +cyclonev_lcell_comb \rt_alu[29]~237 ( +// Equation(s): +// \rt_alu[29]~237_combout = ( \rt_alu[29]~236_combout & ( \REGS|Mux34~2_combout & ( ((!\ROM|mem~12_combout ) # (!\ROM|mem~13_combout )) # (\REGS|Mux34~3_combout ) ) ) ) # ( !\rt_alu[29]~236_combout & ( \REGS|Mux34~2_combout & ( (\ROM|mem~12_combout & +// ((!\ROM|mem~13_combout ) # (\REGS|Mux34~3_combout ))) ) ) ) # ( \rt_alu[29]~236_combout & ( !\REGS|Mux34~2_combout & ( (!\ROM|mem~12_combout ) # ((\REGS|Mux34~3_combout & \ROM|mem~13_combout )) ) ) ) # ( !\rt_alu[29]~236_combout & ( +// !\REGS|Mux34~2_combout & ( (\REGS|Mux34~3_combout & (\ROM|mem~12_combout & \ROM|mem~13_combout )) ) ) ) + + .dataa(!\REGS|Mux34~3_combout ), + .datab(gnd), + .datac(!\ROM|mem~12_combout ), + .datad(!\ROM|mem~13_combout ), + .datae(!\rt_alu[29]~236_combout ), + .dataf(!\REGS|Mux34~2_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[29]~237_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[29]~237 .extended_lut = "off"; +defparam \rt_alu[29]~237 .lut_mask = 64'h0005F0F50F05FFF5; +defparam \rt_alu[29]~237 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X28_Y10_N51 +cyclonev_lcell_comb \REGS|Decoder0~6 ( +// Equation(s): +// \REGS|Decoder0~6_combout = ( \REGS|Decoder0~3_combout & ( (\comb~2_combout & \REGS|Decoder0~1_combout ) ) ) + + .dataa(!\comb~2_combout ), + .datab(gnd), + .datac(!\REGS|Decoder0~1_combout ), + .datad(gnd), + .datae(gnd), + .dataf(!\REGS|Decoder0~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Decoder0~6_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Decoder0~6 .extended_lut = "off"; +defparam \REGS|Decoder0~6 .lut_mask = 64'h0000000005050505; +defparam \REGS|Decoder0~6 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X28_Y9_N26 +dffeas \REGS|regs[26][29] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[29]~451_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~6_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[26][29]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[26][29] .is_wysiwyg = "true"; +defparam \REGS|regs[26][29] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X28_Y12_N45 +cyclonev_lcell_comb \REGS|Decoder0~5 ( +// Equation(s): +// \REGS|Decoder0~5_combout = ( \REGS|Decoder0~1_combout & ( (\comb~2_combout & \REGS|Decoder0~0_combout ) ) ) + + .dataa(!\comb~2_combout ), + .datab(gnd), + .datac(!\REGS|Decoder0~0_combout ), + .datad(gnd), + .datae(gnd), + .dataf(!\REGS|Decoder0~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Decoder0~5_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Decoder0~5 .extended_lut = "off"; +defparam \REGS|Decoder0~5 .lut_mask = 64'h0000000005050505; +defparam \REGS|Decoder0~5 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X28_Y9_N56 +dffeas \REGS|regs[18][29] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[29]~451_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~5_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[18][29]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[18][29] .is_wysiwyg = "true"; +defparam \REGS|regs[18][29] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X28_Y9_N48 +cyclonev_lcell_comb \REGS|Mux34~4 ( +// Equation(s): +// \REGS|Mux34~4_combout = ( \REGS|regs[18][29]~q & ( \ROM|mem~0_combout & ( \REGS|regs[26][29]~q ) ) ) # ( !\REGS|regs[18][29]~q & ( \ROM|mem~0_combout & ( \REGS|regs[26][29]~q ) ) ) # ( \REGS|regs[18][29]~q & ( !\ROM|mem~0_combout ) ) + + .dataa(gnd), + .datab(gnd), + .datac(!\REGS|regs[26][29]~q ), + .datad(gnd), + .datae(!\REGS|regs[18][29]~q ), + .dataf(!\ROM|mem~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux34~4_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux34~4 .extended_lut = "off"; +defparam \REGS|Mux34~4 .lut_mask = 64'h0000FFFF0F0F0F0F; +defparam \REGS|Mux34~4 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X31_Y7_N42 +cyclonev_lcell_comb \rt_alu[29]~239 ( +// Equation(s): +// \rt_alu[29]~239_combout = ( \rt_alu[29]~237_combout & ( \REGS|Mux34~4_combout & ( ((!\rt_alu[17]~5_combout & (\rt_alu[29]~238_combout )) # (\rt_alu[17]~5_combout & ((\REGS|Mux34~5_combout )))) # (\rt_alu[17]~4_combout ) ) ) ) # ( +// !\rt_alu[29]~237_combout & ( \REGS|Mux34~4_combout & ( (!\rt_alu[17]~5_combout & (\rt_alu[29]~238_combout & ((!\rt_alu[17]~4_combout )))) # (\rt_alu[17]~5_combout & (((\rt_alu[17]~4_combout ) # (\REGS|Mux34~5_combout )))) ) ) ) # ( +// \rt_alu[29]~237_combout & ( !\REGS|Mux34~4_combout & ( (!\rt_alu[17]~5_combout & (((\rt_alu[17]~4_combout )) # (\rt_alu[29]~238_combout ))) # (\rt_alu[17]~5_combout & (((\REGS|Mux34~5_combout & !\rt_alu[17]~4_combout )))) ) ) ) # ( +// !\rt_alu[29]~237_combout & ( !\REGS|Mux34~4_combout & ( (!\rt_alu[17]~4_combout & ((!\rt_alu[17]~5_combout & (\rt_alu[29]~238_combout )) # (\rt_alu[17]~5_combout & ((\REGS|Mux34~5_combout ))))) ) ) ) + + .dataa(!\rt_alu[17]~5_combout ), + .datab(!\rt_alu[29]~238_combout ), + .datac(!\REGS|Mux34~5_combout ), + .datad(!\rt_alu[17]~4_combout ), + .datae(!\rt_alu[29]~237_combout ), + .dataf(!\REGS|Mux34~4_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[29]~239_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[29]~239 .extended_lut = "off"; +defparam \rt_alu[29]~239 .lut_mask = 64'h270027AA275527FF; +defparam \rt_alu[29]~239 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X32_Y7_N20 +dffeas \REGS|regs[8][29]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[29]~451_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~24_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[8][29]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[8][29]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[8][29]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y7_N21 +cyclonev_lcell_comb \rt_alu[29]~240 ( +// Equation(s): +// \rt_alu[29]~240_combout = ( \ROM|mem~0_combout & ( \CONTROL_UNIT|CLASSIFIER|Equal0~1_combout & ( \REGS|regs[8][29]~DUPLICATE_q ) ) ) # ( \ROM|mem~0_combout & ( !\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout & ( (\REGS|regs[8][29]~DUPLICATE_q & +// (!\rt_alu[17]~10_combout & (!\ROM|mem~9_combout & !\rt_alu[17]~11_combout ))) ) ) ) + + .dataa(!\REGS|regs[8][29]~DUPLICATE_q ), + .datab(!\rt_alu[17]~10_combout ), + .datac(!\ROM|mem~9_combout ), + .datad(!\rt_alu[17]~11_combout ), + .datae(!\ROM|mem~0_combout ), + .dataf(!\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[29]~240_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[29]~240 .extended_lut = "off"; +defparam \rt_alu[29]~240 .lut_mask = 64'h0000400000005555; +defparam \rt_alu[29]~240 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X30_Y7_N50 +dffeas \REGS|regs[1][29] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[29]~451_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~28_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[1][29]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[1][29] .is_wysiwyg = "true"; +defparam \REGS|regs[1][29] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X30_Y9_N32 +dffeas \REGS|regs[11][29] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[29]~451_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~37_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[11][29]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[11][29] .is_wysiwyg = "true"; +defparam \REGS|regs[11][29] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X30_Y9_N14 +dffeas \REGS|regs[10][29] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[29]~451_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~33_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[10][29]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[10][29] .is_wysiwyg = "true"; +defparam \REGS|regs[10][29] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X30_Y9_N29 +dffeas \REGS|regs[2][29] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[29]~451_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~32_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[2][29]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[2][29] .is_wysiwyg = "true"; +defparam \REGS|regs[2][29] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X30_Y9_N33 +cyclonev_lcell_comb \rt_alu[29]~231 ( +// Equation(s): +// \rt_alu[29]~231_combout = ( \ROM|mem~0_combout & ( (!\ROM|mem~10_combout & (\REGS|regs[11][29]~q )) # (\ROM|mem~10_combout & ((\REGS|regs[10][29]~q ))) ) ) # ( !\ROM|mem~0_combout & ( \REGS|regs[2][29]~q ) ) + + .dataa(!\ROM|mem~10_combout ), + .datab(!\REGS|regs[11][29]~q ), + .datac(!\REGS|regs[10][29]~q ), + .datad(!\REGS|regs[2][29]~q ), + .datae(gnd), + .dataf(!\ROM|mem~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[29]~231_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[29]~231 .extended_lut = "off"; +defparam \rt_alu[29]~231 .lut_mask = 64'h00FF00FF27272727; +defparam \rt_alu[29]~231 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X27_Y8_N35 +dffeas \REGS|regs[13][29] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[29]~451_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~31_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[13][29]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[13][29] .is_wysiwyg = "true"; +defparam \REGS|regs[13][29] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y8_N25 +dffeas \REGS|regs[5][29] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[29]~451_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~30_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[5][29]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[5][29] .is_wysiwyg = "true"; +defparam \REGS|regs[5][29] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X27_Y8_N57 +cyclonev_lcell_comb \REGS|Mux34~1 ( +// Equation(s): +// \REGS|Mux34~1_combout = ( \PC|pc [6] & ( \PC|pc [9] & ( \REGS|regs[5][29]~q ) ) ) # ( !\PC|pc [6] & ( \PC|pc [9] & ( \REGS|regs[5][29]~q ) ) ) # ( \PC|pc [6] & ( !\PC|pc [9] & ( \REGS|regs[5][29]~q ) ) ) # ( !\PC|pc [6] & ( !\PC|pc [9] & ( +// (!\PC|pc[8]~DUPLICATE_q & ((!\PC|pc[7]~DUPLICATE_q & (\REGS|regs[13][29]~q )) # (\PC|pc[7]~DUPLICATE_q & ((\REGS|regs[5][29]~q ))))) # (\PC|pc[8]~DUPLICATE_q & (((\REGS|regs[5][29]~q )))) ) ) ) + + .dataa(!\REGS|regs[13][29]~q ), + .datab(!\REGS|regs[5][29]~q ), + .datac(!\PC|pc[8]~DUPLICATE_q ), + .datad(!\PC|pc[7]~DUPLICATE_q ), + .datae(!\PC|pc [6]), + .dataf(!\PC|pc [9]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux34~1_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux34~1 .extended_lut = "off"; +defparam \REGS|Mux34~1 .lut_mask = 64'h5333333333333333; +defparam \REGS|Mux34~1 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X30_Y11_N49 +dffeas \REGS|regs[12][29] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[29]~451_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~26_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[12][29]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[12][29] .is_wysiwyg = "true"; +defparam \REGS|regs[12][29] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X30_Y11_N2 +dffeas \REGS|regs[4][29]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[29]~451_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~22_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[4][29]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[4][29]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[4][29]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X30_Y11_N21 +cyclonev_lcell_comb \REGS|Mux34~0 ( +// Equation(s): +// \REGS|Mux34~0_combout = ( \REGS|regs[4][29]~DUPLICATE_q & ( \PC|pc[8]~DUPLICATE_q ) ) # ( \REGS|regs[4][29]~DUPLICATE_q & ( !\PC|pc[8]~DUPLICATE_q & ( (((\PC|pc [9]) # (\PC|pc[7]~DUPLICATE_q )) # (\REGS|regs[12][29]~q )) # (\PC|pc [6]) ) ) ) # ( +// !\REGS|regs[4][29]~DUPLICATE_q & ( !\PC|pc[8]~DUPLICATE_q & ( (!\PC|pc [6] & (\REGS|regs[12][29]~q & (!\PC|pc[7]~DUPLICATE_q & !\PC|pc [9]))) ) ) ) + + .dataa(!\PC|pc [6]), + .datab(!\REGS|regs[12][29]~q ), + .datac(!\PC|pc[7]~DUPLICATE_q ), + .datad(!\PC|pc [9]), + .datae(!\REGS|regs[4][29]~DUPLICATE_q ), + .dataf(!\PC|pc[8]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux34~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux34~0 .extended_lut = "off"; +defparam \REGS|Mux34~0 .lut_mask = 64'h20007FFF0000FFFF; +defparam \REGS|Mux34~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X30_Y9_N24 +cyclonev_lcell_comb \rt_alu[29]~233 ( +// Equation(s): +// \rt_alu[29]~233_combout = ( \REGS|Mux34~1_combout & ( \REGS|Mux34~0_combout ) ) # ( !\REGS|Mux34~1_combout & ( \REGS|Mux34~0_combout & ( (!\ROM|mem~0_combout ) # (\ROM|mem~10_combout ) ) ) ) # ( \REGS|Mux34~1_combout & ( !\REGS|Mux34~0_combout & ( +// (\ROM|mem~0_combout & !\ROM|mem~10_combout ) ) ) ) + + .dataa(!\ROM|mem~0_combout ), + .datab(gnd), + .datac(!\ROM|mem~10_combout ), + .datad(gnd), + .datae(!\REGS|Mux34~1_combout ), + .dataf(!\REGS|Mux34~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[29]~233_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[29]~233 .extended_lut = "off"; +defparam \rt_alu[29]~233 .lut_mask = 64'h00005050AFAFFFFF; +defparam \rt_alu[29]~233 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X30_Y6_N50 +dffeas \REGS|regs[6][29] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[29]~451_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~34_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[6][29]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[6][29] .is_wysiwyg = "true"; +defparam \REGS|regs[6][29] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X30_Y6_N44 +dffeas \REGS|regs[15][29] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[29]~451_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~39_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[15][29]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[15][29] .is_wysiwyg = "true"; +defparam \REGS|regs[15][29] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X30_Y6_N8 +dffeas \REGS|regs[14][29] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[29]~451_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~35_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[14][29]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[14][29] .is_wysiwyg = "true"; +defparam \REGS|regs[14][29] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X30_Y6_N42 +cyclonev_lcell_comb \rt_alu[29]~232 ( +// Equation(s): +// \rt_alu[29]~232_combout = ( \REGS|regs[14][29]~q & ( (!\ROM|mem~0_combout & (((\REGS|regs[6][29]~q )))) # (\ROM|mem~0_combout & (((\REGS|regs[15][29]~q )) # (\ROM|mem~10_combout ))) ) ) # ( !\REGS|regs[14][29]~q & ( (!\ROM|mem~0_combout & +// (((\REGS|regs[6][29]~q )))) # (\ROM|mem~0_combout & (!\ROM|mem~10_combout & ((\REGS|regs[15][29]~q )))) ) ) + + .dataa(!\ROM|mem~10_combout ), + .datab(!\ROM|mem~0_combout ), + .datac(!\REGS|regs[6][29]~q ), + .datad(!\REGS|regs[15][29]~q ), + .datae(gnd), + .dataf(!\REGS|regs[14][29]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[29]~232_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[29]~232 .extended_lut = "off"; +defparam \rt_alu[29]~232 .lut_mask = 64'h0C2E0C2E1D3F1D3F; +defparam \rt_alu[29]~232 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X30_Y9_N0 +cyclonev_lcell_comb \rt_alu[29]~234 ( +// Equation(s): +// \rt_alu[29]~234_combout = ( \rt_alu[17]~10_combout & ( \rt_alu[29]~232_combout & ( \rt_alu[29]~231_combout ) ) ) # ( !\rt_alu[17]~10_combout & ( \rt_alu[29]~232_combout & ( (\ROM|mem~12_combout ) # (\rt_alu[29]~233_combout ) ) ) ) # ( +// \rt_alu[17]~10_combout & ( !\rt_alu[29]~232_combout & ( \rt_alu[29]~231_combout ) ) ) # ( !\rt_alu[17]~10_combout & ( !\rt_alu[29]~232_combout & ( (\rt_alu[29]~233_combout & !\ROM|mem~12_combout ) ) ) ) + + .dataa(!\rt_alu[29]~231_combout ), + .datab(gnd), + .datac(!\rt_alu[29]~233_combout ), + .datad(!\ROM|mem~12_combout ), + .datae(!\rt_alu[17]~10_combout ), + .dataf(!\rt_alu[29]~232_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[29]~234_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[29]~234 .extended_lut = "off"; +defparam \rt_alu[29]~234 .lut_mask = 64'h0F0055550FFF5555; +defparam \rt_alu[29]~234 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X30_Y7_N0 +cyclonev_lcell_comb \rt_alu[29]~235 ( +// Equation(s): +// \rt_alu[29]~235_combout = ( \ROM|mem~0_combout & ( \rt_alu[29]~234_combout & ( (\rt_alu[17]~11_combout ) # (\REGS|regs[9][29]~q ) ) ) ) # ( !\ROM|mem~0_combout & ( \rt_alu[29]~234_combout & ( (\rt_alu[17]~11_combout ) # (\REGS|regs[1][29]~q ) ) ) ) # +// ( \ROM|mem~0_combout & ( !\rt_alu[29]~234_combout & ( (\REGS|regs[9][29]~q & !\rt_alu[17]~11_combout ) ) ) ) # ( !\ROM|mem~0_combout & ( !\rt_alu[29]~234_combout & ( (\REGS|regs[1][29]~q & !\rt_alu[17]~11_combout ) ) ) ) + + .dataa(!\REGS|regs[1][29]~q ), + .datab(gnd), + .datac(!\REGS|regs[9][29]~q ), + .datad(!\rt_alu[17]~11_combout ), + .datae(!\ROM|mem~0_combout ), + .dataf(!\rt_alu[29]~234_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[29]~235_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[29]~235 .extended_lut = "off"; +defparam \rt_alu[29]~235 .lut_mask = 64'h55000F0055FF0FFF; +defparam \rt_alu[29]~235 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X31_Y7_N39 +cyclonev_lcell_comb \rt_alu[29]~241 ( +// Equation(s): +// \rt_alu[29]~241_combout = ( \rt_alu[29]~240_combout & ( \rt_alu[29]~235_combout & ( (\rt_alu[31]~39_combout ) # (\rt_alu[31]~40_combout ) ) ) ) # ( !\rt_alu[29]~240_combout & ( \rt_alu[29]~235_combout & ( (\rt_alu[31]~40_combout & +// ((!\rt_alu[31]~39_combout ) # (\rt_alu[29]~239_combout ))) ) ) ) # ( \rt_alu[29]~240_combout & ( !\rt_alu[29]~235_combout & ( \rt_alu[31]~39_combout ) ) ) # ( !\rt_alu[29]~240_combout & ( !\rt_alu[29]~235_combout & ( (\rt_alu[31]~40_combout & +// (\rt_alu[29]~239_combout & \rt_alu[31]~39_combout )) ) ) ) + + .dataa(gnd), + .datab(!\rt_alu[31]~40_combout ), + .datac(!\rt_alu[29]~239_combout ), + .datad(!\rt_alu[31]~39_combout ), + .datae(!\rt_alu[29]~240_combout ), + .dataf(!\rt_alu[29]~235_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[29]~241_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[29]~241 .extended_lut = "off"; +defparam \rt_alu[29]~241 .lut_mask = 64'h000300FF330333FF; +defparam \rt_alu[29]~241 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y6_N0 +cyclonev_lcell_comb \ALU|Mux2~0 ( +// Equation(s): +// \ALU|Mux2~0_combout = ( \rt_alu[29]~241_combout & ( \REGS|Mux2~2_combout & ( (\ALU|Mux15~0_combout & \CONTROL_UNIT|ALU_FN [1]) ) ) ) # ( !\rt_alu[29]~241_combout & ( \REGS|Mux2~2_combout & ( ((\ALU|Mux15~0_combout & (\CONTROL_UNIT|ALU_FN [1] & +// !\CONTROL_UNIT|ALU_FN [0]))) # (\ALU|Mux29~1_combout ) ) ) ) # ( \rt_alu[29]~241_combout & ( !\REGS|Mux2~2_combout & ( ((\ALU|Mux15~0_combout & (\CONTROL_UNIT|ALU_FN [1] & !\CONTROL_UNIT|ALU_FN [0]))) # (\ALU|Mux29~1_combout ) ) ) ) # ( +// !\rt_alu[29]~241_combout & ( !\REGS|Mux2~2_combout & ( (\ALU|Mux15~0_combout & !\CONTROL_UNIT|ALU_FN [1]) ) ) ) + + .dataa(!\ALU|Mux15~0_combout ), + .datab(!\CONTROL_UNIT|ALU_FN [1]), + .datac(!\CONTROL_UNIT|ALU_FN [0]), + .datad(!\ALU|Mux29~1_combout ), + .datae(!\rt_alu[29]~241_combout ), + .dataf(!\REGS|Mux2~2_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\ALU|Mux2~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \ALU|Mux2~0 .extended_lut = "off"; +defparam \ALU|Mux2~0 .lut_mask = 64'h444410FF10FF1111; +defparam \ALU|Mux2~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X31_Y7_N54 +cyclonev_lcell_comb \ALU|adder_unit|operand[29]~13 ( +// Equation(s): +// \ALU|adder_unit|operand[29]~13_combout = ( \rt_alu[29]~240_combout & ( \rt_alu[29]~235_combout & ( !\CONTROL_UNIT|ALU_FN [1] $ (((\rt_alu[31]~39_combout ) # (\rt_alu[31]~40_combout ))) ) ) ) # ( !\rt_alu[29]~240_combout & ( \rt_alu[29]~235_combout & +// ( !\CONTROL_UNIT|ALU_FN [1] $ (((\rt_alu[31]~40_combout & ((!\rt_alu[31]~39_combout ) # (\rt_alu[29]~239_combout ))))) ) ) ) # ( \rt_alu[29]~240_combout & ( !\rt_alu[29]~235_combout & ( !\CONTROL_UNIT|ALU_FN [1] $ (\rt_alu[31]~39_combout ) ) ) ) # ( +// !\rt_alu[29]~240_combout & ( !\rt_alu[29]~235_combout & ( !\CONTROL_UNIT|ALU_FN [1] $ (((\rt_alu[31]~40_combout & (\rt_alu[31]~39_combout & \rt_alu[29]~239_combout )))) ) ) ) + + .dataa(!\CONTROL_UNIT|ALU_FN [1]), + .datab(!\rt_alu[31]~40_combout ), + .datac(!\rt_alu[31]~39_combout ), + .datad(!\rt_alu[29]~239_combout ), + .datae(!\rt_alu[29]~240_combout ), + .dataf(!\rt_alu[29]~235_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\ALU|adder_unit|operand[29]~13_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \ALU|adder_unit|operand[29]~13 .extended_lut = "off"; +defparam \ALU|adder_unit|operand[29]~13 .lut_mask = 64'hAAA9A5A59A999595; +defparam \ALU|adder_unit|operand[29]~13 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X31_Y9_N52 +dffeas \REGS|regs[9][28] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[28]~449_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~29_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[9][28]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[9][28] .is_wysiwyg = "true"; +defparam \REGS|regs[9][28] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X35_Y9_N45 +cyclonev_lcell_comb \ROM|mem~15 ( +// Equation(s): +// \ROM|mem~15_combout = ( \PC|pc[4]~DUPLICATE_q & ( (!\PC|pc [5] & ((!\PC|pc [2]) # (!\PC|pc[3]~DUPLICATE_q ))) ) ) # ( !\PC|pc[4]~DUPLICATE_q & ( \PC|pc [5] ) ) + + .dataa(gnd), + .datab(!\PC|pc [2]), + .datac(!\PC|pc[3]~DUPLICATE_q ), + .datad(!\PC|pc [5]), + .datae(gnd), + .dataf(!\PC|pc[4]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\ROM|mem~15_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \ROM|mem~15 .extended_lut = "off"; +defparam \ROM|mem~15 .lut_mask = 64'h00FF00FFFC00FC00; +defparam \ROM|mem~15 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X33_Y9_N33 +cyclonev_lcell_comb \REGS|Mux3~1 ( +// Equation(s): +// \REGS|Mux3~1_combout = ( \ROM|mem~15_combout & ( (\ROM|mem~0_combout & \REGS|regs[9][28]~q ) ) ) # ( !\ROM|mem~15_combout & ( (\ROM|mem~0_combout & \REGS|regs[8][28]~q ) ) ) + + .dataa(gnd), + .datab(!\ROM|mem~0_combout ), + .datac(!\REGS|regs[9][28]~q ), + .datad(!\REGS|regs[8][28]~q ), + .datae(gnd), + .dataf(!\ROM|mem~15_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux3~1_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux3~1 .extended_lut = "off"; +defparam \REGS|Mux3~1 .lut_mask = 64'h0033003303030303; +defparam \REGS|Mux3~1 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X32_Y9_N7 +dffeas \REGS|regs[13][28] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[28]~449_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~31_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[13][28]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[13][28] .is_wysiwyg = "true"; +defparam \REGS|regs[13][28] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X32_Y9_N44 +dffeas \REGS|regs[5][28] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[28]~449_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~30_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[5][28]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[5][28] .is_wysiwyg = "true"; +defparam \REGS|regs[5][28] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y9_N9 +cyclonev_lcell_comb \REGS|Mux35~0 ( +// Equation(s): +// \REGS|Mux35~0_combout = ( \PC|pc[6]~DUPLICATE_q & ( \PC|pc [8] & ( \REGS|regs[5][28]~q ) ) ) # ( !\PC|pc[6]~DUPLICATE_q & ( \PC|pc [8] & ( \REGS|regs[5][28]~q ) ) ) # ( \PC|pc[6]~DUPLICATE_q & ( !\PC|pc [8] & ( \REGS|regs[5][28]~q ) ) ) # ( +// !\PC|pc[6]~DUPLICATE_q & ( !\PC|pc [8] & ( (!\PC|pc[7]~DUPLICATE_q & ((!\PC|pc [9] & (\REGS|regs[13][28]~q )) # (\PC|pc [9] & ((\REGS|regs[5][28]~q ))))) # (\PC|pc[7]~DUPLICATE_q & (((\REGS|regs[5][28]~q )))) ) ) ) + + .dataa(!\REGS|regs[13][28]~q ), + .datab(!\REGS|regs[5][28]~q ), + .datac(!\PC|pc[7]~DUPLICATE_q ), + .datad(!\PC|pc [9]), + .datae(!\PC|pc[6]~DUPLICATE_q ), + .dataf(!\PC|pc [8]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux35~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux35~0 .extended_lut = "off"; +defparam \REGS|Mux35~0 .lut_mask = 64'h5333333333333333; +defparam \REGS|Mux35~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X32_Y9_N29 +dffeas \REGS|regs[12][28] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[28]~449_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~26_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[12][28]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[12][28] .is_wysiwyg = "true"; +defparam \REGS|regs[12][28] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X30_Y11_N45 +cyclonev_lcell_comb \REGS|regs[4][28]~feeder ( +// Equation(s): +// \REGS|regs[4][28]~feeder_combout = ( \rd[28]~449_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[28]~449_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[4][28]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[4][28]~feeder .extended_lut = "off"; +defparam \REGS|regs[4][28]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[4][28]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X30_Y11_N46 +dffeas \REGS|regs[4][28] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[4][28]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~22_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[4][28]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[4][28] .is_wysiwyg = "true"; +defparam \REGS|regs[4][28] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y9_N24 +cyclonev_lcell_comb \REGS|Mux35~1 ( +// Equation(s): +// \REGS|Mux35~1_combout = ( \PC|pc [8] & ( \REGS|regs[4][28]~q ) ) # ( !\PC|pc [8] & ( \REGS|regs[4][28]~q & ( (((\PC|pc [9]) # (\PC|pc[6]~DUPLICATE_q )) # (\PC|pc[7]~DUPLICATE_q )) # (\REGS|regs[12][28]~q ) ) ) ) # ( !\PC|pc [8] & ( !\REGS|regs[4][28]~q +// & ( (\REGS|regs[12][28]~q & (!\PC|pc[7]~DUPLICATE_q & (!\PC|pc[6]~DUPLICATE_q & !\PC|pc [9]))) ) ) ) + + .dataa(!\REGS|regs[12][28]~q ), + .datab(!\PC|pc[7]~DUPLICATE_q ), + .datac(!\PC|pc[6]~DUPLICATE_q ), + .datad(!\PC|pc [9]), + .datae(!\PC|pc [8]), + .dataf(!\REGS|regs[4][28]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux35~1_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux35~1 .extended_lut = "off"; +defparam \REGS|Mux35~1 .lut_mask = 64'h400000007FFFFFFF; +defparam \REGS|Mux35~1 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X35_Y8_N6 +cyclonev_lcell_comb \ROM|mem~16 ( +// Equation(s): +// \ROM|mem~16_combout = ( \ROM|mem~15_combout & ( \ROM|mem~0_combout ) ) + + .dataa(gnd), + .datab(gnd), + .datac(!\ROM|mem~0_combout ), + .datad(gnd), + .datae(gnd), + .dataf(!\ROM|mem~15_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\ROM|mem~16_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \ROM|mem~16 .extended_lut = "off"; +defparam \ROM|mem~16 .lut_mask = 64'h000000000F0F0F0F; +defparam \ROM|mem~16 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X30_Y4_N19 +dffeas \REGS|regs[22][28] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[28]~449_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~9_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[22][28]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[22][28] .is_wysiwyg = "true"; +defparam \REGS|regs[22][28] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X31_Y5_N8 +dffeas \REGS|regs[30][28] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[28]~449_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~10_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[30][28]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[30][28] .is_wysiwyg = "true"; +defparam \REGS|regs[30][28] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X31_Y5_N21 +cyclonev_lcell_comb \REGS|Mux35~5 ( +// Equation(s): +// \REGS|Mux35~5_combout = ( \PC|pc [9] & ( \PC|pc[8]~DUPLICATE_q & ( \REGS|regs[22][28]~q ) ) ) # ( !\PC|pc [9] & ( \PC|pc[8]~DUPLICATE_q & ( \REGS|regs[22][28]~q ) ) ) # ( \PC|pc [9] & ( !\PC|pc[8]~DUPLICATE_q & ( \REGS|regs[22][28]~q ) ) ) # ( +// !\PC|pc [9] & ( !\PC|pc[8]~DUPLICATE_q & ( (!\PC|pc[6]~DUPLICATE_q & ((!\PC|pc [7] & ((\REGS|regs[30][28]~q ))) # (\PC|pc [7] & (\REGS|regs[22][28]~q )))) # (\PC|pc[6]~DUPLICATE_q & (\REGS|regs[22][28]~q )) ) ) ) + + .dataa(!\REGS|regs[22][28]~q ), + .datab(!\PC|pc[6]~DUPLICATE_q ), + .datac(!\REGS|regs[30][28]~q ), + .datad(!\PC|pc [7]), + .datae(!\PC|pc [9]), + .dataf(!\PC|pc[8]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux35~5_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux35~5 .extended_lut = "off"; +defparam \REGS|Mux35~5 .lut_mask = 64'h1D55555555555555; +defparam \REGS|Mux35~5 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X31_Y5_N2 +dffeas \REGS|regs[23][28] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[28]~449_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~18_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[23][28]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[23][28] .is_wysiwyg = "true"; +defparam \REGS|regs[23][28] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X33_Y9_N52 +dffeas \REGS|regs[31][28] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[28]~449_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~19_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[31][28]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[31][28] .is_wysiwyg = "true"; +defparam \REGS|regs[31][28] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X31_Y5_N39 +cyclonev_lcell_comb \REGS|Mux35~4 ( +// Equation(s): +// \REGS|Mux35~4_combout = ( \PC|pc [9] & ( \REGS|regs[31][28]~q & ( \REGS|regs[23][28]~q ) ) ) # ( !\PC|pc [9] & ( \REGS|regs[31][28]~q & ( ((!\PC|pc[6]~DUPLICATE_q & (!\PC|pc[8]~DUPLICATE_q & !\PC|pc [7]))) # (\REGS|regs[23][28]~q ) ) ) ) # ( \PC|pc +// [9] & ( !\REGS|regs[31][28]~q & ( \REGS|regs[23][28]~q ) ) ) # ( !\PC|pc [9] & ( !\REGS|regs[31][28]~q & ( (\REGS|regs[23][28]~q & (((\PC|pc [7]) # (\PC|pc[8]~DUPLICATE_q )) # (\PC|pc[6]~DUPLICATE_q ))) ) ) ) + + .dataa(!\REGS|regs[23][28]~q ), + .datab(!\PC|pc[6]~DUPLICATE_q ), + .datac(!\PC|pc[8]~DUPLICATE_q ), + .datad(!\PC|pc [7]), + .datae(!\PC|pc [9]), + .dataf(!\REGS|regs[31][28]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux35~4_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux35~4 .extended_lut = "off"; +defparam \REGS|Mux35~4 .lut_mask = 64'h15555555D5555555; +defparam \REGS|Mux35~4 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y9_N36 +cyclonev_lcell_comb \REGS|Mux3~0 ( +// Equation(s): +// \REGS|Mux3~0_combout = ( \REGS|Mux35~5_combout & ( \REGS|Mux35~4_combout & ( ((!\ROM|mem~16_combout & ((\REGS|Mux35~1_combout ))) # (\ROM|mem~16_combout & (\REGS|Mux35~0_combout ))) # (\ROM|mem~9_combout ) ) ) ) # ( !\REGS|Mux35~5_combout & ( +// \REGS|Mux35~4_combout & ( (!\ROM|mem~9_combout & ((!\ROM|mem~16_combout & ((\REGS|Mux35~1_combout ))) # (\ROM|mem~16_combout & (\REGS|Mux35~0_combout )))) # (\ROM|mem~9_combout & (((\ROM|mem~16_combout )))) ) ) ) # ( \REGS|Mux35~5_combout & ( +// !\REGS|Mux35~4_combout & ( (!\ROM|mem~9_combout & ((!\ROM|mem~16_combout & ((\REGS|Mux35~1_combout ))) # (\ROM|mem~16_combout & (\REGS|Mux35~0_combout )))) # (\ROM|mem~9_combout & (((!\ROM|mem~16_combout )))) ) ) ) # ( !\REGS|Mux35~5_combout & ( +// !\REGS|Mux35~4_combout & ( (!\ROM|mem~9_combout & ((!\ROM|mem~16_combout & ((\REGS|Mux35~1_combout ))) # (\ROM|mem~16_combout & (\REGS|Mux35~0_combout )))) ) ) ) + + .dataa(!\ROM|mem~9_combout ), + .datab(!\REGS|Mux35~0_combout ), + .datac(!\REGS|Mux35~1_combout ), + .datad(!\ROM|mem~16_combout ), + .datae(!\REGS|Mux35~5_combout ), + .dataf(!\REGS|Mux35~4_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux3~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux3~0 .extended_lut = "off"; +defparam \REGS|Mux3~0 .lut_mask = 64'h0A225F220A775F77; +defparam \REGS|Mux3~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X28_Y9_N32 +dffeas \REGS|regs[26][28] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[28]~449_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~6_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[26][28]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[26][28] .is_wysiwyg = "true"; +defparam \REGS|regs[26][28] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X28_Y9_N43 +dffeas \REGS|regs[18][28] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[28]~449_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~5_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[18][28]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[18][28] .is_wysiwyg = "true"; +defparam \REGS|regs[18][28] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X28_Y9_N33 +cyclonev_lcell_comb \REGS|Mux35~2 ( +// Equation(s): +// \REGS|Mux35~2_combout = ( \REGS|regs[18][28]~q & ( \ROM|mem~0_combout & ( \REGS|regs[26][28]~q ) ) ) # ( !\REGS|regs[18][28]~q & ( \ROM|mem~0_combout & ( \REGS|regs[26][28]~q ) ) ) # ( \REGS|regs[18][28]~q & ( !\ROM|mem~0_combout ) ) + + .dataa(gnd), + .datab(gnd), + .datac(!\REGS|regs[26][28]~q ), + .datad(gnd), + .datae(!\REGS|regs[18][28]~q ), + .dataf(!\ROM|mem~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux35~2_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux35~2 .extended_lut = "off"; +defparam \REGS|Mux35~2 .lut_mask = 64'h0000FFFF0F0F0F0F; +defparam \REGS|Mux35~2 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y9_N18 +cyclonev_lcell_comb \REGS|Mux3~2 ( +// Equation(s): +// \REGS|Mux3~2_combout = ( \REGS|Mux3~0_combout & ( \REGS|Mux35~2_combout & ( ((\ROM|mem~9_combout ) # (\REGS|Mux3~1_combout )) # (\ROM|mem~17_combout ) ) ) ) # ( !\REGS|Mux3~0_combout & ( \REGS|Mux35~2_combout & ( (!\ROM|mem~17_combout & +// ((\ROM|mem~9_combout ) # (\REGS|Mux3~1_combout ))) ) ) ) # ( \REGS|Mux3~0_combout & ( !\REGS|Mux35~2_combout & ( (\REGS|Mux3~1_combout ) # (\ROM|mem~17_combout ) ) ) ) # ( !\REGS|Mux3~0_combout & ( !\REGS|Mux35~2_combout & ( (!\ROM|mem~17_combout & +// \REGS|Mux3~1_combout ) ) ) ) + + .dataa(gnd), + .datab(!\ROM|mem~17_combout ), + .datac(!\REGS|Mux3~1_combout ), + .datad(!\ROM|mem~9_combout ), + .datae(!\REGS|Mux3~0_combout ), + .dataf(!\REGS|Mux35~2_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux3~2_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux3~2 .extended_lut = "off"; +defparam \REGS|Mux3~2 .lut_mask = 64'h0C0C3F3F0CCC3FFF; +defparam \REGS|Mux3~2 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y9_N30 +cyclonev_lcell_comb \ALU|Mux3~0 ( +// Equation(s): +// \ALU|Mux3~0_combout = ( \rt_alu[28]~221_combout & ( \REGS|Mux3~2_combout & ( (\ALU|Mux15~0_combout & \CONTROL_UNIT|ALU_FN [1]) ) ) ) # ( !\rt_alu[28]~221_combout & ( \REGS|Mux3~2_combout & ( ((\ALU|Mux15~0_combout & (\CONTROL_UNIT|ALU_FN [1] & +// !\CONTROL_UNIT|ALU_FN [0]))) # (\ALU|Mux29~1_combout ) ) ) ) # ( \rt_alu[28]~221_combout & ( !\REGS|Mux3~2_combout & ( ((\ALU|Mux15~0_combout & (\CONTROL_UNIT|ALU_FN [1] & !\CONTROL_UNIT|ALU_FN [0]))) # (\ALU|Mux29~1_combout ) ) ) ) # ( +// !\rt_alu[28]~221_combout & ( !\REGS|Mux3~2_combout & ( (\ALU|Mux15~0_combout & !\CONTROL_UNIT|ALU_FN [1]) ) ) ) + + .dataa(!\ALU|Mux15~0_combout ), + .datab(!\ALU|Mux29~1_combout ), + .datac(!\CONTROL_UNIT|ALU_FN [1]), + .datad(!\CONTROL_UNIT|ALU_FN [0]), + .datae(!\rt_alu[28]~221_combout ), + .dataf(!\REGS|Mux3~2_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\ALU|Mux3~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \ALU|Mux3~0 .extended_lut = "off"; +defparam \ALU|Mux3~0 .lut_mask = 64'h5050373337330505; +defparam \ALU|Mux3~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X33_Y7_N59 +dffeas \REGS|regs[18][27] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[27]~447_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~5_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[18][27]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[18][27] .is_wysiwyg = "true"; +defparam \REGS|regs[18][27] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X32_Y7_N44 +dffeas \REGS|regs[26][27]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[27]~447_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~6_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[26][27]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[26][27]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[26][27]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y7_N30 +cyclonev_lcell_comb \REGS|Mux36~4 ( +// Equation(s): +// \REGS|Mux36~4_combout = ( \REGS|regs[26][27]~DUPLICATE_q & ( (\REGS|regs[18][27]~q ) # (\ROM|mem~0_combout ) ) ) # ( !\REGS|regs[26][27]~DUPLICATE_q & ( (!\ROM|mem~0_combout & \REGS|regs[18][27]~q ) ) ) + + .dataa(gnd), + .datab(gnd), + .datac(!\ROM|mem~0_combout ), + .datad(!\REGS|regs[18][27]~q ), + .datae(gnd), + .dataf(!\REGS|regs[26][27]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux36~4_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux36~4 .extended_lut = "off"; +defparam \REGS|Mux36~4 .lut_mask = 64'h00F000F00FFF0FFF; +defparam \REGS|Mux36~4 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X30_Y8_N2 +dffeas \REGS|regs[23][27] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[27]~447_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~18_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[23][27]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[23][27] .is_wysiwyg = "true"; +defparam \REGS|regs[23][27] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X33_Y5_N33 +cyclonev_lcell_comb \REGS|regs[31][27]~feeder ( +// Equation(s): +// \REGS|regs[31][27]~feeder_combout = ( \rd[27]~447_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[27]~447_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[31][27]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[31][27]~feeder .extended_lut = "off"; +defparam \REGS|regs[31][27]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[31][27]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X33_Y5_N35 +dffeas \REGS|regs[31][27] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[31][27]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~19_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[31][27]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[31][27] .is_wysiwyg = "true"; +defparam \REGS|regs[31][27] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X30_Y8_N48 +cyclonev_lcell_comb \REGS|Mux36~3 ( +// Equation(s): +// \REGS|Mux36~3_combout = ( \REGS|regs[23][27]~q & ( \REGS|regs[31][27]~q ) ) # ( !\REGS|regs[23][27]~q & ( \REGS|regs[31][27]~q & ( (!\PC|pc [6] & (!\PC|pc[7]~DUPLICATE_q & (!\PC|pc[8]~DUPLICATE_q & !\PC|pc[9]~DUPLICATE_q ))) ) ) ) # ( +// \REGS|regs[23][27]~q & ( !\REGS|regs[31][27]~q & ( (((\PC|pc[9]~DUPLICATE_q ) # (\PC|pc[8]~DUPLICATE_q )) # (\PC|pc[7]~DUPLICATE_q )) # (\PC|pc [6]) ) ) ) + + .dataa(!\PC|pc [6]), + .datab(!\PC|pc[7]~DUPLICATE_q ), + .datac(!\PC|pc[8]~DUPLICATE_q ), + .datad(!\PC|pc[9]~DUPLICATE_q ), + .datae(!\REGS|regs[23][27]~q ), + .dataf(!\REGS|regs[31][27]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux36~3_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux36~3 .extended_lut = "off"; +defparam \REGS|Mux36~3 .lut_mask = 64'h00007FFF8000FFFF; +defparam \REGS|Mux36~3 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X30_Y11_N5 +dffeas \REGS|regs[4][27] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[27]~447_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~22_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[4][27]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[4][27] .is_wysiwyg = "true"; +defparam \REGS|regs[4][27] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X32_Y9_N22 +dffeas \REGS|regs[12][27] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[27]~447_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~26_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[12][27]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[12][27] .is_wysiwyg = "true"; +defparam \REGS|regs[12][27] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y9_N12 +cyclonev_lcell_comb \REGS|Mux36~0 ( +// Equation(s): +// \REGS|Mux36~0_combout = ( \REGS|regs[4][27]~q & ( \REGS|regs[12][27]~q ) ) # ( !\REGS|regs[4][27]~q & ( \REGS|regs[12][27]~q & ( (!\PC|pc[6]~DUPLICATE_q & (!\PC|pc[7]~DUPLICATE_q & (!\PC|pc [9] & !\PC|pc [8]))) ) ) ) # ( \REGS|regs[4][27]~q & ( +// !\REGS|regs[12][27]~q & ( (((\PC|pc [8]) # (\PC|pc [9])) # (\PC|pc[7]~DUPLICATE_q )) # (\PC|pc[6]~DUPLICATE_q ) ) ) ) + + .dataa(!\PC|pc[6]~DUPLICATE_q ), + .datab(!\PC|pc[7]~DUPLICATE_q ), + .datac(!\PC|pc [9]), + .datad(!\PC|pc [8]), + .datae(!\REGS|regs[4][27]~q ), + .dataf(!\REGS|regs[12][27]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux36~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux36~0 .extended_lut = "off"; +defparam \REGS|Mux36~0 .lut_mask = 64'h00007FFF8000FFFF; +defparam \REGS|Mux36~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X32_Y9_N5 +dffeas \REGS|regs[5][27] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[27]~447_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~30_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[5][27]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[5][27] .is_wysiwyg = "true"; +defparam \REGS|regs[5][27] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X32_Y9_N53 +dffeas \REGS|regs[13][27] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[27]~447_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~31_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[13][27]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[13][27] .is_wysiwyg = "true"; +defparam \REGS|regs[13][27] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y9_N15 +cyclonev_lcell_comb \REGS|Mux36~1 ( +// Equation(s): +// \REGS|Mux36~1_combout = ( \REGS|regs[5][27]~q & ( \REGS|regs[13][27]~q ) ) # ( !\REGS|regs[5][27]~q & ( \REGS|regs[13][27]~q & ( (!\PC|pc[6]~DUPLICATE_q & (!\PC|pc[7]~DUPLICATE_q & (!\PC|pc [8] & !\PC|pc [9]))) ) ) ) # ( \REGS|regs[5][27]~q & ( +// !\REGS|regs[13][27]~q & ( (((\PC|pc [9]) # (\PC|pc [8])) # (\PC|pc[7]~DUPLICATE_q )) # (\PC|pc[6]~DUPLICATE_q ) ) ) ) + + .dataa(!\PC|pc[6]~DUPLICATE_q ), + .datab(!\PC|pc[7]~DUPLICATE_q ), + .datac(!\PC|pc [8]), + .datad(!\PC|pc [9]), + .datae(!\REGS|regs[5][27]~q ), + .dataf(!\REGS|regs[13][27]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux36~1_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux36~1 .extended_lut = "off"; +defparam \REGS|Mux36~1 .lut_mask = 64'h00007FFF8000FFFF; +defparam \REGS|Mux36~1 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X32_Y5_N47 +dffeas \REGS|regs[30][27] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[27]~447_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~10_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[30][27]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[30][27] .is_wysiwyg = "true"; +defparam \REGS|regs[30][27] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X31_Y4_N31 +dffeas \REGS|regs[22][27] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[27]~447_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~9_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[22][27]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[22][27] .is_wysiwyg = "true"; +defparam \REGS|regs[22][27] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y5_N54 +cyclonev_lcell_comb \REGS|Mux36~2 ( +// Equation(s): +// \REGS|Mux36~2_combout = ( \REGS|regs[30][27]~q & ( \REGS|regs[22][27]~q ) ) # ( !\REGS|regs[30][27]~q & ( \REGS|regs[22][27]~q & ( (((\PC|pc [9]) # (\PC|pc[6]~DUPLICATE_q )) # (\PC|pc[8]~DUPLICATE_q )) # (\PC|pc [7]) ) ) ) # ( \REGS|regs[30][27]~q & +// ( !\REGS|regs[22][27]~q & ( (!\PC|pc [7] & (!\PC|pc[8]~DUPLICATE_q & (!\PC|pc[6]~DUPLICATE_q & !\PC|pc [9]))) ) ) ) + + .dataa(!\PC|pc [7]), + .datab(!\PC|pc[8]~DUPLICATE_q ), + .datac(!\PC|pc[6]~DUPLICATE_q ), + .datad(!\PC|pc [9]), + .datae(!\REGS|regs[30][27]~q ), + .dataf(!\REGS|regs[22][27]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux36~2_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux36~2 .extended_lut = "off"; +defparam \REGS|Mux36~2 .lut_mask = 64'h000080007FFFFFFF; +defparam \REGS|Mux36~2 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y7_N3 +cyclonev_lcell_comb \REGS|Mux4~0 ( +// Equation(s): +// \REGS|Mux4~0_combout = ( \ROM|mem~16_combout & ( \REGS|Mux36~2_combout & ( (!\ROM|mem~9_combout & ((\REGS|Mux36~1_combout ))) # (\ROM|mem~9_combout & (\REGS|Mux36~3_combout )) ) ) ) # ( !\ROM|mem~16_combout & ( \REGS|Mux36~2_combout & ( +// (\REGS|Mux36~0_combout ) # (\ROM|mem~9_combout ) ) ) ) # ( \ROM|mem~16_combout & ( !\REGS|Mux36~2_combout & ( (!\ROM|mem~9_combout & ((\REGS|Mux36~1_combout ))) # (\ROM|mem~9_combout & (\REGS|Mux36~3_combout )) ) ) ) # ( !\ROM|mem~16_combout & ( +// !\REGS|Mux36~2_combout & ( (!\ROM|mem~9_combout & \REGS|Mux36~0_combout ) ) ) ) + + .dataa(!\REGS|Mux36~3_combout ), + .datab(!\ROM|mem~9_combout ), + .datac(!\REGS|Mux36~0_combout ), + .datad(!\REGS|Mux36~1_combout ), + .datae(!\ROM|mem~16_combout ), + .dataf(!\REGS|Mux36~2_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux4~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux4~0 .extended_lut = "off"; +defparam \REGS|Mux4~0 .lut_mask = 64'h0C0C11DD3F3F11DD; +defparam \REGS|Mux4~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X32_Y7_N29 +dffeas \REGS|regs[9][27] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[27]~447_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~29_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[9][27]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[9][27] .is_wysiwyg = "true"; +defparam \REGS|regs[9][27] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y7_N33 +cyclonev_lcell_comb \REGS|Mux4~1 ( +// Equation(s): +// \REGS|Mux4~1_combout = ( \ROM|mem~15_combout & ( (\ROM|mem~0_combout & \REGS|regs[9][27]~q ) ) ) # ( !\ROM|mem~15_combout & ( (\ROM|mem~0_combout & \REGS|regs[8][27]~DUPLICATE_q ) ) ) + + .dataa(gnd), + .datab(!\ROM|mem~0_combout ), + .datac(!\REGS|regs[8][27]~DUPLICATE_q ), + .datad(!\REGS|regs[9][27]~q ), + .datae(gnd), + .dataf(!\ROM|mem~15_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux4~1_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux4~1 .extended_lut = "off"; +defparam \REGS|Mux4~1 .lut_mask = 64'h0303030300330033; +defparam \REGS|Mux4~1 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y7_N45 +cyclonev_lcell_comb \REGS|Mux4~2 ( +// Equation(s): +// \REGS|Mux4~2_combout = ( \REGS|Mux4~0_combout & ( \REGS|Mux4~1_combout ) ) # ( !\REGS|Mux4~0_combout & ( \REGS|Mux4~1_combout & ( !\ROM|mem~17_combout ) ) ) # ( \REGS|Mux4~0_combout & ( !\REGS|Mux4~1_combout & ( ((\ROM|mem~9_combout & +// \REGS|Mux36~4_combout )) # (\ROM|mem~17_combout ) ) ) ) # ( !\REGS|Mux4~0_combout & ( !\REGS|Mux4~1_combout & ( (\ROM|mem~9_combout & (\REGS|Mux36~4_combout & !\ROM|mem~17_combout )) ) ) ) + + .dataa(gnd), + .datab(!\ROM|mem~9_combout ), + .datac(!\REGS|Mux36~4_combout ), + .datad(!\ROM|mem~17_combout ), + .datae(!\REGS|Mux4~0_combout ), + .dataf(!\REGS|Mux4~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux4~2_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux4~2 .extended_lut = "off"; +defparam \REGS|Mux4~2 .lut_mask = 64'h030003FFFF00FFFF; +defparam \REGS|Mux4~2 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X32_Y5_N29 +dffeas \REGS|regs[19][27] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[27]~447_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~14_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[19][27]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[19][27] .is_wysiwyg = "true"; +defparam \REGS|regs[19][27] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X32_Y5_N53 +dffeas \REGS|regs[27][27] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[27]~447_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~15_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[27][27]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[27][27] .is_wysiwyg = "true"; +defparam \REGS|regs[27][27] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y5_N51 +cyclonev_lcell_comb \REGS|Mux36~5 ( +// Equation(s): +// \REGS|Mux36~5_combout = ( \REGS|regs[27][27]~q & ( \ROM|mem~0_combout ) ) # ( \REGS|regs[27][27]~q & ( !\ROM|mem~0_combout & ( \REGS|regs[19][27]~q ) ) ) # ( !\REGS|regs[27][27]~q & ( !\ROM|mem~0_combout & ( \REGS|regs[19][27]~q ) ) ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(!\REGS|regs[19][27]~q ), + .datae(!\REGS|regs[27][27]~q ), + .dataf(!\ROM|mem~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux36~5_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux36~5 .extended_lut = "off"; +defparam \REGS|Mux36~5 .lut_mask = 64'h00FF00FF0000FFFF; +defparam \REGS|Mux36~5 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X33_Y7_N29 +dffeas \REGS|regs[16][27] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[27]~447_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~2_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[16][27]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[16][27] .is_wysiwyg = "true"; +defparam \REGS|regs[16][27] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X30_Y7_N44 +dffeas \REGS|regs[25][27] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[27]~447_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~13_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[25][27]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[25][27] .is_wysiwyg = "true"; +defparam \REGS|regs[25][27] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X28_Y10_N3 +cyclonev_lcell_comb \REGS|regs[24][27]~feeder ( +// Equation(s): +// \REGS|regs[24][27]~feeder_combout = ( \rd[27]~447_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[27]~447_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[24][27]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[24][27]~feeder .extended_lut = "off"; +defparam \REGS|regs[24][27]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[24][27]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X28_Y10_N5 +dffeas \REGS|regs[24][27] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[24][27]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~4_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[24][27]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[24][27] .is_wysiwyg = "true"; +defparam \REGS|regs[24][27] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X30_Y7_N45 +cyclonev_lcell_comb \rt_alu[27]~198 ( +// Equation(s): +// \rt_alu[27]~198_combout = ( \ROM|mem~0_combout & ( \REGS|regs[24][27]~q & ( (\ROM|mem~10_combout ) # (\REGS|regs[25][27]~q ) ) ) ) # ( !\ROM|mem~0_combout & ( \REGS|regs[24][27]~q & ( \REGS|regs[16][27]~q ) ) ) # ( \ROM|mem~0_combout & ( +// !\REGS|regs[24][27]~q & ( (\REGS|regs[25][27]~q & !\ROM|mem~10_combout ) ) ) ) # ( !\ROM|mem~0_combout & ( !\REGS|regs[24][27]~q & ( \REGS|regs[16][27]~q ) ) ) + + .dataa(!\REGS|regs[16][27]~q ), + .datab(!\REGS|regs[25][27]~q ), + .datac(!\ROM|mem~10_combout ), + .datad(gnd), + .datae(!\ROM|mem~0_combout ), + .dataf(!\REGS|regs[24][27]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[27]~198_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[27]~198 .extended_lut = "off"; +defparam \rt_alu[27]~198 .lut_mask = 64'h5555303055553F3F; +defparam \rt_alu[27]~198 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X30_Y5_N26 +dffeas \REGS|regs[29][27] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[27]~447_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~17_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[29][27]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[29][27] .is_wysiwyg = "true"; +defparam \REGS|regs[29][27] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X30_Y5_N14 +dffeas \REGS|regs[28][27] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[27]~447_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~8_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[28][27]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[28][27] .is_wysiwyg = "true"; +defparam \REGS|regs[28][27] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X30_Y5_N23 +dffeas \REGS|regs[20][27]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[27]~447_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~7_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[20][27]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[20][27]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[20][27]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X30_Y5_N3 +cyclonev_lcell_comb \rt_alu[27]~196 ( +// Equation(s): +// \rt_alu[27]~196_combout = ( \ROM|mem~0_combout & ( \ROM|mem~10_combout & ( \REGS|regs[28][27]~q ) ) ) # ( !\ROM|mem~0_combout & ( \ROM|mem~10_combout & ( \REGS|regs[20][27]~DUPLICATE_q ) ) ) # ( \ROM|mem~0_combout & ( !\ROM|mem~10_combout & ( +// \REGS|regs[29][27]~q ) ) ) # ( !\ROM|mem~0_combout & ( !\ROM|mem~10_combout & ( \REGS|regs[20][27]~DUPLICATE_q ) ) ) + + .dataa(!\REGS|regs[29][27]~q ), + .datab(gnd), + .datac(!\REGS|regs[28][27]~q ), + .datad(!\REGS|regs[20][27]~DUPLICATE_q ), + .datae(!\ROM|mem~0_combout ), + .dataf(!\ROM|mem~10_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[27]~196_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[27]~196 .extended_lut = "off"; +defparam \rt_alu[27]~196 .lut_mask = 64'h00FF555500FF0F0F; +defparam \rt_alu[27]~196 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X33_Y7_N24 +cyclonev_lcell_comb \rt_alu[27]~197 ( +// Equation(s): +// \rt_alu[27]~197_combout = ( \REGS|Mux36~2_combout & ( \rt_alu[27]~196_combout & ( ((!\ROM|mem~12_combout ) # (!\ROM|mem~13_combout )) # (\REGS|Mux36~3_combout ) ) ) ) # ( !\REGS|Mux36~2_combout & ( \rt_alu[27]~196_combout & ( (!\ROM|mem~12_combout ) +// # ((\REGS|Mux36~3_combout & \ROM|mem~13_combout )) ) ) ) # ( \REGS|Mux36~2_combout & ( !\rt_alu[27]~196_combout & ( (\ROM|mem~12_combout & ((!\ROM|mem~13_combout ) # (\REGS|Mux36~3_combout ))) ) ) ) # ( !\REGS|Mux36~2_combout & ( +// !\rt_alu[27]~196_combout & ( (\REGS|Mux36~3_combout & (\ROM|mem~12_combout & \ROM|mem~13_combout )) ) ) ) + + .dataa(!\REGS|Mux36~3_combout ), + .datab(gnd), + .datac(!\ROM|mem~12_combout ), + .datad(!\ROM|mem~13_combout ), + .datae(!\REGS|Mux36~2_combout ), + .dataf(!\rt_alu[27]~196_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[27]~197_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[27]~197 .extended_lut = "off"; +defparam \rt_alu[27]~197 .lut_mask = 64'h00050F05F0F5FFF5; +defparam \rt_alu[27]~197 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X33_Y7_N0 +cyclonev_lcell_comb \rt_alu[27]~199 ( +// Equation(s): +// \rt_alu[27]~199_combout = ( \rt_alu[27]~198_combout & ( \rt_alu[27]~197_combout & ( (!\rt_alu[17]~5_combout ) # ((!\rt_alu[17]~4_combout & ((\REGS|Mux36~5_combout ))) # (\rt_alu[17]~4_combout & (\REGS|Mux36~4_combout ))) ) ) ) # ( +// !\rt_alu[27]~198_combout & ( \rt_alu[27]~197_combout & ( (!\rt_alu[17]~5_combout & (\rt_alu[17]~4_combout )) # (\rt_alu[17]~5_combout & ((!\rt_alu[17]~4_combout & ((\REGS|Mux36~5_combout ))) # (\rt_alu[17]~4_combout & (\REGS|Mux36~4_combout )))) ) ) +// ) # ( \rt_alu[27]~198_combout & ( !\rt_alu[27]~197_combout & ( (!\rt_alu[17]~5_combout & (!\rt_alu[17]~4_combout )) # (\rt_alu[17]~5_combout & ((!\rt_alu[17]~4_combout & ((\REGS|Mux36~5_combout ))) # (\rt_alu[17]~4_combout & (\REGS|Mux36~4_combout +// )))) ) ) ) # ( !\rt_alu[27]~198_combout & ( !\rt_alu[27]~197_combout & ( (\rt_alu[17]~5_combout & ((!\rt_alu[17]~4_combout & ((\REGS|Mux36~5_combout ))) # (\rt_alu[17]~4_combout & (\REGS|Mux36~4_combout )))) ) ) ) + + .dataa(!\rt_alu[17]~5_combout ), + .datab(!\rt_alu[17]~4_combout ), + .datac(!\REGS|Mux36~4_combout ), + .datad(!\REGS|Mux36~5_combout ), + .datae(!\rt_alu[27]~198_combout ), + .dataf(!\rt_alu[27]~197_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[27]~199_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[27]~199 .extended_lut = "off"; +defparam \rt_alu[27]~199 .lut_mask = 64'h014589CD2367ABEF; +defparam \rt_alu[27]~199 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X33_Y4_N46 +dffeas \REGS|regs[1][27] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[27]~447_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~28_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[1][27]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[1][27] .is_wysiwyg = "true"; +defparam \REGS|regs[1][27] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X28_Y8_N24 +cyclonev_lcell_comb \REGS|regs[10][27]~feeder ( +// Equation(s): +// \REGS|regs[10][27]~feeder_combout = ( \rd[27]~447_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[27]~447_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[10][27]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[10][27]~feeder .extended_lut = "off"; +defparam \REGS|regs[10][27]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[10][27]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X28_Y8_N26 +dffeas \REGS|regs[10][27] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[10][27]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~33_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[10][27]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[10][27] .is_wysiwyg = "true"; +defparam \REGS|regs[10][27] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X28_Y8_N2 +dffeas \REGS|regs[11][27] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[27]~447_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~37_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[11][27]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[11][27] .is_wysiwyg = "true"; +defparam \REGS|regs[11][27] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X28_Y8_N12 +cyclonev_lcell_comb \REGS|regs[2][27]~feeder ( +// Equation(s): +// \REGS|regs[2][27]~feeder_combout = ( \rd[27]~447_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[27]~447_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[2][27]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[2][27]~feeder .extended_lut = "off"; +defparam \REGS|regs[2][27]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[2][27]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X28_Y8_N14 +dffeas \REGS|regs[2][27] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[2][27]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~32_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[2][27]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[2][27] .is_wysiwyg = "true"; +defparam \REGS|regs[2][27] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X28_Y8_N36 +cyclonev_lcell_comb \rt_alu[27]~191 ( +// Equation(s): +// \rt_alu[27]~191_combout = ( \ROM|mem~0_combout & ( \ROM|mem~10_combout & ( \REGS|regs[10][27]~q ) ) ) # ( !\ROM|mem~0_combout & ( \ROM|mem~10_combout & ( \REGS|regs[2][27]~q ) ) ) # ( \ROM|mem~0_combout & ( !\ROM|mem~10_combout & ( +// \REGS|regs[11][27]~q ) ) ) # ( !\ROM|mem~0_combout & ( !\ROM|mem~10_combout & ( \REGS|regs[2][27]~q ) ) ) + + .dataa(!\REGS|regs[10][27]~q ), + .datab(gnd), + .datac(!\REGS|regs[11][27]~q ), + .datad(!\REGS|regs[2][27]~q ), + .datae(!\ROM|mem~0_combout ), + .dataf(!\ROM|mem~10_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[27]~191_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[27]~191 .extended_lut = "off"; +defparam \rt_alu[27]~191 .lut_mask = 64'h00FF0F0F00FF5555; +defparam \rt_alu[27]~191 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X27_Y7_N14 +dffeas \REGS|regs[14][27] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[27]~447_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~35_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[14][27]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[14][27] .is_wysiwyg = "true"; +defparam \REGS|regs[14][27] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y7_N23 +dffeas \REGS|regs[15][27] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[27]~447_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~39_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[15][27]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[15][27] .is_wysiwyg = "true"; +defparam \REGS|regs[15][27] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y7_N2 +dffeas \REGS|regs[6][27] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[27]~447_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~34_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[6][27]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[6][27] .is_wysiwyg = "true"; +defparam \REGS|regs[6][27] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X27_Y7_N45 +cyclonev_lcell_comb \rt_alu[27]~192 ( +// Equation(s): +// \rt_alu[27]~192_combout = ( \REGS|regs[6][27]~q & ( \ROM|mem~10_combout & ( (!\ROM|mem~0_combout ) # (\REGS|regs[14][27]~q ) ) ) ) # ( !\REGS|regs[6][27]~q & ( \ROM|mem~10_combout & ( (\REGS|regs[14][27]~q & \ROM|mem~0_combout ) ) ) ) # ( +// \REGS|regs[6][27]~q & ( !\ROM|mem~10_combout & ( (!\ROM|mem~0_combout ) # (\REGS|regs[15][27]~q ) ) ) ) # ( !\REGS|regs[6][27]~q & ( !\ROM|mem~10_combout & ( (\ROM|mem~0_combout & \REGS|regs[15][27]~q ) ) ) ) + + .dataa(gnd), + .datab(!\REGS|regs[14][27]~q ), + .datac(!\ROM|mem~0_combout ), + .datad(!\REGS|regs[15][27]~q ), + .datae(!\REGS|regs[6][27]~q ), + .dataf(!\ROM|mem~10_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[27]~192_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[27]~192 .extended_lut = "off"; +defparam \rt_alu[27]~192 .lut_mask = 64'h000FF0FF0303F3F3; +defparam \rt_alu[27]~192 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y7_N48 +cyclonev_lcell_comb \rt_alu[27]~193 ( +// Equation(s): +// \rt_alu[27]~193_combout = ( \REGS|Mux36~0_combout & ( (!\ROM|mem~0_combout ) # ((\REGS|Mux36~1_combout ) # (\ROM|mem~10_combout )) ) ) # ( !\REGS|Mux36~0_combout & ( (\ROM|mem~0_combout & (!\ROM|mem~10_combout & \REGS|Mux36~1_combout )) ) ) + + .dataa(gnd), + .datab(!\ROM|mem~0_combout ), + .datac(!\ROM|mem~10_combout ), + .datad(!\REGS|Mux36~1_combout ), + .datae(gnd), + .dataf(!\REGS|Mux36~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[27]~193_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[27]~193 .extended_lut = "off"; +defparam \rt_alu[27]~193 .lut_mask = 64'h00300030CFFFCFFF; +defparam \rt_alu[27]~193 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y7_N9 +cyclonev_lcell_comb \rt_alu[27]~194 ( +// Equation(s): +// \rt_alu[27]~194_combout = ( \rt_alu[27]~192_combout & ( \rt_alu[27]~193_combout & ( (!\rt_alu[17]~10_combout ) # (\rt_alu[27]~191_combout ) ) ) ) # ( !\rt_alu[27]~192_combout & ( \rt_alu[27]~193_combout & ( (!\rt_alu[17]~10_combout & +// (!\ROM|mem~12_combout )) # (\rt_alu[17]~10_combout & ((\rt_alu[27]~191_combout ))) ) ) ) # ( \rt_alu[27]~192_combout & ( !\rt_alu[27]~193_combout & ( (!\rt_alu[17]~10_combout & (\ROM|mem~12_combout )) # (\rt_alu[17]~10_combout & +// ((\rt_alu[27]~191_combout ))) ) ) ) # ( !\rt_alu[27]~192_combout & ( !\rt_alu[27]~193_combout & ( (\rt_alu[17]~10_combout & \rt_alu[27]~191_combout ) ) ) ) + + .dataa(gnd), + .datab(!\ROM|mem~12_combout ), + .datac(!\rt_alu[17]~10_combout ), + .datad(!\rt_alu[27]~191_combout ), + .datae(!\rt_alu[27]~192_combout ), + .dataf(!\rt_alu[27]~193_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[27]~194_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[27]~194 .extended_lut = "off"; +defparam \rt_alu[27]~194 .lut_mask = 64'h000F303FC0CFF0FF; +defparam \rt_alu[27]~194 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y7_N24 +cyclonev_lcell_comb \rt_alu[27]~195 ( +// Equation(s): +// \rt_alu[27]~195_combout = ( \REGS|regs[9][27]~q & ( \rt_alu[27]~194_combout & ( ((\REGS|regs[1][27]~q ) # (\rt_alu[17]~11_combout )) # (\ROM|mem~0_combout ) ) ) ) # ( !\REGS|regs[9][27]~q & ( \rt_alu[27]~194_combout & ( ((!\ROM|mem~0_combout & +// \REGS|regs[1][27]~q )) # (\rt_alu[17]~11_combout ) ) ) ) # ( \REGS|regs[9][27]~q & ( !\rt_alu[27]~194_combout & ( (!\rt_alu[17]~11_combout & ((\REGS|regs[1][27]~q ) # (\ROM|mem~0_combout ))) ) ) ) # ( !\REGS|regs[9][27]~q & ( !\rt_alu[27]~194_combout +// & ( (!\ROM|mem~0_combout & (!\rt_alu[17]~11_combout & \REGS|regs[1][27]~q )) ) ) ) + + .dataa(gnd), + .datab(!\ROM|mem~0_combout ), + .datac(!\rt_alu[17]~11_combout ), + .datad(!\REGS|regs[1][27]~q ), + .datae(!\REGS|regs[9][27]~q ), + .dataf(!\rt_alu[27]~194_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[27]~195_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[27]~195 .extended_lut = "off"; +defparam \rt_alu[27]~195 .lut_mask = 64'h00C030F00FCF3FFF; +defparam \rt_alu[27]~195 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X33_Y7_N12 +cyclonev_lcell_comb \rt_alu[27]~201 ( +// Equation(s): +// \rt_alu[27]~201_combout = ( \rt_alu[27]~199_combout & ( \rt_alu[27]~195_combout & ( ((\rt_alu[27]~200_combout & \rt_alu[31]~39_combout )) # (\rt_alu[31]~40_combout ) ) ) ) # ( !\rt_alu[27]~199_combout & ( \rt_alu[27]~195_combout & ( +// (!\rt_alu[31]~39_combout & ((\rt_alu[31]~40_combout ))) # (\rt_alu[31]~39_combout & (\rt_alu[27]~200_combout )) ) ) ) # ( \rt_alu[27]~199_combout & ( !\rt_alu[27]~195_combout & ( (\rt_alu[31]~39_combout & ((\rt_alu[31]~40_combout ) # +// (\rt_alu[27]~200_combout ))) ) ) ) # ( !\rt_alu[27]~199_combout & ( !\rt_alu[27]~195_combout & ( (\rt_alu[27]~200_combout & \rt_alu[31]~39_combout ) ) ) ) + + .dataa(!\rt_alu[27]~200_combout ), + .datab(!\rt_alu[31]~40_combout ), + .datac(gnd), + .datad(!\rt_alu[31]~39_combout ), + .datae(!\rt_alu[27]~199_combout ), + .dataf(!\rt_alu[27]~195_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[27]~201_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[27]~201 .extended_lut = "off"; +defparam \rt_alu[27]~201 .lut_mask = 64'h0055007733553377; +defparam \rt_alu[27]~201 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X35_Y7_N39 +cyclonev_lcell_comb \ALU|Mux4~0 ( +// Equation(s): +// \ALU|Mux4~0_combout = ( \CONTROL_UNIT|ALU_FN [0] & ( \rt_alu[27]~201_combout & ( (!\REGS|Mux4~2_combout & (((\ALU|Mux29~1_combout )))) # (\REGS|Mux4~2_combout & (\ALU|Mux15~0_combout & ((\CONTROL_UNIT|ALU_FN [1])))) ) ) ) # ( !\CONTROL_UNIT|ALU_FN +// [0] & ( \rt_alu[27]~201_combout & ( (!\ALU|Mux15~0_combout & (\ALU|Mux29~1_combout & (!\REGS|Mux4~2_combout ))) # (\ALU|Mux15~0_combout & (((\ALU|Mux29~1_combout & !\REGS|Mux4~2_combout )) # (\CONTROL_UNIT|ALU_FN [1]))) ) ) ) # ( \CONTROL_UNIT|ALU_FN +// [0] & ( !\rt_alu[27]~201_combout & ( (!\REGS|Mux4~2_combout & (\ALU|Mux15~0_combout & ((!\CONTROL_UNIT|ALU_FN [1])))) # (\REGS|Mux4~2_combout & (((\ALU|Mux29~1_combout )))) ) ) ) # ( !\CONTROL_UNIT|ALU_FN [0] & ( !\rt_alu[27]~201_combout & ( +// (!\REGS|Mux4~2_combout & (\ALU|Mux15~0_combout & ((!\CONTROL_UNIT|ALU_FN [1])))) # (\REGS|Mux4~2_combout & (((\ALU|Mux15~0_combout & \CONTROL_UNIT|ALU_FN [1])) # (\ALU|Mux29~1_combout ))) ) ) ) + + .dataa(!\ALU|Mux15~0_combout ), + .datab(!\ALU|Mux29~1_combout ), + .datac(!\REGS|Mux4~2_combout ), + .datad(!\CONTROL_UNIT|ALU_FN [1]), + .datae(!\CONTROL_UNIT|ALU_FN [0]), + .dataf(!\rt_alu[27]~201_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\ALU|Mux4~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \ALU|Mux4~0 .extended_lut = "off"; +defparam \ALU|Mux4~0 .lut_mask = 64'h5307530330753035; +defparam \ALU|Mux4~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X30_Y11_N20 +dffeas \REGS|regs[4][26] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[26]~445_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~22_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[4][26]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[4][26] .is_wysiwyg = "true"; +defparam \REGS|regs[4][26] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X31_Y8_N53 +dffeas \REGS|regs[12][26] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[26]~445_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~26_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[12][26]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[12][26] .is_wysiwyg = "true"; +defparam \REGS|regs[12][26] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X30_Y8_N51 +cyclonev_lcell_comb \REGS|Mux37~1 ( +// Equation(s): +// \REGS|Mux37~1_combout = ( \REGS|regs[4][26]~q & ( \REGS|regs[12][26]~q ) ) # ( !\REGS|regs[4][26]~q & ( \REGS|regs[12][26]~q & ( (!\PC|pc [6] & (!\PC|pc[7]~DUPLICATE_q & (!\PC|pc[9]~DUPLICATE_q & !\PC|pc[8]~DUPLICATE_q ))) ) ) ) # ( +// \REGS|regs[4][26]~q & ( !\REGS|regs[12][26]~q & ( (((\PC|pc[8]~DUPLICATE_q ) # (\PC|pc[9]~DUPLICATE_q )) # (\PC|pc[7]~DUPLICATE_q )) # (\PC|pc [6]) ) ) ) + + .dataa(!\PC|pc [6]), + .datab(!\PC|pc[7]~DUPLICATE_q ), + .datac(!\PC|pc[9]~DUPLICATE_q ), + .datad(!\PC|pc[8]~DUPLICATE_q ), + .datae(!\REGS|regs[4][26]~q ), + .dataf(!\REGS|regs[12][26]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux37~1_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux37~1 .extended_lut = "off"; +defparam \REGS|Mux37~1 .lut_mask = 64'h00007FFF8000FFFF; +defparam \REGS|Mux37~1 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X31_Y8_N2 +dffeas \REGS|regs[13][26] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[26]~445_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~31_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[13][26]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[13][26] .is_wysiwyg = "true"; +defparam \REGS|regs[13][26] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y12_N56 +dffeas \REGS|regs[5][26] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[26]~445_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~30_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[5][26]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[5][26] .is_wysiwyg = "true"; +defparam \REGS|regs[5][26] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X31_Y8_N45 +cyclonev_lcell_comb \REGS|Mux37~0 ( +// Equation(s): +// \REGS|Mux37~0_combout = ( \PC|pc [9] & ( \REGS|regs[5][26]~q ) ) # ( !\PC|pc [9] & ( \REGS|regs[5][26]~q & ( (((\PC|pc[8]~DUPLICATE_q ) # (\PC|pc [6])) # (\PC|pc[7]~DUPLICATE_q )) # (\REGS|regs[13][26]~q ) ) ) ) # ( !\PC|pc [9] & ( !\REGS|regs[5][26]~q +// & ( (\REGS|regs[13][26]~q & (!\PC|pc[7]~DUPLICATE_q & (!\PC|pc [6] & !\PC|pc[8]~DUPLICATE_q ))) ) ) ) + + .dataa(!\REGS|regs[13][26]~q ), + .datab(!\PC|pc[7]~DUPLICATE_q ), + .datac(!\PC|pc [6]), + .datad(!\PC|pc[8]~DUPLICATE_q ), + .datae(!\PC|pc [9]), + .dataf(!\REGS|regs[5][26]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux37~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux37~0 .extended_lut = "off"; +defparam \REGS|Mux37~0 .lut_mask = 64'h400000007FFFFFFF; +defparam \REGS|Mux37~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X35_Y5_N26 +dffeas \REGS|regs[30][26] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[26]~445_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~10_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[30][26]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[30][26] .is_wysiwyg = "true"; +defparam \REGS|regs[30][26] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X35_Y5_N32 +dffeas \REGS|regs[22][26] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[26]~445_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~9_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[22][26]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[22][26] .is_wysiwyg = "true"; +defparam \REGS|regs[22][26] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X35_Y5_N15 +cyclonev_lcell_comb \REGS|Mux37~5 ( +// Equation(s): +// \REGS|Mux37~5_combout = ( \PC|pc[8]~DUPLICATE_q & ( \PC|pc[6]~DUPLICATE_q & ( \REGS|regs[22][26]~q ) ) ) # ( !\PC|pc[8]~DUPLICATE_q & ( \PC|pc[6]~DUPLICATE_q & ( \REGS|regs[22][26]~q ) ) ) # ( \PC|pc[8]~DUPLICATE_q & ( !\PC|pc[6]~DUPLICATE_q & ( +// \REGS|regs[22][26]~q ) ) ) # ( !\PC|pc[8]~DUPLICATE_q & ( !\PC|pc[6]~DUPLICATE_q & ( (!\PC|pc [9] & ((!\PC|pc [7] & (\REGS|regs[30][26]~q )) # (\PC|pc [7] & ((\REGS|regs[22][26]~q ))))) # (\PC|pc [9] & (((\REGS|regs[22][26]~q )))) ) ) ) + + .dataa(!\REGS|regs[30][26]~q ), + .datab(!\PC|pc [9]), + .datac(!\REGS|regs[22][26]~q ), + .datad(!\PC|pc [7]), + .datae(!\PC|pc[8]~DUPLICATE_q ), + .dataf(!\PC|pc[6]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux37~5_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux37~5 .extended_lut = "off"; +defparam \REGS|Mux37~5 .lut_mask = 64'h470F0F0F0F0F0F0F; +defparam \REGS|Mux37~5 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X27_Y9_N8 +dffeas \REGS|regs[31][26] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[26]~445_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~19_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[31][26]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[31][26] .is_wysiwyg = "true"; +defparam \REGS|regs[31][26] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y9_N17 +dffeas \REGS|regs[23][26] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[26]~445_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~18_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[23][26]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[23][26] .is_wysiwyg = "true"; +defparam \REGS|regs[23][26] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X27_Y9_N45 +cyclonev_lcell_comb \REGS|Mux37~4 ( +// Equation(s): +// \REGS|Mux37~4_combout = ( \PC|pc [7] & ( \PC|pc[6]~DUPLICATE_q & ( \REGS|regs[23][26]~q ) ) ) # ( !\PC|pc [7] & ( \PC|pc[6]~DUPLICATE_q & ( \REGS|regs[23][26]~q ) ) ) # ( \PC|pc [7] & ( !\PC|pc[6]~DUPLICATE_q & ( \REGS|regs[23][26]~q ) ) ) # ( +// !\PC|pc [7] & ( !\PC|pc[6]~DUPLICATE_q & ( (!\PC|pc [9] & ((!\PC|pc [8] & (\REGS|regs[31][26]~q )) # (\PC|pc [8] & ((\REGS|regs[23][26]~q ))))) # (\PC|pc [9] & (((\REGS|regs[23][26]~q )))) ) ) ) + + .dataa(!\PC|pc [9]), + .datab(!\REGS|regs[31][26]~q ), + .datac(!\REGS|regs[23][26]~q ), + .datad(!\PC|pc [8]), + .datae(!\PC|pc [7]), + .dataf(!\PC|pc[6]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux37~4_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux37~4 .extended_lut = "off"; +defparam \REGS|Mux37~4 .lut_mask = 64'h270F0F0F0F0F0F0F; +defparam \REGS|Mux37~4 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X31_Y8_N12 +cyclonev_lcell_comb \REGS|Mux5~0 ( +// Equation(s): +// \REGS|Mux5~0_combout = ( \REGS|Mux37~5_combout & ( \REGS|Mux37~4_combout & ( ((!\ROM|mem~16_combout & (\REGS|Mux37~1_combout )) # (\ROM|mem~16_combout & ((\REGS|Mux37~0_combout )))) # (\ROM|mem~9_combout ) ) ) ) # ( !\REGS|Mux37~5_combout & ( +// \REGS|Mux37~4_combout & ( (!\ROM|mem~9_combout & ((!\ROM|mem~16_combout & (\REGS|Mux37~1_combout )) # (\ROM|mem~16_combout & ((\REGS|Mux37~0_combout ))))) # (\ROM|mem~9_combout & (((\ROM|mem~16_combout )))) ) ) ) # ( \REGS|Mux37~5_combout & ( +// !\REGS|Mux37~4_combout & ( (!\ROM|mem~9_combout & ((!\ROM|mem~16_combout & (\REGS|Mux37~1_combout )) # (\ROM|mem~16_combout & ((\REGS|Mux37~0_combout ))))) # (\ROM|mem~9_combout & (((!\ROM|mem~16_combout )))) ) ) ) # ( !\REGS|Mux37~5_combout & ( +// !\REGS|Mux37~4_combout & ( (!\ROM|mem~9_combout & ((!\ROM|mem~16_combout & (\REGS|Mux37~1_combout )) # (\ROM|mem~16_combout & ((\REGS|Mux37~0_combout ))))) ) ) ) + + .dataa(!\REGS|Mux37~1_combout ), + .datab(!\ROM|mem~9_combout ), + .datac(!\ROM|mem~16_combout ), + .datad(!\REGS|Mux37~0_combout ), + .datae(!\REGS|Mux37~5_combout ), + .dataf(!\REGS|Mux37~4_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux5~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux5~0 .extended_lut = "off"; +defparam \REGS|Mux5~0 .lut_mask = 64'h404C707C434F737F; +defparam \REGS|Mux5~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X23_Y7_N3 +cyclonev_lcell_comb \REGS|regs[18][26]~feeder ( +// Equation(s): +// \REGS|regs[18][26]~feeder_combout = ( \rd[26]~445_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[26]~445_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[18][26]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[18][26]~feeder .extended_lut = "off"; +defparam \REGS|regs[18][26]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[18][26]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X23_Y7_N4 +dffeas \REGS|regs[18][26] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[18][26]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~5_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[18][26]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[18][26] .is_wysiwyg = "true"; +defparam \REGS|regs[18][26] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X23_Y8_N56 +dffeas \REGS|regs[26][26] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[26]~445_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~6_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[26][26]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[26][26] .is_wysiwyg = "true"; +defparam \REGS|regs[26][26] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X23_Y8_N30 +cyclonev_lcell_comb \REGS|Mux37~2 ( +// Equation(s): +// \REGS|Mux37~2_combout = ( \REGS|regs[26][26]~q & ( \ROM|mem~0_combout ) ) # ( \REGS|regs[26][26]~q & ( !\ROM|mem~0_combout & ( \REGS|regs[18][26]~q ) ) ) # ( !\REGS|regs[26][26]~q & ( !\ROM|mem~0_combout & ( \REGS|regs[18][26]~q ) ) ) + + .dataa(gnd), + .datab(gnd), + .datac(!\REGS|regs[18][26]~q ), + .datad(gnd), + .datae(!\REGS|regs[26][26]~q ), + .dataf(!\ROM|mem~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux37~2_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux37~2 .extended_lut = "off"; +defparam \REGS|Mux37~2 .lut_mask = 64'h0F0F0F0F0000FFFF; +defparam \REGS|Mux37~2 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X28_Y11_N35 +dffeas \REGS|regs[8][26] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[26]~445_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~24_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[8][26]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[8][26] .is_wysiwyg = "true"; +defparam \REGS|regs[8][26] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X31_Y8_N43 +dffeas \REGS|regs[9][26] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[26]~445_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~29_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[9][26]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[9][26] .is_wysiwyg = "true"; +defparam \REGS|regs[9][26] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X28_Y11_N6 +cyclonev_lcell_comb \REGS|Mux5~1 ( +// Equation(s): +// \REGS|Mux5~1_combout = ( \ROM|mem~0_combout & ( \ROM|mem~15_combout & ( \REGS|regs[9][26]~q ) ) ) # ( \ROM|mem~0_combout & ( !\ROM|mem~15_combout & ( \REGS|regs[8][26]~q ) ) ) + + .dataa(gnd), + .datab(gnd), + .datac(!\REGS|regs[8][26]~q ), + .datad(!\REGS|regs[9][26]~q ), + .datae(!\ROM|mem~0_combout ), + .dataf(!\ROM|mem~15_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux5~1_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux5~1 .extended_lut = "off"; +defparam \REGS|Mux5~1 .lut_mask = 64'h00000F0F000000FF; +defparam \REGS|Mux5~1 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X31_Y8_N54 +cyclonev_lcell_comb \REGS|Mux5~2 ( +// Equation(s): +// \REGS|Mux5~2_combout = ( \REGS|Mux37~2_combout & ( \REGS|Mux5~1_combout & ( (!\ROM|mem~17_combout ) # (\REGS|Mux5~0_combout ) ) ) ) # ( !\REGS|Mux37~2_combout & ( \REGS|Mux5~1_combout & ( (!\ROM|mem~17_combout ) # (\REGS|Mux5~0_combout ) ) ) ) # ( +// \REGS|Mux37~2_combout & ( !\REGS|Mux5~1_combout & ( (!\ROM|mem~17_combout & (\ROM|mem~9_combout )) # (\ROM|mem~17_combout & ((\REGS|Mux5~0_combout ))) ) ) ) # ( !\REGS|Mux37~2_combout & ( !\REGS|Mux5~1_combout & ( (\ROM|mem~17_combout & +// \REGS|Mux5~0_combout ) ) ) ) + + .dataa(gnd), + .datab(!\ROM|mem~9_combout ), + .datac(!\ROM|mem~17_combout ), + .datad(!\REGS|Mux5~0_combout ), + .datae(!\REGS|Mux37~2_combout ), + .dataf(!\REGS|Mux5~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux5~2_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux5~2 .extended_lut = "off"; +defparam \REGS|Mux5~2 .lut_mask = 64'h000F303FF0FFF0FF; +defparam \REGS|Mux5~2 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y8_N27 +cyclonev_lcell_comb \ALU|Mux5~0 ( +// Equation(s): +// \ALU|Mux5~0_combout = ( \rt_alu[26]~181_combout & ( \REGS|Mux5~2_combout & ( (\ALU|Mux15~0_combout & \CONTROL_UNIT|ALU_FN [1]) ) ) ) # ( !\rt_alu[26]~181_combout & ( \REGS|Mux5~2_combout & ( ((!\CONTROL_UNIT|ALU_FN [0] & (\ALU|Mux15~0_combout & +// \CONTROL_UNIT|ALU_FN [1]))) # (\ALU|Mux29~1_combout ) ) ) ) # ( \rt_alu[26]~181_combout & ( !\REGS|Mux5~2_combout & ( ((!\CONTROL_UNIT|ALU_FN [0] & (\ALU|Mux15~0_combout & \CONTROL_UNIT|ALU_FN [1]))) # (\ALU|Mux29~1_combout ) ) ) ) # ( +// !\rt_alu[26]~181_combout & ( !\REGS|Mux5~2_combout & ( (\ALU|Mux15~0_combout & !\CONTROL_UNIT|ALU_FN [1]) ) ) ) + + .dataa(!\CONTROL_UNIT|ALU_FN [0]), + .datab(!\ALU|Mux15~0_combout ), + .datac(!\ALU|Mux29~1_combout ), + .datad(!\CONTROL_UNIT|ALU_FN [1]), + .datae(!\rt_alu[26]~181_combout ), + .dataf(!\REGS|Mux5~2_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\ALU|Mux5~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \ALU|Mux5~0 .extended_lut = "off"; +defparam \ALU|Mux5~0 .lut_mask = 64'h33000F2F0F2F0033; +defparam \ALU|Mux5~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X32_Y7_N14 +dffeas \REGS|regs[8][25] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[25]~443_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~24_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[8][25]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[8][25] .is_wysiwyg = "true"; +defparam \REGS|regs[8][25] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y7_N15 +cyclonev_lcell_comb \rt_alu[25]~161 ( +// Equation(s): +// \rt_alu[25]~161_combout = ( \rt_alu[17]~10_combout & ( \CONTROL_UNIT|CLASSIFIER|Equal0~1_combout & ( (\ROM|mem~0_combout & \REGS|regs[8][25]~q ) ) ) ) # ( !\rt_alu[17]~10_combout & ( \CONTROL_UNIT|CLASSIFIER|Equal0~1_combout & ( (\ROM|mem~0_combout +// & \REGS|regs[8][25]~q ) ) ) ) # ( !\rt_alu[17]~10_combout & ( !\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout & ( (\ROM|mem~0_combout & (\REGS|regs[8][25]~q & (!\ROM|mem~9_combout & !\rt_alu[17]~11_combout ))) ) ) ) + + .dataa(!\ROM|mem~0_combout ), + .datab(!\REGS|regs[8][25]~q ), + .datac(!\ROM|mem~9_combout ), + .datad(!\rt_alu[17]~11_combout ), + .datae(!\rt_alu[17]~10_combout ), + .dataf(!\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[25]~161_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[25]~161 .extended_lut = "off"; +defparam \rt_alu[25]~161 .lut_mask = 64'h1000000011111111; +defparam \rt_alu[25]~161 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X28_Y7_N41 +dffeas \REGS|regs[25][25] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[25]~443_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~13_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[25][25]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[25][25] .is_wysiwyg = "true"; +defparam \REGS|regs[25][25] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X25_Y7_N16 +dffeas \REGS|regs[24][25] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[25]~443_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~4_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[24][25]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[24][25] .is_wysiwyg = "true"; +defparam \REGS|regs[24][25] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X25_Y8_N28 +dffeas \REGS|regs[16][25] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[25]~443_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~2_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[16][25]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[16][25] .is_wysiwyg = "true"; +defparam \REGS|regs[16][25] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X28_Y7_N36 +cyclonev_lcell_comb \rt_alu[25]~159 ( +// Equation(s): +// \rt_alu[25]~159_combout = ( \REGS|regs[16][25]~q & ( \ROM|mem~10_combout & ( (!\ROM|mem~0_combout ) # (\REGS|regs[24][25]~q ) ) ) ) # ( !\REGS|regs[16][25]~q & ( \ROM|mem~10_combout & ( (\ROM|mem~0_combout & \REGS|regs[24][25]~q ) ) ) ) # ( +// \REGS|regs[16][25]~q & ( !\ROM|mem~10_combout & ( (!\ROM|mem~0_combout ) # (\REGS|regs[25][25]~q ) ) ) ) # ( !\REGS|regs[16][25]~q & ( !\ROM|mem~10_combout & ( (\REGS|regs[25][25]~q & \ROM|mem~0_combout ) ) ) ) + + .dataa(gnd), + .datab(!\REGS|regs[25][25]~q ), + .datac(!\ROM|mem~0_combout ), + .datad(!\REGS|regs[24][25]~q ), + .datae(!\REGS|regs[16][25]~q ), + .dataf(!\ROM|mem~10_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[25]~159_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[25]~159 .extended_lut = "off"; +defparam \rt_alu[25]~159 .lut_mask = 64'h0303F3F3000FF0FF; +defparam \rt_alu[25]~159 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X32_Y5_N32 +dffeas \REGS|regs[27][25] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[25]~443_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~15_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[27][25]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[27][25] .is_wysiwyg = "true"; +defparam \REGS|regs[27][25] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X32_Y5_N25 +dffeas \REGS|regs[19][25] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[25]~443_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~14_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[19][25]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[19][25] .is_wysiwyg = "true"; +defparam \REGS|regs[19][25] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y5_N30 +cyclonev_lcell_comb \REGS|Mux38~5 ( +// Equation(s): +// \REGS|Mux38~5_combout = ( \REGS|regs[19][25]~q & ( (!\ROM|mem~0_combout ) # (\REGS|regs[27][25]~q ) ) ) # ( !\REGS|regs[19][25]~q & ( (\ROM|mem~0_combout & \REGS|regs[27][25]~q ) ) ) + + .dataa(gnd), + .datab(gnd), + .datac(!\ROM|mem~0_combout ), + .datad(!\REGS|regs[27][25]~q ), + .datae(gnd), + .dataf(!\REGS|regs[19][25]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux38~5_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux38~5 .extended_lut = "off"; +defparam \REGS|Mux38~5 .lut_mask = 64'h000F000FF0FFF0FF; +defparam \REGS|Mux38~5 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X31_Y4_N51 +cyclonev_lcell_comb \REGS|regs[22][25]~feeder ( +// Equation(s): +// \REGS|regs[22][25]~feeder_combout = ( \rd[25]~443_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[25]~443_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[22][25]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[22][25]~feeder .extended_lut = "off"; +defparam \REGS|regs[22][25]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[22][25]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X31_Y4_N53 +dffeas \REGS|regs[22][25] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[22][25]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~9_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[22][25]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[22][25] .is_wysiwyg = "true"; +defparam \REGS|regs[22][25] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X32_Y5_N41 +dffeas \REGS|regs[30][25] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[25]~443_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~10_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[30][25]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[30][25] .is_wysiwyg = "true"; +defparam \REGS|regs[30][25] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X31_Y4_N12 +cyclonev_lcell_comb \REGS|Mux38~2 ( +// Equation(s): +// \REGS|Mux38~2_combout = ( \PC|pc [9] & ( \PC|pc[8]~DUPLICATE_q & ( \REGS|regs[22][25]~q ) ) ) # ( !\PC|pc [9] & ( \PC|pc[8]~DUPLICATE_q & ( \REGS|regs[22][25]~q ) ) ) # ( \PC|pc [9] & ( !\PC|pc[8]~DUPLICATE_q & ( \REGS|regs[22][25]~q ) ) ) # ( +// !\PC|pc [9] & ( !\PC|pc[8]~DUPLICATE_q & ( (!\PC|pc[6]~DUPLICATE_q & ((!\PC|pc [7] & ((\REGS|regs[30][25]~q ))) # (\PC|pc [7] & (\REGS|regs[22][25]~q )))) # (\PC|pc[6]~DUPLICATE_q & (\REGS|regs[22][25]~q )) ) ) ) + + .dataa(!\REGS|regs[22][25]~q ), + .datab(!\PC|pc[6]~DUPLICATE_q ), + .datac(!\PC|pc [7]), + .datad(!\REGS|regs[30][25]~q ), + .datae(!\PC|pc [9]), + .dataf(!\PC|pc[8]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux38~2_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux38~2 .extended_lut = "off"; +defparam \REGS|Mux38~2 .lut_mask = 64'h15D5555555555555; +defparam \REGS|Mux38~2 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X23_Y9_N52 +dffeas \REGS|regs[20][25] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[25]~443_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~7_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[20][25]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[20][25] .is_wysiwyg = "true"; +defparam \REGS|regs[20][25] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X32_Y8_N40 +dffeas \REGS|regs[29][25] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[25]~443_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~17_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[29][25]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[29][25] .is_wysiwyg = "true"; +defparam \REGS|regs[29][25] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X28_Y7_N19 +dffeas \REGS|regs[28][25] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[25]~443_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~8_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[28][25]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[28][25] .is_wysiwyg = "true"; +defparam \REGS|regs[28][25] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y8_N24 +cyclonev_lcell_comb \rt_alu[25]~157 ( +// Equation(s): +// \rt_alu[25]~157_combout = ( \REGS|regs[28][25]~q & ( (!\ROM|mem~0_combout & (((\REGS|regs[20][25]~q )))) # (\ROM|mem~0_combout & (((\REGS|regs[29][25]~q )) # (\ROM|mem~10_combout ))) ) ) # ( !\REGS|regs[28][25]~q & ( (!\ROM|mem~0_combout & +// (((\REGS|regs[20][25]~q )))) # (\ROM|mem~0_combout & (!\ROM|mem~10_combout & ((\REGS|regs[29][25]~q )))) ) ) + + .dataa(!\ROM|mem~10_combout ), + .datab(!\ROM|mem~0_combout ), + .datac(!\REGS|regs[20][25]~q ), + .datad(!\REGS|regs[29][25]~q ), + .datae(gnd), + .dataf(!\REGS|regs[28][25]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[25]~157_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[25]~157 .extended_lut = "off"; +defparam \rt_alu[25]~157 .lut_mask = 64'h0C2E0C2E1D3F1D3F; +defparam \rt_alu[25]~157 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y8_N0 +cyclonev_lcell_comb \rt_alu[25]~158 ( +// Equation(s): +// \rt_alu[25]~158_combout = ( \REGS|Mux38~2_combout & ( \rt_alu[25]~157_combout & ( (!\ROM|mem~13_combout ) # ((!\ROM|mem~12_combout ) # (\REGS|Mux38~3_combout )) ) ) ) # ( !\REGS|Mux38~2_combout & ( \rt_alu[25]~157_combout & ( (!\ROM|mem~12_combout ) +// # ((\ROM|mem~13_combout & \REGS|Mux38~3_combout )) ) ) ) # ( \REGS|Mux38~2_combout & ( !\rt_alu[25]~157_combout & ( (\ROM|mem~12_combout & ((!\ROM|mem~13_combout ) # (\REGS|Mux38~3_combout ))) ) ) ) # ( !\REGS|Mux38~2_combout & ( +// !\rt_alu[25]~157_combout & ( (\ROM|mem~13_combout & (\ROM|mem~12_combout & \REGS|Mux38~3_combout )) ) ) ) + + .dataa(gnd), + .datab(!\ROM|mem~13_combout ), + .datac(!\ROM|mem~12_combout ), + .datad(!\REGS|Mux38~3_combout ), + .datae(!\REGS|Mux38~2_combout ), + .dataf(!\rt_alu[25]~157_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[25]~158_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[25]~158 .extended_lut = "off"; +defparam \rt_alu[25]~158 .lut_mask = 64'h00030C0FF0F3FCFF; +defparam \rt_alu[25]~158 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X28_Y9_N5 +dffeas \REGS|regs[26][25] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[25]~443_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~6_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[26][25]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[26][25] .is_wysiwyg = "true"; +defparam \REGS|regs[26][25] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X28_Y9_N47 +dffeas \REGS|regs[18][25] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[25]~443_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~5_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[18][25]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[18][25] .is_wysiwyg = "true"; +defparam \REGS|regs[18][25] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X28_Y9_N9 +cyclonev_lcell_comb \REGS|Mux38~4 ( +// Equation(s): +// \REGS|Mux38~4_combout = ( \REGS|regs[18][25]~q & ( \ROM|mem~0_combout & ( \REGS|regs[26][25]~q ) ) ) # ( !\REGS|regs[18][25]~q & ( \ROM|mem~0_combout & ( \REGS|regs[26][25]~q ) ) ) # ( \REGS|regs[18][25]~q & ( !\ROM|mem~0_combout ) ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(!\REGS|regs[26][25]~q ), + .datae(!\REGS|regs[18][25]~q ), + .dataf(!\ROM|mem~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux38~4_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux38~4 .extended_lut = "off"; +defparam \REGS|Mux38~4 .lut_mask = 64'h0000FFFF00FF00FF; +defparam \REGS|Mux38~4 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y8_N30 +cyclonev_lcell_comb \rt_alu[25]~160 ( +// Equation(s): +// \rt_alu[25]~160_combout = ( \rt_alu[25]~158_combout & ( \REGS|Mux38~4_combout & ( ((!\rt_alu[17]~5_combout & (\rt_alu[25]~159_combout )) # (\rt_alu[17]~5_combout & ((\REGS|Mux38~5_combout )))) # (\rt_alu[17]~4_combout ) ) ) ) # ( +// !\rt_alu[25]~158_combout & ( \REGS|Mux38~4_combout & ( (!\rt_alu[17]~5_combout & (\rt_alu[25]~159_combout & (!\rt_alu[17]~4_combout ))) # (\rt_alu[17]~5_combout & (((\REGS|Mux38~5_combout ) # (\rt_alu[17]~4_combout )))) ) ) ) # ( +// \rt_alu[25]~158_combout & ( !\REGS|Mux38~4_combout & ( (!\rt_alu[17]~5_combout & (((\rt_alu[17]~4_combout )) # (\rt_alu[25]~159_combout ))) # (\rt_alu[17]~5_combout & (((!\rt_alu[17]~4_combout & \REGS|Mux38~5_combout )))) ) ) ) # ( +// !\rt_alu[25]~158_combout & ( !\REGS|Mux38~4_combout & ( (!\rt_alu[17]~4_combout & ((!\rt_alu[17]~5_combout & (\rt_alu[25]~159_combout )) # (\rt_alu[17]~5_combout & ((\REGS|Mux38~5_combout ))))) ) ) ) + + .dataa(!\rt_alu[17]~5_combout ), + .datab(!\rt_alu[25]~159_combout ), + .datac(!\rt_alu[17]~4_combout ), + .datad(!\REGS|Mux38~5_combout ), + .datae(!\rt_alu[25]~158_combout ), + .dataf(!\REGS|Mux38~4_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[25]~160_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[25]~160 .extended_lut = "off"; +defparam \rt_alu[25]~160 .lut_mask = 64'h20702A7A25752F7F; +defparam \rt_alu[25]~160 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X32_Y8_N11 +dffeas \REGS|regs[9][25]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[25]~443_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~29_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[9][25]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[9][25]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[9][25]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: FF_X25_Y6_N49 +dffeas \REGS|regs[1][25] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[25]~443_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~28_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[1][25]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[1][25] .is_wysiwyg = "true"; +defparam \REGS|regs[1][25] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X28_Y8_N41 +dffeas \REGS|regs[10][25] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[25]~443_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~33_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[10][25]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[10][25] .is_wysiwyg = "true"; +defparam \REGS|regs[10][25] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X28_Y8_N32 +dffeas \REGS|regs[11][25] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[25]~443_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~37_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[11][25]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[11][25] .is_wysiwyg = "true"; +defparam \REGS|regs[11][25] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X28_Y8_N23 +dffeas \REGS|regs[2][25]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[25]~443_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~32_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[2][25]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[2][25]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[2][25]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X28_Y8_N9 +cyclonev_lcell_comb \rt_alu[25]~152 ( +// Equation(s): +// \rt_alu[25]~152_combout = ( \ROM|mem~0_combout & ( \ROM|mem~10_combout & ( \REGS|regs[10][25]~q ) ) ) # ( !\ROM|mem~0_combout & ( \ROM|mem~10_combout & ( \REGS|regs[2][25]~DUPLICATE_q ) ) ) # ( \ROM|mem~0_combout & ( !\ROM|mem~10_combout & ( +// \REGS|regs[11][25]~q ) ) ) # ( !\ROM|mem~0_combout & ( !\ROM|mem~10_combout & ( \REGS|regs[2][25]~DUPLICATE_q ) ) ) + + .dataa(gnd), + .datab(!\REGS|regs[10][25]~q ), + .datac(!\REGS|regs[11][25]~q ), + .datad(!\REGS|regs[2][25]~DUPLICATE_q ), + .datae(!\ROM|mem~0_combout ), + .dataf(!\ROM|mem~10_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[25]~152_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[25]~152 .extended_lut = "off"; +defparam \rt_alu[25]~152 .lut_mask = 64'h00FF0F0F00FF3333; +defparam \rt_alu[25]~152 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X27_Y8_N7 +dffeas \REGS|regs[13][25] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[25]~443_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~31_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[13][25]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[13][25] .is_wysiwyg = "true"; +defparam \REGS|regs[13][25] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y8_N14 +dffeas \REGS|regs[5][25] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[25]~443_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~30_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[5][25]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[5][25] .is_wysiwyg = "true"; +defparam \REGS|regs[5][25] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X31_Y8_N3 +cyclonev_lcell_comb \REGS|Mux38~1 ( +// Equation(s): +// \REGS|Mux38~1_combout = ( \REGS|regs[13][25]~q & ( \REGS|regs[5][25]~q ) ) # ( !\REGS|regs[13][25]~q & ( \REGS|regs[5][25]~q & ( (((\PC|pc[9]~DUPLICATE_q ) # (\PC|pc [8])) # (\PC|pc [6])) # (\PC|pc[7]~DUPLICATE_q ) ) ) ) # ( \REGS|regs[13][25]~q & ( +// !\REGS|regs[5][25]~q & ( (!\PC|pc[7]~DUPLICATE_q & (!\PC|pc [6] & (!\PC|pc [8] & !\PC|pc[9]~DUPLICATE_q ))) ) ) ) + + .dataa(!\PC|pc[7]~DUPLICATE_q ), + .datab(!\PC|pc [6]), + .datac(!\PC|pc [8]), + .datad(!\PC|pc[9]~DUPLICATE_q ), + .datae(!\REGS|regs[13][25]~q ), + .dataf(!\REGS|regs[5][25]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux38~1_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux38~1 .extended_lut = "off"; +defparam \REGS|Mux38~1 .lut_mask = 64'h000080007FFFFFFF; +defparam \REGS|Mux38~1 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X27_Y8_N56 +dffeas \REGS|regs[4][25] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[25]~443_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~22_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[4][25]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[4][25] .is_wysiwyg = "true"; +defparam \REGS|regs[4][25] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X25_Y9_N18 +cyclonev_lcell_comb \REGS|regs[12][25]~feeder ( +// Equation(s): +// \REGS|regs[12][25]~feeder_combout = ( \rd[25]~443_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[25]~443_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[12][25]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[12][25]~feeder .extended_lut = "off"; +defparam \REGS|regs[12][25]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[12][25]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X25_Y9_N19 +dffeas \REGS|regs[12][25] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[12][25]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~26_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[12][25]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[12][25] .is_wysiwyg = "true"; +defparam \REGS|regs[12][25] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X27_Y8_N18 +cyclonev_lcell_comb \REGS|Mux38~0 ( +// Equation(s): +// \REGS|Mux38~0_combout = ( \PC|pc[7]~DUPLICATE_q & ( \REGS|regs[12][25]~q & ( \REGS|regs[4][25]~q ) ) ) # ( !\PC|pc[7]~DUPLICATE_q & ( \REGS|regs[12][25]~q & ( ((!\PC|pc [6] & (!\PC|pc [9] & !\PC|pc[8]~DUPLICATE_q ))) # (\REGS|regs[4][25]~q ) ) ) ) # +// ( \PC|pc[7]~DUPLICATE_q & ( !\REGS|regs[12][25]~q & ( \REGS|regs[4][25]~q ) ) ) # ( !\PC|pc[7]~DUPLICATE_q & ( !\REGS|regs[12][25]~q & ( (\REGS|regs[4][25]~q & (((\PC|pc[8]~DUPLICATE_q ) # (\PC|pc [9])) # (\PC|pc [6]))) ) ) ) + + .dataa(!\PC|pc [6]), + .datab(!\REGS|regs[4][25]~q ), + .datac(!\PC|pc [9]), + .datad(!\PC|pc[8]~DUPLICATE_q ), + .datae(!\PC|pc[7]~DUPLICATE_q ), + .dataf(!\REGS|regs[12][25]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux38~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux38~0 .extended_lut = "off"; +defparam \REGS|Mux38~0 .lut_mask = 64'h13333333B3333333; +defparam \REGS|Mux38~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y8_N27 +cyclonev_lcell_comb \rt_alu[25]~154 ( +// Equation(s): +// \rt_alu[25]~154_combout = ( \REGS|Mux38~0_combout & ( (!\ROM|mem~0_combout ) # ((\ROM|mem~10_combout ) # (\REGS|Mux38~1_combout )) ) ) # ( !\REGS|Mux38~0_combout & ( (\ROM|mem~0_combout & (\REGS|Mux38~1_combout & !\ROM|mem~10_combout )) ) ) + + .dataa(gnd), + .datab(!\ROM|mem~0_combout ), + .datac(!\REGS|Mux38~1_combout ), + .datad(!\ROM|mem~10_combout ), + .datae(gnd), + .dataf(!\REGS|Mux38~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[25]~154_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[25]~154 .extended_lut = "off"; +defparam \rt_alu[25]~154 .lut_mask = 64'h03000300CFFFCFFF; +defparam \rt_alu[25]~154 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X27_Y7_N56 +dffeas \REGS|regs[15][25] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[25]~443_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~39_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[15][25]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[15][25] .is_wysiwyg = "true"; +defparam \REGS|regs[15][25] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y7_N44 +dffeas \REGS|regs[14][25] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[25]~443_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~35_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[14][25]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[14][25] .is_wysiwyg = "true"; +defparam \REGS|regs[14][25] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y7_N38 +dffeas \REGS|regs[6][25] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[25]~443_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~34_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[6][25]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[6][25] .is_wysiwyg = "true"; +defparam \REGS|regs[6][25] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X27_Y7_N9 +cyclonev_lcell_comb \rt_alu[25]~153 ( +// Equation(s): +// \rt_alu[25]~153_combout = ( \ROM|mem~0_combout & ( \ROM|mem~10_combout & ( \REGS|regs[14][25]~q ) ) ) # ( !\ROM|mem~0_combout & ( \ROM|mem~10_combout & ( \REGS|regs[6][25]~q ) ) ) # ( \ROM|mem~0_combout & ( !\ROM|mem~10_combout & ( +// \REGS|regs[15][25]~q ) ) ) # ( !\ROM|mem~0_combout & ( !\ROM|mem~10_combout & ( \REGS|regs[6][25]~q ) ) ) + + .dataa(!\REGS|regs[15][25]~q ), + .datab(gnd), + .datac(!\REGS|regs[14][25]~q ), + .datad(!\REGS|regs[6][25]~q ), + .datae(!\ROM|mem~0_combout ), + .dataf(!\ROM|mem~10_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[25]~153_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[25]~153 .extended_lut = "off"; +defparam \rt_alu[25]~153 .lut_mask = 64'h00FF555500FF0F0F; +defparam \rt_alu[25]~153 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y8_N18 +cyclonev_lcell_comb \rt_alu[25]~155 ( +// Equation(s): +// \rt_alu[25]~155_combout = ( \rt_alu[25]~154_combout & ( \rt_alu[25]~153_combout & ( (!\rt_alu[17]~10_combout ) # (\rt_alu[25]~152_combout ) ) ) ) # ( !\rt_alu[25]~154_combout & ( \rt_alu[25]~153_combout & ( (!\rt_alu[17]~10_combout & +// (\ROM|mem~12_combout )) # (\rt_alu[17]~10_combout & ((\rt_alu[25]~152_combout ))) ) ) ) # ( \rt_alu[25]~154_combout & ( !\rt_alu[25]~153_combout & ( (!\rt_alu[17]~10_combout & (!\ROM|mem~12_combout )) # (\rt_alu[17]~10_combout & +// ((\rt_alu[25]~152_combout ))) ) ) ) # ( !\rt_alu[25]~154_combout & ( !\rt_alu[25]~153_combout & ( (\rt_alu[17]~10_combout & \rt_alu[25]~152_combout ) ) ) ) + + .dataa(!\rt_alu[17]~10_combout ), + .datab(gnd), + .datac(!\ROM|mem~12_combout ), + .datad(!\rt_alu[25]~152_combout ), + .datae(!\rt_alu[25]~154_combout ), + .dataf(!\rt_alu[25]~153_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[25]~155_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[25]~155 .extended_lut = "off"; +defparam \rt_alu[25]~155 .lut_mask = 64'h0055A0F50A5FAAFF; +defparam \rt_alu[25]~155 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y8_N42 +cyclonev_lcell_comb \rt_alu[25]~156 ( +// Equation(s): +// \rt_alu[25]~156_combout = ( \rt_alu[25]~155_combout & ( ((!\ROM|mem~0_combout & ((\REGS|regs[1][25]~q ))) # (\ROM|mem~0_combout & (\REGS|regs[9][25]~DUPLICATE_q ))) # (\rt_alu[17]~11_combout ) ) ) # ( !\rt_alu[25]~155_combout & ( +// (!\rt_alu[17]~11_combout & ((!\ROM|mem~0_combout & ((\REGS|regs[1][25]~q ))) # (\ROM|mem~0_combout & (\REGS|regs[9][25]~DUPLICATE_q )))) ) ) + + .dataa(!\ROM|mem~0_combout ), + .datab(!\REGS|regs[9][25]~DUPLICATE_q ), + .datac(!\REGS|regs[1][25]~q ), + .datad(!\rt_alu[17]~11_combout ), + .datae(gnd), + .dataf(!\rt_alu[25]~155_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[25]~156_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[25]~156 .extended_lut = "off"; +defparam \rt_alu[25]~156 .lut_mask = 64'h1B001B001BFF1BFF; +defparam \rt_alu[25]~156 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y8_N48 +cyclonev_lcell_comb \rt_alu[25]~162 ( +// Equation(s): +// \rt_alu[25]~162_combout = ( \rt_alu[31]~40_combout & ( \rt_alu[25]~156_combout & ( ((!\rt_alu[31]~39_combout ) # (\rt_alu[25]~160_combout )) # (\rt_alu[25]~161_combout ) ) ) ) # ( !\rt_alu[31]~40_combout & ( \rt_alu[25]~156_combout & ( +// (\rt_alu[25]~161_combout & \rt_alu[31]~39_combout ) ) ) ) # ( \rt_alu[31]~40_combout & ( !\rt_alu[25]~156_combout & ( (\rt_alu[31]~39_combout & ((\rt_alu[25]~160_combout ) # (\rt_alu[25]~161_combout ))) ) ) ) # ( !\rt_alu[31]~40_combout & ( +// !\rt_alu[25]~156_combout & ( (\rt_alu[25]~161_combout & \rt_alu[31]~39_combout ) ) ) ) + + .dataa(gnd), + .datab(!\rt_alu[25]~161_combout ), + .datac(!\rt_alu[31]~39_combout ), + .datad(!\rt_alu[25]~160_combout ), + .datae(!\rt_alu[31]~40_combout ), + .dataf(!\rt_alu[25]~156_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[25]~162_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[25]~162 .extended_lut = "off"; +defparam \rt_alu[25]~162 .lut_mask = 64'h0303030F0303F3FF; +defparam \rt_alu[25]~162 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y8_N12 +cyclonev_lcell_comb \ALU|Mux6~0 ( +// Equation(s): +// \ALU|Mux6~0_combout = ( \CONTROL_UNIT|ALU_FN [1] & ( \rt_alu[25]~162_combout & ( (!\REGS|Mux6~2_combout & (((!\CONTROL_UNIT|ALU_FN [0] & \ALU|Mux15~0_combout )) # (\ALU|Mux29~1_combout ))) # (\REGS|Mux6~2_combout & (((\ALU|Mux15~0_combout )))) ) ) ) # +// ( !\CONTROL_UNIT|ALU_FN [1] & ( \rt_alu[25]~162_combout & ( (\ALU|Mux29~1_combout & !\REGS|Mux6~2_combout ) ) ) ) # ( \CONTROL_UNIT|ALU_FN [1] & ( !\rt_alu[25]~162_combout & ( (\REGS|Mux6~2_combout & (((!\CONTROL_UNIT|ALU_FN [0] & \ALU|Mux15~0_combout +// )) # (\ALU|Mux29~1_combout ))) ) ) ) # ( !\CONTROL_UNIT|ALU_FN [1] & ( !\rt_alu[25]~162_combout & ( (!\REGS|Mux6~2_combout & (\ALU|Mux15~0_combout )) # (\REGS|Mux6~2_combout & ((\ALU|Mux29~1_combout ))) ) ) ) + + .dataa(!\CONTROL_UNIT|ALU_FN [0]), + .datab(!\ALU|Mux15~0_combout ), + .datac(!\ALU|Mux29~1_combout ), + .datad(!\REGS|Mux6~2_combout ), + .datae(!\CONTROL_UNIT|ALU_FN [1]), + .dataf(!\rt_alu[25]~162_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\ALU|Mux6~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \ALU|Mux6~0 .extended_lut = "off"; +defparam \ALU|Mux6~0 .lut_mask = 64'h330F002F0F002F33; +defparam \ALU|Mux6~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y8_N54 +cyclonev_lcell_comb \ALU|adder_unit|operand[25]~9 ( +// Equation(s): +// \ALU|adder_unit|operand[25]~9_combout = ( \rt_alu[31]~40_combout & ( \rt_alu[25]~156_combout & ( !\CONTROL_UNIT|ALU_FN [1] $ ((((!\rt_alu[31]~39_combout ) # (\rt_alu[25]~160_combout )) # (\rt_alu[25]~161_combout ))) ) ) ) # ( !\rt_alu[31]~40_combout & +// ( \rt_alu[25]~156_combout & ( !\CONTROL_UNIT|ALU_FN [1] $ (((\rt_alu[25]~161_combout & \rt_alu[31]~39_combout ))) ) ) ) # ( \rt_alu[31]~40_combout & ( !\rt_alu[25]~156_combout & ( !\CONTROL_UNIT|ALU_FN [1] $ (((\rt_alu[31]~39_combout & +// ((\rt_alu[25]~160_combout ) # (\rt_alu[25]~161_combout ))))) ) ) ) # ( !\rt_alu[31]~40_combout & ( !\rt_alu[25]~156_combout & ( !\CONTROL_UNIT|ALU_FN [1] $ (((\rt_alu[25]~161_combout & \rt_alu[31]~39_combout ))) ) ) ) + + .dataa(!\CONTROL_UNIT|ALU_FN [1]), + .datab(!\rt_alu[25]~161_combout ), + .datac(!\rt_alu[31]~39_combout ), + .datad(!\rt_alu[25]~160_combout ), + .datae(!\rt_alu[31]~40_combout ), + .dataf(!\rt_alu[25]~156_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\ALU|adder_unit|operand[25]~9_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \ALU|adder_unit|operand[25]~9 .extended_lut = "off"; +defparam \ALU|adder_unit|operand[25]~9 .lut_mask = 64'hA9A9A9A5A9A95955; +defparam \ALU|adder_unit|operand[25]~9 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X28_Y11_N44 +dffeas \REGS|regs[8][24] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[24]~441_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~24_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[8][24]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[8][24] .is_wysiwyg = "true"; +defparam \REGS|regs[8][24] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X31_Y11_N5 +dffeas \REGS|regs[9][24] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[24]~441_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~29_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[9][24]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[9][24] .is_wysiwyg = "true"; +defparam \REGS|regs[9][24] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X31_Y13_N58 +dffeas \REGS|regs[1][24]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[24]~441_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~28_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[1][24]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[1][24]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[1][24]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: FF_X33_Y8_N20 +dffeas \REGS|regs[12][24] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[24]~441_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~26_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[12][24]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[12][24] .is_wysiwyg = "true"; +defparam \REGS|regs[12][24] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X33_Y8_N44 +dffeas \REGS|regs[4][24] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[24]~441_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~22_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[4][24]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[4][24] .is_wysiwyg = "true"; +defparam \REGS|regs[4][24] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X33_Y8_N18 +cyclonev_lcell_comb \REGS|Mux39~1 ( +// Equation(s): +// \REGS|Mux39~1_combout = ( \REGS|regs[12][24]~q & ( \REGS|regs[4][24]~q ) ) # ( !\REGS|regs[12][24]~q & ( \REGS|regs[4][24]~q & ( (((\PC|pc [6]) # (\PC|pc[9]~DUPLICATE_q )) # (\PC|pc[7]~DUPLICATE_q )) # (\PC|pc[8]~DUPLICATE_q ) ) ) ) # ( +// \REGS|regs[12][24]~q & ( !\REGS|regs[4][24]~q & ( (!\PC|pc[8]~DUPLICATE_q & (!\PC|pc[7]~DUPLICATE_q & (!\PC|pc[9]~DUPLICATE_q & !\PC|pc [6]))) ) ) ) + + .dataa(!\PC|pc[8]~DUPLICATE_q ), + .datab(!\PC|pc[7]~DUPLICATE_q ), + .datac(!\PC|pc[9]~DUPLICATE_q ), + .datad(!\PC|pc [6]), + .datae(!\REGS|regs[12][24]~q ), + .dataf(!\REGS|regs[4][24]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux39~1_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux39~1 .extended_lut = "off"; +defparam \REGS|Mux39~1 .lut_mask = 64'h000080007FFFFFFF; +defparam \REGS|Mux39~1 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X27_Y11_N38 +dffeas \REGS|regs[5][24] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[24]~441_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~30_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[5][24]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[5][24] .is_wysiwyg = "true"; +defparam \REGS|regs[5][24] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y11_N19 +dffeas \REGS|regs[13][24] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[24]~441_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~31_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[13][24]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[13][24] .is_wysiwyg = "true"; +defparam \REGS|regs[13][24] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X27_Y11_N33 +cyclonev_lcell_comb \REGS|Mux39~0 ( +// Equation(s): +// \REGS|Mux39~0_combout = ( \PC|pc [8] & ( \PC|pc [7] & ( \REGS|regs[5][24]~q ) ) ) # ( !\PC|pc [8] & ( \PC|pc [7] & ( \REGS|regs[5][24]~q ) ) ) # ( \PC|pc [8] & ( !\PC|pc [7] & ( \REGS|regs[5][24]~q ) ) ) # ( !\PC|pc [8] & ( !\PC|pc [7] & ( +// (!\PC|pc[6]~DUPLICATE_q & ((!\PC|pc [9] & ((\REGS|regs[13][24]~q ))) # (\PC|pc [9] & (\REGS|regs[5][24]~q )))) # (\PC|pc[6]~DUPLICATE_q & (\REGS|regs[5][24]~q )) ) ) ) + + .dataa(!\REGS|regs[5][24]~q ), + .datab(!\REGS|regs[13][24]~q ), + .datac(!\PC|pc[6]~DUPLICATE_q ), + .datad(!\PC|pc [9]), + .datae(!\PC|pc [8]), + .dataf(!\PC|pc [7]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux39~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux39~0 .extended_lut = "off"; +defparam \REGS|Mux39~0 .lut_mask = 64'h3555555555555555; +defparam \REGS|Mux39~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X31_Y11_N39 +cyclonev_lcell_comb \rt_alu[24]~135 ( +// Equation(s): +// \rt_alu[24]~135_combout = ( \REGS|Mux39~0_combout & ( ((\ROM|mem~0_combout & !\ROM|mem~10_combout )) # (\REGS|Mux39~1_combout ) ) ) # ( !\REGS|Mux39~0_combout & ( (\REGS|Mux39~1_combout & ((!\ROM|mem~0_combout ) # (\ROM|mem~10_combout ))) ) ) + + .dataa(!\ROM|mem~0_combout ), + .datab(!\ROM|mem~10_combout ), + .datac(gnd), + .datad(!\REGS|Mux39~1_combout ), + .datae(gnd), + .dataf(!\REGS|Mux39~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[24]~135_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[24]~135 .extended_lut = "off"; +defparam \rt_alu[24]~135 .lut_mask = 64'h00BB00BB44FF44FF; +defparam \rt_alu[24]~135 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X28_Y8_N5 +dffeas \REGS|regs[11][24] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[24]~441_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~37_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[11][24]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[11][24] .is_wysiwyg = "true"; +defparam \REGS|regs[11][24] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X28_Y8_N49 +dffeas \REGS|regs[2][24] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[24]~441_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~32_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[2][24]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[2][24] .is_wysiwyg = "true"; +defparam \REGS|regs[2][24] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X28_Y8_N56 +dffeas \REGS|regs[10][24] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[24]~441_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~33_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[10][24]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[10][24] .is_wysiwyg = "true"; +defparam \REGS|regs[10][24] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X28_Y8_N57 +cyclonev_lcell_comb \rt_alu[24]~133 ( +// Equation(s): +// \rt_alu[24]~133_combout = ( \ROM|mem~0_combout & ( \ROM|mem~10_combout & ( \REGS|regs[10][24]~q ) ) ) # ( !\ROM|mem~0_combout & ( \ROM|mem~10_combout & ( \REGS|regs[2][24]~q ) ) ) # ( \ROM|mem~0_combout & ( !\ROM|mem~10_combout & ( +// \REGS|regs[11][24]~q ) ) ) # ( !\ROM|mem~0_combout & ( !\ROM|mem~10_combout & ( \REGS|regs[2][24]~q ) ) ) + + .dataa(!\REGS|regs[11][24]~q ), + .datab(gnd), + .datac(!\REGS|regs[2][24]~q ), + .datad(!\REGS|regs[10][24]~q ), + .datae(!\ROM|mem~0_combout ), + .dataf(!\ROM|mem~10_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[24]~133_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[24]~133 .extended_lut = "off"; +defparam \rt_alu[24]~133 .lut_mask = 64'h0F0F55550F0F00FF; +defparam \rt_alu[24]~133 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X32_Y6_N26 +dffeas \REGS|regs[14][24] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[24]~441_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~35_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[14][24]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[14][24] .is_wysiwyg = "true"; +defparam \REGS|regs[14][24] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X32_Y6_N56 +dffeas \REGS|regs[15][24] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[24]~441_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~39_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[15][24]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[15][24] .is_wysiwyg = "true"; +defparam \REGS|regs[15][24] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X32_Y6_N11 +dffeas \REGS|regs[6][24]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[24]~441_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~34_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[6][24]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[6][24]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[6][24]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y6_N18 +cyclonev_lcell_comb \rt_alu[24]~134 ( +// Equation(s): +// \rt_alu[24]~134_combout = ( \ROM|mem~0_combout & ( \ROM|mem~10_combout & ( \REGS|regs[14][24]~q ) ) ) # ( !\ROM|mem~0_combout & ( \ROM|mem~10_combout & ( \REGS|regs[6][24]~DUPLICATE_q ) ) ) # ( \ROM|mem~0_combout & ( !\ROM|mem~10_combout & ( +// \REGS|regs[15][24]~q ) ) ) # ( !\ROM|mem~0_combout & ( !\ROM|mem~10_combout & ( \REGS|regs[6][24]~DUPLICATE_q ) ) ) + + .dataa(!\REGS|regs[14][24]~q ), + .datab(gnd), + .datac(!\REGS|regs[15][24]~q ), + .datad(!\REGS|regs[6][24]~DUPLICATE_q ), + .datae(!\ROM|mem~0_combout ), + .dataf(!\ROM|mem~10_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[24]~134_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[24]~134 .extended_lut = "off"; +defparam \rt_alu[24]~134 .lut_mask = 64'h00FF0F0F00FF5555; +defparam \rt_alu[24]~134 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X31_Y11_N48 +cyclonev_lcell_comb \rt_alu[24]~136 ( +// Equation(s): +// \rt_alu[24]~136_combout = ( \rt_alu[24]~133_combout & ( \rt_alu[24]~134_combout & ( ((\rt_alu[24]~135_combout ) # (\rt_alu[17]~10_combout )) # (\ROM|mem~12_combout ) ) ) ) # ( !\rt_alu[24]~133_combout & ( \rt_alu[24]~134_combout & ( +// (!\rt_alu[17]~10_combout & ((\rt_alu[24]~135_combout ) # (\ROM|mem~12_combout ))) ) ) ) # ( \rt_alu[24]~133_combout & ( !\rt_alu[24]~134_combout & ( ((!\ROM|mem~12_combout & \rt_alu[24]~135_combout )) # (\rt_alu[17]~10_combout ) ) ) ) # ( +// !\rt_alu[24]~133_combout & ( !\rt_alu[24]~134_combout & ( (!\ROM|mem~12_combout & (!\rt_alu[17]~10_combout & \rt_alu[24]~135_combout )) ) ) ) + + .dataa(gnd), + .datab(!\ROM|mem~12_combout ), + .datac(!\rt_alu[17]~10_combout ), + .datad(!\rt_alu[24]~135_combout ), + .datae(!\rt_alu[24]~133_combout ), + .dataf(!\rt_alu[24]~134_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[24]~136_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[24]~136 .extended_lut = "off"; +defparam \rt_alu[24]~136 .lut_mask = 64'h00C00FCF30F03FFF; +defparam \rt_alu[24]~136 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X31_Y11_N0 +cyclonev_lcell_comb \rt_alu[24]~137 ( +// Equation(s): +// \rt_alu[24]~137_combout = ( \rt_alu[17]~11_combout & ( \rt_alu[24]~136_combout ) ) # ( !\rt_alu[17]~11_combout & ( \rt_alu[24]~136_combout & ( (!\ROM|mem~0_combout & ((\REGS|regs[1][24]~DUPLICATE_q ))) # (\ROM|mem~0_combout & (\REGS|regs[9][24]~q +// )) ) ) ) # ( !\rt_alu[17]~11_combout & ( !\rt_alu[24]~136_combout & ( (!\ROM|mem~0_combout & ((\REGS|regs[1][24]~DUPLICATE_q ))) # (\ROM|mem~0_combout & (\REGS|regs[9][24]~q )) ) ) ) + + .dataa(!\REGS|regs[9][24]~q ), + .datab(gnd), + .datac(!\ROM|mem~0_combout ), + .datad(!\REGS|regs[1][24]~DUPLICATE_q ), + .datae(!\rt_alu[17]~11_combout ), + .dataf(!\rt_alu[24]~136_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[24]~137_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[24]~137 .extended_lut = "off"; +defparam \rt_alu[24]~137 .lut_mask = 64'h05F5000005F5FFFF; +defparam \rt_alu[24]~137 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X31_Y13_N15 +cyclonev_lcell_comb \REGS|regs[26][24]~feeder ( +// Equation(s): +// \REGS|regs[26][24]~feeder_combout = ( \rd[24]~441_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[24]~441_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[26][24]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[26][24]~feeder .extended_lut = "off"; +defparam \REGS|regs[26][24]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[26][24]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X31_Y13_N17 +dffeas \REGS|regs[26][24] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[26][24]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~6_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[26][24]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[26][24] .is_wysiwyg = "true"; +defparam \REGS|regs[26][24] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X31_Y13_N32 +dffeas \REGS|regs[18][24] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[24]~441_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~5_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[18][24]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[18][24] .is_wysiwyg = "true"; +defparam \REGS|regs[18][24] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X31_Y13_N9 +cyclonev_lcell_comb \REGS|Mux39~2 ( +// Equation(s): +// \REGS|Mux39~2_combout = ( \ROM|mem~0_combout & ( \REGS|regs[26][24]~q ) ) # ( !\ROM|mem~0_combout & ( \REGS|regs[18][24]~q ) ) + + .dataa(gnd), + .datab(!\REGS|regs[26][24]~q ), + .datac(!\REGS|regs[18][24]~q ), + .datad(gnd), + .datae(gnd), + .dataf(!\ROM|mem~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux39~2_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux39~2 .extended_lut = "off"; +defparam \REGS|Mux39~2 .lut_mask = 64'h0F0F0F0F33333333; +defparam \REGS|Mux39~2 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X32_Y5_N14 +dffeas \REGS|regs[27][24] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[24]~441_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~15_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[27][24]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[27][24] .is_wysiwyg = "true"; +defparam \REGS|regs[27][24] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X32_Y5_N11 +dffeas \REGS|regs[19][24] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[24]~441_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~14_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[19][24]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[19][24] .is_wysiwyg = "true"; +defparam \REGS|regs[19][24] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y5_N0 +cyclonev_lcell_comb \REGS|Mux39~3 ( +// Equation(s): +// \REGS|Mux39~3_combout = ( \ROM|mem~0_combout & ( \REGS|regs[19][24]~q & ( \REGS|regs[27][24]~q ) ) ) # ( !\ROM|mem~0_combout & ( \REGS|regs[19][24]~q ) ) # ( \ROM|mem~0_combout & ( !\REGS|regs[19][24]~q & ( \REGS|regs[27][24]~q ) ) ) + + .dataa(gnd), + .datab(!\REGS|regs[27][24]~q ), + .datac(gnd), + .datad(gnd), + .datae(!\ROM|mem~0_combout ), + .dataf(!\REGS|regs[19][24]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux39~3_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux39~3 .extended_lut = "off"; +defparam \REGS|Mux39~3 .lut_mask = 64'h00003333FFFF3333; +defparam \REGS|Mux39~3 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X32_Y11_N47 +dffeas \REGS|regs[29][24] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[24]~441_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~17_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[29][24]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[29][24] .is_wysiwyg = "true"; +defparam \REGS|regs[29][24] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X32_Y11_N56 +dffeas \REGS|regs[28][24] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[24]~441_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~8_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[28][24]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[28][24] .is_wysiwyg = "true"; +defparam \REGS|regs[28][24] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X25_Y11_N19 +dffeas \REGS|regs[20][24]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[24]~441_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~7_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[20][24]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[20][24]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[20][24]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y11_N42 +cyclonev_lcell_comb \rt_alu[24]~138 ( +// Equation(s): +// \rt_alu[24]~138_combout = ( \ROM|mem~0_combout & ( \ROM|mem~10_combout & ( \REGS|regs[28][24]~q ) ) ) # ( !\ROM|mem~0_combout & ( \ROM|mem~10_combout & ( \REGS|regs[20][24]~DUPLICATE_q ) ) ) # ( \ROM|mem~0_combout & ( !\ROM|mem~10_combout & ( +// \REGS|regs[29][24]~q ) ) ) # ( !\ROM|mem~0_combout & ( !\ROM|mem~10_combout & ( \REGS|regs[20][24]~DUPLICATE_q ) ) ) + + .dataa(gnd), + .datab(!\REGS|regs[29][24]~q ), + .datac(!\REGS|regs[28][24]~q ), + .datad(!\REGS|regs[20][24]~DUPLICATE_q ), + .datae(!\ROM|mem~0_combout ), + .dataf(!\ROM|mem~10_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[24]~138_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[24]~138 .extended_lut = "off"; +defparam \rt_alu[24]~138 .lut_mask = 64'h00FF333300FF0F0F; +defparam \rt_alu[24]~138 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X35_Y5_N50 +dffeas \REGS|regs[30][24] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[24]~441_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~10_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[30][24]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[30][24] .is_wysiwyg = "true"; +defparam \REGS|regs[30][24] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X35_Y5_N8 +dffeas \REGS|regs[22][24] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[24]~441_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~9_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[22][24]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[22][24] .is_wysiwyg = "true"; +defparam \REGS|regs[22][24] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X35_Y5_N33 +cyclonev_lcell_comb \REGS|Mux39~5 ( +// Equation(s): +// \REGS|Mux39~5_combout = ( \PC|pc[8]~DUPLICATE_q & ( \PC|pc[6]~DUPLICATE_q & ( \REGS|regs[22][24]~q ) ) ) # ( !\PC|pc[8]~DUPLICATE_q & ( \PC|pc[6]~DUPLICATE_q & ( \REGS|regs[22][24]~q ) ) ) # ( \PC|pc[8]~DUPLICATE_q & ( !\PC|pc[6]~DUPLICATE_q & ( +// \REGS|regs[22][24]~q ) ) ) # ( !\PC|pc[8]~DUPLICATE_q & ( !\PC|pc[6]~DUPLICATE_q & ( (!\PC|pc [9] & ((!\PC|pc [7] & (\REGS|regs[30][24]~q )) # (\PC|pc [7] & ((\REGS|regs[22][24]~q ))))) # (\PC|pc [9] & (((\REGS|regs[22][24]~q )))) ) ) ) + + .dataa(!\REGS|regs[30][24]~q ), + .datab(!\PC|pc [9]), + .datac(!\REGS|regs[22][24]~q ), + .datad(!\PC|pc [7]), + .datae(!\PC|pc[8]~DUPLICATE_q ), + .dataf(!\PC|pc[6]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux39~5_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux39~5 .extended_lut = "off"; +defparam \REGS|Mux39~5 .lut_mask = 64'h470F0F0F0F0F0F0F; +defparam \REGS|Mux39~5 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y11_N6 +cyclonev_lcell_comb \rt_alu[24]~139 ( +// Equation(s): +// \rt_alu[24]~139_combout = ( \ROM|mem~12_combout & ( \REGS|Mux39~5_combout & ( (!\ROM|mem~13_combout ) # (\REGS|Mux39~4_combout ) ) ) ) # ( !\ROM|mem~12_combout & ( \REGS|Mux39~5_combout & ( \rt_alu[24]~138_combout ) ) ) # ( \ROM|mem~12_combout & ( +// !\REGS|Mux39~5_combout & ( (\REGS|Mux39~4_combout & \ROM|mem~13_combout ) ) ) ) # ( !\ROM|mem~12_combout & ( !\REGS|Mux39~5_combout & ( \rt_alu[24]~138_combout ) ) ) + + .dataa(!\REGS|Mux39~4_combout ), + .datab(!\rt_alu[24]~138_combout ), + .datac(!\ROM|mem~13_combout ), + .datad(gnd), + .datae(!\ROM|mem~12_combout ), + .dataf(!\REGS|Mux39~5_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[24]~139_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[24]~139 .extended_lut = "off"; +defparam \rt_alu[24]~139 .lut_mask = 64'h333305053333F5F5; +defparam \rt_alu[24]~139 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X25_Y8_N20 +dffeas \REGS|regs[24][24] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[24]~441_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~4_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[24][24]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[24][24] .is_wysiwyg = "true"; +defparam \REGS|regs[24][24] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X25_Y8_N52 +dffeas \REGS|regs[16][24] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[24]~441_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~2_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[16][24]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[16][24] .is_wysiwyg = "true"; +defparam \REGS|regs[16][24] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X25_Y8_N17 +dffeas \REGS|regs[25][24] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[24]~441_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~13_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[25][24]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[25][24] .is_wysiwyg = "true"; +defparam \REGS|regs[25][24] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X25_Y8_N36 +cyclonev_lcell_comb \rt_alu[24]~140 ( +// Equation(s): +// \rt_alu[24]~140_combout = ( \REGS|regs[25][24]~q & ( (!\ROM|mem~0_combout & (((\REGS|regs[16][24]~q )))) # (\ROM|mem~0_combout & ((!\ROM|mem~10_combout ) # ((\REGS|regs[24][24]~q )))) ) ) # ( !\REGS|regs[25][24]~q & ( (!\ROM|mem~0_combout & +// (((\REGS|regs[16][24]~q )))) # (\ROM|mem~0_combout & (\ROM|mem~10_combout & (\REGS|regs[24][24]~q ))) ) ) + + .dataa(!\ROM|mem~10_combout ), + .datab(!\ROM|mem~0_combout ), + .datac(!\REGS|regs[24][24]~q ), + .datad(!\REGS|regs[16][24]~q ), + .datae(gnd), + .dataf(!\REGS|regs[25][24]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[24]~140_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[24]~140 .extended_lut = "off"; +defparam \rt_alu[24]~140 .lut_mask = 64'h01CD01CD23EF23EF; +defparam \rt_alu[24]~140 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X31_Y11_N18 +cyclonev_lcell_comb \rt_alu[24]~141 ( +// Equation(s): +// \rt_alu[24]~141_combout = ( \rt_alu[24]~139_combout & ( \rt_alu[24]~140_combout & ( (!\rt_alu[17]~5_combout ) # ((!\rt_alu[17]~4_combout & ((\REGS|Mux39~3_combout ))) # (\rt_alu[17]~4_combout & (\REGS|Mux39~2_combout ))) ) ) ) # ( +// !\rt_alu[24]~139_combout & ( \rt_alu[24]~140_combout & ( (!\rt_alu[17]~4_combout & ((!\rt_alu[17]~5_combout ) # ((\REGS|Mux39~3_combout )))) # (\rt_alu[17]~4_combout & (\rt_alu[17]~5_combout & (\REGS|Mux39~2_combout ))) ) ) ) # ( +// \rt_alu[24]~139_combout & ( !\rt_alu[24]~140_combout & ( (!\rt_alu[17]~4_combout & (\rt_alu[17]~5_combout & ((\REGS|Mux39~3_combout )))) # (\rt_alu[17]~4_combout & ((!\rt_alu[17]~5_combout ) # ((\REGS|Mux39~2_combout )))) ) ) ) # ( +// !\rt_alu[24]~139_combout & ( !\rt_alu[24]~140_combout & ( (\rt_alu[17]~5_combout & ((!\rt_alu[17]~4_combout & ((\REGS|Mux39~3_combout ))) # (\rt_alu[17]~4_combout & (\REGS|Mux39~2_combout )))) ) ) ) + + .dataa(!\rt_alu[17]~4_combout ), + .datab(!\rt_alu[17]~5_combout ), + .datac(!\REGS|Mux39~2_combout ), + .datad(!\REGS|Mux39~3_combout ), + .datae(!\rt_alu[24]~139_combout ), + .dataf(!\rt_alu[24]~140_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[24]~141_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[24]~141 .extended_lut = "off"; +defparam \rt_alu[24]~141 .lut_mask = 64'h0123456789ABCDEF; +defparam \rt_alu[24]~141 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X31_Y11_N42 +cyclonev_lcell_comb \rt_alu[24]~142 ( +// Equation(s): +// \rt_alu[24]~142_combout = ( \rt_alu[24]~137_combout & ( \rt_alu[24]~141_combout & ( ((\REGS|regs[8][24]~q & (\rt_alu[31]~39_combout & \ROM|mem~0_combout ))) # (\rt_alu[31]~40_combout ) ) ) ) # ( !\rt_alu[24]~137_combout & ( \rt_alu[24]~141_combout +// & ( (\rt_alu[31]~39_combout & (((\REGS|regs[8][24]~q & \ROM|mem~0_combout )) # (\rt_alu[31]~40_combout ))) ) ) ) # ( \rt_alu[24]~137_combout & ( !\rt_alu[24]~141_combout & ( (!\rt_alu[31]~40_combout & (\REGS|regs[8][24]~q & (\rt_alu[31]~39_combout +// & \ROM|mem~0_combout ))) # (\rt_alu[31]~40_combout & (((!\rt_alu[31]~39_combout )))) ) ) ) # ( !\rt_alu[24]~137_combout & ( !\rt_alu[24]~141_combout & ( (\REGS|regs[8][24]~q & (!\rt_alu[31]~40_combout & (\rt_alu[31]~39_combout & \ROM|mem~0_combout +// ))) ) ) ) + + .dataa(!\REGS|regs[8][24]~q ), + .datab(!\rt_alu[31]~40_combout ), + .datac(!\rt_alu[31]~39_combout ), + .datad(!\ROM|mem~0_combout ), + .datae(!\rt_alu[24]~137_combout ), + .dataf(!\rt_alu[24]~141_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[24]~142_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[24]~142 .extended_lut = "off"; +defparam \rt_alu[24]~142 .lut_mask = 64'h0004303403073337; +defparam \rt_alu[24]~142 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X36_Y9_N0 +cyclonev_lcell_comb \ALU|Mux7~0 ( +// Equation(s): +// \ALU|Mux7~0_combout = ( \REGS|Mux7~2_combout & ( \rt_alu[24]~142_combout & ( (\ALU|Mux15~0_combout & \CONTROL_UNIT|ALU_FN [1]) ) ) ) # ( !\REGS|Mux7~2_combout & ( \rt_alu[24]~142_combout & ( ((\ALU|Mux15~0_combout & (\CONTROL_UNIT|ALU_FN [1] & +// !\CONTROL_UNIT|ALU_FN [0]))) # (\ALU|Mux29~1_combout ) ) ) ) # ( \REGS|Mux7~2_combout & ( !\rt_alu[24]~142_combout & ( ((\ALU|Mux15~0_combout & (\CONTROL_UNIT|ALU_FN [1] & !\CONTROL_UNIT|ALU_FN [0]))) # (\ALU|Mux29~1_combout ) ) ) ) # ( +// !\REGS|Mux7~2_combout & ( !\rt_alu[24]~142_combout & ( (\ALU|Mux15~0_combout & !\CONTROL_UNIT|ALU_FN [1]) ) ) ) + + .dataa(!\ALU|Mux15~0_combout ), + .datab(!\CONTROL_UNIT|ALU_FN [1]), + .datac(!\CONTROL_UNIT|ALU_FN [0]), + .datad(!\ALU|Mux29~1_combout ), + .datae(!\REGS|Mux7~2_combout ), + .dataf(!\rt_alu[24]~142_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\ALU|Mux7~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \ALU|Mux7~0 .extended_lut = "off"; +defparam \ALU|Mux7~0 .lut_mask = 64'h444410FF10FF1111; +defparam \ALU|Mux7~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X31_Y13_N41 +dffeas \REGS|regs[1][23] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[23]~439_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~28_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[1][23]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[1][23] .is_wysiwyg = "true"; +defparam \REGS|regs[1][23] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X36_Y5_N29 +dffeas \REGS|regs[9][23] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[23]~439_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~29_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[9][23]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[9][23] .is_wysiwyg = "true"; +defparam \REGS|regs[9][23] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X37_Y5_N32 +dffeas \REGS|regs[10][23] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[23]~439_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~33_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[10][23]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[10][23] .is_wysiwyg = "true"; +defparam \REGS|regs[10][23] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X37_Y5_N29 +dffeas \REGS|regs[11][23] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[23]~439_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~37_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[11][23]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[11][23] .is_wysiwyg = "true"; +defparam \REGS|regs[11][23] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X37_Y5_N11 +dffeas \REGS|regs[2][23] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[23]~439_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~32_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[2][23]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[2][23] .is_wysiwyg = "true"; +defparam \REGS|regs[2][23] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y5_N18 +cyclonev_lcell_comb \rt_alu[23]~122 ( +// Equation(s): +// \rt_alu[23]~122_combout = ( \ROM|mem~10_combout & ( \ROM|mem~0_combout & ( \REGS|regs[10][23]~q ) ) ) # ( !\ROM|mem~10_combout & ( \ROM|mem~0_combout & ( \REGS|regs[11][23]~q ) ) ) # ( \ROM|mem~10_combout & ( !\ROM|mem~0_combout & ( +// \REGS|regs[2][23]~q ) ) ) # ( !\ROM|mem~10_combout & ( !\ROM|mem~0_combout & ( \REGS|regs[2][23]~q ) ) ) + + .dataa(gnd), + .datab(!\REGS|regs[10][23]~q ), + .datac(!\REGS|regs[11][23]~q ), + .datad(!\REGS|regs[2][23]~q ), + .datae(!\ROM|mem~10_combout ), + .dataf(!\ROM|mem~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[23]~122_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[23]~122 .extended_lut = "off"; +defparam \rt_alu[23]~122 .lut_mask = 64'h00FF00FF0F0F3333; +defparam \rt_alu[23]~122 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X36_Y5_N41 +dffeas \REGS|regs[14][23] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[23]~439_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~35_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[14][23]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[14][23] .is_wysiwyg = "true"; +defparam \REGS|regs[14][23] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X36_Y5_N59 +dffeas \REGS|regs[15][23] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[23]~439_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~39_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[15][23]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[15][23] .is_wysiwyg = "true"; +defparam \REGS|regs[15][23] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X30_Y6_N4 +dffeas \REGS|regs[6][23] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[23]~439_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~34_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[6][23]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[6][23] .is_wysiwyg = "true"; +defparam \REGS|regs[6][23] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X36_Y5_N51 +cyclonev_lcell_comb \rt_alu[23]~123 ( +// Equation(s): +// \rt_alu[23]~123_combout = ( \REGS|regs[6][23]~q & ( (!\ROM|mem~0_combout ) # ((!\ROM|mem~10_combout & ((\REGS|regs[15][23]~q ))) # (\ROM|mem~10_combout & (\REGS|regs[14][23]~q ))) ) ) # ( !\REGS|regs[6][23]~q & ( (\ROM|mem~0_combout & +// ((!\ROM|mem~10_combout & ((\REGS|regs[15][23]~q ))) # (\ROM|mem~10_combout & (\REGS|regs[14][23]~q )))) ) ) + + .dataa(!\ROM|mem~0_combout ), + .datab(!\ROM|mem~10_combout ), + .datac(!\REGS|regs[14][23]~q ), + .datad(!\REGS|regs[15][23]~q ), + .datae(gnd), + .dataf(!\REGS|regs[6][23]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[23]~123_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[23]~123 .extended_lut = "off"; +defparam \rt_alu[23]~123 .lut_mask = 64'h01450145ABEFABEF; +defparam \rt_alu[23]~123 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X35_Y13_N40 +dffeas \REGS|regs[13][23] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[23]~439_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~31_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[13][23]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[13][23] .is_wysiwyg = "true"; +defparam \REGS|regs[13][23] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X35_Y13_N35 +dffeas \REGS|regs[5][23] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[23]~439_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~30_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[5][23]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[5][23] .is_wysiwyg = "true"; +defparam \REGS|regs[5][23] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X35_Y13_N24 +cyclonev_lcell_comb \REGS|Mux40~1 ( +// Equation(s): +// \REGS|Mux40~1_combout = ( \REGS|regs[13][23]~q & ( \REGS|regs[5][23]~q ) ) # ( !\REGS|regs[13][23]~q & ( \REGS|regs[5][23]~q & ( (((\PC|pc [6]) # (\PC|pc [9])) # (\PC|pc[8]~DUPLICATE_q )) # (\PC|pc[7]~DUPLICATE_q ) ) ) ) # ( \REGS|regs[13][23]~q & ( +// !\REGS|regs[5][23]~q & ( (!\PC|pc[7]~DUPLICATE_q & (!\PC|pc[8]~DUPLICATE_q & (!\PC|pc [9] & !\PC|pc [6]))) ) ) ) + + .dataa(!\PC|pc[7]~DUPLICATE_q ), + .datab(!\PC|pc[8]~DUPLICATE_q ), + .datac(!\PC|pc [9]), + .datad(!\PC|pc [6]), + .datae(!\REGS|regs[13][23]~q ), + .dataf(!\REGS|regs[5][23]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux40~1_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux40~1 .extended_lut = "off"; +defparam \REGS|Mux40~1 .lut_mask = 64'h000080007FFFFFFF; +defparam \REGS|Mux40~1 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X35_Y13_N23 +dffeas \REGS|regs[12][23] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[23]~439_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~26_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[12][23]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[12][23] .is_wysiwyg = "true"; +defparam \REGS|regs[12][23] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X30_Y11_N39 +cyclonev_lcell_comb \REGS|regs[4][23]~feeder ( +// Equation(s): +// \REGS|regs[4][23]~feeder_combout = ( \rd[23]~439_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[23]~439_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[4][23]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[4][23]~feeder .extended_lut = "off"; +defparam \REGS|regs[4][23]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[4][23]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X30_Y11_N40 +dffeas \REGS|regs[4][23] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[4][23]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~22_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[4][23]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[4][23] .is_wysiwyg = "true"; +defparam \REGS|regs[4][23] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X35_Y13_N3 +cyclonev_lcell_comb \REGS|Mux40~0 ( +// Equation(s): +// \REGS|Mux40~0_combout = ( \REGS|regs[12][23]~q & ( \REGS|regs[4][23]~q ) ) # ( !\REGS|regs[12][23]~q & ( \REGS|regs[4][23]~q & ( (((\PC|pc [9]) # (\PC|pc[8]~DUPLICATE_q )) # (\PC|pc [6])) # (\PC|pc[7]~DUPLICATE_q ) ) ) ) # ( \REGS|regs[12][23]~q & ( +// !\REGS|regs[4][23]~q & ( (!\PC|pc[7]~DUPLICATE_q & (!\PC|pc [6] & (!\PC|pc[8]~DUPLICATE_q & !\PC|pc [9]))) ) ) ) + + .dataa(!\PC|pc[7]~DUPLICATE_q ), + .datab(!\PC|pc [6]), + .datac(!\PC|pc[8]~DUPLICATE_q ), + .datad(!\PC|pc [9]), + .datae(!\REGS|regs[12][23]~q ), + .dataf(!\REGS|regs[4][23]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux40~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux40~0 .extended_lut = "off"; +defparam \REGS|Mux40~0 .lut_mask = 64'h000080007FFFFFFF; +defparam \REGS|Mux40~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X36_Y5_N48 +cyclonev_lcell_comb \rt_alu[23]~124 ( +// Equation(s): +// \rt_alu[23]~124_combout = ( \REGS|Mux40~0_combout & ( (!\ROM|mem~0_combout ) # ((\REGS|Mux40~1_combout ) # (\ROM|mem~10_combout )) ) ) # ( !\REGS|Mux40~0_combout & ( (\ROM|mem~0_combout & (!\ROM|mem~10_combout & \REGS|Mux40~1_combout )) ) ) + + .dataa(!\ROM|mem~0_combout ), + .datab(!\ROM|mem~10_combout ), + .datac(!\REGS|Mux40~1_combout ), + .datad(gnd), + .datae(gnd), + .dataf(!\REGS|Mux40~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[23]~124_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[23]~124 .extended_lut = "off"; +defparam \rt_alu[23]~124 .lut_mask = 64'h04040404BFBFBFBF; +defparam \rt_alu[23]~124 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X36_Y5_N18 +cyclonev_lcell_comb \rt_alu[23]~125 ( +// Equation(s): +// \rt_alu[23]~125_combout = ( \ROM|mem~12_combout & ( \rt_alu[23]~124_combout & ( (!\rt_alu[17]~10_combout & ((\rt_alu[23]~123_combout ))) # (\rt_alu[17]~10_combout & (\rt_alu[23]~122_combout )) ) ) ) # ( !\ROM|mem~12_combout & ( +// \rt_alu[23]~124_combout & ( (!\rt_alu[17]~10_combout ) # (\rt_alu[23]~122_combout ) ) ) ) # ( \ROM|mem~12_combout & ( !\rt_alu[23]~124_combout & ( (!\rt_alu[17]~10_combout & ((\rt_alu[23]~123_combout ))) # (\rt_alu[17]~10_combout & +// (\rt_alu[23]~122_combout )) ) ) ) # ( !\ROM|mem~12_combout & ( !\rt_alu[23]~124_combout & ( (\rt_alu[23]~122_combout & \rt_alu[17]~10_combout ) ) ) ) + + .dataa(!\rt_alu[23]~122_combout ), + .datab(gnd), + .datac(!\rt_alu[23]~123_combout ), + .datad(!\rt_alu[17]~10_combout ), + .datae(!\ROM|mem~12_combout ), + .dataf(!\rt_alu[23]~124_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[23]~125_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[23]~125 .extended_lut = "off"; +defparam \rt_alu[23]~125 .lut_mask = 64'h00550F55FF550F55; +defparam \rt_alu[23]~125 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X36_Y5_N30 +cyclonev_lcell_comb \rt_alu[23]~126 ( +// Equation(s): +// \rt_alu[23]~126_combout = ( \rt_alu[23]~125_combout & ( ((!\ROM|mem~0_combout & (\REGS|regs[1][23]~q )) # (\ROM|mem~0_combout & ((\REGS|regs[9][23]~q )))) # (\rt_alu[17]~11_combout ) ) ) # ( !\rt_alu[23]~125_combout & ( (!\rt_alu[17]~11_combout & +// ((!\ROM|mem~0_combout & (\REGS|regs[1][23]~q )) # (\ROM|mem~0_combout & ((\REGS|regs[9][23]~q ))))) ) ) + + .dataa(!\ROM|mem~0_combout ), + .datab(!\rt_alu[17]~11_combout ), + .datac(!\REGS|regs[1][23]~q ), + .datad(!\REGS|regs[9][23]~q ), + .datae(gnd), + .dataf(!\rt_alu[23]~125_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[23]~126_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[23]~126 .extended_lut = "off"; +defparam \rt_alu[23]~126 .lut_mask = 64'h084C084C3B7F3B7F; +defparam \rt_alu[23]~126 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X35_Y4_N15 +cyclonev_lcell_comb \REGS|regs[8][23]~feeder ( +// Equation(s): +// \REGS|regs[8][23]~feeder_combout = ( \rd[23]~439_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[23]~439_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[8][23]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[8][23]~feeder .extended_lut = "off"; +defparam \REGS|regs[8][23]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[8][23]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X35_Y4_N17 +dffeas \REGS|regs[8][23] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[8][23]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~24_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[8][23]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[8][23] .is_wysiwyg = "true"; +defparam \REGS|regs[8][23] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X35_Y5_N3 +cyclonev_lcell_comb \rt_alu[23]~131 ( +// Equation(s): +// \rt_alu[23]~131_combout = ( \rt_alu[17]~11_combout & ( \CONTROL_UNIT|CLASSIFIER|Equal0~1_combout & ( (\REGS|regs[8][23]~q & \ROM|mem~0_combout ) ) ) ) # ( !\rt_alu[17]~11_combout & ( \CONTROL_UNIT|CLASSIFIER|Equal0~1_combout & ( (\REGS|regs[8][23]~q +// & \ROM|mem~0_combout ) ) ) ) # ( !\rt_alu[17]~11_combout & ( !\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout & ( (!\ROM|mem~9_combout & (\REGS|regs[8][23]~q & (!\rt_alu[17]~10_combout & \ROM|mem~0_combout ))) ) ) ) + + .dataa(!\ROM|mem~9_combout ), + .datab(!\REGS|regs[8][23]~q ), + .datac(!\rt_alu[17]~10_combout ), + .datad(!\ROM|mem~0_combout ), + .datae(!\rt_alu[17]~11_combout ), + .dataf(!\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[23]~131_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[23]~131 .extended_lut = "off"; +defparam \rt_alu[23]~131 .lut_mask = 64'h0020000000330033; +defparam \rt_alu[23]~131 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X32_Y5_N17 +dffeas \REGS|regs[27][23] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[23]~439_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~15_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[27][23]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[27][23] .is_wysiwyg = "true"; +defparam \REGS|regs[27][23] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X27_Y9_N54 +cyclonev_lcell_comb \REGS|regs[19][23]~feeder ( +// Equation(s): +// \REGS|regs[19][23]~feeder_combout = ( \rd[23]~439_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[23]~439_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[19][23]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[19][23]~feeder .extended_lut = "off"; +defparam \REGS|regs[19][23]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[19][23]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X27_Y9_N56 +dffeas \REGS|regs[19][23] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[19][23]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~14_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[19][23]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[19][23] .is_wysiwyg = "true"; +defparam \REGS|regs[19][23] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y5_N15 +cyclonev_lcell_comb \REGS|Mux40~5 ( +// Equation(s): +// \REGS|Mux40~5_combout = ( \REGS|regs[19][23]~q & ( (!\ROM|mem~0_combout ) # (\REGS|regs[27][23]~q ) ) ) # ( !\REGS|regs[19][23]~q & ( (\ROM|mem~0_combout & \REGS|regs[27][23]~q ) ) ) + + .dataa(gnd), + .datab(gnd), + .datac(!\ROM|mem~0_combout ), + .datad(!\REGS|regs[27][23]~q ), + .datae(gnd), + .dataf(!\REGS|regs[19][23]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux40~5_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux40~5 .extended_lut = "off"; +defparam \REGS|Mux40~5 .lut_mask = 64'h000F000FF0FFF0FF; +defparam \REGS|Mux40~5 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X25_Y8_N47 +dffeas \REGS|regs[25][23] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[23]~439_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~13_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[25][23]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[25][23] .is_wysiwyg = "true"; +defparam \REGS|regs[25][23] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X25_Y8_N26 +dffeas \REGS|regs[16][23] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[23]~439_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~2_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[16][23]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[16][23] .is_wysiwyg = "true"; +defparam \REGS|regs[16][23] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X25_Y8_N8 +dffeas \REGS|regs[24][23] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[23]~439_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~4_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[24][23]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[24][23] .is_wysiwyg = "true"; +defparam \REGS|regs[24][23] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X25_Y8_N30 +cyclonev_lcell_comb \rt_alu[23]~129 ( +// Equation(s): +// \rt_alu[23]~129_combout = ( \ROM|mem~0_combout & ( \ROM|mem~10_combout & ( \REGS|regs[24][23]~q ) ) ) # ( !\ROM|mem~0_combout & ( \ROM|mem~10_combout & ( \REGS|regs[16][23]~q ) ) ) # ( \ROM|mem~0_combout & ( !\ROM|mem~10_combout & ( +// \REGS|regs[25][23]~q ) ) ) # ( !\ROM|mem~0_combout & ( !\ROM|mem~10_combout & ( \REGS|regs[16][23]~q ) ) ) + + .dataa(gnd), + .datab(!\REGS|regs[25][23]~q ), + .datac(!\REGS|regs[16][23]~q ), + .datad(!\REGS|regs[24][23]~q ), + .datae(!\ROM|mem~0_combout ), + .dataf(!\ROM|mem~10_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[23]~129_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[23]~129 .extended_lut = "off"; +defparam \rt_alu[23]~129 .lut_mask = 64'h0F0F33330F0F00FF; +defparam \rt_alu[23]~129 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X33_Y9_N4 +dffeas \REGS|regs[31][23] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[23]~439_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~19_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[31][23]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[31][23] .is_wysiwyg = "true"; +defparam \REGS|regs[31][23] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X35_Y5_N41 +dffeas \REGS|regs[23][23] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[23]~439_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~18_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[23][23]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[23][23] .is_wysiwyg = "true"; +defparam \REGS|regs[23][23] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X35_Y5_N54 +cyclonev_lcell_comb \REGS|Mux40~3 ( +// Equation(s): +// \REGS|Mux40~3_combout = ( \REGS|regs[31][23]~q & ( \REGS|regs[23][23]~q ) ) # ( !\REGS|regs[31][23]~q & ( \REGS|regs[23][23]~q & ( (((\PC|pc[8]~DUPLICATE_q ) # (\PC|pc [9])) # (\PC|pc[6]~DUPLICATE_q )) # (\PC|pc [7]) ) ) ) # ( \REGS|regs[31][23]~q & +// ( !\REGS|regs[23][23]~q & ( (!\PC|pc [7] & (!\PC|pc[6]~DUPLICATE_q & (!\PC|pc [9] & !\PC|pc[8]~DUPLICATE_q ))) ) ) ) + + .dataa(!\PC|pc [7]), + .datab(!\PC|pc[6]~DUPLICATE_q ), + .datac(!\PC|pc [9]), + .datad(!\PC|pc[8]~DUPLICATE_q ), + .datae(!\REGS|regs[31][23]~q ), + .dataf(!\REGS|regs[23][23]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux40~3_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux40~3 .extended_lut = "off"; +defparam \REGS|Mux40~3 .lut_mask = 64'h000080007FFFFFFF; +defparam \REGS|Mux40~3 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X35_Y5_N2 +dffeas \REGS|regs[30][23] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[23]~439_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~10_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[30][23]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[30][23] .is_wysiwyg = "true"; +defparam \REGS|regs[30][23] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X35_Y5_N14 +dffeas \REGS|regs[22][23] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[23]~439_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~9_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[22][23]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[22][23] .is_wysiwyg = "true"; +defparam \REGS|regs[22][23] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X35_Y5_N57 +cyclonev_lcell_comb \REGS|Mux40~2 ( +// Equation(s): +// \REGS|Mux40~2_combout = ( \REGS|regs[30][23]~q & ( \REGS|regs[22][23]~q ) ) # ( !\REGS|regs[30][23]~q & ( \REGS|regs[22][23]~q & ( (((\PC|pc [9]) # (\PC|pc[8]~DUPLICATE_q )) # (\PC|pc[6]~DUPLICATE_q )) # (\PC|pc [7]) ) ) ) # ( \REGS|regs[30][23]~q & +// ( !\REGS|regs[22][23]~q & ( (!\PC|pc [7] & (!\PC|pc[6]~DUPLICATE_q & (!\PC|pc[8]~DUPLICATE_q & !\PC|pc [9]))) ) ) ) + + .dataa(!\PC|pc [7]), + .datab(!\PC|pc[6]~DUPLICATE_q ), + .datac(!\PC|pc[8]~DUPLICATE_q ), + .datad(!\PC|pc [9]), + .datae(!\REGS|regs[30][23]~q ), + .dataf(!\REGS|regs[22][23]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux40~2_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux40~2 .extended_lut = "off"; +defparam \REGS|Mux40~2 .lut_mask = 64'h000080007FFFFFFF; +defparam \REGS|Mux40~2 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X31_Y7_N26 +dffeas \REGS|regs[28][23] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[23]~439_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~8_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[28][23]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[28][23] .is_wysiwyg = "true"; +defparam \REGS|regs[28][23] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X31_Y7_N35 +dffeas \REGS|regs[29][23] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[23]~439_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~17_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[29][23]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[29][23] .is_wysiwyg = "true"; +defparam \REGS|regs[29][23] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X31_Y7_N47 +dffeas \REGS|regs[20][23] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[23]~439_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~7_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[20][23]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[20][23] .is_wysiwyg = "true"; +defparam \REGS|regs[20][23] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X31_Y7_N12 +cyclonev_lcell_comb \rt_alu[23]~127 ( +// Equation(s): +// \rt_alu[23]~127_combout = ( \ROM|mem~0_combout & ( \ROM|mem~10_combout & ( \REGS|regs[28][23]~q ) ) ) # ( !\ROM|mem~0_combout & ( \ROM|mem~10_combout & ( \REGS|regs[20][23]~q ) ) ) # ( \ROM|mem~0_combout & ( !\ROM|mem~10_combout & ( +// \REGS|regs[29][23]~q ) ) ) # ( !\ROM|mem~0_combout & ( !\ROM|mem~10_combout & ( \REGS|regs[20][23]~q ) ) ) + + .dataa(!\REGS|regs[28][23]~q ), + .datab(gnd), + .datac(!\REGS|regs[29][23]~q ), + .datad(!\REGS|regs[20][23]~q ), + .datae(!\ROM|mem~0_combout ), + .dataf(!\ROM|mem~10_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[23]~127_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[23]~127 .extended_lut = "off"; +defparam \rt_alu[23]~127 .lut_mask = 64'h00FF0F0F00FF5555; +defparam \rt_alu[23]~127 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X36_Y5_N0 +cyclonev_lcell_comb \rt_alu[23]~128 ( +// Equation(s): +// \rt_alu[23]~128_combout = ( \REGS|Mux40~2_combout & ( \rt_alu[23]~127_combout & ( (!\ROM|mem~13_combout ) # ((!\ROM|mem~12_combout ) # (\REGS|Mux40~3_combout )) ) ) ) # ( !\REGS|Mux40~2_combout & ( \rt_alu[23]~127_combout & ( (!\ROM|mem~12_combout ) +// # ((\ROM|mem~13_combout & \REGS|Mux40~3_combout )) ) ) ) # ( \REGS|Mux40~2_combout & ( !\rt_alu[23]~127_combout & ( (\ROM|mem~12_combout & ((!\ROM|mem~13_combout ) # (\REGS|Mux40~3_combout ))) ) ) ) # ( !\REGS|Mux40~2_combout & ( +// !\rt_alu[23]~127_combout & ( (\ROM|mem~13_combout & (\REGS|Mux40~3_combout & \ROM|mem~12_combout )) ) ) ) + + .dataa(!\ROM|mem~13_combout ), + .datab(gnd), + .datac(!\REGS|Mux40~3_combout ), + .datad(!\ROM|mem~12_combout ), + .datae(!\REGS|Mux40~2_combout ), + .dataf(!\rt_alu[23]~127_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[23]~128_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[23]~128 .extended_lut = "off"; +defparam \rt_alu[23]~128 .lut_mask = 64'h000500AFFF05FFAF; +defparam \rt_alu[23]~128 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X36_Y5_N24 +cyclonev_lcell_comb \rt_alu[23]~130 ( +// Equation(s): +// \rt_alu[23]~130_combout = ( \rt_alu[23]~128_combout & ( \REGS|Mux40~4_combout & ( ((!\rt_alu[17]~5_combout & ((\rt_alu[23]~129_combout ))) # (\rt_alu[17]~5_combout & (\REGS|Mux40~5_combout ))) # (\rt_alu[17]~4_combout ) ) ) ) # ( +// !\rt_alu[23]~128_combout & ( \REGS|Mux40~4_combout & ( (!\rt_alu[17]~5_combout & (!\rt_alu[17]~4_combout & ((\rt_alu[23]~129_combout )))) # (\rt_alu[17]~5_combout & (((\REGS|Mux40~5_combout )) # (\rt_alu[17]~4_combout ))) ) ) ) # ( +// \rt_alu[23]~128_combout & ( !\REGS|Mux40~4_combout & ( (!\rt_alu[17]~5_combout & (((\rt_alu[23]~129_combout )) # (\rt_alu[17]~4_combout ))) # (\rt_alu[17]~5_combout & (!\rt_alu[17]~4_combout & (\REGS|Mux40~5_combout ))) ) ) ) # ( +// !\rt_alu[23]~128_combout & ( !\REGS|Mux40~4_combout & ( (!\rt_alu[17]~4_combout & ((!\rt_alu[17]~5_combout & ((\rt_alu[23]~129_combout ))) # (\rt_alu[17]~5_combout & (\REGS|Mux40~5_combout )))) ) ) ) + + .dataa(!\rt_alu[17]~5_combout ), + .datab(!\rt_alu[17]~4_combout ), + .datac(!\REGS|Mux40~5_combout ), + .datad(!\rt_alu[23]~129_combout ), + .datae(!\rt_alu[23]~128_combout ), + .dataf(!\REGS|Mux40~4_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[23]~130_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[23]~130 .extended_lut = "off"; +defparam \rt_alu[23]~130 .lut_mask = 64'h048C26AE159D37BF; +defparam \rt_alu[23]~130 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X36_Y5_N6 +cyclonev_lcell_comb \rt_alu[23]~132 ( +// Equation(s): +// \rt_alu[23]~132_combout = ( \rt_alu[31]~39_combout & ( \rt_alu[23]~130_combout & ( (\rt_alu[23]~131_combout ) # (\rt_alu[31]~40_combout ) ) ) ) # ( !\rt_alu[31]~39_combout & ( \rt_alu[23]~130_combout & ( (\rt_alu[23]~126_combout & +// \rt_alu[31]~40_combout ) ) ) ) # ( \rt_alu[31]~39_combout & ( !\rt_alu[23]~130_combout & ( \rt_alu[23]~131_combout ) ) ) # ( !\rt_alu[31]~39_combout & ( !\rt_alu[23]~130_combout & ( (\rt_alu[23]~126_combout & \rt_alu[31]~40_combout ) ) ) ) + + .dataa(gnd), + .datab(!\rt_alu[23]~126_combout ), + .datac(!\rt_alu[31]~40_combout ), + .datad(!\rt_alu[23]~131_combout ), + .datae(!\rt_alu[31]~39_combout ), + .dataf(!\rt_alu[23]~130_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[23]~132_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[23]~132 .extended_lut = "off"; +defparam \rt_alu[23]~132 .lut_mask = 64'h030300FF03030FFF; +defparam \rt_alu[23]~132 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y6_N33 +cyclonev_lcell_comb \ALU|Mux8~0 ( +// Equation(s): +// \ALU|Mux8~0_combout = ( \ALU|Mux15~0_combout & ( \REGS|Mux8~2_combout & ( (!\rt_alu[23]~132_combout & (((!\CONTROL_UNIT|ALU_FN [0] & \CONTROL_UNIT|ALU_FN [1])) # (\ALU|Mux29~1_combout ))) # (\rt_alu[23]~132_combout & (((\CONTROL_UNIT|ALU_FN [1])))) ) +// ) ) # ( !\ALU|Mux15~0_combout & ( \REGS|Mux8~2_combout & ( (\ALU|Mux29~1_combout & !\rt_alu[23]~132_combout ) ) ) ) # ( \ALU|Mux15~0_combout & ( !\REGS|Mux8~2_combout & ( (!\rt_alu[23]~132_combout & (((!\CONTROL_UNIT|ALU_FN [1])))) # +// (\rt_alu[23]~132_combout & (((!\CONTROL_UNIT|ALU_FN [0] & \CONTROL_UNIT|ALU_FN [1])) # (\ALU|Mux29~1_combout ))) ) ) ) # ( !\ALU|Mux15~0_combout & ( !\REGS|Mux8~2_combout & ( (\ALU|Mux29~1_combout & \rt_alu[23]~132_combout ) ) ) ) + + .dataa(!\CONTROL_UNIT|ALU_FN [0]), + .datab(!\CONTROL_UNIT|ALU_FN [1]), + .datac(!\ALU|Mux29~1_combout ), + .datad(!\rt_alu[23]~132_combout ), + .datae(!\ALU|Mux15~0_combout ), + .dataf(!\REGS|Mux8~2_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\ALU|Mux8~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \ALU|Mux8~0 .extended_lut = "off"; +defparam \ALU|Mux8~0 .lut_mask = 64'h000FCC2F0F002F33; +defparam \ALU|Mux8~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X36_Y5_N12 +cyclonev_lcell_comb \ALU|adder_unit|operand[23]~8 ( +// Equation(s): +// \ALU|adder_unit|operand[23]~8_combout = ( \rt_alu[31]~39_combout & ( \rt_alu[23]~126_combout & ( !\CONTROL_UNIT|ALU_FN [1] $ ((((\rt_alu[31]~40_combout & \rt_alu[23]~130_combout )) # (\rt_alu[23]~131_combout ))) ) ) ) # ( !\rt_alu[31]~39_combout & ( +// \rt_alu[23]~126_combout & ( !\rt_alu[31]~40_combout $ (\CONTROL_UNIT|ALU_FN [1]) ) ) ) # ( \rt_alu[31]~39_combout & ( !\rt_alu[23]~126_combout & ( !\CONTROL_UNIT|ALU_FN [1] $ ((((\rt_alu[31]~40_combout & \rt_alu[23]~130_combout )) # +// (\rt_alu[23]~131_combout ))) ) ) ) # ( !\rt_alu[31]~39_combout & ( !\rt_alu[23]~126_combout & ( !\CONTROL_UNIT|ALU_FN [1] ) ) ) + + .dataa(!\rt_alu[31]~40_combout ), + .datab(!\CONTROL_UNIT|ALU_FN [1]), + .datac(!\rt_alu[23]~130_combout ), + .datad(!\rt_alu[23]~131_combout ), + .datae(!\rt_alu[31]~39_combout ), + .dataf(!\rt_alu[23]~126_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\ALU|adder_unit|operand[23]~8_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \ALU|adder_unit|operand[23]~8 .extended_lut = "off"; +defparam \ALU|adder_unit|operand[23]~8 .lut_mask = 64'hCCCCC9339999C933; +defparam \ALU|adder_unit|operand[23]~8 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X28_Y12_N10 +dffeas \REGS|regs[8][22] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[22]~437_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~24_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[8][22]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[8][22] .is_wysiwyg = "true"; +defparam \REGS|regs[8][22] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X31_Y13_N29 +dffeas \REGS|regs[18][22] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[22]~437_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~5_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[18][22]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[18][22] .is_wysiwyg = "true"; +defparam \REGS|regs[18][22] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X30_Y13_N32 +dffeas \REGS|regs[26][22] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[22]~437_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~6_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[26][22]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[26][22] .is_wysiwyg = "true"; +defparam \REGS|regs[26][22] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X30_Y13_N42 +cyclonev_lcell_comb \REGS|Mux41~2 ( +// Equation(s): +// \REGS|Mux41~2_combout = ( \REGS|regs[26][22]~q & ( (\REGS|regs[18][22]~q ) # (\ROM|mem~0_combout ) ) ) # ( !\REGS|regs[26][22]~q & ( (!\ROM|mem~0_combout & \REGS|regs[18][22]~q ) ) ) + + .dataa(gnd), + .datab(gnd), + .datac(!\ROM|mem~0_combout ), + .datad(!\REGS|regs[18][22]~q ), + .datae(gnd), + .dataf(!\REGS|regs[26][22]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux41~2_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux41~2 .extended_lut = "off"; +defparam \REGS|Mux41~2 .lut_mask = 64'h00F000F00FFF0FFF; +defparam \REGS|Mux41~2 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X30_Y13_N14 +dffeas \REGS|regs[27][22] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[22]~437_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~15_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[27][22]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[27][22] .is_wysiwyg = "true"; +defparam \REGS|regs[27][22] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X31_Y12_N38 +dffeas \REGS|regs[19][22] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[22]~437_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~14_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[19][22]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[19][22] .is_wysiwyg = "true"; +defparam \REGS|regs[19][22] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X30_Y13_N45 +cyclonev_lcell_comb \REGS|Mux41~3 ( +// Equation(s): +// \REGS|Mux41~3_combout = ( \REGS|regs[19][22]~q & ( (!\ROM|mem~0_combout ) # (\REGS|regs[27][22]~q ) ) ) # ( !\REGS|regs[19][22]~q & ( (\REGS|regs[27][22]~q & \ROM|mem~0_combout ) ) ) + + .dataa(gnd), + .datab(gnd), + .datac(!\REGS|regs[27][22]~q ), + .datad(!\ROM|mem~0_combout ), + .datae(gnd), + .dataf(!\REGS|regs[19][22]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux41~3_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux41~3 .extended_lut = "off"; +defparam \REGS|Mux41~3 .lut_mask = 64'h000F000FFF0FFF0F; +defparam \REGS|Mux41~3 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X32_Y11_N50 +dffeas \REGS|regs[23][22] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[22]~437_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~18_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[23][22]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[23][22] .is_wysiwyg = "true"; +defparam \REGS|regs[23][22] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X25_Y9_N48 +cyclonev_lcell_comb \REGS|regs[31][22]~feeder ( +// Equation(s): +// \REGS|regs[31][22]~feeder_combout = ( \rd[22]~437_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[22]~437_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[31][22]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[31][22]~feeder .extended_lut = "off"; +defparam \REGS|regs[31][22]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[31][22]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X25_Y9_N49 +dffeas \REGS|regs[31][22] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[31][22]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~19_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[31][22]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[31][22] .is_wysiwyg = "true"; +defparam \REGS|regs[31][22] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y11_N39 +cyclonev_lcell_comb \REGS|Mux41~4 ( +// Equation(s): +// \REGS|Mux41~4_combout = ( \PC|pc[7]~DUPLICATE_q & ( \REGS|regs[31][22]~q & ( \REGS|regs[23][22]~q ) ) ) # ( !\PC|pc[7]~DUPLICATE_q & ( \REGS|regs[31][22]~q & ( ((!\PC|pc [9] & (!\PC|pc[6]~DUPLICATE_q & !\PC|pc[8]~DUPLICATE_q ))) # +// (\REGS|regs[23][22]~q ) ) ) ) # ( \PC|pc[7]~DUPLICATE_q & ( !\REGS|regs[31][22]~q & ( \REGS|regs[23][22]~q ) ) ) # ( !\PC|pc[7]~DUPLICATE_q & ( !\REGS|regs[31][22]~q & ( (\REGS|regs[23][22]~q & (((\PC|pc[8]~DUPLICATE_q ) # (\PC|pc[6]~DUPLICATE_q )) +// # (\PC|pc [9]))) ) ) ) + + .dataa(!\PC|pc [9]), + .datab(!\PC|pc[6]~DUPLICATE_q ), + .datac(!\PC|pc[8]~DUPLICATE_q ), + .datad(!\REGS|regs[23][22]~q ), + .datae(!\PC|pc[7]~DUPLICATE_q ), + .dataf(!\REGS|regs[31][22]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux41~4_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux41~4 .extended_lut = "off"; +defparam \REGS|Mux41~4 .lut_mask = 64'h007F00FF80FF00FF; +defparam \REGS|Mux41~4 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X28_Y13_N49 +dffeas \REGS|regs[28][22] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[22]~437_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~8_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[28][22]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[28][22] .is_wysiwyg = "true"; +defparam \REGS|regs[28][22] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X25_Y11_N13 +dffeas \REGS|regs[20][22]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[22]~437_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~7_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[20][22]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[20][22]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[20][22]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: FF_X31_Y11_N11 +dffeas \REGS|regs[29][22] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[22]~437_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~17_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[29][22]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[29][22] .is_wysiwyg = "true"; +defparam \REGS|regs[29][22] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X31_Y11_N36 +cyclonev_lcell_comb \rt_alu[22]~117 ( +// Equation(s): +// \rt_alu[22]~117_combout = ( \REGS|regs[29][22]~q & ( (!\ROM|mem~0_combout & (((\REGS|regs[20][22]~DUPLICATE_q )))) # (\ROM|mem~0_combout & ((!\ROM|mem~10_combout ) # ((\REGS|regs[28][22]~q )))) ) ) # ( !\REGS|regs[29][22]~q & ( (!\ROM|mem~0_combout +// & (((\REGS|regs[20][22]~DUPLICATE_q )))) # (\ROM|mem~0_combout & (\ROM|mem~10_combout & (\REGS|regs[28][22]~q ))) ) ) + + .dataa(!\ROM|mem~0_combout ), + .datab(!\ROM|mem~10_combout ), + .datac(!\REGS|regs[28][22]~q ), + .datad(!\REGS|regs[20][22]~DUPLICATE_q ), + .datae(gnd), + .dataf(!\REGS|regs[29][22]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[22]~117_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[22]~117 .extended_lut = "off"; +defparam \rt_alu[22]~117 .lut_mask = 64'h01AB01AB45EF45EF; +defparam \rt_alu[22]~117 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X31_Y11_N27 +cyclonev_lcell_comb \rt_alu[22]~118 ( +// Equation(s): +// \rt_alu[22]~118_combout = ( \rt_alu[22]~117_combout & ( \REGS|Mux41~5_combout & ( (!\ROM|mem~13_combout ) # ((!\ROM|mem~12_combout ) # (\REGS|Mux41~4_combout )) ) ) ) # ( !\rt_alu[22]~117_combout & ( \REGS|Mux41~5_combout & ( (\ROM|mem~12_combout & +// ((!\ROM|mem~13_combout ) # (\REGS|Mux41~4_combout ))) ) ) ) # ( \rt_alu[22]~117_combout & ( !\REGS|Mux41~5_combout & ( (!\ROM|mem~12_combout ) # ((\ROM|mem~13_combout & \REGS|Mux41~4_combout )) ) ) ) # ( !\rt_alu[22]~117_combout & ( +// !\REGS|Mux41~5_combout & ( (\ROM|mem~13_combout & (\ROM|mem~12_combout & \REGS|Mux41~4_combout )) ) ) ) + + .dataa(!\ROM|mem~13_combout ), + .datab(gnd), + .datac(!\ROM|mem~12_combout ), + .datad(!\REGS|Mux41~4_combout ), + .datae(!\rt_alu[22]~117_combout ), + .dataf(!\REGS|Mux41~5_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[22]~118_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[22]~118 .extended_lut = "off"; +defparam \rt_alu[22]~118 .lut_mask = 64'h0005F0F50A0FFAFF; +defparam \rt_alu[22]~118 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X25_Y8_N2 +dffeas \REGS|regs[16][22] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[22]~437_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~2_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[16][22]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[16][22] .is_wysiwyg = "true"; +defparam \REGS|regs[16][22] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X25_Y8_N59 +dffeas \REGS|regs[25][22] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[22]~437_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~13_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[25][22]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[25][22] .is_wysiwyg = "true"; +defparam \REGS|regs[25][22] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X25_Y8_N35 +dffeas \REGS|regs[24][22]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[22]~437_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~4_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[24][22]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[24][22]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[24][22]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X25_Y8_N21 +cyclonev_lcell_comb \rt_alu[22]~119 ( +// Equation(s): +// \rt_alu[22]~119_combout = ( \ROM|mem~0_combout & ( \ROM|mem~10_combout & ( \REGS|regs[24][22]~DUPLICATE_q ) ) ) # ( !\ROM|mem~0_combout & ( \ROM|mem~10_combout & ( \REGS|regs[16][22]~q ) ) ) # ( \ROM|mem~0_combout & ( !\ROM|mem~10_combout & ( +// \REGS|regs[25][22]~q ) ) ) # ( !\ROM|mem~0_combout & ( !\ROM|mem~10_combout & ( \REGS|regs[16][22]~q ) ) ) + + .dataa(!\REGS|regs[16][22]~q ), + .datab(gnd), + .datac(!\REGS|regs[25][22]~q ), + .datad(!\REGS|regs[24][22]~DUPLICATE_q ), + .datae(!\ROM|mem~0_combout ), + .dataf(!\ROM|mem~10_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[22]~119_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[22]~119 .extended_lut = "off"; +defparam \rt_alu[22]~119 .lut_mask = 64'h55550F0F555500FF; +defparam \rt_alu[22]~119 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X31_Y11_N54 +cyclonev_lcell_comb \rt_alu[22]~120 ( +// Equation(s): +// \rt_alu[22]~120_combout = ( \rt_alu[22]~118_combout & ( \rt_alu[22]~119_combout & ( (!\rt_alu[17]~5_combout ) # ((!\rt_alu[17]~4_combout & ((\REGS|Mux41~3_combout ))) # (\rt_alu[17]~4_combout & (\REGS|Mux41~2_combout ))) ) ) ) # ( +// !\rt_alu[22]~118_combout & ( \rt_alu[22]~119_combout & ( (!\rt_alu[17]~4_combout & ((!\rt_alu[17]~5_combout ) # ((\REGS|Mux41~3_combout )))) # (\rt_alu[17]~4_combout & (\rt_alu[17]~5_combout & (\REGS|Mux41~2_combout ))) ) ) ) # ( +// \rt_alu[22]~118_combout & ( !\rt_alu[22]~119_combout & ( (!\rt_alu[17]~4_combout & (\rt_alu[17]~5_combout & ((\REGS|Mux41~3_combout )))) # (\rt_alu[17]~4_combout & ((!\rt_alu[17]~5_combout ) # ((\REGS|Mux41~2_combout )))) ) ) ) # ( +// !\rt_alu[22]~118_combout & ( !\rt_alu[22]~119_combout & ( (\rt_alu[17]~5_combout & ((!\rt_alu[17]~4_combout & ((\REGS|Mux41~3_combout ))) # (\rt_alu[17]~4_combout & (\REGS|Mux41~2_combout )))) ) ) ) + + .dataa(!\rt_alu[17]~4_combout ), + .datab(!\rt_alu[17]~5_combout ), + .datac(!\REGS|Mux41~2_combout ), + .datad(!\REGS|Mux41~3_combout ), + .datae(!\rt_alu[22]~118_combout ), + .dataf(!\rt_alu[22]~119_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[22]~120_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[22]~120 .extended_lut = "off"; +defparam \rt_alu[22]~120 .lut_mask = 64'h0123456789ABCDEF; +defparam \rt_alu[22]~120 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X31_Y13_N5 +dffeas \REGS|regs[1][22] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[22]~437_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~28_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[1][22]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[1][22] .is_wysiwyg = "true"; +defparam \REGS|regs[1][22] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X31_Y11_N31 +dffeas \REGS|regs[9][22] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[22]~437_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~29_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[9][22]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[9][22] .is_wysiwyg = "true"; +defparam \REGS|regs[9][22] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X37_Y5_N5 +dffeas \REGS|regs[11][22] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[22]~437_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~37_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[11][22]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[11][22] .is_wysiwyg = "true"; +defparam \REGS|regs[11][22] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X37_Y5_N23 +dffeas \REGS|regs[10][22]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[22]~437_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~33_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[10][22]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[10][22]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[10][22]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: FF_X37_Y5_N44 +dffeas \REGS|regs[2][22]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[22]~437_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~32_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[2][22]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[2][22]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[2][22]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y5_N6 +cyclonev_lcell_comb \rt_alu[22]~112 ( +// Equation(s): +// \rt_alu[22]~112_combout = ( \ROM|mem~10_combout & ( \ROM|mem~0_combout & ( \REGS|regs[10][22]~DUPLICATE_q ) ) ) # ( !\ROM|mem~10_combout & ( \ROM|mem~0_combout & ( \REGS|regs[11][22]~q ) ) ) # ( \ROM|mem~10_combout & ( !\ROM|mem~0_combout & ( +// \REGS|regs[2][22]~DUPLICATE_q ) ) ) # ( !\ROM|mem~10_combout & ( !\ROM|mem~0_combout & ( \REGS|regs[2][22]~DUPLICATE_q ) ) ) + + .dataa(!\REGS|regs[11][22]~q ), + .datab(gnd), + .datac(!\REGS|regs[10][22]~DUPLICATE_q ), + .datad(!\REGS|regs[2][22]~DUPLICATE_q ), + .datae(!\ROM|mem~10_combout ), + .dataf(!\ROM|mem~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[22]~112_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[22]~112 .extended_lut = "off"; +defparam \rt_alu[22]~112 .lut_mask = 64'h00FF00FF55550F0F; +defparam \rt_alu[22]~112 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X32_Y13_N11 +dffeas \REGS|regs[14][22] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[22]~437_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~35_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[14][22]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[14][22] .is_wysiwyg = "true"; +defparam \REGS|regs[14][22] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X32_Y13_N23 +dffeas \REGS|regs[15][22] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[22]~437_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~39_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[15][22]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[15][22] .is_wysiwyg = "true"; +defparam \REGS|regs[15][22] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X32_Y13_N14 +dffeas \REGS|regs[6][22] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[22]~437_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~34_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[6][22]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[6][22] .is_wysiwyg = "true"; +defparam \REGS|regs[6][22] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y13_N6 +cyclonev_lcell_comb \rt_alu[22]~113 ( +// Equation(s): +// \rt_alu[22]~113_combout = ( \ROM|mem~10_combout & ( \ROM|mem~0_combout & ( \REGS|regs[14][22]~q ) ) ) # ( !\ROM|mem~10_combout & ( \ROM|mem~0_combout & ( \REGS|regs[15][22]~q ) ) ) # ( \ROM|mem~10_combout & ( !\ROM|mem~0_combout & ( +// \REGS|regs[6][22]~q ) ) ) # ( !\ROM|mem~10_combout & ( !\ROM|mem~0_combout & ( \REGS|regs[6][22]~q ) ) ) + + .dataa(gnd), + .datab(!\REGS|regs[14][22]~q ), + .datac(!\REGS|regs[15][22]~q ), + .datad(!\REGS|regs[6][22]~q ), + .datae(!\ROM|mem~10_combout ), + .dataf(!\ROM|mem~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[22]~113_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[22]~113 .extended_lut = "off"; +defparam \rt_alu[22]~113 .lut_mask = 64'h00FF00FF0F0F3333; +defparam \rt_alu[22]~113 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X35_Y13_N32 +dffeas \REGS|regs[5][22] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[22]~437_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~30_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[5][22]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[5][22] .is_wysiwyg = "true"; +defparam \REGS|regs[5][22] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X35_Y13_N8 +dffeas \REGS|regs[13][22] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[22]~437_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~31_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[13][22]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[13][22] .is_wysiwyg = "true"; +defparam \REGS|regs[13][22] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X35_Y13_N9 +cyclonev_lcell_comb \REGS|Mux41~0 ( +// Equation(s): +// \REGS|Mux41~0_combout = ( \PC|pc[8]~DUPLICATE_q & ( \PC|pc[7]~DUPLICATE_q & ( \REGS|regs[5][22]~q ) ) ) # ( !\PC|pc[8]~DUPLICATE_q & ( \PC|pc[7]~DUPLICATE_q & ( \REGS|regs[5][22]~q ) ) ) # ( \PC|pc[8]~DUPLICATE_q & ( !\PC|pc[7]~DUPLICATE_q & ( +// \REGS|regs[5][22]~q ) ) ) # ( !\PC|pc[8]~DUPLICATE_q & ( !\PC|pc[7]~DUPLICATE_q & ( (!\PC|pc [9] & ((!\PC|pc [6] & ((\REGS|regs[13][22]~q ))) # (\PC|pc [6] & (\REGS|regs[5][22]~q )))) # (\PC|pc [9] & (\REGS|regs[5][22]~q )) ) ) ) + + .dataa(!\PC|pc [9]), + .datab(!\REGS|regs[5][22]~q ), + .datac(!\REGS|regs[13][22]~q ), + .datad(!\PC|pc [6]), + .datae(!\PC|pc[8]~DUPLICATE_q ), + .dataf(!\PC|pc[7]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux41~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux41~0 .extended_lut = "off"; +defparam \REGS|Mux41~0 .lut_mask = 64'h1B33333333333333; +defparam \REGS|Mux41~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X35_Y13_N59 +dffeas \REGS|regs[12][22] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[22]~437_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~26_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[12][22]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[12][22] .is_wysiwyg = "true"; +defparam \REGS|regs[12][22] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X30_Y11_N25 +dffeas \REGS|regs[4][22] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[22]~437_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~22_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[4][22]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[4][22] .is_wysiwyg = "true"; +defparam \REGS|regs[4][22] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X35_Y13_N48 +cyclonev_lcell_comb \REGS|Mux41~1 ( +// Equation(s): +// \REGS|Mux41~1_combout = ( \REGS|regs[12][22]~q & ( \REGS|regs[4][22]~q ) ) # ( !\REGS|regs[12][22]~q & ( \REGS|regs[4][22]~q & ( (((\PC|pc[8]~DUPLICATE_q ) # (\PC|pc [9])) # (\PC|pc[7]~DUPLICATE_q )) # (\PC|pc [6]) ) ) ) # ( \REGS|regs[12][22]~q & ( +// !\REGS|regs[4][22]~q & ( (!\PC|pc [6] & (!\PC|pc[7]~DUPLICATE_q & (!\PC|pc [9] & !\PC|pc[8]~DUPLICATE_q ))) ) ) ) + + .dataa(!\PC|pc [6]), + .datab(!\PC|pc[7]~DUPLICATE_q ), + .datac(!\PC|pc [9]), + .datad(!\PC|pc[8]~DUPLICATE_q ), + .datae(!\REGS|regs[12][22]~q ), + .dataf(!\REGS|regs[4][22]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux41~1_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux41~1 .extended_lut = "off"; +defparam \REGS|Mux41~1 .lut_mask = 64'h000080007FFFFFFF; +defparam \REGS|Mux41~1 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X31_Y13_N36 +cyclonev_lcell_comb \rt_alu[22]~114 ( +// Equation(s): +// \rt_alu[22]~114_combout = ( \REGS|Mux41~1_combout & ( (!\ROM|mem~0_combout ) # ((\REGS|Mux41~0_combout ) # (\ROM|mem~10_combout )) ) ) # ( !\REGS|Mux41~1_combout & ( (\ROM|mem~0_combout & (!\ROM|mem~10_combout & \REGS|Mux41~0_combout )) ) ) + + .dataa(gnd), + .datab(!\ROM|mem~0_combout ), + .datac(!\ROM|mem~10_combout ), + .datad(!\REGS|Mux41~0_combout ), + .datae(gnd), + .dataf(!\REGS|Mux41~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[22]~114_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[22]~114 .extended_lut = "off"; +defparam \rt_alu[22]~114 .lut_mask = 64'h00300030CFFFCFFF; +defparam \rt_alu[22]~114 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X31_Y11_N6 +cyclonev_lcell_comb \rt_alu[22]~115 ( +// Equation(s): +// \rt_alu[22]~115_combout = ( \rt_alu[22]~113_combout & ( \rt_alu[22]~114_combout & ( (!\rt_alu[17]~10_combout ) # (\rt_alu[22]~112_combout ) ) ) ) # ( !\rt_alu[22]~113_combout & ( \rt_alu[22]~114_combout & ( (!\rt_alu[17]~10_combout & +// (!\ROM|mem~12_combout )) # (\rt_alu[17]~10_combout & ((\rt_alu[22]~112_combout ))) ) ) ) # ( \rt_alu[22]~113_combout & ( !\rt_alu[22]~114_combout & ( (!\rt_alu[17]~10_combout & (\ROM|mem~12_combout )) # (\rt_alu[17]~10_combout & +// ((\rt_alu[22]~112_combout ))) ) ) ) # ( !\rt_alu[22]~113_combout & ( !\rt_alu[22]~114_combout & ( (\rt_alu[17]~10_combout & \rt_alu[22]~112_combout ) ) ) ) + + .dataa(gnd), + .datab(!\ROM|mem~12_combout ), + .datac(!\rt_alu[17]~10_combout ), + .datad(!\rt_alu[22]~112_combout ), + .datae(!\rt_alu[22]~113_combout ), + .dataf(!\rt_alu[22]~114_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[22]~115_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[22]~115 .extended_lut = "off"; +defparam \rt_alu[22]~115 .lut_mask = 64'h000F303FC0CFF0FF; +defparam \rt_alu[22]~115 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X31_Y11_N33 +cyclonev_lcell_comb \rt_alu[22]~116 ( +// Equation(s): +// \rt_alu[22]~116_combout = ( \rt_alu[17]~11_combout & ( \rt_alu[22]~115_combout ) ) # ( !\rt_alu[17]~11_combout & ( \rt_alu[22]~115_combout & ( (!\ROM|mem~0_combout & (\REGS|regs[1][22]~q )) # (\ROM|mem~0_combout & ((\REGS|regs[9][22]~q ))) ) ) ) # +// ( !\rt_alu[17]~11_combout & ( !\rt_alu[22]~115_combout & ( (!\ROM|mem~0_combout & (\REGS|regs[1][22]~q )) # (\ROM|mem~0_combout & ((\REGS|regs[9][22]~q ))) ) ) ) + + .dataa(!\ROM|mem~0_combout ), + .datab(!\REGS|regs[1][22]~q ), + .datac(gnd), + .datad(!\REGS|regs[9][22]~q ), + .datae(!\rt_alu[17]~11_combout ), + .dataf(!\rt_alu[22]~115_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[22]~116_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[22]~116 .extended_lut = "off"; +defparam \rt_alu[22]~116 .lut_mask = 64'h227700002277FFFF; +defparam \rt_alu[22]~116 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X31_Y11_N12 +cyclonev_lcell_comb \rt_alu[22]~121 ( +// Equation(s): +// \rt_alu[22]~121_combout = ( \rt_alu[22]~120_combout & ( \rt_alu[22]~116_combout & ( ((\ROM|mem~0_combout & (\REGS|regs[8][22]~q & \rt_alu[31]~39_combout ))) # (\rt_alu[31]~40_combout ) ) ) ) # ( !\rt_alu[22]~120_combout & ( \rt_alu[22]~116_combout +// & ( (!\rt_alu[31]~39_combout & (((\rt_alu[31]~40_combout )))) # (\rt_alu[31]~39_combout & (\ROM|mem~0_combout & (\REGS|regs[8][22]~q & !\rt_alu[31]~40_combout ))) ) ) ) # ( \rt_alu[22]~120_combout & ( !\rt_alu[22]~116_combout & ( +// (\rt_alu[31]~39_combout & (((\ROM|mem~0_combout & \REGS|regs[8][22]~q )) # (\rt_alu[31]~40_combout ))) ) ) ) # ( !\rt_alu[22]~120_combout & ( !\rt_alu[22]~116_combout & ( (\ROM|mem~0_combout & (\REGS|regs[8][22]~q & (\rt_alu[31]~39_combout & +// !\rt_alu[31]~40_combout ))) ) ) ) + + .dataa(!\ROM|mem~0_combout ), + .datab(!\REGS|regs[8][22]~q ), + .datac(!\rt_alu[31]~39_combout ), + .datad(!\rt_alu[31]~40_combout ), + .datae(!\rt_alu[22]~120_combout ), + .dataf(!\rt_alu[22]~116_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[22]~121_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[22]~121 .extended_lut = "off"; +defparam \rt_alu[22]~121 .lut_mask = 64'h0100010F01F001FF; +defparam \rt_alu[22]~121 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y8_N24 +cyclonev_lcell_comb \ALU|Mux9~0 ( +// Equation(s): +// \ALU|Mux9~0_combout = ( \REGS|Mux9~2_combout & ( \rt_alu[22]~121_combout & ( (\ALU|Mux15~0_combout & \CONTROL_UNIT|ALU_FN [1]) ) ) ) # ( !\REGS|Mux9~2_combout & ( \rt_alu[22]~121_combout & ( ((!\CONTROL_UNIT|ALU_FN [0] & (\ALU|Mux15~0_combout & +// \CONTROL_UNIT|ALU_FN [1]))) # (\ALU|Mux29~1_combout ) ) ) ) # ( \REGS|Mux9~2_combout & ( !\rt_alu[22]~121_combout & ( ((!\CONTROL_UNIT|ALU_FN [0] & (\ALU|Mux15~0_combout & \CONTROL_UNIT|ALU_FN [1]))) # (\ALU|Mux29~1_combout ) ) ) ) # ( +// !\REGS|Mux9~2_combout & ( !\rt_alu[22]~121_combout & ( (\ALU|Mux15~0_combout & !\CONTROL_UNIT|ALU_FN [1]) ) ) ) + + .dataa(!\CONTROL_UNIT|ALU_FN [0]), + .datab(!\ALU|Mux15~0_combout ), + .datac(!\CONTROL_UNIT|ALU_FN [1]), + .datad(!\ALU|Mux29~1_combout ), + .datae(!\REGS|Mux9~2_combout ), + .dataf(!\rt_alu[22]~121_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\ALU|Mux9~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \ALU|Mux9~0 .extended_lut = "off"; +defparam \ALU|Mux9~0 .lut_mask = 64'h303002FF02FF0303; +defparam \ALU|Mux9~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X36_Y15_N48 +cyclonev_lcell_comb \REGS|regs[9][21]~feeder ( +// Equation(s): +// \REGS|regs[9][21]~feeder_combout = ( \rd[21]~435_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[21]~435_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[9][21]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[9][21]~feeder .extended_lut = "off"; +defparam \REGS|regs[9][21]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[9][21]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X36_Y15_N50 +dffeas \REGS|regs[9][21]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[9][21]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~29_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[9][21]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[9][21]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[9][21]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: FF_X36_Y12_N58 +dffeas \REGS|regs[8][21]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[21]~435_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~24_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[8][21]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[8][21]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[8][21]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X36_Y14_N12 +cyclonev_lcell_comb \REGS|Mux10~1 ( +// Equation(s): +// \REGS|Mux10~1_combout = ( \ROM|mem~0_combout & ( \ROM|mem~15_combout & ( \REGS|regs[9][21]~DUPLICATE_q ) ) ) # ( \ROM|mem~0_combout & ( !\ROM|mem~15_combout & ( \REGS|regs[8][21]~DUPLICATE_q ) ) ) + + .dataa(!\REGS|regs[9][21]~DUPLICATE_q ), + .datab(gnd), + .datac(gnd), + .datad(!\REGS|regs[8][21]~DUPLICATE_q ), + .datae(!\ROM|mem~0_combout ), + .dataf(!\ROM|mem~15_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux10~1_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux10~1 .extended_lut = "off"; +defparam \REGS|Mux10~1 .lut_mask = 64'h000000FF00005555; +defparam \REGS|Mux10~1 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X30_Y14_N15 +cyclonev_lcell_comb \REGS|regs[18][21]~feeder ( +// Equation(s): +// \REGS|regs[18][21]~feeder_combout = ( \rd[21]~435_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[21]~435_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[18][21]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[18][21]~feeder .extended_lut = "off"; +defparam \REGS|regs[18][21]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[18][21]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X30_Y14_N16 +dffeas \REGS|regs[18][21] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[18][21]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~5_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[18][21]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[18][21] .is_wysiwyg = "true"; +defparam \REGS|regs[18][21] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X31_Y13_N23 +dffeas \REGS|regs[26][21] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[21]~435_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~6_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[26][21]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[26][21] .is_wysiwyg = "true"; +defparam \REGS|regs[26][21] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X31_Y13_N24 +cyclonev_lcell_comb \REGS|Mux42~4 ( +// Equation(s): +// \REGS|Mux42~4_combout = ( \ROM|mem~0_combout & ( \REGS|regs[26][21]~q ) ) # ( !\ROM|mem~0_combout & ( \REGS|regs[18][21]~q ) ) + + .dataa(gnd), + .datab(gnd), + .datac(!\REGS|regs[18][21]~q ), + .datad(!\REGS|regs[26][21]~q ), + .datae(gnd), + .dataf(!\ROM|mem~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux42~4_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux42~4 .extended_lut = "off"; +defparam \REGS|Mux42~4 .lut_mask = 64'h0F0F0F0F00FF00FF; +defparam \REGS|Mux42~4 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X37_Y12_N17 +dffeas \REGS|regs[22][21] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[21]~435_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~9_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[22][21]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[22][21] .is_wysiwyg = "true"; +defparam \REGS|regs[22][21] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X37_Y12_N37 +dffeas \REGS|regs[30][21] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[21]~435_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~10_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[30][21]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[30][21] .is_wysiwyg = "true"; +defparam \REGS|regs[30][21] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y12_N15 +cyclonev_lcell_comb \REGS|Mux42~2 ( +// Equation(s): +// \REGS|Mux42~2_combout = ( \REGS|regs[22][21]~q & ( \REGS|regs[30][21]~q ) ) # ( !\REGS|regs[22][21]~q & ( \REGS|regs[30][21]~q & ( (!\PC|pc [6] & (!\PC|pc [7] & (!\PC|pc [9] & !\PC|pc[8]~DUPLICATE_q ))) ) ) ) # ( \REGS|regs[22][21]~q & ( +// !\REGS|regs[30][21]~q & ( (((\PC|pc[8]~DUPLICATE_q ) # (\PC|pc [9])) # (\PC|pc [7])) # (\PC|pc [6]) ) ) ) + + .dataa(!\PC|pc [6]), + .datab(!\PC|pc [7]), + .datac(!\PC|pc [9]), + .datad(!\PC|pc[8]~DUPLICATE_q ), + .datae(!\REGS|regs[22][21]~q ), + .dataf(!\REGS|regs[30][21]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux42~2_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux42~2 .extended_lut = "off"; +defparam \REGS|Mux42~2 .lut_mask = 64'h00007FFF8000FFFF; +defparam \REGS|Mux42~2 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X40_Y10_N49 +dffeas \REGS|regs[23][21] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[21]~435_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~18_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[23][21]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[23][21] .is_wysiwyg = "true"; +defparam \REGS|regs[23][21] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X40_Y10_N38 +dffeas \REGS|regs[31][21] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[21]~435_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~19_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[31][21]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[31][21] .is_wysiwyg = "true"; +defparam \REGS|regs[31][21] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X40_Y10_N33 +cyclonev_lcell_comb \REGS|Mux42~3 ( +// Equation(s): +// \REGS|Mux42~3_combout = ( \REGS|regs[23][21]~q & ( \REGS|regs[31][21]~q ) ) # ( !\REGS|regs[23][21]~q & ( \REGS|regs[31][21]~q & ( (!\PC|pc [8] & (!\PC|pc [9] & (!\PC|pc [6] & !\PC|pc[7]~DUPLICATE_q ))) ) ) ) # ( \REGS|regs[23][21]~q & ( +// !\REGS|regs[31][21]~q & ( (((\PC|pc[7]~DUPLICATE_q ) # (\PC|pc [6])) # (\PC|pc [9])) # (\PC|pc [8]) ) ) ) + + .dataa(!\PC|pc [8]), + .datab(!\PC|pc [9]), + .datac(!\PC|pc [6]), + .datad(!\PC|pc[7]~DUPLICATE_q ), + .datae(!\REGS|regs[23][21]~q ), + .dataf(!\REGS|regs[31][21]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux42~3_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux42~3 .extended_lut = "off"; +defparam \REGS|Mux42~3 .lut_mask = 64'h00007FFF8000FFFF; +defparam \REGS|Mux42~3 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X35_Y15_N57 +cyclonev_lcell_comb \REGS|regs[13][21]~feeder ( +// Equation(s): +// \REGS|regs[13][21]~feeder_combout = ( \rd[21]~435_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[21]~435_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[13][21]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[13][21]~feeder .extended_lut = "off"; +defparam \REGS|regs[13][21]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[13][21]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X35_Y15_N59 +dffeas \REGS|regs[13][21]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[13][21]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~31_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[13][21]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[13][21]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[13][21]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y12_N49 +dffeas \REGS|regs[5][21] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[21]~435_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~30_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[5][21]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[5][21] .is_wysiwyg = "true"; +defparam \REGS|regs[5][21] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X35_Y15_N42 +cyclonev_lcell_comb \REGS|Mux42~1 ( +// Equation(s): +// \REGS|Mux42~1_combout = ( \PC|pc[8]~DUPLICATE_q & ( \REGS|regs[5][21]~q ) ) # ( !\PC|pc[8]~DUPLICATE_q & ( \REGS|regs[5][21]~q & ( (((\PC|pc [9]) # (\PC|pc[7]~DUPLICATE_q )) # (\REGS|regs[13][21]~DUPLICATE_q )) # (\PC|pc [6]) ) ) ) # ( +// !\PC|pc[8]~DUPLICATE_q & ( !\REGS|regs[5][21]~q & ( (!\PC|pc [6] & (\REGS|regs[13][21]~DUPLICATE_q & (!\PC|pc[7]~DUPLICATE_q & !\PC|pc [9]))) ) ) ) + + .dataa(!\PC|pc [6]), + .datab(!\REGS|regs[13][21]~DUPLICATE_q ), + .datac(!\PC|pc[7]~DUPLICATE_q ), + .datad(!\PC|pc [9]), + .datae(!\PC|pc[8]~DUPLICATE_q ), + .dataf(!\REGS|regs[5][21]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux42~1_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux42~1 .extended_lut = "off"; +defparam \REGS|Mux42~1 .lut_mask = 64'h200000007FFFFFFF; +defparam \REGS|Mux42~1 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X33_Y8_N37 +dffeas \REGS|regs[4][21] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[21]~435_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~22_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[4][21]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[4][21] .is_wysiwyg = "true"; +defparam \REGS|regs[4][21] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X33_Y8_N59 +dffeas \REGS|regs[12][21] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[21]~435_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~26_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[12][21]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[12][21] .is_wysiwyg = "true"; +defparam \REGS|regs[12][21] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X33_Y8_N48 +cyclonev_lcell_comb \REGS|Mux42~0 ( +// Equation(s): +// \REGS|Mux42~0_combout = ( \REGS|regs[12][21]~q & ( \PC|pc [6] & ( \REGS|regs[4][21]~q ) ) ) # ( !\REGS|regs[12][21]~q & ( \PC|pc [6] & ( \REGS|regs[4][21]~q ) ) ) # ( \REGS|regs[12][21]~q & ( !\PC|pc [6] & ( ((!\PC|pc[8]~DUPLICATE_q & +// (!\PC|pc[7]~DUPLICATE_q & !\PC|pc[9]~DUPLICATE_q ))) # (\REGS|regs[4][21]~q ) ) ) ) # ( !\REGS|regs[12][21]~q & ( !\PC|pc [6] & ( (\REGS|regs[4][21]~q & (((\PC|pc[9]~DUPLICATE_q ) # (\PC|pc[7]~DUPLICATE_q )) # (\PC|pc[8]~DUPLICATE_q ))) ) ) ) + + .dataa(!\PC|pc[8]~DUPLICATE_q ), + .datab(!\PC|pc[7]~DUPLICATE_q ), + .datac(!\PC|pc[9]~DUPLICATE_q ), + .datad(!\REGS|regs[4][21]~q ), + .datae(!\REGS|regs[12][21]~q ), + .dataf(!\PC|pc [6]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux42~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux42~0 .extended_lut = "off"; +defparam \REGS|Mux42~0 .lut_mask = 64'h007F80FF00FF00FF; +defparam \REGS|Mux42~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y13_N30 +cyclonev_lcell_comb \REGS|Mux10~0 ( +// Equation(s): +// \REGS|Mux10~0_combout = ( \REGS|Mux42~0_combout & ( \ROM|mem~16_combout & ( (!\ROM|mem~9_combout & ((\REGS|Mux42~1_combout ))) # (\ROM|mem~9_combout & (\REGS|Mux42~3_combout )) ) ) ) # ( !\REGS|Mux42~0_combout & ( \ROM|mem~16_combout & ( +// (!\ROM|mem~9_combout & ((\REGS|Mux42~1_combout ))) # (\ROM|mem~9_combout & (\REGS|Mux42~3_combout )) ) ) ) # ( \REGS|Mux42~0_combout & ( !\ROM|mem~16_combout & ( (!\ROM|mem~9_combout ) # (\REGS|Mux42~2_combout ) ) ) ) # ( !\REGS|Mux42~0_combout & ( +// !\ROM|mem~16_combout & ( (\REGS|Mux42~2_combout & \ROM|mem~9_combout ) ) ) ) + + .dataa(!\REGS|Mux42~2_combout ), + .datab(!\ROM|mem~9_combout ), + .datac(!\REGS|Mux42~3_combout ), + .datad(!\REGS|Mux42~1_combout ), + .datae(!\REGS|Mux42~0_combout ), + .dataf(!\ROM|mem~16_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux10~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux10~0 .extended_lut = "off"; +defparam \REGS|Mux10~0 .lut_mask = 64'h1111DDDD03CF03CF; +defparam \REGS|Mux10~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y13_N6 +cyclonev_lcell_comb \REGS|Mux10~2 ( +// Equation(s): +// \REGS|Mux10~2_combout = ( \ROM|mem~17_combout & ( \REGS|Mux10~0_combout ) ) # ( !\ROM|mem~17_combout & ( \REGS|Mux10~0_combout & ( ((\ROM|mem~9_combout & \REGS|Mux42~4_combout )) # (\REGS|Mux10~1_combout ) ) ) ) # ( !\ROM|mem~17_combout & ( +// !\REGS|Mux10~0_combout & ( ((\ROM|mem~9_combout & \REGS|Mux42~4_combout )) # (\REGS|Mux10~1_combout ) ) ) ) + + .dataa(gnd), + .datab(!\ROM|mem~9_combout ), + .datac(!\REGS|Mux10~1_combout ), + .datad(!\REGS|Mux42~4_combout ), + .datae(!\ROM|mem~17_combout ), + .dataf(!\REGS|Mux10~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux10~2_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux10~2 .extended_lut = "off"; +defparam \REGS|Mux10~2 .lut_mask = 64'h0F3F00000F3FFFFF; +defparam \REGS|Mux10~2 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y14_N48 +cyclonev_lcell_comb \REGS|regs[24][21]~feeder ( +// Equation(s): +// \REGS|regs[24][21]~feeder_combout = ( \rd[21]~435_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[21]~435_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[24][21]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[24][21]~feeder .extended_lut = "off"; +defparam \REGS|regs[24][21]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[24][21]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X32_Y14_N50 +dffeas \REGS|regs[24][21] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[24][21]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~4_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[24][21]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[24][21] .is_wysiwyg = "true"; +defparam \REGS|regs[24][21] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X32_Y14_N14 +dffeas \REGS|regs[25][21] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[21]~435_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~13_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[25][21]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[25][21] .is_wysiwyg = "true"; +defparam \REGS|regs[25][21] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y14_N15 +cyclonev_lcell_comb \REGS|regs[16][21]~feeder ( +// Equation(s): +// \REGS|regs[16][21]~feeder_combout = ( \rd[21]~435_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[21]~435_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[16][21]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[16][21]~feeder .extended_lut = "off"; +defparam \REGS|regs[16][21]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[16][21]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X37_Y14_N16 +dffeas \REGS|regs[16][21] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[16][21]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~2_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[16][21]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[16][21] .is_wysiwyg = "true"; +defparam \REGS|regs[16][21] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y14_N30 +cyclonev_lcell_comb \rt_alu[21]~108 ( +// Equation(s): +// \rt_alu[21]~108_combout = ( \ROM|mem~10_combout & ( \ROM|mem~0_combout & ( \REGS|regs[24][21]~q ) ) ) # ( !\ROM|mem~10_combout & ( \ROM|mem~0_combout & ( \REGS|regs[25][21]~q ) ) ) # ( \ROM|mem~10_combout & ( !\ROM|mem~0_combout & ( +// \REGS|regs[16][21]~q ) ) ) # ( !\ROM|mem~10_combout & ( !\ROM|mem~0_combout & ( \REGS|regs[16][21]~q ) ) ) + + .dataa(!\REGS|regs[24][21]~q ), + .datab(!\REGS|regs[25][21]~q ), + .datac(!\REGS|regs[16][21]~q ), + .datad(gnd), + .datae(!\ROM|mem~10_combout ), + .dataf(!\ROM|mem~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[21]~108_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[21]~108 .extended_lut = "off"; +defparam \rt_alu[21]~108 .lut_mask = 64'h0F0F0F0F33335555; +defparam \rt_alu[21]~108 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X30_Y13_N11 +dffeas \REGS|regs[27][21] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[21]~435_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~15_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[27][21]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[27][21] .is_wysiwyg = "true"; +defparam \REGS|regs[27][21] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y9_N5 +dffeas \REGS|regs[19][21] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[21]~435_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~14_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[19][21]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[19][21] .is_wysiwyg = "true"; +defparam \REGS|regs[19][21] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X30_Y13_N48 +cyclonev_lcell_comb \REGS|Mux42~5 ( +// Equation(s): +// \REGS|Mux42~5_combout = ( \ROM|mem~0_combout & ( \REGS|regs[19][21]~q & ( \REGS|regs[27][21]~q ) ) ) # ( !\ROM|mem~0_combout & ( \REGS|regs[19][21]~q ) ) # ( \ROM|mem~0_combout & ( !\REGS|regs[19][21]~q & ( \REGS|regs[27][21]~q ) ) ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(!\REGS|regs[27][21]~q ), + .datae(!\ROM|mem~0_combout ), + .dataf(!\REGS|regs[19][21]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux42~5_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux42~5 .extended_lut = "off"; +defparam \REGS|Mux42~5 .lut_mask = 64'h000000FFFFFF00FF; +defparam \REGS|Mux42~5 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X37_Y13_N38 +dffeas \REGS|regs[28][21] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[21]~435_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~8_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[28][21]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[28][21] .is_wysiwyg = "true"; +defparam \REGS|regs[28][21] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X37_Y13_N14 +dffeas \REGS|regs[20][21]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[21]~435_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~7_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[20][21]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[20][21]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[20][21]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: FF_X37_Y13_N59 +dffeas \REGS|regs[29][21] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[21]~435_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~17_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[29][21]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[29][21] .is_wysiwyg = "true"; +defparam \REGS|regs[29][21] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y13_N3 +cyclonev_lcell_comb \rt_alu[21]~106 ( +// Equation(s): +// \rt_alu[21]~106_combout = ( \REGS|regs[29][21]~q & ( \ROM|mem~10_combout & ( (!\ROM|mem~0_combout & ((\REGS|regs[20][21]~DUPLICATE_q ))) # (\ROM|mem~0_combout & (\REGS|regs[28][21]~q )) ) ) ) # ( !\REGS|regs[29][21]~q & ( \ROM|mem~10_combout & ( +// (!\ROM|mem~0_combout & ((\REGS|regs[20][21]~DUPLICATE_q ))) # (\ROM|mem~0_combout & (\REGS|regs[28][21]~q )) ) ) ) # ( \REGS|regs[29][21]~q & ( !\ROM|mem~10_combout & ( (\ROM|mem~0_combout ) # (\REGS|regs[20][21]~DUPLICATE_q ) ) ) ) # ( +// !\REGS|regs[29][21]~q & ( !\ROM|mem~10_combout & ( (\REGS|regs[20][21]~DUPLICATE_q & !\ROM|mem~0_combout ) ) ) ) + + .dataa(!\REGS|regs[28][21]~q ), + .datab(!\REGS|regs[20][21]~DUPLICATE_q ), + .datac(gnd), + .datad(!\ROM|mem~0_combout ), + .datae(!\REGS|regs[29][21]~q ), + .dataf(!\ROM|mem~10_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[21]~106_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[21]~106 .extended_lut = "off"; +defparam \rt_alu[21]~106 .lut_mask = 64'h330033FF33553355; +defparam \rt_alu[21]~106 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y13_N15 +cyclonev_lcell_comb \rt_alu[21]~107 ( +// Equation(s): +// \rt_alu[21]~107_combout = ( \rt_alu[21]~106_combout & ( \REGS|Mux42~3_combout & ( ((!\ROM|mem~12_combout ) # (\ROM|mem~13_combout )) # (\REGS|Mux42~2_combout ) ) ) ) # ( !\rt_alu[21]~106_combout & ( \REGS|Mux42~3_combout & ( (\ROM|mem~12_combout & +// ((\ROM|mem~13_combout ) # (\REGS|Mux42~2_combout ))) ) ) ) # ( \rt_alu[21]~106_combout & ( !\REGS|Mux42~3_combout & ( (!\ROM|mem~12_combout ) # ((\REGS|Mux42~2_combout & !\ROM|mem~13_combout )) ) ) ) # ( !\rt_alu[21]~106_combout & ( +// !\REGS|Mux42~3_combout & ( (\REGS|Mux42~2_combout & (!\ROM|mem~13_combout & \ROM|mem~12_combout )) ) ) ) + + .dataa(!\REGS|Mux42~2_combout ), + .datab(gnd), + .datac(!\ROM|mem~13_combout ), + .datad(!\ROM|mem~12_combout ), + .datae(!\rt_alu[21]~106_combout ), + .dataf(!\REGS|Mux42~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[21]~107_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[21]~107 .extended_lut = "off"; +defparam \rt_alu[21]~107 .lut_mask = 64'h0050FF50005FFF5F; +defparam \rt_alu[21]~107 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y13_N24 +cyclonev_lcell_comb \rt_alu[21]~109 ( +// Equation(s): +// \rt_alu[21]~109_combout = ( \REGS|Mux42~5_combout & ( \rt_alu[21]~107_combout & ( (!\rt_alu[17]~4_combout & (((\rt_alu[21]~108_combout )) # (\rt_alu[17]~5_combout ))) # (\rt_alu[17]~4_combout & ((!\rt_alu[17]~5_combout ) # ((\REGS|Mux42~4_combout +// )))) ) ) ) # ( !\REGS|Mux42~5_combout & ( \rt_alu[21]~107_combout & ( (!\rt_alu[17]~4_combout & (!\rt_alu[17]~5_combout & (\rt_alu[21]~108_combout ))) # (\rt_alu[17]~4_combout & ((!\rt_alu[17]~5_combout ) # ((\REGS|Mux42~4_combout )))) ) ) ) # ( +// \REGS|Mux42~5_combout & ( !\rt_alu[21]~107_combout & ( (!\rt_alu[17]~4_combout & (((\rt_alu[21]~108_combout )) # (\rt_alu[17]~5_combout ))) # (\rt_alu[17]~4_combout & (\rt_alu[17]~5_combout & ((\REGS|Mux42~4_combout )))) ) ) ) # ( +// !\REGS|Mux42~5_combout & ( !\rt_alu[21]~107_combout & ( (!\rt_alu[17]~4_combout & (!\rt_alu[17]~5_combout & (\rt_alu[21]~108_combout ))) # (\rt_alu[17]~4_combout & (\rt_alu[17]~5_combout & ((\REGS|Mux42~4_combout )))) ) ) ) + + .dataa(!\rt_alu[17]~4_combout ), + .datab(!\rt_alu[17]~5_combout ), + .datac(!\rt_alu[21]~108_combout ), + .datad(!\REGS|Mux42~4_combout ), + .datae(!\REGS|Mux42~5_combout ), + .dataf(!\rt_alu[21]~107_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[21]~109_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[21]~109 .extended_lut = "off"; +defparam \rt_alu[21]~109 .lut_mask = 64'h08192A3B4C5D6E7F; +defparam \rt_alu[21]~109 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X31_Y14_N28 +dffeas \REGS|regs[1][21]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[21]~435_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~28_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[1][21]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[1][21]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[1][21]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: FF_X32_Y13_N47 +dffeas \REGS|regs[6][21] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[21]~435_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~34_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[6][21]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[6][21] .is_wysiwyg = "true"; +defparam \REGS|regs[6][21] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X36_Y15_N12 +cyclonev_lcell_comb \REGS|regs[15][21]~feeder ( +// Equation(s): +// \REGS|regs[15][21]~feeder_combout = ( \rd[21]~435_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[21]~435_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[15][21]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[15][21]~feeder .extended_lut = "off"; +defparam \REGS|regs[15][21]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[15][21]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X36_Y15_N14 +dffeas \REGS|regs[15][21] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[15][21]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~39_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[15][21]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[15][21] .is_wysiwyg = "true"; +defparam \REGS|regs[15][21] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X31_Y14_N55 +dffeas \REGS|regs[14][21] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[21]~435_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~35_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[14][21]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[14][21] .is_wysiwyg = "true"; +defparam \REGS|regs[14][21] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X36_Y15_N39 +cyclonev_lcell_comb \rt_alu[21]~102 ( +// Equation(s): +// \rt_alu[21]~102_combout = ( \ROM|mem~0_combout & ( \ROM|mem~10_combout & ( \REGS|regs[14][21]~q ) ) ) # ( !\ROM|mem~0_combout & ( \ROM|mem~10_combout & ( \REGS|regs[6][21]~q ) ) ) # ( \ROM|mem~0_combout & ( !\ROM|mem~10_combout & ( +// \REGS|regs[15][21]~q ) ) ) # ( !\ROM|mem~0_combout & ( !\ROM|mem~10_combout & ( \REGS|regs[6][21]~q ) ) ) + + .dataa(!\REGS|regs[6][21]~q ), + .datab(gnd), + .datac(!\REGS|regs[15][21]~q ), + .datad(!\REGS|regs[14][21]~q ), + .datae(!\ROM|mem~0_combout ), + .dataf(!\ROM|mem~10_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[21]~102_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[21]~102 .extended_lut = "off"; +defparam \rt_alu[21]~102 .lut_mask = 64'h55550F0F555500FF; +defparam \rt_alu[21]~102 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X36_Y16_N18 +cyclonev_lcell_comb \REGS|regs[2][21]~feeder ( +// Equation(s): +// \REGS|regs[2][21]~feeder_combout = ( \rd[21]~435_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[21]~435_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[2][21]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[2][21]~feeder .extended_lut = "off"; +defparam \REGS|regs[2][21]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[2][21]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X36_Y16_N19 +dffeas \REGS|regs[2][21] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[2][21]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~32_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[2][21]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[2][21] .is_wysiwyg = "true"; +defparam \REGS|regs[2][21] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X36_Y15_N42 +cyclonev_lcell_comb \REGS|regs[11][21]~feeder ( +// Equation(s): +// \REGS|regs[11][21]~feeder_combout = ( \rd[21]~435_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[21]~435_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[11][21]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[11][21]~feeder .extended_lut = "off"; +defparam \REGS|regs[11][21]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[11][21]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X36_Y15_N44 +dffeas \REGS|regs[11][21] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[11][21]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~37_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[11][21]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[11][21] .is_wysiwyg = "true"; +defparam \REGS|regs[11][21] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X36_Y16_N48 +cyclonev_lcell_comb \REGS|regs[10][21]~feeder ( +// Equation(s): +// \REGS|regs[10][21]~feeder_combout = ( \rd[21]~435_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[21]~435_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[10][21]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[10][21]~feeder .extended_lut = "off"; +defparam \REGS|regs[10][21]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[10][21]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X36_Y16_N50 +dffeas \REGS|regs[10][21] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[10][21]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~33_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[10][21]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[10][21] .is_wysiwyg = "true"; +defparam \REGS|regs[10][21] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X36_Y15_N21 +cyclonev_lcell_comb \rt_alu[21]~101 ( +// Equation(s): +// \rt_alu[21]~101_combout = ( \ROM|mem~0_combout & ( \ROM|mem~10_combout & ( \REGS|regs[10][21]~q ) ) ) # ( !\ROM|mem~0_combout & ( \ROM|mem~10_combout & ( \REGS|regs[2][21]~q ) ) ) # ( \ROM|mem~0_combout & ( !\ROM|mem~10_combout & ( +// \REGS|regs[11][21]~q ) ) ) # ( !\ROM|mem~0_combout & ( !\ROM|mem~10_combout & ( \REGS|regs[2][21]~q ) ) ) + + .dataa(!\REGS|regs[2][21]~q ), + .datab(gnd), + .datac(!\REGS|regs[11][21]~q ), + .datad(!\REGS|regs[10][21]~q ), + .datae(!\ROM|mem~0_combout ), + .dataf(!\ROM|mem~10_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[21]~101_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[21]~101 .extended_lut = "off"; +defparam \rt_alu[21]~101 .lut_mask = 64'h55550F0F555500FF; +defparam \rt_alu[21]~101 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X36_Y15_N33 +cyclonev_lcell_comb \rt_alu[21]~103 ( +// Equation(s): +// \rt_alu[21]~103_combout = ( \REGS|Mux42~1_combout & ( \REGS|Mux42~0_combout ) ) # ( !\REGS|Mux42~1_combout & ( \REGS|Mux42~0_combout & ( (!\ROM|mem~0_combout ) # (\ROM|mem~10_combout ) ) ) ) # ( \REGS|Mux42~1_combout & ( !\REGS|Mux42~0_combout & ( +// (\ROM|mem~0_combout & !\ROM|mem~10_combout ) ) ) ) + + .dataa(gnd), + .datab(!\ROM|mem~0_combout ), + .datac(!\ROM|mem~10_combout ), + .datad(gnd), + .datae(!\REGS|Mux42~1_combout ), + .dataf(!\REGS|Mux42~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[21]~103_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[21]~103 .extended_lut = "off"; +defparam \rt_alu[21]~103 .lut_mask = 64'h00003030CFCFFFFF; +defparam \rt_alu[21]~103 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X36_Y15_N24 +cyclonev_lcell_comb \rt_alu[21]~104 ( +// Equation(s): +// \rt_alu[21]~104_combout = ( \rt_alu[17]~10_combout & ( \rt_alu[21]~103_combout & ( \rt_alu[21]~101_combout ) ) ) # ( !\rt_alu[17]~10_combout & ( \rt_alu[21]~103_combout & ( (!\ROM|mem~12_combout ) # (\rt_alu[21]~102_combout ) ) ) ) # ( +// \rt_alu[17]~10_combout & ( !\rt_alu[21]~103_combout & ( \rt_alu[21]~101_combout ) ) ) # ( !\rt_alu[17]~10_combout & ( !\rt_alu[21]~103_combout & ( (\rt_alu[21]~102_combout & \ROM|mem~12_combout ) ) ) ) + + .dataa(gnd), + .datab(!\rt_alu[21]~102_combout ), + .datac(!\rt_alu[21]~101_combout ), + .datad(!\ROM|mem~12_combout ), + .datae(!\rt_alu[17]~10_combout ), + .dataf(!\rt_alu[21]~103_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[21]~104_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[21]~104 .extended_lut = "off"; +defparam \rt_alu[21]~104 .lut_mask = 64'h00330F0FFF330F0F; +defparam \rt_alu[21]~104 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X36_Y15_N9 +cyclonev_lcell_comb \rt_alu[21]~105 ( +// Equation(s): +// \rt_alu[21]~105_combout = ( \ROM|mem~0_combout & ( \rt_alu[21]~104_combout & ( (\REGS|regs[9][21]~DUPLICATE_q ) # (\rt_alu[17]~11_combout ) ) ) ) # ( !\ROM|mem~0_combout & ( \rt_alu[21]~104_combout & ( (\rt_alu[17]~11_combout ) # +// (\REGS|regs[1][21]~DUPLICATE_q ) ) ) ) # ( \ROM|mem~0_combout & ( !\rt_alu[21]~104_combout & ( (!\rt_alu[17]~11_combout & \REGS|regs[9][21]~DUPLICATE_q ) ) ) ) # ( !\ROM|mem~0_combout & ( !\rt_alu[21]~104_combout & ( (\REGS|regs[1][21]~DUPLICATE_q & +// !\rt_alu[17]~11_combout ) ) ) ) + + .dataa(!\REGS|regs[1][21]~DUPLICATE_q ), + .datab(gnd), + .datac(!\rt_alu[17]~11_combout ), + .datad(!\REGS|regs[9][21]~DUPLICATE_q ), + .datae(!\ROM|mem~0_combout ), + .dataf(!\rt_alu[21]~104_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[21]~105_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[21]~105 .extended_lut = "off"; +defparam \rt_alu[21]~105 .lut_mask = 64'h505000F05F5F0FFF; +defparam \rt_alu[21]~105 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X31_Y10_N33 +cyclonev_lcell_comb \rt_alu[21]~111 ( +// Equation(s): +// \rt_alu[21]~111_combout = ( \rt_alu[21]~109_combout & ( \rt_alu[21]~105_combout & ( ((\rt_alu[31]~39_combout & \rt_alu[21]~110_combout )) # (\rt_alu[31]~40_combout ) ) ) ) # ( !\rt_alu[21]~109_combout & ( \rt_alu[21]~105_combout & ( +// (!\rt_alu[31]~39_combout & ((\rt_alu[31]~40_combout ))) # (\rt_alu[31]~39_combout & (\rt_alu[21]~110_combout )) ) ) ) # ( \rt_alu[21]~109_combout & ( !\rt_alu[21]~105_combout & ( (\rt_alu[31]~39_combout & ((\rt_alu[31]~40_combout ) # +// (\rt_alu[21]~110_combout ))) ) ) ) # ( !\rt_alu[21]~109_combout & ( !\rt_alu[21]~105_combout & ( (\rt_alu[31]~39_combout & \rt_alu[21]~110_combout ) ) ) ) + + .dataa(gnd), + .datab(!\rt_alu[31]~39_combout ), + .datac(!\rt_alu[21]~110_combout ), + .datad(!\rt_alu[31]~40_combout ), + .datae(!\rt_alu[21]~109_combout ), + .dataf(!\rt_alu[21]~105_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[21]~111_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[21]~111 .extended_lut = "off"; +defparam \rt_alu[21]~111 .lut_mask = 64'h0303033303CF03FF; +defparam \rt_alu[21]~111 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X31_Y10_N12 +cyclonev_lcell_comb \ALU|Mux10~0 ( +// Equation(s): +// \ALU|Mux10~0_combout = ( \ALU|Mux29~1_combout & ( \rt_alu[21]~111_combout & ( (!\REGS|Mux10~2_combout ) # ((\CONTROL_UNIT|ALU_FN [1] & \ALU|Mux15~0_combout )) ) ) ) # ( !\ALU|Mux29~1_combout & ( \rt_alu[21]~111_combout & ( (\CONTROL_UNIT|ALU_FN [1] & +// (\ALU|Mux15~0_combout & ((!\CONTROL_UNIT|ALU_FN [0]) # (\REGS|Mux10~2_combout )))) ) ) ) # ( \ALU|Mux29~1_combout & ( !\rt_alu[21]~111_combout & ( ((!\CONTROL_UNIT|ALU_FN [1] & \ALU|Mux15~0_combout )) # (\REGS|Mux10~2_combout ) ) ) ) # ( +// !\ALU|Mux29~1_combout & ( !\rt_alu[21]~111_combout & ( (\ALU|Mux15~0_combout & ((!\CONTROL_UNIT|ALU_FN [1] & ((!\REGS|Mux10~2_combout ))) # (\CONTROL_UNIT|ALU_FN [1] & (!\CONTROL_UNIT|ALU_FN [0] & \REGS|Mux10~2_combout )))) ) ) ) + + .dataa(!\CONTROL_UNIT|ALU_FN [1]), + .datab(!\CONTROL_UNIT|ALU_FN [0]), + .datac(!\ALU|Mux15~0_combout ), + .datad(!\REGS|Mux10~2_combout ), + .datae(!\ALU|Mux29~1_combout ), + .dataf(!\rt_alu[21]~111_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\ALU|Mux10~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \ALU|Mux10~0 .extended_lut = "off"; +defparam \ALU|Mux10~0 .lut_mask = 64'h0A040AFF0405FF05; +defparam \ALU|Mux10~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X41_Y3_N35 +dffeas \REGS|regs[24][20] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[20]~348_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~4_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[24][20]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[24][20] .is_wysiwyg = "true"; +defparam \REGS|regs[24][20] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X33_Y7_N4 +dffeas \REGS|regs[16][20] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[20]~348_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~2_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[16][20]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[16][20] .is_wysiwyg = "true"; +defparam \REGS|regs[16][20] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X40_Y6_N25 +dffeas \REGS|regs[25][20] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[20]~348_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~13_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[25][20]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[25][20] .is_wysiwyg = "true"; +defparam \REGS|regs[25][20] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X35_Y6_N48 +cyclonev_lcell_comb \rt_alu[20]~98 ( +// Equation(s): +// \rt_alu[20]~98_combout = ( \REGS|regs[25][20]~q & ( \ROM|mem~0_combout & ( (!\ROM|mem~10_combout ) # (\REGS|regs[24][20]~q ) ) ) ) # ( !\REGS|regs[25][20]~q & ( \ROM|mem~0_combout & ( (\REGS|regs[24][20]~q & \ROM|mem~10_combout ) ) ) ) # ( +// \REGS|regs[25][20]~q & ( !\ROM|mem~0_combout & ( \REGS|regs[16][20]~q ) ) ) # ( !\REGS|regs[25][20]~q & ( !\ROM|mem~0_combout & ( \REGS|regs[16][20]~q ) ) ) + + .dataa(!\REGS|regs[24][20]~q ), + .datab(!\ROM|mem~10_combout ), + .datac(gnd), + .datad(!\REGS|regs[16][20]~q ), + .datae(!\REGS|regs[25][20]~q ), + .dataf(!\ROM|mem~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[20]~98_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[20]~98 .extended_lut = "off"; +defparam \rt_alu[20]~98 .lut_mask = 64'h00FF00FF1111DDDD; +defparam \rt_alu[20]~98 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X40_Y8_N22 +dffeas \REGS|regs[26][20] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[20]~348_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~6_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[26][20]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[26][20] .is_wysiwyg = "true"; +defparam \REGS|regs[26][20] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X40_Y3_N46 +dffeas \REGS|regs[18][20] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[20]~348_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~5_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[18][20]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[18][20] .is_wysiwyg = "true"; +defparam \REGS|regs[18][20] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X40_Y8_N21 +cyclonev_lcell_comb \REGS|Mux43~2 ( +// Equation(s): +// \REGS|Mux43~2_combout = ( \REGS|regs[26][20]~q & ( \REGS|regs[18][20]~q ) ) # ( !\REGS|regs[26][20]~q & ( \REGS|regs[18][20]~q & ( (((\PC|pc [7]) # (\PC|pc[8]~DUPLICATE_q )) # (\PC|pc [6])) # (\PC|pc [9]) ) ) ) # ( \REGS|regs[26][20]~q & ( +// !\REGS|regs[18][20]~q & ( (!\PC|pc [9] & (!\PC|pc [6] & (!\PC|pc[8]~DUPLICATE_q & !\PC|pc [7]))) ) ) ) + + .dataa(!\PC|pc [9]), + .datab(!\PC|pc [6]), + .datac(!\PC|pc[8]~DUPLICATE_q ), + .datad(!\PC|pc [7]), + .datae(!\REGS|regs[26][20]~q ), + .dataf(!\REGS|regs[18][20]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux43~2_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux43~2 .extended_lut = "off"; +defparam \REGS|Mux43~2 .lut_mask = 64'h000080007FFFFFFF; +defparam \REGS|Mux43~2 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y15_N33 +cyclonev_lcell_comb \REGS|regs[27][20]~feeder ( +// Equation(s): +// \REGS|regs[27][20]~feeder_combout = ( \rd[20]~348_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[20]~348_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[27][20]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[27][20]~feeder .extended_lut = "off"; +defparam \REGS|regs[27][20]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[27][20]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X37_Y15_N35 +dffeas \REGS|regs[27][20] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[27][20]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~15_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[27][20]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[27][20] .is_wysiwyg = "true"; +defparam \REGS|regs[27][20] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X38_Y16_N36 +cyclonev_lcell_comb \REGS|regs[19][20]~feeder ( +// Equation(s): +// \REGS|regs[19][20]~feeder_combout = ( \rd[20]~348_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[20]~348_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[19][20]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[19][20]~feeder .extended_lut = "off"; +defparam \REGS|regs[19][20]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[19][20]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X38_Y16_N38 +dffeas \REGS|regs[19][20]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[19][20]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~14_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[19][20]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[19][20]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[19][20]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y15_N6 +cyclonev_lcell_comb \REGS|Mux43~3 ( +// Equation(s): +// \REGS|Mux43~3_combout = ( \PC|pc [7] & ( \PC|pc [9] & ( \REGS|regs[19][20]~DUPLICATE_q ) ) ) # ( !\PC|pc [7] & ( \PC|pc [9] & ( \REGS|regs[19][20]~DUPLICATE_q ) ) ) # ( \PC|pc [7] & ( !\PC|pc [9] & ( \REGS|regs[19][20]~DUPLICATE_q ) ) ) # ( !\PC|pc +// [7] & ( !\PC|pc [9] & ( (!\PC|pc[8]~DUPLICATE_q & ((!\PC|pc[6]~DUPLICATE_q & (\REGS|regs[27][20]~q )) # (\PC|pc[6]~DUPLICATE_q & ((\REGS|regs[19][20]~DUPLICATE_q ))))) # (\PC|pc[8]~DUPLICATE_q & (((\REGS|regs[19][20]~DUPLICATE_q )))) ) ) ) + + .dataa(!\REGS|regs[27][20]~q ), + .datab(!\REGS|regs[19][20]~DUPLICATE_q ), + .datac(!\PC|pc[8]~DUPLICATE_q ), + .datad(!\PC|pc[6]~DUPLICATE_q ), + .datae(!\PC|pc [7]), + .dataf(!\PC|pc [9]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux43~3_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux43~3 .extended_lut = "off"; +defparam \REGS|Mux43~3 .lut_mask = 64'h5333333333333333; +defparam \REGS|Mux43~3 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X38_Y4_N56 +dffeas \REGS|regs[28][20] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[20]~348_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~8_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[28][20]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[28][20] .is_wysiwyg = "true"; +defparam \REGS|regs[28][20] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X38_Y5_N44 +dffeas \REGS|regs[29][20] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[20]~348_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~17_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[29][20]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[29][20] .is_wysiwyg = "true"; +defparam \REGS|regs[29][20] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X38_Y5_N35 +dffeas \REGS|regs[20][20]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[20]~348_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~7_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[20][20]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[20][20]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[20][20]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X38_Y5_N51 +cyclonev_lcell_comb \rt_alu[20]~96 ( +// Equation(s): +// \rt_alu[20]~96_combout = ( \ROM|mem~10_combout & ( (!\ROM|mem~0_combout & ((\REGS|regs[20][20]~DUPLICATE_q ))) # (\ROM|mem~0_combout & (\REGS|regs[28][20]~q )) ) ) # ( !\ROM|mem~10_combout & ( (!\ROM|mem~0_combout & ((\REGS|regs[20][20]~DUPLICATE_q +// ))) # (\ROM|mem~0_combout & (\REGS|regs[29][20]~q )) ) ) + + .dataa(!\REGS|regs[28][20]~q ), + .datab(!\REGS|regs[29][20]~q ), + .datac(!\ROM|mem~0_combout ), + .datad(!\REGS|regs[20][20]~DUPLICATE_q ), + .datae(gnd), + .dataf(!\ROM|mem~10_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[20]~96_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[20]~96 .extended_lut = "off"; +defparam \rt_alu[20]~96 .lut_mask = 64'h03F303F305F505F5; +defparam \rt_alu[20]~96 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X43_Y4_N38 +dffeas \REGS|regs[22][20] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[20]~348_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~9_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[22][20]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[22][20] .is_wysiwyg = "true"; +defparam \REGS|regs[22][20] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X36_Y9_N4 +dffeas \REGS|regs[30][20] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[20]~348_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~10_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[30][20]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[30][20] .is_wysiwyg = "true"; +defparam \REGS|regs[30][20] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X36_Y9_N9 +cyclonev_lcell_comb \REGS|Mux43~5 ( +// Equation(s): +// \REGS|Mux43~5_combout = ( \REGS|regs[22][20]~q & ( \REGS|regs[30][20]~q ) ) # ( !\REGS|regs[22][20]~q & ( \REGS|regs[30][20]~q & ( (!\PC|pc [6] & (!\PC|pc[8]~DUPLICATE_q & (!\PC|pc [9] & !\PC|pc [7]))) ) ) ) # ( \REGS|regs[22][20]~q & ( +// !\REGS|regs[30][20]~q & ( (((\PC|pc [7]) # (\PC|pc [9])) # (\PC|pc[8]~DUPLICATE_q )) # (\PC|pc [6]) ) ) ) + + .dataa(!\PC|pc [6]), + .datab(!\PC|pc[8]~DUPLICATE_q ), + .datac(!\PC|pc [9]), + .datad(!\PC|pc [7]), + .datae(!\REGS|regs[22][20]~q ), + .dataf(!\REGS|regs[30][20]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux43~5_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux43~5 .extended_lut = "off"; +defparam \REGS|Mux43~5 .lut_mask = 64'h00007FFF8000FFFF; +defparam \REGS|Mux43~5 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X36_Y9_N23 +dffeas \REGS|regs[23][20]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[20]~348_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~18_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[23][20]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[23][20]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[23][20]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: FF_X37_Y15_N14 +dffeas \REGS|regs[31][20] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[20]~348_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~19_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[31][20]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[31][20] .is_wysiwyg = "true"; +defparam \REGS|regs[31][20] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X35_Y9_N30 +cyclonev_lcell_comb \REGS|Mux43~4 ( +// Equation(s): +// \REGS|Mux43~4_combout = ( \REGS|regs[23][20]~DUPLICATE_q & ( \REGS|regs[31][20]~q ) ) # ( !\REGS|regs[23][20]~DUPLICATE_q & ( \REGS|regs[31][20]~q & ( (!\PC|pc [9] & (!\PC|pc [6] & (!\PC|pc[7]~DUPLICATE_q & !\PC|pc[8]~DUPLICATE_q ))) ) ) ) # ( +// \REGS|regs[23][20]~DUPLICATE_q & ( !\REGS|regs[31][20]~q & ( (((\PC|pc[8]~DUPLICATE_q ) # (\PC|pc[7]~DUPLICATE_q )) # (\PC|pc [6])) # (\PC|pc [9]) ) ) ) + + .dataa(!\PC|pc [9]), + .datab(!\PC|pc [6]), + .datac(!\PC|pc[7]~DUPLICATE_q ), + .datad(!\PC|pc[8]~DUPLICATE_q ), + .datae(!\REGS|regs[23][20]~DUPLICATE_q ), + .dataf(!\REGS|regs[31][20]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux43~4_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux43~4 .extended_lut = "off"; +defparam \REGS|Mux43~4 .lut_mask = 64'h00007FFF8000FFFF; +defparam \REGS|Mux43~4 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X38_Y7_N48 +cyclonev_lcell_comb \rt_alu[20]~97 ( +// Equation(s): +// \rt_alu[20]~97_combout = ( \REGS|Mux43~5_combout & ( \REGS|Mux43~4_combout & ( (\ROM|mem~12_combout ) # (\rt_alu[20]~96_combout ) ) ) ) # ( !\REGS|Mux43~5_combout & ( \REGS|Mux43~4_combout & ( (!\ROM|mem~12_combout & (\rt_alu[20]~96_combout )) # +// (\ROM|mem~12_combout & ((\ROM|mem~13_combout ))) ) ) ) # ( \REGS|Mux43~5_combout & ( !\REGS|Mux43~4_combout & ( (!\ROM|mem~12_combout & (\rt_alu[20]~96_combout )) # (\ROM|mem~12_combout & ((!\ROM|mem~13_combout ))) ) ) ) # ( !\REGS|Mux43~5_combout & +// ( !\REGS|Mux43~4_combout & ( (\rt_alu[20]~96_combout & !\ROM|mem~12_combout ) ) ) ) + + .dataa(!\rt_alu[20]~96_combout ), + .datab(!\ROM|mem~12_combout ), + .datac(!\ROM|mem~13_combout ), + .datad(gnd), + .datae(!\REGS|Mux43~5_combout ), + .dataf(!\REGS|Mux43~4_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[20]~97_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[20]~97 .extended_lut = "off"; +defparam \rt_alu[20]~97 .lut_mask = 64'h4444747447477777; +defparam \rt_alu[20]~97 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X38_Y7_N18 +cyclonev_lcell_comb \rt_alu[20]~99 ( +// Equation(s): +// \rt_alu[20]~99_combout = ( \REGS|Mux43~3_combout & ( \rt_alu[20]~97_combout & ( (!\rt_alu[17]~5_combout & (((\rt_alu[17]~4_combout )) # (\rt_alu[20]~98_combout ))) # (\rt_alu[17]~5_combout & (((!\rt_alu[17]~4_combout ) # (\REGS|Mux43~2_combout )))) ) +// ) ) # ( !\REGS|Mux43~3_combout & ( \rt_alu[20]~97_combout & ( (!\rt_alu[17]~5_combout & (((\rt_alu[17]~4_combout )) # (\rt_alu[20]~98_combout ))) # (\rt_alu[17]~5_combout & (((\REGS|Mux43~2_combout & \rt_alu[17]~4_combout )))) ) ) ) # ( +// \REGS|Mux43~3_combout & ( !\rt_alu[20]~97_combout & ( (!\rt_alu[17]~5_combout & (\rt_alu[20]~98_combout & ((!\rt_alu[17]~4_combout )))) # (\rt_alu[17]~5_combout & (((!\rt_alu[17]~4_combout ) # (\REGS|Mux43~2_combout )))) ) ) ) # ( +// !\REGS|Mux43~3_combout & ( !\rt_alu[20]~97_combout & ( (!\rt_alu[17]~5_combout & (\rt_alu[20]~98_combout & ((!\rt_alu[17]~4_combout )))) # (\rt_alu[17]~5_combout & (((\REGS|Mux43~2_combout & \rt_alu[17]~4_combout )))) ) ) ) + + .dataa(!\rt_alu[20]~98_combout ), + .datab(!\REGS|Mux43~2_combout ), + .datac(!\rt_alu[17]~5_combout ), + .datad(!\rt_alu[17]~4_combout ), + .datae(!\REGS|Mux43~3_combout ), + .dataf(!\rt_alu[20]~97_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[20]~99_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[20]~99 .extended_lut = "off"; +defparam \rt_alu[20]~99 .lut_mask = 64'h50035F0350F35FF3; +defparam \rt_alu[20]~99 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X41_Y7_N14 +dffeas \REGS|regs[9][20] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[20]~348_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~29_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[9][20]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[9][20] .is_wysiwyg = "true"; +defparam \REGS|regs[9][20] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X41_Y4_N35 +dffeas \REGS|regs[1][20] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[20]~348_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~28_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[1][20]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[1][20] .is_wysiwyg = "true"; +defparam \REGS|regs[1][20] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X35_Y8_N59 +dffeas \REGS|regs[10][20] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[20]~348_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~33_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[10][20]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[10][20] .is_wysiwyg = "true"; +defparam \REGS|regs[10][20] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X35_Y8_N5 +dffeas \REGS|regs[11][20] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[20]~348_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~37_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[11][20]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[11][20] .is_wysiwyg = "true"; +defparam \REGS|regs[11][20] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X35_Y7_N1 +dffeas \REGS|regs[2][20] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[20]~348_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~32_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[2][20]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[2][20] .is_wysiwyg = "true"; +defparam \REGS|regs[2][20] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X35_Y8_N3 +cyclonev_lcell_comb \rt_alu[20]~91 ( +// Equation(s): +// \rt_alu[20]~91_combout = ( \REGS|regs[2][20]~q & ( (!\ROM|mem~0_combout ) # ((!\ROM|mem~10_combout & ((\REGS|regs[11][20]~q ))) # (\ROM|mem~10_combout & (\REGS|regs[10][20]~q ))) ) ) # ( !\REGS|regs[2][20]~q & ( (\ROM|mem~0_combout & +// ((!\ROM|mem~10_combout & ((\REGS|regs[11][20]~q ))) # (\ROM|mem~10_combout & (\REGS|regs[10][20]~q )))) ) ) + + .dataa(!\ROM|mem~10_combout ), + .datab(!\ROM|mem~0_combout ), + .datac(!\REGS|regs[10][20]~q ), + .datad(!\REGS|regs[11][20]~q ), + .datae(gnd), + .dataf(!\REGS|regs[2][20]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[20]~91_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[20]~91 .extended_lut = "off"; +defparam \rt_alu[20]~91 .lut_mask = 64'h01230123CDEFCDEF; +defparam \rt_alu[20]~91 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X41_Y7_N44 +dffeas \REGS|regs[14][20] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[20]~348_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~35_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[14][20]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[14][20] .is_wysiwyg = "true"; +defparam \REGS|regs[14][20] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X41_Y7_N38 +dffeas \REGS|regs[15][20] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[20]~348_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~39_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[15][20]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[15][20] .is_wysiwyg = "true"; +defparam \REGS|regs[15][20] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X32_Y6_N2 +dffeas \REGS|regs[6][20] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[20]~348_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~34_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[6][20]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[6][20] .is_wysiwyg = "true"; +defparam \REGS|regs[6][20] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X41_Y7_N21 +cyclonev_lcell_comb \rt_alu[20]~92 ( +// Equation(s): +// \rt_alu[20]~92_combout = ( \REGS|regs[6][20]~q & ( (!\ROM|mem~0_combout ) # ((!\ROM|mem~10_combout & ((\REGS|regs[15][20]~q ))) # (\ROM|mem~10_combout & (\REGS|regs[14][20]~q ))) ) ) # ( !\REGS|regs[6][20]~q & ( (\ROM|mem~0_combout & +// ((!\ROM|mem~10_combout & ((\REGS|regs[15][20]~q ))) # (\ROM|mem~10_combout & (\REGS|regs[14][20]~q )))) ) ) + + .dataa(!\ROM|mem~0_combout ), + .datab(!\ROM|mem~10_combout ), + .datac(!\REGS|regs[14][20]~q ), + .datad(!\REGS|regs[15][20]~q ), + .datae(gnd), + .dataf(!\REGS|regs[6][20]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[20]~92_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[20]~92 .extended_lut = "off"; +defparam \rt_alu[20]~92 .lut_mask = 64'h01450145ABEFABEF; +defparam \rt_alu[20]~92 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X37_Y7_N40 +dffeas \REGS|regs[4][20] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[20]~348_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~22_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[4][20]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[4][20] .is_wysiwyg = "true"; +defparam \REGS|regs[4][20] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X37_Y7_N53 +dffeas \REGS|regs[12][20]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[20]~348_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~26_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[12][20]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[12][20]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[12][20]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y7_N42 +cyclonev_lcell_comb \REGS|Mux43~1 ( +// Equation(s): +// \REGS|Mux43~1_combout = ( \REGS|regs[4][20]~q & ( \REGS|regs[12][20]~DUPLICATE_q ) ) # ( !\REGS|regs[4][20]~q & ( \REGS|regs[12][20]~DUPLICATE_q & ( (!\PC|pc[8]~DUPLICATE_q & (!\PC|pc[6]~DUPLICATE_q & (!\PC|pc [9] & !\PC|pc[7]~DUPLICATE_q ))) ) ) ) +// # ( \REGS|regs[4][20]~q & ( !\REGS|regs[12][20]~DUPLICATE_q & ( (((\PC|pc[7]~DUPLICATE_q ) # (\PC|pc [9])) # (\PC|pc[6]~DUPLICATE_q )) # (\PC|pc[8]~DUPLICATE_q ) ) ) ) + + .dataa(!\PC|pc[8]~DUPLICATE_q ), + .datab(!\PC|pc[6]~DUPLICATE_q ), + .datac(!\PC|pc [9]), + .datad(!\PC|pc[7]~DUPLICATE_q ), + .datae(!\REGS|regs[4][20]~q ), + .dataf(!\REGS|regs[12][20]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux43~1_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux43~1 .extended_lut = "off"; +defparam \REGS|Mux43~1 .lut_mask = 64'h00007FFF8000FFFF; +defparam \REGS|Mux43~1 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X37_Y7_N29 +dffeas \REGS|regs[5][20] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[20]~348_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~30_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[5][20]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[5][20] .is_wysiwyg = "true"; +defparam \REGS|regs[5][20] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X36_Y9_N41 +dffeas \REGS|regs[13][20] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[20]~348_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~31_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[13][20]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[13][20] .is_wysiwyg = "true"; +defparam \REGS|regs[13][20] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X36_Y9_N6 +cyclonev_lcell_comb \REGS|Mux43~0 ( +// Equation(s): +// \REGS|Mux43~0_combout = ( \REGS|regs[5][20]~q & ( \REGS|regs[13][20]~q ) ) # ( !\REGS|regs[5][20]~q & ( \REGS|regs[13][20]~q & ( (!\PC|pc [6] & (!\PC|pc[8]~DUPLICATE_q & (!\PC|pc [7] & !\PC|pc [9]))) ) ) ) # ( \REGS|regs[5][20]~q & ( +// !\REGS|regs[13][20]~q & ( (((\PC|pc [9]) # (\PC|pc [7])) # (\PC|pc[8]~DUPLICATE_q )) # (\PC|pc [6]) ) ) ) + + .dataa(!\PC|pc [6]), + .datab(!\PC|pc[8]~DUPLICATE_q ), + .datac(!\PC|pc [7]), + .datad(!\PC|pc [9]), + .datae(!\REGS|regs[5][20]~q ), + .dataf(!\REGS|regs[13][20]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux43~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux43~0 .extended_lut = "off"; +defparam \REGS|Mux43~0 .lut_mask = 64'h00007FFF8000FFFF; +defparam \REGS|Mux43~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X41_Y7_N18 +cyclonev_lcell_comb \rt_alu[20]~93 ( +// Equation(s): +// \rt_alu[20]~93_combout = ( \REGS|Mux43~0_combout & ( ((\ROM|mem~0_combout & !\ROM|mem~10_combout )) # (\REGS|Mux43~1_combout ) ) ) # ( !\REGS|Mux43~0_combout & ( (\REGS|Mux43~1_combout & ((!\ROM|mem~0_combout ) # (\ROM|mem~10_combout ))) ) ) + + .dataa(!\ROM|mem~0_combout ), + .datab(!\ROM|mem~10_combout ), + .datac(gnd), + .datad(!\REGS|Mux43~1_combout ), + .datae(gnd), + .dataf(!\REGS|Mux43~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[20]~93_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[20]~93 .extended_lut = "off"; +defparam \rt_alu[20]~93 .lut_mask = 64'h00BB00BB44FF44FF; +defparam \rt_alu[20]~93 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X41_Y7_N30 +cyclonev_lcell_comb \rt_alu[20]~94 ( +// Equation(s): +// \rt_alu[20]~94_combout = ( \rt_alu[20]~92_combout & ( \rt_alu[20]~93_combout & ( (!\rt_alu[17]~10_combout ) # (\rt_alu[20]~91_combout ) ) ) ) # ( !\rt_alu[20]~92_combout & ( \rt_alu[20]~93_combout & ( (!\rt_alu[17]~10_combout & (!\ROM|mem~12_combout +// )) # (\rt_alu[17]~10_combout & ((\rt_alu[20]~91_combout ))) ) ) ) # ( \rt_alu[20]~92_combout & ( !\rt_alu[20]~93_combout & ( (!\rt_alu[17]~10_combout & (\ROM|mem~12_combout )) # (\rt_alu[17]~10_combout & ((\rt_alu[20]~91_combout ))) ) ) ) # ( +// !\rt_alu[20]~92_combout & ( !\rt_alu[20]~93_combout & ( (\rt_alu[20]~91_combout & \rt_alu[17]~10_combout ) ) ) ) + + .dataa(!\ROM|mem~12_combout ), + .datab(!\rt_alu[20]~91_combout ), + .datac(!\rt_alu[17]~10_combout ), + .datad(gnd), + .datae(!\rt_alu[20]~92_combout ), + .dataf(!\rt_alu[20]~93_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[20]~94_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[20]~94 .extended_lut = "off"; +defparam \rt_alu[20]~94 .lut_mask = 64'h03035353A3A3F3F3; +defparam \rt_alu[20]~94 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X41_Y7_N6 +cyclonev_lcell_comb \rt_alu[20]~95 ( +// Equation(s): +// \rt_alu[20]~95_combout = ( \REGS|regs[1][20]~q & ( \rt_alu[20]~94_combout & ( ((!\ROM|mem~0_combout ) # (\rt_alu[17]~11_combout )) # (\REGS|regs[9][20]~q ) ) ) ) # ( !\REGS|regs[1][20]~q & ( \rt_alu[20]~94_combout & ( ((\REGS|regs[9][20]~q & +// \ROM|mem~0_combout )) # (\rt_alu[17]~11_combout ) ) ) ) # ( \REGS|regs[1][20]~q & ( !\rt_alu[20]~94_combout & ( (!\rt_alu[17]~11_combout & ((!\ROM|mem~0_combout ) # (\REGS|regs[9][20]~q ))) ) ) ) # ( !\REGS|regs[1][20]~q & ( !\rt_alu[20]~94_combout & +// ( (\REGS|regs[9][20]~q & (!\rt_alu[17]~11_combout & \ROM|mem~0_combout )) ) ) ) + + .dataa(gnd), + .datab(!\REGS|regs[9][20]~q ), + .datac(!\rt_alu[17]~11_combout ), + .datad(!\ROM|mem~0_combout ), + .datae(!\REGS|regs[1][20]~q ), + .dataf(!\rt_alu[20]~94_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[20]~95_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[20]~95 .extended_lut = "off"; +defparam \rt_alu[20]~95 .lut_mask = 64'h0030F0300F3FFF3F; +defparam \rt_alu[20]~95 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X38_Y7_N54 +cyclonev_lcell_comb \rt_alu[20]~100 ( +// Equation(s): +// \rt_alu[20]~100_combout = ( \rt_alu[31]~40_combout & ( \rt_alu[20]~95_combout & ( (!\rt_alu[31]~39_combout ) # (\rt_alu[20]~99_combout ) ) ) ) # ( !\rt_alu[31]~40_combout & ( \rt_alu[20]~95_combout & ( (\ROM|mem~0_combout & (\REGS|regs[8][20]~q & +// \rt_alu[31]~39_combout )) ) ) ) # ( \rt_alu[31]~40_combout & ( !\rt_alu[20]~95_combout & ( (\rt_alu[20]~99_combout & \rt_alu[31]~39_combout ) ) ) ) # ( !\rt_alu[31]~40_combout & ( !\rt_alu[20]~95_combout & ( (\ROM|mem~0_combout & +// (\REGS|regs[8][20]~q & \rt_alu[31]~39_combout )) ) ) ) + + .dataa(!\ROM|mem~0_combout ), + .datab(!\REGS|regs[8][20]~q ), + .datac(!\rt_alu[20]~99_combout ), + .datad(!\rt_alu[31]~39_combout ), + .datae(!\rt_alu[31]~40_combout ), + .dataf(!\rt_alu[20]~95_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[20]~100_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[20]~100 .extended_lut = "off"; +defparam \rt_alu[20]~100 .lut_mask = 64'h0011000F0011FF0F; +defparam \rt_alu[20]~100 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y6_N3 +cyclonev_lcell_comb \ALU|Mux11~0 ( +// Equation(s): +// \ALU|Mux11~0_combout = ( \REGS|Mux11~2_combout & ( \rt_alu[20]~100_combout & ( (\ALU|Mux15~0_combout & \CONTROL_UNIT|ALU_FN [1]) ) ) ) # ( !\REGS|Mux11~2_combout & ( \rt_alu[20]~100_combout & ( ((\ALU|Mux15~0_combout & (\CONTROL_UNIT|ALU_FN [1] & +// !\CONTROL_UNIT|ALU_FN [0]))) # (\ALU|Mux29~1_combout ) ) ) ) # ( \REGS|Mux11~2_combout & ( !\rt_alu[20]~100_combout & ( ((\ALU|Mux15~0_combout & (\CONTROL_UNIT|ALU_FN [1] & !\CONTROL_UNIT|ALU_FN [0]))) # (\ALU|Mux29~1_combout ) ) ) ) # ( +// !\REGS|Mux11~2_combout & ( !\rt_alu[20]~100_combout & ( (\ALU|Mux15~0_combout & !\CONTROL_UNIT|ALU_FN [1]) ) ) ) + + .dataa(!\ALU|Mux15~0_combout ), + .datab(!\CONTROL_UNIT|ALU_FN [1]), + .datac(!\ALU|Mux29~1_combout ), + .datad(!\CONTROL_UNIT|ALU_FN [0]), + .datae(!\REGS|Mux11~2_combout ), + .dataf(!\rt_alu[20]~100_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\ALU|Mux11~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \ALU|Mux11~0 .extended_lut = "off"; +defparam \ALU|Mux11~0 .lut_mask = 64'h44441F0F1F0F1111; +defparam \ALU|Mux11~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X40_Y8_N10 +dffeas \REGS|regs[26][19] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[19]~261_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~6_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[26][19]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[26][19] .is_wysiwyg = "true"; +defparam \REGS|regs[26][19] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X42_Y6_N58 +dffeas \REGS|regs[18][19] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[19]~261_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~5_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[18][19]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[18][19] .is_wysiwyg = "true"; +defparam \REGS|regs[18][19] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X40_Y8_N9 +cyclonev_lcell_comb \REGS|Mux44~4 ( +// Equation(s): +// \REGS|Mux44~4_combout = ( \REGS|regs[26][19]~q & ( \REGS|regs[18][19]~q ) ) # ( !\REGS|regs[26][19]~q & ( \REGS|regs[18][19]~q & ( (((\PC|pc [9]) # (\PC|pc [6])) # (\PC|pc[8]~DUPLICATE_q )) # (\PC|pc [7]) ) ) ) # ( \REGS|regs[26][19]~q & ( +// !\REGS|regs[18][19]~q & ( (!\PC|pc [7] & (!\PC|pc[8]~DUPLICATE_q & (!\PC|pc [6] & !\PC|pc [9]))) ) ) ) + + .dataa(!\PC|pc [7]), + .datab(!\PC|pc[8]~DUPLICATE_q ), + .datac(!\PC|pc [6]), + .datad(!\PC|pc [9]), + .datae(!\REGS|regs[26][19]~q ), + .dataf(!\REGS|regs[18][19]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux44~4_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux44~4 .extended_lut = "off"; +defparam \REGS|Mux44~4 .lut_mask = 64'h000080007FFFFFFF; +defparam \REGS|Mux44~4 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X37_Y6_N14 +dffeas \REGS|regs[9][19] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[19]~261_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~29_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[9][19]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[9][19] .is_wysiwyg = "true"; +defparam \REGS|regs[9][19] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y6_N6 +cyclonev_lcell_comb \REGS|Mux12~1 ( +// Equation(s): +// \REGS|Mux12~1_combout = ( \ROM|mem~15_combout & ( (\REGS|regs[9][19]~q & \ROM|mem~0_combout ) ) ) # ( !\ROM|mem~15_combout & ( (\ROM|mem~0_combout & \REGS|regs[8][19]~q ) ) ) + + .dataa(gnd), + .datab(!\REGS|regs[9][19]~q ), + .datac(!\ROM|mem~0_combout ), + .datad(!\REGS|regs[8][19]~q ), + .datae(gnd), + .dataf(!\ROM|mem~15_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux12~1_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux12~1 .extended_lut = "off"; +defparam \REGS|Mux12~1 .lut_mask = 64'h000F000F03030303; +defparam \REGS|Mux12~1 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X38_Y8_N28 +dffeas \REGS|regs[31][19] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[19]~261_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~19_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[31][19]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[31][19] .is_wysiwyg = "true"; +defparam \REGS|regs[31][19] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X41_Y8_N47 +dffeas \REGS|regs[23][19]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[19]~261_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~18_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[23][19]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[23][19]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[23][19]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X41_Y8_N42 +cyclonev_lcell_comb \REGS|Mux44~3 ( +// Equation(s): +// \REGS|Mux44~3_combout = ( \PC|pc [7] & ( \PC|pc[9]~DUPLICATE_q & ( \REGS|regs[23][19]~DUPLICATE_q ) ) ) # ( !\PC|pc [7] & ( \PC|pc[9]~DUPLICATE_q & ( \REGS|regs[23][19]~DUPLICATE_q ) ) ) # ( \PC|pc [7] & ( !\PC|pc[9]~DUPLICATE_q & ( +// \REGS|regs[23][19]~DUPLICATE_q ) ) ) # ( !\PC|pc [7] & ( !\PC|pc[9]~DUPLICATE_q & ( (!\PC|pc [6] & ((!\PC|pc[8]~DUPLICATE_q & (\REGS|regs[31][19]~q )) # (\PC|pc[8]~DUPLICATE_q & ((\REGS|regs[23][19]~DUPLICATE_q ))))) # (\PC|pc [6] & +// (((\REGS|regs[23][19]~DUPLICATE_q )))) ) ) ) + + .dataa(!\REGS|regs[31][19]~q ), + .datab(!\REGS|regs[23][19]~DUPLICATE_q ), + .datac(!\PC|pc [6]), + .datad(!\PC|pc[8]~DUPLICATE_q ), + .datae(!\PC|pc [7]), + .dataf(!\PC|pc[9]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux44~3_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux44~3 .extended_lut = "off"; +defparam \REGS|Mux44~3 .lut_mask = 64'h5333333333333333; +defparam \REGS|Mux44~3 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X41_Y8_N23 +dffeas \REGS|regs[5][19] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[19]~261_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~30_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[5][19]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[5][19] .is_wysiwyg = "true"; +defparam \REGS|regs[5][19] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X41_Y8_N10 +dffeas \REGS|regs[13][19] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[19]~261_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~31_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[13][19]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[13][19] .is_wysiwyg = "true"; +defparam \REGS|regs[13][19] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X40_Y8_N36 +cyclonev_lcell_comb \REGS|Mux44~1 ( +// Equation(s): +// \REGS|Mux44~1_combout = ( \REGS|regs[5][19]~q & ( \REGS|regs[13][19]~q ) ) # ( !\REGS|regs[5][19]~q & ( \REGS|regs[13][19]~q & ( (!\PC|pc[6]~DUPLICATE_q & (!\PC|pc [7] & (!\PC|pc [9] & !\PC|pc[8]~DUPLICATE_q ))) ) ) ) # ( \REGS|regs[5][19]~q & ( +// !\REGS|regs[13][19]~q & ( (((\PC|pc[8]~DUPLICATE_q ) # (\PC|pc [9])) # (\PC|pc [7])) # (\PC|pc[6]~DUPLICATE_q ) ) ) ) + + .dataa(!\PC|pc[6]~DUPLICATE_q ), + .datab(!\PC|pc [7]), + .datac(!\PC|pc [9]), + .datad(!\PC|pc[8]~DUPLICATE_q ), + .datae(!\REGS|regs[5][19]~q ), + .dataf(!\REGS|regs[13][19]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux44~1_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux44~1 .extended_lut = "off"; +defparam \REGS|Mux44~1 .lut_mask = 64'h00007FFF8000FFFF; +defparam \REGS|Mux44~1 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X40_Y8_N34 +dffeas \REGS|regs[12][19] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[19]~261_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~26_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[12][19]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[12][19] .is_wysiwyg = "true"; +defparam \REGS|regs[12][19] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X40_Y8_N53 +dffeas \REGS|regs[4][19] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[19]~261_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~22_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[4][19]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[4][19] .is_wysiwyg = "true"; +defparam \REGS|regs[4][19] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X40_Y8_N33 +cyclonev_lcell_comb \REGS|Mux44~0 ( +// Equation(s): +// \REGS|Mux44~0_combout = ( \REGS|regs[12][19]~q & ( \REGS|regs[4][19]~q ) ) # ( !\REGS|regs[12][19]~q & ( \REGS|regs[4][19]~q & ( (((\PC|pc [9]) # (\PC|pc[8]~DUPLICATE_q )) # (\PC|pc [7])) # (\PC|pc[6]~DUPLICATE_q ) ) ) ) # ( \REGS|regs[12][19]~q & ( +// !\REGS|regs[4][19]~q & ( (!\PC|pc[6]~DUPLICATE_q & (!\PC|pc [7] & (!\PC|pc[8]~DUPLICATE_q & !\PC|pc [9]))) ) ) ) + + .dataa(!\PC|pc[6]~DUPLICATE_q ), + .datab(!\PC|pc [7]), + .datac(!\PC|pc[8]~DUPLICATE_q ), + .datad(!\PC|pc [9]), + .datae(!\REGS|regs[12][19]~q ), + .dataf(!\REGS|regs[4][19]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux44~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux44~0 .extended_lut = "off"; +defparam \REGS|Mux44~0 .lut_mask = 64'h000080007FFFFFFF; +defparam \REGS|Mux44~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X41_Y5_N1 +dffeas \REGS|regs[22][19] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[19]~261_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~9_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[22][19]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[22][19] .is_wysiwyg = "true"; +defparam \REGS|regs[22][19] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X38_Y5_N14 +dffeas \REGS|regs[30][19] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[19]~261_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~10_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[30][19]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[30][19] .is_wysiwyg = "true"; +defparam \REGS|regs[30][19] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X38_Y5_N15 +cyclonev_lcell_comb \REGS|Mux44~2 ( +// Equation(s): +// \REGS|Mux44~2_combout = ( \PC|pc[6]~DUPLICATE_q & ( \PC|pc [7] & ( \REGS|regs[22][19]~q ) ) ) # ( !\PC|pc[6]~DUPLICATE_q & ( \PC|pc [7] & ( \REGS|regs[22][19]~q ) ) ) # ( \PC|pc[6]~DUPLICATE_q & ( !\PC|pc [7] & ( \REGS|regs[22][19]~q ) ) ) # ( +// !\PC|pc[6]~DUPLICATE_q & ( !\PC|pc [7] & ( (!\PC|pc[8]~DUPLICATE_q & ((!\PC|pc [9] & ((\REGS|regs[30][19]~q ))) # (\PC|pc [9] & (\REGS|regs[22][19]~q )))) # (\PC|pc[8]~DUPLICATE_q & (\REGS|regs[22][19]~q )) ) ) ) + + .dataa(!\REGS|regs[22][19]~q ), + .datab(!\REGS|regs[30][19]~q ), + .datac(!\PC|pc[8]~DUPLICATE_q ), + .datad(!\PC|pc [9]), + .datae(!\PC|pc[6]~DUPLICATE_q ), + .dataf(!\PC|pc [7]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux44~2_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux44~2 .extended_lut = "off"; +defparam \REGS|Mux44~2 .lut_mask = 64'h3555555555555555; +defparam \REGS|Mux44~2 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X38_Y6_N30 +cyclonev_lcell_comb \REGS|Mux12~0 ( +// Equation(s): +// \REGS|Mux12~0_combout = ( \REGS|Mux44~2_combout & ( \ROM|mem~16_combout & ( (!\ROM|mem~9_combout & ((\REGS|Mux44~1_combout ))) # (\ROM|mem~9_combout & (\REGS|Mux44~3_combout )) ) ) ) # ( !\REGS|Mux44~2_combout & ( \ROM|mem~16_combout & ( +// (!\ROM|mem~9_combout & ((\REGS|Mux44~1_combout ))) # (\ROM|mem~9_combout & (\REGS|Mux44~3_combout )) ) ) ) # ( \REGS|Mux44~2_combout & ( !\ROM|mem~16_combout & ( (\REGS|Mux44~0_combout ) # (\ROM|mem~9_combout ) ) ) ) # ( !\REGS|Mux44~2_combout & ( +// !\ROM|mem~16_combout & ( (!\ROM|mem~9_combout & \REGS|Mux44~0_combout ) ) ) ) + + .dataa(!\ROM|mem~9_combout ), + .datab(!\REGS|Mux44~3_combout ), + .datac(!\REGS|Mux44~1_combout ), + .datad(!\REGS|Mux44~0_combout ), + .datae(!\REGS|Mux44~2_combout ), + .dataf(!\ROM|mem~16_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux12~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux12~0 .extended_lut = "off"; +defparam \REGS|Mux12~0 .lut_mask = 64'h00AA55FF1B1B1B1B; +defparam \REGS|Mux12~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X38_Y6_N36 +cyclonev_lcell_comb \REGS|Mux12~2 ( +// Equation(s): +// \REGS|Mux12~2_combout = ( \REGS|Mux12~1_combout & ( \REGS|Mux12~0_combout ) ) # ( !\REGS|Mux12~1_combout & ( \REGS|Mux12~0_combout & ( ((\ROM|mem~9_combout & \REGS|Mux44~4_combout )) # (\ROM|mem~17_combout ) ) ) ) # ( \REGS|Mux12~1_combout & ( +// !\REGS|Mux12~0_combout & ( !\ROM|mem~17_combout ) ) ) # ( !\REGS|Mux12~1_combout & ( !\REGS|Mux12~0_combout & ( (\ROM|mem~9_combout & (\REGS|Mux44~4_combout & !\ROM|mem~17_combout )) ) ) ) + + .dataa(!\ROM|mem~9_combout ), + .datab(gnd), + .datac(!\REGS|Mux44~4_combout ), + .datad(!\ROM|mem~17_combout ), + .datae(!\REGS|Mux12~1_combout ), + .dataf(!\REGS|Mux12~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux12~2_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux12~2 .extended_lut = "off"; +defparam \REGS|Mux12~2 .lut_mask = 64'h0500FF0005FFFFFF; +defparam \REGS|Mux12~2 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X36_Y12_N26 +dffeas \REGS|regs[9][18] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[18]~174_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~29_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[9][18]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[9][18] .is_wysiwyg = "true"; +defparam \REGS|regs[9][18] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X36_Y12_N0 +cyclonev_lcell_comb \REGS|Mux13~1 ( +// Equation(s): +// \REGS|Mux13~1_combout = ( \REGS|regs[8][18]~DUPLICATE_q & ( (\ROM|mem~0_combout & ((!\ROM|mem~15_combout ) # (\REGS|regs[9][18]~q ))) ) ) # ( !\REGS|regs[8][18]~DUPLICATE_q & ( (\ROM|mem~15_combout & (\REGS|regs[9][18]~q & \ROM|mem~0_combout )) ) ) + + .dataa(gnd), + .datab(!\ROM|mem~15_combout ), + .datac(!\REGS|regs[9][18]~q ), + .datad(!\ROM|mem~0_combout ), + .datae(gnd), + .dataf(!\REGS|regs[8][18]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux13~1_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux13~1 .extended_lut = "off"; +defparam \REGS|Mux13~1 .lut_mask = 64'h0003000300CF00CF; +defparam \REGS|Mux13~1 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X40_Y8_N56 +dffeas \REGS|regs[26][18] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[18]~174_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~6_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[26][18]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[26][18] .is_wysiwyg = "true"; +defparam \REGS|regs[26][18] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X42_Y6_N28 +dffeas \REGS|regs[18][18] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[18]~174_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~5_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[18][18]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[18][18] .is_wysiwyg = "true"; +defparam \REGS|regs[18][18] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X40_Y8_N54 +cyclonev_lcell_comb \REGS|Mux45~2 ( +// Equation(s): +// \REGS|Mux45~2_combout = ( \REGS|regs[26][18]~q & ( \REGS|regs[18][18]~q ) ) # ( !\REGS|regs[26][18]~q & ( \REGS|regs[18][18]~q & ( (((\PC|pc [6]) # (\PC|pc [9])) # (\PC|pc[8]~DUPLICATE_q )) # (\PC|pc [7]) ) ) ) # ( \REGS|regs[26][18]~q & ( +// !\REGS|regs[18][18]~q & ( (!\PC|pc [7] & (!\PC|pc[8]~DUPLICATE_q & (!\PC|pc [9] & !\PC|pc [6]))) ) ) ) + + .dataa(!\PC|pc [7]), + .datab(!\PC|pc[8]~DUPLICATE_q ), + .datac(!\PC|pc [9]), + .datad(!\PC|pc [6]), + .datae(!\REGS|regs[26][18]~q ), + .dataf(!\REGS|regs[18][18]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux45~2_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux45~2 .extended_lut = "off"; +defparam \REGS|Mux45~2 .lut_mask = 64'h000080007FFFFFFF; +defparam \REGS|Mux45~2 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X36_Y10_N29 +dffeas \REGS|regs[23][18] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[18]~174_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~18_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[23][18]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[23][18] .is_wysiwyg = "true"; +defparam \REGS|regs[23][18] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X36_Y10_N14 +dffeas \REGS|regs[31][18] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[18]~174_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~19_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[31][18]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[31][18] .is_wysiwyg = "true"; +defparam \REGS|regs[31][18] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X36_Y10_N48 +cyclonev_lcell_comb \REGS|Mux45~4 ( +// Equation(s): +// \REGS|Mux45~4_combout = ( \REGS|regs[23][18]~q & ( \REGS|regs[31][18]~q ) ) # ( !\REGS|regs[23][18]~q & ( \REGS|regs[31][18]~q & ( (!\PC|pc[8]~DUPLICATE_q & (!\PC|pc [9] & (!\PC|pc [6] & !\PC|pc[7]~DUPLICATE_q ))) ) ) ) # ( \REGS|regs[23][18]~q & ( +// !\REGS|regs[31][18]~q & ( (((\PC|pc[7]~DUPLICATE_q ) # (\PC|pc [6])) # (\PC|pc [9])) # (\PC|pc[8]~DUPLICATE_q ) ) ) ) + + .dataa(!\PC|pc[8]~DUPLICATE_q ), + .datab(!\PC|pc [9]), + .datac(!\PC|pc [6]), + .datad(!\PC|pc[7]~DUPLICATE_q ), + .datae(!\REGS|regs[23][18]~q ), + .dataf(!\REGS|regs[31][18]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux45~4_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux45~4 .extended_lut = "off"; +defparam \REGS|Mux45~4 .lut_mask = 64'h00007FFF8000FFFF; +defparam \REGS|Mux45~4 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X38_Y4_N26 +dffeas \REGS|regs[22][18] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[18]~174_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~9_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[22][18]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[22][18] .is_wysiwyg = "true"; +defparam \REGS|regs[22][18] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X37_Y4_N59 +dffeas \REGS|regs[30][18] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[18]~174_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~10_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[30][18]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[30][18] .is_wysiwyg = "true"; +defparam \REGS|regs[30][18] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y4_N54 +cyclonev_lcell_comb \REGS|Mux45~5 ( +// Equation(s): +// \REGS|Mux45~5_combout = ( \REGS|regs[30][18]~q & ( \PC|pc [7] & ( \REGS|regs[22][18]~q ) ) ) # ( !\REGS|regs[30][18]~q & ( \PC|pc [7] & ( \REGS|regs[22][18]~q ) ) ) # ( \REGS|regs[30][18]~q & ( !\PC|pc [7] & ( ((!\PC|pc[6]~DUPLICATE_q & +// (!\PC|pc[8]~DUPLICATE_q & !\PC|pc [9]))) # (\REGS|regs[22][18]~q ) ) ) ) # ( !\REGS|regs[30][18]~q & ( !\PC|pc [7] & ( (\REGS|regs[22][18]~q & (((\PC|pc [9]) # (\PC|pc[8]~DUPLICATE_q )) # (\PC|pc[6]~DUPLICATE_q ))) ) ) ) + + .dataa(!\PC|pc[6]~DUPLICATE_q ), + .datab(!\PC|pc[8]~DUPLICATE_q ), + .datac(!\PC|pc [9]), + .datad(!\REGS|regs[22][18]~q ), + .datae(!\REGS|regs[30][18]~q ), + .dataf(!\PC|pc [7]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux45~5_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux45~5 .extended_lut = "off"; +defparam \REGS|Mux45~5 .lut_mask = 64'h007F80FF00FF00FF; +defparam \REGS|Mux45~5 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X41_Y8_N20 +dffeas \REGS|regs[5][18] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[18]~174_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~30_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[5][18]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[5][18] .is_wysiwyg = "true"; +defparam \REGS|regs[5][18] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X41_Y8_N17 +dffeas \REGS|regs[13][18] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[18]~174_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~31_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[13][18]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[13][18] .is_wysiwyg = "true"; +defparam \REGS|regs[13][18] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X41_Y8_N12 +cyclonev_lcell_comb \REGS|Mux45~0 ( +// Equation(s): +// \REGS|Mux45~0_combout = ( \PC|pc [6] & ( \PC|pc[8]~DUPLICATE_q & ( \REGS|regs[5][18]~q ) ) ) # ( !\PC|pc [6] & ( \PC|pc[8]~DUPLICATE_q & ( \REGS|regs[5][18]~q ) ) ) # ( \PC|pc [6] & ( !\PC|pc[8]~DUPLICATE_q & ( \REGS|regs[5][18]~q ) ) ) # ( !\PC|pc +// [6] & ( !\PC|pc[8]~DUPLICATE_q & ( (!\PC|pc[9]~DUPLICATE_q & ((!\PC|pc [7] & ((\REGS|regs[13][18]~q ))) # (\PC|pc [7] & (\REGS|regs[5][18]~q )))) # (\PC|pc[9]~DUPLICATE_q & (\REGS|regs[5][18]~q )) ) ) ) + + .dataa(!\REGS|regs[5][18]~q ), + .datab(!\REGS|regs[13][18]~q ), + .datac(!\PC|pc[9]~DUPLICATE_q ), + .datad(!\PC|pc [7]), + .datae(!\PC|pc [6]), + .dataf(!\PC|pc[8]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux45~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux45~0 .extended_lut = "off"; +defparam \REGS|Mux45~0 .lut_mask = 64'h3555555555555555; +defparam \REGS|Mux45~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X37_Y4_N2 +dffeas \REGS|regs[12][18] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[18]~174_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~26_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[12][18]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[12][18] .is_wysiwyg = "true"; +defparam \REGS|regs[12][18] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X40_Y8_N29 +dffeas \REGS|regs[4][18] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[18]~174_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~22_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[4][18]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[4][18] .is_wysiwyg = "true"; +defparam \REGS|regs[4][18] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y4_N9 +cyclonev_lcell_comb \REGS|Mux45~1 ( +// Equation(s): +// \REGS|Mux45~1_combout = ( \PC|pc [9] & ( \PC|pc [7] & ( \REGS|regs[4][18]~q ) ) ) # ( !\PC|pc [9] & ( \PC|pc [7] & ( \REGS|regs[4][18]~q ) ) ) # ( \PC|pc [9] & ( !\PC|pc [7] & ( \REGS|regs[4][18]~q ) ) ) # ( !\PC|pc [9] & ( !\PC|pc [7] & ( +// (!\PC|pc[8]~DUPLICATE_q & ((!\PC|pc[6]~DUPLICATE_q & (\REGS|regs[12][18]~q )) # (\PC|pc[6]~DUPLICATE_q & ((\REGS|regs[4][18]~q ))))) # (\PC|pc[8]~DUPLICATE_q & (((\REGS|regs[4][18]~q )))) ) ) ) + + .dataa(!\REGS|regs[12][18]~q ), + .datab(!\REGS|regs[4][18]~q ), + .datac(!\PC|pc[8]~DUPLICATE_q ), + .datad(!\PC|pc[6]~DUPLICATE_q ), + .datae(!\PC|pc [9]), + .dataf(!\PC|pc [7]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux45~1_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux45~1 .extended_lut = "off"; +defparam \REGS|Mux45~1 .lut_mask = 64'h5333333333333333; +defparam \REGS|Mux45~1 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X36_Y10_N6 +cyclonev_lcell_comb \REGS|Mux13~0 ( +// Equation(s): +// \REGS|Mux13~0_combout = ( \REGS|Mux45~1_combout & ( \ROM|mem~16_combout & ( (!\ROM|mem~9_combout & ((\REGS|Mux45~0_combout ))) # (\ROM|mem~9_combout & (\REGS|Mux45~4_combout )) ) ) ) # ( !\REGS|Mux45~1_combout & ( \ROM|mem~16_combout & ( +// (!\ROM|mem~9_combout & ((\REGS|Mux45~0_combout ))) # (\ROM|mem~9_combout & (\REGS|Mux45~4_combout )) ) ) ) # ( \REGS|Mux45~1_combout & ( !\ROM|mem~16_combout & ( (!\ROM|mem~9_combout ) # (\REGS|Mux45~5_combout ) ) ) ) # ( !\REGS|Mux45~1_combout & ( +// !\ROM|mem~16_combout & ( (\REGS|Mux45~5_combout & \ROM|mem~9_combout ) ) ) ) + + .dataa(!\REGS|Mux45~4_combout ), + .datab(!\REGS|Mux45~5_combout ), + .datac(!\REGS|Mux45~0_combout ), + .datad(!\ROM|mem~9_combout ), + .datae(!\REGS|Mux45~1_combout ), + .dataf(!\ROM|mem~16_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux13~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux13~0 .extended_lut = "off"; +defparam \REGS|Mux13~0 .lut_mask = 64'h0033FF330F550F55; +defparam \REGS|Mux13~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X36_Y10_N42 +cyclonev_lcell_comb \REGS|Mux13~2 ( +// Equation(s): +// \REGS|Mux13~2_combout = ( \REGS|Mux45~2_combout & ( \REGS|Mux13~0_combout & ( ((\ROM|mem~17_combout ) # (\ROM|mem~9_combout )) # (\REGS|Mux13~1_combout ) ) ) ) # ( !\REGS|Mux45~2_combout & ( \REGS|Mux13~0_combout & ( (\ROM|mem~17_combout ) # +// (\REGS|Mux13~1_combout ) ) ) ) # ( \REGS|Mux45~2_combout & ( !\REGS|Mux13~0_combout & ( (!\ROM|mem~17_combout & ((\ROM|mem~9_combout ) # (\REGS|Mux13~1_combout ))) ) ) ) # ( !\REGS|Mux45~2_combout & ( !\REGS|Mux13~0_combout & ( (\REGS|Mux13~1_combout +// & !\ROM|mem~17_combout ) ) ) ) + + .dataa(gnd), + .datab(!\REGS|Mux13~1_combout ), + .datac(!\ROM|mem~9_combout ), + .datad(!\ROM|mem~17_combout ), + .datae(!\REGS|Mux45~2_combout ), + .dataf(!\REGS|Mux13~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux13~2_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux13~2 .extended_lut = "off"; +defparam \REGS|Mux13~2 .lut_mask = 64'h33003F0033FF3FFF; +defparam \REGS|Mux13~2 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y10_N36 +cyclonev_lcell_comb \ALU|Mux13~0 ( +// Equation(s): +// \ALU|Mux13~0_combout = ( \REGS|Mux13~2_combout & ( \ALU|Mux15~0_combout & ( (!\rt_alu[18]~79_combout & (((!\CONTROL_UNIT|ALU_FN [0] & \CONTROL_UNIT|ALU_FN [1])) # (\ALU|Mux29~1_combout ))) # (\rt_alu[18]~79_combout & (((\CONTROL_UNIT|ALU_FN [1])))) ) +// ) ) # ( !\REGS|Mux13~2_combout & ( \ALU|Mux15~0_combout & ( (!\rt_alu[18]~79_combout & (((!\CONTROL_UNIT|ALU_FN [1])))) # (\rt_alu[18]~79_combout & (((!\CONTROL_UNIT|ALU_FN [0] & \CONTROL_UNIT|ALU_FN [1])) # (\ALU|Mux29~1_combout ))) ) ) ) # ( +// \REGS|Mux13~2_combout & ( !\ALU|Mux15~0_combout & ( (!\rt_alu[18]~79_combout & \ALU|Mux29~1_combout ) ) ) ) # ( !\REGS|Mux13~2_combout & ( !\ALU|Mux15~0_combout & ( (\rt_alu[18]~79_combout & \ALU|Mux29~1_combout ) ) ) ) + + .dataa(!\rt_alu[18]~79_combout ), + .datab(!\ALU|Mux29~1_combout ), + .datac(!\CONTROL_UNIT|ALU_FN [0]), + .datad(!\CONTROL_UNIT|ALU_FN [1]), + .datae(!\REGS|Mux13~2_combout ), + .dataf(!\ALU|Mux15~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\ALU|Mux13~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \ALU|Mux13~0 .extended_lut = "off"; +defparam \ALU|Mux13~0 .lut_mask = 64'h11112222BB5122F7; +defparam \ALU|Mux13~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X38_Y9_N42 +cyclonev_lcell_comb \rt_alu[3]~0 ( +// Equation(s): +// \rt_alu[3]~0_combout = ( \ROM|mem~6_combout & ( \ROM|mem~1_combout & ( (!\PC|pc[8]~DUPLICATE_q & (!\PC|pc [9] & \ROM|mem~0_combout )) ) ) ) # ( \ROM|mem~6_combout & ( !\ROM|mem~1_combout & ( (!\PC|pc[8]~DUPLICATE_q & (!\PC|pc [9] & +// (\ROM|mem~0_combout & \ROM|mem~2_combout ))) ) ) ) + + .dataa(!\PC|pc[8]~DUPLICATE_q ), + .datab(!\PC|pc [9]), + .datac(!\ROM|mem~0_combout ), + .datad(!\ROM|mem~2_combout ), + .datae(!\ROM|mem~6_combout ), + .dataf(!\ROM|mem~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[3]~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[3]~0 .extended_lut = "off"; +defparam \rt_alu[3]~0 .lut_mask = 64'h0000000800000808; +defparam \rt_alu[3]~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X36_Y4_N51 +cyclonev_lcell_comb \REGS|regs[26][17]~feeder ( +// Equation(s): +// \REGS|regs[26][17]~feeder_combout = ( \rd[17]~87_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[17]~87_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[26][17]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[26][17]~feeder .extended_lut = "off"; +defparam \REGS|regs[26][17]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[26][17]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X36_Y4_N52 +dffeas \REGS|regs[26][17] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[26][17]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~6_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[26][17]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[26][17] .is_wysiwyg = "true"; +defparam \REGS|regs[26][17] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X40_Y3_N39 +cyclonev_lcell_comb \REGS|regs[18][17]~feeder ( +// Equation(s): +// \REGS|regs[18][17]~feeder_combout = ( \rd[17]~87_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[17]~87_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[18][17]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[18][17]~feeder .extended_lut = "off"; +defparam \REGS|regs[18][17]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[18][17]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X40_Y3_N40 +dffeas \REGS|regs[18][17] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[18][17]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~5_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[18][17]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[18][17] .is_wysiwyg = "true"; +defparam \REGS|regs[18][17] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X36_Y4_N12 +cyclonev_lcell_comb \REGS|Mux46~4 ( +// Equation(s): +// \REGS|Mux46~4_combout = ( \REGS|regs[18][17]~q & ( \PC|pc [7] ) ) # ( \REGS|regs[18][17]~q & ( !\PC|pc [7] & ( (((\PC|pc[8]~DUPLICATE_q ) # (\PC|pc[6]~DUPLICATE_q )) # (\REGS|regs[26][17]~q )) # (\PC|pc [9]) ) ) ) # ( !\REGS|regs[18][17]~q & ( !\PC|pc +// [7] & ( (!\PC|pc [9] & (\REGS|regs[26][17]~q & (!\PC|pc[6]~DUPLICATE_q & !\PC|pc[8]~DUPLICATE_q ))) ) ) ) + + .dataa(!\PC|pc [9]), + .datab(!\REGS|regs[26][17]~q ), + .datac(!\PC|pc[6]~DUPLICATE_q ), + .datad(!\PC|pc[8]~DUPLICATE_q ), + .datae(!\REGS|regs[18][17]~q ), + .dataf(!\PC|pc [7]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux46~4_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux46~4 .extended_lut = "off"; +defparam \REGS|Mux46~4 .lut_mask = 64'h20007FFF0000FFFF; +defparam \REGS|Mux46~4 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X38_Y8_N32 +dffeas \REGS|regs[31][17]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[17]~87_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~19_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[31][17]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[31][17]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[31][17]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: FF_X36_Y10_N35 +dffeas \REGS|regs[23][17] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[17]~87_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~18_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[23][17]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[23][17] .is_wysiwyg = "true"; +defparam \REGS|regs[23][17] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X38_Y8_N33 +cyclonev_lcell_comb \REGS|Mux46~3 ( +// Equation(s): +// \REGS|Mux46~3_combout = ( \PC|pc [9] & ( \REGS|regs[23][17]~q ) ) # ( !\PC|pc [9] & ( \REGS|regs[23][17]~q & ( (((\PC|pc [7]) # (\PC|pc[8]~DUPLICATE_q )) # (\REGS|regs[31][17]~DUPLICATE_q )) # (\PC|pc [6]) ) ) ) # ( !\PC|pc [9] & ( +// !\REGS|regs[23][17]~q & ( (!\PC|pc [6] & (\REGS|regs[31][17]~DUPLICATE_q & (!\PC|pc[8]~DUPLICATE_q & !\PC|pc [7]))) ) ) ) + + .dataa(!\PC|pc [6]), + .datab(!\REGS|regs[31][17]~DUPLICATE_q ), + .datac(!\PC|pc[8]~DUPLICATE_q ), + .datad(!\PC|pc [7]), + .datae(!\PC|pc [9]), + .dataf(!\REGS|regs[23][17]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux46~3_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux46~3 .extended_lut = "off"; +defparam \REGS|Mux46~3 .lut_mask = 64'h200000007FFFFFFF; +defparam \REGS|Mux46~3 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X38_Y8_N38 +dffeas \REGS|regs[30][17] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[17]~87_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~10_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[30][17]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[30][17] .is_wysiwyg = "true"; +defparam \REGS|regs[30][17] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X38_Y4_N37 +dffeas \REGS|regs[22][17] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[17]~87_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~9_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[22][17]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[22][17] .is_wysiwyg = "true"; +defparam \REGS|regs[22][17] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X38_Y8_N39 +cyclonev_lcell_comb \REGS|Mux46~2 ( +// Equation(s): +// \REGS|Mux46~2_combout = ( \REGS|regs[30][17]~q & ( \REGS|regs[22][17]~q ) ) # ( !\REGS|regs[30][17]~q & ( \REGS|regs[22][17]~q & ( (((\PC|pc [6]) # (\PC|pc [7])) # (\PC|pc[8]~DUPLICATE_q )) # (\PC|pc [9]) ) ) ) # ( \REGS|regs[30][17]~q & ( +// !\REGS|regs[22][17]~q & ( (!\PC|pc [9] & (!\PC|pc[8]~DUPLICATE_q & (!\PC|pc [7] & !\PC|pc [6]))) ) ) ) + + .dataa(!\PC|pc [9]), + .datab(!\PC|pc[8]~DUPLICATE_q ), + .datac(!\PC|pc [7]), + .datad(!\PC|pc [6]), + .datae(!\REGS|regs[30][17]~q ), + .dataf(!\REGS|regs[22][17]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux46~2_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux46~2 .extended_lut = "off"; +defparam \REGS|Mux46~2 .lut_mask = 64'h000080007FFFFFFF; +defparam \REGS|Mux46~2 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X35_Y6_N58 +dffeas \REGS|regs[4][17] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[17]~87_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~22_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[4][17]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[4][17] .is_wysiwyg = "true"; +defparam \REGS|regs[4][17] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X37_Y4_N17 +dffeas \REGS|regs[12][17] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[17]~87_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~26_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[12][17]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[12][17] .is_wysiwyg = "true"; +defparam \REGS|regs[12][17] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y4_N24 +cyclonev_lcell_comb \REGS|Mux46~0 ( +// Equation(s): +// \REGS|Mux46~0_combout = ( \PC|pc[6]~DUPLICATE_q & ( \PC|pc [9] & ( \REGS|regs[4][17]~q ) ) ) # ( !\PC|pc[6]~DUPLICATE_q & ( \PC|pc [9] & ( \REGS|regs[4][17]~q ) ) ) # ( \PC|pc[6]~DUPLICATE_q & ( !\PC|pc [9] & ( \REGS|regs[4][17]~q ) ) ) # ( +// !\PC|pc[6]~DUPLICATE_q & ( !\PC|pc [9] & ( (!\PC|pc [7] & ((!\PC|pc[8]~DUPLICATE_q & ((\REGS|regs[12][17]~q ))) # (\PC|pc[8]~DUPLICATE_q & (\REGS|regs[4][17]~q )))) # (\PC|pc [7] & (\REGS|regs[4][17]~q )) ) ) ) + + .dataa(!\REGS|regs[4][17]~q ), + .datab(!\REGS|regs[12][17]~q ), + .datac(!\PC|pc [7]), + .datad(!\PC|pc[8]~DUPLICATE_q ), + .datae(!\PC|pc[6]~DUPLICATE_q ), + .dataf(!\PC|pc [9]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux46~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux46~0 .extended_lut = "off"; +defparam \REGS|Mux46~0 .lut_mask = 64'h3555555555555555; +defparam \REGS|Mux46~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X38_Y8_N8 +dffeas \REGS|regs[13][17] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[17]~87_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~31_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[13][17]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[13][17] .is_wysiwyg = "true"; +defparam \REGS|regs[13][17] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X41_Y14_N9 +cyclonev_lcell_comb \REGS|regs[5][17]~feeder ( +// Equation(s): +// \REGS|regs[5][17]~feeder_combout = ( \rd[17]~87_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[17]~87_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[5][17]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[5][17]~feeder .extended_lut = "off"; +defparam \REGS|regs[5][17]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[5][17]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X41_Y14_N11 +dffeas \REGS|regs[5][17] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[5][17]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~30_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[5][17]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[5][17] .is_wysiwyg = "true"; +defparam \REGS|regs[5][17] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X38_Y8_N9 +cyclonev_lcell_comb \REGS|Mux46~1 ( +// Equation(s): +// \REGS|Mux46~1_combout = ( \PC|pc [9] & ( \REGS|regs[5][17]~q ) ) # ( !\PC|pc [9] & ( \REGS|regs[5][17]~q & ( (((\PC|pc [7]) # (\PC|pc[8]~DUPLICATE_q )) # (\REGS|regs[13][17]~q )) # (\PC|pc [6]) ) ) ) # ( !\PC|pc [9] & ( !\REGS|regs[5][17]~q & ( +// (!\PC|pc [6] & (\REGS|regs[13][17]~q & (!\PC|pc[8]~DUPLICATE_q & !\PC|pc [7]))) ) ) ) + + .dataa(!\PC|pc [6]), + .datab(!\REGS|regs[13][17]~q ), + .datac(!\PC|pc[8]~DUPLICATE_q ), + .datad(!\PC|pc [7]), + .datae(!\PC|pc [9]), + .dataf(!\REGS|regs[5][17]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux46~1_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux46~1 .extended_lut = "off"; +defparam \REGS|Mux46~1 .lut_mask = 64'h200000007FFFFFFF; +defparam \REGS|Mux46~1 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X38_Y8_N18 +cyclonev_lcell_comb \REGS|Mux14~0 ( +// Equation(s): +// \REGS|Mux14~0_combout = ( \ROM|mem~16_combout & ( \REGS|Mux46~1_combout & ( (!\ROM|mem~9_combout ) # (\REGS|Mux46~3_combout ) ) ) ) # ( !\ROM|mem~16_combout & ( \REGS|Mux46~1_combout & ( (!\ROM|mem~9_combout & ((\REGS|Mux46~0_combout ))) # +// (\ROM|mem~9_combout & (\REGS|Mux46~2_combout )) ) ) ) # ( \ROM|mem~16_combout & ( !\REGS|Mux46~1_combout & ( (\REGS|Mux46~3_combout & \ROM|mem~9_combout ) ) ) ) # ( !\ROM|mem~16_combout & ( !\REGS|Mux46~1_combout & ( (!\ROM|mem~9_combout & +// ((\REGS|Mux46~0_combout ))) # (\ROM|mem~9_combout & (\REGS|Mux46~2_combout )) ) ) ) + + .dataa(!\REGS|Mux46~3_combout ), + .datab(!\REGS|Mux46~2_combout ), + .datac(!\REGS|Mux46~0_combout ), + .datad(!\ROM|mem~9_combout ), + .datae(!\ROM|mem~16_combout ), + .dataf(!\REGS|Mux46~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux14~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux14~0 .extended_lut = "off"; +defparam \REGS|Mux14~0 .lut_mask = 64'h0F3300550F33FF55; +defparam \REGS|Mux14~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X37_Y4_N47 +dffeas \REGS|regs[9][17] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[17]~87_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~29_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[9][17]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[9][17] .is_wysiwyg = "true"; +defparam \REGS|regs[9][17] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y3_N33 +cyclonev_lcell_comb \REGS|regs[8][17]~feeder ( +// Equation(s): +// \REGS|regs[8][17]~feeder_combout = ( \rd[17]~87_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[17]~87_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[8][17]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[8][17]~feeder .extended_lut = "off"; +defparam \REGS|regs[8][17]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[8][17]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X37_Y3_N35 +dffeas \REGS|regs[8][17] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[8][17]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~24_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[8][17]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[8][17] .is_wysiwyg = "true"; +defparam \REGS|regs[8][17] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X36_Y4_N54 +cyclonev_lcell_comb \REGS|Mux14~1 ( +// Equation(s): +// \REGS|Mux14~1_combout = ( \ROM|mem~0_combout & ( \ROM|mem~15_combout & ( \REGS|regs[9][17]~q ) ) ) # ( \ROM|mem~0_combout & ( !\ROM|mem~15_combout & ( \REGS|regs[8][17]~q ) ) ) + + .dataa(gnd), + .datab(gnd), + .datac(!\REGS|regs[9][17]~q ), + .datad(!\REGS|regs[8][17]~q ), + .datae(!\ROM|mem~0_combout ), + .dataf(!\ROM|mem~15_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux14~1_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux14~1 .extended_lut = "off"; +defparam \REGS|Mux14~1 .lut_mask = 64'h000000FF00000F0F; +defparam \REGS|Mux14~1 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y10_N51 +cyclonev_lcell_comb \REGS|Mux14~2 ( +// Equation(s): +// \REGS|Mux14~2_combout = ( \REGS|Mux14~1_combout & ( (!\ROM|mem~17_combout ) # (\REGS|Mux14~0_combout ) ) ) # ( !\REGS|Mux14~1_combout & ( (!\ROM|mem~17_combout & (\REGS|Mux46~4_combout & (\ROM|mem~9_combout ))) # (\ROM|mem~17_combout & +// (((\REGS|Mux14~0_combout )))) ) ) + + .dataa(!\REGS|Mux46~4_combout ), + .datab(!\ROM|mem~9_combout ), + .datac(!\REGS|Mux14~0_combout ), + .datad(!\ROM|mem~17_combout ), + .datae(gnd), + .dataf(!\REGS|Mux14~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux14~2_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux14~2 .extended_lut = "off"; +defparam \REGS|Mux14~2 .lut_mask = 64'h110F110FFF0FFF0F; +defparam \REGS|Mux14~2 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y3_N27 +cyclonev_lcell_comb \REGS|Mux46~7 ( +// Equation(s): +// \REGS|Mux46~7_combout = ( !\PC|pc[8]~DUPLICATE_q & ( !\PC|pc [7] & ( (\REGS|regs[8][17]~q & (!\PC|pc[6]~DUPLICATE_q & !\PC|pc [9])) ) ) ) + + .dataa(!\REGS|regs[8][17]~q ), + .datab(!\PC|pc[6]~DUPLICATE_q ), + .datac(!\PC|pc [9]), + .datad(gnd), + .datae(!\PC|pc[8]~DUPLICATE_q ), + .dataf(!\PC|pc [7]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux46~7_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux46~7 .extended_lut = "off"; +defparam \REGS|Mux46~7 .lut_mask = 64'h4040000000000000; +defparam \REGS|Mux46~7 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X38_Y12_N50 +dffeas \REGS|regs[11][17] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[17]~87_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~37_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[11][17]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[11][17] .is_wysiwyg = "true"; +defparam \REGS|regs[11][17] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X38_Y12_N59 +dffeas \REGS|regs[2][17] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[17]~87_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~32_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[2][17]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[2][17] .is_wysiwyg = "true"; +defparam \REGS|regs[2][17] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X38_Y4_N31 +dffeas \REGS|regs[10][17] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[17]~87_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~33_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[10][17]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[10][17] .is_wysiwyg = "true"; +defparam \REGS|regs[10][17] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X38_Y12_N0 +cyclonev_lcell_comb \rt_alu[17]~65 ( +// Equation(s): +// \rt_alu[17]~65_combout = ( \REGS|regs[10][17]~q & ( (!\ROM|mem~0_combout & (((\REGS|regs[2][17]~q )))) # (\ROM|mem~0_combout & (((\REGS|regs[11][17]~q )) # (\ROM|mem~10_combout ))) ) ) # ( !\REGS|regs[10][17]~q & ( (!\ROM|mem~0_combout & +// (((\REGS|regs[2][17]~q )))) # (\ROM|mem~0_combout & (!\ROM|mem~10_combout & (\REGS|regs[11][17]~q ))) ) ) + + .dataa(!\ROM|mem~10_combout ), + .datab(!\ROM|mem~0_combout ), + .datac(!\REGS|regs[11][17]~q ), + .datad(!\REGS|regs[2][17]~q ), + .datae(gnd), + .dataf(!\REGS|regs[10][17]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[17]~65_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[17]~65 .extended_lut = "off"; +defparam \rt_alu[17]~65 .lut_mask = 64'h02CE02CE13DF13DF; +defparam \rt_alu[17]~65 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y4_N30 +cyclonev_lcell_comb \REGS|regs[1][17]~feeder ( +// Equation(s): +// \REGS|regs[1][17]~feeder_combout = ( \rd[17]~87_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[17]~87_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[1][17]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[1][17]~feeder .extended_lut = "off"; +defparam \REGS|regs[1][17]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[1][17]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X32_Y4_N31 +dffeas \REGS|regs[1][17] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[1][17]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~28_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[1][17]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[1][17] .is_wysiwyg = "true"; +defparam \REGS|regs[1][17] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y4_N42 +cyclonev_lcell_comb \REGS|Mux46~6 ( +// Equation(s): +// \REGS|Mux46~6_combout = ( \PC|pc [7] & ( \REGS|regs[1][17]~q ) ) # ( !\PC|pc [7] & ( \REGS|regs[1][17]~q & ( (((\PC|pc[8]~DUPLICATE_q ) # (\PC|pc [9])) # (\REGS|regs[9][17]~q )) # (\PC|pc[6]~DUPLICATE_q ) ) ) ) # ( !\PC|pc [7] & ( !\REGS|regs[1][17]~q +// & ( (!\PC|pc[6]~DUPLICATE_q & (\REGS|regs[9][17]~q & (!\PC|pc [9] & !\PC|pc[8]~DUPLICATE_q ))) ) ) ) + + .dataa(!\PC|pc[6]~DUPLICATE_q ), + .datab(!\REGS|regs[9][17]~q ), + .datac(!\PC|pc [9]), + .datad(!\PC|pc[8]~DUPLICATE_q ), + .datae(!\PC|pc [7]), + .dataf(!\REGS|regs[1][17]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux46~6_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux46~6 .extended_lut = "off"; +defparam \REGS|Mux46~6 .lut_mask = 64'h200000007FFFFFFF; +defparam \REGS|Mux46~6 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X38_Y13_N21 +cyclonev_lcell_comb \REGS|regs[6][17]~feeder ( +// Equation(s): +// \REGS|regs[6][17]~feeder_combout = ( \rd[17]~87_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[17]~87_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[6][17]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[6][17]~feeder .extended_lut = "off"; +defparam \REGS|regs[6][17]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[6][17]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X38_Y13_N23 +dffeas \REGS|regs[6][17] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[6][17]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~34_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[6][17]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[6][17] .is_wysiwyg = "true"; +defparam \REGS|regs[6][17] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X38_Y13_N11 +dffeas \REGS|regs[15][17]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[17]~87_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~39_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[15][17]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[15][17]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[15][17]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: FF_X38_Y13_N38 +dffeas \REGS|regs[14][17] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[17]~87_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~35_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[14][17]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[14][17] .is_wysiwyg = "true"; +defparam \REGS|regs[14][17] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X38_Y13_N39 +cyclonev_lcell_comb \rt_alu[17]~66 ( +// Equation(s): +// \rt_alu[17]~66_combout = ( \ROM|mem~10_combout & ( \ROM|mem~0_combout & ( \REGS|regs[14][17]~q ) ) ) # ( !\ROM|mem~10_combout & ( \ROM|mem~0_combout & ( \REGS|regs[15][17]~DUPLICATE_q ) ) ) # ( \ROM|mem~10_combout & ( !\ROM|mem~0_combout & ( +// \REGS|regs[6][17]~q ) ) ) # ( !\ROM|mem~10_combout & ( !\ROM|mem~0_combout & ( \REGS|regs[6][17]~q ) ) ) + + .dataa(!\REGS|regs[6][17]~q ), + .datab(gnd), + .datac(!\REGS|regs[15][17]~DUPLICATE_q ), + .datad(!\REGS|regs[14][17]~q ), + .datae(!\ROM|mem~10_combout ), + .dataf(!\ROM|mem~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[17]~66_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[17]~66 .extended_lut = "off"; +defparam \rt_alu[17]~66 .lut_mask = 64'h555555550F0F00FF; +defparam \rt_alu[17]~66 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X38_Y12_N51 +cyclonev_lcell_comb \rt_alu[17]~67 ( +// Equation(s): +// \rt_alu[17]~67_combout = ( \rt_alu[17]~66_combout & ( \REGS|Mux46~1_combout & ( ((\ROM|mem~13_combout ) # (\REGS|Mux46~0_combout )) # (\ROM|mem~12_combout ) ) ) ) # ( !\rt_alu[17]~66_combout & ( \REGS|Mux46~1_combout & ( (!\ROM|mem~12_combout & +// ((\ROM|mem~13_combout ) # (\REGS|Mux46~0_combout ))) ) ) ) # ( \rt_alu[17]~66_combout & ( !\REGS|Mux46~1_combout & ( ((\REGS|Mux46~0_combout & !\ROM|mem~13_combout )) # (\ROM|mem~12_combout ) ) ) ) # ( !\rt_alu[17]~66_combout & ( +// !\REGS|Mux46~1_combout & ( (!\ROM|mem~12_combout & (\REGS|Mux46~0_combout & !\ROM|mem~13_combout )) ) ) ) + + .dataa(gnd), + .datab(!\ROM|mem~12_combout ), + .datac(!\REGS|Mux46~0_combout ), + .datad(!\ROM|mem~13_combout ), + .datae(!\rt_alu[17]~66_combout ), + .dataf(!\REGS|Mux46~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[17]~67_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[17]~67 .extended_lut = "off"; +defparam \rt_alu[17]~67 .lut_mask = 64'h0C003F330CCC3FFF; +defparam \rt_alu[17]~67 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X38_Y12_N18 +cyclonev_lcell_comb \rt_alu[17]~68 ( +// Equation(s): +// \rt_alu[17]~68_combout = ( \REGS|Mux46~6_combout & ( \rt_alu[17]~67_combout & ( (!\rt_alu[17]~11_combout & (((\rt_alu[17]~10_combout )) # (\REGS|Mux46~7_combout ))) # (\rt_alu[17]~11_combout & (((!\rt_alu[17]~10_combout ) # (\rt_alu[17]~65_combout +// )))) ) ) ) # ( !\REGS|Mux46~6_combout & ( \rt_alu[17]~67_combout & ( (!\rt_alu[17]~11_combout & (\REGS|Mux46~7_combout & ((!\rt_alu[17]~10_combout )))) # (\rt_alu[17]~11_combout & (((!\rt_alu[17]~10_combout ) # (\rt_alu[17]~65_combout )))) ) ) ) # ( +// \REGS|Mux46~6_combout & ( !\rt_alu[17]~67_combout & ( (!\rt_alu[17]~11_combout & (((\rt_alu[17]~10_combout )) # (\REGS|Mux46~7_combout ))) # (\rt_alu[17]~11_combout & (((\rt_alu[17]~65_combout & \rt_alu[17]~10_combout )))) ) ) ) # ( +// !\REGS|Mux46~6_combout & ( !\rt_alu[17]~67_combout & ( (!\rt_alu[17]~11_combout & (\REGS|Mux46~7_combout & ((!\rt_alu[17]~10_combout )))) # (\rt_alu[17]~11_combout & (((\rt_alu[17]~65_combout & \rt_alu[17]~10_combout )))) ) ) ) + + .dataa(!\rt_alu[17]~11_combout ), + .datab(!\REGS|Mux46~7_combout ), + .datac(!\rt_alu[17]~65_combout ), + .datad(!\rt_alu[17]~10_combout ), + .datae(!\REGS|Mux46~6_combout ), + .dataf(!\rt_alu[17]~67_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[17]~68_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[17]~68 .extended_lut = "off"; +defparam \rt_alu[17]~68 .lut_mask = 64'h220522AF770577AF; +defparam \rt_alu[17]~68 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X38_Y12_N30 +cyclonev_lcell_comb \rt_alu[17]~69 ( +// Equation(s): +// \rt_alu[17]~69_combout = ( \rt_alu[17]~64_combout & ( \rt_alu[17]~68_combout & ( (\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout & !\rt_alu[3]~0_combout ) ) ) ) # ( !\rt_alu[17]~64_combout & ( \rt_alu[17]~68_combout & ( (!\rt_alu[3]~0_combout & +// ((\ROM|mem~9_combout ) # (\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout ))) ) ) ) # ( \rt_alu[17]~64_combout & ( !\rt_alu[17]~68_combout & ( (!\rt_alu[3]~0_combout & ((!\ROM|mem~9_combout ) # (\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout ))) ) ) ) # ( +// !\rt_alu[17]~64_combout & ( !\rt_alu[17]~68_combout & ( !\rt_alu[3]~0_combout ) ) ) + + .dataa(!\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout ), + .datab(!\ROM|mem~9_combout ), + .datac(!\rt_alu[3]~0_combout ), + .datad(gnd), + .datae(!\rt_alu[17]~64_combout ), + .dataf(!\rt_alu[17]~68_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[17]~69_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[17]~69 .extended_lut = "off"; +defparam \rt_alu[17]~69 .lut_mask = 64'hF0F0D0D070705050; +defparam \rt_alu[17]~69 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y10_N54 +cyclonev_lcell_comb \ALU|Mux14~0 ( +// Equation(s): +// \ALU|Mux14~0_combout = ( \REGS|Mux14~2_combout & ( \rt_alu[17]~69_combout & ( ((\ALU|Mux15~0_combout & (\CONTROL_UNIT|ALU_FN [1] & !\CONTROL_UNIT|ALU_FN [0]))) # (\ALU|Mux29~1_combout ) ) ) ) # ( !\REGS|Mux14~2_combout & ( \rt_alu[17]~69_combout & ( +// (\ALU|Mux15~0_combout & !\CONTROL_UNIT|ALU_FN [1]) ) ) ) # ( \REGS|Mux14~2_combout & ( !\rt_alu[17]~69_combout & ( (\ALU|Mux15~0_combout & \CONTROL_UNIT|ALU_FN [1]) ) ) ) # ( !\REGS|Mux14~2_combout & ( !\rt_alu[17]~69_combout & ( +// ((\ALU|Mux15~0_combout & (\CONTROL_UNIT|ALU_FN [1] & !\CONTROL_UNIT|ALU_FN [0]))) # (\ALU|Mux29~1_combout ) ) ) ) + + .dataa(!\ALU|Mux15~0_combout ), + .datab(!\CONTROL_UNIT|ALU_FN [1]), + .datac(!\CONTROL_UNIT|ALU_FN [0]), + .datad(!\ALU|Mux29~1_combout ), + .datae(!\REGS|Mux14~2_combout ), + .dataf(!\rt_alu[17]~69_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\ALU|Mux14~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \ALU|Mux14~0 .extended_lut = "off"; +defparam \ALU|Mux14~0 .lut_mask = 64'h10FF1111444410FF; +defparam \ALU|Mux14~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X36_Y3_N10 +dffeas \REGS|regs[5][16] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[16]~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~30_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[5][16]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[5][16] .is_wysiwyg = "true"; +defparam \REGS|regs[5][16] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X36_Y3_N41 +dffeas \REGS|regs[13][16] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[16]~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~31_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[13][16]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[13][16] .is_wysiwyg = "true"; +defparam \REGS|regs[13][16] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X36_Y3_N12 +cyclonev_lcell_comb \REGS|Mux47~6 ( +// Equation(s): +// \REGS|Mux47~6_combout = ( \PC|pc [9] & ( \PC|pc [7] & ( \REGS|regs[5][16]~q ) ) ) # ( !\PC|pc [9] & ( \PC|pc [7] & ( \REGS|regs[5][16]~q ) ) ) # ( \PC|pc [9] & ( !\PC|pc [7] & ( \REGS|regs[5][16]~q ) ) ) # ( !\PC|pc [9] & ( !\PC|pc [7] & ( +// (!\PC|pc[8]~DUPLICATE_q & ((!\PC|pc[6]~DUPLICATE_q & ((\REGS|regs[13][16]~q ))) # (\PC|pc[6]~DUPLICATE_q & (\REGS|regs[5][16]~q )))) # (\PC|pc[8]~DUPLICATE_q & (\REGS|regs[5][16]~q )) ) ) ) + + .dataa(!\REGS|regs[5][16]~q ), + .datab(!\REGS|regs[13][16]~q ), + .datac(!\PC|pc[8]~DUPLICATE_q ), + .datad(!\PC|pc[6]~DUPLICATE_q ), + .datae(!\PC|pc [9]), + .dataf(!\PC|pc [7]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux47~6_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux47~6 .extended_lut = "off"; +defparam \REGS|Mux47~6 .lut_mask = 64'h3555555555555555; +defparam \REGS|Mux47~6 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X37_Y12_N56 +dffeas \REGS|regs[22][16] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[16]~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~9_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[22][16]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[22][16] .is_wysiwyg = "true"; +defparam \REGS|regs[22][16] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X37_Y12_N26 +dffeas \REGS|regs[30][16] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[16]~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~10_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[30][16]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[30][16] .is_wysiwyg = "true"; +defparam \REGS|regs[30][16] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y12_N12 +cyclonev_lcell_comb \REGS|Mux47~3 ( +// Equation(s): +// \REGS|Mux47~3_combout = ( \REGS|regs[22][16]~q & ( \REGS|regs[30][16]~q ) ) # ( !\REGS|regs[22][16]~q & ( \REGS|regs[30][16]~q & ( (!\PC|pc [6] & (!\PC|pc [7] & (!\PC|pc[8]~DUPLICATE_q & !\PC|pc [9]))) ) ) ) # ( \REGS|regs[22][16]~q & ( +// !\REGS|regs[30][16]~q & ( (((\PC|pc [9]) # (\PC|pc[8]~DUPLICATE_q )) # (\PC|pc [7])) # (\PC|pc [6]) ) ) ) + + .dataa(!\PC|pc [6]), + .datab(!\PC|pc [7]), + .datac(!\PC|pc[8]~DUPLICATE_q ), + .datad(!\PC|pc [9]), + .datae(!\REGS|regs[22][16]~q ), + .dataf(!\REGS|regs[30][16]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux47~3_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux47~3 .extended_lut = "off"; +defparam \REGS|Mux47~3 .lut_mask = 64'h00007FFF8000FFFF; +defparam \REGS|Mux47~3 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X36_Y11_N16 +dffeas \REGS|regs[23][16]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[16]~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~18_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[23][16]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[23][16]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[23][16]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y15_N42 +cyclonev_lcell_comb \REGS|regs[31][16]~feeder ( +// Equation(s): +// \REGS|regs[31][16]~feeder_combout = ( \rd[16]~0_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[16]~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[31][16]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[31][16]~feeder .extended_lut = "off"; +defparam \REGS|regs[31][16]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[31][16]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X37_Y15_N44 +dffeas \REGS|regs[31][16] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[31][16]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~19_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[31][16]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[31][16] .is_wysiwyg = "true"; +defparam \REGS|regs[31][16] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y15_N21 +cyclonev_lcell_comb \REGS|Mux47~2 ( +// Equation(s): +// \REGS|Mux47~2_combout = ( \PC|pc [7] & ( \PC|pc [9] & ( \REGS|regs[23][16]~DUPLICATE_q ) ) ) # ( !\PC|pc [7] & ( \PC|pc [9] & ( \REGS|regs[23][16]~DUPLICATE_q ) ) ) # ( \PC|pc [7] & ( !\PC|pc [9] & ( \REGS|regs[23][16]~DUPLICATE_q ) ) ) # ( !\PC|pc +// [7] & ( !\PC|pc [9] & ( (!\PC|pc[8]~DUPLICATE_q & ((!\PC|pc [6] & ((\REGS|regs[31][16]~q ))) # (\PC|pc [6] & (\REGS|regs[23][16]~DUPLICATE_q )))) # (\PC|pc[8]~DUPLICATE_q & (\REGS|regs[23][16]~DUPLICATE_q )) ) ) ) + + .dataa(!\REGS|regs[23][16]~DUPLICATE_q ), + .datab(!\REGS|regs[31][16]~q ), + .datac(!\PC|pc[8]~DUPLICATE_q ), + .datad(!\PC|pc [6]), + .datae(!\PC|pc [7]), + .dataf(!\PC|pc [9]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux47~2_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux47~2 .extended_lut = "off"; +defparam \REGS|Mux47~2 .lut_mask = 64'h3555555555555555; +defparam \REGS|Mux47~2 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X37_Y4_N5 +dffeas \REGS|regs[12][16] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[16]~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~26_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[12][16]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[12][16] .is_wysiwyg = "true"; +defparam \REGS|regs[12][16] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X35_Y6_N36 +cyclonev_lcell_comb \REGS|regs[4][16]~feeder ( +// Equation(s): +// \REGS|regs[4][16]~feeder_combout = ( \rd[16]~0_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[16]~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[4][16]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[4][16]~feeder .extended_lut = "off"; +defparam \REGS|regs[4][16]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[4][16]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X35_Y6_N38 +dffeas \REGS|regs[4][16] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[4][16]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~22_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[4][16]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[4][16] .is_wysiwyg = "true"; +defparam \REGS|regs[4][16] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y4_N18 +cyclonev_lcell_comb \REGS|Mux47~7 ( +// Equation(s): +// \REGS|Mux47~7_combout = ( \PC|pc[6]~DUPLICATE_q & ( \PC|pc [7] & ( \REGS|regs[4][16]~q ) ) ) # ( !\PC|pc[6]~DUPLICATE_q & ( \PC|pc [7] & ( \REGS|regs[4][16]~q ) ) ) # ( \PC|pc[6]~DUPLICATE_q & ( !\PC|pc [7] & ( \REGS|regs[4][16]~q ) ) ) # ( +// !\PC|pc[6]~DUPLICATE_q & ( !\PC|pc [7] & ( (!\PC|pc[8]~DUPLICATE_q & ((!\PC|pc [9] & (\REGS|regs[12][16]~q )) # (\PC|pc [9] & ((\REGS|regs[4][16]~q ))))) # (\PC|pc[8]~DUPLICATE_q & (((\REGS|regs[4][16]~q )))) ) ) ) + + .dataa(!\REGS|regs[12][16]~q ), + .datab(!\PC|pc[8]~DUPLICATE_q ), + .datac(!\PC|pc [9]), + .datad(!\REGS|regs[4][16]~q ), + .datae(!\PC|pc[6]~DUPLICATE_q ), + .dataf(!\PC|pc [7]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux47~7_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux47~7 .extended_lut = "off"; +defparam \REGS|Mux47~7 .lut_mask = 64'h407F00FF00FF00FF; +defparam \REGS|Mux47~7 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X36_Y12_N27 +cyclonev_lcell_comb \REGS|Mux15~0 ( +// Equation(s): +// \REGS|Mux15~0_combout = ( \REGS|Mux47~7_combout & ( \ROM|mem~16_combout & ( (!\ROM|mem~9_combout & (\REGS|Mux47~6_combout )) # (\ROM|mem~9_combout & ((\REGS|Mux47~2_combout ))) ) ) ) # ( !\REGS|Mux47~7_combout & ( \ROM|mem~16_combout & ( +// (!\ROM|mem~9_combout & (\REGS|Mux47~6_combout )) # (\ROM|mem~9_combout & ((\REGS|Mux47~2_combout ))) ) ) ) # ( \REGS|Mux47~7_combout & ( !\ROM|mem~16_combout & ( (!\ROM|mem~9_combout ) # (\REGS|Mux47~3_combout ) ) ) ) # ( !\REGS|Mux47~7_combout & ( +// !\ROM|mem~16_combout & ( (\REGS|Mux47~3_combout & \ROM|mem~9_combout ) ) ) ) + + .dataa(!\REGS|Mux47~6_combout ), + .datab(!\REGS|Mux47~3_combout ), + .datac(!\REGS|Mux47~2_combout ), + .datad(!\ROM|mem~9_combout ), + .datae(!\REGS|Mux47~7_combout ), + .dataf(!\ROM|mem~16_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux15~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux15~0 .extended_lut = "off"; +defparam \REGS|Mux15~0 .lut_mask = 64'h0033FF33550F550F; +defparam \REGS|Mux15~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X37_Y3_N44 +dffeas \REGS|regs[26][16] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[16]~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~6_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[26][16]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[26][16] .is_wysiwyg = "true"; +defparam \REGS|regs[26][16] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y15_N27 +cyclonev_lcell_comb \REGS|regs[18][16]~feeder ( +// Equation(s): +// \REGS|regs[18][16]~feeder_combout = ( \rd[16]~0_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[16]~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[18][16]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[18][16]~feeder .extended_lut = "off"; +defparam \REGS|regs[18][16]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[18][16]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X37_Y15_N28 +dffeas \REGS|regs[18][16] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[18][16]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~5_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[18][16]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[18][16] .is_wysiwyg = "true"; +defparam \REGS|regs[18][16] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y3_N36 +cyclonev_lcell_comb \REGS|Mux47~0 ( +// Equation(s): +// \REGS|Mux47~0_combout = ( \PC|pc [9] & ( \REGS|regs[18][16]~q ) ) # ( !\PC|pc [9] & ( \REGS|regs[18][16]~q & ( (((\PC|pc[6]~DUPLICATE_q ) # (\PC|pc [7])) # (\REGS|regs[26][16]~q )) # (\PC|pc[8]~DUPLICATE_q ) ) ) ) # ( !\PC|pc [9] & ( +// !\REGS|regs[18][16]~q & ( (!\PC|pc[8]~DUPLICATE_q & (\REGS|regs[26][16]~q & (!\PC|pc [7] & !\PC|pc[6]~DUPLICATE_q ))) ) ) ) + + .dataa(!\PC|pc[8]~DUPLICATE_q ), + .datab(!\REGS|regs[26][16]~q ), + .datac(!\PC|pc [7]), + .datad(!\PC|pc[6]~DUPLICATE_q ), + .datae(!\PC|pc [9]), + .dataf(!\REGS|regs[18][16]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux47~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux47~0 .extended_lut = "off"; +defparam \REGS|Mux47~0 .lut_mask = 64'h200000007FFFFFFF; +defparam \REGS|Mux47~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y3_N18 +cyclonev_lcell_comb \REGS|regs[8][16]~feeder ( +// Equation(s): +// \REGS|regs[8][16]~feeder_combout = ( \rd[16]~0_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[16]~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[8][16]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[8][16]~feeder .extended_lut = "off"; +defparam \REGS|regs[8][16]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[8][16]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X37_Y3_N19 +dffeas \REGS|regs[8][16]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[8][16]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~24_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[8][16]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[8][16]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[8][16]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: FF_X37_Y4_N53 +dffeas \REGS|regs[9][16] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[16]~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~29_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[9][16]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[9][16] .is_wysiwyg = "true"; +defparam \REGS|regs[9][16] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X36_Y5_N33 +cyclonev_lcell_comb \REGS|Mux15~1 ( +// Equation(s): +// \REGS|Mux15~1_combout = ( \ROM|mem~15_combout & ( (\ROM|mem~0_combout & \REGS|regs[9][16]~q ) ) ) # ( !\ROM|mem~15_combout & ( (\ROM|mem~0_combout & \REGS|regs[8][16]~DUPLICATE_q ) ) ) + + .dataa(!\ROM|mem~0_combout ), + .datab(gnd), + .datac(!\REGS|regs[8][16]~DUPLICATE_q ), + .datad(!\REGS|regs[9][16]~q ), + .datae(gnd), + .dataf(!\ROM|mem~15_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux15~1_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux15~1 .extended_lut = "off"; +defparam \REGS|Mux15~1 .lut_mask = 64'h0505050500550055; +defparam \REGS|Mux15~1 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y12_N3 +cyclonev_lcell_comb \REGS|Mux15~2 ( +// Equation(s): +// \REGS|Mux15~2_combout = ( \REGS|Mux47~0_combout & ( \REGS|Mux15~1_combout & ( (!\ROM|mem~17_combout ) # (\REGS|Mux15~0_combout ) ) ) ) # ( !\REGS|Mux47~0_combout & ( \REGS|Mux15~1_combout & ( (!\ROM|mem~17_combout ) # (\REGS|Mux15~0_combout ) ) ) ) # +// ( \REGS|Mux47~0_combout & ( !\REGS|Mux15~1_combout & ( (!\ROM|mem~17_combout & ((\ROM|mem~9_combout ))) # (\ROM|mem~17_combout & (\REGS|Mux15~0_combout )) ) ) ) # ( !\REGS|Mux47~0_combout & ( !\REGS|Mux15~1_combout & ( (\REGS|Mux15~0_combout & +// \ROM|mem~17_combout ) ) ) ) + + .dataa(!\REGS|Mux15~0_combout ), + .datab(gnd), + .datac(!\ROM|mem~17_combout ), + .datad(!\ROM|mem~9_combout ), + .datae(!\REGS|Mux47~0_combout ), + .dataf(!\REGS|Mux15~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux15~2_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux15~2 .extended_lut = "off"; +defparam \REGS|Mux15~2 .lut_mask = 64'h050505F5F5F5F5F5; +defparam \REGS|Mux15~2 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X37_Y14_N10 +dffeas \REGS|regs[16][16] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[16]~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~2_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[16][16]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[16][16] .is_wysiwyg = "true"; +defparam \REGS|regs[16][16] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X28_Y12_N54 +cyclonev_lcell_comb \REGS|Decoder0~11 ( +// Equation(s): +// \REGS|Decoder0~11_combout = ( \REGS|Decoder0~0_combout & ( (!\comb~4_combout & (\comb~3_combout & !\comb~2_combout )) ) ) + + .dataa(!\comb~4_combout ), + .datab(!\comb~3_combout ), + .datac(!\comb~2_combout ), + .datad(gnd), + .datae(gnd), + .dataf(!\REGS|Decoder0~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Decoder0~11_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Decoder0~11 .extended_lut = "off"; +defparam \REGS|Decoder0~11 .lut_mask = 64'h0000000020202020; +defparam \REGS|Decoder0~11 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X38_Y11_N17 +dffeas \REGS|regs[17][16]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[16]~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~11_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[17][16]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[17][16]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[17][16]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X38_Y11_N39 +cyclonev_lcell_comb \rt_alu[16]~3 ( +// Equation(s): +// \rt_alu[16]~3_combout = ( \REGS|regs[17][16]~DUPLICATE_q & ( ((!\ROM|mem~10_combout & \ROM|mem~0_combout )) # (\REGS|regs[16][16]~q ) ) ) # ( !\REGS|regs[17][16]~DUPLICATE_q & ( (\REGS|regs[16][16]~q & ((!\ROM|mem~0_combout ) # (\ROM|mem~10_combout +// ))) ) ) + + .dataa(gnd), + .datab(!\ROM|mem~10_combout ), + .datac(!\REGS|regs[16][16]~q ), + .datad(!\ROM|mem~0_combout ), + .datae(gnd), + .dataf(!\REGS|regs[17][16]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[16]~3_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[16]~3 .extended_lut = "off"; +defparam \rt_alu[16]~3 .lut_mask = 64'h0F030F030FCF0FCF; +defparam \rt_alu[16]~3 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X38_Y15_N21 +cyclonev_lcell_comb \REGS|regs[27][16]~feeder ( +// Equation(s): +// \REGS|regs[27][16]~feeder_combout = ( \rd[16]~0_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[16]~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[27][16]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[27][16]~feeder .extended_lut = "off"; +defparam \REGS|regs[27][16]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[27][16]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X38_Y15_N23 +dffeas \REGS|regs[27][16] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[27][16]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~15_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[27][16]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[27][16] .is_wysiwyg = "true"; +defparam \REGS|regs[27][16] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X38_Y15_N48 +cyclonev_lcell_comb \REGS|regs[19][16]~feeder ( +// Equation(s): +// \REGS|regs[19][16]~feeder_combout = ( \rd[16]~0_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[16]~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[19][16]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[19][16]~feeder .extended_lut = "off"; +defparam \REGS|regs[19][16]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[19][16]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X38_Y15_N49 +dffeas \REGS|regs[19][16] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[19][16]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~14_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[19][16]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[19][16] .is_wysiwyg = "true"; +defparam \REGS|regs[19][16] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X38_Y15_N3 +cyclonev_lcell_comb \REGS|Mux47~1 ( +// Equation(s): +// \REGS|Mux47~1_combout = ( \PC|pc [7] & ( \PC|pc[8]~DUPLICATE_q & ( \REGS|regs[19][16]~q ) ) ) # ( !\PC|pc [7] & ( \PC|pc[8]~DUPLICATE_q & ( \REGS|regs[19][16]~q ) ) ) # ( \PC|pc [7] & ( !\PC|pc[8]~DUPLICATE_q & ( \REGS|regs[19][16]~q ) ) ) # ( +// !\PC|pc [7] & ( !\PC|pc[8]~DUPLICATE_q & ( (!\PC|pc [9] & ((!\PC|pc [6] & (\REGS|regs[27][16]~q )) # (\PC|pc [6] & ((\REGS|regs[19][16]~q ))))) # (\PC|pc [9] & (((\REGS|regs[19][16]~q )))) ) ) ) + + .dataa(!\REGS|regs[27][16]~q ), + .datab(!\PC|pc [9]), + .datac(!\REGS|regs[19][16]~q ), + .datad(!\PC|pc [6]), + .datae(!\PC|pc [7]), + .dataf(!\PC|pc[8]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux47~1_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux47~1 .extended_lut = "off"; +defparam \REGS|Mux47~1 .lut_mask = 64'h470F0F0F0F0F0F0F; +defparam \REGS|Mux47~1 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X38_Y11_N20 +dffeas \REGS|regs[29][16] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[16]~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~17_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[29][16]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[29][16] .is_wysiwyg = "true"; +defparam \REGS|regs[29][16] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X38_Y11_N29 +dffeas \REGS|regs[28][16]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[16]~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~8_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[28][16]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[28][16]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[28][16]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: FF_X37_Y12_N1 +dffeas \REGS|regs[20][16]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[16]~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~7_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[20][16]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[20][16]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[20][16]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X38_Y11_N36 +cyclonev_lcell_comb \rt_alu[16]~1 ( +// Equation(s): +// \rt_alu[16]~1_combout = ( \REGS|regs[20][16]~DUPLICATE_q & ( (!\ROM|mem~0_combout ) # ((!\ROM|mem~10_combout & (\REGS|regs[29][16]~q )) # (\ROM|mem~10_combout & ((\REGS|regs[28][16]~DUPLICATE_q )))) ) ) # ( !\REGS|regs[20][16]~DUPLICATE_q & ( +// (\ROM|mem~0_combout & ((!\ROM|mem~10_combout & (\REGS|regs[29][16]~q )) # (\ROM|mem~10_combout & ((\REGS|regs[28][16]~DUPLICATE_q ))))) ) ) + + .dataa(!\ROM|mem~0_combout ), + .datab(!\ROM|mem~10_combout ), + .datac(!\REGS|regs[29][16]~q ), + .datad(!\REGS|regs[28][16]~DUPLICATE_q ), + .datae(gnd), + .dataf(!\REGS|regs[20][16]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[16]~1_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[16]~1 .extended_lut = "off"; +defparam \rt_alu[16]~1 .lut_mask = 64'h04150415AEBFAEBF; +defparam \rt_alu[16]~1 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X38_Y11_N48 +cyclonev_lcell_comb \rt_alu[16]~2 ( +// Equation(s): +// \rt_alu[16]~2_combout = ( \REGS|Mux47~2_combout & ( (!\ROM|mem~12_combout & (((\rt_alu[16]~1_combout )))) # (\ROM|mem~12_combout & (((\REGS|Mux47~3_combout )) # (\ROM|mem~13_combout ))) ) ) # ( !\REGS|Mux47~2_combout & ( (!\ROM|mem~12_combout & +// (((\rt_alu[16]~1_combout )))) # (\ROM|mem~12_combout & (!\ROM|mem~13_combout & ((\REGS|Mux47~3_combout )))) ) ) + + .dataa(!\ROM|mem~13_combout ), + .datab(!\ROM|mem~12_combout ), + .datac(!\rt_alu[16]~1_combout ), + .datad(!\REGS|Mux47~3_combout ), + .datae(gnd), + .dataf(!\REGS|Mux47~2_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[16]~2_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[16]~2 .extended_lut = "off"; +defparam \rt_alu[16]~2 .lut_mask = 64'h0C2E0C2E1D3F1D3F; +defparam \rt_alu[16]~2 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X38_Y11_N21 +cyclonev_lcell_comb \rt_alu[16]~6 ( +// Equation(s): +// \rt_alu[16]~6_combout = ( \rt_alu[17]~4_combout & ( \REGS|Mux47~0_combout & ( (\rt_alu[16]~2_combout ) # (\rt_alu[17]~5_combout ) ) ) ) # ( !\rt_alu[17]~4_combout & ( \REGS|Mux47~0_combout & ( (!\rt_alu[17]~5_combout & (\rt_alu[16]~3_combout )) # +// (\rt_alu[17]~5_combout & ((\REGS|Mux47~1_combout ))) ) ) ) # ( \rt_alu[17]~4_combout & ( !\REGS|Mux47~0_combout & ( (!\rt_alu[17]~5_combout & \rt_alu[16]~2_combout ) ) ) ) # ( !\rt_alu[17]~4_combout & ( !\REGS|Mux47~0_combout & ( +// (!\rt_alu[17]~5_combout & (\rt_alu[16]~3_combout )) # (\rt_alu[17]~5_combout & ((\REGS|Mux47~1_combout ))) ) ) ) + + .dataa(!\rt_alu[17]~5_combout ), + .datab(!\rt_alu[16]~3_combout ), + .datac(!\REGS|Mux47~1_combout ), + .datad(!\rt_alu[16]~2_combout ), + .datae(!\rt_alu[17]~4_combout ), + .dataf(!\REGS|Mux47~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[16]~6_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[16]~6 .extended_lut = "off"; +defparam \rt_alu[16]~6 .lut_mask = 64'h272700AA272755FF; +defparam \rt_alu[16]~6 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y4_N36 +cyclonev_lcell_comb \REGS|regs[1][16]~feeder ( +// Equation(s): +// \REGS|regs[1][16]~feeder_combout = ( \rd[16]~0_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[16]~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[1][16]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[1][16]~feeder .extended_lut = "off"; +defparam \REGS|regs[1][16]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[1][16]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X32_Y4_N37 +dffeas \REGS|regs[1][16] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[1][16]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~28_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[1][16]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[1][16] .is_wysiwyg = "true"; +defparam \REGS|regs[1][16] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y4_N48 +cyclonev_lcell_comb \REGS|Mux47~4 ( +// Equation(s): +// \REGS|Mux47~4_combout = ( \PC|pc [9] & ( \REGS|regs[9][16]~q & ( \REGS|regs[1][16]~q ) ) ) # ( !\PC|pc [9] & ( \REGS|regs[9][16]~q & ( ((!\PC|pc [7] & (!\PC|pc[6]~DUPLICATE_q & !\PC|pc[8]~DUPLICATE_q ))) # (\REGS|regs[1][16]~q ) ) ) ) # ( \PC|pc [9] +// & ( !\REGS|regs[9][16]~q & ( \REGS|regs[1][16]~q ) ) ) # ( !\PC|pc [9] & ( !\REGS|regs[9][16]~q & ( (\REGS|regs[1][16]~q & (((\PC|pc[8]~DUPLICATE_q ) # (\PC|pc[6]~DUPLICATE_q )) # (\PC|pc [7]))) ) ) ) + + .dataa(!\PC|pc [7]), + .datab(!\REGS|regs[1][16]~q ), + .datac(!\PC|pc[6]~DUPLICATE_q ), + .datad(!\PC|pc[8]~DUPLICATE_q ), + .datae(!\PC|pc [9]), + .dataf(!\REGS|regs[9][16]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux47~4_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux47~4 .extended_lut = "off"; +defparam \REGS|Mux47~4 .lut_mask = 64'h13333333B3333333; +defparam \REGS|Mux47~4 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X37_Y3_N20 +dffeas \REGS|regs[8][16] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[8][16]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~24_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[8][16]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[8][16] .is_wysiwyg = "true"; +defparam \REGS|regs[8][16] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y3_N57 +cyclonev_lcell_comb \REGS|Mux47~5 ( +// Equation(s): +// \REGS|Mux47~5_combout = ( !\PC|pc[8]~DUPLICATE_q & ( !\PC|pc [7] & ( (\REGS|regs[8][16]~q & (!\PC|pc[6]~DUPLICATE_q & !\PC|pc [9])) ) ) ) + + .dataa(!\REGS|regs[8][16]~q ), + .datab(!\PC|pc[6]~DUPLICATE_q ), + .datac(!\PC|pc [9]), + .datad(gnd), + .datae(!\PC|pc[8]~DUPLICATE_q ), + .dataf(!\PC|pc [7]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux47~5_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux47~5 .extended_lut = "off"; +defparam \REGS|Mux47~5 .lut_mask = 64'h4040000000000000; +defparam \REGS|Mux47~5 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X37_Y5_N16 +dffeas \REGS|regs[10][16] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[16]~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~33_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[10][16]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[10][16] .is_wysiwyg = "true"; +defparam \REGS|regs[10][16] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X37_Y5_N47 +dffeas \REGS|regs[2][16] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[16]~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~32_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[2][16]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[2][16] .is_wysiwyg = "true"; +defparam \REGS|regs[2][16] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X37_Y5_N50 +dffeas \REGS|regs[11][16]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[16]~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~37_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[11][16]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[11][16]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[11][16]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y5_N54 +cyclonev_lcell_comb \rt_alu[16]~7 ( +// Equation(s): +// \rt_alu[16]~7_combout = ( \ROM|mem~0_combout & ( (!\ROM|mem~10_combout & ((\REGS|regs[11][16]~DUPLICATE_q ))) # (\ROM|mem~10_combout & (\REGS|regs[10][16]~q )) ) ) # ( !\ROM|mem~0_combout & ( \REGS|regs[2][16]~q ) ) + + .dataa(!\REGS|regs[10][16]~q ), + .datab(!\REGS|regs[2][16]~q ), + .datac(!\REGS|regs[11][16]~DUPLICATE_q ), + .datad(!\ROM|mem~10_combout ), + .datae(gnd), + .dataf(!\ROM|mem~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[16]~7_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[16]~7 .extended_lut = "off"; +defparam \rt_alu[16]~7 .lut_mask = 64'h333333330F550F55; +defparam \rt_alu[16]~7 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X38_Y14_N26 +dffeas \REGS|regs[15][16] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[16]~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~39_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[15][16]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[15][16] .is_wysiwyg = "true"; +defparam \REGS|regs[15][16] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X38_Y13_N56 +dffeas \REGS|regs[6][16] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[16]~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~34_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[6][16]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[6][16] .is_wysiwyg = "true"; +defparam \REGS|regs[6][16] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X38_Y13_N45 +cyclonev_lcell_comb \REGS|regs[14][16]~feeder ( +// Equation(s): +// \REGS|regs[14][16]~feeder_combout = ( \rd[16]~0_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[16]~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[14][16]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[14][16]~feeder .extended_lut = "off"; +defparam \REGS|regs[14][16]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[14][16]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X38_Y13_N47 +dffeas \REGS|regs[14][16] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[14][16]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~35_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[14][16]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[14][16] .is_wysiwyg = "true"; +defparam \REGS|regs[14][16] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X38_Y13_N24 +cyclonev_lcell_comb \rt_alu[16]~8 ( +// Equation(s): +// \rt_alu[16]~8_combout = ( \ROM|mem~0_combout & ( \ROM|mem~10_combout & ( \REGS|regs[14][16]~q ) ) ) # ( !\ROM|mem~0_combout & ( \ROM|mem~10_combout & ( \REGS|regs[6][16]~q ) ) ) # ( \ROM|mem~0_combout & ( !\ROM|mem~10_combout & ( +// \REGS|regs[15][16]~q ) ) ) # ( !\ROM|mem~0_combout & ( !\ROM|mem~10_combout & ( \REGS|regs[6][16]~q ) ) ) + + .dataa(gnd), + .datab(!\REGS|regs[15][16]~q ), + .datac(!\REGS|regs[6][16]~q ), + .datad(!\REGS|regs[14][16]~q ), + .datae(!\ROM|mem~0_combout ), + .dataf(!\ROM|mem~10_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[16]~8_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[16]~8 .extended_lut = "off"; +defparam \rt_alu[16]~8 .lut_mask = 64'h0F0F33330F0F00FF; +defparam \rt_alu[16]~8 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y5_N51 +cyclonev_lcell_comb \rt_alu[16]~9 ( +// Equation(s): +// \rt_alu[16]~9_combout = ( \REGS|Mux47~7_combout & ( \rt_alu[16]~8_combout & ( (!\ROM|mem~13_combout ) # ((\REGS|Mux47~6_combout ) # (\ROM|mem~12_combout )) ) ) ) # ( !\REGS|Mux47~7_combout & ( \rt_alu[16]~8_combout & ( ((\ROM|mem~13_combout & +// \REGS|Mux47~6_combout )) # (\ROM|mem~12_combout ) ) ) ) # ( \REGS|Mux47~7_combout & ( !\rt_alu[16]~8_combout & ( (!\ROM|mem~12_combout & ((!\ROM|mem~13_combout ) # (\REGS|Mux47~6_combout ))) ) ) ) # ( !\REGS|Mux47~7_combout & ( !\rt_alu[16]~8_combout +// & ( (\ROM|mem~13_combout & (!\ROM|mem~12_combout & \REGS|Mux47~6_combout )) ) ) ) + + .dataa(gnd), + .datab(!\ROM|mem~13_combout ), + .datac(!\ROM|mem~12_combout ), + .datad(!\REGS|Mux47~6_combout ), + .datae(!\REGS|Mux47~7_combout ), + .dataf(!\rt_alu[16]~8_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[16]~9_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[16]~9 .extended_lut = "off"; +defparam \rt_alu[16]~9 .lut_mask = 64'h0030C0F00F3FCFFF; +defparam \rt_alu[16]~9 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y5_N12 +cyclonev_lcell_comb \rt_alu[16]~12 ( +// Equation(s): +// \rt_alu[16]~12_combout = ( \rt_alu[16]~7_combout & ( \rt_alu[16]~9_combout & ( ((!\rt_alu[17]~10_combout & ((\REGS|Mux47~5_combout ))) # (\rt_alu[17]~10_combout & (\REGS|Mux47~4_combout ))) # (\rt_alu[17]~11_combout ) ) ) ) # ( !\rt_alu[16]~7_combout +// & ( \rt_alu[16]~9_combout & ( (!\rt_alu[17]~11_combout & ((!\rt_alu[17]~10_combout & ((\REGS|Mux47~5_combout ))) # (\rt_alu[17]~10_combout & (\REGS|Mux47~4_combout )))) # (\rt_alu[17]~11_combout & (((!\rt_alu[17]~10_combout )))) ) ) ) # ( +// \rt_alu[16]~7_combout & ( !\rt_alu[16]~9_combout & ( (!\rt_alu[17]~11_combout & ((!\rt_alu[17]~10_combout & ((\REGS|Mux47~5_combout ))) # (\rt_alu[17]~10_combout & (\REGS|Mux47~4_combout )))) # (\rt_alu[17]~11_combout & (((\rt_alu[17]~10_combout +// )))) ) ) ) # ( !\rt_alu[16]~7_combout & ( !\rt_alu[16]~9_combout & ( (!\rt_alu[17]~11_combout & ((!\rt_alu[17]~10_combout & ((\REGS|Mux47~5_combout ))) # (\rt_alu[17]~10_combout & (\REGS|Mux47~4_combout )))) ) ) ) + + .dataa(!\REGS|Mux47~4_combout ), + .datab(!\rt_alu[17]~11_combout ), + .datac(!\REGS|Mux47~5_combout ), + .datad(!\rt_alu[17]~10_combout ), + .datae(!\rt_alu[16]~7_combout ), + .dataf(!\rt_alu[16]~9_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[16]~12_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[16]~12 .extended_lut = "off"; +defparam \rt_alu[16]~12 .lut_mask = 64'h0C440C773F443F77; +defparam \rt_alu[16]~12 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X38_Y9_N3 +cyclonev_lcell_comb \rt_alu[16]~13 ( +// Equation(s): +// \rt_alu[16]~13_combout = ( \ROM|mem~9_combout & ( \rt_alu[16]~12_combout & ( ((\rt_alu[16]~6_combout & !\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout )) # (\rt_alu[3]~0_combout ) ) ) ) # ( !\ROM|mem~9_combout & ( \rt_alu[16]~12_combout & ( +// (!\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout ) # (\rt_alu[3]~0_combout ) ) ) ) # ( \ROM|mem~9_combout & ( !\rt_alu[16]~12_combout & ( ((\rt_alu[16]~6_combout & !\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout )) # (\rt_alu[3]~0_combout ) ) ) ) # ( +// !\ROM|mem~9_combout & ( !\rt_alu[16]~12_combout & ( \rt_alu[3]~0_combout ) ) ) + + .dataa(gnd), + .datab(!\rt_alu[3]~0_combout ), + .datac(!\rt_alu[16]~6_combout ), + .datad(!\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout ), + .datae(!\ROM|mem~9_combout ), + .dataf(!\rt_alu[16]~12_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[16]~13_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[16]~13 .extended_lut = "off"; +defparam \rt_alu[16]~13 .lut_mask = 64'h33333F33FF333F33; +defparam \rt_alu[16]~13 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X31_Y10_N36 +cyclonev_lcell_comb \rt_alu[15]~280 ( +// Equation(s): +// \rt_alu[15]~280_combout = ( \ROM|mem~0_combout & ( \ROM|mem~18_combout & ( (!\PC|pc [9] & (!\PC|pc [8] & ((\ROM|mem~1_combout ) # (\ROM|mem~2_combout )))) ) ) ) + + .dataa(!\PC|pc [9]), + .datab(!\ROM|mem~2_combout ), + .datac(!\ROM|mem~1_combout ), + .datad(!\PC|pc [8]), + .datae(!\ROM|mem~0_combout ), + .dataf(!\ROM|mem~18_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[15]~280_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[15]~280 .extended_lut = "off"; +defparam \rt_alu[15]~280 .lut_mask = 64'h0000000000002A00; +defparam \rt_alu[15]~280 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X28_Y9_N23 +dffeas \REGS|regs[26][15] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[15]~456_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~6_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[26][15]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[26][15] .is_wysiwyg = "true"; +defparam \REGS|regs[26][15] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X28_Y9_N11 +dffeas \REGS|regs[18][15] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[15]~456_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~5_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[18][15]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[18][15] .is_wysiwyg = "true"; +defparam \REGS|regs[18][15] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X28_Y9_N45 +cyclonev_lcell_comb \REGS|Mux48~4 ( +// Equation(s): +// \REGS|Mux48~4_combout = ( \PC|pc [9] & ( \PC|pc [8] & ( \REGS|regs[18][15]~q ) ) ) # ( !\PC|pc [9] & ( \PC|pc [8] & ( \REGS|regs[18][15]~q ) ) ) # ( \PC|pc [9] & ( !\PC|pc [8] & ( \REGS|regs[18][15]~q ) ) ) # ( !\PC|pc [9] & ( !\PC|pc [8] & ( +// (!\PC|pc[6]~DUPLICATE_q & ((!\PC|pc [7] & (\REGS|regs[26][15]~q )) # (\PC|pc [7] & ((\REGS|regs[18][15]~q ))))) # (\PC|pc[6]~DUPLICATE_q & (((\REGS|regs[18][15]~q )))) ) ) ) + + .dataa(!\REGS|regs[26][15]~q ), + .datab(!\PC|pc[6]~DUPLICATE_q ), + .datac(!\REGS|regs[18][15]~q ), + .datad(!\PC|pc [7]), + .datae(!\PC|pc [9]), + .dataf(!\PC|pc [8]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux48~4_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux48~4 .extended_lut = "off"; +defparam \REGS|Mux48~4 .lut_mask = 64'h470F0F0F0F0F0F0F; +defparam \REGS|Mux48~4 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X31_Y12_N47 +dffeas \REGS|regs[8][15] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[15]~456_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~24_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[8][15]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[8][15] .is_wysiwyg = "true"; +defparam \REGS|regs[8][15] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X31_Y12_N26 +dffeas \REGS|regs[9][15] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[15]~456_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~29_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[9][15]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[9][15] .is_wysiwyg = "true"; +defparam \REGS|regs[9][15] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X31_Y12_N57 +cyclonev_lcell_comb \REGS|Mux16~1 ( +// Equation(s): +// \REGS|Mux16~1_combout = ( \ROM|mem~0_combout & ( \ROM|mem~15_combout & ( \REGS|regs[9][15]~q ) ) ) # ( \ROM|mem~0_combout & ( !\ROM|mem~15_combout & ( \REGS|regs[8][15]~q ) ) ) + + .dataa(gnd), + .datab(!\REGS|regs[8][15]~q ), + .datac(gnd), + .datad(!\REGS|regs[9][15]~q ), + .datae(!\ROM|mem~0_combout ), + .dataf(!\ROM|mem~15_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux16~1_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux16~1 .extended_lut = "off"; +defparam \REGS|Mux16~1 .lut_mask = 64'h00003333000000FF; +defparam \REGS|Mux16~1 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X30_Y12_N9 +cyclonev_lcell_comb \REGS|regs[12][15]~feeder ( +// Equation(s): +// \REGS|regs[12][15]~feeder_combout = ( \rd[15]~456_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[15]~456_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[12][15]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[12][15]~feeder .extended_lut = "off"; +defparam \REGS|regs[12][15]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[12][15]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X30_Y12_N10 +dffeas \REGS|regs[12][15] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[12][15]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~26_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[12][15]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[12][15] .is_wysiwyg = "true"; +defparam \REGS|regs[12][15] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X30_Y11_N30 +cyclonev_lcell_comb \REGS|regs[4][15]~feeder ( +// Equation(s): +// \REGS|regs[4][15]~feeder_combout = ( \rd[15]~456_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[15]~456_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[4][15]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[4][15]~feeder .extended_lut = "off"; +defparam \REGS|regs[4][15]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[4][15]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X30_Y11_N31 +dffeas \REGS|regs[4][15] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[4][15]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~22_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[4][15]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[4][15] .is_wysiwyg = "true"; +defparam \REGS|regs[4][15] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X31_Y12_N21 +cyclonev_lcell_comb \REGS|Mux48~0 ( +// Equation(s): +// \REGS|Mux48~0_combout = ( \PC|pc [9] & ( \PC|pc[7]~DUPLICATE_q & ( \REGS|regs[4][15]~q ) ) ) # ( !\PC|pc [9] & ( \PC|pc[7]~DUPLICATE_q & ( \REGS|regs[4][15]~q ) ) ) # ( \PC|pc [9] & ( !\PC|pc[7]~DUPLICATE_q & ( \REGS|regs[4][15]~q ) ) ) # ( !\PC|pc +// [9] & ( !\PC|pc[7]~DUPLICATE_q & ( (!\PC|pc[8]~DUPLICATE_q & ((!\PC|pc[6]~DUPLICATE_q & (\REGS|regs[12][15]~q )) # (\PC|pc[6]~DUPLICATE_q & ((\REGS|regs[4][15]~q ))))) # (\PC|pc[8]~DUPLICATE_q & (((\REGS|regs[4][15]~q )))) ) ) ) + + .dataa(!\PC|pc[8]~DUPLICATE_q ), + .datab(!\REGS|regs[12][15]~q ), + .datac(!\REGS|regs[4][15]~q ), + .datad(!\PC|pc[6]~DUPLICATE_q ), + .datae(!\PC|pc [9]), + .dataf(!\PC|pc[7]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux48~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux48~0 .extended_lut = "off"; +defparam \REGS|Mux48~0 .lut_mask = 64'h270F0F0F0F0F0F0F; +defparam \REGS|Mux48~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X27_Y8_N46 +dffeas \REGS|regs[5][15]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[15]~456_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~30_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[5][15]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[5][15]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[5][15]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X30_Y12_N24 +cyclonev_lcell_comb \REGS|regs[13][15]~feeder ( +// Equation(s): +// \REGS|regs[13][15]~feeder_combout = ( \rd[15]~456_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[15]~456_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[13][15]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[13][15]~feeder .extended_lut = "off"; +defparam \REGS|regs[13][15]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[13][15]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X30_Y12_N25 +dffeas \REGS|regs[13][15]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[13][15]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~31_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[13][15]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[13][15]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[13][15]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X31_Y12_N12 +cyclonev_lcell_comb \REGS|Mux48~1 ( +// Equation(s): +// \REGS|Mux48~1_combout = ( \PC|pc[7]~DUPLICATE_q & ( \PC|pc [9] & ( \REGS|regs[5][15]~DUPLICATE_q ) ) ) # ( !\PC|pc[7]~DUPLICATE_q & ( \PC|pc [9] & ( \REGS|regs[5][15]~DUPLICATE_q ) ) ) # ( \PC|pc[7]~DUPLICATE_q & ( !\PC|pc [9] & ( +// \REGS|regs[5][15]~DUPLICATE_q ) ) ) # ( !\PC|pc[7]~DUPLICATE_q & ( !\PC|pc [9] & ( (!\PC|pc[6]~DUPLICATE_q & ((!\PC|pc [8] & ((\REGS|regs[13][15]~DUPLICATE_q ))) # (\PC|pc [8] & (\REGS|regs[5][15]~DUPLICATE_q )))) # (\PC|pc[6]~DUPLICATE_q & +// (\REGS|regs[5][15]~DUPLICATE_q )) ) ) ) + + .dataa(!\REGS|regs[5][15]~DUPLICATE_q ), + .datab(!\REGS|regs[13][15]~DUPLICATE_q ), + .datac(!\PC|pc[6]~DUPLICATE_q ), + .datad(!\PC|pc [8]), + .datae(!\PC|pc[7]~DUPLICATE_q ), + .dataf(!\PC|pc [9]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux48~1_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux48~1 .extended_lut = "off"; +defparam \REGS|Mux48~1 .lut_mask = 64'h3555555555555555; +defparam \REGS|Mux48~1 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X33_Y5_N48 +cyclonev_lcell_comb \REGS|regs[31][15]~feeder ( +// Equation(s): +// \REGS|regs[31][15]~feeder_combout = ( \rd[15]~456_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[15]~456_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[31][15]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[31][15]~feeder .extended_lut = "off"; +defparam \REGS|regs[31][15]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[31][15]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X33_Y5_N49 +dffeas \REGS|regs[31][15] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[31][15]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~19_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[31][15]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[31][15] .is_wysiwyg = "true"; +defparam \REGS|regs[31][15] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X30_Y8_N17 +dffeas \REGS|regs[23][15] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[15]~456_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~18_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[23][15]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[23][15] .is_wysiwyg = "true"; +defparam \REGS|regs[23][15] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X30_Y8_N12 +cyclonev_lcell_comb \REGS|Mux48~3 ( +// Equation(s): +// \REGS|Mux48~3_combout = ( \PC|pc[8]~DUPLICATE_q & ( \PC|pc[9]~DUPLICATE_q & ( \REGS|regs[23][15]~q ) ) ) # ( !\PC|pc[8]~DUPLICATE_q & ( \PC|pc[9]~DUPLICATE_q & ( \REGS|regs[23][15]~q ) ) ) # ( \PC|pc[8]~DUPLICATE_q & ( !\PC|pc[9]~DUPLICATE_q & ( +// \REGS|regs[23][15]~q ) ) ) # ( !\PC|pc[8]~DUPLICATE_q & ( !\PC|pc[9]~DUPLICATE_q & ( (!\PC|pc [6] & ((!\PC|pc[7]~DUPLICATE_q & (\REGS|regs[31][15]~q )) # (\PC|pc[7]~DUPLICATE_q & ((\REGS|regs[23][15]~q ))))) # (\PC|pc [6] & (((\REGS|regs[23][15]~q +// )))) ) ) ) + + .dataa(!\REGS|regs[31][15]~q ), + .datab(!\REGS|regs[23][15]~q ), + .datac(!\PC|pc [6]), + .datad(!\PC|pc[7]~DUPLICATE_q ), + .datae(!\PC|pc[8]~DUPLICATE_q ), + .dataf(!\PC|pc[9]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux48~3_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux48~3 .extended_lut = "off"; +defparam \REGS|Mux48~3 .lut_mask = 64'h5333333333333333; +defparam \REGS|Mux48~3 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X27_Y5_N46 +dffeas \REGS|regs[22][15] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[15]~456_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~9_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[22][15]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[22][15] .is_wysiwyg = "true"; +defparam \REGS|regs[22][15] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X30_Y8_N41 +dffeas \REGS|regs[30][15]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[15]~456_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~10_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[30][15]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[30][15]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[30][15]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X30_Y8_N36 +cyclonev_lcell_comb \REGS|Mux48~2 ( +// Equation(s): +// \REGS|Mux48~2_combout = ( \PC|pc[8]~DUPLICATE_q & ( \PC|pc[9]~DUPLICATE_q & ( \REGS|regs[22][15]~q ) ) ) # ( !\PC|pc[8]~DUPLICATE_q & ( \PC|pc[9]~DUPLICATE_q & ( \REGS|regs[22][15]~q ) ) ) # ( \PC|pc[8]~DUPLICATE_q & ( !\PC|pc[9]~DUPLICATE_q & ( +// \REGS|regs[22][15]~q ) ) ) # ( !\PC|pc[8]~DUPLICATE_q & ( !\PC|pc[9]~DUPLICATE_q & ( (!\PC|pc [6] & ((!\PC|pc[7]~DUPLICATE_q & ((\REGS|regs[30][15]~DUPLICATE_q ))) # (\PC|pc[7]~DUPLICATE_q & (\REGS|regs[22][15]~q )))) # (\PC|pc [6] & +// (\REGS|regs[22][15]~q )) ) ) ) + + .dataa(!\REGS|regs[22][15]~q ), + .datab(!\REGS|regs[30][15]~DUPLICATE_q ), + .datac(!\PC|pc [6]), + .datad(!\PC|pc[7]~DUPLICATE_q ), + .datae(!\PC|pc[8]~DUPLICATE_q ), + .dataf(!\PC|pc[9]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux48~2_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux48~2 .extended_lut = "off"; +defparam \REGS|Mux48~2 .lut_mask = 64'h3555555555555555; +defparam \REGS|Mux48~2 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X31_Y12_N42 +cyclonev_lcell_comb \REGS|Mux16~0 ( +// Equation(s): +// \REGS|Mux16~0_combout = ( \ROM|mem~16_combout & ( \REGS|Mux48~2_combout & ( (!\ROM|mem~9_combout & (\REGS|Mux48~1_combout )) # (\ROM|mem~9_combout & ((\REGS|Mux48~3_combout ))) ) ) ) # ( !\ROM|mem~16_combout & ( \REGS|Mux48~2_combout & ( +// (\ROM|mem~9_combout ) # (\REGS|Mux48~0_combout ) ) ) ) # ( \ROM|mem~16_combout & ( !\REGS|Mux48~2_combout & ( (!\ROM|mem~9_combout & (\REGS|Mux48~1_combout )) # (\ROM|mem~9_combout & ((\REGS|Mux48~3_combout ))) ) ) ) # ( !\ROM|mem~16_combout & ( +// !\REGS|Mux48~2_combout & ( (\REGS|Mux48~0_combout & !\ROM|mem~9_combout ) ) ) ) + + .dataa(!\REGS|Mux48~0_combout ), + .datab(!\REGS|Mux48~1_combout ), + .datac(!\ROM|mem~9_combout ), + .datad(!\REGS|Mux48~3_combout ), + .datae(!\ROM|mem~16_combout ), + .dataf(!\REGS|Mux48~2_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux16~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux16~0 .extended_lut = "off"; +defparam \REGS|Mux16~0 .lut_mask = 64'h5050303F5F5F303F; +defparam \REGS|Mux16~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X31_Y12_N51 +cyclonev_lcell_comb \REGS|Mux16~2 ( +// Equation(s): +// \REGS|Mux16~2_combout = ( \ROM|mem~17_combout & ( \REGS|Mux16~0_combout ) ) # ( !\ROM|mem~17_combout & ( \REGS|Mux16~0_combout & ( ((\REGS|Mux48~4_combout & \ROM|mem~9_combout )) # (\REGS|Mux16~1_combout ) ) ) ) # ( !\ROM|mem~17_combout & ( +// !\REGS|Mux16~0_combout & ( ((\REGS|Mux48~4_combout & \ROM|mem~9_combout )) # (\REGS|Mux16~1_combout ) ) ) ) + + .dataa(gnd), + .datab(!\REGS|Mux48~4_combout ), + .datac(!\REGS|Mux16~1_combout ), + .datad(!\ROM|mem~9_combout ), + .datae(!\ROM|mem~17_combout ), + .dataf(!\REGS|Mux16~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux16~2_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux16~2 .extended_lut = "off"; +defparam \REGS|Mux16~2 .lut_mask = 64'h0F3F00000F3FFFFF; +defparam \REGS|Mux16~2 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X28_Y5_N16 +dffeas \REGS|regs[1][15] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[15]~456_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~28_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[1][15]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[1][15] .is_wysiwyg = "true"; +defparam \REGS|regs[1][15] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X31_Y12_N27 +cyclonev_lcell_comb \REGS|Mux48~5 ( +// Equation(s): +// \REGS|Mux48~5_combout = ( \PC|pc [8] & ( \PC|pc[7]~DUPLICATE_q & ( \REGS|regs[1][15]~q ) ) ) # ( !\PC|pc [8] & ( \PC|pc[7]~DUPLICATE_q & ( \REGS|regs[1][15]~q ) ) ) # ( \PC|pc [8] & ( !\PC|pc[7]~DUPLICATE_q & ( \REGS|regs[1][15]~q ) ) ) # ( !\PC|pc +// [8] & ( !\PC|pc[7]~DUPLICATE_q & ( (!\PC|pc[6]~DUPLICATE_q & ((!\PC|pc [9] & ((\REGS|regs[9][15]~q ))) # (\PC|pc [9] & (\REGS|regs[1][15]~q )))) # (\PC|pc[6]~DUPLICATE_q & (((\REGS|regs[1][15]~q )))) ) ) ) + + .dataa(!\PC|pc[6]~DUPLICATE_q ), + .datab(!\PC|pc [9]), + .datac(!\REGS|regs[1][15]~q ), + .datad(!\REGS|regs[9][15]~q ), + .datae(!\PC|pc [8]), + .dataf(!\PC|pc[7]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux48~5_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux48~5 .extended_lut = "off"; +defparam \REGS|Mux48~5 .lut_mask = 64'h078F0F0F0F0F0F0F; +defparam \REGS|Mux48~5 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X31_Y12_N30 +cyclonev_lcell_comb \REGS|Mux48~6 ( +// Equation(s): +// \REGS|Mux48~6_combout = ( !\PC|pc [8] & ( !\PC|pc [9] & ( (!\PC|pc[6]~DUPLICATE_q & (!\PC|pc[7]~DUPLICATE_q & \REGS|regs[8][15]~q )) ) ) ) + + .dataa(!\PC|pc[6]~DUPLICATE_q ), + .datab(gnd), + .datac(!\PC|pc[7]~DUPLICATE_q ), + .datad(!\REGS|regs[8][15]~q ), + .datae(!\PC|pc [8]), + .dataf(!\PC|pc [9]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux48~6_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux48~6 .extended_lut = "off"; +defparam \REGS|Mux48~6 .lut_mask = 64'h00A0000000000000; +defparam \REGS|Mux48~6 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X30_Y9_N57 +cyclonev_lcell_comb \REGS|regs[2][15]~feeder ( +// Equation(s): +// \REGS|regs[2][15]~feeder_combout = ( \rd[15]~456_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[15]~456_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[2][15]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[2][15]~feeder .extended_lut = "off"; +defparam \REGS|regs[2][15]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[2][15]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X30_Y9_N59 +dffeas \REGS|regs[2][15] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[2][15]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~32_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[2][15]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[2][15] .is_wysiwyg = "true"; +defparam \REGS|regs[2][15] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X30_Y9_N47 +dffeas \REGS|regs[11][15] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[15]~456_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~37_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[11][15]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[11][15] .is_wysiwyg = "true"; +defparam \REGS|regs[11][15] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X30_Y9_N38 +dffeas \REGS|regs[10][15] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[15]~456_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~33_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[10][15]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[10][15] .is_wysiwyg = "true"; +defparam \REGS|regs[10][15] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X30_Y9_N36 +cyclonev_lcell_comb \rt_alu[15]~272 ( +// Equation(s): +// \rt_alu[15]~272_combout = ( \REGS|regs[10][15]~q & ( \ROM|mem~0_combout & ( (\REGS|regs[11][15]~q ) # (\ROM|mem~10_combout ) ) ) ) # ( !\REGS|regs[10][15]~q & ( \ROM|mem~0_combout & ( (!\ROM|mem~10_combout & \REGS|regs[11][15]~q ) ) ) ) # ( +// \REGS|regs[10][15]~q & ( !\ROM|mem~0_combout & ( \REGS|regs[2][15]~q ) ) ) # ( !\REGS|regs[10][15]~q & ( !\ROM|mem~0_combout & ( \REGS|regs[2][15]~q ) ) ) + + .dataa(gnd), + .datab(!\REGS|regs[2][15]~q ), + .datac(!\ROM|mem~10_combout ), + .datad(!\REGS|regs[11][15]~q ), + .datae(!\REGS|regs[10][15]~q ), + .dataf(!\ROM|mem~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[15]~272_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[15]~272 .extended_lut = "off"; +defparam \rt_alu[15]~272 .lut_mask = 64'h3333333300F00FFF; +defparam \rt_alu[15]~272 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X30_Y6_N59 +dffeas \REGS|regs[6][15] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[15]~456_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~34_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[6][15]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[6][15] .is_wysiwyg = "true"; +defparam \REGS|regs[6][15] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y10_N13 +dffeas \REGS|regs[14][15] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[15]~456_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~35_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[14][15]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[14][15] .is_wysiwyg = "true"; +defparam \REGS|regs[14][15] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X30_Y12_N18 +cyclonev_lcell_comb \REGS|regs[15][15]~feeder ( +// Equation(s): +// \REGS|regs[15][15]~feeder_combout = ( \rd[15]~456_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[15]~456_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[15][15]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[15][15]~feeder .extended_lut = "off"; +defparam \REGS|regs[15][15]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[15][15]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X30_Y12_N19 +dffeas \REGS|regs[15][15] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[15][15]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~39_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[15][15]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[15][15] .is_wysiwyg = "true"; +defparam \REGS|regs[15][15] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X31_Y12_N0 +cyclonev_lcell_comb \rt_alu[15]~273 ( +// Equation(s): +// \rt_alu[15]~273_combout = ( \ROM|mem~0_combout & ( \ROM|mem~10_combout & ( \REGS|regs[14][15]~q ) ) ) # ( !\ROM|mem~0_combout & ( \ROM|mem~10_combout & ( \REGS|regs[6][15]~q ) ) ) # ( \ROM|mem~0_combout & ( !\ROM|mem~10_combout & ( +// \REGS|regs[15][15]~q ) ) ) # ( !\ROM|mem~0_combout & ( !\ROM|mem~10_combout & ( \REGS|regs[6][15]~q ) ) ) + + .dataa(!\REGS|regs[6][15]~q ), + .datab(gnd), + .datac(!\REGS|regs[14][15]~q ), + .datad(!\REGS|regs[15][15]~q ), + .datae(!\ROM|mem~0_combout ), + .dataf(!\ROM|mem~10_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[15]~273_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[15]~273 .extended_lut = "off"; +defparam \rt_alu[15]~273 .lut_mask = 64'h555500FF55550F0F; +defparam \rt_alu[15]~273 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X31_Y12_N6 +cyclonev_lcell_comb \rt_alu[15]~274 ( +// Equation(s): +// \rt_alu[15]~274_combout = ( \rt_alu[15]~273_combout & ( \ROM|mem~13_combout & ( (\REGS|Mux48~1_combout ) # (\ROM|mem~12_combout ) ) ) ) # ( !\rt_alu[15]~273_combout & ( \ROM|mem~13_combout & ( (!\ROM|mem~12_combout & \REGS|Mux48~1_combout ) ) ) ) # +// ( \rt_alu[15]~273_combout & ( !\ROM|mem~13_combout & ( (\ROM|mem~12_combout ) # (\REGS|Mux48~0_combout ) ) ) ) # ( !\rt_alu[15]~273_combout & ( !\ROM|mem~13_combout & ( (\REGS|Mux48~0_combout & !\ROM|mem~12_combout ) ) ) ) + + .dataa(!\REGS|Mux48~0_combout ), + .datab(gnd), + .datac(!\ROM|mem~12_combout ), + .datad(!\REGS|Mux48~1_combout ), + .datae(!\rt_alu[15]~273_combout ), + .dataf(!\ROM|mem~13_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[15]~274_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[15]~274 .extended_lut = "off"; +defparam \rt_alu[15]~274 .lut_mask = 64'h50505F5F00F00FFF; +defparam \rt_alu[15]~274 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X31_Y12_N39 +cyclonev_lcell_comb \rt_alu[15]~275 ( +// Equation(s): +// \rt_alu[15]~275_combout = ( \rt_alu[17]~10_combout & ( \rt_alu[15]~274_combout & ( (!\rt_alu[17]~11_combout & (\REGS|Mux48~5_combout )) # (\rt_alu[17]~11_combout & ((\rt_alu[15]~272_combout ))) ) ) ) # ( !\rt_alu[17]~10_combout & ( +// \rt_alu[15]~274_combout & ( (\rt_alu[17]~11_combout ) # (\REGS|Mux48~6_combout ) ) ) ) # ( \rt_alu[17]~10_combout & ( !\rt_alu[15]~274_combout & ( (!\rt_alu[17]~11_combout & (\REGS|Mux48~5_combout )) # (\rt_alu[17]~11_combout & +// ((\rt_alu[15]~272_combout ))) ) ) ) # ( !\rt_alu[17]~10_combout & ( !\rt_alu[15]~274_combout & ( (\REGS|Mux48~6_combout & !\rt_alu[17]~11_combout ) ) ) ) + + .dataa(!\REGS|Mux48~5_combout ), + .datab(!\REGS|Mux48~6_combout ), + .datac(!\rt_alu[15]~272_combout ), + .datad(!\rt_alu[17]~11_combout ), + .datae(!\rt_alu[17]~10_combout ), + .dataf(!\rt_alu[15]~274_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[15]~275_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[15]~275 .extended_lut = "off"; +defparam \rt_alu[15]~275 .lut_mask = 64'h3300550F33FF550F; +defparam \rt_alu[15]~275 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X31_Y10_N18 +cyclonev_lcell_comb \rt_alu[15]~281 ( +// Equation(s): +// \rt_alu[15]~281_combout = ( \CONTROL_UNIT|CLASSIFIER|Equal0~1_combout & ( \rt_alu[15]~279_combout & ( !\rt_alu[15]~280_combout ) ) ) # ( !\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout & ( \rt_alu[15]~279_combout & ( (!\rt_alu[15]~280_combout & +// (!\ROM|mem~9_combout & !\rt_alu[15]~275_combout )) ) ) ) # ( \CONTROL_UNIT|CLASSIFIER|Equal0~1_combout & ( !\rt_alu[15]~279_combout & ( !\rt_alu[15]~280_combout ) ) ) # ( !\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout & ( !\rt_alu[15]~279_combout & ( +// (!\rt_alu[15]~280_combout & ((!\rt_alu[15]~275_combout ) # (\ROM|mem~9_combout ))) ) ) ) + + .dataa(!\rt_alu[15]~280_combout ), + .datab(!\ROM|mem~9_combout ), + .datac(!\rt_alu[15]~275_combout ), + .datad(gnd), + .datae(!\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout ), + .dataf(!\rt_alu[15]~279_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[15]~281_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[15]~281 .extended_lut = "off"; +defparam \rt_alu[15]~281 .lut_mask = 64'hA2A2AAAA8080AAAA; +defparam \rt_alu[15]~281 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y10_N57 +cyclonev_lcell_comb \ALU|Mux16~0 ( +// Equation(s): +// \ALU|Mux16~0_combout = ( \REGS|Mux16~2_combout & ( \rt_alu[15]~281_combout & ( ((\ALU|Mux15~0_combout & (\CONTROL_UNIT|ALU_FN [1] & !\CONTROL_UNIT|ALU_FN [0]))) # (\ALU|Mux29~1_combout ) ) ) ) # ( !\REGS|Mux16~2_combout & ( \rt_alu[15]~281_combout & +// ( (\ALU|Mux15~0_combout & !\CONTROL_UNIT|ALU_FN [1]) ) ) ) # ( \REGS|Mux16~2_combout & ( !\rt_alu[15]~281_combout & ( (\ALU|Mux15~0_combout & \CONTROL_UNIT|ALU_FN [1]) ) ) ) # ( !\REGS|Mux16~2_combout & ( !\rt_alu[15]~281_combout & ( +// ((\ALU|Mux15~0_combout & (\CONTROL_UNIT|ALU_FN [1] & !\CONTROL_UNIT|ALU_FN [0]))) # (\ALU|Mux29~1_combout ) ) ) ) + + .dataa(!\ALU|Mux15~0_combout ), + .datab(!\CONTROL_UNIT|ALU_FN [1]), + .datac(!\ALU|Mux29~1_combout ), + .datad(!\CONTROL_UNIT|ALU_FN [0]), + .datae(!\REGS|Mux16~2_combout ), + .dataf(!\rt_alu[15]~281_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\ALU|Mux16~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \ALU|Mux16~0 .extended_lut = "off"; +defparam \ALU|Mux16~0 .lut_mask = 64'h1F0F111144441F0F; +defparam \ALU|Mux16~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y10_N18 +cyclonev_lcell_comb \rt_alu[5]~32 ( +// Equation(s): +// \rt_alu[5]~32_combout = ( \ROM|mem~2_combout & ( \ROM|mem~1_combout & ( (!\PC|pc [8] & (\ROM|mem~0_combout & !\PC|pc [9])) ) ) ) # ( !\ROM|mem~2_combout & ( \ROM|mem~1_combout & ( (!\PC|pc [8] & (\ROM|mem~0_combout & !\PC|pc [9])) ) ) ) # ( +// \ROM|mem~2_combout & ( !\ROM|mem~1_combout & ( (!\PC|pc [8] & (\ROM|mem~0_combout & !\PC|pc [9])) ) ) ) + + .dataa(!\PC|pc [8]), + .datab(gnd), + .datac(!\ROM|mem~0_combout ), + .datad(!\PC|pc [9]), + .datae(!\ROM|mem~2_combout ), + .dataf(!\ROM|mem~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[5]~32_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[5]~32 .extended_lut = "off"; +defparam \rt_alu[5]~32 .lut_mask = 64'h00000A000A000A00; +defparam \rt_alu[5]~32 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X25_Y10_N6 +cyclonev_lcell_comb \REGS|regs[8][14]~feeder ( +// Equation(s): +// \REGS|regs[8][14]~feeder_combout = ( \rd[14]~454_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[14]~454_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[8][14]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[8][14]~feeder .extended_lut = "off"; +defparam \REGS|regs[8][14]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[8][14]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X25_Y10_N7 +dffeas \REGS|regs[8][14]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[8][14]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~24_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[8][14]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[8][14]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[8][14]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: FF_X30_Y7_N38 +dffeas \REGS|regs[9][14] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[14]~454_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~29_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[9][14]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[9][14] .is_wysiwyg = "true"; +defparam \REGS|regs[9][14] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y10_N57 +cyclonev_lcell_comb \REGS|Mux17~1 ( +// Equation(s): +// \REGS|Mux17~1_combout = ( \ROM|mem~15_combout & ( (\ROM|mem~0_combout & \REGS|regs[9][14]~q ) ) ) # ( !\ROM|mem~15_combout & ( (\ROM|mem~0_combout & \REGS|regs[8][14]~DUPLICATE_q ) ) ) + + .dataa(!\ROM|mem~0_combout ), + .datab(gnd), + .datac(!\REGS|regs[8][14]~DUPLICATE_q ), + .datad(!\REGS|regs[9][14]~q ), + .datae(gnd), + .dataf(!\ROM|mem~15_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux17~1_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux17~1 .extended_lut = "off"; +defparam \REGS|Mux17~1 .lut_mask = 64'h0505050500550055; +defparam \REGS|Mux17~1 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X33_Y12_N4 +dffeas \REGS|regs[26][14] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[14]~454_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~6_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[26][14]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[26][14] .is_wysiwyg = "true"; +defparam \REGS|regs[26][14] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X33_Y12_N53 +dffeas \REGS|regs[18][14] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[14]~454_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~5_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[18][14]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[18][14] .is_wysiwyg = "true"; +defparam \REGS|regs[18][14] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X33_Y12_N3 +cyclonev_lcell_comb \REGS|Mux49~0 ( +// Equation(s): +// \REGS|Mux49~0_combout = ( \REGS|regs[26][14]~q & ( \REGS|regs[18][14]~q ) ) # ( !\REGS|regs[26][14]~q & ( \REGS|regs[18][14]~q & ( (((\PC|pc [6]) # (\PC|pc [9])) # (\PC|pc [8])) # (\PC|pc [7]) ) ) ) # ( \REGS|regs[26][14]~q & ( !\REGS|regs[18][14]~q +// & ( (!\PC|pc [7] & (!\PC|pc [8] & (!\PC|pc [9] & !\PC|pc [6]))) ) ) ) + + .dataa(!\PC|pc [7]), + .datab(!\PC|pc [8]), + .datac(!\PC|pc [9]), + .datad(!\PC|pc [6]), + .datae(!\REGS|regs[26][14]~q ), + .dataf(!\REGS|regs[18][14]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux49~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux49~0 .extended_lut = "off"; +defparam \REGS|Mux49~0 .lut_mask = 64'h000080007FFFFFFF; +defparam \REGS|Mux49~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X32_Y12_N35 +dffeas \REGS|regs[31][14] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[14]~454_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~19_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[31][14]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[31][14] .is_wysiwyg = "true"; +defparam \REGS|regs[31][14] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X32_Y12_N37 +dffeas \REGS|regs[23][14] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[14]~454_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~18_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[23][14]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[23][14] .is_wysiwyg = "true"; +defparam \REGS|regs[23][14] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y12_N24 +cyclonev_lcell_comb \REGS|Mux49~2 ( +// Equation(s): +// \REGS|Mux49~2_combout = ( \PC|pc[7]~DUPLICATE_q & ( \PC|pc[8]~DUPLICATE_q & ( \REGS|regs[23][14]~q ) ) ) # ( !\PC|pc[7]~DUPLICATE_q & ( \PC|pc[8]~DUPLICATE_q & ( \REGS|regs[23][14]~q ) ) ) # ( \PC|pc[7]~DUPLICATE_q & ( !\PC|pc[8]~DUPLICATE_q & ( +// \REGS|regs[23][14]~q ) ) ) # ( !\PC|pc[7]~DUPLICATE_q & ( !\PC|pc[8]~DUPLICATE_q & ( (!\PC|pc[6]~DUPLICATE_q & ((!\PC|pc [9] & (\REGS|regs[31][14]~q )) # (\PC|pc [9] & ((\REGS|regs[23][14]~q ))))) # (\PC|pc[6]~DUPLICATE_q & (((\REGS|regs[23][14]~q +// )))) ) ) ) + + .dataa(!\REGS|regs[31][14]~q ), + .datab(!\REGS|regs[23][14]~q ), + .datac(!\PC|pc[6]~DUPLICATE_q ), + .datad(!\PC|pc [9]), + .datae(!\PC|pc[7]~DUPLICATE_q ), + .dataf(!\PC|pc[8]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux49~2_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux49~2 .extended_lut = "off"; +defparam \REGS|Mux49~2 .lut_mask = 64'h5333333333333333; +defparam \REGS|Mux49~2 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X27_Y8_N11 +dffeas \REGS|regs[13][14] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[14]~454_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~31_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[13][14]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[13][14] .is_wysiwyg = "true"; +defparam \REGS|regs[13][14] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y8_N4 +dffeas \REGS|regs[5][14] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[14]~454_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~30_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[5][14]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[5][14] .is_wysiwyg = "true"; +defparam \REGS|regs[5][14] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X27_Y8_N36 +cyclonev_lcell_comb \REGS|Mux49~6 ( +// Equation(s): +// \REGS|Mux49~6_combout = ( \PC|pc [6] & ( \PC|pc [9] & ( \REGS|regs[5][14]~q ) ) ) # ( !\PC|pc [6] & ( \PC|pc [9] & ( \REGS|regs[5][14]~q ) ) ) # ( \PC|pc [6] & ( !\PC|pc [9] & ( \REGS|regs[5][14]~q ) ) ) # ( !\PC|pc [6] & ( !\PC|pc [9] & ( +// (!\PC|pc[7]~DUPLICATE_q & ((!\PC|pc [8] & (\REGS|regs[13][14]~q )) # (\PC|pc [8] & ((\REGS|regs[5][14]~q ))))) # (\PC|pc[7]~DUPLICATE_q & (((\REGS|regs[5][14]~q )))) ) ) ) + + .dataa(!\PC|pc[7]~DUPLICATE_q ), + .datab(!\REGS|regs[13][14]~q ), + .datac(!\PC|pc [8]), + .datad(!\REGS|regs[5][14]~q ), + .datae(!\PC|pc [6]), + .dataf(!\PC|pc [9]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux49~6_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux49~6 .extended_lut = "off"; +defparam \REGS|Mux49~6 .lut_mask = 64'h207F00FF00FF00FF; +defparam \REGS|Mux49~6 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X35_Y14_N36 +cyclonev_lcell_comb \REGS|regs[30][14]~feeder ( +// Equation(s): +// \REGS|regs[30][14]~feeder_combout = ( \rd[14]~454_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[14]~454_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[30][14]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[30][14]~feeder .extended_lut = "off"; +defparam \REGS|regs[30][14]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[30][14]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X35_Y14_N38 +dffeas \REGS|regs[30][14] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[30][14]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~10_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[30][14]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[30][14] .is_wysiwyg = "true"; +defparam \REGS|regs[30][14] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X35_Y14_N20 +dffeas \REGS|regs[22][14] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[14]~454_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~9_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[22][14]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[22][14] .is_wysiwyg = "true"; +defparam \REGS|regs[22][14] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X35_Y14_N54 +cyclonev_lcell_comb \REGS|Mux49~3 ( +// Equation(s): +// \REGS|Mux49~3_combout = ( \PC|pc[8]~DUPLICATE_q & ( \PC|pc [9] & ( \REGS|regs[22][14]~q ) ) ) # ( !\PC|pc[8]~DUPLICATE_q & ( \PC|pc [9] & ( \REGS|regs[22][14]~q ) ) ) # ( \PC|pc[8]~DUPLICATE_q & ( !\PC|pc [9] & ( \REGS|regs[22][14]~q ) ) ) # ( +// !\PC|pc[8]~DUPLICATE_q & ( !\PC|pc [9] & ( (!\PC|pc [7] & ((!\PC|pc[6]~DUPLICATE_q & (\REGS|regs[30][14]~q )) # (\PC|pc[6]~DUPLICATE_q & ((\REGS|regs[22][14]~q ))))) # (\PC|pc [7] & (((\REGS|regs[22][14]~q )))) ) ) ) + + .dataa(!\REGS|regs[30][14]~q ), + .datab(!\PC|pc [7]), + .datac(!\REGS|regs[22][14]~q ), + .datad(!\PC|pc[6]~DUPLICATE_q ), + .datae(!\PC|pc[8]~DUPLICATE_q ), + .dataf(!\PC|pc [9]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux49~3_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux49~3 .extended_lut = "off"; +defparam \REGS|Mux49~3 .lut_mask = 64'h470F0F0F0F0F0F0F; +defparam \REGS|Mux49~3 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X33_Y6_N53 +dffeas \REGS|regs[12][14] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[14]~454_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~26_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[12][14]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[12][14] .is_wysiwyg = "true"; +defparam \REGS|regs[12][14] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y8_N52 +dffeas \REGS|regs[4][14]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[14]~454_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~22_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[4][14]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[4][14]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[4][14]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X33_Y6_N15 +cyclonev_lcell_comb \REGS|Mux49~7 ( +// Equation(s): +// \REGS|Mux49~7_combout = ( \PC|pc [9] & ( \REGS|regs[4][14]~DUPLICATE_q ) ) # ( !\PC|pc [9] & ( \REGS|regs[4][14]~DUPLICATE_q & ( (((\PC|pc [7]) # (\PC|pc[8]~DUPLICATE_q )) # (\PC|pc[6]~DUPLICATE_q )) # (\REGS|regs[12][14]~q ) ) ) ) # ( !\PC|pc [9] & ( +// !\REGS|regs[4][14]~DUPLICATE_q & ( (\REGS|regs[12][14]~q & (!\PC|pc[6]~DUPLICATE_q & (!\PC|pc[8]~DUPLICATE_q & !\PC|pc [7]))) ) ) ) + + .dataa(!\REGS|regs[12][14]~q ), + .datab(!\PC|pc[6]~DUPLICATE_q ), + .datac(!\PC|pc[8]~DUPLICATE_q ), + .datad(!\PC|pc [7]), + .datae(!\PC|pc [9]), + .dataf(!\REGS|regs[4][14]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux49~7_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux49~7 .extended_lut = "off"; +defparam \REGS|Mux49~7 .lut_mask = 64'h400000007FFFFFFF; +defparam \REGS|Mux49~7 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y10_N6 +cyclonev_lcell_comb \REGS|Mux17~0 ( +// Equation(s): +// \REGS|Mux17~0_combout = ( \REGS|Mux49~7_combout & ( \ROM|mem~16_combout & ( (!\ROM|mem~9_combout & ((\REGS|Mux49~6_combout ))) # (\ROM|mem~9_combout & (\REGS|Mux49~2_combout )) ) ) ) # ( !\REGS|Mux49~7_combout & ( \ROM|mem~16_combout & ( +// (!\ROM|mem~9_combout & ((\REGS|Mux49~6_combout ))) # (\ROM|mem~9_combout & (\REGS|Mux49~2_combout )) ) ) ) # ( \REGS|Mux49~7_combout & ( !\ROM|mem~16_combout & ( (!\ROM|mem~9_combout ) # (\REGS|Mux49~3_combout ) ) ) ) # ( !\REGS|Mux49~7_combout & ( +// !\ROM|mem~16_combout & ( (\ROM|mem~9_combout & \REGS|Mux49~3_combout ) ) ) ) + + .dataa(!\ROM|mem~9_combout ), + .datab(!\REGS|Mux49~2_combout ), + .datac(!\REGS|Mux49~6_combout ), + .datad(!\REGS|Mux49~3_combout ), + .datae(!\REGS|Mux49~7_combout ), + .dataf(!\ROM|mem~16_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux17~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux17~0 .extended_lut = "off"; +defparam \REGS|Mux17~0 .lut_mask = 64'h0055AAFF1B1B1B1B; +defparam \REGS|Mux17~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y10_N30 +cyclonev_lcell_comb \REGS|Mux17~2 ( +// Equation(s): +// \REGS|Mux17~2_combout = ( \REGS|Mux49~0_combout & ( \REGS|Mux17~0_combout & ( ((\ROM|mem~17_combout ) # (\ROM|mem~9_combout )) # (\REGS|Mux17~1_combout ) ) ) ) # ( !\REGS|Mux49~0_combout & ( \REGS|Mux17~0_combout & ( (\ROM|mem~17_combout ) # +// (\REGS|Mux17~1_combout ) ) ) ) # ( \REGS|Mux49~0_combout & ( !\REGS|Mux17~0_combout & ( (!\ROM|mem~17_combout & ((\ROM|mem~9_combout ) # (\REGS|Mux17~1_combout ))) ) ) ) # ( !\REGS|Mux49~0_combout & ( !\REGS|Mux17~0_combout & ( (\REGS|Mux17~1_combout +// & !\ROM|mem~17_combout ) ) ) ) + + .dataa(gnd), + .datab(!\REGS|Mux17~1_combout ), + .datac(!\ROM|mem~9_combout ), + .datad(!\ROM|mem~17_combout ), + .datae(!\REGS|Mux49~0_combout ), + .dataf(!\REGS|Mux17~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux17~2_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux17~2 .extended_lut = "off"; +defparam \REGS|Mux17~2 .lut_mask = 64'h33003F0033FF3FFF; +defparam \REGS|Mux17~2 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X35_Y6_N6 +cyclonev_lcell_comb \ROM|mem~23 ( +// Equation(s): +// \ROM|mem~23_combout = ( !\PC|pc [7] & ( \PC|pc [5] & ( (!\PC|pc[6]~DUPLICATE_q & (\PC|pc [4] & ((!\PC|pc[3]~DUPLICATE_q ) # (\PC|pc [2])))) ) ) ) # ( !\PC|pc [7] & ( !\PC|pc [5] & ( (!\PC|pc[6]~DUPLICATE_q & (((\PC|pc [4] & \PC|pc [2])))) # +// (\PC|pc[6]~DUPLICATE_q & (!\PC|pc[3]~DUPLICATE_q & (!\PC|pc [4]))) ) ) ) + + .dataa(!\PC|pc[6]~DUPLICATE_q ), + .datab(!\PC|pc[3]~DUPLICATE_q ), + .datac(!\PC|pc [4]), + .datad(!\PC|pc [2]), + .datae(!\PC|pc [7]), + .dataf(!\PC|pc [5]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\ROM|mem~23_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \ROM|mem~23 .extended_lut = "off"; +defparam \ROM|mem~23 .lut_mask = 64'h404A0000080A0000; +defparam \ROM|mem~23 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X36_Y12_N45 +cyclonev_lcell_comb \rt_alu[13]~246 ( +// Equation(s): +// \rt_alu[13]~246_combout = ( \ROM|mem~1_combout & ( \ROM|mem~0_combout & ( (!\PC|pc [9] & (!\PC|pc [8] & \ROM|mem~23_combout )) ) ) ) # ( !\ROM|mem~1_combout & ( \ROM|mem~0_combout & ( (!\PC|pc [9] & (!\PC|pc [8] & (\ROM|mem~2_combout & +// \ROM|mem~23_combout ))) ) ) ) + + .dataa(!\PC|pc [9]), + .datab(!\PC|pc [8]), + .datac(!\ROM|mem~2_combout ), + .datad(!\ROM|mem~23_combout ), + .datae(!\ROM|mem~1_combout ), + .dataf(!\ROM|mem~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[13]~246_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[13]~246 .extended_lut = "off"; +defparam \rt_alu[13]~246 .lut_mask = 64'h0000000000080088; +defparam \rt_alu[13]~246 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X33_Y12_N44 +dffeas \REGS|regs[18][13] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[13]~452_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~5_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[18][13]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[18][13] .is_wysiwyg = "true"; +defparam \REGS|regs[18][13] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X33_Y12_N29 +dffeas \REGS|regs[26][13] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[13]~452_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~6_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[26][13]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[26][13] .is_wysiwyg = "true"; +defparam \REGS|regs[26][13] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X33_Y12_N27 +cyclonev_lcell_comb \REGS|Mux50~4 ( +// Equation(s): +// \REGS|Mux50~4_combout = ( \REGS|regs[26][13]~q & ( \PC|pc [9] & ( \REGS|regs[18][13]~q ) ) ) # ( !\REGS|regs[26][13]~q & ( \PC|pc [9] & ( \REGS|regs[18][13]~q ) ) ) # ( \REGS|regs[26][13]~q & ( !\PC|pc [9] & ( ((!\PC|pc [6] & (!\PC|pc [8] & !\PC|pc +// [7]))) # (\REGS|regs[18][13]~q ) ) ) ) # ( !\REGS|regs[26][13]~q & ( !\PC|pc [9] & ( (\REGS|regs[18][13]~q & (((\PC|pc [7]) # (\PC|pc [8])) # (\PC|pc [6]))) ) ) ) + + .dataa(!\PC|pc [6]), + .datab(!\REGS|regs[18][13]~q ), + .datac(!\PC|pc [8]), + .datad(!\PC|pc [7]), + .datae(!\REGS|regs[26][13]~q ), + .dataf(!\PC|pc [9]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux50~4_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux50~4 .extended_lut = "off"; +defparam \REGS|Mux50~4 .lut_mask = 64'h1333B33333333333; +defparam \REGS|Mux50~4 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X31_Y9_N31 +dffeas \REGS|regs[9][13] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[13]~452_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~29_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[9][13]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[9][13] .is_wysiwyg = "true"; +defparam \REGS|regs[9][13] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X33_Y12_N48 +cyclonev_lcell_comb \REGS|Mux18~1 ( +// Equation(s): +// \REGS|Mux18~1_combout = ( \ROM|mem~15_combout & ( \REGS|regs[9][13]~q & ( \ROM|mem~0_combout ) ) ) # ( !\ROM|mem~15_combout & ( \REGS|regs[9][13]~q & ( (\REGS|regs[8][13]~q & \ROM|mem~0_combout ) ) ) ) # ( !\ROM|mem~15_combout & ( +// !\REGS|regs[9][13]~q & ( (\REGS|regs[8][13]~q & \ROM|mem~0_combout ) ) ) ) + + .dataa(gnd), + .datab(!\REGS|regs[8][13]~q ), + .datac(gnd), + .datad(!\ROM|mem~0_combout ), + .datae(!\ROM|mem~15_combout ), + .dataf(!\REGS|regs[9][13]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux18~1_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux18~1 .extended_lut = "off"; +defparam \REGS|Mux18~1 .lut_mask = 64'h00330000003300FF; +defparam \REGS|Mux18~1 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X30_Y12_N32 +dffeas \REGS|regs[13][13] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[13]~452_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~31_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[13][13]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[13][13] .is_wysiwyg = "true"; +defparam \REGS|regs[13][13] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y8_N16 +dffeas \REGS|regs[5][13] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[13]~452_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~30_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[5][13]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[5][13] .is_wysiwyg = "true"; +defparam \REGS|regs[5][13] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X30_Y12_N54 +cyclonev_lcell_comb \REGS|Mux50~1 ( +// Equation(s): +// \REGS|Mux50~1_combout = ( \PC|pc [8] & ( \PC|pc[7]~DUPLICATE_q & ( \REGS|regs[5][13]~q ) ) ) # ( !\PC|pc [8] & ( \PC|pc[7]~DUPLICATE_q & ( \REGS|regs[5][13]~q ) ) ) # ( \PC|pc [8] & ( !\PC|pc[7]~DUPLICATE_q & ( \REGS|regs[5][13]~q ) ) ) # ( !\PC|pc +// [8] & ( !\PC|pc[7]~DUPLICATE_q & ( (!\PC|pc [9] & ((!\PC|pc[6]~DUPLICATE_q & (\REGS|regs[13][13]~q )) # (\PC|pc[6]~DUPLICATE_q & ((\REGS|regs[5][13]~q ))))) # (\PC|pc [9] & (((\REGS|regs[5][13]~q )))) ) ) ) + + .dataa(!\PC|pc [9]), + .datab(!\REGS|regs[13][13]~q ), + .datac(!\PC|pc[6]~DUPLICATE_q ), + .datad(!\REGS|regs[5][13]~q ), + .datae(!\PC|pc [8]), + .dataf(!\PC|pc[7]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux50~1_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux50~1 .extended_lut = "off"; +defparam \REGS|Mux50~1 .lut_mask = 64'h207F00FF00FF00FF; +defparam \REGS|Mux50~1 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X31_Y4_N44 +dffeas \REGS|regs[22][13] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[13]~452_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~9_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[22][13]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[22][13] .is_wysiwyg = "true"; +defparam \REGS|regs[22][13] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X30_Y8_N8 +dffeas \REGS|regs[30][13] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[13]~452_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~10_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[30][13]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[30][13] .is_wysiwyg = "true"; +defparam \REGS|regs[30][13] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X30_Y8_N9 +cyclonev_lcell_comb \REGS|Mux50~2 ( +// Equation(s): +// \REGS|Mux50~2_combout = ( \PC|pc[8]~DUPLICATE_q & ( \PC|pc[9]~DUPLICATE_q & ( \REGS|regs[22][13]~q ) ) ) # ( !\PC|pc[8]~DUPLICATE_q & ( \PC|pc[9]~DUPLICATE_q & ( \REGS|regs[22][13]~q ) ) ) # ( \PC|pc[8]~DUPLICATE_q & ( !\PC|pc[9]~DUPLICATE_q & ( +// \REGS|regs[22][13]~q ) ) ) # ( !\PC|pc[8]~DUPLICATE_q & ( !\PC|pc[9]~DUPLICATE_q & ( (!\PC|pc[7]~DUPLICATE_q & ((!\PC|pc [6] & ((\REGS|regs[30][13]~q ))) # (\PC|pc [6] & (\REGS|regs[22][13]~q )))) # (\PC|pc[7]~DUPLICATE_q & (\REGS|regs[22][13]~q )) ) +// ) ) + + .dataa(!\REGS|regs[22][13]~q ), + .datab(!\PC|pc[7]~DUPLICATE_q ), + .datac(!\REGS|regs[30][13]~q ), + .datad(!\PC|pc [6]), + .datae(!\PC|pc[8]~DUPLICATE_q ), + .dataf(!\PC|pc[9]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux50~2_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux50~2 .extended_lut = "off"; +defparam \REGS|Mux50~2 .lut_mask = 64'h1D55555555555555; +defparam \REGS|Mux50~2 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X30_Y12_N50 +dffeas \REGS|regs[12][13] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[13]~452_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~26_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[12][13]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[12][13] .is_wysiwyg = "true"; +defparam \REGS|regs[12][13] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X30_Y11_N54 +cyclonev_lcell_comb \REGS|regs[4][13]~feeder ( +// Equation(s): +// \REGS|regs[4][13]~feeder_combout = ( \rd[13]~452_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[13]~452_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[4][13]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[4][13]~feeder .extended_lut = "off"; +defparam \REGS|regs[4][13]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[4][13]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X30_Y11_N55 +dffeas \REGS|regs[4][13] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[4][13]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~22_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[4][13]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[4][13] .is_wysiwyg = "true"; +defparam \REGS|regs[4][13] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X30_Y12_N12 +cyclonev_lcell_comb \REGS|Mux50~0 ( +// Equation(s): +// \REGS|Mux50~0_combout = ( \PC|pc [9] & ( \PC|pc[7]~DUPLICATE_q & ( \REGS|regs[4][13]~q ) ) ) # ( !\PC|pc [9] & ( \PC|pc[7]~DUPLICATE_q & ( \REGS|regs[4][13]~q ) ) ) # ( \PC|pc [9] & ( !\PC|pc[7]~DUPLICATE_q & ( \REGS|regs[4][13]~q ) ) ) # ( !\PC|pc +// [9] & ( !\PC|pc[7]~DUPLICATE_q & ( (!\PC|pc[6]~DUPLICATE_q & ((!\PC|pc [8] & (\REGS|regs[12][13]~q )) # (\PC|pc [8] & ((\REGS|regs[4][13]~q ))))) # (\PC|pc[6]~DUPLICATE_q & (((\REGS|regs[4][13]~q )))) ) ) ) + + .dataa(!\REGS|regs[12][13]~q ), + .datab(!\REGS|regs[4][13]~q ), + .datac(!\PC|pc[6]~DUPLICATE_q ), + .datad(!\PC|pc [8]), + .datae(!\PC|pc [9]), + .dataf(!\PC|pc[7]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux50~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux50~0 .extended_lut = "off"; +defparam \REGS|Mux50~0 .lut_mask = 64'h5333333333333333; +defparam \REGS|Mux50~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X30_Y8_N20 +dffeas \REGS|regs[23][13] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[13]~452_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~18_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[23][13]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[23][13] .is_wysiwyg = "true"; +defparam \REGS|regs[23][13] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y12_N6 +cyclonev_lcell_comb \REGS|regs[31][13]~feeder ( +// Equation(s): +// \REGS|regs[31][13]~feeder_combout = ( \rd[13]~452_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[13]~452_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[31][13]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[31][13]~feeder .extended_lut = "off"; +defparam \REGS|regs[31][13]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[31][13]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X32_Y12_N8 +dffeas \REGS|regs[31][13] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[31][13]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~19_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[31][13]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[31][13] .is_wysiwyg = "true"; +defparam \REGS|regs[31][13] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X30_Y8_N21 +cyclonev_lcell_comb \REGS|Mux50~3 ( +// Equation(s): +// \REGS|Mux50~3_combout = ( \PC|pc[8]~DUPLICATE_q & ( \REGS|regs[31][13]~q & ( \REGS|regs[23][13]~q ) ) ) # ( !\PC|pc[8]~DUPLICATE_q & ( \REGS|regs[31][13]~q & ( ((!\PC|pc[7]~DUPLICATE_q & (!\PC|pc[9]~DUPLICATE_q & !\PC|pc [6]))) # +// (\REGS|regs[23][13]~q ) ) ) ) # ( \PC|pc[8]~DUPLICATE_q & ( !\REGS|regs[31][13]~q & ( \REGS|regs[23][13]~q ) ) ) # ( !\PC|pc[8]~DUPLICATE_q & ( !\REGS|regs[31][13]~q & ( (\REGS|regs[23][13]~q & (((\PC|pc [6]) # (\PC|pc[9]~DUPLICATE_q )) # +// (\PC|pc[7]~DUPLICATE_q ))) ) ) ) + + .dataa(!\REGS|regs[23][13]~q ), + .datab(!\PC|pc[7]~DUPLICATE_q ), + .datac(!\PC|pc[9]~DUPLICATE_q ), + .datad(!\PC|pc [6]), + .datae(!\PC|pc[8]~DUPLICATE_q ), + .dataf(!\REGS|regs[31][13]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux50~3_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux50~3 .extended_lut = "off"; +defparam \REGS|Mux50~3 .lut_mask = 64'h15555555D5555555; +defparam \REGS|Mux50~3 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X33_Y12_N54 +cyclonev_lcell_comb \REGS|Mux18~0 ( +// Equation(s): +// \REGS|Mux18~0_combout = ( \ROM|mem~16_combout & ( \REGS|Mux50~3_combout & ( (\REGS|Mux50~1_combout ) # (\ROM|mem~9_combout ) ) ) ) # ( !\ROM|mem~16_combout & ( \REGS|Mux50~3_combout & ( (!\ROM|mem~9_combout & ((\REGS|Mux50~0_combout ))) # +// (\ROM|mem~9_combout & (\REGS|Mux50~2_combout )) ) ) ) # ( \ROM|mem~16_combout & ( !\REGS|Mux50~3_combout & ( (!\ROM|mem~9_combout & \REGS|Mux50~1_combout ) ) ) ) # ( !\ROM|mem~16_combout & ( !\REGS|Mux50~3_combout & ( (!\ROM|mem~9_combout & +// ((\REGS|Mux50~0_combout ))) # (\ROM|mem~9_combout & (\REGS|Mux50~2_combout )) ) ) ) + + .dataa(!\ROM|mem~9_combout ), + .datab(!\REGS|Mux50~1_combout ), + .datac(!\REGS|Mux50~2_combout ), + .datad(!\REGS|Mux50~0_combout ), + .datae(!\ROM|mem~16_combout ), + .dataf(!\REGS|Mux50~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux18~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux18~0 .extended_lut = "off"; +defparam \REGS|Mux18~0 .lut_mask = 64'h05AF222205AF7777; +defparam \REGS|Mux18~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X33_Y12_N45 +cyclonev_lcell_comb \REGS|Mux18~2 ( +// Equation(s): +// \REGS|Mux18~2_combout = ( \REGS|Mux18~0_combout & ( \ROM|mem~17_combout ) ) # ( \REGS|Mux18~0_combout & ( !\ROM|mem~17_combout & ( ((\ROM|mem~9_combout & \REGS|Mux50~4_combout )) # (\REGS|Mux18~1_combout ) ) ) ) # ( !\REGS|Mux18~0_combout & ( +// !\ROM|mem~17_combout & ( ((\ROM|mem~9_combout & \REGS|Mux50~4_combout )) # (\REGS|Mux18~1_combout ) ) ) ) + + .dataa(!\ROM|mem~9_combout ), + .datab(gnd), + .datac(!\REGS|Mux50~4_combout ), + .datad(!\REGS|Mux18~1_combout ), + .datae(!\REGS|Mux18~0_combout ), + .dataf(!\ROM|mem~17_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux18~2_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux18~2 .extended_lut = "off"; +defparam \REGS|Mux18~2 .lut_mask = 64'h05FF05FF0000FFFF; +defparam \REGS|Mux18~2 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X30_Y10_N2 +dffeas \REGS|regs[27][13] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[13]~452_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~15_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[27][13]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[27][13] .is_wysiwyg = "true"; +defparam \REGS|regs[27][13] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y13_N58 +dffeas \REGS|regs[19][13] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[13]~452_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~14_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[19][13]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[19][13] .is_wysiwyg = "true"; +defparam \REGS|regs[19][13] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X30_Y10_N54 +cyclonev_lcell_comb \REGS|Mux50~7 ( +// Equation(s): +// \REGS|Mux50~7_combout = ( \PC|pc [9] & ( \REGS|regs[19][13]~q ) ) # ( !\PC|pc [9] & ( \REGS|regs[19][13]~q & ( (((\PC|pc [8]) # (\PC|pc [7])) # (\PC|pc[6]~DUPLICATE_q )) # (\REGS|regs[27][13]~q ) ) ) ) # ( !\PC|pc [9] & ( !\REGS|regs[19][13]~q & ( +// (\REGS|regs[27][13]~q & (!\PC|pc[6]~DUPLICATE_q & (!\PC|pc [7] & !\PC|pc [8]))) ) ) ) + + .dataa(!\REGS|regs[27][13]~q ), + .datab(!\PC|pc[6]~DUPLICATE_q ), + .datac(!\PC|pc [7]), + .datad(!\PC|pc [8]), + .datae(!\PC|pc [9]), + .dataf(!\REGS|regs[19][13]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux50~7_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux50~7 .extended_lut = "off"; +defparam \REGS|Mux50~7 .lut_mask = 64'h400000007FFFFFFF; +defparam \REGS|Mux50~7 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X35_Y12_N44 +dffeas \REGS|regs[17][13] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[13]~452_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~11_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[17][13]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[17][13] .is_wysiwyg = "true"; +defparam \REGS|regs[17][13] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X28_Y9_N52 +dffeas \REGS|regs[16][13] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[13]~452_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~2_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[16][13]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[16][13] .is_wysiwyg = "true"; +defparam \REGS|regs[16][13] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X35_Y12_N48 +cyclonev_lcell_comb \rt_alu[13]~249 ( +// Equation(s): +// \rt_alu[13]~249_combout = ( \ROM|mem~10_combout & ( \REGS|regs[16][13]~q ) ) # ( !\ROM|mem~10_combout & ( \REGS|regs[16][13]~q & ( (!\ROM|mem~0_combout ) # (\REGS|regs[17][13]~q ) ) ) ) # ( !\ROM|mem~10_combout & ( !\REGS|regs[16][13]~q & ( +// (\ROM|mem~0_combout & \REGS|regs[17][13]~q ) ) ) ) + + .dataa(gnd), + .datab(gnd), + .datac(!\ROM|mem~0_combout ), + .datad(!\REGS|regs[17][13]~q ), + .datae(!\ROM|mem~10_combout ), + .dataf(!\REGS|regs[16][13]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[13]~249_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[13]~249 .extended_lut = "off"; +defparam \rt_alu[13]~249 .lut_mask = 64'h000F0000F0FFFFFF; +defparam \rt_alu[13]~249 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X31_Y7_N28 +dffeas \REGS|regs[28][13] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[13]~452_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~8_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[28][13]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[28][13] .is_wysiwyg = "true"; +defparam \REGS|regs[28][13] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X31_Y7_N53 +dffeas \REGS|regs[20][13] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[13]~452_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~7_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[20][13]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[20][13] .is_wysiwyg = "true"; +defparam \REGS|regs[20][13] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X30_Y8_N26 +dffeas \REGS|regs[29][13] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[13]~452_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~17_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[29][13]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[29][13] .is_wysiwyg = "true"; +defparam \REGS|regs[29][13] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X30_Y8_N27 +cyclonev_lcell_comb \rt_alu[13]~247 ( +// Equation(s): +// \rt_alu[13]~247_combout = ( \ROM|mem~0_combout & ( \ROM|mem~10_combout & ( \REGS|regs[28][13]~q ) ) ) # ( !\ROM|mem~0_combout & ( \ROM|mem~10_combout & ( \REGS|regs[20][13]~q ) ) ) # ( \ROM|mem~0_combout & ( !\ROM|mem~10_combout & ( +// \REGS|regs[29][13]~q ) ) ) # ( !\ROM|mem~0_combout & ( !\ROM|mem~10_combout & ( \REGS|regs[20][13]~q ) ) ) + + .dataa(!\REGS|regs[28][13]~q ), + .datab(!\REGS|regs[20][13]~q ), + .datac(gnd), + .datad(!\REGS|regs[29][13]~q ), + .datae(!\ROM|mem~0_combout ), + .dataf(!\ROM|mem~10_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[13]~247_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[13]~247 .extended_lut = "off"; +defparam \rt_alu[13]~247 .lut_mask = 64'h333300FF33335555; +defparam \rt_alu[13]~247 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X30_Y8_N30 +cyclonev_lcell_comb \rt_alu[13]~248 ( +// Equation(s): +// \rt_alu[13]~248_combout = ( \REGS|Mux50~3_combout & ( \ROM|mem~12_combout & ( (\REGS|Mux50~2_combout ) # (\ROM|mem~13_combout ) ) ) ) # ( !\REGS|Mux50~3_combout & ( \ROM|mem~12_combout & ( (!\ROM|mem~13_combout & \REGS|Mux50~2_combout ) ) ) ) # ( +// \REGS|Mux50~3_combout & ( !\ROM|mem~12_combout & ( \rt_alu[13]~247_combout ) ) ) # ( !\REGS|Mux50~3_combout & ( !\ROM|mem~12_combout & ( \rt_alu[13]~247_combout ) ) ) + + .dataa(!\rt_alu[13]~247_combout ), + .datab(gnd), + .datac(!\ROM|mem~13_combout ), + .datad(!\REGS|Mux50~2_combout ), + .datae(!\REGS|Mux50~3_combout ), + .dataf(!\ROM|mem~12_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[13]~248_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[13]~248 .extended_lut = "off"; +defparam \rt_alu[13]~248 .lut_mask = 64'h5555555500F00FFF; +defparam \rt_alu[13]~248 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X36_Y12_N6 +cyclonev_lcell_comb \rt_alu[13]~250 ( +// Equation(s): +// \rt_alu[13]~250_combout = ( \rt_alu[17]~4_combout & ( \rt_alu[13]~248_combout & ( (!\rt_alu[17]~5_combout ) # (\REGS|Mux50~4_combout ) ) ) ) # ( !\rt_alu[17]~4_combout & ( \rt_alu[13]~248_combout & ( (!\rt_alu[17]~5_combout & +// ((\rt_alu[13]~249_combout ))) # (\rt_alu[17]~5_combout & (\REGS|Mux50~7_combout )) ) ) ) # ( \rt_alu[17]~4_combout & ( !\rt_alu[13]~248_combout & ( (\rt_alu[17]~5_combout & \REGS|Mux50~4_combout ) ) ) ) # ( !\rt_alu[17]~4_combout & ( +// !\rt_alu[13]~248_combout & ( (!\rt_alu[17]~5_combout & ((\rt_alu[13]~249_combout ))) # (\rt_alu[17]~5_combout & (\REGS|Mux50~7_combout )) ) ) ) + + .dataa(!\rt_alu[17]~5_combout ), + .datab(!\REGS|Mux50~7_combout ), + .datac(!\REGS|Mux50~4_combout ), + .datad(!\rt_alu[13]~249_combout ), + .datae(!\rt_alu[17]~4_combout ), + .dataf(!\rt_alu[13]~248_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[13]~250_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[13]~250 .extended_lut = "off"; +defparam \rt_alu[13]~250 .lut_mask = 64'h11BB050511BBAFAF; +defparam \rt_alu[13]~250 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X36_Y12_N36 +cyclonev_lcell_comb \rt_alu[13]~251 ( +// Equation(s): +// \rt_alu[13]~251_combout = ( \rt_alu[13]~250_combout & ( (!\rt_alu[13]~246_combout & (((!\ROM|mem~9_combout & !\rt_alu[13]~245_combout )) # (\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout ))) ) ) # ( !\rt_alu[13]~250_combout & ( (!\rt_alu[13]~246_combout +// & (((!\rt_alu[13]~245_combout ) # (\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout )) # (\ROM|mem~9_combout ))) ) ) + + .dataa(!\ROM|mem~9_combout ), + .datab(!\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout ), + .datac(!\rt_alu[13]~245_combout ), + .datad(!\rt_alu[13]~246_combout ), + .datae(gnd), + .dataf(!\rt_alu[13]~250_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[13]~251_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[13]~251 .extended_lut = "off"; +defparam \rt_alu[13]~251 .lut_mask = 64'hF700F700B300B300; +defparam \rt_alu[13]~251 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X35_Y12_N3 +cyclonev_lcell_comb \ALU|Mux18~0 ( +// Equation(s): +// \ALU|Mux18~0_combout = ( \rt_alu[13]~251_combout & ( \ALU|Mux15~0_combout & ( (!\REGS|Mux18~2_combout & (((!\CONTROL_UNIT|ALU_FN [1])))) # (\REGS|Mux18~2_combout & (((\CONTROL_UNIT|ALU_FN [1] & !\CONTROL_UNIT|ALU_FN [0])) # (\ALU|Mux29~1_combout ))) +// ) ) ) # ( !\rt_alu[13]~251_combout & ( \ALU|Mux15~0_combout & ( (!\REGS|Mux18~2_combout & (((\CONTROL_UNIT|ALU_FN [1] & !\CONTROL_UNIT|ALU_FN [0])) # (\ALU|Mux29~1_combout ))) # (\REGS|Mux18~2_combout & (((\CONTROL_UNIT|ALU_FN [1])))) ) ) ) # ( +// \rt_alu[13]~251_combout & ( !\ALU|Mux15~0_combout & ( (\ALU|Mux29~1_combout & \REGS|Mux18~2_combout ) ) ) ) # ( !\rt_alu[13]~251_combout & ( !\ALU|Mux15~0_combout & ( (\ALU|Mux29~1_combout & !\REGS|Mux18~2_combout ) ) ) ) + + .dataa(!\ALU|Mux29~1_combout ), + .datab(!\CONTROL_UNIT|ALU_FN [1]), + .datac(!\CONTROL_UNIT|ALU_FN [0]), + .datad(!\REGS|Mux18~2_combout ), + .datae(!\rt_alu[13]~251_combout ), + .dataf(!\ALU|Mux15~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\ALU|Mux18~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \ALU|Mux18~0 .extended_lut = "off"; +defparam \ALU|Mux18~0 .lut_mask = 64'h550000557533CC75; +defparam \ALU|Mux18~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X33_Y12_N2 +dffeas \REGS|regs[26][12] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[12]~450_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~6_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[26][12]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[26][12] .is_wysiwyg = "true"; +defparam \REGS|regs[26][12] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X33_Y12_N17 +dffeas \REGS|regs[18][12] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[12]~450_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~5_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[18][12]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[18][12] .is_wysiwyg = "true"; +defparam \REGS|regs[18][12] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X33_Y12_N0 +cyclonev_lcell_comb \REGS|Mux51~4 ( +// Equation(s): +// \REGS|Mux51~4_combout = ( \REGS|regs[26][12]~q & ( \REGS|regs[18][12]~q ) ) # ( !\REGS|regs[26][12]~q & ( \REGS|regs[18][12]~q & ( (((\PC|pc [9]) # (\PC|pc [6])) # (\PC|pc [8])) # (\PC|pc [7]) ) ) ) # ( \REGS|regs[26][12]~q & ( !\REGS|regs[18][12]~q +// & ( (!\PC|pc [7] & (!\PC|pc [8] & (!\PC|pc [6] & !\PC|pc [9]))) ) ) ) + + .dataa(!\PC|pc [7]), + .datab(!\PC|pc [8]), + .datac(!\PC|pc [6]), + .datad(!\PC|pc [9]), + .datae(!\REGS|regs[26][12]~q ), + .dataf(!\REGS|regs[18][12]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux51~4_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux51~4 .extended_lut = "off"; +defparam \REGS|Mux51~4 .lut_mask = 64'h000080007FFFFFFF; +defparam \REGS|Mux51~4 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X33_Y8_N23 +dffeas \REGS|regs[12][12] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[12]~450_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~26_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[12][12]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[12][12] .is_wysiwyg = "true"; +defparam \REGS|regs[12][12] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X33_Y8_N11 +dffeas \REGS|regs[4][12] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[12]~450_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~22_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[4][12]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[4][12] .is_wysiwyg = "true"; +defparam \REGS|regs[4][12] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X33_Y8_N21 +cyclonev_lcell_comb \REGS|Mux51~3 ( +// Equation(s): +// \REGS|Mux51~3_combout = ( \REGS|regs[12][12]~q & ( \REGS|regs[4][12]~q ) ) # ( !\REGS|regs[12][12]~q & ( \REGS|regs[4][12]~q & ( (((\PC|pc[9]~DUPLICATE_q ) # (\PC|pc [6])) # (\PC|pc[7]~DUPLICATE_q )) # (\PC|pc[8]~DUPLICATE_q ) ) ) ) # ( +// \REGS|regs[12][12]~q & ( !\REGS|regs[4][12]~q & ( (!\PC|pc[8]~DUPLICATE_q & (!\PC|pc[7]~DUPLICATE_q & (!\PC|pc [6] & !\PC|pc[9]~DUPLICATE_q ))) ) ) ) + + .dataa(!\PC|pc[8]~DUPLICATE_q ), + .datab(!\PC|pc[7]~DUPLICATE_q ), + .datac(!\PC|pc [6]), + .datad(!\PC|pc[9]~DUPLICATE_q ), + .datae(!\REGS|regs[12][12]~q ), + .dataf(!\REGS|regs[4][12]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux51~3_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux51~3 .extended_lut = "off"; +defparam \REGS|Mux51~3 .lut_mask = 64'h000080007FFFFFFF; +defparam \REGS|Mux51~3 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X32_Y12_N22 +dffeas \REGS|regs[13][12] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[12]~450_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~31_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[13][12]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[13][12] .is_wysiwyg = "true"; +defparam \REGS|regs[13][12] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X32_Y9_N46 +dffeas \REGS|regs[5][12]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[12]~450_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~30_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[5][12]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[5][12]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[5][12]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X33_Y12_N30 +cyclonev_lcell_comb \REGS|Mux51~2 ( +// Equation(s): +// \REGS|Mux51~2_combout = ( \PC|pc [7] & ( \REGS|regs[5][12]~DUPLICATE_q ) ) # ( !\PC|pc [7] & ( \REGS|regs[5][12]~DUPLICATE_q & ( (((\PC|pc [9]) # (\PC|pc [6])) # (\PC|pc [8])) # (\REGS|regs[13][12]~q ) ) ) ) # ( !\PC|pc [7] & ( +// !\REGS|regs[5][12]~DUPLICATE_q & ( (\REGS|regs[13][12]~q & (!\PC|pc [8] & (!\PC|pc [6] & !\PC|pc [9]))) ) ) ) + + .dataa(!\REGS|regs[13][12]~q ), + .datab(!\PC|pc [8]), + .datac(!\PC|pc [6]), + .datad(!\PC|pc [9]), + .datae(!\PC|pc [7]), + .dataf(!\REGS|regs[5][12]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux51~2_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux51~2 .extended_lut = "off"; +defparam \REGS|Mux51~2 .lut_mask = 64'h400000007FFFFFFF; +defparam \REGS|Mux51~2 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y12_N48 +cyclonev_lcell_comb \REGS|regs[31][12]~feeder ( +// Equation(s): +// \REGS|regs[31][12]~feeder_combout = ( \rd[12]~450_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[12]~450_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[31][12]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[31][12]~feeder .extended_lut = "off"; +defparam \REGS|regs[31][12]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[31][12]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X32_Y12_N50 +dffeas \REGS|regs[31][12] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[31][12]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~19_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[31][12]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[31][12] .is_wysiwyg = "true"; +defparam \REGS|regs[31][12] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X32_Y12_N17 +dffeas \REGS|regs[23][12] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[12]~450_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~18_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[23][12]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[23][12] .is_wysiwyg = "true"; +defparam \REGS|regs[23][12] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y12_N3 +cyclonev_lcell_comb \REGS|Mux51~6 ( +// Equation(s): +// \REGS|Mux51~6_combout = ( \PC|pc[7]~DUPLICATE_q & ( \PC|pc[8]~DUPLICATE_q & ( \REGS|regs[23][12]~q ) ) ) # ( !\PC|pc[7]~DUPLICATE_q & ( \PC|pc[8]~DUPLICATE_q & ( \REGS|regs[23][12]~q ) ) ) # ( \PC|pc[7]~DUPLICATE_q & ( !\PC|pc[8]~DUPLICATE_q & ( +// \REGS|regs[23][12]~q ) ) ) # ( !\PC|pc[7]~DUPLICATE_q & ( !\PC|pc[8]~DUPLICATE_q & ( (!\PC|pc [9] & ((!\PC|pc[6]~DUPLICATE_q & (\REGS|regs[31][12]~q )) # (\PC|pc[6]~DUPLICATE_q & ((\REGS|regs[23][12]~q ))))) # (\PC|pc [9] & (((\REGS|regs[23][12]~q +// )))) ) ) ) + + .dataa(!\REGS|regs[31][12]~q ), + .datab(!\PC|pc [9]), + .datac(!\REGS|regs[23][12]~q ), + .datad(!\PC|pc[6]~DUPLICATE_q ), + .datae(!\PC|pc[7]~DUPLICATE_q ), + .dataf(!\PC|pc[8]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux51~6_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux51~6 .extended_lut = "off"; +defparam \REGS|Mux51~6 .lut_mask = 64'h470F0F0F0F0F0F0F; +defparam \REGS|Mux51~6 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X33_Y6_N24 +cyclonev_lcell_comb \REGS|regs[30][12]~feeder ( +// Equation(s): +// \REGS|regs[30][12]~feeder_combout = ( \rd[12]~450_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[12]~450_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[30][12]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[30][12]~feeder .extended_lut = "off"; +defparam \REGS|regs[30][12]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[30][12]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X33_Y6_N26 +dffeas \REGS|regs[30][12] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[30][12]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~10_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[30][12]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[30][12] .is_wysiwyg = "true"; +defparam \REGS|regs[30][12] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X33_Y13_N55 +dffeas \REGS|regs[22][12] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[12]~450_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~9_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[22][12]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[22][12] .is_wysiwyg = "true"; +defparam \REGS|regs[22][12] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X33_Y6_N42 +cyclonev_lcell_comb \REGS|Mux51~7 ( +// Equation(s): +// \REGS|Mux51~7_combout = ( \PC|pc [7] & ( \REGS|regs[22][12]~q ) ) # ( !\PC|pc [7] & ( \REGS|regs[22][12]~q & ( (((\PC|pc[6]~DUPLICATE_q ) # (\PC|pc [9])) # (\PC|pc[8]~DUPLICATE_q )) # (\REGS|regs[30][12]~q ) ) ) ) # ( !\PC|pc [7] & ( +// !\REGS|regs[22][12]~q & ( (\REGS|regs[30][12]~q & (!\PC|pc[8]~DUPLICATE_q & (!\PC|pc [9] & !\PC|pc[6]~DUPLICATE_q ))) ) ) ) + + .dataa(!\REGS|regs[30][12]~q ), + .datab(!\PC|pc[8]~DUPLICATE_q ), + .datac(!\PC|pc [9]), + .datad(!\PC|pc[6]~DUPLICATE_q ), + .datae(!\PC|pc [7]), + .dataf(!\REGS|regs[22][12]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux51~7_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux51~7 .extended_lut = "off"; +defparam \REGS|Mux51~7 .lut_mask = 64'h400000007FFFFFFF; +defparam \REGS|Mux51~7 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X33_Y10_N0 +cyclonev_lcell_comb \REGS|Mux19~0 ( +// Equation(s): +// \REGS|Mux19~0_combout = ( \ROM|mem~16_combout & ( \REGS|Mux51~7_combout & ( (!\ROM|mem~9_combout & (\REGS|Mux51~2_combout )) # (\ROM|mem~9_combout & ((\REGS|Mux51~6_combout ))) ) ) ) # ( !\ROM|mem~16_combout & ( \REGS|Mux51~7_combout & ( +// (\REGS|Mux51~3_combout ) # (\ROM|mem~9_combout ) ) ) ) # ( \ROM|mem~16_combout & ( !\REGS|Mux51~7_combout & ( (!\ROM|mem~9_combout & (\REGS|Mux51~2_combout )) # (\ROM|mem~9_combout & ((\REGS|Mux51~6_combout ))) ) ) ) # ( !\ROM|mem~16_combout & ( +// !\REGS|Mux51~7_combout & ( (!\ROM|mem~9_combout & \REGS|Mux51~3_combout ) ) ) ) + + .dataa(!\ROM|mem~9_combout ), + .datab(!\REGS|Mux51~3_combout ), + .datac(!\REGS|Mux51~2_combout ), + .datad(!\REGS|Mux51~6_combout ), + .datae(!\ROM|mem~16_combout ), + .dataf(!\REGS|Mux51~7_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux19~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux19~0 .extended_lut = "off"; +defparam \REGS|Mux19~0 .lut_mask = 64'h22220A5F77770A5F; +defparam \REGS|Mux19~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X30_Y7_N11 +dffeas \REGS|regs[9][12] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[12]~450_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~29_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[9][12]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[9][12] .is_wysiwyg = "true"; +defparam \REGS|regs[9][12] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y7_N51 +cyclonev_lcell_comb \REGS|Mux19~1 ( +// Equation(s): +// \REGS|Mux19~1_combout = ( \ROM|mem~15_combout & ( (\ROM|mem~0_combout & \REGS|regs[9][12]~q ) ) ) # ( !\ROM|mem~15_combout & ( (\ROM|mem~0_combout & \REGS|regs[8][12]~DUPLICATE_q ) ) ) + + .dataa(gnd), + .datab(!\ROM|mem~0_combout ), + .datac(!\REGS|regs[9][12]~q ), + .datad(!\REGS|regs[8][12]~DUPLICATE_q ), + .datae(gnd), + .dataf(!\ROM|mem~15_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux19~1_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux19~1 .extended_lut = "off"; +defparam \REGS|Mux19~1 .lut_mask = 64'h0033003303030303; +defparam \REGS|Mux19~1 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X33_Y10_N24 +cyclonev_lcell_comb \REGS|Mux19~2 ( +// Equation(s): +// \REGS|Mux19~2_combout = ( \REGS|Mux19~0_combout & ( \REGS|Mux19~1_combout ) ) # ( !\REGS|Mux19~0_combout & ( \REGS|Mux19~1_combout & ( !\ROM|mem~17_combout ) ) ) # ( \REGS|Mux19~0_combout & ( !\REGS|Mux19~1_combout & ( ((\ROM|mem~9_combout & +// \REGS|Mux51~4_combout )) # (\ROM|mem~17_combout ) ) ) ) # ( !\REGS|Mux19~0_combout & ( !\REGS|Mux19~1_combout & ( (\ROM|mem~9_combout & (\REGS|Mux51~4_combout & !\ROM|mem~17_combout )) ) ) ) + + .dataa(!\ROM|mem~9_combout ), + .datab(gnd), + .datac(!\REGS|Mux51~4_combout ), + .datad(!\ROM|mem~17_combout ), + .datae(!\REGS|Mux19~0_combout ), + .dataf(!\REGS|Mux19~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux19~2_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux19~2 .extended_lut = "off"; +defparam \REGS|Mux19~2 .lut_mask = 64'h050005FFFF00FFFF; +defparam \REGS|Mux19~2 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X33_Y10_N48 +cyclonev_lcell_comb \ALU|Mux19~0 ( +// Equation(s): +// \ALU|Mux19~0_combout = ( \ALU|Mux15~0_combout & ( \rt_alu[12]~230_combout & ( (!\REGS|Mux19~2_combout & (((\CONTROL_UNIT|ALU_FN [1] & !\CONTROL_UNIT|ALU_FN [0])) # (\ALU|Mux29~1_combout ))) # (\REGS|Mux19~2_combout & (\CONTROL_UNIT|ALU_FN [1])) ) ) ) +// # ( !\ALU|Mux15~0_combout & ( \rt_alu[12]~230_combout & ( (!\REGS|Mux19~2_combout & \ALU|Mux29~1_combout ) ) ) ) # ( \ALU|Mux15~0_combout & ( !\rt_alu[12]~230_combout & ( (!\REGS|Mux19~2_combout & (!\CONTROL_UNIT|ALU_FN [1])) # +// (\REGS|Mux19~2_combout & (((\CONTROL_UNIT|ALU_FN [1] & !\CONTROL_UNIT|ALU_FN [0])) # (\ALU|Mux29~1_combout ))) ) ) ) # ( !\ALU|Mux15~0_combout & ( !\rt_alu[12]~230_combout & ( (\REGS|Mux19~2_combout & \ALU|Mux29~1_combout ) ) ) ) + + .dataa(!\CONTROL_UNIT|ALU_FN [1]), + .datab(!\REGS|Mux19~2_combout ), + .datac(!\ALU|Mux29~1_combout ), + .datad(!\CONTROL_UNIT|ALU_FN [0]), + .datae(!\ALU|Mux15~0_combout ), + .dataf(!\rt_alu[12]~230_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\ALU|Mux19~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \ALU|Mux19~0 .extended_lut = "off"; +defparam \ALU|Mux19~0 .lut_mask = 64'h03039B8B0C0C5D1D; +defparam \ALU|Mux19~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X35_Y6_N0 +cyclonev_lcell_comb \ROM|mem~21 ( +// Equation(s): +// \ROM|mem~21_combout = ( !\PC|pc [7] & ( \PC|pc [2] & ( (!\PC|pc[6]~DUPLICATE_q & (\PC|pc [5] & ((!\PC|pc[3]~DUPLICATE_q ) # (!\PC|pc [4])))) # (\PC|pc[6]~DUPLICATE_q & (!\PC|pc[3]~DUPLICATE_q & (!\PC|pc [4] & !\PC|pc [5]))) ) ) ) # ( !\PC|pc [7] & ( +// !\PC|pc [2] & ( (!\PC|pc[3]~DUPLICATE_q & (!\PC|pc [5] & (!\PC|pc[6]~DUPLICATE_q $ (!\PC|pc [4])))) ) ) ) + + .dataa(!\PC|pc[6]~DUPLICATE_q ), + .datab(!\PC|pc[3]~DUPLICATE_q ), + .datac(!\PC|pc [4]), + .datad(!\PC|pc [5]), + .datae(!\PC|pc [7]), + .dataf(!\PC|pc [2]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\ROM|mem~21_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \ROM|mem~21 .extended_lut = "off"; +defparam \ROM|mem~21 .lut_mask = 64'h4800000040A80000; +defparam \ROM|mem~21 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X36_Y6_N18 +cyclonev_lcell_comb \rt_alu[11]~206 ( +// Equation(s): +// \rt_alu[11]~206_combout = ( \ROM|mem~1_combout & ( \ROM|mem~2_combout & ( (\ROM|mem~21_combout & (!\PC|pc [9] & (\ROM|mem~0_combout & !\PC|pc [8]))) ) ) ) # ( !\ROM|mem~1_combout & ( \ROM|mem~2_combout & ( (\ROM|mem~21_combout & (!\PC|pc [9] & +// (\ROM|mem~0_combout & !\PC|pc [8]))) ) ) ) # ( \ROM|mem~1_combout & ( !\ROM|mem~2_combout & ( (\ROM|mem~21_combout & (!\PC|pc [9] & (\ROM|mem~0_combout & !\PC|pc [8]))) ) ) ) + + .dataa(!\ROM|mem~21_combout ), + .datab(!\PC|pc [9]), + .datac(!\ROM|mem~0_combout ), + .datad(!\PC|pc [8]), + .datae(!\ROM|mem~1_combout ), + .dataf(!\ROM|mem~2_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[11]~206_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[11]~206 .extended_lut = "off"; +defparam \rt_alu[11]~206 .lut_mask = 64'h0000040004000400; +defparam \rt_alu[11]~206 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X36_Y6_N50 +dffeas \REGS|regs[11][11] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[11]~448_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~37_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[11][11]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[11][11] .is_wysiwyg = "true"; +defparam \REGS|regs[11][11] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y6_N28 +dffeas \REGS|regs[10][11] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[11]~448_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~33_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[10][11]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[10][11] .is_wysiwyg = "true"; +defparam \REGS|regs[10][11] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y6_N34 +dffeas \REGS|regs[2][11] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[11]~448_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~32_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[2][11]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[2][11] .is_wysiwyg = "true"; +defparam \REGS|regs[2][11] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X36_Y6_N51 +cyclonev_lcell_comb \rt_alu[11]~202 ( +// Equation(s): +// \rt_alu[11]~202_combout = ( \ROM|mem~10_combout & ( \ROM|mem~0_combout & ( \REGS|regs[10][11]~q ) ) ) # ( !\ROM|mem~10_combout & ( \ROM|mem~0_combout & ( \REGS|regs[11][11]~q ) ) ) # ( \ROM|mem~10_combout & ( !\ROM|mem~0_combout & ( +// \REGS|regs[2][11]~q ) ) ) # ( !\ROM|mem~10_combout & ( !\ROM|mem~0_combout & ( \REGS|regs[2][11]~q ) ) ) + + .dataa(!\REGS|regs[11][11]~q ), + .datab(gnd), + .datac(!\REGS|regs[10][11]~q ), + .datad(!\REGS|regs[2][11]~q ), + .datae(!\ROM|mem~10_combout ), + .dataf(!\ROM|mem~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[11]~202_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[11]~202 .extended_lut = "off"; +defparam \rt_alu[11]~202 .lut_mask = 64'h00FF00FF55550F0F; +defparam \rt_alu[11]~202 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X35_Y4_N26 +dffeas \REGS|regs[8][11] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[11]~448_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~24_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[8][11]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[8][11] .is_wysiwyg = "true"; +defparam \REGS|regs[8][11] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X35_Y4_N6 +cyclonev_lcell_comb \REGS|Mux52~6 ( +// Equation(s): +// \REGS|Mux52~6_combout = ( !\PC|pc [9] & ( !\PC|pc[8]~DUPLICATE_q & ( (\REGS|regs[8][11]~q & (!\PC|pc[6]~DUPLICATE_q & !\PC|pc [7])) ) ) ) + + .dataa(!\REGS|regs[8][11]~q ), + .datab(gnd), + .datac(!\PC|pc[6]~DUPLICATE_q ), + .datad(!\PC|pc [7]), + .datae(!\PC|pc [9]), + .dataf(!\PC|pc[8]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux52~6_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux52~6 .extended_lut = "off"; +defparam \REGS|Mux52~6 .lut_mask = 64'h5000000000000000; +defparam \REGS|Mux52~6 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X33_Y4_N56 +dffeas \REGS|regs[1][11] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[11]~448_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~28_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[1][11]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[1][11] .is_wysiwyg = "true"; +defparam \REGS|regs[1][11] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X33_Y4_N30 +cyclonev_lcell_comb \REGS|regs[9][11]~feeder ( +// Equation(s): +// \REGS|regs[9][11]~feeder_combout = ( \rd[11]~448_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[11]~448_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[9][11]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[9][11]~feeder .extended_lut = "off"; +defparam \REGS|regs[9][11]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[9][11]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X33_Y4_N32 +dffeas \REGS|regs[9][11] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[9][11]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~29_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[9][11]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[9][11] .is_wysiwyg = "true"; +defparam \REGS|regs[9][11] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X33_Y4_N21 +cyclonev_lcell_comb \REGS|Mux52~5 ( +// Equation(s): +// \REGS|Mux52~5_combout = ( \PC|pc[8]~DUPLICATE_q & ( \PC|pc [9] & ( \REGS|regs[1][11]~q ) ) ) # ( !\PC|pc[8]~DUPLICATE_q & ( \PC|pc [9] & ( \REGS|regs[1][11]~q ) ) ) # ( \PC|pc[8]~DUPLICATE_q & ( !\PC|pc [9] & ( \REGS|regs[1][11]~q ) ) ) # ( +// !\PC|pc[8]~DUPLICATE_q & ( !\PC|pc [9] & ( (!\PC|pc[6]~DUPLICATE_q & ((!\PC|pc [7] & ((\REGS|regs[9][11]~q ))) # (\PC|pc [7] & (\REGS|regs[1][11]~q )))) # (\PC|pc[6]~DUPLICATE_q & (\REGS|regs[1][11]~q )) ) ) ) + + .dataa(!\REGS|regs[1][11]~q ), + .datab(!\REGS|regs[9][11]~q ), + .datac(!\PC|pc[6]~DUPLICATE_q ), + .datad(!\PC|pc [7]), + .datae(!\PC|pc[8]~DUPLICATE_q ), + .dataf(!\PC|pc [9]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux52~5_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux52~5 .extended_lut = "off"; +defparam \REGS|Mux52~5 .lut_mask = 64'h3555555555555555; +defparam \REGS|Mux52~5 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X33_Y4_N40 +dffeas \REGS|regs[14][11] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[11]~448_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~35_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[14][11]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[14][11] .is_wysiwyg = "true"; +defparam \REGS|regs[14][11] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X36_Y6_N32 +dffeas \REGS|regs[15][11] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[11]~448_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~39_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[15][11]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[15][11] .is_wysiwyg = "true"; +defparam \REGS|regs[15][11] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X25_Y9_N41 +dffeas \REGS|regs[6][11] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[11]~448_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~34_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[6][11]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[6][11] .is_wysiwyg = "true"; +defparam \REGS|regs[6][11] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X36_Y6_N33 +cyclonev_lcell_comb \rt_alu[11]~203 ( +// Equation(s): +// \rt_alu[11]~203_combout = ( \REGS|regs[6][11]~q & ( \ROM|mem~0_combout & ( (!\ROM|mem~10_combout & ((\REGS|regs[15][11]~q ))) # (\ROM|mem~10_combout & (\REGS|regs[14][11]~q )) ) ) ) # ( !\REGS|regs[6][11]~q & ( \ROM|mem~0_combout & ( +// (!\ROM|mem~10_combout & ((\REGS|regs[15][11]~q ))) # (\ROM|mem~10_combout & (\REGS|regs[14][11]~q )) ) ) ) # ( \REGS|regs[6][11]~q & ( !\ROM|mem~0_combout ) ) + + .dataa(!\REGS|regs[14][11]~q ), + .datab(!\REGS|regs[15][11]~q ), + .datac(gnd), + .datad(!\ROM|mem~10_combout ), + .datae(!\REGS|regs[6][11]~q ), + .dataf(!\ROM|mem~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[11]~203_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[11]~203 .extended_lut = "off"; +defparam \rt_alu[11]~203 .lut_mask = 64'h0000FFFF33553355; +defparam \rt_alu[11]~203 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X33_Y8_N29 +dffeas \REGS|regs[4][11] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[11]~448_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~22_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[4][11]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[4][11] .is_wysiwyg = "true"; +defparam \REGS|regs[4][11] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X33_Y8_N2 +dffeas \REGS|regs[12][11] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[11]~448_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~26_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[12][11]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[12][11] .is_wysiwyg = "true"; +defparam \REGS|regs[12][11] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X33_Y8_N42 +cyclonev_lcell_comb \REGS|Mux52~0 ( +// Equation(s): +// \REGS|Mux52~0_combout = ( \PC|pc[8]~DUPLICATE_q & ( \PC|pc[9]~DUPLICATE_q & ( \REGS|regs[4][11]~q ) ) ) # ( !\PC|pc[8]~DUPLICATE_q & ( \PC|pc[9]~DUPLICATE_q & ( \REGS|regs[4][11]~q ) ) ) # ( \PC|pc[8]~DUPLICATE_q & ( !\PC|pc[9]~DUPLICATE_q & ( +// \REGS|regs[4][11]~q ) ) ) # ( !\PC|pc[8]~DUPLICATE_q & ( !\PC|pc[9]~DUPLICATE_q & ( (!\PC|pc[7]~DUPLICATE_q & ((!\PC|pc [6] & ((\REGS|regs[12][11]~q ))) # (\PC|pc [6] & (\REGS|regs[4][11]~q )))) # (\PC|pc[7]~DUPLICATE_q & (\REGS|regs[4][11]~q )) ) ) +// ) + + .dataa(!\REGS|regs[4][11]~q ), + .datab(!\PC|pc[7]~DUPLICATE_q ), + .datac(!\REGS|regs[12][11]~q ), + .datad(!\PC|pc [6]), + .datae(!\PC|pc[8]~DUPLICATE_q ), + .dataf(!\PC|pc[9]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux52~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux52~0 .extended_lut = "off"; +defparam \REGS|Mux52~0 .lut_mask = 64'h1D55555555555555; +defparam \REGS|Mux52~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X33_Y8_N14 +dffeas \REGS|regs[13][11] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[11]~448_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~31_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[13][11]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[13][11] .is_wysiwyg = "true"; +defparam \REGS|regs[13][11] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X32_Y9_N2 +dffeas \REGS|regs[5][11] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[11]~448_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~30_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[5][11]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[5][11] .is_wysiwyg = "true"; +defparam \REGS|regs[5][11] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X33_Y8_N15 +cyclonev_lcell_comb \REGS|Mux52~1 ( +// Equation(s): +// \REGS|Mux52~1_combout = ( \PC|pc[8]~DUPLICATE_q & ( \REGS|regs[5][11]~q ) ) # ( !\PC|pc[8]~DUPLICATE_q & ( \REGS|regs[5][11]~q & ( (((\PC|pc[9]~DUPLICATE_q ) # (\REGS|regs[13][11]~q )) # (\PC|pc[7]~DUPLICATE_q )) # (\PC|pc[6]~DUPLICATE_q ) ) ) ) # ( +// !\PC|pc[8]~DUPLICATE_q & ( !\REGS|regs[5][11]~q & ( (!\PC|pc[6]~DUPLICATE_q & (!\PC|pc[7]~DUPLICATE_q & (\REGS|regs[13][11]~q & !\PC|pc[9]~DUPLICATE_q ))) ) ) ) + + .dataa(!\PC|pc[6]~DUPLICATE_q ), + .datab(!\PC|pc[7]~DUPLICATE_q ), + .datac(!\REGS|regs[13][11]~q ), + .datad(!\PC|pc[9]~DUPLICATE_q ), + .datae(!\PC|pc[8]~DUPLICATE_q ), + .dataf(!\REGS|regs[5][11]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux52~1_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux52~1 .extended_lut = "off"; +defparam \REGS|Mux52~1 .lut_mask = 64'h080000007FFFFFFF; +defparam \REGS|Mux52~1 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X36_Y6_N6 +cyclonev_lcell_comb \rt_alu[11]~204 ( +// Equation(s): +// \rt_alu[11]~204_combout = ( \REGS|Mux52~1_combout & ( (!\ROM|mem~12_combout & (((\REGS|Mux52~0_combout )) # (\ROM|mem~13_combout ))) # (\ROM|mem~12_combout & (((\rt_alu[11]~203_combout )))) ) ) # ( !\REGS|Mux52~1_combout & ( (!\ROM|mem~12_combout & +// (!\ROM|mem~13_combout & ((\REGS|Mux52~0_combout )))) # (\ROM|mem~12_combout & (((\rt_alu[11]~203_combout )))) ) ) + + .dataa(!\ROM|mem~13_combout ), + .datab(!\ROM|mem~12_combout ), + .datac(!\rt_alu[11]~203_combout ), + .datad(!\REGS|Mux52~0_combout ), + .datae(gnd), + .dataf(!\REGS|Mux52~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[11]~204_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[11]~204 .extended_lut = "off"; +defparam \rt_alu[11]~204 .lut_mask = 64'h038B038B47CF47CF; +defparam \rt_alu[11]~204 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X36_Y6_N0 +cyclonev_lcell_comb \rt_alu[11]~205 ( +// Equation(s): +// \rt_alu[11]~205_combout = ( \REGS|Mux52~5_combout & ( \rt_alu[11]~204_combout & ( (!\rt_alu[17]~10_combout & (((\rt_alu[17]~11_combout ) # (\REGS|Mux52~6_combout )))) # (\rt_alu[17]~10_combout & (((!\rt_alu[17]~11_combout )) # +// (\rt_alu[11]~202_combout ))) ) ) ) # ( !\REGS|Mux52~5_combout & ( \rt_alu[11]~204_combout & ( (!\rt_alu[17]~10_combout & (((\rt_alu[17]~11_combout ) # (\REGS|Mux52~6_combout )))) # (\rt_alu[17]~10_combout & (\rt_alu[11]~202_combout & +// ((\rt_alu[17]~11_combout )))) ) ) ) # ( \REGS|Mux52~5_combout & ( !\rt_alu[11]~204_combout & ( (!\rt_alu[17]~10_combout & (((\REGS|Mux52~6_combout & !\rt_alu[17]~11_combout )))) # (\rt_alu[17]~10_combout & (((!\rt_alu[17]~11_combout )) # +// (\rt_alu[11]~202_combout ))) ) ) ) # ( !\REGS|Mux52~5_combout & ( !\rt_alu[11]~204_combout & ( (!\rt_alu[17]~10_combout & (((\REGS|Mux52~6_combout & !\rt_alu[17]~11_combout )))) # (\rt_alu[17]~10_combout & (\rt_alu[11]~202_combout & +// ((\rt_alu[17]~11_combout )))) ) ) ) + + .dataa(!\rt_alu[11]~202_combout ), + .datab(!\rt_alu[17]~10_combout ), + .datac(!\REGS|Mux52~6_combout ), + .datad(!\rt_alu[17]~11_combout ), + .datae(!\REGS|Mux52~5_combout ), + .dataf(!\rt_alu[11]~204_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[11]~205_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[11]~205 .extended_lut = "off"; +defparam \rt_alu[11]~205 .lut_mask = 64'h0C113F110CDD3FDD; +defparam \rt_alu[11]~205 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X33_Y7_N41 +dffeas \REGS|regs[16][11] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[11]~448_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~2_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[16][11]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[16][11] .is_wysiwyg = "true"; +defparam \REGS|regs[16][11] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X33_Y7_N47 +dffeas \REGS|regs[17][11] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[11]~448_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~11_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[17][11]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[17][11] .is_wysiwyg = "true"; +defparam \REGS|regs[17][11] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X33_Y7_N9 +cyclonev_lcell_comb \rt_alu[11]~209 ( +// Equation(s): +// \rt_alu[11]~209_combout = ( \ROM|mem~10_combout & ( \REGS|regs[16][11]~q ) ) # ( !\ROM|mem~10_combout & ( (!\ROM|mem~0_combout & (\REGS|regs[16][11]~q )) # (\ROM|mem~0_combout & ((\REGS|regs[17][11]~q ))) ) ) + + .dataa(gnd), + .datab(!\REGS|regs[16][11]~q ), + .datac(!\REGS|regs[17][11]~q ), + .datad(!\ROM|mem~0_combout ), + .datae(gnd), + .dataf(!\ROM|mem~10_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[11]~209_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[11]~209 .extended_lut = "off"; +defparam \rt_alu[11]~209 .lut_mask = 64'h330F330F33333333; +defparam \rt_alu[11]~209 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X28_Y10_N23 +dffeas \REGS|regs[19][11] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[11]~448_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~14_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[19][11]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[19][11] .is_wysiwyg = "true"; +defparam \REGS|regs[19][11] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X30_Y10_N6 +cyclonev_lcell_comb \REGS|regs[27][11]~feeder ( +// Equation(s): +// \REGS|regs[27][11]~feeder_combout = ( \rd[11]~448_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[11]~448_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[27][11]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[27][11]~feeder .extended_lut = "off"; +defparam \REGS|regs[27][11]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[27][11]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X30_Y10_N7 +dffeas \REGS|regs[27][11] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[27][11]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~15_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[27][11]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[27][11] .is_wysiwyg = "true"; +defparam \REGS|regs[27][11] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X30_Y10_N27 +cyclonev_lcell_comb \REGS|Mux52~7 ( +// Equation(s): +// \REGS|Mux52~7_combout = ( \PC|pc [7] & ( \PC|pc[6]~DUPLICATE_q & ( \REGS|regs[19][11]~q ) ) ) # ( !\PC|pc [7] & ( \PC|pc[6]~DUPLICATE_q & ( \REGS|regs[19][11]~q ) ) ) # ( \PC|pc [7] & ( !\PC|pc[6]~DUPLICATE_q & ( \REGS|regs[19][11]~q ) ) ) # ( +// !\PC|pc [7] & ( !\PC|pc[6]~DUPLICATE_q & ( (!\PC|pc [9] & ((!\PC|pc [8] & ((\REGS|regs[27][11]~q ))) # (\PC|pc [8] & (\REGS|regs[19][11]~q )))) # (\PC|pc [9] & (((\REGS|regs[19][11]~q )))) ) ) ) + + .dataa(!\PC|pc [9]), + .datab(!\PC|pc [8]), + .datac(!\REGS|regs[19][11]~q ), + .datad(!\REGS|regs[27][11]~q ), + .datae(!\PC|pc [7]), + .dataf(!\PC|pc[6]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux52~7_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux52~7 .extended_lut = "off"; +defparam \REGS|Mux52~7 .lut_mask = 64'h078F0F0F0F0F0F0F; +defparam \REGS|Mux52~7 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X31_Y4_N24 +cyclonev_lcell_comb \REGS|regs[23][11]~feeder ( +// Equation(s): +// \REGS|regs[23][11]~feeder_combout = ( \rd[11]~448_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[11]~448_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[23][11]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[23][11]~feeder .extended_lut = "off"; +defparam \REGS|regs[23][11]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[23][11]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X31_Y4_N26 +dffeas \REGS|regs[23][11] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[23][11]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~18_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[23][11]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[23][11] .is_wysiwyg = "true"; +defparam \REGS|regs[23][11] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X33_Y5_N20 +dffeas \REGS|regs[31][11] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[11]~448_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~19_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[31][11]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[31][11] .is_wysiwyg = "true"; +defparam \REGS|regs[31][11] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X31_Y4_N9 +cyclonev_lcell_comb \REGS|Mux52~3 ( +// Equation(s): +// \REGS|Mux52~3_combout = ( \PC|pc [7] & ( \PC|pc[8]~DUPLICATE_q & ( \REGS|regs[23][11]~q ) ) ) # ( !\PC|pc [7] & ( \PC|pc[8]~DUPLICATE_q & ( \REGS|regs[23][11]~q ) ) ) # ( \PC|pc [7] & ( !\PC|pc[8]~DUPLICATE_q & ( \REGS|regs[23][11]~q ) ) ) # ( +// !\PC|pc [7] & ( !\PC|pc[8]~DUPLICATE_q & ( (!\PC|pc[6]~DUPLICATE_q & ((!\PC|pc[9]~DUPLICATE_q & ((\REGS|regs[31][11]~q ))) # (\PC|pc[9]~DUPLICATE_q & (\REGS|regs[23][11]~q )))) # (\PC|pc[6]~DUPLICATE_q & (\REGS|regs[23][11]~q )) ) ) ) + + .dataa(!\REGS|regs[23][11]~q ), + .datab(!\PC|pc[6]~DUPLICATE_q ), + .datac(!\PC|pc[9]~DUPLICATE_q ), + .datad(!\REGS|regs[31][11]~q ), + .datae(!\PC|pc [7]), + .dataf(!\PC|pc[8]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux52~3_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux52~3 .extended_lut = "off"; +defparam \REGS|Mux52~3 .lut_mask = 64'h15D5555555555555; +defparam \REGS|Mux52~3 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X36_Y6_N56 +dffeas \REGS|regs[29][11]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[11]~448_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~17_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[29][11]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[29][11]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[29][11]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: FF_X35_Y8_N32 +dffeas \REGS|regs[20][11] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[11]~448_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~7_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[20][11]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[20][11] .is_wysiwyg = "true"; +defparam \REGS|regs[20][11] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X35_Y6_N22 +dffeas \REGS|regs[28][11] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[11]~448_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~8_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[28][11]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[28][11] .is_wysiwyg = "true"; +defparam \REGS|regs[28][11] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X36_Y6_N57 +cyclonev_lcell_comb \rt_alu[11]~207 ( +// Equation(s): +// \rt_alu[11]~207_combout = ( \ROM|mem~10_combout & ( \ROM|mem~0_combout & ( \REGS|regs[28][11]~q ) ) ) # ( !\ROM|mem~10_combout & ( \ROM|mem~0_combout & ( \REGS|regs[29][11]~DUPLICATE_q ) ) ) # ( \ROM|mem~10_combout & ( !\ROM|mem~0_combout & ( +// \REGS|regs[20][11]~q ) ) ) # ( !\ROM|mem~10_combout & ( !\ROM|mem~0_combout & ( \REGS|regs[20][11]~q ) ) ) + + .dataa(!\REGS|regs[29][11]~DUPLICATE_q ), + .datab(gnd), + .datac(!\REGS|regs[20][11]~q ), + .datad(!\REGS|regs[28][11]~q ), + .datae(!\ROM|mem~10_combout ), + .dataf(!\ROM|mem~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[11]~207_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[11]~207 .extended_lut = "off"; +defparam \rt_alu[11]~207 .lut_mask = 64'h0F0F0F0F555500FF; +defparam \rt_alu[11]~207 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X35_Y14_N23 +dffeas \REGS|regs[22][11] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[11]~448_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~9_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[22][11]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[22][11] .is_wysiwyg = "true"; +defparam \REGS|regs[22][11] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X35_Y14_N41 +dffeas \REGS|regs[30][11] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[11]~448_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~10_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[30][11]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[30][11] .is_wysiwyg = "true"; +defparam \REGS|regs[30][11] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X35_Y14_N24 +cyclonev_lcell_comb \REGS|Mux52~2 ( +// Equation(s): +// \REGS|Mux52~2_combout = ( \PC|pc [8] & ( \PC|pc [9] & ( \REGS|regs[22][11]~q ) ) ) # ( !\PC|pc [8] & ( \PC|pc [9] & ( \REGS|regs[22][11]~q ) ) ) # ( \PC|pc [8] & ( !\PC|pc [9] & ( \REGS|regs[22][11]~q ) ) ) # ( !\PC|pc [8] & ( !\PC|pc [9] & ( +// (!\PC|pc[7]~DUPLICATE_q & ((!\PC|pc[6]~DUPLICATE_q & ((\REGS|regs[30][11]~q ))) # (\PC|pc[6]~DUPLICATE_q & (\REGS|regs[22][11]~q )))) # (\PC|pc[7]~DUPLICATE_q & (\REGS|regs[22][11]~q )) ) ) ) + + .dataa(!\REGS|regs[22][11]~q ), + .datab(!\REGS|regs[30][11]~q ), + .datac(!\PC|pc[7]~DUPLICATE_q ), + .datad(!\PC|pc[6]~DUPLICATE_q ), + .datae(!\PC|pc [8]), + .dataf(!\PC|pc [9]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux52~2_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux52~2 .extended_lut = "off"; +defparam \REGS|Mux52~2 .lut_mask = 64'h3555555555555555; +defparam \REGS|Mux52~2 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X36_Y6_N9 +cyclonev_lcell_comb \rt_alu[11]~208 ( +// Equation(s): +// \rt_alu[11]~208_combout = ( \REGS|Mux52~2_combout & ( (!\ROM|mem~12_combout & (((\rt_alu[11]~207_combout )))) # (\ROM|mem~12_combout & ((!\ROM|mem~13_combout ) # ((\REGS|Mux52~3_combout )))) ) ) # ( !\REGS|Mux52~2_combout & ( (!\ROM|mem~12_combout & +// (((\rt_alu[11]~207_combout )))) # (\ROM|mem~12_combout & (\ROM|mem~13_combout & (\REGS|Mux52~3_combout ))) ) ) + + .dataa(!\ROM|mem~13_combout ), + .datab(!\ROM|mem~12_combout ), + .datac(!\REGS|Mux52~3_combout ), + .datad(!\rt_alu[11]~207_combout ), + .datae(gnd), + .dataf(!\REGS|Mux52~2_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[11]~208_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[11]~208 .extended_lut = "off"; +defparam \rt_alu[11]~208 .lut_mask = 64'h01CD01CD23EF23EF; +defparam \rt_alu[11]~208 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X36_Y6_N42 +cyclonev_lcell_comb \rt_alu[11]~210 ( +// Equation(s): +// \rt_alu[11]~210_combout = ( \REGS|Mux52~7_combout & ( \rt_alu[11]~208_combout & ( (!\rt_alu[17]~5_combout & (((\rt_alu[17]~4_combout ) # (\rt_alu[11]~209_combout )))) # (\rt_alu[17]~5_combout & (((!\rt_alu[17]~4_combout )) # (\REGS|Mux52~4_combout +// ))) ) ) ) # ( !\REGS|Mux52~7_combout & ( \rt_alu[11]~208_combout & ( (!\rt_alu[17]~5_combout & (((\rt_alu[17]~4_combout ) # (\rt_alu[11]~209_combout )))) # (\rt_alu[17]~5_combout & (\REGS|Mux52~4_combout & ((\rt_alu[17]~4_combout )))) ) ) ) # ( +// \REGS|Mux52~7_combout & ( !\rt_alu[11]~208_combout & ( (!\rt_alu[17]~5_combout & (((\rt_alu[11]~209_combout & !\rt_alu[17]~4_combout )))) # (\rt_alu[17]~5_combout & (((!\rt_alu[17]~4_combout )) # (\REGS|Mux52~4_combout ))) ) ) ) # ( +// !\REGS|Mux52~7_combout & ( !\rt_alu[11]~208_combout & ( (!\rt_alu[17]~5_combout & (((\rt_alu[11]~209_combout & !\rt_alu[17]~4_combout )))) # (\rt_alu[17]~5_combout & (\REGS|Mux52~4_combout & ((\rt_alu[17]~4_combout )))) ) ) ) + + .dataa(!\rt_alu[17]~5_combout ), + .datab(!\REGS|Mux52~4_combout ), + .datac(!\rt_alu[11]~209_combout ), + .datad(!\rt_alu[17]~4_combout ), + .datae(!\REGS|Mux52~7_combout ), + .dataf(!\rt_alu[11]~208_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[11]~210_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[11]~210 .extended_lut = "off"; +defparam \rt_alu[11]~210 .lut_mask = 64'h0A115F110ABB5FBB; +defparam \rt_alu[11]~210 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X36_Y6_N24 +cyclonev_lcell_comb \rt_alu[11]~211 ( +// Equation(s): +// \rt_alu[11]~211_combout = ( \ROM|mem~9_combout & ( (!\rt_alu[11]~206_combout & ((!\rt_alu[11]~210_combout ) # (\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout ))) ) ) # ( !\ROM|mem~9_combout & ( (!\rt_alu[11]~206_combout & ((!\rt_alu[11]~205_combout ) # +// (\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout ))) ) ) + + .dataa(!\rt_alu[11]~206_combout ), + .datab(!\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout ), + .datac(!\rt_alu[11]~205_combout ), + .datad(!\rt_alu[11]~210_combout ), + .datae(!\ROM|mem~9_combout ), + .dataf(gnd), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[11]~211_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[11]~211 .extended_lut = "off"; +defparam \rt_alu[11]~211 .lut_mask = 64'hA2A2AA22A2A2AA22; +defparam \rt_alu[11]~211 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X35_Y6_N18 +cyclonev_lcell_comb \ALU|Mux20~0 ( +// Equation(s): +// \ALU|Mux20~0_combout = ( \ALU|Mux29~1_combout & ( \rt_alu[11]~211_combout & ( ((\ALU|Mux15~0_combout & !\CONTROL_UNIT|ALU_FN [1])) # (\REGS|Mux20~2_combout ) ) ) ) # ( !\ALU|Mux29~1_combout & ( \rt_alu[11]~211_combout & ( (\ALU|Mux15~0_combout & +// ((!\REGS|Mux20~2_combout & ((!\CONTROL_UNIT|ALU_FN [1]))) # (\REGS|Mux20~2_combout & (!\CONTROL_UNIT|ALU_FN [0] & \CONTROL_UNIT|ALU_FN [1])))) ) ) ) # ( \ALU|Mux29~1_combout & ( !\rt_alu[11]~211_combout & ( (!\REGS|Mux20~2_combout ) # +// ((\ALU|Mux15~0_combout & \CONTROL_UNIT|ALU_FN [1])) ) ) ) # ( !\ALU|Mux29~1_combout & ( !\rt_alu[11]~211_combout & ( (\ALU|Mux15~0_combout & (\CONTROL_UNIT|ALU_FN [1] & ((!\CONTROL_UNIT|ALU_FN [0]) # (\REGS|Mux20~2_combout )))) ) ) ) + + .dataa(!\REGS|Mux20~2_combout ), + .datab(!\CONTROL_UNIT|ALU_FN [0]), + .datac(!\ALU|Mux15~0_combout ), + .datad(!\CONTROL_UNIT|ALU_FN [1]), + .datae(!\ALU|Mux29~1_combout ), + .dataf(!\rt_alu[11]~211_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\ALU|Mux20~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \ALU|Mux20~0 .extended_lut = "off"; +defparam \ALU|Mux20~0 .lut_mask = 64'h000DAAAF0A045F55; +defparam \ALU|Mux20~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X36_Y6_N12 +cyclonev_lcell_comb \ALU|adder_unit|operand[11]~12 ( +// Equation(s): +// \ALU|adder_unit|operand[11]~12_combout = ( \rt_alu[11]~205_combout & ( \rt_alu[11]~210_combout & ( !\CONTROL_UNIT|ALU_FN [1] $ (((!\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout ) # (\rt_alu[11]~206_combout ))) ) ) ) # ( !\rt_alu[11]~205_combout & ( +// \rt_alu[11]~210_combout & ( !\CONTROL_UNIT|ALU_FN [1] $ ((((\ROM|mem~9_combout & !\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout )) # (\rt_alu[11]~206_combout ))) ) ) ) # ( \rt_alu[11]~205_combout & ( !\rt_alu[11]~210_combout & ( !\CONTROL_UNIT|ALU_FN [1] +// $ ((((!\ROM|mem~9_combout & !\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout )) # (\rt_alu[11]~206_combout ))) ) ) ) # ( !\rt_alu[11]~205_combout & ( !\rt_alu[11]~210_combout & ( !\CONTROL_UNIT|ALU_FN [1] $ (\rt_alu[11]~206_combout ) ) ) ) + + .dataa(!\CONTROL_UNIT|ALU_FN [1]), + .datab(!\ROM|mem~9_combout ), + .datac(!\rt_alu[11]~206_combout ), + .datad(!\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout ), + .datae(!\rt_alu[11]~205_combout ), + .dataf(!\rt_alu[11]~210_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\ALU|adder_unit|operand[11]~12_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \ALU|adder_unit|operand[11]~12 .extended_lut = "off"; +defparam \ALU|adder_unit|operand[11]~12 .lut_mask = 64'hA5A565A595A555A5; +defparam \ALU|adder_unit|operand[11]~12 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X30_Y10_N41 +dffeas \REGS|regs[27][10] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[10]~446_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~15_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[27][10]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[27][10] .is_wysiwyg = "true"; +defparam \REGS|regs[27][10] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X33_Y12_N20 +dffeas \REGS|regs[19][10] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[10]~446_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~14_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[19][10]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[19][10] .is_wysiwyg = "true"; +defparam \REGS|regs[19][10] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X30_Y10_N36 +cyclonev_lcell_comb \REGS|Mux53~5 ( +// Equation(s): +// \REGS|Mux53~5_combout = ( \PC|pc [8] & ( \REGS|regs[19][10]~q ) ) # ( !\PC|pc [8] & ( \REGS|regs[19][10]~q & ( (((\PC|pc[6]~DUPLICATE_q ) # (\PC|pc [9])) # (\REGS|regs[27][10]~q )) # (\PC|pc [7]) ) ) ) # ( !\PC|pc [8] & ( !\REGS|regs[19][10]~q & ( +// (!\PC|pc [7] & (\REGS|regs[27][10]~q & (!\PC|pc [9] & !\PC|pc[6]~DUPLICATE_q ))) ) ) ) + + .dataa(!\PC|pc [7]), + .datab(!\REGS|regs[27][10]~q ), + .datac(!\PC|pc [9]), + .datad(!\PC|pc[6]~DUPLICATE_q ), + .datae(!\PC|pc [8]), + .dataf(!\REGS|regs[19][10]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux53~5_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux53~5 .extended_lut = "off"; +defparam \REGS|Mux53~5 .lut_mask = 64'h200000007FFFFFFF; +defparam \REGS|Mux53~5 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X35_Y12_N18 +cyclonev_lcell_comb \REGS|regs[16][10]~feeder ( +// Equation(s): +// \REGS|regs[16][10]~feeder_combout = ( \rd[10]~446_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[10]~446_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[16][10]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[16][10]~feeder .extended_lut = "off"; +defparam \REGS|regs[16][10]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[16][10]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X35_Y12_N20 +dffeas \REGS|regs[16][10] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[16][10]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~2_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[16][10]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[16][10] .is_wysiwyg = "true"; +defparam \REGS|regs[16][10] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X35_Y10_N5 +dffeas \REGS|regs[17][10]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[10]~446_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~11_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[17][10]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[17][10]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[17][10]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X35_Y10_N0 +cyclonev_lcell_comb \rt_alu[10]~188 ( +// Equation(s): +// \rt_alu[10]~188_combout = ( \REGS|regs[17][10]~DUPLICATE_q & ( \ROM|mem~0_combout & ( (!\ROM|mem~10_combout ) # (\REGS|regs[16][10]~q ) ) ) ) # ( !\REGS|regs[17][10]~DUPLICATE_q & ( \ROM|mem~0_combout & ( (\ROM|mem~10_combout & \REGS|regs[16][10]~q +// ) ) ) ) # ( \REGS|regs[17][10]~DUPLICATE_q & ( !\ROM|mem~0_combout & ( \REGS|regs[16][10]~q ) ) ) # ( !\REGS|regs[17][10]~DUPLICATE_q & ( !\ROM|mem~0_combout & ( \REGS|regs[16][10]~q ) ) ) + + .dataa(gnd), + .datab(!\ROM|mem~10_combout ), + .datac(gnd), + .datad(!\REGS|regs[16][10]~q ), + .datae(!\REGS|regs[17][10]~DUPLICATE_q ), + .dataf(!\ROM|mem~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[10]~188_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[10]~188 .extended_lut = "off"; +defparam \rt_alu[10]~188 .lut_mask = 64'h00FF00FF0033CCFF; +defparam \rt_alu[10]~188 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X35_Y10_N26 +dffeas \REGS|regs[29][10]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[10]~446_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~17_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[29][10]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[29][10]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[29][10]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: FF_X31_Y6_N34 +dffeas \REGS|regs[28][10]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[10]~446_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~8_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[28][10]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[28][10]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[28][10]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: FF_X28_Y12_N1 +dffeas \REGS|regs[20][10] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[10]~446_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~7_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[20][10]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[20][10] .is_wysiwyg = "true"; +defparam \REGS|regs[20][10] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X35_Y10_N27 +cyclonev_lcell_comb \rt_alu[10]~186 ( +// Equation(s): +// \rt_alu[10]~186_combout = ( \ROM|mem~0_combout & ( \REGS|regs[20][10]~q & ( (!\ROM|mem~10_combout & (\REGS|regs[29][10]~DUPLICATE_q )) # (\ROM|mem~10_combout & ((\REGS|regs[28][10]~DUPLICATE_q ))) ) ) ) # ( !\ROM|mem~0_combout & ( +// \REGS|regs[20][10]~q ) ) # ( \ROM|mem~0_combout & ( !\REGS|regs[20][10]~q & ( (!\ROM|mem~10_combout & (\REGS|regs[29][10]~DUPLICATE_q )) # (\ROM|mem~10_combout & ((\REGS|regs[28][10]~DUPLICATE_q ))) ) ) ) + + .dataa(!\REGS|regs[29][10]~DUPLICATE_q ), + .datab(gnd), + .datac(!\ROM|mem~10_combout ), + .datad(!\REGS|regs[28][10]~DUPLICATE_q ), + .datae(!\ROM|mem~0_combout ), + .dataf(!\REGS|regs[20][10]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[10]~186_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[10]~186 .extended_lut = "off"; +defparam \rt_alu[10]~186 .lut_mask = 64'h0000505FFFFF505F; +defparam \rt_alu[10]~186 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X35_Y5_N20 +dffeas \REGS|regs[30][10] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[10]~446_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~10_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[30][10]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[30][10] .is_wysiwyg = "true"; +defparam \REGS|regs[30][10] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X35_Y5_N10 +dffeas \REGS|regs[22][10] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[10]~446_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~9_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[22][10]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[22][10] .is_wysiwyg = "true"; +defparam \REGS|regs[22][10] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X35_Y5_N36 +cyclonev_lcell_comb \REGS|Mux53~7 ( +// Equation(s): +// \REGS|Mux53~7_combout = ( \PC|pc[8]~DUPLICATE_q & ( \PC|pc [7] & ( \REGS|regs[22][10]~q ) ) ) # ( !\PC|pc[8]~DUPLICATE_q & ( \PC|pc [7] & ( \REGS|regs[22][10]~q ) ) ) # ( \PC|pc[8]~DUPLICATE_q & ( !\PC|pc [7] & ( \REGS|regs[22][10]~q ) ) ) # ( +// !\PC|pc[8]~DUPLICATE_q & ( !\PC|pc [7] & ( (!\PC|pc [9] & ((!\PC|pc[6]~DUPLICATE_q & (\REGS|regs[30][10]~q )) # (\PC|pc[6]~DUPLICATE_q & ((\REGS|regs[22][10]~q ))))) # (\PC|pc [9] & (((\REGS|regs[22][10]~q )))) ) ) ) + + .dataa(!\REGS|regs[30][10]~q ), + .datab(!\PC|pc [9]), + .datac(!\REGS|regs[22][10]~q ), + .datad(!\PC|pc[6]~DUPLICATE_q ), + .datae(!\PC|pc[8]~DUPLICATE_q ), + .dataf(!\PC|pc [7]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux53~7_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux53~7 .extended_lut = "off"; +defparam \REGS|Mux53~7 .lut_mask = 64'h470F0F0F0F0F0F0F; +defparam \REGS|Mux53~7 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X35_Y5_N44 +dffeas \REGS|regs[23][10] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[10]~446_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~18_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[23][10]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[23][10] .is_wysiwyg = "true"; +defparam \REGS|regs[23][10] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X33_Y5_N28 +dffeas \REGS|regs[31][10] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[10]~446_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~19_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[31][10]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[31][10] .is_wysiwyg = "true"; +defparam \REGS|regs[31][10] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X35_Y5_N27 +cyclonev_lcell_comb \REGS|Mux53~6 ( +// Equation(s): +// \REGS|Mux53~6_combout = ( \PC|pc[8]~DUPLICATE_q & ( \PC|pc [7] & ( \REGS|regs[23][10]~q ) ) ) # ( !\PC|pc[8]~DUPLICATE_q & ( \PC|pc [7] & ( \REGS|regs[23][10]~q ) ) ) # ( \PC|pc[8]~DUPLICATE_q & ( !\PC|pc [7] & ( \REGS|regs[23][10]~q ) ) ) # ( +// !\PC|pc[8]~DUPLICATE_q & ( !\PC|pc [7] & ( (!\PC|pc[6]~DUPLICATE_q & ((!\PC|pc [9] & ((\REGS|regs[31][10]~q ))) # (\PC|pc [9] & (\REGS|regs[23][10]~q )))) # (\PC|pc[6]~DUPLICATE_q & (\REGS|regs[23][10]~q )) ) ) ) + + .dataa(!\REGS|regs[23][10]~q ), + .datab(!\PC|pc[6]~DUPLICATE_q ), + .datac(!\PC|pc [9]), + .datad(!\REGS|regs[31][10]~q ), + .datae(!\PC|pc[8]~DUPLICATE_q ), + .dataf(!\PC|pc [7]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux53~6_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux53~6 .extended_lut = "off"; +defparam \REGS|Mux53~6 .lut_mask = 64'h15D5555555555555; +defparam \REGS|Mux53~6 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X35_Y10_N9 +cyclonev_lcell_comb \rt_alu[10]~187 ( +// Equation(s): +// \rt_alu[10]~187_combout = ( \REGS|Mux53~7_combout & ( \REGS|Mux53~6_combout & ( (\ROM|mem~12_combout ) # (\rt_alu[10]~186_combout ) ) ) ) # ( !\REGS|Mux53~7_combout & ( \REGS|Mux53~6_combout & ( (!\ROM|mem~12_combout & (\rt_alu[10]~186_combout )) # +// (\ROM|mem~12_combout & ((\ROM|mem~13_combout ))) ) ) ) # ( \REGS|Mux53~7_combout & ( !\REGS|Mux53~6_combout & ( (!\ROM|mem~12_combout & (\rt_alu[10]~186_combout )) # (\ROM|mem~12_combout & ((!\ROM|mem~13_combout ))) ) ) ) # ( !\REGS|Mux53~7_combout +// & ( !\REGS|Mux53~6_combout & ( (\rt_alu[10]~186_combout & !\ROM|mem~12_combout ) ) ) ) + + .dataa(!\rt_alu[10]~186_combout ), + .datab(gnd), + .datac(!\ROM|mem~13_combout ), + .datad(!\ROM|mem~12_combout ), + .datae(!\REGS|Mux53~7_combout ), + .dataf(!\REGS|Mux53~6_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[10]~187_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[10]~187 .extended_lut = "off"; +defparam \rt_alu[10]~187 .lut_mask = 64'h550055F0550F55FF; +defparam \rt_alu[10]~187 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X35_Y10_N48 +cyclonev_lcell_comb \rt_alu[10]~189 ( +// Equation(s): +// \rt_alu[10]~189_combout = ( \rt_alu[10]~188_combout & ( \rt_alu[10]~187_combout & ( (!\rt_alu[17]~5_combout ) # ((!\rt_alu[17]~4_combout & ((\REGS|Mux53~5_combout ))) # (\rt_alu[17]~4_combout & (\REGS|Mux53~4_combout ))) ) ) ) # ( +// !\rt_alu[10]~188_combout & ( \rt_alu[10]~187_combout & ( (!\rt_alu[17]~5_combout & (\rt_alu[17]~4_combout )) # (\rt_alu[17]~5_combout & ((!\rt_alu[17]~4_combout & ((\REGS|Mux53~5_combout ))) # (\rt_alu[17]~4_combout & (\REGS|Mux53~4_combout )))) ) ) +// ) # ( \rt_alu[10]~188_combout & ( !\rt_alu[10]~187_combout & ( (!\rt_alu[17]~5_combout & (!\rt_alu[17]~4_combout )) # (\rt_alu[17]~5_combout & ((!\rt_alu[17]~4_combout & ((\REGS|Mux53~5_combout ))) # (\rt_alu[17]~4_combout & (\REGS|Mux53~4_combout +// )))) ) ) ) # ( !\rt_alu[10]~188_combout & ( !\rt_alu[10]~187_combout & ( (\rt_alu[17]~5_combout & ((!\rt_alu[17]~4_combout & ((\REGS|Mux53~5_combout ))) # (\rt_alu[17]~4_combout & (\REGS|Mux53~4_combout )))) ) ) ) + + .dataa(!\rt_alu[17]~5_combout ), + .datab(!\rt_alu[17]~4_combout ), + .datac(!\REGS|Mux53~4_combout ), + .datad(!\REGS|Mux53~5_combout ), + .datae(!\rt_alu[10]~188_combout ), + .dataf(!\rt_alu[10]~187_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[10]~189_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[10]~189 .extended_lut = "off"; +defparam \rt_alu[10]~189 .lut_mask = 64'h014589CD2367ABEF; +defparam \rt_alu[10]~189 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X35_Y14_N12 +cyclonev_lcell_comb \REGS|regs[9][10]~feeder ( +// Equation(s): +// \REGS|regs[9][10]~feeder_combout = ( \rd[10]~446_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[10]~446_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[9][10]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[9][10]~feeder .extended_lut = "off"; +defparam \REGS|regs[9][10]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[9][10]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X35_Y14_N14 +dffeas \REGS|regs[9][10] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[9][10]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~29_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[9][10]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[9][10] .is_wysiwyg = "true"; +defparam \REGS|regs[9][10] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X31_Y13_N50 +dffeas \REGS|regs[1][10] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[10]~446_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~28_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[1][10]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[1][10] .is_wysiwyg = "true"; +defparam \REGS|regs[1][10] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X35_Y14_N3 +cyclonev_lcell_comb \REGS|Mux53~0 ( +// Equation(s): +// \REGS|Mux53~0_combout = ( \REGS|regs[1][10]~q & ( \PC|pc [9] ) ) # ( \REGS|regs[1][10]~q & ( !\PC|pc [9] & ( (((\PC|pc[8]~DUPLICATE_q ) # (\REGS|regs[9][10]~q )) # (\PC|pc[6]~DUPLICATE_q )) # (\PC|pc[7]~DUPLICATE_q ) ) ) ) # ( !\REGS|regs[1][10]~q & ( +// !\PC|pc [9] & ( (!\PC|pc[7]~DUPLICATE_q & (!\PC|pc[6]~DUPLICATE_q & (\REGS|regs[9][10]~q & !\PC|pc[8]~DUPLICATE_q ))) ) ) ) + + .dataa(!\PC|pc[7]~DUPLICATE_q ), + .datab(!\PC|pc[6]~DUPLICATE_q ), + .datac(!\REGS|regs[9][10]~q ), + .datad(!\PC|pc[8]~DUPLICATE_q ), + .datae(!\REGS|regs[1][10]~q ), + .dataf(!\PC|pc [9]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux53~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux53~0 .extended_lut = "off"; +defparam \REGS|Mux53~0 .lut_mask = 64'h08007FFF0000FFFF; +defparam \REGS|Mux53~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X35_Y4_N30 +cyclonev_lcell_comb \REGS|regs[8][10]~feeder ( +// Equation(s): +// \REGS|regs[8][10]~feeder_combout = ( \rd[10]~446_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[10]~446_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[8][10]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[8][10]~feeder .extended_lut = "off"; +defparam \REGS|regs[8][10]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[8][10]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X35_Y4_N32 +dffeas \REGS|regs[8][10]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[8][10]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~24_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[8][10]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[8][10]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[8][10]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X35_Y6_N42 +cyclonev_lcell_comb \REGS|Mux53~1 ( +// Equation(s): +// \REGS|Mux53~1_combout = ( \REGS|regs[8][10]~DUPLICATE_q & ( !\PC|pc[8]~DUPLICATE_q & ( (!\PC|pc[6]~DUPLICATE_q & (!\PC|pc [7] & !\PC|pc [9])) ) ) ) + + .dataa(!\PC|pc[6]~DUPLICATE_q ), + .datab(gnd), + .datac(!\PC|pc [7]), + .datad(!\PC|pc [9]), + .datae(!\REGS|regs[8][10]~DUPLICATE_q ), + .dataf(!\PC|pc[8]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux53~1_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux53~1 .extended_lut = "off"; +defparam \REGS|Mux53~1 .lut_mask = 64'h0000A00000000000; +defparam \REGS|Mux53~1 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X28_Y8_N47 +dffeas \REGS|regs[11][10] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[10]~446_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~37_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[11][10]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[11][10] .is_wysiwyg = "true"; +defparam \REGS|regs[11][10] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X28_Y8_N15 +cyclonev_lcell_comb \REGS|regs[2][10]~feeder ( +// Equation(s): +// \REGS|regs[2][10]~feeder_combout = ( \rd[10]~446_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[10]~446_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[2][10]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[2][10]~feeder .extended_lut = "off"; +defparam \REGS|regs[2][10]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[2][10]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X28_Y8_N17 +dffeas \REGS|regs[2][10]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[2][10]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~32_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[2][10]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[2][10]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[2][10]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X28_Y8_N27 +cyclonev_lcell_comb \REGS|regs[10][10]~feeder ( +// Equation(s): +// \REGS|regs[10][10]~feeder_combout = ( \rd[10]~446_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[10]~446_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[10][10]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[10][10]~feeder .extended_lut = "off"; +defparam \REGS|regs[10][10]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[10][10]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X28_Y8_N29 +dffeas \REGS|regs[10][10] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[10][10]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~33_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[10][10]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[10][10] .is_wysiwyg = "true"; +defparam \REGS|regs[10][10] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X28_Y8_N51 +cyclonev_lcell_comb \rt_alu[10]~182 ( +// Equation(s): +// \rt_alu[10]~182_combout = ( \ROM|mem~0_combout & ( \ROM|mem~10_combout & ( \REGS|regs[10][10]~q ) ) ) # ( !\ROM|mem~0_combout & ( \ROM|mem~10_combout & ( \REGS|regs[2][10]~DUPLICATE_q ) ) ) # ( \ROM|mem~0_combout & ( !\ROM|mem~10_combout & ( +// \REGS|regs[11][10]~q ) ) ) # ( !\ROM|mem~0_combout & ( !\ROM|mem~10_combout & ( \REGS|regs[2][10]~DUPLICATE_q ) ) ) + + .dataa(gnd), + .datab(!\REGS|regs[11][10]~q ), + .datac(!\REGS|regs[2][10]~DUPLICATE_q ), + .datad(!\REGS|regs[10][10]~q ), + .datae(!\ROM|mem~0_combout ), + .dataf(!\ROM|mem~10_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[10]~182_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[10]~182 .extended_lut = "off"; +defparam \rt_alu[10]~182 .lut_mask = 64'h0F0F33330F0F00FF; +defparam \rt_alu[10]~182 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X33_Y8_N56 +dffeas \REGS|regs[12][10] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[10]~446_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~26_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[12][10]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[12][10] .is_wysiwyg = "true"; +defparam \REGS|regs[12][10] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X33_Y8_N47 +dffeas \REGS|regs[4][10] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[10]~446_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~22_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[4][10]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[4][10] .is_wysiwyg = "true"; +defparam \REGS|regs[4][10] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X33_Y8_N57 +cyclonev_lcell_comb \REGS|Mux53~3 ( +// Equation(s): +// \REGS|Mux53~3_combout = ( \REGS|regs[4][10]~q & ( \PC|pc[9]~DUPLICATE_q ) ) # ( \REGS|regs[4][10]~q & ( !\PC|pc[9]~DUPLICATE_q & ( (((\REGS|regs[12][10]~q ) # (\PC|pc [6])) # (\PC|pc[7]~DUPLICATE_q )) # (\PC|pc[8]~DUPLICATE_q ) ) ) ) # ( +// !\REGS|regs[4][10]~q & ( !\PC|pc[9]~DUPLICATE_q & ( (!\PC|pc[8]~DUPLICATE_q & (!\PC|pc[7]~DUPLICATE_q & (!\PC|pc [6] & \REGS|regs[12][10]~q ))) ) ) ) + + .dataa(!\PC|pc[8]~DUPLICATE_q ), + .datab(!\PC|pc[7]~DUPLICATE_q ), + .datac(!\PC|pc [6]), + .datad(!\REGS|regs[12][10]~q ), + .datae(!\REGS|regs[4][10]~q ), + .dataf(!\PC|pc[9]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux53~3_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux53~3 .extended_lut = "off"; +defparam \REGS|Mux53~3 .lut_mask = 64'h00807FFF0000FFFF; +defparam \REGS|Mux53~3 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X35_Y6_N26 +dffeas \REGS|regs[14][10] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[10]~446_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~35_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[14][10]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[14][10] .is_wysiwyg = "true"; +defparam \REGS|regs[14][10] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X35_Y10_N20 +dffeas \REGS|regs[15][10] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[10]~446_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~39_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[15][10]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[15][10] .is_wysiwyg = "true"; +defparam \REGS|regs[15][10] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X32_Y6_N37 +dffeas \REGS|regs[6][10] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[10]~446_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~34_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[6][10]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[6][10] .is_wysiwyg = "true"; +defparam \REGS|regs[6][10] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X35_Y10_N21 +cyclonev_lcell_comb \rt_alu[10]~183 ( +// Equation(s): +// \rt_alu[10]~183_combout = ( \ROM|mem~0_combout & ( \REGS|regs[6][10]~q & ( (!\ROM|mem~10_combout & ((\REGS|regs[15][10]~q ))) # (\ROM|mem~10_combout & (\REGS|regs[14][10]~q )) ) ) ) # ( !\ROM|mem~0_combout & ( \REGS|regs[6][10]~q ) ) # ( +// \ROM|mem~0_combout & ( !\REGS|regs[6][10]~q & ( (!\ROM|mem~10_combout & ((\REGS|regs[15][10]~q ))) # (\ROM|mem~10_combout & (\REGS|regs[14][10]~q )) ) ) ) + + .dataa(gnd), + .datab(!\ROM|mem~10_combout ), + .datac(!\REGS|regs[14][10]~q ), + .datad(!\REGS|regs[15][10]~q ), + .datae(!\ROM|mem~0_combout ), + .dataf(!\REGS|regs[6][10]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[10]~183_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[10]~183 .extended_lut = "off"; +defparam \rt_alu[10]~183 .lut_mask = 64'h000003CFFFFF03CF; +defparam \rt_alu[10]~183 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X33_Y8_N17 +dffeas \REGS|regs[13][10] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[10]~446_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~31_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[13][10]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[13][10] .is_wysiwyg = "true"; +defparam \REGS|regs[13][10] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y12_N22 +dffeas \REGS|regs[5][10] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[10]~446_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~30_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[5][10]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[5][10] .is_wysiwyg = "true"; +defparam \REGS|regs[5][10] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X33_Y8_N3 +cyclonev_lcell_comb \REGS|Mux53~2 ( +// Equation(s): +// \REGS|Mux53~2_combout = ( \PC|pc[6]~DUPLICATE_q & ( \REGS|regs[5][10]~q ) ) # ( !\PC|pc[6]~DUPLICATE_q & ( \REGS|regs[5][10]~q & ( (((\PC|pc[9]~DUPLICATE_q ) # (\PC|pc[7]~DUPLICATE_q )) # (\REGS|regs[13][10]~q )) # (\PC|pc[8]~DUPLICATE_q ) ) ) ) # ( +// !\PC|pc[6]~DUPLICATE_q & ( !\REGS|regs[5][10]~q & ( (!\PC|pc[8]~DUPLICATE_q & (\REGS|regs[13][10]~q & (!\PC|pc[7]~DUPLICATE_q & !\PC|pc[9]~DUPLICATE_q ))) ) ) ) + + .dataa(!\PC|pc[8]~DUPLICATE_q ), + .datab(!\REGS|regs[13][10]~q ), + .datac(!\PC|pc[7]~DUPLICATE_q ), + .datad(!\PC|pc[9]~DUPLICATE_q ), + .datae(!\PC|pc[6]~DUPLICATE_q ), + .dataf(!\REGS|regs[5][10]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux53~2_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux53~2 .extended_lut = "off"; +defparam \REGS|Mux53~2 .lut_mask = 64'h200000007FFFFFFF; +defparam \REGS|Mux53~2 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X35_Y10_N12 +cyclonev_lcell_comb \rt_alu[10]~184 ( +// Equation(s): +// \rt_alu[10]~184_combout = ( \rt_alu[10]~183_combout & ( \REGS|Mux53~2_combout & ( ((\ROM|mem~13_combout ) # (\ROM|mem~12_combout )) # (\REGS|Mux53~3_combout ) ) ) ) # ( !\rt_alu[10]~183_combout & ( \REGS|Mux53~2_combout & ( (!\ROM|mem~12_combout & +// ((\ROM|mem~13_combout ) # (\REGS|Mux53~3_combout ))) ) ) ) # ( \rt_alu[10]~183_combout & ( !\REGS|Mux53~2_combout & ( ((\REGS|Mux53~3_combout & !\ROM|mem~13_combout )) # (\ROM|mem~12_combout ) ) ) ) # ( !\rt_alu[10]~183_combout & ( +// !\REGS|Mux53~2_combout & ( (\REGS|Mux53~3_combout & (!\ROM|mem~12_combout & !\ROM|mem~13_combout )) ) ) ) + + .dataa(!\REGS|Mux53~3_combout ), + .datab(gnd), + .datac(!\ROM|mem~12_combout ), + .datad(!\ROM|mem~13_combout ), + .datae(!\rt_alu[10]~183_combout ), + .dataf(!\REGS|Mux53~2_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[10]~184_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[10]~184 .extended_lut = "off"; +defparam \rt_alu[10]~184 .lut_mask = 64'h50005F0F50F05FFF; +defparam \rt_alu[10]~184 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X35_Y10_N30 +cyclonev_lcell_comb \rt_alu[10]~185 ( +// Equation(s): +// \rt_alu[10]~185_combout = ( \rt_alu[10]~182_combout & ( \rt_alu[10]~184_combout & ( ((!\rt_alu[17]~10_combout & ((\REGS|Mux53~1_combout ))) # (\rt_alu[17]~10_combout & (\REGS|Mux53~0_combout ))) # (\rt_alu[17]~11_combout ) ) ) ) # ( +// !\rt_alu[10]~182_combout & ( \rt_alu[10]~184_combout & ( (!\rt_alu[17]~11_combout & ((!\rt_alu[17]~10_combout & ((\REGS|Mux53~1_combout ))) # (\rt_alu[17]~10_combout & (\REGS|Mux53~0_combout )))) # (\rt_alu[17]~11_combout & +// (((!\rt_alu[17]~10_combout )))) ) ) ) # ( \rt_alu[10]~182_combout & ( !\rt_alu[10]~184_combout & ( (!\rt_alu[17]~11_combout & ((!\rt_alu[17]~10_combout & ((\REGS|Mux53~1_combout ))) # (\rt_alu[17]~10_combout & (\REGS|Mux53~0_combout )))) # +// (\rt_alu[17]~11_combout & (((\rt_alu[17]~10_combout )))) ) ) ) # ( !\rt_alu[10]~182_combout & ( !\rt_alu[10]~184_combout & ( (!\rt_alu[17]~11_combout & ((!\rt_alu[17]~10_combout & ((\REGS|Mux53~1_combout ))) # (\rt_alu[17]~10_combout & +// (\REGS|Mux53~0_combout )))) ) ) ) + + .dataa(!\REGS|Mux53~0_combout ), + .datab(!\rt_alu[17]~11_combout ), + .datac(!\REGS|Mux53~1_combout ), + .datad(!\rt_alu[17]~10_combout ), + .datae(!\rt_alu[10]~182_combout ), + .dataf(!\rt_alu[10]~184_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[10]~185_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[10]~185 .extended_lut = "off"; +defparam \rt_alu[10]~185 .lut_mask = 64'h0C440C773F443F77; +defparam \rt_alu[10]~185 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X36_Y10_N21 +cyclonev_lcell_comb \rt_alu[10]~190 ( +// Equation(s): +// \rt_alu[10]~190_combout = ( \rt_alu[10]~189_combout & ( \rt_alu[10]~185_combout & ( (!\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout ) # (\ROM|mem~9_combout ) ) ) ) # ( !\rt_alu[10]~189_combout & ( \rt_alu[10]~185_combout & ( !\ROM|mem~9_combout $ +// (\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout ) ) ) ) # ( \rt_alu[10]~189_combout & ( !\rt_alu[10]~185_combout & ( \ROM|mem~9_combout ) ) ) # ( !\rt_alu[10]~189_combout & ( !\rt_alu[10]~185_combout & ( (\ROM|mem~9_combout & +// \CONTROL_UNIT|CLASSIFIER|Equal0~1_combout ) ) ) ) + + .dataa(gnd), + .datab(gnd), + .datac(!\ROM|mem~9_combout ), + .datad(!\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout ), + .datae(!\rt_alu[10]~189_combout ), + .dataf(!\rt_alu[10]~185_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[10]~190_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[10]~190 .extended_lut = "off"; +defparam \rt_alu[10]~190 .lut_mask = 64'h000F0F0FF00FFF0F; +defparam \rt_alu[10]~190 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y6_N21 +cyclonev_lcell_comb \ALU|Mux21~0 ( +// Equation(s): +// \ALU|Mux21~0_combout = ( \rt_alu[10]~190_combout & ( \REGS|Mux21~2_combout & ( (\ALU|Mux15~0_combout & \CONTROL_UNIT|ALU_FN [1]) ) ) ) # ( !\rt_alu[10]~190_combout & ( \REGS|Mux21~2_combout & ( ((\ALU|Mux15~0_combout & (\CONTROL_UNIT|ALU_FN [1] & +// !\CONTROL_UNIT|ALU_FN [0]))) # (\ALU|Mux29~1_combout ) ) ) ) # ( \rt_alu[10]~190_combout & ( !\REGS|Mux21~2_combout & ( ((\ALU|Mux15~0_combout & (\CONTROL_UNIT|ALU_FN [1] & !\CONTROL_UNIT|ALU_FN [0]))) # (\ALU|Mux29~1_combout ) ) ) ) # ( +// !\rt_alu[10]~190_combout & ( !\REGS|Mux21~2_combout & ( (\ALU|Mux15~0_combout & !\CONTROL_UNIT|ALU_FN [1]) ) ) ) + + .dataa(!\ALU|Mux15~0_combout ), + .datab(!\CONTROL_UNIT|ALU_FN [1]), + .datac(!\ALU|Mux29~1_combout ), + .datad(!\CONTROL_UNIT|ALU_FN [0]), + .datae(!\rt_alu[10]~190_combout ), + .dataf(!\REGS|Mux21~2_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\ALU|Mux21~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \ALU|Mux21~0 .extended_lut = "off"; +defparam \ALU|Mux21~0 .lut_mask = 64'h44441F0F1F0F1111; +defparam \ALU|Mux21~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X36_Y12_N43 +dffeas \REGS|regs[8][9]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[9]~444_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~24_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[8][9]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[8][9]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[8][9]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X35_Y11_N33 +cyclonev_lcell_comb \REGS|Mux54~6 ( +// Equation(s): +// \REGS|Mux54~6_combout = ( !\PC|pc [6] & ( \REGS|regs[8][9]~DUPLICATE_q & ( (!\PC|pc [7] & (!\PC|pc [9] & !\PC|pc [8])) ) ) ) + + .dataa(gnd), + .datab(!\PC|pc [7]), + .datac(!\PC|pc [9]), + .datad(!\PC|pc [8]), + .datae(!\PC|pc [6]), + .dataf(!\REGS|regs[8][9]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux54~6_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux54~6 .extended_lut = "off"; +defparam \REGS|Mux54~6 .lut_mask = 64'h00000000C0000000; +defparam \REGS|Mux54~6 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X28_Y11_N36 +cyclonev_lcell_comb \REGS|regs[2][9]~feeder ( +// Equation(s): +// \REGS|regs[2][9]~feeder_combout = ( \rd[9]~444_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[9]~444_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[2][9]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[2][9]~feeder .extended_lut = "off"; +defparam \REGS|regs[2][9]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[2][9]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X28_Y11_N37 +dffeas \REGS|regs[2][9] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[2][9]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~32_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[2][9]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[2][9] .is_wysiwyg = "true"; +defparam \REGS|regs[2][9] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X27_Y6_N12 +cyclonev_lcell_comb \REGS|regs[10][9]~feeder ( +// Equation(s): +// \REGS|regs[10][9]~feeder_combout = ( \rd[9]~444_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[9]~444_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[10][9]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[10][9]~feeder .extended_lut = "off"; +defparam \REGS|regs[10][9]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[10][9]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X27_Y6_N13 +dffeas \REGS|regs[10][9] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[10][9]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~33_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[10][9]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[10][9] .is_wysiwyg = "true"; +defparam \REGS|regs[10][9] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X33_Y11_N56 +dffeas \REGS|regs[11][9] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[9]~444_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~37_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[11][9]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[11][9] .is_wysiwyg = "true"; +defparam \REGS|regs[11][9] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X33_Y11_N57 +cyclonev_lcell_comb \rt_alu[9]~163 ( +// Equation(s): +// \rt_alu[9]~163_combout = ( \ROM|mem~10_combout & ( \ROM|mem~0_combout & ( \REGS|regs[10][9]~q ) ) ) # ( !\ROM|mem~10_combout & ( \ROM|mem~0_combout & ( \REGS|regs[11][9]~q ) ) ) # ( \ROM|mem~10_combout & ( !\ROM|mem~0_combout & ( +// \REGS|regs[2][9]~q ) ) ) # ( !\ROM|mem~10_combout & ( !\ROM|mem~0_combout & ( \REGS|regs[2][9]~q ) ) ) + + .dataa(!\REGS|regs[2][9]~q ), + .datab(gnd), + .datac(!\REGS|regs[10][9]~q ), + .datad(!\REGS|regs[11][9]~q ), + .datae(!\ROM|mem~10_combout ), + .dataf(!\ROM|mem~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[9]~163_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[9]~163 .extended_lut = "off"; +defparam \rt_alu[9]~163 .lut_mask = 64'h5555555500FF0F0F; +defparam \rt_alu[9]~163 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X33_Y6_N6 +cyclonev_lcell_comb \REGS|regs[1][9]~feeder ( +// Equation(s): +// \REGS|regs[1][9]~feeder_combout = ( \rd[9]~444_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[9]~444_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[1][9]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[1][9]~feeder .extended_lut = "off"; +defparam \REGS|regs[1][9]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[1][9]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X33_Y6_N8 +dffeas \REGS|regs[1][9] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[1][9]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~28_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[1][9]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[1][9] .is_wysiwyg = "true"; +defparam \REGS|regs[1][9] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X36_Y12_N32 +dffeas \REGS|regs[9][9]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[9]~444_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~29_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[9][9]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[9][9]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[9][9]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X33_Y6_N36 +cyclonev_lcell_comb \REGS|Mux54~5 ( +// Equation(s): +// \REGS|Mux54~5_combout = ( \PC|pc [9] & ( \REGS|regs[9][9]~DUPLICATE_q & ( \REGS|regs[1][9]~q ) ) ) # ( !\PC|pc [9] & ( \REGS|regs[9][9]~DUPLICATE_q & ( ((!\PC|pc[6]~DUPLICATE_q & (!\PC|pc [7] & !\PC|pc[8]~DUPLICATE_q ))) # (\REGS|regs[1][9]~q ) ) ) ) +// # ( \PC|pc [9] & ( !\REGS|regs[9][9]~DUPLICATE_q & ( \REGS|regs[1][9]~q ) ) ) # ( !\PC|pc [9] & ( !\REGS|regs[9][9]~DUPLICATE_q & ( (\REGS|regs[1][9]~q & (((\PC|pc[8]~DUPLICATE_q ) # (\PC|pc [7])) # (\PC|pc[6]~DUPLICATE_q ))) ) ) ) + + .dataa(!\PC|pc[6]~DUPLICATE_q ), + .datab(!\REGS|regs[1][9]~q ), + .datac(!\PC|pc [7]), + .datad(!\PC|pc[8]~DUPLICATE_q ), + .datae(!\PC|pc [9]), + .dataf(!\REGS|regs[9][9]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux54~5_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux54~5 .extended_lut = "off"; +defparam \REGS|Mux54~5 .lut_mask = 64'h13333333B3333333; +defparam \REGS|Mux54~5 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X30_Y11_N12 +cyclonev_lcell_comb \REGS|regs[12][9]~feeder ( +// Equation(s): +// \REGS|regs[12][9]~feeder_combout = ( \rd[9]~444_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[9]~444_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[12][9]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[12][9]~feeder .extended_lut = "off"; +defparam \REGS|regs[12][9]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[12][9]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X30_Y11_N14 +dffeas \REGS|regs[12][9]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[12][9]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~26_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[12][9]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[12][9]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[12][9]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X30_Y11_N42 +cyclonev_lcell_comb \REGS|regs[4][9]~feeder ( +// Equation(s): +// \REGS|regs[4][9]~feeder_combout = ( \rd[9]~444_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[9]~444_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[4][9]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[4][9]~feeder .extended_lut = "off"; +defparam \REGS|regs[4][9]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[4][9]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X30_Y11_N44 +dffeas \REGS|regs[4][9] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[4][9]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~22_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[4][9]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[4][9] .is_wysiwyg = "true"; +defparam \REGS|regs[4][9] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X30_Y11_N51 +cyclonev_lcell_comb \REGS|Mux54~0 ( +// Equation(s): +// \REGS|Mux54~0_combout = ( \PC|pc[7]~DUPLICATE_q & ( \PC|pc[8]~DUPLICATE_q & ( \REGS|regs[4][9]~q ) ) ) # ( !\PC|pc[7]~DUPLICATE_q & ( \PC|pc[8]~DUPLICATE_q & ( \REGS|regs[4][9]~q ) ) ) # ( \PC|pc[7]~DUPLICATE_q & ( !\PC|pc[8]~DUPLICATE_q & ( +// \REGS|regs[4][9]~q ) ) ) # ( !\PC|pc[7]~DUPLICATE_q & ( !\PC|pc[8]~DUPLICATE_q & ( (!\PC|pc [6] & ((!\PC|pc [9] & (\REGS|regs[12][9]~DUPLICATE_q )) # (\PC|pc [9] & ((\REGS|regs[4][9]~q ))))) # (\PC|pc [6] & (((\REGS|regs[4][9]~q )))) ) ) ) + + .dataa(!\PC|pc [6]), + .datab(!\REGS|regs[12][9]~DUPLICATE_q ), + .datac(!\REGS|regs[4][9]~q ), + .datad(!\PC|pc [9]), + .datae(!\PC|pc[7]~DUPLICATE_q ), + .dataf(!\PC|pc[8]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux54~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux54~0 .extended_lut = "off"; +defparam \REGS|Mux54~0 .lut_mask = 64'h270F0F0F0F0F0F0F; +defparam \REGS|Mux54~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X33_Y11_N38 +dffeas \REGS|regs[5][9] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[9]~444_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~30_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[5][9]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[5][9] .is_wysiwyg = "true"; +defparam \REGS|regs[5][9] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X33_Y14_N25 +dffeas \REGS|regs[13][9] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[9]~444_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~31_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[13][9]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[13][9] .is_wysiwyg = "true"; +defparam \REGS|regs[13][9] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X33_Y11_N39 +cyclonev_lcell_comb \REGS|Mux54~1 ( +// Equation(s): +// \REGS|Mux54~1_combout = ( \PC|pc[6]~DUPLICATE_q & ( \PC|pc [8] & ( \REGS|regs[5][9]~q ) ) ) # ( !\PC|pc[6]~DUPLICATE_q & ( \PC|pc [8] & ( \REGS|regs[5][9]~q ) ) ) # ( \PC|pc[6]~DUPLICATE_q & ( !\PC|pc [8] & ( \REGS|regs[5][9]~q ) ) ) # ( +// !\PC|pc[6]~DUPLICATE_q & ( !\PC|pc [8] & ( (!\PC|pc[7]~DUPLICATE_q & ((!\PC|pc [9] & ((\REGS|regs[13][9]~q ))) # (\PC|pc [9] & (\REGS|regs[5][9]~q )))) # (\PC|pc[7]~DUPLICATE_q & (\REGS|regs[5][9]~q )) ) ) ) + + .dataa(!\REGS|regs[5][9]~q ), + .datab(!\PC|pc[7]~DUPLICATE_q ), + .datac(!\REGS|regs[13][9]~q ), + .datad(!\PC|pc [9]), + .datae(!\PC|pc[6]~DUPLICATE_q ), + .dataf(!\PC|pc [8]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux54~1_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux54~1 .extended_lut = "off"; +defparam \REGS|Mux54~1 .lut_mask = 64'h1D55555555555555; +defparam \REGS|Mux54~1 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X27_Y7_N27 +cyclonev_lcell_comb \REGS|regs[14][9]~feeder ( +// Equation(s): +// \REGS|regs[14][9]~feeder_combout = ( \rd[9]~444_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[9]~444_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[14][9]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[14][9]~feeder .extended_lut = "off"; +defparam \REGS|regs[14][9]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[14][9]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X27_Y7_N29 +dffeas \REGS|regs[14][9] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[14][9]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~35_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[14][9]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[14][9] .is_wysiwyg = "true"; +defparam \REGS|regs[14][9] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X27_Y7_N30 +cyclonev_lcell_comb \REGS|regs[6][9]~feeder ( +// Equation(s): +// \REGS|regs[6][9]~feeder_combout = ( \rd[9]~444_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[9]~444_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[6][9]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[6][9]~feeder .extended_lut = "off"; +defparam \REGS|regs[6][9]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[6][9]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X27_Y7_N32 +dffeas \REGS|regs[6][9] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[6][9]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~34_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[6][9]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[6][9] .is_wysiwyg = "true"; +defparam \REGS|regs[6][9] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y7_N53 +dffeas \REGS|regs[15][9] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[9]~444_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~39_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[15][9]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[15][9] .is_wysiwyg = "true"; +defparam \REGS|regs[15][9] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X27_Y7_N15 +cyclonev_lcell_comb \rt_alu[9]~164 ( +// Equation(s): +// \rt_alu[9]~164_combout = ( \ROM|mem~10_combout & ( \ROM|mem~0_combout & ( \REGS|regs[14][9]~q ) ) ) # ( !\ROM|mem~10_combout & ( \ROM|mem~0_combout & ( \REGS|regs[15][9]~q ) ) ) # ( \ROM|mem~10_combout & ( !\ROM|mem~0_combout & ( +// \REGS|regs[6][9]~q ) ) ) # ( !\ROM|mem~10_combout & ( !\ROM|mem~0_combout & ( \REGS|regs[6][9]~q ) ) ) + + .dataa(!\REGS|regs[14][9]~q ), + .datab(gnd), + .datac(!\REGS|regs[6][9]~q ), + .datad(!\REGS|regs[15][9]~q ), + .datae(!\ROM|mem~10_combout ), + .dataf(!\ROM|mem~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[9]~164_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[9]~164 .extended_lut = "off"; +defparam \rt_alu[9]~164 .lut_mask = 64'h0F0F0F0F00FF5555; +defparam \rt_alu[9]~164 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X33_Y11_N6 +cyclonev_lcell_comb \rt_alu[9]~165 ( +// Equation(s): +// \rt_alu[9]~165_combout = ( \ROM|mem~13_combout & ( \rt_alu[9]~164_combout & ( (\REGS|Mux54~1_combout ) # (\ROM|mem~12_combout ) ) ) ) # ( !\ROM|mem~13_combout & ( \rt_alu[9]~164_combout & ( (\REGS|Mux54~0_combout ) # (\ROM|mem~12_combout ) ) ) ) # ( +// \ROM|mem~13_combout & ( !\rt_alu[9]~164_combout & ( (!\ROM|mem~12_combout & \REGS|Mux54~1_combout ) ) ) ) # ( !\ROM|mem~13_combout & ( !\rt_alu[9]~164_combout & ( (!\ROM|mem~12_combout & \REGS|Mux54~0_combout ) ) ) ) + + .dataa(gnd), + .datab(!\ROM|mem~12_combout ), + .datac(!\REGS|Mux54~0_combout ), + .datad(!\REGS|Mux54~1_combout ), + .datae(!\ROM|mem~13_combout ), + .dataf(!\rt_alu[9]~164_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[9]~165_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[9]~165 .extended_lut = "off"; +defparam \rt_alu[9]~165 .lut_mask = 64'h0C0C00CC3F3F33FF; +defparam \rt_alu[9]~165 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X33_Y11_N18 +cyclonev_lcell_comb \rt_alu[9]~166 ( +// Equation(s): +// \rt_alu[9]~166_combout = ( \REGS|Mux54~5_combout & ( \rt_alu[9]~165_combout & ( (!\rt_alu[17]~10_combout & (((\rt_alu[17]~11_combout )) # (\REGS|Mux54~6_combout ))) # (\rt_alu[17]~10_combout & (((!\rt_alu[17]~11_combout ) # (\rt_alu[9]~163_combout +// )))) ) ) ) # ( !\REGS|Mux54~5_combout & ( \rt_alu[9]~165_combout & ( (!\rt_alu[17]~10_combout & (((\rt_alu[17]~11_combout )) # (\REGS|Mux54~6_combout ))) # (\rt_alu[17]~10_combout & (((\rt_alu[9]~163_combout & \rt_alu[17]~11_combout )))) ) ) ) # ( +// \REGS|Mux54~5_combout & ( !\rt_alu[9]~165_combout & ( (!\rt_alu[17]~10_combout & (\REGS|Mux54~6_combout & ((!\rt_alu[17]~11_combout )))) # (\rt_alu[17]~10_combout & (((!\rt_alu[17]~11_combout ) # (\rt_alu[9]~163_combout )))) ) ) ) # ( +// !\REGS|Mux54~5_combout & ( !\rt_alu[9]~165_combout & ( (!\rt_alu[17]~10_combout & (\REGS|Mux54~6_combout & ((!\rt_alu[17]~11_combout )))) # (\rt_alu[17]~10_combout & (((\rt_alu[9]~163_combout & \rt_alu[17]~11_combout )))) ) ) ) + + .dataa(!\REGS|Mux54~6_combout ), + .datab(!\rt_alu[17]~10_combout ), + .datac(!\rt_alu[9]~163_combout ), + .datad(!\rt_alu[17]~11_combout ), + .datae(!\REGS|Mux54~5_combout ), + .dataf(!\rt_alu[9]~165_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[9]~166_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[9]~166 .extended_lut = "off"; +defparam \rt_alu[9]~166 .lut_mask = 64'h4403770344CF77CF; +defparam \rt_alu[9]~166 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X33_Y11_N51 +cyclonev_lcell_comb \rt_alu[9]~171 ( +// Equation(s): +// \rt_alu[9]~171_combout = ( \rt_alu[9]~166_combout & ( (!\ROM|mem~9_combout & (!\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout )) # (\ROM|mem~9_combout & ((\rt_alu[9]~170_combout ) # (\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout ))) ) ) # ( +// !\rt_alu[9]~166_combout & ( (\ROM|mem~9_combout & ((\rt_alu[9]~170_combout ) # (\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout ))) ) ) + + .dataa(!\ROM|mem~9_combout ), + .datab(gnd), + .datac(!\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout ), + .datad(!\rt_alu[9]~170_combout ), + .datae(gnd), + .dataf(!\rt_alu[9]~166_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[9]~171_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[9]~171 .extended_lut = "off"; +defparam \rt_alu[9]~171 .lut_mask = 64'h05550555A5F5A5F5; +defparam \rt_alu[9]~171 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X36_Y12_N44 +dffeas \REGS|regs[8][9] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[9]~444_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~24_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[8][9]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[8][9] .is_wysiwyg = "true"; +defparam \REGS|regs[8][9] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X36_Y12_N33 +cyclonev_lcell_comb \REGS|Mux22~1 ( +// Equation(s): +// \REGS|Mux22~1_combout = ( \ROM|mem~0_combout & ( \ROM|mem~15_combout & ( \REGS|regs[9][9]~DUPLICATE_q ) ) ) # ( \ROM|mem~0_combout & ( !\ROM|mem~15_combout & ( \REGS|regs[8][9]~q ) ) ) + + .dataa(gnd), + .datab(!\REGS|regs[9][9]~DUPLICATE_q ), + .datac(!\REGS|regs[8][9]~q ), + .datad(gnd), + .datae(!\ROM|mem~0_combout ), + .dataf(!\ROM|mem~15_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux22~1_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux22~1 .extended_lut = "off"; +defparam \REGS|Mux22~1 .lut_mask = 64'h00000F0F00003333; +defparam \REGS|Mux22~1 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X33_Y13_N26 +dffeas \REGS|regs[30][9] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[9]~444_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~10_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[30][9]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[30][9] .is_wysiwyg = "true"; +defparam \REGS|regs[30][9] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X33_Y13_N14 +dffeas \REGS|regs[22][9] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[9]~444_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~9_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[22][9]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[22][9] .is_wysiwyg = "true"; +defparam \REGS|regs[22][9] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X33_Y13_N3 +cyclonev_lcell_comb \REGS|Mux54~2 ( +// Equation(s): +// \REGS|Mux54~2_combout = ( \PC|pc[8]~DUPLICATE_q & ( \PC|pc [7] & ( \REGS|regs[22][9]~q ) ) ) # ( !\PC|pc[8]~DUPLICATE_q & ( \PC|pc [7] & ( \REGS|regs[22][9]~q ) ) ) # ( \PC|pc[8]~DUPLICATE_q & ( !\PC|pc [7] & ( \REGS|regs[22][9]~q ) ) ) # ( +// !\PC|pc[8]~DUPLICATE_q & ( !\PC|pc [7] & ( (!\PC|pc [9] & ((!\PC|pc [6] & (\REGS|regs[30][9]~q )) # (\PC|pc [6] & ((\REGS|regs[22][9]~q ))))) # (\PC|pc [9] & (((\REGS|regs[22][9]~q )))) ) ) ) + + .dataa(!\REGS|regs[30][9]~q ), + .datab(!\REGS|regs[22][9]~q ), + .datac(!\PC|pc [9]), + .datad(!\PC|pc [6]), + .datae(!\PC|pc[8]~DUPLICATE_q ), + .dataf(!\PC|pc [7]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux54~2_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux54~2 .extended_lut = "off"; +defparam \REGS|Mux54~2 .lut_mask = 64'h5333333333333333; +defparam \REGS|Mux54~2 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X36_Y12_N23 +dffeas \REGS|regs[31][9] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[9]~444_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~19_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[31][9]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[31][9] .is_wysiwyg = "true"; +defparam \REGS|regs[31][9] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X33_Y11_N44 +dffeas \REGS|regs[23][9] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[9]~444_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~18_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[23][9]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[23][9] .is_wysiwyg = "true"; +defparam \REGS|regs[23][9] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X33_Y11_N45 +cyclonev_lcell_comb \REGS|Mux54~3 ( +// Equation(s): +// \REGS|Mux54~3_combout = ( \PC|pc[6]~DUPLICATE_q & ( \PC|pc [8] & ( \REGS|regs[23][9]~q ) ) ) # ( !\PC|pc[6]~DUPLICATE_q & ( \PC|pc [8] & ( \REGS|regs[23][9]~q ) ) ) # ( \PC|pc[6]~DUPLICATE_q & ( !\PC|pc [8] & ( \REGS|regs[23][9]~q ) ) ) # ( +// !\PC|pc[6]~DUPLICATE_q & ( !\PC|pc [8] & ( (!\PC|pc[7]~DUPLICATE_q & ((!\PC|pc [9] & (\REGS|regs[31][9]~q )) # (\PC|pc [9] & ((\REGS|regs[23][9]~q ))))) # (\PC|pc[7]~DUPLICATE_q & (((\REGS|regs[23][9]~q )))) ) ) ) + + .dataa(!\PC|pc[7]~DUPLICATE_q ), + .datab(!\REGS|regs[31][9]~q ), + .datac(!\REGS|regs[23][9]~q ), + .datad(!\PC|pc [9]), + .datae(!\PC|pc[6]~DUPLICATE_q ), + .dataf(!\PC|pc [8]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux54~3_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux54~3 .extended_lut = "off"; +defparam \REGS|Mux54~3 .lut_mask = 64'h270F0F0F0F0F0F0F; +defparam \REGS|Mux54~3 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X33_Y11_N30 +cyclonev_lcell_comb \REGS|Mux22~0 ( +// Equation(s): +// \REGS|Mux22~0_combout = ( \REGS|Mux54~3_combout & ( \ROM|mem~16_combout & ( (\ROM|mem~9_combout ) # (\REGS|Mux54~1_combout ) ) ) ) # ( !\REGS|Mux54~3_combout & ( \ROM|mem~16_combout & ( (\REGS|Mux54~1_combout & !\ROM|mem~9_combout ) ) ) ) # ( +// \REGS|Mux54~3_combout & ( !\ROM|mem~16_combout & ( (!\ROM|mem~9_combout & ((\REGS|Mux54~0_combout ))) # (\ROM|mem~9_combout & (\REGS|Mux54~2_combout )) ) ) ) # ( !\REGS|Mux54~3_combout & ( !\ROM|mem~16_combout & ( (!\ROM|mem~9_combout & +// ((\REGS|Mux54~0_combout ))) # (\ROM|mem~9_combout & (\REGS|Mux54~2_combout )) ) ) ) + + .dataa(!\REGS|Mux54~2_combout ), + .datab(!\REGS|Mux54~1_combout ), + .datac(!\ROM|mem~9_combout ), + .datad(!\REGS|Mux54~0_combout ), + .datae(!\REGS|Mux54~3_combout ), + .dataf(!\ROM|mem~16_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux22~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux22~0 .extended_lut = "off"; +defparam \REGS|Mux22~0 .lut_mask = 64'h05F505F530303F3F; +defparam \REGS|Mux22~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X33_Y11_N48 +cyclonev_lcell_comb \REGS|Mux22~2 ( +// Equation(s): +// \REGS|Mux22~2_combout = ( \REGS|Mux22~0_combout & ( (((\ROM|mem~9_combout & \REGS|Mux54~4_combout )) # (\REGS|Mux22~1_combout )) # (\ROM|mem~17_combout ) ) ) # ( !\REGS|Mux22~0_combout & ( (!\ROM|mem~17_combout & (((\ROM|mem~9_combout & +// \REGS|Mux54~4_combout )) # (\REGS|Mux22~1_combout ))) ) ) + + .dataa(!\ROM|mem~9_combout ), + .datab(!\ROM|mem~17_combout ), + .datac(!\REGS|Mux22~1_combout ), + .datad(!\REGS|Mux54~4_combout ), + .datae(gnd), + .dataf(!\REGS|Mux22~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux22~2_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux22~2 .extended_lut = "off"; +defparam \REGS|Mux22~2 .lut_mask = 64'h0C4C0C4C3F7F3F7F; +defparam \REGS|Mux22~2 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y6_N15 +cyclonev_lcell_comb \ALU|Mux22~0 ( +// Equation(s): +// \ALU|Mux22~0_combout = ( \rt_alu[9]~171_combout & ( \REGS|Mux22~2_combout & ( (\ALU|Mux15~0_combout & \CONTROL_UNIT|ALU_FN [1]) ) ) ) # ( !\rt_alu[9]~171_combout & ( \REGS|Mux22~2_combout & ( ((\ALU|Mux15~0_combout & (\CONTROL_UNIT|ALU_FN [1] & +// !\CONTROL_UNIT|ALU_FN [0]))) # (\ALU|Mux29~1_combout ) ) ) ) # ( \rt_alu[9]~171_combout & ( !\REGS|Mux22~2_combout & ( ((\ALU|Mux15~0_combout & (\CONTROL_UNIT|ALU_FN [1] & !\CONTROL_UNIT|ALU_FN [0]))) # (\ALU|Mux29~1_combout ) ) ) ) # ( +// !\rt_alu[9]~171_combout & ( !\REGS|Mux22~2_combout & ( (\ALU|Mux15~0_combout & !\CONTROL_UNIT|ALU_FN [1]) ) ) ) + + .dataa(!\ALU|Mux15~0_combout ), + .datab(!\ALU|Mux29~1_combout ), + .datac(!\CONTROL_UNIT|ALU_FN [1]), + .datad(!\CONTROL_UNIT|ALU_FN [0]), + .datae(!\rt_alu[9]~171_combout ), + .dataf(!\REGS|Mux22~2_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\ALU|Mux22~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \ALU|Mux22~0 .extended_lut = "off"; +defparam \ALU|Mux22~0 .lut_mask = 64'h5050373337330505; +defparam \ALU|Mux22~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X33_Y12_N38 +dffeas \REGS|regs[26][8] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[8]~442_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~6_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[26][8]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[26][8] .is_wysiwyg = "true"; +defparam \REGS|regs[26][8] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X33_Y12_N59 +dffeas \REGS|regs[18][8]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[8]~442_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~5_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[18][8]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[18][8]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[18][8]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X33_Y12_N39 +cyclonev_lcell_comb \REGS|Mux55~4 ( +// Equation(s): +// \REGS|Mux55~4_combout = ( \PC|pc [7] & ( \PC|pc [9] & ( \REGS|regs[18][8]~DUPLICATE_q ) ) ) # ( !\PC|pc [7] & ( \PC|pc [9] & ( \REGS|regs[18][8]~DUPLICATE_q ) ) ) # ( \PC|pc [7] & ( !\PC|pc [9] & ( \REGS|regs[18][8]~DUPLICATE_q ) ) ) # ( !\PC|pc [7] & +// ( !\PC|pc [9] & ( (!\PC|pc [8] & ((!\PC|pc [6] & (\REGS|regs[26][8]~q )) # (\PC|pc [6] & ((\REGS|regs[18][8]~DUPLICATE_q ))))) # (\PC|pc [8] & (((\REGS|regs[18][8]~DUPLICATE_q )))) ) ) ) + + .dataa(!\REGS|regs[26][8]~q ), + .datab(!\REGS|regs[18][8]~DUPLICATE_q ), + .datac(!\PC|pc [8]), + .datad(!\PC|pc [6]), + .datae(!\PC|pc [7]), + .dataf(!\PC|pc [9]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux55~4_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux55~4 .extended_lut = "off"; +defparam \REGS|Mux55~4 .lut_mask = 64'h5333333333333333; +defparam \REGS|Mux55~4 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X36_Y14_N54 +cyclonev_lcell_comb \REGS|regs[8][8]~feeder ( +// Equation(s): +// \REGS|regs[8][8]~feeder_combout = ( \rd[8]~442_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[8]~442_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[8][8]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[8][8]~feeder .extended_lut = "off"; +defparam \REGS|regs[8][8]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[8][8]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X36_Y14_N56 +dffeas \REGS|regs[8][8] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[8][8]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~24_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[8][8]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[8][8] .is_wysiwyg = "true"; +defparam \REGS|regs[8][8] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X35_Y11_N21 +cyclonev_lcell_comb \REGS|Mux23~1 ( +// Equation(s): +// \REGS|Mux23~1_combout = ( \ROM|mem~15_combout & ( (\ROM|mem~0_combout & \REGS|regs[9][8]~DUPLICATE_q ) ) ) # ( !\ROM|mem~15_combout & ( (\ROM|mem~0_combout & \REGS|regs[8][8]~q ) ) ) + + .dataa(gnd), + .datab(!\ROM|mem~0_combout ), + .datac(!\REGS|regs[8][8]~q ), + .datad(!\REGS|regs[9][8]~DUPLICATE_q ), + .datae(gnd), + .dataf(!\ROM|mem~15_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux23~1_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux23~1 .extended_lut = "off"; +defparam \REGS|Mux23~1 .lut_mask = 64'h0303030300330033; +defparam \REGS|Mux23~1 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X37_Y12_N29 +dffeas \REGS|regs[30][8]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[8]~442_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~10_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[30][8]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[30][8]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[30][8]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: FF_X37_Y12_N44 +dffeas \REGS|regs[22][8] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[8]~442_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~9_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[22][8]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[22][8] .is_wysiwyg = "true"; +defparam \REGS|regs[22][8] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y12_N54 +cyclonev_lcell_comb \REGS|Mux55~7 ( +// Equation(s): +// \REGS|Mux55~7_combout = ( \PC|pc [6] & ( \PC|pc [9] & ( \REGS|regs[22][8]~q ) ) ) # ( !\PC|pc [6] & ( \PC|pc [9] & ( \REGS|regs[22][8]~q ) ) ) # ( \PC|pc [6] & ( !\PC|pc [9] & ( \REGS|regs[22][8]~q ) ) ) # ( !\PC|pc [6] & ( !\PC|pc [9] & ( +// (!\PC|pc[8]~DUPLICATE_q & ((!\PC|pc [7] & (\REGS|regs[30][8]~DUPLICATE_q )) # (\PC|pc [7] & ((\REGS|regs[22][8]~q ))))) # (\PC|pc[8]~DUPLICATE_q & (((\REGS|regs[22][8]~q )))) ) ) ) + + .dataa(!\REGS|regs[30][8]~DUPLICATE_q ), + .datab(!\REGS|regs[22][8]~q ), + .datac(!\PC|pc[8]~DUPLICATE_q ), + .datad(!\PC|pc [7]), + .datae(!\PC|pc [6]), + .dataf(!\PC|pc [9]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux55~7_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux55~7 .extended_lut = "off"; +defparam \REGS|Mux55~7 .lut_mask = 64'h5333333333333333; +defparam \REGS|Mux55~7 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X36_Y4_N23 +dffeas \REGS|regs[5][8] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[8]~442_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~30_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[5][8]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[5][8] .is_wysiwyg = "true"; +defparam \REGS|regs[5][8] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X36_Y4_N32 +dffeas \REGS|regs[13][8] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[8]~442_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~31_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[13][8]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[13][8] .is_wysiwyg = "true"; +defparam \REGS|regs[13][8] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X36_Y4_N42 +cyclonev_lcell_comb \REGS|Mux55~2 ( +// Equation(s): +// \REGS|Mux55~2_combout = ( \PC|pc [9] & ( \PC|pc [7] & ( \REGS|regs[5][8]~q ) ) ) # ( !\PC|pc [9] & ( \PC|pc [7] & ( \REGS|regs[5][8]~q ) ) ) # ( \PC|pc [9] & ( !\PC|pc [7] & ( \REGS|regs[5][8]~q ) ) ) # ( !\PC|pc [9] & ( !\PC|pc [7] & ( +// (!\PC|pc[6]~DUPLICATE_q & ((!\PC|pc [8] & ((\REGS|regs[13][8]~q ))) # (\PC|pc [8] & (\REGS|regs[5][8]~q )))) # (\PC|pc[6]~DUPLICATE_q & (\REGS|regs[5][8]~q )) ) ) ) + + .dataa(!\REGS|regs[5][8]~q ), + .datab(!\REGS|regs[13][8]~q ), + .datac(!\PC|pc[6]~DUPLICATE_q ), + .datad(!\PC|pc [8]), + .datae(!\PC|pc [9]), + .dataf(!\PC|pc [7]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux55~2_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux55~2 .extended_lut = "off"; +defparam \REGS|Mux55~2 .lut_mask = 64'h3555555555555555; +defparam \REGS|Mux55~2 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X33_Y8_N53 +dffeas \REGS|regs[4][8] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[8]~442_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~22_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[4][8]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[4][8] .is_wysiwyg = "true"; +defparam \REGS|regs[4][8] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X33_Y8_N35 +dffeas \REGS|regs[12][8]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[8]~442_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~26_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[12][8]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[12][8]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[12][8]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X33_Y8_N30 +cyclonev_lcell_comb \REGS|Mux55~3 ( +// Equation(s): +// \REGS|Mux55~3_combout = ( \PC|pc[8]~DUPLICATE_q & ( \PC|pc[9]~DUPLICATE_q & ( \REGS|regs[4][8]~q ) ) ) # ( !\PC|pc[8]~DUPLICATE_q & ( \PC|pc[9]~DUPLICATE_q & ( \REGS|regs[4][8]~q ) ) ) # ( \PC|pc[8]~DUPLICATE_q & ( !\PC|pc[9]~DUPLICATE_q & ( +// \REGS|regs[4][8]~q ) ) ) # ( !\PC|pc[8]~DUPLICATE_q & ( !\PC|pc[9]~DUPLICATE_q & ( (!\PC|pc[7]~DUPLICATE_q & ((!\PC|pc [6] & ((\REGS|regs[12][8]~DUPLICATE_q ))) # (\PC|pc [6] & (\REGS|regs[4][8]~q )))) # (\PC|pc[7]~DUPLICATE_q & (\REGS|regs[4][8]~q +// )) ) ) ) + + .dataa(!\REGS|regs[4][8]~q ), + .datab(!\PC|pc[7]~DUPLICATE_q ), + .datac(!\REGS|regs[12][8]~DUPLICATE_q ), + .datad(!\PC|pc [6]), + .datae(!\PC|pc[8]~DUPLICATE_q ), + .dataf(!\PC|pc[9]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux55~3_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux55~3 .extended_lut = "off"; +defparam \REGS|Mux55~3 .lut_mask = 64'h1D55555555555555; +defparam \REGS|Mux55~3 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X35_Y3_N24 +cyclonev_lcell_comb \REGS|regs[23][8]~feeder ( +// Equation(s): +// \REGS|regs[23][8]~feeder_combout = ( \rd[8]~442_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[8]~442_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[23][8]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[23][8]~feeder .extended_lut = "off"; +defparam \REGS|regs[23][8]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[23][8]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X35_Y3_N26 +dffeas \REGS|regs[23][8] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[23][8]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~18_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[23][8]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[23][8] .is_wysiwyg = "true"; +defparam \REGS|regs[23][8] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X33_Y5_N0 +cyclonev_lcell_comb \REGS|regs[31][8]~feeder ( +// Equation(s): +// \REGS|regs[31][8]~feeder_combout = ( \rd[8]~442_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[8]~442_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[31][8]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[31][8]~feeder .extended_lut = "off"; +defparam \REGS|regs[31][8]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[31][8]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X33_Y5_N1 +dffeas \REGS|regs[31][8] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[31][8]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~19_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[31][8]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[31][8] .is_wysiwyg = "true"; +defparam \REGS|regs[31][8] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X35_Y3_N9 +cyclonev_lcell_comb \REGS|Mux55~6 ( +// Equation(s): +// \REGS|Mux55~6_combout = ( \PC|pc[8]~DUPLICATE_q & ( \PC|pc[6]~DUPLICATE_q & ( \REGS|regs[23][8]~q ) ) ) # ( !\PC|pc[8]~DUPLICATE_q & ( \PC|pc[6]~DUPLICATE_q & ( \REGS|regs[23][8]~q ) ) ) # ( \PC|pc[8]~DUPLICATE_q & ( !\PC|pc[6]~DUPLICATE_q & ( +// \REGS|regs[23][8]~q ) ) ) # ( !\PC|pc[8]~DUPLICATE_q & ( !\PC|pc[6]~DUPLICATE_q & ( (!\PC|pc [7] & ((!\PC|pc [9] & ((\REGS|regs[31][8]~q ))) # (\PC|pc [9] & (\REGS|regs[23][8]~q )))) # (\PC|pc [7] & (\REGS|regs[23][8]~q )) ) ) ) + + .dataa(!\REGS|regs[23][8]~q ), + .datab(!\PC|pc [7]), + .datac(!\PC|pc [9]), + .datad(!\REGS|regs[31][8]~q ), + .datae(!\PC|pc[8]~DUPLICATE_q ), + .dataf(!\PC|pc[6]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux55~6_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux55~6 .extended_lut = "off"; +defparam \REGS|Mux55~6 .lut_mask = 64'h15D5555555555555; +defparam \REGS|Mux55~6 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X35_Y11_N42 +cyclonev_lcell_comb \REGS|Mux23~0 ( +// Equation(s): +// \REGS|Mux23~0_combout = ( \ROM|mem~16_combout & ( \REGS|Mux55~6_combout & ( (\REGS|Mux55~2_combout ) # (\ROM|mem~9_combout ) ) ) ) # ( !\ROM|mem~16_combout & ( \REGS|Mux55~6_combout & ( (!\ROM|mem~9_combout & ((\REGS|Mux55~3_combout ))) # +// (\ROM|mem~9_combout & (\REGS|Mux55~7_combout )) ) ) ) # ( \ROM|mem~16_combout & ( !\REGS|Mux55~6_combout & ( (!\ROM|mem~9_combout & \REGS|Mux55~2_combout ) ) ) ) # ( !\ROM|mem~16_combout & ( !\REGS|Mux55~6_combout & ( (!\ROM|mem~9_combout & +// ((\REGS|Mux55~3_combout ))) # (\ROM|mem~9_combout & (\REGS|Mux55~7_combout )) ) ) ) + + .dataa(!\ROM|mem~9_combout ), + .datab(!\REGS|Mux55~7_combout ), + .datac(!\REGS|Mux55~2_combout ), + .datad(!\REGS|Mux55~3_combout ), + .datae(!\ROM|mem~16_combout ), + .dataf(!\REGS|Mux55~6_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux23~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux23~0 .extended_lut = "off"; +defparam \REGS|Mux23~0 .lut_mask = 64'h11BB0A0A11BB5F5F; +defparam \REGS|Mux23~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X35_Y11_N54 +cyclonev_lcell_comb \REGS|Mux23~2 ( +// Equation(s): +// \REGS|Mux23~2_combout = ( \REGS|Mux23~1_combout & ( \REGS|Mux23~0_combout ) ) # ( !\REGS|Mux23~1_combout & ( \REGS|Mux23~0_combout & ( ((\ROM|mem~9_combout & \REGS|Mux55~4_combout )) # (\ROM|mem~17_combout ) ) ) ) # ( \REGS|Mux23~1_combout & ( +// !\REGS|Mux23~0_combout & ( !\ROM|mem~17_combout ) ) ) # ( !\REGS|Mux23~1_combout & ( !\REGS|Mux23~0_combout & ( (\ROM|mem~9_combout & (!\ROM|mem~17_combout & \REGS|Mux55~4_combout )) ) ) ) + + .dataa(!\ROM|mem~9_combout ), + .datab(gnd), + .datac(!\ROM|mem~17_combout ), + .datad(!\REGS|Mux55~4_combout ), + .datae(!\REGS|Mux23~1_combout ), + .dataf(!\REGS|Mux23~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux23~2_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux23~2 .extended_lut = "off"; +defparam \REGS|Mux23~2 .lut_mask = 64'h0050F0F00F5FFFFF; +defparam \REGS|Mux23~2 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X40_Y11_N48 +cyclonev_lcell_comb \ALU|Mux23~0 ( +// Equation(s): +// \ALU|Mux23~0_combout = ( \ALU|Mux15~0_combout & ( \rt_alu[8]~151_combout & ( (!\REGS|Mux23~2_combout & (((!\CONTROL_UNIT|ALU_FN [0] & \CONTROL_UNIT|ALU_FN [1])) # (\ALU|Mux29~1_combout ))) # (\REGS|Mux23~2_combout & (((\CONTROL_UNIT|ALU_FN [1])))) ) +// ) ) # ( !\ALU|Mux15~0_combout & ( \rt_alu[8]~151_combout & ( (!\REGS|Mux23~2_combout & \ALU|Mux29~1_combout ) ) ) ) # ( \ALU|Mux15~0_combout & ( !\rt_alu[8]~151_combout & ( (!\REGS|Mux23~2_combout & (((!\CONTROL_UNIT|ALU_FN [1])))) # +// (\REGS|Mux23~2_combout & (((!\CONTROL_UNIT|ALU_FN [0] & \CONTROL_UNIT|ALU_FN [1])) # (\ALU|Mux29~1_combout ))) ) ) ) # ( !\ALU|Mux15~0_combout & ( !\rt_alu[8]~151_combout & ( (\REGS|Mux23~2_combout & \ALU|Mux29~1_combout ) ) ) ) + + .dataa(!\REGS|Mux23~2_combout ), + .datab(!\CONTROL_UNIT|ALU_FN [0]), + .datac(!\CONTROL_UNIT|ALU_FN [1]), + .datad(!\ALU|Mux29~1_combout ), + .datae(!\ALU|Mux15~0_combout ), + .dataf(!\rt_alu[8]~151_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\ALU|Mux23~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \ALU|Mux23~0 .extended_lut = "off"; +defparam \ALU|Mux23~0 .lut_mask = 64'h0055A4F500AA0DAF; +defparam \ALU|Mux23~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X33_Y12_N14 +dffeas \REGS|regs[18][7] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[7]~440_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~5_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[18][7]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[18][7] .is_wysiwyg = "true"; +defparam \REGS|regs[18][7] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X33_Y12_N26 +dffeas \REGS|regs[26][7]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[7]~440_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~6_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[26][7]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[26][7]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[26][7]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X33_Y12_N15 +cyclonev_lcell_comb \REGS|Mux56~4 ( +// Equation(s): +// \REGS|Mux56~4_combout = ( \PC|pc [7] & ( \REGS|regs[26][7]~DUPLICATE_q & ( \REGS|regs[18][7]~q ) ) ) # ( !\PC|pc [7] & ( \REGS|regs[26][7]~DUPLICATE_q & ( ((!\PC|pc[8]~DUPLICATE_q & (!\PC|pc [9] & !\PC|pc [6]))) # (\REGS|regs[18][7]~q ) ) ) ) # ( +// \PC|pc [7] & ( !\REGS|regs[26][7]~DUPLICATE_q & ( \REGS|regs[18][7]~q ) ) ) # ( !\PC|pc [7] & ( !\REGS|regs[26][7]~DUPLICATE_q & ( (\REGS|regs[18][7]~q & (((\PC|pc [6]) # (\PC|pc [9])) # (\PC|pc[8]~DUPLICATE_q ))) ) ) ) + + .dataa(!\PC|pc[8]~DUPLICATE_q ), + .datab(!\PC|pc [9]), + .datac(!\REGS|regs[18][7]~q ), + .datad(!\PC|pc [6]), + .datae(!\PC|pc [7]), + .dataf(!\REGS|regs[26][7]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux56~4_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux56~4 .extended_lut = "off"; +defparam \REGS|Mux56~4 .lut_mask = 64'h070F0F0F8F0F0F0F; +defparam \REGS|Mux56~4 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X35_Y13_N47 +dffeas \REGS|regs[12][7] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[7]~440_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~26_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[12][7]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[12][7] .is_wysiwyg = "true"; +defparam \REGS|regs[12][7] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X30_Y11_N6 +cyclonev_lcell_comb \REGS|regs[4][7]~feeder ( +// Equation(s): +// \REGS|regs[4][7]~feeder_combout = ( \rd[7]~440_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[7]~440_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[4][7]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[4][7]~feeder .extended_lut = "off"; +defparam \REGS|regs[4][7]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[4][7]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X30_Y11_N8 +dffeas \REGS|regs[4][7] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[4][7]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~22_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[4][7]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[4][7] .is_wysiwyg = "true"; +defparam \REGS|regs[4][7] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X35_Y13_N0 +cyclonev_lcell_comb \REGS|Mux56~0 ( +// Equation(s): +// \REGS|Mux56~0_combout = ( \REGS|regs[12][7]~q & ( \REGS|regs[4][7]~q ) ) # ( !\REGS|regs[12][7]~q & ( \REGS|regs[4][7]~q & ( (((\PC|pc[8]~DUPLICATE_q ) # (\PC|pc [9])) # (\PC|pc [6])) # (\PC|pc[7]~DUPLICATE_q ) ) ) ) # ( \REGS|regs[12][7]~q & ( +// !\REGS|regs[4][7]~q & ( (!\PC|pc[7]~DUPLICATE_q & (!\PC|pc [6] & (!\PC|pc [9] & !\PC|pc[8]~DUPLICATE_q ))) ) ) ) + + .dataa(!\PC|pc[7]~DUPLICATE_q ), + .datab(!\PC|pc [6]), + .datac(!\PC|pc [9]), + .datad(!\PC|pc[8]~DUPLICATE_q ), + .datae(!\REGS|regs[12][7]~q ), + .dataf(!\REGS|regs[4][7]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux56~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux56~0 .extended_lut = "off"; +defparam \REGS|Mux56~0 .lut_mask = 64'h000080007FFFFFFF; +defparam \REGS|Mux56~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X37_Y12_N47 +dffeas \REGS|regs[22][7] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[7]~440_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~9_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[22][7]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[22][7] .is_wysiwyg = "true"; +defparam \REGS|regs[22][7] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X37_Y12_N11 +dffeas \REGS|regs[30][7] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[7]~440_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~10_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[30][7]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[30][7] .is_wysiwyg = "true"; +defparam \REGS|regs[30][7] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y12_N21 +cyclonev_lcell_comb \REGS|Mux56~2 ( +// Equation(s): +// \REGS|Mux56~2_combout = ( \REGS|regs[22][7]~q & ( \REGS|regs[30][7]~q ) ) # ( !\REGS|regs[22][7]~q & ( \REGS|regs[30][7]~q & ( (!\PC|pc [6] & (!\PC|pc [7] & (!\PC|pc [9] & !\PC|pc[8]~DUPLICATE_q ))) ) ) ) # ( \REGS|regs[22][7]~q & ( +// !\REGS|regs[30][7]~q & ( (((\PC|pc[8]~DUPLICATE_q ) # (\PC|pc [9])) # (\PC|pc [7])) # (\PC|pc [6]) ) ) ) + + .dataa(!\PC|pc [6]), + .datab(!\PC|pc [7]), + .datac(!\PC|pc [9]), + .datad(!\PC|pc[8]~DUPLICATE_q ), + .datae(!\REGS|regs[22][7]~q ), + .dataf(!\REGS|regs[30][7]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux56~2_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux56~2 .extended_lut = "off"; +defparam \REGS|Mux56~2 .lut_mask = 64'h00007FFF8000FFFF; +defparam \REGS|Mux56~2 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X35_Y13_N53 +dffeas \REGS|regs[13][7] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[7]~440_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~31_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[13][7]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[13][7] .is_wysiwyg = "true"; +defparam \REGS|regs[13][7] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X35_Y13_N17 +dffeas \REGS|regs[5][7] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[7]~440_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~30_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[5][7]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[5][7] .is_wysiwyg = "true"; +defparam \REGS|regs[5][7] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X35_Y13_N51 +cyclonev_lcell_comb \REGS|Mux56~1 ( +// Equation(s): +// \REGS|Mux56~1_combout = ( \REGS|regs[13][7]~q & ( \REGS|regs[5][7]~q ) ) # ( !\REGS|regs[13][7]~q & ( \REGS|regs[5][7]~q & ( (((\PC|pc [9]) # (\PC|pc[8]~DUPLICATE_q )) # (\PC|pc[7]~DUPLICATE_q )) # (\PC|pc [6]) ) ) ) # ( \REGS|regs[13][7]~q & ( +// !\REGS|regs[5][7]~q & ( (!\PC|pc [6] & (!\PC|pc[7]~DUPLICATE_q & (!\PC|pc[8]~DUPLICATE_q & !\PC|pc [9]))) ) ) ) + + .dataa(!\PC|pc [6]), + .datab(!\PC|pc[7]~DUPLICATE_q ), + .datac(!\PC|pc[8]~DUPLICATE_q ), + .datad(!\PC|pc [9]), + .datae(!\REGS|regs[13][7]~q ), + .dataf(!\REGS|regs[5][7]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux56~1_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux56~1 .extended_lut = "off"; +defparam \REGS|Mux56~1 .lut_mask = 64'h000080007FFFFFFF; +defparam \REGS|Mux56~1 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X36_Y11_N19 +dffeas \REGS|regs[23][7] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[7]~440_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~18_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[23][7]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[23][7] .is_wysiwyg = "true"; +defparam \REGS|regs[23][7] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X40_Y12_N59 +dffeas \REGS|regs[31][7] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[7]~440_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~19_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[31][7]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[31][7] .is_wysiwyg = "true"; +defparam \REGS|regs[31][7] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X36_Y11_N21 +cyclonev_lcell_comb \REGS|Mux56~3 ( +// Equation(s): +// \REGS|Mux56~3_combout = ( \PC|pc [7] & ( \REGS|regs[31][7]~q & ( \REGS|regs[23][7]~q ) ) ) # ( !\PC|pc [7] & ( \REGS|regs[31][7]~q & ( ((!\PC|pc [6] & (!\PC|pc [9] & !\PC|pc[8]~DUPLICATE_q ))) # (\REGS|regs[23][7]~q ) ) ) ) # ( \PC|pc [7] & ( +// !\REGS|regs[31][7]~q & ( \REGS|regs[23][7]~q ) ) ) # ( !\PC|pc [7] & ( !\REGS|regs[31][7]~q & ( (\REGS|regs[23][7]~q & (((\PC|pc[8]~DUPLICATE_q ) # (\PC|pc [9])) # (\PC|pc [6]))) ) ) ) + + .dataa(!\PC|pc [6]), + .datab(!\REGS|regs[23][7]~q ), + .datac(!\PC|pc [9]), + .datad(!\PC|pc[8]~DUPLICATE_q ), + .datae(!\PC|pc [7]), + .dataf(!\REGS|regs[31][7]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux56~3_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux56~3 .extended_lut = "off"; +defparam \REGS|Mux56~3 .lut_mask = 64'h13333333B3333333; +defparam \REGS|Mux56~3 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X36_Y11_N54 +cyclonev_lcell_comb \REGS|Mux24~0 ( +// Equation(s): +// \REGS|Mux24~0_combout = ( \REGS|Mux56~3_combout & ( \ROM|mem~16_combout & ( (\REGS|Mux56~1_combout ) # (\ROM|mem~9_combout ) ) ) ) # ( !\REGS|Mux56~3_combout & ( \ROM|mem~16_combout & ( (!\ROM|mem~9_combout & \REGS|Mux56~1_combout ) ) ) ) # ( +// \REGS|Mux56~3_combout & ( !\ROM|mem~16_combout & ( (!\ROM|mem~9_combout & (\REGS|Mux56~0_combout )) # (\ROM|mem~9_combout & ((\REGS|Mux56~2_combout ))) ) ) ) # ( !\REGS|Mux56~3_combout & ( !\ROM|mem~16_combout & ( (!\ROM|mem~9_combout & +// (\REGS|Mux56~0_combout )) # (\ROM|mem~9_combout & ((\REGS|Mux56~2_combout ))) ) ) ) + + .dataa(!\ROM|mem~9_combout ), + .datab(!\REGS|Mux56~0_combout ), + .datac(!\REGS|Mux56~2_combout ), + .datad(!\REGS|Mux56~1_combout ), + .datae(!\REGS|Mux56~3_combout ), + .dataf(!\ROM|mem~16_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux24~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux24~0 .extended_lut = "off"; +defparam \REGS|Mux24~0 .lut_mask = 64'h2727272700AA55FF; +defparam \REGS|Mux24~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X35_Y4_N18 +cyclonev_lcell_comb \REGS|regs[8][7]~feeder ( +// Equation(s): +// \REGS|regs[8][7]~feeder_combout = ( \rd[7]~440_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[7]~440_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[8][7]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[8][7]~feeder .extended_lut = "off"; +defparam \REGS|regs[8][7]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[8][7]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X35_Y4_N19 +dffeas \REGS|regs[8][7]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[8][7]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~24_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[8][7]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[8][7]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[8][7]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: FF_X36_Y5_N5 +dffeas \REGS|regs[9][7] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[7]~440_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~29_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[9][7]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[9][7] .is_wysiwyg = "true"; +defparam \REGS|regs[9][7] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X36_Y5_N42 +cyclonev_lcell_comb \REGS|Mux24~1 ( +// Equation(s): +// \REGS|Mux24~1_combout = ( \ROM|mem~15_combout & ( (\ROM|mem~0_combout & \REGS|regs[9][7]~q ) ) ) # ( !\ROM|mem~15_combout & ( (\ROM|mem~0_combout & \REGS|regs[8][7]~DUPLICATE_q ) ) ) + + .dataa(!\ROM|mem~0_combout ), + .datab(gnd), + .datac(!\REGS|regs[8][7]~DUPLICATE_q ), + .datad(!\REGS|regs[9][7]~q ), + .datae(gnd), + .dataf(!\ROM|mem~15_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux24~1_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux24~1 .extended_lut = "off"; +defparam \REGS|Mux24~1 .lut_mask = 64'h0505050500550055; +defparam \REGS|Mux24~1 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X36_Y11_N6 +cyclonev_lcell_comb \REGS|Mux24~2 ( +// Equation(s): +// \REGS|Mux24~2_combout = ( \REGS|Mux24~0_combout & ( \REGS|Mux24~1_combout ) ) # ( !\REGS|Mux24~0_combout & ( \REGS|Mux24~1_combout & ( !\ROM|mem~17_combout ) ) ) # ( \REGS|Mux24~0_combout & ( !\REGS|Mux24~1_combout & ( ((\REGS|Mux56~4_combout & +// \ROM|mem~9_combout )) # (\ROM|mem~17_combout ) ) ) ) # ( !\REGS|Mux24~0_combout & ( !\REGS|Mux24~1_combout & ( (\REGS|Mux56~4_combout & (\ROM|mem~9_combout & !\ROM|mem~17_combout )) ) ) ) + + .dataa(!\REGS|Mux56~4_combout ), + .datab(gnd), + .datac(!\ROM|mem~9_combout ), + .datad(!\ROM|mem~17_combout ), + .datae(!\REGS|Mux24~0_combout ), + .dataf(!\REGS|Mux24~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux24~2_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux24~2 .extended_lut = "off"; +defparam \REGS|Mux24~2 .lut_mask = 64'h050005FFFF00FFFF; +defparam \REGS|Mux24~2 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X35_Y4_N51 +cyclonev_lcell_comb \REGS|regs[1][7]~feeder ( +// Equation(s): +// \REGS|regs[1][7]~feeder_combout = ( \rd[7]~440_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[7]~440_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[1][7]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[1][7]~feeder .extended_lut = "off"; +defparam \REGS|regs[1][7]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[1][7]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X35_Y4_N53 +dffeas \REGS|regs[1][7] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[1][7]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~28_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[1][7]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[1][7] .is_wysiwyg = "true"; +defparam \REGS|regs[1][7] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X35_Y4_N3 +cyclonev_lcell_comb \REGS|Mux56~5 ( +// Equation(s): +// \REGS|Mux56~5_combout = ( \PC|pc [9] & ( \PC|pc[8]~DUPLICATE_q & ( \REGS|regs[1][7]~q ) ) ) # ( !\PC|pc [9] & ( \PC|pc[8]~DUPLICATE_q & ( \REGS|regs[1][7]~q ) ) ) # ( \PC|pc [9] & ( !\PC|pc[8]~DUPLICATE_q & ( \REGS|regs[1][7]~q ) ) ) # ( !\PC|pc +// [9] & ( !\PC|pc[8]~DUPLICATE_q & ( (!\PC|pc [7] & ((!\PC|pc[6]~DUPLICATE_q & ((\REGS|regs[9][7]~q ))) # (\PC|pc[6]~DUPLICATE_q & (\REGS|regs[1][7]~q )))) # (\PC|pc [7] & (\REGS|regs[1][7]~q )) ) ) ) + + .dataa(!\REGS|regs[1][7]~q ), + .datab(!\PC|pc [7]), + .datac(!\PC|pc[6]~DUPLICATE_q ), + .datad(!\REGS|regs[9][7]~q ), + .datae(!\PC|pc [9]), + .dataf(!\PC|pc[8]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux56~5_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux56~5 .extended_lut = "off"; +defparam \REGS|Mux56~5 .lut_mask = 64'h15D5555555555555; +defparam \REGS|Mux56~5 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X33_Y15_N42 +cyclonev_lcell_comb \REGS|regs[2][7]~feeder ( +// Equation(s): +// \REGS|regs[2][7]~feeder_combout = ( \rd[7]~440_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[7]~440_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[2][7]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[2][7]~feeder .extended_lut = "off"; +defparam \REGS|regs[2][7]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[2][7]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X33_Y15_N43 +dffeas \REGS|regs[2][7] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[2][7]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~32_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[2][7]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[2][7] .is_wysiwyg = "true"; +defparam \REGS|regs[2][7] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X36_Y16_N45 +cyclonev_lcell_comb \REGS|regs[10][7]~feeder ( +// Equation(s): +// \REGS|regs[10][7]~feeder_combout = ( \rd[7]~440_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[7]~440_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[10][7]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[10][7]~feeder .extended_lut = "off"; +defparam \REGS|regs[10][7]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[10][7]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X36_Y16_N46 +dffeas \REGS|regs[10][7] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[10][7]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~33_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[10][7]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[10][7] .is_wysiwyg = "true"; +defparam \REGS|regs[10][7] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X33_Y15_N24 +cyclonev_lcell_comb \REGS|regs[11][7]~feeder ( +// Equation(s): +// \REGS|regs[11][7]~feeder_combout = ( \rd[7]~440_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[7]~440_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[11][7]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[11][7]~feeder .extended_lut = "off"; +defparam \REGS|regs[11][7]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[11][7]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X33_Y15_N25 +dffeas \REGS|regs[11][7] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[11][7]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~37_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[11][7]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[11][7] .is_wysiwyg = "true"; +defparam \REGS|regs[11][7] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X35_Y15_N18 +cyclonev_lcell_comb \rt_alu[7]~14 ( +// Equation(s): +// \rt_alu[7]~14_combout = ( \ROM|mem~0_combout & ( \ROM|mem~10_combout & ( \REGS|regs[10][7]~q ) ) ) # ( !\ROM|mem~0_combout & ( \ROM|mem~10_combout & ( \REGS|regs[2][7]~q ) ) ) # ( \ROM|mem~0_combout & ( !\ROM|mem~10_combout & ( +// \REGS|regs[11][7]~q ) ) ) # ( !\ROM|mem~0_combout & ( !\ROM|mem~10_combout & ( \REGS|regs[2][7]~q ) ) ) + + .dataa(!\REGS|regs[2][7]~q ), + .datab(gnd), + .datac(!\REGS|regs[10][7]~q ), + .datad(!\REGS|regs[11][7]~q ), + .datae(!\ROM|mem~0_combout ), + .dataf(!\ROM|mem~10_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[7]~14_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[7]~14 .extended_lut = "off"; +defparam \rt_alu[7]~14 .lut_mask = 64'h555500FF55550F0F; +defparam \rt_alu[7]~14 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X35_Y4_N20 +dffeas \REGS|regs[8][7] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[8][7]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~24_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[8][7]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[8][7] .is_wysiwyg = "true"; +defparam \REGS|regs[8][7] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X35_Y4_N42 +cyclonev_lcell_comb \REGS|Mux56~6 ( +// Equation(s): +// \REGS|Mux56~6_combout = ( !\PC|pc [9] & ( !\PC|pc[8]~DUPLICATE_q & ( (\REGS|regs[8][7]~q & (!\PC|pc[6]~DUPLICATE_q & !\PC|pc [7])) ) ) ) + + .dataa(!\REGS|regs[8][7]~q ), + .datab(!\PC|pc[6]~DUPLICATE_q ), + .datac(gnd), + .datad(!\PC|pc [7]), + .datae(!\PC|pc [9]), + .dataf(!\PC|pc[8]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux56~6_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux56~6 .extended_lut = "off"; +defparam \REGS|Mux56~6 .lut_mask = 64'h4400000000000000; +defparam \REGS|Mux56~6 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X36_Y5_N56 +dffeas \REGS|regs[15][7] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[7]~440_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~39_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[15][7]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[15][7] .is_wysiwyg = "true"; +defparam \REGS|regs[15][7] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X36_Y5_N22 +dffeas \REGS|regs[14][7] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[7]~440_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~35_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[14][7]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[14][7] .is_wysiwyg = "true"; +defparam \REGS|regs[14][7] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X40_Y12_N46 +dffeas \REGS|regs[6][7] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[7]~440_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~34_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[6][7]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[6][7] .is_wysiwyg = "true"; +defparam \REGS|regs[6][7] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X36_Y5_N36 +cyclonev_lcell_comb \rt_alu[7]~15 ( +// Equation(s): +// \rt_alu[7]~15_combout = ( \REGS|regs[6][7]~q & ( \ROM|mem~10_combout & ( (!\ROM|mem~0_combout ) # (\REGS|regs[14][7]~q ) ) ) ) # ( !\REGS|regs[6][7]~q & ( \ROM|mem~10_combout & ( (\ROM|mem~0_combout & \REGS|regs[14][7]~q ) ) ) ) # ( +// \REGS|regs[6][7]~q & ( !\ROM|mem~10_combout & ( (!\ROM|mem~0_combout ) # (\REGS|regs[15][7]~q ) ) ) ) # ( !\REGS|regs[6][7]~q & ( !\ROM|mem~10_combout & ( (\REGS|regs[15][7]~q & \ROM|mem~0_combout ) ) ) ) + + .dataa(!\REGS|regs[15][7]~q ), + .datab(gnd), + .datac(!\ROM|mem~0_combout ), + .datad(!\REGS|regs[14][7]~q ), + .datae(!\REGS|regs[6][7]~q ), + .dataf(!\ROM|mem~10_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[7]~15_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[7]~15 .extended_lut = "off"; +defparam \rt_alu[7]~15 .lut_mask = 64'h0505F5F5000FF0FF; +defparam \rt_alu[7]~15 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X36_Y11_N51 +cyclonev_lcell_comb \rt_alu[7]~16 ( +// Equation(s): +// \rt_alu[7]~16_combout = ( \REGS|Mux56~1_combout & ( \rt_alu[7]~15_combout & ( ((\ROM|mem~13_combout ) # (\REGS|Mux56~0_combout )) # (\ROM|mem~12_combout ) ) ) ) # ( !\REGS|Mux56~1_combout & ( \rt_alu[7]~15_combout & ( ((\REGS|Mux56~0_combout & +// !\ROM|mem~13_combout )) # (\ROM|mem~12_combout ) ) ) ) # ( \REGS|Mux56~1_combout & ( !\rt_alu[7]~15_combout & ( (!\ROM|mem~12_combout & ((\ROM|mem~13_combout ) # (\REGS|Mux56~0_combout ))) ) ) ) # ( !\REGS|Mux56~1_combout & ( !\rt_alu[7]~15_combout & +// ( (!\ROM|mem~12_combout & (\REGS|Mux56~0_combout & !\ROM|mem~13_combout )) ) ) ) + + .dataa(!\ROM|mem~12_combout ), + .datab(gnd), + .datac(!\REGS|Mux56~0_combout ), + .datad(!\ROM|mem~13_combout ), + .datae(!\REGS|Mux56~1_combout ), + .dataf(!\rt_alu[7]~15_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[7]~16_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[7]~16 .extended_lut = "off"; +defparam \rt_alu[7]~16 .lut_mask = 64'h0A000AAA5F555FFF; +defparam \rt_alu[7]~16 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X36_Y11_N24 +cyclonev_lcell_comb \rt_alu[7]~17 ( +// Equation(s): +// \rt_alu[7]~17_combout = ( \REGS|Mux56~6_combout & ( \rt_alu[7]~16_combout & ( (!\rt_alu[17]~10_combout ) # ((!\rt_alu[17]~11_combout & (\REGS|Mux56~5_combout )) # (\rt_alu[17]~11_combout & ((\rt_alu[7]~14_combout )))) ) ) ) # ( !\REGS|Mux56~6_combout +// & ( \rt_alu[7]~16_combout & ( (!\rt_alu[17]~10_combout & (\rt_alu[17]~11_combout )) # (\rt_alu[17]~10_combout & ((!\rt_alu[17]~11_combout & (\REGS|Mux56~5_combout )) # (\rt_alu[17]~11_combout & ((\rt_alu[7]~14_combout ))))) ) ) ) # ( +// \REGS|Mux56~6_combout & ( !\rt_alu[7]~16_combout & ( (!\rt_alu[17]~10_combout & (!\rt_alu[17]~11_combout )) # (\rt_alu[17]~10_combout & ((!\rt_alu[17]~11_combout & (\REGS|Mux56~5_combout )) # (\rt_alu[17]~11_combout & ((\rt_alu[7]~14_combout ))))) ) +// ) ) # ( !\REGS|Mux56~6_combout & ( !\rt_alu[7]~16_combout & ( (\rt_alu[17]~10_combout & ((!\rt_alu[17]~11_combout & (\REGS|Mux56~5_combout )) # (\rt_alu[17]~11_combout & ((\rt_alu[7]~14_combout ))))) ) ) ) + + .dataa(!\rt_alu[17]~10_combout ), + .datab(!\rt_alu[17]~11_combout ), + .datac(!\REGS|Mux56~5_combout ), + .datad(!\rt_alu[7]~14_combout ), + .datae(!\REGS|Mux56~6_combout ), + .dataf(!\rt_alu[7]~16_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[7]~17_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[7]~17 .extended_lut = "off"; +defparam \rt_alu[7]~17 .lut_mask = 64'h04158C9D2637AEBF; +defparam \rt_alu[7]~17 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X36_Y11_N39 +cyclonev_lcell_comb \rt_alu[7]~22 ( +// Equation(s): +// \rt_alu[7]~22_combout = ( \ROM|mem~9_combout & ( \rt_alu[7]~21_combout ) ) # ( !\ROM|mem~9_combout & ( \rt_alu[7]~21_combout & ( (\rt_alu[7]~17_combout & !\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout ) ) ) ) # ( \ROM|mem~9_combout & ( +// !\rt_alu[7]~21_combout & ( \CONTROL_UNIT|CLASSIFIER|Equal0~1_combout ) ) ) # ( !\ROM|mem~9_combout & ( !\rt_alu[7]~21_combout & ( (\rt_alu[7]~17_combout & !\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout ) ) ) ) + + .dataa(!\rt_alu[7]~17_combout ), + .datab(gnd), + .datac(gnd), + .datad(!\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout ), + .datae(!\ROM|mem~9_combout ), + .dataf(!\rt_alu[7]~21_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[7]~22_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[7]~22 .extended_lut = "off"; +defparam \rt_alu[7]~22 .lut_mask = 64'h550000FF5500FFFF; +defparam \rt_alu[7]~22 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y11_N54 +cyclonev_lcell_comb \ALU|Mux24~0 ( +// Equation(s): +// \ALU|Mux24~0_combout = ( \ALU|Mux29~1_combout & ( \rt_alu[7]~22_combout & ( (!\REGS|Mux24~2_combout ) # ((\CONTROL_UNIT|ALU_FN [1] & \ALU|Mux15~0_combout )) ) ) ) # ( !\ALU|Mux29~1_combout & ( \rt_alu[7]~22_combout & ( (\CONTROL_UNIT|ALU_FN [1] & +// (\ALU|Mux15~0_combout & ((!\CONTROL_UNIT|ALU_FN [0]) # (\REGS|Mux24~2_combout )))) ) ) ) # ( \ALU|Mux29~1_combout & ( !\rt_alu[7]~22_combout & ( ((!\CONTROL_UNIT|ALU_FN [1] & \ALU|Mux15~0_combout )) # (\REGS|Mux24~2_combout ) ) ) ) # ( +// !\ALU|Mux29~1_combout & ( !\rt_alu[7]~22_combout & ( (\ALU|Mux15~0_combout & ((!\CONTROL_UNIT|ALU_FN [1] & (!\REGS|Mux24~2_combout )) # (\CONTROL_UNIT|ALU_FN [1] & (\REGS|Mux24~2_combout & !\CONTROL_UNIT|ALU_FN [0])))) ) ) ) + + .dataa(!\CONTROL_UNIT|ALU_FN [1]), + .datab(!\REGS|Mux24~2_combout ), + .datac(!\CONTROL_UNIT|ALU_FN [0]), + .datad(!\ALU|Mux15~0_combout ), + .datae(!\ALU|Mux29~1_combout ), + .dataf(!\rt_alu[7]~22_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\ALU|Mux24~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \ALU|Mux24~0 .extended_lut = "off"; +defparam \ALU|Mux24~0 .lut_mask = 64'h009833BB0051CCDD; +defparam \ALU|Mux24~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X36_Y14_N39 +cyclonev_lcell_comb \REGS|regs[8][6]~feeder ( +// Equation(s): +// \REGS|regs[8][6]~feeder_combout = ( \rd[6]~438_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[6]~438_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[8][6]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[8][6]~feeder .extended_lut = "off"; +defparam \REGS|regs[8][6]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[8][6]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X36_Y14_N40 +dffeas \REGS|regs[8][6]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[8][6]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~24_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[8][6]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[8][6]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[8][6]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X35_Y14_N33 +cyclonev_lcell_comb \REGS|regs[9][6]~feeder ( +// Equation(s): +// \REGS|regs[9][6]~feeder_combout = ( \rd[6]~438_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[6]~438_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[9][6]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[9][6]~feeder .extended_lut = "off"; +defparam \REGS|regs[9][6]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[9][6]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X35_Y14_N34 +dffeas \REGS|regs[9][6]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[9][6]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~29_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[9][6]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[9][6]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[9][6]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X38_Y11_N33 +cyclonev_lcell_comb \REGS|Mux25~1 ( +// Equation(s): +// \REGS|Mux25~1_combout = ( \ROM|mem~15_combout & ( (\ROM|mem~0_combout & \REGS|regs[9][6]~DUPLICATE_q ) ) ) # ( !\ROM|mem~15_combout & ( (\ROM|mem~0_combout & \REGS|regs[8][6]~DUPLICATE_q ) ) ) + + .dataa(!\ROM|mem~0_combout ), + .datab(gnd), + .datac(!\REGS|regs[8][6]~DUPLICATE_q ), + .datad(!\REGS|regs[9][6]~DUPLICATE_q ), + .datae(gnd), + .dataf(!\ROM|mem~15_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux25~1_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux25~1 .extended_lut = "off"; +defparam \REGS|Mux25~1 .lut_mask = 64'h0505050500550055; +defparam \REGS|Mux25~1 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X38_Y15_N15 +cyclonev_lcell_comb \REGS|regs[26][6]~feeder ( +// Equation(s): +// \REGS|regs[26][6]~feeder_combout = ( \rd[6]~438_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[6]~438_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[26][6]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[26][6]~feeder .extended_lut = "off"; +defparam \REGS|regs[26][6]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[26][6]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X38_Y15_N17 +dffeas \REGS|regs[26][6] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[26][6]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~6_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[26][6]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[26][6] .is_wysiwyg = "true"; +defparam \REGS|regs[26][6] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X38_Y9_N46 +dffeas \REGS|regs[18][6] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[6]~438_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~5_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[18][6]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[18][6] .is_wysiwyg = "true"; +defparam \REGS|regs[18][6] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X38_Y15_N54 +cyclonev_lcell_comb \REGS|Mux57~4 ( +// Equation(s): +// \REGS|Mux57~4_combout = ( \PC|pc [9] & ( \REGS|regs[18][6]~q ) ) # ( !\PC|pc [9] & ( \REGS|regs[18][6]~q & ( (((\PC|pc[8]~DUPLICATE_q ) # (\PC|pc [7])) # (\REGS|regs[26][6]~q )) # (\PC|pc [6]) ) ) ) # ( !\PC|pc [9] & ( !\REGS|regs[18][6]~q & ( +// (!\PC|pc [6] & (\REGS|regs[26][6]~q & (!\PC|pc [7] & !\PC|pc[8]~DUPLICATE_q ))) ) ) ) + + .dataa(!\PC|pc [6]), + .datab(!\REGS|regs[26][6]~q ), + .datac(!\PC|pc [7]), + .datad(!\PC|pc[8]~DUPLICATE_q ), + .datae(!\PC|pc [9]), + .dataf(!\REGS|regs[18][6]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux57~4_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux57~4 .extended_lut = "off"; +defparam \REGS|Mux57~4 .lut_mask = 64'h200000007FFFFFFF; +defparam \REGS|Mux57~4 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X37_Y12_N35 +dffeas \REGS|regs[30][6] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[6]~438_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~10_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[30][6]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[30][6] .is_wysiwyg = "true"; +defparam \REGS|regs[30][6] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X37_Y12_N59 +dffeas \REGS|regs[22][6] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[6]~438_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~9_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[22][6]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[22][6] .is_wysiwyg = "true"; +defparam \REGS|regs[22][6] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y12_N39 +cyclonev_lcell_comb \REGS|Mux57~7 ( +// Equation(s): +// \REGS|Mux57~7_combout = ( \REGS|regs[22][6]~q & ( \PC|pc[8]~DUPLICATE_q ) ) # ( \REGS|regs[22][6]~q & ( !\PC|pc[8]~DUPLICATE_q & ( (((\REGS|regs[30][6]~q ) # (\PC|pc [9])) # (\PC|pc [7])) # (\PC|pc [6]) ) ) ) # ( !\REGS|regs[22][6]~q & ( +// !\PC|pc[8]~DUPLICATE_q & ( (!\PC|pc [6] & (!\PC|pc [7] & (!\PC|pc [9] & \REGS|regs[30][6]~q ))) ) ) ) + + .dataa(!\PC|pc [6]), + .datab(!\PC|pc [7]), + .datac(!\PC|pc [9]), + .datad(!\REGS|regs[30][6]~q ), + .datae(!\REGS|regs[22][6]~q ), + .dataf(!\PC|pc[8]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux57~7_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux57~7 .extended_lut = "off"; +defparam \REGS|Mux57~7 .lut_mask = 64'h00807FFF0000FFFF; +defparam \REGS|Mux57~7 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X35_Y13_N44 +dffeas \REGS|regs[12][6] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[6]~438_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~26_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[12][6]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[12][6] .is_wysiwyg = "true"; +defparam \REGS|regs[12][6] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X35_Y6_N15 +cyclonev_lcell_comb \REGS|regs[4][6]~feeder ( +// Equation(s): +// \REGS|regs[4][6]~feeder_combout = ( \rd[6]~438_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[6]~438_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[4][6]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[4][6]~feeder .extended_lut = "off"; +defparam \REGS|regs[4][6]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[4][6]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X35_Y6_N16 +dffeas \REGS|regs[4][6] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[4][6]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~22_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[4][6]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[4][6] .is_wysiwyg = "true"; +defparam \REGS|regs[4][6] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X35_Y13_N33 +cyclonev_lcell_comb \REGS|Mux57~3 ( +// Equation(s): +// \REGS|Mux57~3_combout = ( \PC|pc[7]~DUPLICATE_q & ( \PC|pc [9] & ( \REGS|regs[4][6]~q ) ) ) # ( !\PC|pc[7]~DUPLICATE_q & ( \PC|pc [9] & ( \REGS|regs[4][6]~q ) ) ) # ( \PC|pc[7]~DUPLICATE_q & ( !\PC|pc [9] & ( \REGS|regs[4][6]~q ) ) ) # ( +// !\PC|pc[7]~DUPLICATE_q & ( !\PC|pc [9] & ( (!\PC|pc [6] & ((!\PC|pc[8]~DUPLICATE_q & (\REGS|regs[12][6]~q )) # (\PC|pc[8]~DUPLICATE_q & ((\REGS|regs[4][6]~q ))))) # (\PC|pc [6] & (((\REGS|regs[4][6]~q )))) ) ) ) + + .dataa(!\PC|pc [6]), + .datab(!\REGS|regs[12][6]~q ), + .datac(!\PC|pc[8]~DUPLICATE_q ), + .datad(!\REGS|regs[4][6]~q ), + .datae(!\PC|pc[7]~DUPLICATE_q ), + .dataf(!\PC|pc [9]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux57~3_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux57~3 .extended_lut = "off"; +defparam \REGS|Mux57~3 .lut_mask = 64'h207F00FF00FF00FF; +defparam \REGS|Mux57~3 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X35_Y13_N29 +dffeas \REGS|regs[13][6] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[6]~438_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~31_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[13][6]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[13][6] .is_wysiwyg = "true"; +defparam \REGS|regs[13][6] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X35_Y13_N14 +dffeas \REGS|regs[5][6] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[6]~438_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~30_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[5][6]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[5][6] .is_wysiwyg = "true"; +defparam \REGS|regs[5][6] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X35_Y13_N27 +cyclonev_lcell_comb \REGS|Mux57~2 ( +// Equation(s): +// \REGS|Mux57~2_combout = ( \REGS|regs[13][6]~q & ( \REGS|regs[5][6]~q ) ) # ( !\REGS|regs[13][6]~q & ( \REGS|regs[5][6]~q & ( (((\PC|pc [9]) # (\PC|pc [6])) # (\PC|pc[8]~DUPLICATE_q )) # (\PC|pc[7]~DUPLICATE_q ) ) ) ) # ( \REGS|regs[13][6]~q & ( +// !\REGS|regs[5][6]~q & ( (!\PC|pc[7]~DUPLICATE_q & (!\PC|pc[8]~DUPLICATE_q & (!\PC|pc [6] & !\PC|pc [9]))) ) ) ) + + .dataa(!\PC|pc[7]~DUPLICATE_q ), + .datab(!\PC|pc[8]~DUPLICATE_q ), + .datac(!\PC|pc [6]), + .datad(!\PC|pc [9]), + .datae(!\REGS|regs[13][6]~q ), + .dataf(!\REGS|regs[5][6]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux57~2_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux57~2 .extended_lut = "off"; +defparam \REGS|Mux57~2 .lut_mask = 64'h000080007FFFFFFF; +defparam \REGS|Mux57~2 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X40_Y10_N59 +dffeas \REGS|regs[23][6]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[6]~438_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~18_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[23][6]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[23][6]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[23][6]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: FF_X40_Y12_N37 +dffeas \REGS|regs[31][6] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[6]~438_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~19_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[31][6]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[31][6] .is_wysiwyg = "true"; +defparam \REGS|regs[31][6] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X40_Y10_N30 +cyclonev_lcell_comb \REGS|Mux57~6 ( +// Equation(s): +// \REGS|Mux57~6_combout = ( \REGS|regs[23][6]~DUPLICATE_q & ( \REGS|regs[31][6]~q ) ) # ( !\REGS|regs[23][6]~DUPLICATE_q & ( \REGS|regs[31][6]~q & ( (!\PC|pc [8] & (!\PC|pc [9] & (!\PC|pc[7]~DUPLICATE_q & !\PC|pc [6]))) ) ) ) # ( +// \REGS|regs[23][6]~DUPLICATE_q & ( !\REGS|regs[31][6]~q & ( (((\PC|pc [6]) # (\PC|pc[7]~DUPLICATE_q )) # (\PC|pc [9])) # (\PC|pc [8]) ) ) ) + + .dataa(!\PC|pc [8]), + .datab(!\PC|pc [9]), + .datac(!\PC|pc[7]~DUPLICATE_q ), + .datad(!\PC|pc [6]), + .datae(!\REGS|regs[23][6]~DUPLICATE_q ), + .dataf(!\REGS|regs[31][6]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux57~6_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux57~6 .extended_lut = "off"; +defparam \REGS|Mux57~6 .lut_mask = 64'h00007FFF8000FFFF; +defparam \REGS|Mux57~6 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X38_Y11_N42 +cyclonev_lcell_comb \REGS|Mux25~0 ( +// Equation(s): +// \REGS|Mux25~0_combout = ( \REGS|Mux57~2_combout & ( \REGS|Mux57~6_combout & ( ((!\ROM|mem~9_combout & ((\REGS|Mux57~3_combout ))) # (\ROM|mem~9_combout & (\REGS|Mux57~7_combout ))) # (\ROM|mem~16_combout ) ) ) ) # ( !\REGS|Mux57~2_combout & ( +// \REGS|Mux57~6_combout & ( (!\ROM|mem~16_combout & ((!\ROM|mem~9_combout & ((\REGS|Mux57~3_combout ))) # (\ROM|mem~9_combout & (\REGS|Mux57~7_combout )))) # (\ROM|mem~16_combout & (((\ROM|mem~9_combout )))) ) ) ) # ( \REGS|Mux57~2_combout & ( +// !\REGS|Mux57~6_combout & ( (!\ROM|mem~16_combout & ((!\ROM|mem~9_combout & ((\REGS|Mux57~3_combout ))) # (\ROM|mem~9_combout & (\REGS|Mux57~7_combout )))) # (\ROM|mem~16_combout & (((!\ROM|mem~9_combout )))) ) ) ) # ( !\REGS|Mux57~2_combout & ( +// !\REGS|Mux57~6_combout & ( (!\ROM|mem~16_combout & ((!\ROM|mem~9_combout & ((\REGS|Mux57~3_combout ))) # (\ROM|mem~9_combout & (\REGS|Mux57~7_combout )))) ) ) ) + + .dataa(!\REGS|Mux57~7_combout ), + .datab(!\REGS|Mux57~3_combout ), + .datac(!\ROM|mem~16_combout ), + .datad(!\ROM|mem~9_combout ), + .datae(!\REGS|Mux57~2_combout ), + .dataf(!\REGS|Mux57~6_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux25~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux25~0 .extended_lut = "off"; +defparam \REGS|Mux25~0 .lut_mask = 64'h30503F50305F3F5F; +defparam \REGS|Mux25~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X38_Y11_N0 +cyclonev_lcell_comb \REGS|Mux25~2 ( +// Equation(s): +// \REGS|Mux25~2_combout = ( \ROM|mem~17_combout & ( \REGS|Mux25~0_combout ) ) # ( !\ROM|mem~17_combout & ( \REGS|Mux25~0_combout & ( ((\REGS|Mux57~4_combout & \ROM|mem~9_combout )) # (\REGS|Mux25~1_combout ) ) ) ) # ( !\ROM|mem~17_combout & ( +// !\REGS|Mux25~0_combout & ( ((\REGS|Mux57~4_combout & \ROM|mem~9_combout )) # (\REGS|Mux25~1_combout ) ) ) ) + + .dataa(!\REGS|Mux25~1_combout ), + .datab(gnd), + .datac(!\REGS|Mux57~4_combout ), + .datad(!\ROM|mem~9_combout ), + .datae(!\ROM|mem~17_combout ), + .dataf(!\REGS|Mux25~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux25~2_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux25~2 .extended_lut = "off"; +defparam \REGS|Mux25~2 .lut_mask = 64'h555F0000555FFFFF; +defparam \REGS|Mux25~2 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X36_Y6_N36 +cyclonev_lcell_comb \rt_alu[5]~53 ( +// Equation(s): +// \rt_alu[5]~53_combout = ( \ROM|mem~1_combout & ( \ROM|mem~2_combout & ( (\ROM|mem~20_combout & (!\PC|pc [8] & (\ROM|mem~0_combout & !\PC|pc [9]))) ) ) ) # ( !\ROM|mem~1_combout & ( \ROM|mem~2_combout & ( (\ROM|mem~20_combout & (!\PC|pc [8] & +// (\ROM|mem~0_combout & !\PC|pc [9]))) ) ) ) # ( \ROM|mem~1_combout & ( !\ROM|mem~2_combout & ( (\ROM|mem~20_combout & (!\PC|pc [8] & (\ROM|mem~0_combout & !\PC|pc [9]))) ) ) ) + + .dataa(!\ROM|mem~20_combout ), + .datab(!\PC|pc [8]), + .datac(!\ROM|mem~0_combout ), + .datad(!\PC|pc [9]), + .datae(!\ROM|mem~1_combout ), + .dataf(!\ROM|mem~2_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[5]~53_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[5]~53 .extended_lut = "off"; +defparam \rt_alu[5]~53 .lut_mask = 64'h0000040004000400; +defparam \rt_alu[5]~53 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X35_Y15_N50 +dffeas \REGS|regs[26][5] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[5]~436_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~6_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[26][5]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[26][5] .is_wysiwyg = "true"; +defparam \REGS|regs[26][5] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X35_Y15_N26 +dffeas \REGS|regs[18][5] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[5]~436_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~5_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[18][5]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[18][5] .is_wysiwyg = "true"; +defparam \REGS|regs[18][5] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X35_Y15_N0 +cyclonev_lcell_comb \REGS|Mux58~4 ( +// Equation(s): +// \REGS|Mux58~4_combout = ( \PC|pc[8]~DUPLICATE_q & ( \PC|pc[7]~DUPLICATE_q & ( \REGS|regs[18][5]~q ) ) ) # ( !\PC|pc[8]~DUPLICATE_q & ( \PC|pc[7]~DUPLICATE_q & ( \REGS|regs[18][5]~q ) ) ) # ( \PC|pc[8]~DUPLICATE_q & ( !\PC|pc[7]~DUPLICATE_q & ( +// \REGS|regs[18][5]~q ) ) ) # ( !\PC|pc[8]~DUPLICATE_q & ( !\PC|pc[7]~DUPLICATE_q & ( (!\PC|pc [6] & ((!\PC|pc [9] & (\REGS|regs[26][5]~q )) # (\PC|pc [9] & ((\REGS|regs[18][5]~q ))))) # (\PC|pc [6] & (((\REGS|regs[18][5]~q )))) ) ) ) + + .dataa(!\REGS|regs[26][5]~q ), + .datab(!\PC|pc [6]), + .datac(!\REGS|regs[18][5]~q ), + .datad(!\PC|pc [9]), + .datae(!\PC|pc[8]~DUPLICATE_q ), + .dataf(!\PC|pc[7]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux58~4_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux58~4 .extended_lut = "off"; +defparam \REGS|Mux58~4 .lut_mask = 64'h470F0F0F0F0F0F0F; +defparam \REGS|Mux58~4 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y16_N51 +cyclonev_lcell_comb \REGS|regs[19][5]~feeder ( +// Equation(s): +// \REGS|regs[19][5]~feeder_combout = ( \rd[5]~436_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[5]~436_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[19][5]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[19][5]~feeder .extended_lut = "off"; +defparam \REGS|regs[19][5]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[19][5]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X37_Y16_N53 +dffeas \REGS|regs[19][5] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[19][5]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~14_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[19][5]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[19][5] .is_wysiwyg = "true"; +defparam \REGS|regs[19][5] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y16_N42 +cyclonev_lcell_comb \REGS|regs[27][5]~feeder ( +// Equation(s): +// \REGS|regs[27][5]~feeder_combout = ( \rd[5]~436_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[5]~436_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[27][5]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[27][5]~feeder .extended_lut = "off"; +defparam \REGS|regs[27][5]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[27][5]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X37_Y16_N44 +dffeas \REGS|regs[27][5] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[27][5]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~15_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[27][5]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[27][5] .is_wysiwyg = "true"; +defparam \REGS|regs[27][5] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y16_N54 +cyclonev_lcell_comb \REGS|Mux58~7 ( +// Equation(s): +// \REGS|Mux58~7_combout = ( \PC|pc[7]~DUPLICATE_q & ( \PC|pc [9] & ( \REGS|regs[19][5]~q ) ) ) # ( !\PC|pc[7]~DUPLICATE_q & ( \PC|pc [9] & ( \REGS|regs[19][5]~q ) ) ) # ( \PC|pc[7]~DUPLICATE_q & ( !\PC|pc [9] & ( \REGS|regs[19][5]~q ) ) ) # ( +// !\PC|pc[7]~DUPLICATE_q & ( !\PC|pc [9] & ( (!\PC|pc [6] & ((!\PC|pc[8]~DUPLICATE_q & ((\REGS|regs[27][5]~q ))) # (\PC|pc[8]~DUPLICATE_q & (\REGS|regs[19][5]~q )))) # (\PC|pc [6] & (\REGS|regs[19][5]~q )) ) ) ) + + .dataa(!\REGS|regs[19][5]~q ), + .datab(!\REGS|regs[27][5]~q ), + .datac(!\PC|pc [6]), + .datad(!\PC|pc[8]~DUPLICATE_q ), + .datae(!\PC|pc[7]~DUPLICATE_q ), + .dataf(!\PC|pc [9]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux58~7_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux58~7 .extended_lut = "off"; +defparam \REGS|Mux58~7 .lut_mask = 64'h3555555555555555; +defparam \REGS|Mux58~7 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X33_Y7_N32 +dffeas \REGS|regs[17][5] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[5]~436_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~11_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[17][5]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[17][5] .is_wysiwyg = "true"; +defparam \REGS|regs[17][5] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X33_Y7_N38 +dffeas \REGS|regs[16][5] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[5]~436_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~2_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[16][5]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[16][5] .is_wysiwyg = "true"; +defparam \REGS|regs[16][5] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X33_Y7_N57 +cyclonev_lcell_comb \rt_alu[5]~56 ( +// Equation(s): +// \rt_alu[5]~56_combout = ( \ROM|mem~0_combout & ( \ROM|mem~10_combout & ( \REGS|regs[16][5]~q ) ) ) # ( !\ROM|mem~0_combout & ( \ROM|mem~10_combout & ( \REGS|regs[16][5]~q ) ) ) # ( \ROM|mem~0_combout & ( !\ROM|mem~10_combout & ( +// \REGS|regs[17][5]~q ) ) ) # ( !\ROM|mem~0_combout & ( !\ROM|mem~10_combout & ( \REGS|regs[16][5]~q ) ) ) + + .dataa(gnd), + .datab(gnd), + .datac(!\REGS|regs[17][5]~q ), + .datad(!\REGS|regs[16][5]~q ), + .datae(!\ROM|mem~0_combout ), + .dataf(!\ROM|mem~10_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[5]~56_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[5]~56 .extended_lut = "off"; +defparam \rt_alu[5]~56 .lut_mask = 64'h00FF0F0F00FF00FF; +defparam \rt_alu[5]~56 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X33_Y13_N18 +cyclonev_lcell_comb \REGS|regs[30][5]~feeder ( +// Equation(s): +// \REGS|regs[30][5]~feeder_combout = ( \rd[5]~436_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[5]~436_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[30][5]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[30][5]~feeder .extended_lut = "off"; +defparam \REGS|regs[30][5]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[30][5]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X33_Y13_N20 +dffeas \REGS|regs[30][5] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[30][5]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~10_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[30][5]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[30][5] .is_wysiwyg = "true"; +defparam \REGS|regs[30][5] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X33_Y13_N42 +cyclonev_lcell_comb \REGS|regs[22][5]~feeder ( +// Equation(s): +// \REGS|regs[22][5]~feeder_combout = ( \rd[5]~436_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[5]~436_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[22][5]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[22][5]~feeder .extended_lut = "off"; +defparam \REGS|regs[22][5]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[22][5]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X33_Y13_N44 +dffeas \REGS|regs[22][5] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[22][5]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~9_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[22][5]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[22][5] .is_wysiwyg = "true"; +defparam \REGS|regs[22][5] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X33_Y13_N33 +cyclonev_lcell_comb \REGS|Mux58~2 ( +// Equation(s): +// \REGS|Mux58~2_combout = ( \PC|pc[8]~DUPLICATE_q & ( \PC|pc [9] & ( \REGS|regs[22][5]~q ) ) ) # ( !\PC|pc[8]~DUPLICATE_q & ( \PC|pc [9] & ( \REGS|regs[22][5]~q ) ) ) # ( \PC|pc[8]~DUPLICATE_q & ( !\PC|pc [9] & ( \REGS|regs[22][5]~q ) ) ) # ( +// !\PC|pc[8]~DUPLICATE_q & ( !\PC|pc [9] & ( (!\PC|pc [7] & ((!\PC|pc [6] & (\REGS|regs[30][5]~q )) # (\PC|pc [6] & ((\REGS|regs[22][5]~q ))))) # (\PC|pc [7] & (((\REGS|regs[22][5]~q )))) ) ) ) + + .dataa(!\REGS|regs[30][5]~q ), + .datab(!\REGS|regs[22][5]~q ), + .datac(!\PC|pc [7]), + .datad(!\PC|pc [6]), + .datae(!\PC|pc[8]~DUPLICATE_q ), + .dataf(!\PC|pc [9]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux58~2_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux58~2 .extended_lut = "off"; +defparam \REGS|Mux58~2 .lut_mask = 64'h5333333333333333; +defparam \REGS|Mux58~2 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X37_Y13_N53 +dffeas \REGS|regs[28][5] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[5]~436_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~8_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[28][5]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[28][5] .is_wysiwyg = "true"; +defparam \REGS|regs[28][5] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X37_Y13_N2 +dffeas \REGS|regs[20][5] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[5]~436_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~7_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[20][5]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[20][5] .is_wysiwyg = "true"; +defparam \REGS|regs[20][5] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X37_Y13_N55 +dffeas \REGS|regs[29][5] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[5]~436_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~17_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[29][5]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[29][5] .is_wysiwyg = "true"; +defparam \REGS|regs[29][5] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y13_N48 +cyclonev_lcell_comb \rt_alu[5]~54 ( +// Equation(s): +// \rt_alu[5]~54_combout = ( \ROM|mem~0_combout & ( \ROM|mem~10_combout & ( \REGS|regs[28][5]~q ) ) ) # ( !\ROM|mem~0_combout & ( \ROM|mem~10_combout & ( \REGS|regs[20][5]~q ) ) ) # ( \ROM|mem~0_combout & ( !\ROM|mem~10_combout & ( +// \REGS|regs[29][5]~q ) ) ) # ( !\ROM|mem~0_combout & ( !\ROM|mem~10_combout & ( \REGS|regs[20][5]~q ) ) ) + + .dataa(!\REGS|regs[28][5]~q ), + .datab(gnd), + .datac(!\REGS|regs[20][5]~q ), + .datad(!\REGS|regs[29][5]~q ), + .datae(!\ROM|mem~0_combout ), + .dataf(!\ROM|mem~10_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[5]~54_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[5]~54 .extended_lut = "off"; +defparam \rt_alu[5]~54 .lut_mask = 64'h0F0F00FF0F0F5555; +defparam \rt_alu[5]~54 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X40_Y10_N47 +dffeas \REGS|regs[23][5] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[5]~436_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~18_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[23][5]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[23][5] .is_wysiwyg = "true"; +defparam \REGS|regs[23][5] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X40_Y7_N34 +dffeas \REGS|regs[31][5] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[5]~436_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~19_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[31][5]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[31][5] .is_wysiwyg = "true"; +defparam \REGS|regs[31][5] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X40_Y10_N42 +cyclonev_lcell_comb \REGS|Mux58~3 ( +// Equation(s): +// \REGS|Mux58~3_combout = ( \PC|pc [8] & ( \PC|pc[7]~DUPLICATE_q & ( \REGS|regs[23][5]~q ) ) ) # ( !\PC|pc [8] & ( \PC|pc[7]~DUPLICATE_q & ( \REGS|regs[23][5]~q ) ) ) # ( \PC|pc [8] & ( !\PC|pc[7]~DUPLICATE_q & ( \REGS|regs[23][5]~q ) ) ) # ( !\PC|pc +// [8] & ( !\PC|pc[7]~DUPLICATE_q & ( (!\PC|pc [9] & ((!\PC|pc [6] & ((\REGS|regs[31][5]~q ))) # (\PC|pc [6] & (\REGS|regs[23][5]~q )))) # (\PC|pc [9] & (\REGS|regs[23][5]~q )) ) ) ) + + .dataa(!\PC|pc [9]), + .datab(!\REGS|regs[23][5]~q ), + .datac(!\PC|pc [6]), + .datad(!\REGS|regs[31][5]~q ), + .datae(!\PC|pc [8]), + .dataf(!\PC|pc[7]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux58~3_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux58~3 .extended_lut = "off"; +defparam \REGS|Mux58~3 .lut_mask = 64'h13B3333333333333; +defparam \REGS|Mux58~3 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X36_Y13_N12 +cyclonev_lcell_comb \rt_alu[5]~55 ( +// Equation(s): +// \rt_alu[5]~55_combout = ( \rt_alu[5]~54_combout & ( \REGS|Mux58~3_combout & ( ((!\ROM|mem~12_combout ) # (\ROM|mem~13_combout )) # (\REGS|Mux58~2_combout ) ) ) ) # ( !\rt_alu[5]~54_combout & ( \REGS|Mux58~3_combout & ( (\ROM|mem~12_combout & +// ((\ROM|mem~13_combout ) # (\REGS|Mux58~2_combout ))) ) ) ) # ( \rt_alu[5]~54_combout & ( !\REGS|Mux58~3_combout & ( (!\ROM|mem~12_combout ) # ((\REGS|Mux58~2_combout & !\ROM|mem~13_combout )) ) ) ) # ( !\rt_alu[5]~54_combout & ( !\REGS|Mux58~3_combout +// & ( (\REGS|Mux58~2_combout & (\ROM|mem~12_combout & !\ROM|mem~13_combout )) ) ) ) + + .dataa(!\REGS|Mux58~2_combout ), + .datab(gnd), + .datac(!\ROM|mem~12_combout ), + .datad(!\ROM|mem~13_combout ), + .datae(!\rt_alu[5]~54_combout ), + .dataf(!\REGS|Mux58~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[5]~55_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[5]~55 .extended_lut = "off"; +defparam \rt_alu[5]~55 .lut_mask = 64'h0500F5F0050FF5FF; +defparam \rt_alu[5]~55 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X36_Y13_N18 +cyclonev_lcell_comb \rt_alu[5]~57 ( +// Equation(s): +// \rt_alu[5]~57_combout = ( \rt_alu[5]~56_combout & ( \rt_alu[5]~55_combout & ( (!\rt_alu[17]~5_combout ) # ((!\rt_alu[17]~4_combout & ((\REGS|Mux58~7_combout ))) # (\rt_alu[17]~4_combout & (\REGS|Mux58~4_combout ))) ) ) ) # ( !\rt_alu[5]~56_combout & +// ( \rt_alu[5]~55_combout & ( (!\rt_alu[17]~5_combout & (((\rt_alu[17]~4_combout )))) # (\rt_alu[17]~5_combout & ((!\rt_alu[17]~4_combout & ((\REGS|Mux58~7_combout ))) # (\rt_alu[17]~4_combout & (\REGS|Mux58~4_combout )))) ) ) ) # ( +// \rt_alu[5]~56_combout & ( !\rt_alu[5]~55_combout & ( (!\rt_alu[17]~5_combout & (((!\rt_alu[17]~4_combout )))) # (\rt_alu[17]~5_combout & ((!\rt_alu[17]~4_combout & ((\REGS|Mux58~7_combout ))) # (\rt_alu[17]~4_combout & (\REGS|Mux58~4_combout )))) ) +// ) ) # ( !\rt_alu[5]~56_combout & ( !\rt_alu[5]~55_combout & ( (\rt_alu[17]~5_combout & ((!\rt_alu[17]~4_combout & ((\REGS|Mux58~7_combout ))) # (\rt_alu[17]~4_combout & (\REGS|Mux58~4_combout )))) ) ) ) + + .dataa(!\rt_alu[17]~5_combout ), + .datab(!\REGS|Mux58~4_combout ), + .datac(!\REGS|Mux58~7_combout ), + .datad(!\rt_alu[17]~4_combout ), + .datae(!\rt_alu[5]~56_combout ), + .dataf(!\rt_alu[5]~55_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[5]~57_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[5]~57 .extended_lut = "off"; +defparam \rt_alu[5]~57 .lut_mask = 64'h0511AF1105BBAFBB; +defparam \rt_alu[5]~57 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X38_Y9_N51 +cyclonev_lcell_comb \rt_alu[5]~58 ( +// Equation(s): +// \rt_alu[5]~58_combout = ( \rt_alu[5]~57_combout & ( (!\rt_alu[5]~53_combout & (((!\ROM|mem~9_combout & !\rt_alu[5]~52_combout )) # (\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout ))) ) ) # ( !\rt_alu[5]~57_combout & ( (!\rt_alu[5]~53_combout & +// (((!\rt_alu[5]~52_combout ) # (\ROM|mem~9_combout )) # (\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout ))) ) ) + + .dataa(!\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout ), + .datab(!\ROM|mem~9_combout ), + .datac(!\rt_alu[5]~53_combout ), + .datad(!\rt_alu[5]~52_combout ), + .datae(gnd), + .dataf(!\rt_alu[5]~57_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[5]~58_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[5]~58 .extended_lut = "off"; +defparam \rt_alu[5]~58 .lut_mask = 64'hF070F070D050D050; +defparam \rt_alu[5]~58 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X36_Y14_N34 +dffeas \REGS|regs[8][5]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[5]~436_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~24_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[8][5]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[8][5]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[8][5]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X36_Y13_N33 +cyclonev_lcell_comb \REGS|Mux26~1 ( +// Equation(s): +// \REGS|Mux26~1_combout = ( \ROM|mem~15_combout & ( (\ROM|mem~0_combout & \REGS|regs[9][5]~q ) ) ) # ( !\ROM|mem~15_combout & ( (\ROM|mem~0_combout & \REGS|regs[8][5]~DUPLICATE_q ) ) ) + + .dataa(gnd), + .datab(!\ROM|mem~0_combout ), + .datac(!\REGS|regs[9][5]~q ), + .datad(!\REGS|regs[8][5]~DUPLICATE_q ), + .datae(gnd), + .dataf(!\ROM|mem~15_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux26~1_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux26~1 .extended_lut = "off"; +defparam \REGS|Mux26~1 .lut_mask = 64'h0033003303030303; +defparam \REGS|Mux26~1 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X36_Y13_N38 +dffeas \REGS|regs[12][5] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[5]~436_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~26_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[12][5]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[12][5] .is_wysiwyg = "true"; +defparam \REGS|regs[12][5] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y13_N28 +dffeas \REGS|regs[4][5] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[5]~436_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~22_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[4][5]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[4][5] .is_wysiwyg = "true"; +defparam \REGS|regs[4][5] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X36_Y13_N39 +cyclonev_lcell_comb \REGS|Mux58~0 ( +// Equation(s): +// \REGS|Mux58~0_combout = ( \PC|pc [7] & ( \REGS|regs[4][5]~q ) ) # ( !\PC|pc [7] & ( \REGS|regs[4][5]~q & ( (((\PC|pc [6]) # (\PC|pc[8]~DUPLICATE_q )) # (\PC|pc [9])) # (\REGS|regs[12][5]~q ) ) ) ) # ( !\PC|pc [7] & ( !\REGS|regs[4][5]~q & ( +// (\REGS|regs[12][5]~q & (!\PC|pc [9] & (!\PC|pc[8]~DUPLICATE_q & !\PC|pc [6]))) ) ) ) + + .dataa(!\REGS|regs[12][5]~q ), + .datab(!\PC|pc [9]), + .datac(!\PC|pc[8]~DUPLICATE_q ), + .datad(!\PC|pc [6]), + .datae(!\PC|pc [7]), + .dataf(!\REGS|regs[4][5]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux58~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux58~0 .extended_lut = "off"; +defparam \REGS|Mux58~0 .lut_mask = 64'h400000007FFFFFFF; +defparam \REGS|Mux58~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X36_Y4_N36 +cyclonev_lcell_comb \REGS|regs[13][5]~feeder ( +// Equation(s): +// \REGS|regs[13][5]~feeder_combout = ( \rd[5]~436_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[5]~436_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[13][5]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[13][5]~feeder .extended_lut = "off"; +defparam \REGS|regs[13][5]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[13][5]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X36_Y4_N38 +dffeas \REGS|regs[13][5] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[13][5]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~31_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[13][5]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[13][5] .is_wysiwyg = "true"; +defparam \REGS|regs[13][5] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X36_Y4_N27 +cyclonev_lcell_comb \REGS|regs[5][5]~feeder ( +// Equation(s): +// \REGS|regs[5][5]~feeder_combout = ( \rd[5]~436_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[5]~436_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[5][5]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[5][5]~feeder .extended_lut = "off"; +defparam \REGS|regs[5][5]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[5][5]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X36_Y4_N28 +dffeas \REGS|regs[5][5] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[5][5]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~30_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[5][5]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[5][5] .is_wysiwyg = "true"; +defparam \REGS|regs[5][5] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X36_Y4_N9 +cyclonev_lcell_comb \REGS|Mux58~1 ( +// Equation(s): +// \REGS|Mux58~1_combout = ( \PC|pc[6]~DUPLICATE_q & ( \PC|pc [7] & ( \REGS|regs[5][5]~q ) ) ) # ( !\PC|pc[6]~DUPLICATE_q & ( \PC|pc [7] & ( \REGS|regs[5][5]~q ) ) ) # ( \PC|pc[6]~DUPLICATE_q & ( !\PC|pc [7] & ( \REGS|regs[5][5]~q ) ) ) # ( +// !\PC|pc[6]~DUPLICATE_q & ( !\PC|pc [7] & ( (!\PC|pc [8] & ((!\PC|pc [9] & (\REGS|regs[13][5]~q )) # (\PC|pc [9] & ((\REGS|regs[5][5]~q ))))) # (\PC|pc [8] & (((\REGS|regs[5][5]~q )))) ) ) ) + + .dataa(!\REGS|regs[13][5]~q ), + .datab(!\REGS|regs[5][5]~q ), + .datac(!\PC|pc [8]), + .datad(!\PC|pc [9]), + .datae(!\PC|pc[6]~DUPLICATE_q ), + .dataf(!\PC|pc [7]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux58~1_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux58~1 .extended_lut = "off"; +defparam \REGS|Mux58~1 .lut_mask = 64'h5333333333333333; +defparam \REGS|Mux58~1 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X36_Y13_N42 +cyclonev_lcell_comb \REGS|Mux26~0 ( +// Equation(s): +// \REGS|Mux26~0_combout = ( \REGS|Mux58~3_combout & ( \ROM|mem~16_combout & ( (\ROM|mem~9_combout ) # (\REGS|Mux58~1_combout ) ) ) ) # ( !\REGS|Mux58~3_combout & ( \ROM|mem~16_combout & ( (\REGS|Mux58~1_combout & !\ROM|mem~9_combout ) ) ) ) # ( +// \REGS|Mux58~3_combout & ( !\ROM|mem~16_combout & ( (!\ROM|mem~9_combout & ((\REGS|Mux58~0_combout ))) # (\ROM|mem~9_combout & (\REGS|Mux58~2_combout )) ) ) ) # ( !\REGS|Mux58~3_combout & ( !\ROM|mem~16_combout & ( (!\ROM|mem~9_combout & +// ((\REGS|Mux58~0_combout ))) # (\ROM|mem~9_combout & (\REGS|Mux58~2_combout )) ) ) ) + + .dataa(!\REGS|Mux58~2_combout ), + .datab(!\REGS|Mux58~0_combout ), + .datac(!\REGS|Mux58~1_combout ), + .datad(!\ROM|mem~9_combout ), + .datae(!\REGS|Mux58~3_combout ), + .dataf(!\ROM|mem~16_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux26~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux26~0 .extended_lut = "off"; +defparam \REGS|Mux26~0 .lut_mask = 64'h335533550F000FFF; +defparam \REGS|Mux26~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X36_Y13_N48 +cyclonev_lcell_comb \REGS|Mux26~2 ( +// Equation(s): +// \REGS|Mux26~2_combout = ( \ROM|mem~17_combout & ( \REGS|Mux26~0_combout ) ) # ( !\ROM|mem~17_combout & ( \REGS|Mux26~0_combout & ( ((\ROM|mem~9_combout & \REGS|Mux58~4_combout )) # (\REGS|Mux26~1_combout ) ) ) ) # ( !\ROM|mem~17_combout & ( +// !\REGS|Mux26~0_combout & ( ((\ROM|mem~9_combout & \REGS|Mux58~4_combout )) # (\REGS|Mux26~1_combout ) ) ) ) + + .dataa(gnd), + .datab(!\ROM|mem~9_combout ), + .datac(!\REGS|Mux26~1_combout ), + .datad(!\REGS|Mux58~4_combout ), + .datae(!\ROM|mem~17_combout ), + .dataf(!\REGS|Mux26~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux26~2_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux26~2 .extended_lut = "off"; +defparam \REGS|Mux26~2 .lut_mask = 64'h0F3F00000F3FFFFF; +defparam \REGS|Mux26~2 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X38_Y9_N27 +cyclonev_lcell_comb \ALU|Mux26~0 ( +// Equation(s): +// \ALU|Mux26~0_combout = ( \rt_alu[5]~58_combout & ( \REGS|Mux26~2_combout & ( ((\ALU|Mux15~0_combout & (\CONTROL_UNIT|ALU_FN [1] & !\CONTROL_UNIT|ALU_FN [0]))) # (\ALU|Mux29~1_combout ) ) ) ) # ( !\rt_alu[5]~58_combout & ( \REGS|Mux26~2_combout & ( +// (\ALU|Mux15~0_combout & \CONTROL_UNIT|ALU_FN [1]) ) ) ) # ( \rt_alu[5]~58_combout & ( !\REGS|Mux26~2_combout & ( (\ALU|Mux15~0_combout & !\CONTROL_UNIT|ALU_FN [1]) ) ) ) # ( !\rt_alu[5]~58_combout & ( !\REGS|Mux26~2_combout & ( +// ((\ALU|Mux15~0_combout & (\CONTROL_UNIT|ALU_FN [1] & !\CONTROL_UNIT|ALU_FN [0]))) # (\ALU|Mux29~1_combout ) ) ) ) + + .dataa(!\ALU|Mux29~1_combout ), + .datab(!\ALU|Mux15~0_combout ), + .datac(!\CONTROL_UNIT|ALU_FN [1]), + .datad(!\CONTROL_UNIT|ALU_FN [0]), + .datae(!\rt_alu[5]~58_combout ), + .dataf(!\REGS|Mux26~2_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\ALU|Mux26~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \ALU|Mux26~0 .extended_lut = "off"; +defparam \ALU|Mux26~0 .lut_mask = 64'h5755303003035755; +defparam \ALU|Mux26~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X40_Y12_N29 +dffeas \REGS|regs[8][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[4]~434_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~24_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[8][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[8][4] .is_wysiwyg = "true"; +defparam \REGS|regs[8][4] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X40_Y12_N30 +cyclonev_lcell_comb \REGS|Mux59~15 ( +// Equation(s): +// \REGS|Mux59~15_combout = ( !\rt_alu[17]~11_combout & ( (\REGS|regs[8][4]~q & (\ROM|mem~0_combout & (!\rt_alu[17]~10_combout & !\ROM|mem~9_combout ))) ) ) + + .dataa(!\REGS|regs[8][4]~q ), + .datab(!\ROM|mem~0_combout ), + .datac(!\rt_alu[17]~10_combout ), + .datad(!\ROM|mem~9_combout ), + .datae(gnd), + .dataf(!\rt_alu[17]~11_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux59~15_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux59~15 .extended_lut = "off"; +defparam \REGS|Mux59~15 .lut_mask = 64'h1000100000000000; +defparam \REGS|Mux59~15 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X41_Y6_N48 +cyclonev_lcell_comb \REGS|regs[19][4]~feeder ( +// Equation(s): +// \REGS|regs[19][4]~feeder_combout = ( \rd[4]~434_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[4]~434_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[19][4]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[19][4]~feeder .extended_lut = "off"; +defparam \REGS|regs[19][4]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[19][4]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X41_Y6_N50 +dffeas \REGS|regs[19][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[19][4]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~14_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[19][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[19][4] .is_wysiwyg = "true"; +defparam \REGS|regs[19][4] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X41_Y6_N39 +cyclonev_lcell_comb \REGS|regs[27][4]~feeder ( +// Equation(s): +// \REGS|regs[27][4]~feeder_combout = ( \rd[4]~434_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[4]~434_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[27][4]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[27][4]~feeder .extended_lut = "off"; +defparam \REGS|regs[27][4]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[27][4]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X41_Y6_N41 +dffeas \REGS|regs[27][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[27][4]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~15_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[27][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[27][4] .is_wysiwyg = "true"; +defparam \REGS|regs[27][4] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X41_Y6_N15 +cyclonev_lcell_comb \REGS|Mux59~1 ( +// Equation(s): +// \REGS|Mux59~1_combout = ( \PC|pc [8] & ( \PC|pc [9] & ( \REGS|regs[19][4]~q ) ) ) # ( !\PC|pc [8] & ( \PC|pc [9] & ( \REGS|regs[19][4]~q ) ) ) # ( \PC|pc [8] & ( !\PC|pc [9] & ( \REGS|regs[19][4]~q ) ) ) # ( !\PC|pc [8] & ( !\PC|pc [9] & ( (!\PC|pc +// [7] & ((!\PC|pc[6]~DUPLICATE_q & ((\REGS|regs[27][4]~q ))) # (\PC|pc[6]~DUPLICATE_q & (\REGS|regs[19][4]~q )))) # (\PC|pc [7] & (\REGS|regs[19][4]~q )) ) ) ) + + .dataa(!\REGS|regs[19][4]~q ), + .datab(!\REGS|regs[27][4]~q ), + .datac(!\PC|pc [7]), + .datad(!\PC|pc[6]~DUPLICATE_q ), + .datae(!\PC|pc [8]), + .dataf(!\PC|pc [9]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux59~1_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux59~1 .extended_lut = "off"; +defparam \REGS|Mux59~1 .lut_mask = 64'h3555555555555555; +defparam \REGS|Mux59~1 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X41_Y6_N24 +cyclonev_lcell_comb \REGS|regs[24][4]~feeder ( +// Equation(s): +// \REGS|regs[24][4]~feeder_combout = ( \rd[4]~434_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[4]~434_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[24][4]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[24][4]~feeder .extended_lut = "off"; +defparam \REGS|regs[24][4]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[24][4]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X41_Y6_N26 +dffeas \REGS|regs[24][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[24][4]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~4_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[24][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[24][4] .is_wysiwyg = "true"; +defparam \REGS|regs[24][4] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X40_Y6_N45 +cyclonev_lcell_comb \REGS|regs[25][4]~feeder ( +// Equation(s): +// \REGS|regs[25][4]~feeder_combout = ( \rd[4]~434_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[4]~434_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[25][4]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[25][4]~feeder .extended_lut = "off"; +defparam \REGS|regs[25][4]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[25][4]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X40_Y6_N47 +dffeas \REGS|regs[25][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[25][4]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~13_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[25][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[25][4] .is_wysiwyg = "true"; +defparam \REGS|regs[25][4] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y6_N33 +cyclonev_lcell_comb \REGS|regs[16][4]~feeder ( +// Equation(s): +// \REGS|regs[16][4]~feeder_combout = ( \rd[4]~434_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[4]~434_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[16][4]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[16][4]~feeder .extended_lut = "off"; +defparam \REGS|regs[16][4]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[16][4]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X42_Y6_N34 +dffeas \REGS|regs[16][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[16][4]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~2_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[16][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[16][4] .is_wysiwyg = "true"; +defparam \REGS|regs[16][4] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X40_Y6_N15 +cyclonev_lcell_comb \REGS|Mux59~6 ( +// Equation(s): +// \REGS|Mux59~6_combout = ( \ROM|mem~0_combout & ( \ROM|mem~10_combout & ( \REGS|regs[24][4]~q ) ) ) # ( !\ROM|mem~0_combout & ( \ROM|mem~10_combout & ( \REGS|regs[16][4]~q ) ) ) # ( \ROM|mem~0_combout & ( !\ROM|mem~10_combout & ( +// \REGS|regs[25][4]~q ) ) ) # ( !\ROM|mem~0_combout & ( !\ROM|mem~10_combout & ( \REGS|regs[16][4]~q ) ) ) + + .dataa(gnd), + .datab(!\REGS|regs[24][4]~q ), + .datac(!\REGS|regs[25][4]~q ), + .datad(!\REGS|regs[16][4]~q ), + .datae(!\ROM|mem~0_combout ), + .dataf(!\ROM|mem~10_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux59~6_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux59~6 .extended_lut = "off"; +defparam \REGS|Mux59~6 .lut_mask = 64'h00FF0F0F00FF3333; +defparam \REGS|Mux59~6 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X36_Y7_N2 +dffeas \REGS|regs[23][4]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[4]~434_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~18_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[23][4]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[23][4]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[23][4]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: FF_X42_Y8_N13 +dffeas \REGS|regs[31][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[4]~434_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~19_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[31][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[31][4] .is_wysiwyg = "true"; +defparam \REGS|regs[31][4] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X36_Y7_N3 +cyclonev_lcell_comb \REGS|Mux59~3 ( +// Equation(s): +// \REGS|Mux59~3_combout = ( \PC|pc [9] & ( \REGS|regs[31][4]~q & ( \REGS|regs[23][4]~DUPLICATE_q ) ) ) # ( !\PC|pc [9] & ( \REGS|regs[31][4]~q & ( ((!\PC|pc [7] & (!\PC|pc[6]~DUPLICATE_q & !\PC|pc[8]~DUPLICATE_q ))) # (\REGS|regs[23][4]~DUPLICATE_q ) ) +// ) ) # ( \PC|pc [9] & ( !\REGS|regs[31][4]~q & ( \REGS|regs[23][4]~DUPLICATE_q ) ) ) # ( !\PC|pc [9] & ( !\REGS|regs[31][4]~q & ( (\REGS|regs[23][4]~DUPLICATE_q & (((\PC|pc[8]~DUPLICATE_q ) # (\PC|pc[6]~DUPLICATE_q )) # (\PC|pc [7]))) ) ) ) + + .dataa(!\REGS|regs[23][4]~DUPLICATE_q ), + .datab(!\PC|pc [7]), + .datac(!\PC|pc[6]~DUPLICATE_q ), + .datad(!\PC|pc[8]~DUPLICATE_q ), + .datae(!\PC|pc [9]), + .dataf(!\REGS|regs[31][4]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux59~3_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux59~3 .extended_lut = "off"; +defparam \REGS|Mux59~3 .lut_mask = 64'h15555555D5555555; +defparam \REGS|Mux59~3 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X38_Y5_N29 +dffeas \REGS|regs[20][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[4]~434_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~7_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[20][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[20][4] .is_wysiwyg = "true"; +defparam \REGS|regs[20][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X38_Y5_N47 +dffeas \REGS|regs[29][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[4]~434_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~17_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[29][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[29][4] .is_wysiwyg = "true"; +defparam \REGS|regs[29][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X43_Y4_N47 +dffeas \REGS|regs[28][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[4]~434_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~8_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[28][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[28][4] .is_wysiwyg = "true"; +defparam \REGS|regs[28][4] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X38_Y5_N18 +cyclonev_lcell_comb \REGS|Mux59~2 ( +// Equation(s): +// \REGS|Mux59~2_combout = ( \ROM|mem~10_combout & ( \ROM|mem~0_combout & ( \REGS|regs[28][4]~q ) ) ) # ( !\ROM|mem~10_combout & ( \ROM|mem~0_combout & ( \REGS|regs[29][4]~q ) ) ) # ( \ROM|mem~10_combout & ( !\ROM|mem~0_combout & ( +// \REGS|regs[20][4]~q ) ) ) # ( !\ROM|mem~10_combout & ( !\ROM|mem~0_combout & ( \REGS|regs[20][4]~q ) ) ) + + .dataa(!\REGS|regs[20][4]~q ), + .datab(!\REGS|regs[29][4]~q ), + .datac(!\REGS|regs[28][4]~q ), + .datad(gnd), + .datae(!\ROM|mem~10_combout ), + .dataf(!\ROM|mem~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux59~2_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux59~2 .extended_lut = "off"; +defparam \REGS|Mux59~2 .lut_mask = 64'h5555555533330F0F; +defparam \REGS|Mux59~2 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y4_N30 +cyclonev_lcell_comb \REGS|regs[30][4]~feeder ( +// Equation(s): +// \REGS|regs[30][4]~feeder_combout = ( \rd[4]~434_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[4]~434_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[30][4]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[30][4]~feeder .extended_lut = "off"; +defparam \REGS|regs[30][4]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[30][4]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X37_Y4_N32 +dffeas \REGS|regs[30][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[30][4]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~10_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[30][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[30][4] .is_wysiwyg = "true"; +defparam \REGS|regs[30][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X43_Y4_N13 +dffeas \REGS|regs[22][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[4]~434_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~9_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[22][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[22][4] .is_wysiwyg = "true"; +defparam \REGS|regs[22][4] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y4_N39 +cyclonev_lcell_comb \REGS|Mux59~4 ( +// Equation(s): +// \REGS|Mux59~4_combout = ( \PC|pc[6]~DUPLICATE_q & ( \PC|pc [7] & ( \REGS|regs[22][4]~q ) ) ) # ( !\PC|pc[6]~DUPLICATE_q & ( \PC|pc [7] & ( \REGS|regs[22][4]~q ) ) ) # ( \PC|pc[6]~DUPLICATE_q & ( !\PC|pc [7] & ( \REGS|regs[22][4]~q ) ) ) # ( +// !\PC|pc[6]~DUPLICATE_q & ( !\PC|pc [7] & ( (!\PC|pc [9] & ((!\PC|pc[8]~DUPLICATE_q & (\REGS|regs[30][4]~q )) # (\PC|pc[8]~DUPLICATE_q & ((\REGS|regs[22][4]~q ))))) # (\PC|pc [9] & (((\REGS|regs[22][4]~q )))) ) ) ) + + .dataa(!\PC|pc [9]), + .datab(!\REGS|regs[30][4]~q ), + .datac(!\PC|pc[8]~DUPLICATE_q ), + .datad(!\REGS|regs[22][4]~q ), + .datae(!\PC|pc[6]~DUPLICATE_q ), + .dataf(!\PC|pc [7]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux59~4_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux59~4 .extended_lut = "off"; +defparam \REGS|Mux59~4 .lut_mask = 64'h207F00FF00FF00FF; +defparam \REGS|Mux59~4 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y7_N57 +cyclonev_lcell_comb \REGS|Mux59~5 ( +// Equation(s): +// \REGS|Mux59~5_combout = ( \REGS|Mux59~4_combout & ( (!\ROM|mem~12_combout & (((\REGS|Mux59~2_combout )))) # (\ROM|mem~12_combout & ((!\ROM|mem~13_combout ) # ((\REGS|Mux59~3_combout )))) ) ) # ( !\REGS|Mux59~4_combout & ( (!\ROM|mem~12_combout & +// (((\REGS|Mux59~2_combout )))) # (\ROM|mem~12_combout & (\ROM|mem~13_combout & (\REGS|Mux59~3_combout ))) ) ) + + .dataa(!\ROM|mem~13_combout ), + .datab(!\REGS|Mux59~3_combout ), + .datac(!\REGS|Mux59~2_combout ), + .datad(!\ROM|mem~12_combout ), + .datae(!\REGS|Mux59~4_combout ), + .dataf(gnd), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux59~5_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux59~5 .extended_lut = "off"; +defparam \REGS|Mux59~5 .lut_mask = 64'h0F110FBB0F110FBB; +defparam \REGS|Mux59~5 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y7_N18 +cyclonev_lcell_comb \REGS|Mux59~7 ( +// Equation(s): +// \REGS|Mux59~7_combout = ( \REGS|Mux59~6_combout & ( \REGS|Mux59~5_combout & ( (!\rt_alu[17]~5_combout ) # ((!\rt_alu[17]~4_combout & ((\REGS|Mux59~1_combout ))) # (\rt_alu[17]~4_combout & (\REGS|Mux59~0_combout ))) ) ) ) # ( !\REGS|Mux59~6_combout & +// ( \REGS|Mux59~5_combout & ( (!\rt_alu[17]~5_combout & (\rt_alu[17]~4_combout )) # (\rt_alu[17]~5_combout & ((!\rt_alu[17]~4_combout & ((\REGS|Mux59~1_combout ))) # (\rt_alu[17]~4_combout & (\REGS|Mux59~0_combout )))) ) ) ) # ( \REGS|Mux59~6_combout +// & ( !\REGS|Mux59~5_combout & ( (!\rt_alu[17]~5_combout & (!\rt_alu[17]~4_combout )) # (\rt_alu[17]~5_combout & ((!\rt_alu[17]~4_combout & ((\REGS|Mux59~1_combout ))) # (\rt_alu[17]~4_combout & (\REGS|Mux59~0_combout )))) ) ) ) # ( +// !\REGS|Mux59~6_combout & ( !\REGS|Mux59~5_combout & ( (\rt_alu[17]~5_combout & ((!\rt_alu[17]~4_combout & ((\REGS|Mux59~1_combout ))) # (\rt_alu[17]~4_combout & (\REGS|Mux59~0_combout )))) ) ) ) + + .dataa(!\rt_alu[17]~5_combout ), + .datab(!\rt_alu[17]~4_combout ), + .datac(!\REGS|Mux59~0_combout ), + .datad(!\REGS|Mux59~1_combout ), + .datae(!\REGS|Mux59~6_combout ), + .dataf(!\REGS|Mux59~5_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux59~7_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux59~7 .extended_lut = "off"; +defparam \REGS|Mux59~7 .lut_mask = 64'h014589CD2367ABEF; +defparam \REGS|Mux59~7 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y8_N30 +cyclonev_lcell_comb \REGS|regs[9][4]~feeder ( +// Equation(s): +// \REGS|regs[9][4]~feeder_combout = ( \rd[4]~434_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[4]~434_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[9][4]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[9][4]~feeder .extended_lut = "off"; +defparam \REGS|regs[9][4]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[9][4]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X42_Y8_N32 +dffeas \REGS|regs[9][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[9][4]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~29_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[9][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[9][4] .is_wysiwyg = "true"; +defparam \REGS|regs[9][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X41_Y4_N52 +dffeas \REGS|regs[1][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[4]~434_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~28_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[1][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[1][4] .is_wysiwyg = "true"; +defparam \REGS|regs[1][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X42_Y8_N26 +dffeas \REGS|regs[11][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[4]~434_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~37_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[11][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[11][4] .is_wysiwyg = "true"; +defparam \REGS|regs[11][4] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X40_Y5_N36 +cyclonev_lcell_comb \REGS|regs[2][4]~feeder ( +// Equation(s): +// \REGS|regs[2][4]~feeder_combout = ( \rd[4]~434_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[4]~434_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[2][4]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[2][4]~feeder .extended_lut = "off"; +defparam \REGS|regs[2][4]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[2][4]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X40_Y5_N37 +dffeas \REGS|regs[2][4]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[2][4]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~32_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[2][4]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[2][4]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[2][4]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: FF_X35_Y8_N8 +dffeas \REGS|regs[10][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[4]~434_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~33_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[10][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[10][4] .is_wysiwyg = "true"; +defparam \REGS|regs[10][4] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y8_N27 +cyclonev_lcell_comb \REGS|Mux59~12 ( +// Equation(s): +// \REGS|Mux59~12_combout = ( \ROM|mem~10_combout & ( \ROM|mem~0_combout & ( \REGS|regs[10][4]~q ) ) ) # ( !\ROM|mem~10_combout & ( \ROM|mem~0_combout & ( \REGS|regs[11][4]~q ) ) ) # ( \ROM|mem~10_combout & ( !\ROM|mem~0_combout & ( +// \REGS|regs[2][4]~DUPLICATE_q ) ) ) # ( !\ROM|mem~10_combout & ( !\ROM|mem~0_combout & ( \REGS|regs[2][4]~DUPLICATE_q ) ) ) + + .dataa(!\REGS|regs[11][4]~q ), + .datab(!\REGS|regs[2][4]~DUPLICATE_q ), + .datac(!\REGS|regs[10][4]~q ), + .datad(gnd), + .datae(!\ROM|mem~10_combout ), + .dataf(!\ROM|mem~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux59~12_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux59~12 .extended_lut = "off"; +defparam \REGS|Mux59~12 .lut_mask = 64'h3333333355550F0F; +defparam \REGS|Mux59~12 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y8_N9 +cyclonev_lcell_comb \REGS|Mux59~13 ( +// Equation(s): +// \REGS|Mux59~13_combout = ( \rt_alu[17]~10_combout & ( \rt_alu[17]~11_combout & ( \REGS|Mux59~12_combout ) ) ) # ( \rt_alu[17]~10_combout & ( !\rt_alu[17]~11_combout & ( (!\ROM|mem~0_combout & ((\REGS|regs[1][4]~q ))) # (\ROM|mem~0_combout & +// (\REGS|regs[9][4]~q )) ) ) ) # ( !\rt_alu[17]~10_combout & ( !\rt_alu[17]~11_combout & ( (!\ROM|mem~0_combout & ((\REGS|regs[1][4]~q ))) # (\ROM|mem~0_combout & (\REGS|regs[9][4]~q )) ) ) ) + + .dataa(!\ROM|mem~0_combout ), + .datab(!\REGS|regs[9][4]~q ), + .datac(!\REGS|regs[1][4]~q ), + .datad(!\REGS|Mux59~12_combout ), + .datae(!\rt_alu[17]~10_combout ), + .dataf(!\rt_alu[17]~11_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux59~13_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux59~13 .extended_lut = "off"; +defparam \REGS|Mux59~13 .lut_mask = 64'h1B1B1B1B000000FF; +defparam \REGS|Mux59~13 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X41_Y8_N5 +dffeas \REGS|regs[13][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[4]~434_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~31_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[13][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[13][4] .is_wysiwyg = "true"; +defparam \REGS|regs[13][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X37_Y7_N10 +dffeas \REGS|regs[5][4]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[4]~434_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~30_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[5][4]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[5][4]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[5][4]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X41_Y8_N48 +cyclonev_lcell_comb \REGS|Mux59~9 ( +// Equation(s): +// \REGS|Mux59~9_combout = ( \PC|pc [7] & ( \PC|pc[9]~DUPLICATE_q & ( \REGS|regs[5][4]~DUPLICATE_q ) ) ) # ( !\PC|pc [7] & ( \PC|pc[9]~DUPLICATE_q & ( \REGS|regs[5][4]~DUPLICATE_q ) ) ) # ( \PC|pc [7] & ( !\PC|pc[9]~DUPLICATE_q & ( +// \REGS|regs[5][4]~DUPLICATE_q ) ) ) # ( !\PC|pc [7] & ( !\PC|pc[9]~DUPLICATE_q & ( (!\PC|pc[8]~DUPLICATE_q & ((!\PC|pc [6] & (\REGS|regs[13][4]~q )) # (\PC|pc [6] & ((\REGS|regs[5][4]~DUPLICATE_q ))))) # (\PC|pc[8]~DUPLICATE_q & +// (((\REGS|regs[5][4]~DUPLICATE_q )))) ) ) ) + + .dataa(!\REGS|regs[13][4]~q ), + .datab(!\PC|pc[8]~DUPLICATE_q ), + .datac(!\PC|pc [6]), + .datad(!\REGS|regs[5][4]~DUPLICATE_q ), + .datae(!\PC|pc [7]), + .dataf(!\PC|pc[9]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux59~9_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux59~9 .extended_lut = "off"; +defparam \REGS|Mux59~9 .lut_mask = 64'h407F00FF00FF00FF; +defparam \REGS|Mux59~9 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X37_Y7_N56 +dffeas \REGS|regs[4][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[4]~434_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~22_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[4][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[4][4] .is_wysiwyg = "true"; +defparam \REGS|regs[4][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X37_Y7_N14 +dffeas \REGS|regs[12][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[4]~434_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~26_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[12][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[12][4] .is_wysiwyg = "true"; +defparam \REGS|regs[12][4] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y7_N45 +cyclonev_lcell_comb \REGS|Mux59~10 ( +// Equation(s): +// \REGS|Mux59~10_combout = ( \REGS|regs[4][4]~q & ( \REGS|regs[12][4]~q ) ) # ( !\REGS|regs[4][4]~q & ( \REGS|regs[12][4]~q & ( (!\PC|pc[8]~DUPLICATE_q & (!\PC|pc[6]~DUPLICATE_q & (!\PC|pc[7]~DUPLICATE_q & !\PC|pc [9]))) ) ) ) # ( \REGS|regs[4][4]~q +// & ( !\REGS|regs[12][4]~q & ( (((\PC|pc [9]) # (\PC|pc[7]~DUPLICATE_q )) # (\PC|pc[6]~DUPLICATE_q )) # (\PC|pc[8]~DUPLICATE_q ) ) ) ) + + .dataa(!\PC|pc[8]~DUPLICATE_q ), + .datab(!\PC|pc[6]~DUPLICATE_q ), + .datac(!\PC|pc[7]~DUPLICATE_q ), + .datad(!\PC|pc [9]), + .datae(!\REGS|regs[4][4]~q ), + .dataf(!\REGS|regs[12][4]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux59~10_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux59~10 .extended_lut = "off"; +defparam \REGS|Mux59~10 .lut_mask = 64'h00007FFF8000FFFF; +defparam \REGS|Mux59~10 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X41_Y7_N2 +dffeas \REGS|regs[14][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[4]~434_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~35_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[14][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[14][4] .is_wysiwyg = "true"; +defparam \REGS|regs[14][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X41_Y7_N26 +dffeas \REGS|regs[15][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[4]~434_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~39_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[15][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[15][4] .is_wysiwyg = "true"; +defparam \REGS|regs[15][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X40_Y12_N53 +dffeas \REGS|regs[6][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[4]~434_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~34_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[6][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[6][4] .is_wysiwyg = "true"; +defparam \REGS|regs[6][4] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X41_Y7_N39 +cyclonev_lcell_comb \REGS|Mux59~8 ( +// Equation(s): +// \REGS|Mux59~8_combout = ( \ROM|mem~10_combout & ( \REGS|regs[6][4]~q & ( (!\ROM|mem~0_combout ) # (\REGS|regs[14][4]~q ) ) ) ) # ( !\ROM|mem~10_combout & ( \REGS|regs[6][4]~q & ( (!\ROM|mem~0_combout ) # (\REGS|regs[15][4]~q ) ) ) ) # ( +// \ROM|mem~10_combout & ( !\REGS|regs[6][4]~q & ( (\REGS|regs[14][4]~q & \ROM|mem~0_combout ) ) ) ) # ( !\ROM|mem~10_combout & ( !\REGS|regs[6][4]~q & ( (\ROM|mem~0_combout & \REGS|regs[15][4]~q ) ) ) ) + + .dataa(!\REGS|regs[14][4]~q ), + .datab(gnd), + .datac(!\ROM|mem~0_combout ), + .datad(!\REGS|regs[15][4]~q ), + .datae(!\ROM|mem~10_combout ), + .dataf(!\REGS|regs[6][4]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux59~8_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux59~8 .extended_lut = "off"; +defparam \REGS|Mux59~8 .lut_mask = 64'h000F0505F0FFF5F5; +defparam \REGS|Mux59~8 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y7_N15 +cyclonev_lcell_comb \REGS|Mux59~11 ( +// Equation(s): +// \REGS|Mux59~11_combout = ( \REGS|Mux59~8_combout & ( ((!\ROM|mem~13_combout & ((\REGS|Mux59~10_combout ))) # (\ROM|mem~13_combout & (\REGS|Mux59~9_combout ))) # (\ROM|mem~12_combout ) ) ) # ( !\REGS|Mux59~8_combout & ( (!\ROM|mem~12_combout & +// ((!\ROM|mem~13_combout & ((\REGS|Mux59~10_combout ))) # (\ROM|mem~13_combout & (\REGS|Mux59~9_combout )))) ) ) + + .dataa(!\REGS|Mux59~9_combout ), + .datab(!\REGS|Mux59~10_combout ), + .datac(!\ROM|mem~13_combout ), + .datad(!\ROM|mem~12_combout ), + .datae(!\REGS|Mux59~8_combout ), + .dataf(gnd), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux59~11_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux59~11 .extended_lut = "off"; +defparam \REGS|Mux59~11 .lut_mask = 64'h350035FF350035FF; +defparam \REGS|Mux59~11 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y7_N36 +cyclonev_lcell_comb \REGS|Mux59~14 ( +// Equation(s): +// \REGS|Mux59~14_combout = ( \REGS|Mux59~13_combout & ( \REGS|Mux59~11_combout & ( (!\ROM|mem~9_combout & ((\rt_alu[17]~11_combout ) # (\rt_alu[17]~10_combout ))) ) ) ) # ( !\REGS|Mux59~13_combout & ( \REGS|Mux59~11_combout & ( (!\ROM|mem~9_combout & +// (!\rt_alu[17]~10_combout & \rt_alu[17]~11_combout )) ) ) ) # ( \REGS|Mux59~13_combout & ( !\REGS|Mux59~11_combout & ( (!\ROM|mem~9_combout & ((\rt_alu[17]~11_combout ) # (\rt_alu[17]~10_combout ))) ) ) ) + + .dataa(gnd), + .datab(!\ROM|mem~9_combout ), + .datac(!\rt_alu[17]~10_combout ), + .datad(!\rt_alu[17]~11_combout ), + .datae(!\REGS|Mux59~13_combout ), + .dataf(!\REGS|Mux59~11_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux59~14_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux59~14 .extended_lut = "off"; +defparam \REGS|Mux59~14 .lut_mask = 64'h00000CCC00C00CCC; +defparam \REGS|Mux59~14 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y11_N54 +cyclonev_lcell_comb \rt_alu[4]~48 ( +// Equation(s): +// \rt_alu[4]~48_combout = ( \REGS|Mux59~14_combout & ( !\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout ) ) # ( !\REGS|Mux59~14_combout & ( (!\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout & (((\ROM|mem~9_combout & \REGS|Mux59~7_combout )) # +// (\REGS|Mux59~15_combout ))) ) ) + + .dataa(!\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout ), + .datab(!\ROM|mem~9_combout ), + .datac(!\REGS|Mux59~15_combout ), + .datad(!\REGS|Mux59~7_combout ), + .datae(gnd), + .dataf(!\REGS|Mux59~14_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[4]~48_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[4]~48 .extended_lut = "off"; +defparam \rt_alu[4]~48 .lut_mask = 64'h0A2A0A2AAAAAAAAA; +defparam \rt_alu[4]~48 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X38_Y9_N6 +cyclonev_lcell_comb \ALU|Mux27~0 ( +// Equation(s): +// \ALU|Mux27~0_combout = ( \REGS|Mux27~2_combout & ( \rt_alu[4]~48_combout & ( (\CONTROL_UNIT|ALU_FN [1] & \ALU|Mux15~0_combout ) ) ) ) # ( !\REGS|Mux27~2_combout & ( \rt_alu[4]~48_combout & ( ((!\CONTROL_UNIT|ALU_FN [0] & (\CONTROL_UNIT|ALU_FN [1] & +// \ALU|Mux15~0_combout ))) # (\ALU|Mux29~1_combout ) ) ) ) # ( \REGS|Mux27~2_combout & ( !\rt_alu[4]~48_combout & ( ((!\CONTROL_UNIT|ALU_FN [0] & (\CONTROL_UNIT|ALU_FN [1] & \ALU|Mux15~0_combout ))) # (\ALU|Mux29~1_combout ) ) ) ) # ( +// !\REGS|Mux27~2_combout & ( !\rt_alu[4]~48_combout & ( (!\CONTROL_UNIT|ALU_FN [1] & \ALU|Mux15~0_combout ) ) ) ) + + .dataa(!\CONTROL_UNIT|ALU_FN [0]), + .datab(!\CONTROL_UNIT|ALU_FN [1]), + .datac(!\ALU|Mux29~1_combout ), + .datad(!\ALU|Mux15~0_combout ), + .datae(!\REGS|Mux27~2_combout ), + .dataf(!\rt_alu[4]~48_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\ALU|Mux27~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \ALU|Mux27~0 .extended_lut = "off"; +defparam \ALU|Mux27~0 .lut_mask = 64'h00CC0F2F0F2F0033; +defparam \ALU|Mux27~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X35_Y7_N14 +dffeas \REGS|regs[2][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[3]~347_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~32_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[2][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[2][3] .is_wysiwyg = "true"; +defparam \REGS|regs[2][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X35_Y7_N44 +dffeas \REGS|regs[10][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[3]~347_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~33_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[10][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[10][3] .is_wysiwyg = "true"; +defparam \REGS|regs[10][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X35_Y7_N56 +dffeas \REGS|regs[11][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[3]~347_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~37_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[11][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[11][3] .is_wysiwyg = "true"; +defparam \REGS|regs[11][3] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X35_Y7_N57 +cyclonev_lcell_comb \REGS|Mux60~12 ( +// Equation(s): +// \REGS|Mux60~12_combout = ( \ROM|mem~10_combout & ( \ROM|mem~0_combout & ( \REGS|regs[10][3]~q ) ) ) # ( !\ROM|mem~10_combout & ( \ROM|mem~0_combout & ( \REGS|regs[11][3]~q ) ) ) # ( \ROM|mem~10_combout & ( !\ROM|mem~0_combout & ( +// \REGS|regs[2][3]~q ) ) ) # ( !\ROM|mem~10_combout & ( !\ROM|mem~0_combout & ( \REGS|regs[2][3]~q ) ) ) + + .dataa(gnd), + .datab(!\REGS|regs[2][3]~q ), + .datac(!\REGS|regs[10][3]~q ), + .datad(!\REGS|regs[11][3]~q ), + .datae(!\ROM|mem~10_combout ), + .dataf(!\ROM|mem~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux60~12_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux60~12 .extended_lut = "off"; +defparam \REGS|Mux60~12 .lut_mask = 64'h3333333300FF0F0F; +defparam \REGS|Mux60~12 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X41_Y4_N41 +dffeas \REGS|regs[1][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[3]~347_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~28_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[1][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[1][3] .is_wysiwyg = "true"; +defparam \REGS|regs[1][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X40_Y7_N2 +dffeas \REGS|regs[9][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[3]~347_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~29_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[9][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[9][3] .is_wysiwyg = "true"; +defparam \REGS|regs[9][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X35_Y9_N22 +dffeas \REGS|regs[8][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[3]~347_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~24_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[8][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[8][3] .is_wysiwyg = "true"; +defparam \REGS|regs[8][3] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X40_Y7_N3 +cyclonev_lcell_comb \REGS|Mux60~13 ( +// Equation(s): +// \REGS|Mux60~13_combout = ( !\rt_alu[17]~11_combout & ( \rt_alu[17]~10_combout & ( (!\ROM|mem~0_combout & (\REGS|regs[1][3]~q )) # (\ROM|mem~0_combout & ((\REGS|regs[9][3]~q ))) ) ) ) # ( !\rt_alu[17]~11_combout & ( !\rt_alu[17]~10_combout & ( +// (\REGS|regs[8][3]~q & \ROM|mem~0_combout ) ) ) ) + + .dataa(!\REGS|regs[1][3]~q ), + .datab(!\REGS|regs[9][3]~q ), + .datac(!\REGS|regs[8][3]~q ), + .datad(!\ROM|mem~0_combout ), + .datae(!\rt_alu[17]~11_combout ), + .dataf(!\rt_alu[17]~10_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux60~13_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux60~13 .extended_lut = "off"; +defparam \REGS|Mux60~13 .lut_mask = 64'h000F000055330000; +defparam \REGS|Mux60~13 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X37_Y6_N43 +dffeas \REGS|regs[6][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[3]~347_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~34_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[6][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[6][3] .is_wysiwyg = "true"; +defparam \REGS|regs[6][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X41_Y7_N59 +dffeas \REGS|regs[14][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[3]~347_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~35_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[14][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[14][3] .is_wysiwyg = "true"; +defparam \REGS|regs[14][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X41_Y7_N50 +dffeas \REGS|regs[15][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[3]~347_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~39_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[15][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[15][3] .is_wysiwyg = "true"; +defparam \REGS|regs[15][3] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X41_Y7_N45 +cyclonev_lcell_comb \REGS|Mux60~10 ( +// Equation(s): +// \REGS|Mux60~10_combout = ( \ROM|mem~10_combout & ( \ROM|mem~0_combout & ( \REGS|regs[14][3]~q ) ) ) # ( !\ROM|mem~10_combout & ( \ROM|mem~0_combout & ( \REGS|regs[15][3]~q ) ) ) # ( \ROM|mem~10_combout & ( !\ROM|mem~0_combout & ( +// \REGS|regs[6][3]~q ) ) ) # ( !\ROM|mem~10_combout & ( !\ROM|mem~0_combout & ( \REGS|regs[6][3]~q ) ) ) + + .dataa(!\REGS|regs[6][3]~q ), + .datab(gnd), + .datac(!\REGS|regs[14][3]~q ), + .datad(!\REGS|regs[15][3]~q ), + .datae(!\ROM|mem~10_combout ), + .dataf(!\ROM|mem~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux60~10_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux60~10 .extended_lut = "off"; +defparam \REGS|Mux60~10 .lut_mask = 64'h5555555500FF0F0F; +defparam \REGS|Mux60~10 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X40_Y8_N50 +dffeas \REGS|regs[4][3]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[3]~347_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~22_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[4][3]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[4][3]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[4][3]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: FF_X40_Y8_N14 +dffeas \REGS|regs[12][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[3]~347_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~26_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[12][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[12][3] .is_wysiwyg = "true"; +defparam \REGS|regs[12][3] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X40_Y8_N51 +cyclonev_lcell_comb \REGS|Mux60~0 ( +// Equation(s): +// \REGS|Mux60~0_combout = ( \PC|pc [9] & ( \PC|pc [6] & ( \REGS|regs[4][3]~DUPLICATE_q ) ) ) # ( !\PC|pc [9] & ( \PC|pc [6] & ( \REGS|regs[4][3]~DUPLICATE_q ) ) ) # ( \PC|pc [9] & ( !\PC|pc [6] & ( \REGS|regs[4][3]~DUPLICATE_q ) ) ) # ( !\PC|pc [9] & ( +// !\PC|pc [6] & ( (!\PC|pc[8]~DUPLICATE_q & ((!\PC|pc [7] & ((\REGS|regs[12][3]~q ))) # (\PC|pc [7] & (\REGS|regs[4][3]~DUPLICATE_q )))) # (\PC|pc[8]~DUPLICATE_q & (\REGS|regs[4][3]~DUPLICATE_q )) ) ) ) + + .dataa(!\REGS|regs[4][3]~DUPLICATE_q ), + .datab(!\REGS|regs[12][3]~q ), + .datac(!\PC|pc[8]~DUPLICATE_q ), + .datad(!\PC|pc [7]), + .datae(!\PC|pc [9]), + .dataf(!\PC|pc [6]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux60~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux60~0 .extended_lut = "off"; +defparam \REGS|Mux60~0 .lut_mask = 64'h3555555555555555; +defparam \REGS|Mux60~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X41_Y8_N56 +dffeas \REGS|regs[13][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[3]~347_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~31_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[13][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[13][3] .is_wysiwyg = "true"; +defparam \REGS|regs[13][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X41_Y8_N52 +dffeas \REGS|regs[5][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[3]~347_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~30_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[5][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[5][3] .is_wysiwyg = "true"; +defparam \REGS|regs[5][3] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X41_Y8_N6 +cyclonev_lcell_comb \REGS|Mux60~1 ( +// Equation(s): +// \REGS|Mux60~1_combout = ( \PC|pc [7] & ( \PC|pc[9]~DUPLICATE_q & ( \REGS|regs[5][3]~q ) ) ) # ( !\PC|pc [7] & ( \PC|pc[9]~DUPLICATE_q & ( \REGS|regs[5][3]~q ) ) ) # ( \PC|pc [7] & ( !\PC|pc[9]~DUPLICATE_q & ( \REGS|regs[5][3]~q ) ) ) # ( !\PC|pc +// [7] & ( !\PC|pc[9]~DUPLICATE_q & ( (!\PC|pc [6] & ((!\PC|pc[8]~DUPLICATE_q & (\REGS|regs[13][3]~q )) # (\PC|pc[8]~DUPLICATE_q & ((\REGS|regs[5][3]~q ))))) # (\PC|pc [6] & (((\REGS|regs[5][3]~q )))) ) ) ) + + .dataa(!\REGS|regs[13][3]~q ), + .datab(!\REGS|regs[5][3]~q ), + .datac(!\PC|pc [6]), + .datad(!\PC|pc[8]~DUPLICATE_q ), + .datae(!\PC|pc [7]), + .dataf(!\PC|pc[9]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux60~1_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux60~1 .extended_lut = "off"; +defparam \REGS|Mux60~1 .lut_mask = 64'h5333333333333333; +defparam \REGS|Mux60~1 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X40_Y7_N27 +cyclonev_lcell_comb \REGS|Mux60~11 ( +// Equation(s): +// \REGS|Mux60~11_combout = ( \ROM|mem~13_combout & ( (!\ROM|mem~12_combout & ((\REGS|Mux60~1_combout ))) # (\ROM|mem~12_combout & (\REGS|Mux60~10_combout )) ) ) # ( !\ROM|mem~13_combout & ( (!\ROM|mem~12_combout & ((\REGS|Mux60~0_combout ))) # +// (\ROM|mem~12_combout & (\REGS|Mux60~10_combout )) ) ) + + .dataa(!\REGS|Mux60~10_combout ), + .datab(!\REGS|Mux60~0_combout ), + .datac(!\REGS|Mux60~1_combout ), + .datad(!\ROM|mem~12_combout ), + .datae(gnd), + .dataf(!\ROM|mem~13_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux60~11_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux60~11 .extended_lut = "off"; +defparam \REGS|Mux60~11 .lut_mask = 64'h335533550F550F55; +defparam \REGS|Mux60~11 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X40_Y7_N36 +cyclonev_lcell_comb \REGS|Mux60~14 ( +// Equation(s): +// \REGS|Mux60~14_combout = ( !\REGS|Mux60~13_combout & ( \REGS|Mux60~11_combout & ( (!\rt_alu[17]~11_combout ) # ((!\REGS|Mux60~12_combout & \rt_alu[17]~10_combout )) ) ) ) # ( !\REGS|Mux60~13_combout & ( !\REGS|Mux60~11_combout & ( +// (!\rt_alu[17]~11_combout ) # ((!\REGS|Mux60~12_combout ) # (!\rt_alu[17]~10_combout )) ) ) ) + + .dataa(gnd), + .datab(!\rt_alu[17]~11_combout ), + .datac(!\REGS|Mux60~12_combout ), + .datad(!\rt_alu[17]~10_combout ), + .datae(!\REGS|Mux60~13_combout ), + .dataf(!\REGS|Mux60~11_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux60~14_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux60~14 .extended_lut = "off"; +defparam \REGS|Mux60~14 .lut_mask = 64'hFFFC0000CCFC0000; +defparam \REGS|Mux60~14 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X41_Y6_N36 +cyclonev_lcell_comb \REGS|regs[27][3]~feeder ( +// Equation(s): +// \REGS|regs[27][3]~feeder_combout = ( \rd[3]~347_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[3]~347_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[27][3]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[27][3]~feeder .extended_lut = "off"; +defparam \REGS|regs[27][3]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[27][3]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X41_Y6_N38 +dffeas \REGS|regs[27][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[27][3]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~15_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[27][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[27][3] .is_wysiwyg = "true"; +defparam \REGS|regs[27][3] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X40_Y4_N3 +cyclonev_lcell_comb \REGS|regs[19][3]~feeder ( +// Equation(s): +// \REGS|regs[19][3]~feeder_combout = ( \rd[3]~347_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[3]~347_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[19][3]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[19][3]~feeder .extended_lut = "off"; +defparam \REGS|regs[19][3]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[19][3]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X40_Y4_N4 +dffeas \REGS|regs[19][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[19][3]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~14_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[19][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[19][3] .is_wysiwyg = "true"; +defparam \REGS|regs[19][3] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X41_Y6_N54 +cyclonev_lcell_comb \REGS|Mux60~5 ( +// Equation(s): +// \REGS|Mux60~5_combout = ( \PC|pc [9] & ( \PC|pc [7] & ( \REGS|regs[19][3]~q ) ) ) # ( !\PC|pc [9] & ( \PC|pc [7] & ( \REGS|regs[19][3]~q ) ) ) # ( \PC|pc [9] & ( !\PC|pc [7] & ( \REGS|regs[19][3]~q ) ) ) # ( !\PC|pc [9] & ( !\PC|pc [7] & ( +// (!\PC|pc[6]~DUPLICATE_q & ((!\PC|pc[8]~DUPLICATE_q & (\REGS|regs[27][3]~q )) # (\PC|pc[8]~DUPLICATE_q & ((\REGS|regs[19][3]~q ))))) # (\PC|pc[6]~DUPLICATE_q & (((\REGS|regs[19][3]~q )))) ) ) ) + + .dataa(!\REGS|regs[27][3]~q ), + .datab(!\REGS|regs[19][3]~q ), + .datac(!\PC|pc[6]~DUPLICATE_q ), + .datad(!\PC|pc[8]~DUPLICATE_q ), + .datae(!\PC|pc [9]), + .dataf(!\PC|pc [7]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux60~5_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux60~5 .extended_lut = "off"; +defparam \REGS|Mux60~5 .lut_mask = 64'h5333333333333333; +defparam \REGS|Mux60~5 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X40_Y8_N20 +dffeas \REGS|regs[26][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[3]~347_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~6_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[26][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[26][3] .is_wysiwyg = "true"; +defparam \REGS|regs[26][3] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y6_N54 +cyclonev_lcell_comb \REGS|regs[18][3]~feeder ( +// Equation(s): +// \REGS|regs[18][3]~feeder_combout = ( \rd[3]~347_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[3]~347_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[18][3]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[18][3]~feeder .extended_lut = "off"; +defparam \REGS|regs[18][3]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[18][3]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X42_Y6_N55 +dffeas \REGS|regs[18][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[18][3]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~5_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[18][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[18][3] .is_wysiwyg = "true"; +defparam \REGS|regs[18][3] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X40_Y8_N18 +cyclonev_lcell_comb \REGS|Mux60~4 ( +// Equation(s): +// \REGS|Mux60~4_combout = ( \REGS|regs[26][3]~q & ( \REGS|regs[18][3]~q ) ) # ( !\REGS|regs[26][3]~q & ( \REGS|regs[18][3]~q & ( (((\PC|pc[8]~DUPLICATE_q ) # (\PC|pc [7])) # (\PC|pc [6])) # (\PC|pc [9]) ) ) ) # ( \REGS|regs[26][3]~q & ( +// !\REGS|regs[18][3]~q & ( (!\PC|pc [9] & (!\PC|pc [6] & (!\PC|pc [7] & !\PC|pc[8]~DUPLICATE_q ))) ) ) ) + + .dataa(!\PC|pc [9]), + .datab(!\PC|pc [6]), + .datac(!\PC|pc [7]), + .datad(!\PC|pc[8]~DUPLICATE_q ), + .datae(!\REGS|regs[26][3]~q ), + .dataf(!\REGS|regs[18][3]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux60~4_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux60~4 .extended_lut = "off"; +defparam \REGS|Mux60~4 .lut_mask = 64'h000080007FFFFFFF; +defparam \REGS|Mux60~4 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X40_Y7_N7 +dffeas \REGS|regs[31][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[3]~347_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~19_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[31][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[31][3] .is_wysiwyg = "true"; +defparam \REGS|regs[31][3] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X41_Y8_N33 +cyclonev_lcell_comb \REGS|regs[23][3]~feeder ( +// Equation(s): +// \REGS|regs[23][3]~feeder_combout = ( \rd[3]~347_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[3]~347_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[23][3]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[23][3]~feeder .extended_lut = "off"; +defparam \REGS|regs[23][3]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[23][3]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X41_Y8_N35 +dffeas \REGS|regs[23][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[23][3]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~18_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[23][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[23][3] .is_wysiwyg = "true"; +defparam \REGS|regs[23][3] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X41_Y8_N39 +cyclonev_lcell_comb \REGS|Mux60~3 ( +// Equation(s): +// \REGS|Mux60~3_combout = ( \PC|pc [7] & ( \REGS|regs[23][3]~q ) ) # ( !\PC|pc [7] & ( \REGS|regs[23][3]~q & ( (((\PC|pc[8]~DUPLICATE_q ) # (\PC|pc [9])) # (\REGS|regs[31][3]~q )) # (\PC|pc [6]) ) ) ) # ( !\PC|pc [7] & ( !\REGS|regs[23][3]~q & ( +// (!\PC|pc [6] & (\REGS|regs[31][3]~q & (!\PC|pc [9] & !\PC|pc[8]~DUPLICATE_q ))) ) ) ) + + .dataa(!\PC|pc [6]), + .datab(!\REGS|regs[31][3]~q ), + .datac(!\PC|pc [9]), + .datad(!\PC|pc[8]~DUPLICATE_q ), + .datae(!\PC|pc [7]), + .dataf(!\REGS|regs[23][3]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux60~3_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux60~3 .extended_lut = "off"; +defparam \REGS|Mux60~3 .lut_mask = 64'h200000007FFFFFFF; +defparam \REGS|Mux60~3 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X40_Y11_N1 +dffeas \REGS|regs[28][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[3]~347_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~8_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[28][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[28][3] .is_wysiwyg = "true"; +defparam \REGS|regs[28][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X40_Y7_N19 +dffeas \REGS|regs[29][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[3]~347_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~17_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[29][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[29][3] .is_wysiwyg = "true"; +defparam \REGS|regs[29][3] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X41_Y5_N24 +cyclonev_lcell_comb \REGS|regs[20][3]~feeder ( +// Equation(s): +// \REGS|regs[20][3]~feeder_combout = ( \rd[3]~347_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[3]~347_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[20][3]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[20][3]~feeder .extended_lut = "off"; +defparam \REGS|regs[20][3]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[20][3]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X41_Y5_N25 +dffeas \REGS|regs[20][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[20][3]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~7_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[20][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[20][3] .is_wysiwyg = "true"; +defparam \REGS|regs[20][3] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X40_Y7_N21 +cyclonev_lcell_comb \REGS|Mux60~6 ( +// Equation(s): +// \REGS|Mux60~6_combout = ( \ROM|mem~0_combout & ( \ROM|mem~10_combout & ( \REGS|regs[28][3]~q ) ) ) # ( !\ROM|mem~0_combout & ( \ROM|mem~10_combout & ( \REGS|regs[20][3]~q ) ) ) # ( \ROM|mem~0_combout & ( !\ROM|mem~10_combout & ( +// \REGS|regs[29][3]~q ) ) ) # ( !\ROM|mem~0_combout & ( !\ROM|mem~10_combout & ( \REGS|regs[20][3]~q ) ) ) + + .dataa(!\REGS|regs[28][3]~q ), + .datab(gnd), + .datac(!\REGS|regs[29][3]~q ), + .datad(!\REGS|regs[20][3]~q ), + .datae(!\ROM|mem~0_combout ), + .dataf(!\ROM|mem~10_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux60~6_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux60~6 .extended_lut = "off"; +defparam \REGS|Mux60~6 .lut_mask = 64'h00FF0F0F00FF5555; +defparam \REGS|Mux60~6 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X35_Y9_N8 +dffeas \REGS|regs[22][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[3]~347_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~9_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[22][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[22][3] .is_wysiwyg = "true"; +defparam \REGS|regs[22][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X35_Y9_N17 +dffeas \REGS|regs[30][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[3]~347_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~10_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[30][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[30][3] .is_wysiwyg = "true"; +defparam \REGS|regs[30][3] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X35_Y9_N51 +cyclonev_lcell_comb \REGS|Mux60~2 ( +// Equation(s): +// \REGS|Mux60~2_combout = ( \PC|pc[6]~DUPLICATE_q & ( \PC|pc[7]~DUPLICATE_q & ( \REGS|regs[22][3]~q ) ) ) # ( !\PC|pc[6]~DUPLICATE_q & ( \PC|pc[7]~DUPLICATE_q & ( \REGS|regs[22][3]~q ) ) ) # ( \PC|pc[6]~DUPLICATE_q & ( !\PC|pc[7]~DUPLICATE_q & ( +// \REGS|regs[22][3]~q ) ) ) # ( !\PC|pc[6]~DUPLICATE_q & ( !\PC|pc[7]~DUPLICATE_q & ( (!\PC|pc[8]~DUPLICATE_q & ((!\PC|pc [9] & ((\REGS|regs[30][3]~q ))) # (\PC|pc [9] & (\REGS|regs[22][3]~q )))) # (\PC|pc[8]~DUPLICATE_q & (\REGS|regs[22][3]~q )) ) ) ) + + .dataa(!\PC|pc[8]~DUPLICATE_q ), + .datab(!\REGS|regs[22][3]~q ), + .datac(!\REGS|regs[30][3]~q ), + .datad(!\PC|pc [9]), + .datae(!\PC|pc[6]~DUPLICATE_q ), + .dataf(!\PC|pc[7]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux60~2_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux60~2 .extended_lut = "off"; +defparam \REGS|Mux60~2 .lut_mask = 64'h1B33333333333333; +defparam \REGS|Mux60~2 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X40_Y7_N54 +cyclonev_lcell_comb \REGS|Mux60~7 ( +// Equation(s): +// \REGS|Mux60~7_combout = ( \ROM|mem~13_combout & ( \REGS|Mux60~2_combout & ( (!\ROM|mem~12_combout & ((\REGS|Mux60~6_combout ))) # (\ROM|mem~12_combout & (\REGS|Mux60~3_combout )) ) ) ) # ( !\ROM|mem~13_combout & ( \REGS|Mux60~2_combout & ( +// (\ROM|mem~12_combout ) # (\REGS|Mux60~6_combout ) ) ) ) # ( \ROM|mem~13_combout & ( !\REGS|Mux60~2_combout & ( (!\ROM|mem~12_combout & ((\REGS|Mux60~6_combout ))) # (\ROM|mem~12_combout & (\REGS|Mux60~3_combout )) ) ) ) # ( !\ROM|mem~13_combout & ( +// !\REGS|Mux60~2_combout & ( (\REGS|Mux60~6_combout & !\ROM|mem~12_combout ) ) ) ) + + .dataa(!\REGS|Mux60~3_combout ), + .datab(gnd), + .datac(!\REGS|Mux60~6_combout ), + .datad(!\ROM|mem~12_combout ), + .datae(!\ROM|mem~13_combout ), + .dataf(!\REGS|Mux60~2_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux60~7_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux60~7 .extended_lut = "off"; +defparam \REGS|Mux60~7 .lut_mask = 64'h0F000F550FFF0F55; +defparam \REGS|Mux60~7 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X38_Y7_N9 +cyclonev_lcell_comb \REGS|regs[24][3]~feeder ( +// Equation(s): +// \REGS|regs[24][3]~feeder_combout = ( \rd[3]~347_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[3]~347_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[24][3]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[24][3]~feeder .extended_lut = "off"; +defparam \REGS|regs[24][3]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[24][3]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X38_Y7_N10 +dffeas \REGS|regs[24][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[24][3]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~4_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[24][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[24][3] .is_wysiwyg = "true"; +defparam \REGS|regs[24][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X40_Y11_N8 +dffeas \REGS|regs[25][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[3]~347_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~13_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[25][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[25][3] .is_wysiwyg = "true"; +defparam \REGS|regs[25][3] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y6_N12 +cyclonev_lcell_comb \REGS|regs[16][3]~feeder ( +// Equation(s): +// \REGS|regs[16][3]~feeder_combout = ( \rd[3]~347_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[3]~347_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[16][3]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[16][3]~feeder .extended_lut = "off"; +defparam \REGS|regs[16][3]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[16][3]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X42_Y6_N13 +dffeas \REGS|regs[16][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[16][3]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~2_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[16][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[16][3] .is_wysiwyg = "true"; +defparam \REGS|regs[16][3] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X40_Y11_N27 +cyclonev_lcell_comb \REGS|Mux60~8 ( +// Equation(s): +// \REGS|Mux60~8_combout = ( \ROM|mem~0_combout & ( \ROM|mem~10_combout & ( \REGS|regs[24][3]~q ) ) ) # ( !\ROM|mem~0_combout & ( \ROM|mem~10_combout & ( \REGS|regs[16][3]~q ) ) ) # ( \ROM|mem~0_combout & ( !\ROM|mem~10_combout & ( +// \REGS|regs[25][3]~q ) ) ) # ( !\ROM|mem~0_combout & ( !\ROM|mem~10_combout & ( \REGS|regs[16][3]~q ) ) ) + + .dataa(!\REGS|regs[24][3]~q ), + .datab(gnd), + .datac(!\REGS|regs[25][3]~q ), + .datad(!\REGS|regs[16][3]~q ), + .datae(!\ROM|mem~0_combout ), + .dataf(!\ROM|mem~10_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux60~8_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux60~8 .extended_lut = "off"; +defparam \REGS|Mux60~8 .lut_mask = 64'h00FF0F0F00FF5555; +defparam \REGS|Mux60~8 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X40_Y7_N48 +cyclonev_lcell_comb \REGS|Mux60~9 ( +// Equation(s): +// \REGS|Mux60~9_combout = ( \REGS|Mux60~7_combout & ( \REGS|Mux60~8_combout & ( (!\rt_alu[17]~5_combout ) # ((!\rt_alu[17]~4_combout & (\REGS|Mux60~5_combout )) # (\rt_alu[17]~4_combout & ((\REGS|Mux60~4_combout )))) ) ) ) # ( !\REGS|Mux60~7_combout & +// ( \REGS|Mux60~8_combout & ( (!\rt_alu[17]~5_combout & (((!\rt_alu[17]~4_combout )))) # (\rt_alu[17]~5_combout & ((!\rt_alu[17]~4_combout & (\REGS|Mux60~5_combout )) # (\rt_alu[17]~4_combout & ((\REGS|Mux60~4_combout ))))) ) ) ) # ( +// \REGS|Mux60~7_combout & ( !\REGS|Mux60~8_combout & ( (!\rt_alu[17]~5_combout & (((\rt_alu[17]~4_combout )))) # (\rt_alu[17]~5_combout & ((!\rt_alu[17]~4_combout & (\REGS|Mux60~5_combout )) # (\rt_alu[17]~4_combout & ((\REGS|Mux60~4_combout ))))) ) ) +// ) # ( !\REGS|Mux60~7_combout & ( !\REGS|Mux60~8_combout & ( (\rt_alu[17]~5_combout & ((!\rt_alu[17]~4_combout & (\REGS|Mux60~5_combout )) # (\rt_alu[17]~4_combout & ((\REGS|Mux60~4_combout ))))) ) ) ) + + .dataa(!\REGS|Mux60~5_combout ), + .datab(!\rt_alu[17]~5_combout ), + .datac(!\rt_alu[17]~4_combout ), + .datad(!\REGS|Mux60~4_combout ), + .datae(!\REGS|Mux60~7_combout ), + .dataf(!\REGS|Mux60~8_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux60~9_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux60~9 .extended_lut = "off"; +defparam \REGS|Mux60~9 .lut_mask = 64'h10131C1FD0D3DCDF; +defparam \REGS|Mux60~9 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X38_Y9_N21 +cyclonev_lcell_comb \rt_alu[3]~60 ( +// Equation(s): +// \rt_alu[3]~60_combout = ( \ROM|mem~9_combout & ( \REGS|Mux60~9_combout & ( (!\rt_alu[3]~0_combout & \CONTROL_UNIT|CLASSIFIER|Equal0~1_combout ) ) ) ) # ( !\ROM|mem~9_combout & ( \REGS|Mux60~9_combout & ( (!\rt_alu[3]~0_combout & +// ((\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout ) # (\REGS|Mux60~14_combout ))) ) ) ) # ( \ROM|mem~9_combout & ( !\REGS|Mux60~9_combout & ( !\rt_alu[3]~0_combout ) ) ) # ( !\ROM|mem~9_combout & ( !\REGS|Mux60~9_combout & ( (!\rt_alu[3]~0_combout & +// ((\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout ) # (\REGS|Mux60~14_combout ))) ) ) ) + + .dataa(!\REGS|Mux60~14_combout ), + .datab(!\rt_alu[3]~0_combout ), + .datac(gnd), + .datad(!\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout ), + .datae(!\ROM|mem~9_combout ), + .dataf(!\REGS|Mux60~9_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[3]~60_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[3]~60 .extended_lut = "off"; +defparam \rt_alu[3]~60 .lut_mask = 64'h44CCCCCC44CC00CC; +defparam \rt_alu[3]~60 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X38_Y9_N24 +cyclonev_lcell_comb \ALU|Mux28~0 ( +// Equation(s): +// \ALU|Mux28~0_combout = ( \rt_alu[3]~60_combout & ( \REGS|Mux28~2_combout & ( ((\ALU|Mux15~0_combout & (!\CONTROL_UNIT|ALU_FN [0] & \CONTROL_UNIT|ALU_FN [1]))) # (\ALU|Mux29~1_combout ) ) ) ) # ( !\rt_alu[3]~60_combout & ( \REGS|Mux28~2_combout & ( +// (\ALU|Mux15~0_combout & \CONTROL_UNIT|ALU_FN [1]) ) ) ) # ( \rt_alu[3]~60_combout & ( !\REGS|Mux28~2_combout & ( (\ALU|Mux15~0_combout & !\CONTROL_UNIT|ALU_FN [1]) ) ) ) # ( !\rt_alu[3]~60_combout & ( !\REGS|Mux28~2_combout & ( +// ((\ALU|Mux15~0_combout & (!\CONTROL_UNIT|ALU_FN [0] & \CONTROL_UNIT|ALU_FN [1]))) # (\ALU|Mux29~1_combout ) ) ) ) + + .dataa(!\ALU|Mux29~1_combout ), + .datab(!\ALU|Mux15~0_combout ), + .datac(!\CONTROL_UNIT|ALU_FN [0]), + .datad(!\CONTROL_UNIT|ALU_FN [1]), + .datae(!\rt_alu[3]~60_combout ), + .dataf(!\REGS|Mux28~2_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\ALU|Mux28~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \ALU|Mux28~0 .extended_lut = "off"; +defparam \ALU|Mux28~0 .lut_mask = 64'h5575330000335575; +defparam \ALU|Mux28~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X40_Y7_N12 +cyclonev_lcell_comb \ALU|adder_unit|operand[3]~4 ( +// Equation(s): +// \ALU|adder_unit|operand[3]~4_combout = ( \REGS|Mux60~14_combout & ( \REGS|Mux60~9_combout & ( !\CONTROL_UNIT|ALU_FN [1] $ ((((\ROM|mem~9_combout & !\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout )) # (\rt_alu[3]~0_combout ))) ) ) ) # ( +// !\REGS|Mux60~14_combout & ( \REGS|Mux60~9_combout & ( !\CONTROL_UNIT|ALU_FN [1] $ (((!\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout ) # (\rt_alu[3]~0_combout ))) ) ) ) # ( \REGS|Mux60~14_combout & ( !\REGS|Mux60~9_combout & ( !\rt_alu[3]~0_combout $ +// (\CONTROL_UNIT|ALU_FN [1]) ) ) ) # ( !\REGS|Mux60~14_combout & ( !\REGS|Mux60~9_combout & ( !\CONTROL_UNIT|ALU_FN [1] $ ((((!\ROM|mem~9_combout & !\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout )) # (\rt_alu[3]~0_combout ))) ) ) ) + + .dataa(!\ROM|mem~9_combout ), + .datab(!\rt_alu[3]~0_combout ), + .datac(!\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout ), + .datad(!\CONTROL_UNIT|ALU_FN [1]), + .datae(!\REGS|Mux60~14_combout ), + .dataf(!\REGS|Mux60~9_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\ALU|adder_unit|operand[3]~4_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \ALU|adder_unit|operand[3]~4 .extended_lut = "off"; +defparam \ALU|adder_unit|operand[3]~4 .lut_mask = 64'h4CB3CC330CF38C73; +defparam \ALU|adder_unit|operand[3]~4 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X40_Y12_N19 +dffeas \REGS|regs[8][2]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[2]~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~24_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[8][2]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[8][2]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[8][2]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y14_N39 +cyclonev_lcell_comb \REGS|regs[9][2]~feeder ( +// Equation(s): +// \REGS|regs[9][2]~feeder_combout = ( \rd[2]~260_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[2]~260_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[9][2]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[9][2]~feeder .extended_lut = "off"; +defparam \REGS|regs[9][2]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[9][2]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X37_Y14_N41 +dffeas \REGS|regs[9][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[9][2]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~29_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[9][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[9][2] .is_wysiwyg = "true"; +defparam \REGS|regs[9][2] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y14_N30 +cyclonev_lcell_comb \REGS|Mux29~1 ( +// Equation(s): +// \REGS|Mux29~1_combout = ( \ROM|mem~0_combout & ( \ROM|mem~15_combout & ( \REGS|regs[9][2]~q ) ) ) # ( \ROM|mem~0_combout & ( !\ROM|mem~15_combout & ( \REGS|regs[8][2]~DUPLICATE_q ) ) ) + + .dataa(gnd), + .datab(gnd), + .datac(!\REGS|regs[8][2]~DUPLICATE_q ), + .datad(!\REGS|regs[9][2]~q ), + .datae(!\ROM|mem~0_combout ), + .dataf(!\ROM|mem~15_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux29~1_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux29~1 .extended_lut = "off"; +defparam \REGS|Mux29~1 .lut_mask = 64'h00000F0F000000FF; +defparam \REGS|Mux29~1 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X40_Y8_N59 +dffeas \REGS|regs[26][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[2]~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~6_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[26][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[26][2] .is_wysiwyg = "true"; +defparam \REGS|regs[26][2] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y15_N0 +cyclonev_lcell_comb \REGS|regs[18][2]~feeder ( +// Equation(s): +// \REGS|regs[18][2]~feeder_combout = ( \rd[2]~260_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[2]~260_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[18][2]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[18][2]~feeder .extended_lut = "off"; +defparam \REGS|regs[18][2]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[18][2]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X37_Y15_N1 +dffeas \REGS|regs[18][2]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[18][2]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~5_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[18][2]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[18][2]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[18][2]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X40_Y8_N57 +cyclonev_lcell_comb \REGS|Mux61~0 ( +// Equation(s): +// \REGS|Mux61~0_combout = ( \REGS|regs[26][2]~q & ( \REGS|regs[18][2]~DUPLICATE_q ) ) # ( !\REGS|regs[26][2]~q & ( \REGS|regs[18][2]~DUPLICATE_q & ( (((\PC|pc [9]) # (\PC|pc [6])) # (\PC|pc[8]~DUPLICATE_q )) # (\PC|pc [7]) ) ) ) # ( \REGS|regs[26][2]~q +// & ( !\REGS|regs[18][2]~DUPLICATE_q & ( (!\PC|pc [7] & (!\PC|pc[8]~DUPLICATE_q & (!\PC|pc [6] & !\PC|pc [9]))) ) ) ) + + .dataa(!\PC|pc [7]), + .datab(!\PC|pc[8]~DUPLICATE_q ), + .datac(!\PC|pc [6]), + .datad(!\PC|pc [9]), + .datae(!\REGS|regs[26][2]~q ), + .dataf(!\REGS|regs[18][2]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux61~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux61~0 .extended_lut = "off"; +defparam \REGS|Mux61~0 .lut_mask = 64'h000080007FFFFFFF; +defparam \REGS|Mux61~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X41_Y8_N26 +dffeas \REGS|regs[13][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[2]~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~31_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[13][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[13][2] .is_wysiwyg = "true"; +defparam \REGS|regs[13][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X41_Y8_N37 +dffeas \REGS|regs[5][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[2]~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~30_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[5][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[5][2] .is_wysiwyg = "true"; +defparam \REGS|regs[5][2] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X41_Y8_N21 +cyclonev_lcell_comb \REGS|Mux61~9 ( +// Equation(s): +// \REGS|Mux61~9_combout = ( \PC|pc [6] & ( \PC|pc[8]~DUPLICATE_q & ( \REGS|regs[5][2]~q ) ) ) # ( !\PC|pc [6] & ( \PC|pc[8]~DUPLICATE_q & ( \REGS|regs[5][2]~q ) ) ) # ( \PC|pc [6] & ( !\PC|pc[8]~DUPLICATE_q & ( \REGS|regs[5][2]~q ) ) ) # ( !\PC|pc +// [6] & ( !\PC|pc[8]~DUPLICATE_q & ( (!\PC|pc [9] & ((!\PC|pc [7] & (\REGS|regs[13][2]~q )) # (\PC|pc [7] & ((\REGS|regs[5][2]~q ))))) # (\PC|pc [9] & (((\REGS|regs[5][2]~q )))) ) ) ) + + .dataa(!\REGS|regs[13][2]~q ), + .datab(!\REGS|regs[5][2]~q ), + .datac(!\PC|pc [9]), + .datad(!\PC|pc [7]), + .datae(!\PC|pc [6]), + .dataf(!\PC|pc[8]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux61~9_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux61~9 .extended_lut = "off"; +defparam \REGS|Mux61~9 .lut_mask = 64'h5333333333333333; +defparam \REGS|Mux61~9 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X40_Y8_N2 +dffeas \REGS|regs[4][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[2]~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~22_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[4][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[4][2] .is_wysiwyg = "true"; +defparam \REGS|regs[4][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X40_Y8_N17 +dffeas \REGS|regs[12][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[2]~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~26_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[12][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[12][2] .is_wysiwyg = "true"; +defparam \REGS|regs[12][2] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X40_Y8_N39 +cyclonev_lcell_comb \REGS|Mux61~10 ( +// Equation(s): +// \REGS|Mux61~10_combout = ( \REGS|regs[4][2]~q & ( \REGS|regs[12][2]~q ) ) # ( !\REGS|regs[4][2]~q & ( \REGS|regs[12][2]~q & ( (!\PC|pc[6]~DUPLICATE_q & (!\PC|pc [7] & (!\PC|pc[8]~DUPLICATE_q & !\PC|pc [9]))) ) ) ) # ( \REGS|regs[4][2]~q & ( +// !\REGS|regs[12][2]~q & ( (((\PC|pc [9]) # (\PC|pc[8]~DUPLICATE_q )) # (\PC|pc [7])) # (\PC|pc[6]~DUPLICATE_q ) ) ) ) + + .dataa(!\PC|pc[6]~DUPLICATE_q ), + .datab(!\PC|pc [7]), + .datac(!\PC|pc[8]~DUPLICATE_q ), + .datad(!\PC|pc [9]), + .datae(!\REGS|regs[4][2]~q ), + .dataf(!\REGS|regs[12][2]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux61~10_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux61~10 .extended_lut = "off"; +defparam \REGS|Mux61~10 .lut_mask = 64'h00007FFF8000FFFF; +defparam \REGS|Mux61~10 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X40_Y10_N26 +dffeas \REGS|regs[23][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[2]~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~18_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[23][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[23][2] .is_wysiwyg = "true"; +defparam \REGS|regs[23][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X40_Y12_N11 +dffeas \REGS|regs[31][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[2]~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~19_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[31][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[31][2] .is_wysiwyg = "true"; +defparam \REGS|regs[31][2] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X40_Y10_N12 +cyclonev_lcell_comb \REGS|Mux61~3 ( +// Equation(s): +// \REGS|Mux61~3_combout = ( \REGS|regs[31][2]~q & ( \PC|pc [6] & ( \REGS|regs[23][2]~q ) ) ) # ( !\REGS|regs[31][2]~q & ( \PC|pc [6] & ( \REGS|regs[23][2]~q ) ) ) # ( \REGS|regs[31][2]~q & ( !\PC|pc [6] & ( ((!\PC|pc[7]~DUPLICATE_q & (!\PC|pc [8] & +// !\PC|pc [9]))) # (\REGS|regs[23][2]~q ) ) ) ) # ( !\REGS|regs[31][2]~q & ( !\PC|pc [6] & ( (\REGS|regs[23][2]~q & (((\PC|pc [9]) # (\PC|pc [8])) # (\PC|pc[7]~DUPLICATE_q ))) ) ) ) + + .dataa(!\REGS|regs[23][2]~q ), + .datab(!\PC|pc[7]~DUPLICATE_q ), + .datac(!\PC|pc [8]), + .datad(!\PC|pc [9]), + .datae(!\REGS|regs[31][2]~q ), + .dataf(!\PC|pc [6]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux61~3_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux61~3 .extended_lut = "off"; +defparam \REGS|Mux61~3 .lut_mask = 64'h1555D55555555555; +defparam \REGS|Mux61~3 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y14_N57 +cyclonev_lcell_comb \REGS|regs[30][2]~feeder ( +// Equation(s): +// \REGS|regs[30][2]~feeder_combout = ( \rd[2]~260_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[2]~260_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[30][2]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[30][2]~feeder .extended_lut = "off"; +defparam \REGS|regs[30][2]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[30][2]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X37_Y14_N58 +dffeas \REGS|regs[30][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[30][2]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~10_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[30][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[30][2] .is_wysiwyg = "true"; +defparam \REGS|regs[30][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X36_Y14_N7 +dffeas \REGS|regs[22][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[2]~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~9_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[22][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[22][2] .is_wysiwyg = "true"; +defparam \REGS|regs[22][2] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y14_N3 +cyclonev_lcell_comb \REGS|Mux61~4 ( +// Equation(s): +// \REGS|Mux61~4_combout = ( \PC|pc [8] & ( \PC|pc [7] & ( \REGS|regs[22][2]~q ) ) ) # ( !\PC|pc [8] & ( \PC|pc [7] & ( \REGS|regs[22][2]~q ) ) ) # ( \PC|pc [8] & ( !\PC|pc [7] & ( \REGS|regs[22][2]~q ) ) ) # ( !\PC|pc [8] & ( !\PC|pc [7] & ( +// (!\PC|pc[6]~DUPLICATE_q & ((!\PC|pc [9] & (\REGS|regs[30][2]~q )) # (\PC|pc [9] & ((\REGS|regs[22][2]~q ))))) # (\PC|pc[6]~DUPLICATE_q & (((\REGS|regs[22][2]~q )))) ) ) ) + + .dataa(!\REGS|regs[30][2]~q ), + .datab(!\PC|pc[6]~DUPLICATE_q ), + .datac(!\PC|pc [9]), + .datad(!\REGS|regs[22][2]~q ), + .datae(!\PC|pc [8]), + .dataf(!\PC|pc [7]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux61~4_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux61~4 .extended_lut = "off"; +defparam \REGS|Mux61~4 .lut_mask = 64'h407F00FF00FF00FF; +defparam \REGS|Mux61~4 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X40_Y12_N48 +cyclonev_lcell_comb \REGS|Mux29~0 ( +// Equation(s): +// \REGS|Mux29~0_combout = ( \ROM|mem~9_combout & ( \ROM|mem~16_combout & ( \REGS|Mux61~3_combout ) ) ) # ( !\ROM|mem~9_combout & ( \ROM|mem~16_combout & ( \REGS|Mux61~9_combout ) ) ) # ( \ROM|mem~9_combout & ( !\ROM|mem~16_combout & ( +// \REGS|Mux61~4_combout ) ) ) # ( !\ROM|mem~9_combout & ( !\ROM|mem~16_combout & ( \REGS|Mux61~10_combout ) ) ) + + .dataa(!\REGS|Mux61~9_combout ), + .datab(!\REGS|Mux61~10_combout ), + .datac(!\REGS|Mux61~3_combout ), + .datad(!\REGS|Mux61~4_combout ), + .datae(!\ROM|mem~9_combout ), + .dataf(!\ROM|mem~16_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux29~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux29~0 .extended_lut = "off"; +defparam \REGS|Mux29~0 .lut_mask = 64'h333300FF55550F0F; +defparam \REGS|Mux29~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X38_Y12_N6 +cyclonev_lcell_comb \REGS|Mux29~2 ( +// Equation(s): +// \REGS|Mux29~2_combout = ( \REGS|Mux61~0_combout & ( \REGS|Mux29~0_combout & ( ((\ROM|mem~17_combout ) # (\REGS|Mux29~1_combout )) # (\ROM|mem~9_combout ) ) ) ) # ( !\REGS|Mux61~0_combout & ( \REGS|Mux29~0_combout & ( (\ROM|mem~17_combout ) # +// (\REGS|Mux29~1_combout ) ) ) ) # ( \REGS|Mux61~0_combout & ( !\REGS|Mux29~0_combout & ( (!\ROM|mem~17_combout & ((\REGS|Mux29~1_combout ) # (\ROM|mem~9_combout ))) ) ) ) # ( !\REGS|Mux61~0_combout & ( !\REGS|Mux29~0_combout & ( (\REGS|Mux29~1_combout +// & !\ROM|mem~17_combout ) ) ) ) + + .dataa(!\ROM|mem~9_combout ), + .datab(gnd), + .datac(!\REGS|Mux29~1_combout ), + .datad(!\ROM|mem~17_combout ), + .datae(!\REGS|Mux61~0_combout ), + .dataf(!\REGS|Mux29~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux29~2_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux29~2 .extended_lut = "off"; +defparam \REGS|Mux29~2 .lut_mask = 64'h0F005F000FFF5FFF; +defparam \REGS|Mux29~2 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X38_Y9_N9 +cyclonev_lcell_comb \ALU|Mux29~2 ( +// Equation(s): +// \ALU|Mux29~2_combout = ( \REGS|Mux29~2_combout & ( \rt_alu[2]~59_combout & ( (\CONTROL_UNIT|ALU_FN [1] & \ALU|Mux15~0_combout ) ) ) ) # ( !\REGS|Mux29~2_combout & ( \rt_alu[2]~59_combout & ( ((!\CONTROL_UNIT|ALU_FN [0] & (\CONTROL_UNIT|ALU_FN [1] & +// \ALU|Mux15~0_combout ))) # (\ALU|Mux29~1_combout ) ) ) ) # ( \REGS|Mux29~2_combout & ( !\rt_alu[2]~59_combout & ( ((!\CONTROL_UNIT|ALU_FN [0] & (\CONTROL_UNIT|ALU_FN [1] & \ALU|Mux15~0_combout ))) # (\ALU|Mux29~1_combout ) ) ) ) # ( +// !\REGS|Mux29~2_combout & ( !\rt_alu[2]~59_combout & ( (!\CONTROL_UNIT|ALU_FN [1] & \ALU|Mux15~0_combout ) ) ) ) + + .dataa(!\CONTROL_UNIT|ALU_FN [0]), + .datab(!\CONTROL_UNIT|ALU_FN [1]), + .datac(!\ALU|Mux15~0_combout ), + .datad(!\ALU|Mux29~1_combout ), + .datae(!\REGS|Mux29~2_combout ), + .dataf(!\rt_alu[2]~59_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\ALU|Mux29~2_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \ALU|Mux29~2 .extended_lut = "off"; +defparam \ALU|Mux29~2 .lut_mask = 64'h0C0C02FF02FF0303; +defparam \ALU|Mux29~2 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X36_Y10_N56 +dffeas \REGS|regs[27][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[1]~173_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~15_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[27][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[27][1] .is_wysiwyg = "true"; +defparam \REGS|regs[27][1] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X40_Y13_N42 +cyclonev_lcell_comb \REGS|regs[19][1]~feeder ( +// Equation(s): +// \REGS|regs[19][1]~feeder_combout = ( \rd[1]~173_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[1]~173_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[19][1]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[19][1]~feeder .extended_lut = "off"; +defparam \REGS|regs[19][1]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[19][1]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X40_Y13_N43 +dffeas \REGS|regs[19][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[19][1]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~14_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[19][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[19][1] .is_wysiwyg = "true"; +defparam \REGS|regs[19][1] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X36_Y10_N57 +cyclonev_lcell_comb \REGS|Mux62~5 ( +// Equation(s): +// \REGS|Mux62~5_combout = ( \REGS|regs[19][1]~q & ( \PC|pc[7]~DUPLICATE_q ) ) # ( \REGS|regs[19][1]~q & ( !\PC|pc[7]~DUPLICATE_q & ( (((\PC|pc [6]) # (\PC|pc[8]~DUPLICATE_q )) # (\PC|pc [9])) # (\REGS|regs[27][1]~q ) ) ) ) # ( !\REGS|regs[19][1]~q & ( +// !\PC|pc[7]~DUPLICATE_q & ( (\REGS|regs[27][1]~q & (!\PC|pc [9] & (!\PC|pc[8]~DUPLICATE_q & !\PC|pc [6]))) ) ) ) + + .dataa(!\REGS|regs[27][1]~q ), + .datab(!\PC|pc [9]), + .datac(!\PC|pc[8]~DUPLICATE_q ), + .datad(!\PC|pc [6]), + .datae(!\REGS|regs[19][1]~q ), + .dataf(!\PC|pc[7]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux62~5_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux62~5 .extended_lut = "off"; +defparam \REGS|Mux62~5 .lut_mask = 64'h40007FFF0000FFFF; +defparam \REGS|Mux62~5 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X40_Y8_N43 +dffeas \REGS|regs[26][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[1]~173_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~6_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[26][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[26][1] .is_wysiwyg = "true"; +defparam \REGS|regs[26][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X38_Y9_N56 +dffeas \REGS|regs[18][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[1]~173_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~5_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[18][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[18][1] .is_wysiwyg = "true"; +defparam \REGS|regs[18][1] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X40_Y8_N42 +cyclonev_lcell_comb \REGS|Mux62~4 ( +// Equation(s): +// \REGS|Mux62~4_combout = ( \REGS|regs[26][1]~q & ( \REGS|regs[18][1]~q ) ) # ( !\REGS|regs[26][1]~q & ( \REGS|regs[18][1]~q & ( (((\PC|pc[8]~DUPLICATE_q ) # (\PC|pc [9])) # (\PC|pc [7])) # (\PC|pc[6]~DUPLICATE_q ) ) ) ) # ( \REGS|regs[26][1]~q & ( +// !\REGS|regs[18][1]~q & ( (!\PC|pc[6]~DUPLICATE_q & (!\PC|pc [7] & (!\PC|pc [9] & !\PC|pc[8]~DUPLICATE_q ))) ) ) ) + + .dataa(!\PC|pc[6]~DUPLICATE_q ), + .datab(!\PC|pc [7]), + .datac(!\PC|pc [9]), + .datad(!\PC|pc[8]~DUPLICATE_q ), + .datae(!\REGS|regs[26][1]~q ), + .dataf(!\REGS|regs[18][1]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux62~4_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux62~4 .extended_lut = "off"; +defparam \REGS|Mux62~4 .lut_mask = 64'h000080007FFFFFFF; +defparam \REGS|Mux62~4 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X38_Y7_N6 +cyclonev_lcell_comb \REGS|regs[24][1]~feeder ( +// Equation(s): +// \REGS|regs[24][1]~feeder_combout = ( \rd[1]~173_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[1]~173_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[24][1]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[24][1]~feeder .extended_lut = "off"; +defparam \REGS|regs[24][1]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[24][1]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X38_Y7_N8 +dffeas \REGS|regs[24][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[24][1]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~4_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[24][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[24][1] .is_wysiwyg = "true"; +defparam \REGS|regs[24][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X38_Y7_N13 +dffeas \REGS|regs[25][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[1]~173_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~13_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[25][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[25][1] .is_wysiwyg = "true"; +defparam \REGS|regs[25][1] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X35_Y12_N6 +cyclonev_lcell_comb \REGS|regs[16][1]~feeder ( +// Equation(s): +// \REGS|regs[16][1]~feeder_combout = ( \rd[1]~173_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[1]~173_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[16][1]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[16][1]~feeder .extended_lut = "off"; +defparam \REGS|regs[16][1]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[16][1]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X35_Y12_N8 +dffeas \REGS|regs[16][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[16][1]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~2_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[16][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[16][1] .is_wysiwyg = "true"; +defparam \REGS|regs[16][1] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X38_Y7_N15 +cyclonev_lcell_comb \REGS|Mux62~8 ( +// Equation(s): +// \REGS|Mux62~8_combout = ( \ROM|mem~0_combout & ( \REGS|regs[16][1]~q & ( (!\ROM|mem~10_combout & ((\REGS|regs[25][1]~q ))) # (\ROM|mem~10_combout & (\REGS|regs[24][1]~q )) ) ) ) # ( !\ROM|mem~0_combout & ( \REGS|regs[16][1]~q ) ) # ( +// \ROM|mem~0_combout & ( !\REGS|regs[16][1]~q & ( (!\ROM|mem~10_combout & ((\REGS|regs[25][1]~q ))) # (\ROM|mem~10_combout & (\REGS|regs[24][1]~q )) ) ) ) + + .dataa(gnd), + .datab(!\REGS|regs[24][1]~q ), + .datac(!\ROM|mem~10_combout ), + .datad(!\REGS|regs[25][1]~q ), + .datae(!\ROM|mem~0_combout ), + .dataf(!\REGS|regs[16][1]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux62~8_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux62~8 .extended_lut = "off"; +defparam \REGS|Mux62~8 .lut_mask = 64'h000003F3FFFF03F3; +defparam \REGS|Mux62~8 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X36_Y10_N2 +dffeas \REGS|regs[31][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[1]~173_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~19_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[31][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[31][1] .is_wysiwyg = "true"; +defparam \REGS|regs[31][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X36_Y10_N32 +dffeas \REGS|regs[23][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[1]~173_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~18_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[23][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[23][1] .is_wysiwyg = "true"; +defparam \REGS|regs[23][1] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X36_Y10_N3 +cyclonev_lcell_comb \REGS|Mux62~3 ( +// Equation(s): +// \REGS|Mux62~3_combout = ( \PC|pc[8]~DUPLICATE_q & ( \PC|pc[7]~DUPLICATE_q & ( \REGS|regs[23][1]~q ) ) ) # ( !\PC|pc[8]~DUPLICATE_q & ( \PC|pc[7]~DUPLICATE_q & ( \REGS|regs[23][1]~q ) ) ) # ( \PC|pc[8]~DUPLICATE_q & ( !\PC|pc[7]~DUPLICATE_q & ( +// \REGS|regs[23][1]~q ) ) ) # ( !\PC|pc[8]~DUPLICATE_q & ( !\PC|pc[7]~DUPLICATE_q & ( (!\PC|pc [9] & ((!\PC|pc [6] & (\REGS|regs[31][1]~q )) # (\PC|pc [6] & ((\REGS|regs[23][1]~q ))))) # (\PC|pc [9] & (((\REGS|regs[23][1]~q )))) ) ) ) + + .dataa(!\REGS|regs[31][1]~q ), + .datab(!\REGS|regs[23][1]~q ), + .datac(!\PC|pc [9]), + .datad(!\PC|pc [6]), + .datae(!\PC|pc[8]~DUPLICATE_q ), + .dataf(!\PC|pc[7]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux62~3_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux62~3 .extended_lut = "off"; +defparam \REGS|Mux62~3 .lut_mask = 64'h5333333333333333; +defparam \REGS|Mux62~3 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X38_Y10_N2 +dffeas \REGS|regs[29][1]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[1]~173_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~17_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[29][1]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[29][1]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[29][1]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: FF_X38_Y7_N46 +dffeas \REGS|regs[28][1]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[1]~173_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~8_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[28][1]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[28][1]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[28][1]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: FF_X40_Y6_N35 +dffeas \REGS|regs[20][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[1]~173_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~7_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[20][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[20][1] .is_wysiwyg = "true"; +defparam \REGS|regs[20][1] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X38_Y10_N3 +cyclonev_lcell_comb \REGS|Mux62~6 ( +// Equation(s): +// \REGS|Mux62~6_combout = ( \ROM|mem~10_combout & ( \ROM|mem~0_combout & ( \REGS|regs[28][1]~DUPLICATE_q ) ) ) # ( !\ROM|mem~10_combout & ( \ROM|mem~0_combout & ( \REGS|regs[29][1]~DUPLICATE_q ) ) ) # ( \ROM|mem~10_combout & ( !\ROM|mem~0_combout & +// ( \REGS|regs[20][1]~q ) ) ) # ( !\ROM|mem~10_combout & ( !\ROM|mem~0_combout & ( \REGS|regs[20][1]~q ) ) ) + + .dataa(!\REGS|regs[29][1]~DUPLICATE_q ), + .datab(gnd), + .datac(!\REGS|regs[28][1]~DUPLICATE_q ), + .datad(!\REGS|regs[20][1]~q ), + .datae(!\ROM|mem~10_combout ), + .dataf(!\ROM|mem~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux62~6_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux62~6 .extended_lut = "off"; +defparam \REGS|Mux62~6 .lut_mask = 64'h00FF00FF55550F0F; +defparam \REGS|Mux62~6 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X41_Y5_N44 +dffeas \REGS|regs[22][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[1]~173_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~9_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[22][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[22][1] .is_wysiwyg = "true"; +defparam \REGS|regs[22][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X35_Y9_N50 +dffeas \REGS|regs[30][1]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[1]~173_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~10_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[30][1]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[30][1]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[30][1]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X35_Y9_N33 +cyclonev_lcell_comb \REGS|Mux62~2 ( +// Equation(s): +// \REGS|Mux62~2_combout = ( \REGS|regs[22][1]~q & ( \REGS|regs[30][1]~DUPLICATE_q ) ) # ( !\REGS|regs[22][1]~q & ( \REGS|regs[30][1]~DUPLICATE_q & ( (!\PC|pc [9] & (!\PC|pc [6] & (!\PC|pc[8]~DUPLICATE_q & !\PC|pc[7]~DUPLICATE_q ))) ) ) ) # ( +// \REGS|regs[22][1]~q & ( !\REGS|regs[30][1]~DUPLICATE_q & ( (((\PC|pc[7]~DUPLICATE_q ) # (\PC|pc[8]~DUPLICATE_q )) # (\PC|pc [6])) # (\PC|pc [9]) ) ) ) + + .dataa(!\PC|pc [9]), + .datab(!\PC|pc [6]), + .datac(!\PC|pc[8]~DUPLICATE_q ), + .datad(!\PC|pc[7]~DUPLICATE_q ), + .datae(!\REGS|regs[22][1]~q ), + .dataf(!\REGS|regs[30][1]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux62~2_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux62~2 .extended_lut = "off"; +defparam \REGS|Mux62~2 .lut_mask = 64'h00007FFF8000FFFF; +defparam \REGS|Mux62~2 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X38_Y10_N42 +cyclonev_lcell_comb \REGS|Mux62~7 ( +// Equation(s): +// \REGS|Mux62~7_combout = ( \REGS|Mux62~2_combout & ( (!\ROM|mem~12_combout & (((\REGS|Mux62~6_combout )))) # (\ROM|mem~12_combout & ((!\ROM|mem~13_combout ) # ((\REGS|Mux62~3_combout )))) ) ) # ( !\REGS|Mux62~2_combout & ( (!\ROM|mem~12_combout & +// (((\REGS|Mux62~6_combout )))) # (\ROM|mem~12_combout & (\ROM|mem~13_combout & (\REGS|Mux62~3_combout ))) ) ) + + .dataa(!\ROM|mem~12_combout ), + .datab(!\ROM|mem~13_combout ), + .datac(!\REGS|Mux62~3_combout ), + .datad(!\REGS|Mux62~6_combout ), + .datae(gnd), + .dataf(!\REGS|Mux62~2_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux62~7_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux62~7 .extended_lut = "off"; +defparam \REGS|Mux62~7 .lut_mask = 64'h01AB01AB45EF45EF; +defparam \REGS|Mux62~7 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X38_Y10_N36 +cyclonev_lcell_comb \REGS|Mux62~9 ( +// Equation(s): +// \REGS|Mux62~9_combout = ( \REGS|Mux62~8_combout & ( \REGS|Mux62~7_combout & ( (!\rt_alu[17]~5_combout ) # ((!\rt_alu[17]~4_combout & (\REGS|Mux62~5_combout )) # (\rt_alu[17]~4_combout & ((\REGS|Mux62~4_combout )))) ) ) ) # ( !\REGS|Mux62~8_combout & +// ( \REGS|Mux62~7_combout & ( (!\rt_alu[17]~5_combout & (((\rt_alu[17]~4_combout )))) # (\rt_alu[17]~5_combout & ((!\rt_alu[17]~4_combout & (\REGS|Mux62~5_combout )) # (\rt_alu[17]~4_combout & ((\REGS|Mux62~4_combout ))))) ) ) ) # ( +// \REGS|Mux62~8_combout & ( !\REGS|Mux62~7_combout & ( (!\rt_alu[17]~5_combout & (((!\rt_alu[17]~4_combout )))) # (\rt_alu[17]~5_combout & ((!\rt_alu[17]~4_combout & (\REGS|Mux62~5_combout )) # (\rt_alu[17]~4_combout & ((\REGS|Mux62~4_combout ))))) ) +// ) ) # ( !\REGS|Mux62~8_combout & ( !\REGS|Mux62~7_combout & ( (\rt_alu[17]~5_combout & ((!\rt_alu[17]~4_combout & (\REGS|Mux62~5_combout )) # (\rt_alu[17]~4_combout & ((\REGS|Mux62~4_combout ))))) ) ) ) + + .dataa(!\rt_alu[17]~5_combout ), + .datab(!\REGS|Mux62~5_combout ), + .datac(!\rt_alu[17]~4_combout ), + .datad(!\REGS|Mux62~4_combout ), + .datae(!\REGS|Mux62~8_combout ), + .dataf(!\REGS|Mux62~7_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux62~9_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux62~9 .extended_lut = "off"; +defparam \REGS|Mux62~9 .lut_mask = 64'h1015B0B51A1FBABF; +defparam \REGS|Mux62~9 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X35_Y9_N1 +dffeas \REGS|regs[8][1]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[1]~173_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~24_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[8][1]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[8][1]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[8][1]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X40_Y13_N24 +cyclonev_lcell_comb \REGS|regs[1][1]~feeder ( +// Equation(s): +// \REGS|regs[1][1]~feeder_combout = ( \rd[1]~173_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[1]~173_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[1][1]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[1][1]~feeder .extended_lut = "off"; +defparam \REGS|regs[1][1]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[1][1]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X40_Y13_N25 +dffeas \REGS|regs[1][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[1][1]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~28_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[1][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[1][1] .is_wysiwyg = "true"; +defparam \REGS|regs[1][1] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X38_Y10_N57 +cyclonev_lcell_comb \REGS|Mux62~13 ( +// Equation(s): +// \REGS|Mux62~13_combout = ( \rt_alu[17]~10_combout & ( !\rt_alu[17]~11_combout & ( (!\ROM|mem~0_combout & ((\REGS|regs[1][1]~q ))) # (\ROM|mem~0_combout & (\REGS|regs[9][1]~q )) ) ) ) # ( !\rt_alu[17]~10_combout & ( !\rt_alu[17]~11_combout & ( +// (\REGS|regs[8][1]~DUPLICATE_q & \ROM|mem~0_combout ) ) ) ) + + .dataa(!\REGS|regs[9][1]~q ), + .datab(!\REGS|regs[8][1]~DUPLICATE_q ), + .datac(!\REGS|regs[1][1]~q ), + .datad(!\ROM|mem~0_combout ), + .datae(!\rt_alu[17]~10_combout ), + .dataf(!\rt_alu[17]~11_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux62~13_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux62~13 .extended_lut = "off"; +defparam \REGS|Mux62~13 .lut_mask = 64'h00330F5500000000; +defparam \REGS|Mux62~13 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X38_Y8_N15 +cyclonev_lcell_comb \REGS|regs[13][1]~feeder ( +// Equation(s): +// \REGS|regs[13][1]~feeder_combout = ( \rd[1]~173_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[1]~173_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[13][1]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[13][1]~feeder .extended_lut = "off"; +defparam \REGS|regs[13][1]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[13][1]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X38_Y8_N17 +dffeas \REGS|regs[13][1]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[13][1]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~31_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[13][1]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[13][1]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[13][1]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: FF_X37_Y7_N2 +dffeas \REGS|regs[5][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[1]~173_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~30_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[5][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[5][1] .is_wysiwyg = "true"; +defparam \REGS|regs[5][1] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X38_Y8_N24 +cyclonev_lcell_comb \REGS|Mux62~1 ( +// Equation(s): +// \REGS|Mux62~1_combout = ( \PC|pc [9] & ( \REGS|regs[5][1]~q ) ) # ( !\PC|pc [9] & ( \REGS|regs[5][1]~q & ( (((\REGS|regs[13][1]~DUPLICATE_q ) # (\PC|pc [7])) # (\PC|pc[8]~DUPLICATE_q )) # (\PC|pc [6]) ) ) ) # ( !\PC|pc [9] & ( !\REGS|regs[5][1]~q & ( +// (!\PC|pc [6] & (!\PC|pc[8]~DUPLICATE_q & (!\PC|pc [7] & \REGS|regs[13][1]~DUPLICATE_q ))) ) ) ) + + .dataa(!\PC|pc [6]), + .datab(!\PC|pc[8]~DUPLICATE_q ), + .datac(!\PC|pc [7]), + .datad(!\REGS|regs[13][1]~DUPLICATE_q ), + .datae(!\PC|pc [9]), + .dataf(!\REGS|regs[5][1]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux62~1_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux62~1 .extended_lut = "off"; +defparam \REGS|Mux62~1 .lut_mask = 64'h008000007FFFFFFF; +defparam \REGS|Mux62~1 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X37_Y7_N32 +dffeas \REGS|regs[4][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[1]~173_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~22_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[4][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[4][1] .is_wysiwyg = "true"; +defparam \REGS|regs[4][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X37_Y7_N50 +dffeas \REGS|regs[12][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[1]~173_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~26_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[12][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[12][1] .is_wysiwyg = "true"; +defparam \REGS|regs[12][1] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y7_N33 +cyclonev_lcell_comb \REGS|Mux62~0 ( +// Equation(s): +// \REGS|Mux62~0_combout = ( \PC|pc[8]~DUPLICATE_q & ( \PC|pc[7]~DUPLICATE_q & ( \REGS|regs[4][1]~q ) ) ) # ( !\PC|pc[8]~DUPLICATE_q & ( \PC|pc[7]~DUPLICATE_q & ( \REGS|regs[4][1]~q ) ) ) # ( \PC|pc[8]~DUPLICATE_q & ( !\PC|pc[7]~DUPLICATE_q & ( +// \REGS|regs[4][1]~q ) ) ) # ( !\PC|pc[8]~DUPLICATE_q & ( !\PC|pc[7]~DUPLICATE_q & ( (!\PC|pc [9] & ((!\PC|pc[6]~DUPLICATE_q & ((\REGS|regs[12][1]~q ))) # (\PC|pc[6]~DUPLICATE_q & (\REGS|regs[4][1]~q )))) # (\PC|pc [9] & (\REGS|regs[4][1]~q )) ) ) ) + + .dataa(!\PC|pc [9]), + .datab(!\REGS|regs[4][1]~q ), + .datac(!\PC|pc[6]~DUPLICATE_q ), + .datad(!\REGS|regs[12][1]~q ), + .datae(!\PC|pc[8]~DUPLICATE_q ), + .dataf(!\PC|pc[7]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux62~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux62~0 .extended_lut = "off"; +defparam \REGS|Mux62~0 .lut_mask = 64'h13B3333333333333; +defparam \REGS|Mux62~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X38_Y10_N8 +dffeas \REGS|regs[6][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[1]~173_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~34_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[6][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[6][1] .is_wysiwyg = "true"; +defparam \REGS|regs[6][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X40_Y9_N8 +dffeas \REGS|regs[14][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[1]~173_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~35_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[14][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[14][1] .is_wysiwyg = "true"; +defparam \REGS|regs[14][1] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X40_Y9_N18 +cyclonev_lcell_comb \REGS|regs[15][1]~feeder ( +// Equation(s): +// \REGS|regs[15][1]~feeder_combout = ( \rd[1]~173_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[1]~173_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[15][1]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[15][1]~feeder .extended_lut = "off"; +defparam \REGS|regs[15][1]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[15][1]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X40_Y9_N19 +dffeas \REGS|regs[15][1]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[15][1]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~39_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[15][1]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[15][1]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[15][1]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X38_Y10_N9 +cyclonev_lcell_comb \REGS|Mux62~10 ( +// Equation(s): +// \REGS|Mux62~10_combout = ( \ROM|mem~10_combout & ( \ROM|mem~0_combout & ( \REGS|regs[14][1]~q ) ) ) # ( !\ROM|mem~10_combout & ( \ROM|mem~0_combout & ( \REGS|regs[15][1]~DUPLICATE_q ) ) ) # ( \ROM|mem~10_combout & ( !\ROM|mem~0_combout & ( +// \REGS|regs[6][1]~q ) ) ) # ( !\ROM|mem~10_combout & ( !\ROM|mem~0_combout & ( \REGS|regs[6][1]~q ) ) ) + + .dataa(gnd), + .datab(!\REGS|regs[6][1]~q ), + .datac(!\REGS|regs[14][1]~q ), + .datad(!\REGS|regs[15][1]~DUPLICATE_q ), + .datae(!\ROM|mem~10_combout ), + .dataf(!\ROM|mem~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux62~10_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux62~10 .extended_lut = "off"; +defparam \REGS|Mux62~10 .lut_mask = 64'h3333333300FF0F0F; +defparam \REGS|Mux62~10 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X38_Y10_N45 +cyclonev_lcell_comb \REGS|Mux62~11 ( +// Equation(s): +// \REGS|Mux62~11_combout = ( \REGS|Mux62~10_combout & ( ((!\ROM|mem~13_combout & ((\REGS|Mux62~0_combout ))) # (\ROM|mem~13_combout & (\REGS|Mux62~1_combout ))) # (\ROM|mem~12_combout ) ) ) # ( !\REGS|Mux62~10_combout & ( (!\ROM|mem~12_combout & +// ((!\ROM|mem~13_combout & ((\REGS|Mux62~0_combout ))) # (\ROM|mem~13_combout & (\REGS|Mux62~1_combout )))) ) ) + + .dataa(!\ROM|mem~12_combout ), + .datab(!\ROM|mem~13_combout ), + .datac(!\REGS|Mux62~1_combout ), + .datad(!\REGS|Mux62~0_combout ), + .datae(gnd), + .dataf(!\REGS|Mux62~10_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux62~11_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux62~11 .extended_lut = "off"; +defparam \REGS|Mux62~11 .lut_mask = 64'h028A028A57DF57DF; +defparam \REGS|Mux62~11 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X40_Y5_N0 +cyclonev_lcell_comb \REGS|regs[10][1]~feeder ( +// Equation(s): +// \REGS|regs[10][1]~feeder_combout = ( \rd[1]~173_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[1]~173_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[10][1]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[10][1]~feeder .extended_lut = "off"; +defparam \REGS|regs[10][1]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[10][1]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X40_Y5_N2 +dffeas \REGS|regs[10][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[10][1]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~33_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[10][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[10][1] .is_wysiwyg = "true"; +defparam \REGS|regs[10][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X40_Y5_N56 +dffeas \REGS|regs[2][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[1]~173_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~32_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[2][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[2][1] .is_wysiwyg = "true"; +defparam \REGS|regs[2][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X38_Y12_N29 +dffeas \REGS|regs[11][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[1]~173_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~37_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[11][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[11][1] .is_wysiwyg = "true"; +defparam \REGS|regs[11][1] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X40_Y5_N30 +cyclonev_lcell_comb \REGS|Mux62~12 ( +// Equation(s): +// \REGS|Mux62~12_combout = ( \ROM|mem~0_combout & ( \REGS|regs[11][1]~q & ( (!\ROM|mem~10_combout ) # (\REGS|regs[10][1]~q ) ) ) ) # ( !\ROM|mem~0_combout & ( \REGS|regs[11][1]~q & ( \REGS|regs[2][1]~q ) ) ) # ( \ROM|mem~0_combout & ( +// !\REGS|regs[11][1]~q & ( (\REGS|regs[10][1]~q & \ROM|mem~10_combout ) ) ) ) # ( !\ROM|mem~0_combout & ( !\REGS|regs[11][1]~q & ( \REGS|regs[2][1]~q ) ) ) + + .dataa(!\REGS|regs[10][1]~q ), + .datab(gnd), + .datac(!\REGS|regs[2][1]~q ), + .datad(!\ROM|mem~10_combout ), + .datae(!\ROM|mem~0_combout ), + .dataf(!\REGS|regs[11][1]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux62~12_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux62~12 .extended_lut = "off"; +defparam \REGS|Mux62~12 .lut_mask = 64'h0F0F00550F0FFF55; +defparam \REGS|Mux62~12 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X38_Y10_N24 +cyclonev_lcell_comb \REGS|Mux62~14 ( +// Equation(s): +// \REGS|Mux62~14_combout = ( \REGS|Mux62~11_combout & ( \REGS|Mux62~12_combout & ( (!\rt_alu[17]~11_combout & !\REGS|Mux62~13_combout ) ) ) ) # ( !\REGS|Mux62~11_combout & ( \REGS|Mux62~12_combout & ( (!\REGS|Mux62~13_combout & +// ((!\rt_alu[17]~10_combout ) # (!\rt_alu[17]~11_combout ))) ) ) ) # ( \REGS|Mux62~11_combout & ( !\REGS|Mux62~12_combout & ( (!\REGS|Mux62~13_combout & ((!\rt_alu[17]~11_combout ) # (\rt_alu[17]~10_combout ))) ) ) ) # ( !\REGS|Mux62~11_combout & ( +// !\REGS|Mux62~12_combout & ( !\REGS|Mux62~13_combout ) ) ) + + .dataa(gnd), + .datab(!\rt_alu[17]~10_combout ), + .datac(!\rt_alu[17]~11_combout ), + .datad(!\REGS|Mux62~13_combout ), + .datae(!\REGS|Mux62~11_combout ), + .dataf(!\REGS|Mux62~12_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux62~14_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux62~14 .extended_lut = "off"; +defparam \REGS|Mux62~14 .lut_mask = 64'hFF00F300FC00F000; +defparam \REGS|Mux62~14 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X47_Y10_N48 +cyclonev_lcell_comb \RAM|mem~257 ( +// Equation(s): +// \RAM|mem~257_combout = ( \REGS|Mux62~9_combout & ( \REGS|Mux62~14_combout & ( (\ROM|mem~9_combout & !\rst[0]~input_o ) ) ) ) # ( \REGS|Mux62~9_combout & ( !\REGS|Mux62~14_combout & ( !\rst[0]~input_o ) ) ) # ( !\REGS|Mux62~9_combout & ( +// !\REGS|Mux62~14_combout & ( (!\ROM|mem~9_combout & !\rst[0]~input_o ) ) ) ) + + .dataa(!\ROM|mem~9_combout ), + .datab(!\rst[0]~input_o ), + .datac(gnd), + .datad(gnd), + .datae(!\REGS|Mux62~9_combout ), + .dataf(!\REGS|Mux62~14_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem~257_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem~257 .extended_lut = "off"; +defparam \RAM|mem~257 .lut_mask = 64'h8888CCCC00004444; +defparam \RAM|mem~257 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X50_Y7_N33 +cyclonev_lcell_comb \RAM|mem[241][1]~feeder ( +// Equation(s): +// \RAM|mem[241][1]~feeder_combout = ( \RAM|mem~257_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~257_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[241][1]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[241][1]~feeder .extended_lut = "off"; +defparam \RAM|mem[241][1]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[241][1]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X49_Y12_N45 +cyclonev_lcell_comb \RAM|Decoder0~11 ( +// Equation(s): +// \RAM|Decoder0~11_combout = ( !\ALU|Mux26~1_combout & ( !\ALU|Mux25~1_combout ) ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(!\ALU|Mux26~1_combout ), + .dataf(!\ALU|Mux25~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|Decoder0~11_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|Decoder0~11 .extended_lut = "off"; +defparam \RAM|Decoder0~11 .lut_mask = 64'hFFFF000000000000; +defparam \RAM|Decoder0~11 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X22_Y9_N9 +cyclonev_lcell_comb \REGS|regs[16][31]~feeder ( +// Equation(s): +// \REGS|regs[16][31]~feeder_combout = ( \rd[31]~455_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[31]~455_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[16][31]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[16][31]~feeder .extended_lut = "off"; +defparam \REGS|regs[16][31]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[16][31]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X22_Y9_N10 +dffeas \REGS|regs[16][31] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[16][31]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~2_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[16][31]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[16][31] .is_wysiwyg = "true"; +defparam \REGS|regs[16][31] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X28_Y7_N44 +dffeas \REGS|regs[25][31] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[31]~455_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~13_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[25][31]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[25][31] .is_wysiwyg = "true"; +defparam \REGS|regs[25][31] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X27_Y10_N3 +cyclonev_lcell_comb \REGS|regs[24][31]~feeder ( +// Equation(s): +// \REGS|regs[24][31]~feeder_combout = ( \rd[31]~455_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[31]~455_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[24][31]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[24][31]~feeder .extended_lut = "off"; +defparam \REGS|regs[24][31]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[24][31]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X27_Y10_N5 +dffeas \REGS|regs[24][31] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[24][31]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~4_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[24][31]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[24][31] .is_wysiwyg = "true"; +defparam \REGS|regs[24][31] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X28_Y7_N24 +cyclonev_lcell_comb \rt_alu[31]~43 ( +// Equation(s): +// \rt_alu[31]~43_combout = ( \ROM|mem~0_combout & ( \ROM|mem~10_combout & ( \REGS|regs[24][31]~q ) ) ) # ( !\ROM|mem~0_combout & ( \ROM|mem~10_combout & ( \REGS|regs[16][31]~q ) ) ) # ( \ROM|mem~0_combout & ( !\ROM|mem~10_combout & ( +// \REGS|regs[25][31]~q ) ) ) # ( !\ROM|mem~0_combout & ( !\ROM|mem~10_combout & ( \REGS|regs[16][31]~q ) ) ) + + .dataa(!\REGS|regs[16][31]~q ), + .datab(!\REGS|regs[25][31]~q ), + .datac(gnd), + .datad(!\REGS|regs[24][31]~q ), + .datae(!\ROM|mem~0_combout ), + .dataf(!\ROM|mem~10_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[31]~43_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[31]~43 .extended_lut = "off"; +defparam \rt_alu[31]~43 .lut_mask = 64'h55553333555500FF; +defparam \rt_alu[31]~43 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X27_Y9_N20 +dffeas \REGS|regs[23][31] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[31]~455_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~18_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[23][31]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[23][31] .is_wysiwyg = "true"; +defparam \REGS|regs[23][31] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y9_N11 +dffeas \REGS|regs[31][31] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[31]~455_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~19_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[31][31]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[31][31] .is_wysiwyg = "true"; +defparam \REGS|regs[31][31] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X27_Y9_N12 +cyclonev_lcell_comb \REGS|Mux32~3 ( +// Equation(s): +// \REGS|Mux32~3_combout = ( \ROM|mem~0_combout & ( \REGS|regs[31][31]~q ) ) # ( !\ROM|mem~0_combout & ( \REGS|regs[23][31]~q ) ) + + .dataa(gnd), + .datab(gnd), + .datac(!\REGS|regs[23][31]~q ), + .datad(!\REGS|regs[31][31]~q ), + .datae(gnd), + .dataf(!\ROM|mem~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux32~3_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux32~3 .extended_lut = "off"; +defparam \REGS|Mux32~3 .lut_mask = 64'h0F0F0F0F00FF00FF; +defparam \REGS|Mux32~3 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X30_Y5_N56 +dffeas \REGS|regs[28][31] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[31]~455_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~8_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[28][31]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[28][31] .is_wysiwyg = "true"; +defparam \REGS|regs[28][31] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X30_Y5_N35 +dffeas \REGS|regs[20][31] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[31]~455_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~7_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[20][31]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[20][31] .is_wysiwyg = "true"; +defparam \REGS|regs[20][31] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X30_Y5_N41 +dffeas \REGS|regs[29][31] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[31]~455_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~17_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[29][31]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[29][31] .is_wysiwyg = "true"; +defparam \REGS|regs[29][31] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X30_Y5_N42 +cyclonev_lcell_comb \rt_alu[31]~41 ( +// Equation(s): +// \rt_alu[31]~41_combout = ( \ROM|mem~0_combout & ( \ROM|mem~10_combout & ( \REGS|regs[28][31]~q ) ) ) # ( !\ROM|mem~0_combout & ( \ROM|mem~10_combout & ( \REGS|regs[20][31]~q ) ) ) # ( \ROM|mem~0_combout & ( !\ROM|mem~10_combout & ( +// \REGS|regs[29][31]~q ) ) ) # ( !\ROM|mem~0_combout & ( !\ROM|mem~10_combout & ( \REGS|regs[20][31]~q ) ) ) + + .dataa(!\REGS|regs[28][31]~q ), + .datab(gnd), + .datac(!\REGS|regs[20][31]~q ), + .datad(!\REGS|regs[29][31]~q ), + .datae(!\ROM|mem~0_combout ), + .dataf(!\ROM|mem~10_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[31]~41_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[31]~41 .extended_lut = "off"; +defparam \rt_alu[31]~41 .lut_mask = 64'h0F0F00FF0F0F5555; +defparam \rt_alu[31]~41 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X32_Y5_N38 +dffeas \REGS|regs[30][31] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[31]~455_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~10_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[30][31]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[30][31] .is_wysiwyg = "true"; +defparam \REGS|regs[30][31] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y5_N37 +dffeas \REGS|regs[22][31] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[31]~455_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~9_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[22][31]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[22][31] .is_wysiwyg = "true"; +defparam \REGS|regs[22][31] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y5_N27 +cyclonev_lcell_comb \REGS|Mux32~2 ( +// Equation(s): +// \REGS|Mux32~2_combout = ( \ROM|mem~0_combout & ( \REGS|regs[30][31]~q ) ) # ( !\ROM|mem~0_combout & ( \REGS|regs[22][31]~q ) ) + + .dataa(!\REGS|regs[30][31]~q ), + .datab(gnd), + .datac(!\REGS|regs[22][31]~q ), + .datad(gnd), + .datae(gnd), + .dataf(!\ROM|mem~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux32~2_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux32~2 .extended_lut = "off"; +defparam \REGS|Mux32~2 .lut_mask = 64'h0F0F0F0F55555555; +defparam \REGS|Mux32~2 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X33_Y9_N36 +cyclonev_lcell_comb \rt_alu[31]~42 ( +// Equation(s): +// \rt_alu[31]~42_combout = ( \REGS|Mux32~2_combout & ( (!\ROM|mem~12_combout & (((\rt_alu[31]~41_combout )))) # (\ROM|mem~12_combout & ((!\ROM|mem~13_combout ) # ((\REGS|Mux32~3_combout )))) ) ) # ( !\REGS|Mux32~2_combout & ( (!\ROM|mem~12_combout & +// (((\rt_alu[31]~41_combout )))) # (\ROM|mem~12_combout & (\ROM|mem~13_combout & (\REGS|Mux32~3_combout ))) ) ) + + .dataa(!\ROM|mem~12_combout ), + .datab(!\ROM|mem~13_combout ), + .datac(!\REGS|Mux32~3_combout ), + .datad(!\rt_alu[31]~41_combout ), + .datae(gnd), + .dataf(!\REGS|Mux32~2_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[31]~42_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[31]~42 .extended_lut = "off"; +defparam \rt_alu[31]~42 .lut_mask = 64'h01AB01AB45EF45EF; +defparam \rt_alu[31]~42 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X28_Y9_N20 +dffeas \REGS|regs[26][31] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[31]~455_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~6_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[26][31]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[26][31] .is_wysiwyg = "true"; +defparam \REGS|regs[26][31] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X28_Y9_N59 +dffeas \REGS|regs[18][31] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[31]~455_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~5_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[18][31]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[18][31] .is_wysiwyg = "true"; +defparam \REGS|regs[18][31] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X28_Y9_N0 +cyclonev_lcell_comb \REGS|Mux32~4 ( +// Equation(s): +// \REGS|Mux32~4_combout = ( \ROM|mem~0_combout & ( \REGS|regs[26][31]~q ) ) # ( !\ROM|mem~0_combout & ( \REGS|regs[18][31]~q ) ) + + .dataa(gnd), + .datab(gnd), + .datac(!\REGS|regs[26][31]~q ), + .datad(!\REGS|regs[18][31]~q ), + .datae(gnd), + .dataf(!\ROM|mem~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux32~4_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux32~4 .extended_lut = "off"; +defparam \REGS|Mux32~4 .lut_mask = 64'h00FF00FF0F0F0F0F; +defparam \REGS|Mux32~4 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X32_Y5_N23 +dffeas \REGS|regs[27][31] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[31]~455_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~15_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[27][31]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[27][31] .is_wysiwyg = "true"; +defparam \REGS|regs[27][31] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y9_N25 +dffeas \REGS|regs[19][31] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[31]~455_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~14_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[19][31]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[19][31] .is_wysiwyg = "true"; +defparam \REGS|regs[19][31] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y5_N33 +cyclonev_lcell_comb \REGS|Mux32~5 ( +// Equation(s): +// \REGS|Mux32~5_combout = ( \REGS|regs[19][31]~q & ( (!\ROM|mem~0_combout ) # (\REGS|regs[27][31]~q ) ) ) # ( !\REGS|regs[19][31]~q & ( (\REGS|regs[27][31]~q & \ROM|mem~0_combout ) ) ) + + .dataa(!\REGS|regs[27][31]~q ), + .datab(!\ROM|mem~0_combout ), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\REGS|regs[19][31]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux32~5_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux32~5 .extended_lut = "off"; +defparam \REGS|Mux32~5 .lut_mask = 64'h11111111DDDDDDDD; +defparam \REGS|Mux32~5 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X33_Y9_N42 +cyclonev_lcell_comb \rt_alu[31]~44 ( +// Equation(s): +// \rt_alu[31]~44_combout = ( \REGS|Mux32~4_combout & ( \REGS|Mux32~5_combout & ( ((!\rt_alu[17]~4_combout & (\rt_alu[31]~43_combout )) # (\rt_alu[17]~4_combout & ((\rt_alu[31]~42_combout )))) # (\rt_alu[17]~5_combout ) ) ) ) # ( !\REGS|Mux32~4_combout +// & ( \REGS|Mux32~5_combout & ( (!\rt_alu[17]~4_combout & (((\rt_alu[17]~5_combout )) # (\rt_alu[31]~43_combout ))) # (\rt_alu[17]~4_combout & (((\rt_alu[31]~42_combout & !\rt_alu[17]~5_combout )))) ) ) ) # ( \REGS|Mux32~4_combout & ( +// !\REGS|Mux32~5_combout & ( (!\rt_alu[17]~4_combout & (\rt_alu[31]~43_combout & ((!\rt_alu[17]~5_combout )))) # (\rt_alu[17]~4_combout & (((\rt_alu[17]~5_combout ) # (\rt_alu[31]~42_combout )))) ) ) ) # ( !\REGS|Mux32~4_combout & ( +// !\REGS|Mux32~5_combout & ( (!\rt_alu[17]~5_combout & ((!\rt_alu[17]~4_combout & (\rt_alu[31]~43_combout )) # (\rt_alu[17]~4_combout & ((\rt_alu[31]~42_combout ))))) ) ) ) + + .dataa(!\rt_alu[31]~43_combout ), + .datab(!\rt_alu[17]~4_combout ), + .datac(!\rt_alu[31]~42_combout ), + .datad(!\rt_alu[17]~5_combout ), + .datae(!\REGS|Mux32~4_combout ), + .dataf(!\REGS|Mux32~5_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[31]~44_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[31]~44 .extended_lut = "off"; +defparam \rt_alu[31]~44 .lut_mask = 64'h4700473347CC47FF; +defparam \rt_alu[31]~44 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X33_Y9_N21 +cyclonev_lcell_comb \rt_alu[31]~45 ( +// Equation(s): +// \rt_alu[31]~45_combout = ( !\rt_alu[31]~40_combout & ( (\REGS|regs[8][31]~q & \ROM|mem~0_combout ) ) ) + + .dataa(gnd), + .datab(gnd), + .datac(!\REGS|regs[8][31]~q ), + .datad(!\ROM|mem~0_combout ), + .datae(gnd), + .dataf(!\rt_alu[31]~40_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[31]~45_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[31]~45 .extended_lut = "off"; +defparam \rt_alu[31]~45 .lut_mask = 64'h000F000F00000000; +defparam \rt_alu[31]~45 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X28_Y5_N30 +cyclonev_lcell_comb \REGS|regs[1][31]~feeder ( +// Equation(s): +// \REGS|regs[1][31]~feeder_combout = ( \rd[31]~455_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[31]~455_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[1][31]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[1][31]~feeder .extended_lut = "off"; +defparam \REGS|regs[1][31]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[1][31]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X28_Y5_N31 +dffeas \REGS|regs[1][31] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[1][31]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~28_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[1][31]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[1][31] .is_wysiwyg = "true"; +defparam \REGS|regs[1][31] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X33_Y9_N29 +dffeas \REGS|regs[9][31]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[31]~455_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~29_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[9][31]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[9][31]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[9][31]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: FF_X30_Y9_N17 +dffeas \REGS|regs[10][31] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[31]~455_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~33_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[10][31]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[10][31] .is_wysiwyg = "true"; +defparam \REGS|regs[10][31] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X30_Y9_N8 +dffeas \REGS|regs[2][31]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[31]~455_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~32_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[2][31]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[2][31]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[2][31]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: FF_X30_Y9_N44 +dffeas \REGS|regs[11][31]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[31]~455_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~37_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[11][31]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[11][31]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[11][31]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X30_Y9_N51 +cyclonev_lcell_comb \rt_alu[31]~34 ( +// Equation(s): +// \rt_alu[31]~34_combout = ( \ROM|mem~10_combout & ( \REGS|regs[11][31]~DUPLICATE_q & ( (!\ROM|mem~0_combout & ((\REGS|regs[2][31]~DUPLICATE_q ))) # (\ROM|mem~0_combout & (\REGS|regs[10][31]~q )) ) ) ) # ( !\ROM|mem~10_combout & ( +// \REGS|regs[11][31]~DUPLICATE_q & ( (\ROM|mem~0_combout ) # (\REGS|regs[2][31]~DUPLICATE_q ) ) ) ) # ( \ROM|mem~10_combout & ( !\REGS|regs[11][31]~DUPLICATE_q & ( (!\ROM|mem~0_combout & ((\REGS|regs[2][31]~DUPLICATE_q ))) # (\ROM|mem~0_combout & +// (\REGS|regs[10][31]~q )) ) ) ) # ( !\ROM|mem~10_combout & ( !\REGS|regs[11][31]~DUPLICATE_q & ( (\REGS|regs[2][31]~DUPLICATE_q & !\ROM|mem~0_combout ) ) ) ) + + .dataa(gnd), + .datab(!\REGS|regs[10][31]~q ), + .datac(!\REGS|regs[2][31]~DUPLICATE_q ), + .datad(!\ROM|mem~0_combout ), + .datae(!\ROM|mem~10_combout ), + .dataf(!\REGS|regs[11][31]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[31]~34_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[31]~34 .extended_lut = "off"; +defparam \rt_alu[31]~34 .lut_mask = 64'h0F000F330FFF0F33; +defparam \rt_alu[31]~34 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X27_Y8_N32 +dffeas \REGS|regs[13][31] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[31]~455_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~31_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[13][31]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[13][31] .is_wysiwyg = "true"; +defparam \REGS|regs[13][31] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y8_N44 +dffeas \REGS|regs[5][31] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[31]~455_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~30_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[5][31]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[5][31] .is_wysiwyg = "true"; +defparam \REGS|regs[5][31] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X27_Y8_N27 +cyclonev_lcell_comb \REGS|Mux32~1 ( +// Equation(s): +// \REGS|Mux32~1_combout = ( \PC|pc[7]~DUPLICATE_q & ( \PC|pc [8] & ( \REGS|regs[5][31]~q ) ) ) # ( !\PC|pc[7]~DUPLICATE_q & ( \PC|pc [8] & ( \REGS|regs[5][31]~q ) ) ) # ( \PC|pc[7]~DUPLICATE_q & ( !\PC|pc [8] & ( \REGS|regs[5][31]~q ) ) ) # ( +// !\PC|pc[7]~DUPLICATE_q & ( !\PC|pc [8] & ( (!\PC|pc [6] & ((!\PC|pc [9] & (\REGS|regs[13][31]~q )) # (\PC|pc [9] & ((\REGS|regs[5][31]~q ))))) # (\PC|pc [6] & (((\REGS|regs[5][31]~q )))) ) ) ) + + .dataa(!\PC|pc [6]), + .datab(!\REGS|regs[13][31]~q ), + .datac(!\REGS|regs[5][31]~q ), + .datad(!\PC|pc [9]), + .datae(!\PC|pc[7]~DUPLICATE_q ), + .dataf(!\PC|pc [8]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux32~1_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux32~1 .extended_lut = "off"; +defparam \REGS|Mux32~1 .lut_mask = 64'h270F0F0F0F0F0F0F; +defparam \REGS|Mux32~1 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X25_Y7_N51 +cyclonev_lcell_comb \REGS|regs[4][31]~feeder ( +// Equation(s): +// \REGS|regs[4][31]~feeder_combout = ( \rd[31]~455_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[31]~455_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[4][31]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[4][31]~feeder .extended_lut = "off"; +defparam \REGS|regs[4][31]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[4][31]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X25_Y7_N53 +dffeas \REGS|regs[4][31] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[4][31]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~22_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[4][31]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[4][31] .is_wysiwyg = "true"; +defparam \REGS|regs[4][31] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X25_Y7_N30 +cyclonev_lcell_comb \REGS|regs[12][31]~feeder ( +// Equation(s): +// \REGS|regs[12][31]~feeder_combout = ( \rd[31]~455_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[31]~455_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[12][31]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[12][31]~feeder .extended_lut = "off"; +defparam \REGS|regs[12][31]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[12][31]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X25_Y7_N32 +dffeas \REGS|regs[12][31] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[12][31]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~26_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[12][31]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[12][31] .is_wysiwyg = "true"; +defparam \REGS|regs[12][31] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X25_Y7_N36 +cyclonev_lcell_comb \REGS|Mux32~0 ( +// Equation(s): +// \REGS|Mux32~0_combout = ( \PC|pc [7] & ( \PC|pc[9]~DUPLICATE_q & ( \REGS|regs[4][31]~q ) ) ) # ( !\PC|pc [7] & ( \PC|pc[9]~DUPLICATE_q & ( \REGS|regs[4][31]~q ) ) ) # ( \PC|pc [7] & ( !\PC|pc[9]~DUPLICATE_q & ( \REGS|regs[4][31]~q ) ) ) # ( !\PC|pc +// [7] & ( !\PC|pc[9]~DUPLICATE_q & ( (!\PC|pc[8]~DUPLICATE_q & ((!\PC|pc[6]~DUPLICATE_q & ((\REGS|regs[12][31]~q ))) # (\PC|pc[6]~DUPLICATE_q & (\REGS|regs[4][31]~q )))) # (\PC|pc[8]~DUPLICATE_q & (\REGS|regs[4][31]~q )) ) ) ) + + .dataa(!\REGS|regs[4][31]~q ), + .datab(!\REGS|regs[12][31]~q ), + .datac(!\PC|pc[8]~DUPLICATE_q ), + .datad(!\PC|pc[6]~DUPLICATE_q ), + .datae(!\PC|pc [7]), + .dataf(!\PC|pc[9]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux32~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux32~0 .extended_lut = "off"; +defparam \REGS|Mux32~0 .lut_mask = 64'h3555555555555555; +defparam \REGS|Mux32~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X33_Y9_N54 +cyclonev_lcell_comb \rt_alu[31]~36 ( +// Equation(s): +// \rt_alu[31]~36_combout = ( \REGS|Mux32~0_combout & ( (!\ROM|mem~0_combout ) # ((\ROM|mem~10_combout ) # (\REGS|Mux32~1_combout )) ) ) # ( !\REGS|Mux32~0_combout & ( (\ROM|mem~0_combout & (\REGS|Mux32~1_combout & !\ROM|mem~10_combout )) ) ) + + .dataa(gnd), + .datab(!\ROM|mem~0_combout ), + .datac(!\REGS|Mux32~1_combout ), + .datad(!\ROM|mem~10_combout ), + .datae(gnd), + .dataf(!\REGS|Mux32~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[31]~36_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[31]~36 .extended_lut = "off"; +defparam \rt_alu[31]~36 .lut_mask = 64'h03000300CFFFCFFF; +defparam \rt_alu[31]~36 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X30_Y6_N22 +dffeas \REGS|regs[6][31] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[31]~455_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~34_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[6][31]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[6][31] .is_wysiwyg = "true"; +defparam \REGS|regs[6][31] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X30_Y6_N47 +dffeas \REGS|regs[15][31] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[31]~455_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~39_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[15][31]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[15][31] .is_wysiwyg = "true"; +defparam \REGS|regs[15][31] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X30_Y6_N32 +dffeas \REGS|regs[14][31] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[31]~455_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~35_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[14][31]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[14][31] .is_wysiwyg = "true"; +defparam \REGS|regs[14][31] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X30_Y6_N45 +cyclonev_lcell_comb \rt_alu[31]~35 ( +// Equation(s): +// \rt_alu[31]~35_combout = ( \REGS|regs[14][31]~q & ( (!\ROM|mem~0_combout & (((\REGS|regs[6][31]~q )))) # (\ROM|mem~0_combout & (((\REGS|regs[15][31]~q )) # (\ROM|mem~10_combout ))) ) ) # ( !\REGS|regs[14][31]~q & ( (!\ROM|mem~0_combout & +// (((\REGS|regs[6][31]~q )))) # (\ROM|mem~0_combout & (!\ROM|mem~10_combout & ((\REGS|regs[15][31]~q )))) ) ) + + .dataa(!\ROM|mem~10_combout ), + .datab(!\ROM|mem~0_combout ), + .datac(!\REGS|regs[6][31]~q ), + .datad(!\REGS|regs[15][31]~q ), + .datae(gnd), + .dataf(!\REGS|regs[14][31]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[31]~35_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[31]~35 .extended_lut = "off"; +defparam \rt_alu[31]~35 .lut_mask = 64'h0C2E0C2E1D3F1D3F; +defparam \rt_alu[31]~35 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X33_Y9_N24 +cyclonev_lcell_comb \rt_alu[31]~37 ( +// Equation(s): +// \rt_alu[31]~37_combout = ( \rt_alu[31]~36_combout & ( \rt_alu[31]~35_combout & ( (!\rt_alu[17]~10_combout ) # (\rt_alu[31]~34_combout ) ) ) ) # ( !\rt_alu[31]~36_combout & ( \rt_alu[31]~35_combout & ( (!\rt_alu[17]~10_combout & (\ROM|mem~12_combout +// )) # (\rt_alu[17]~10_combout & ((\rt_alu[31]~34_combout ))) ) ) ) # ( \rt_alu[31]~36_combout & ( !\rt_alu[31]~35_combout & ( (!\rt_alu[17]~10_combout & (!\ROM|mem~12_combout )) # (\rt_alu[17]~10_combout & ((\rt_alu[31]~34_combout ))) ) ) ) # ( +// !\rt_alu[31]~36_combout & ( !\rt_alu[31]~35_combout & ( (\rt_alu[31]~34_combout & \rt_alu[17]~10_combout ) ) ) ) + + .dataa(!\ROM|mem~12_combout ), + .datab(gnd), + .datac(!\rt_alu[31]~34_combout ), + .datad(!\rt_alu[17]~10_combout ), + .datae(!\rt_alu[31]~36_combout ), + .dataf(!\rt_alu[31]~35_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[31]~37_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[31]~37 .extended_lut = "off"; +defparam \rt_alu[31]~37 .lut_mask = 64'h000FAA0F550FFF0F; +defparam \rt_alu[31]~37 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X33_Y9_N30 +cyclonev_lcell_comb \rt_alu[31]~38 ( +// Equation(s): +// \rt_alu[31]~38_combout = ( \rt_alu[31]~37_combout & ( ((!\ROM|mem~0_combout & (\REGS|regs[1][31]~q )) # (\ROM|mem~0_combout & ((\REGS|regs[9][31]~DUPLICATE_q )))) # (\rt_alu[17]~11_combout ) ) ) # ( !\rt_alu[31]~37_combout & ( +// (!\rt_alu[17]~11_combout & ((!\ROM|mem~0_combout & (\REGS|regs[1][31]~q )) # (\ROM|mem~0_combout & ((\REGS|regs[9][31]~DUPLICATE_q ))))) ) ) + + .dataa(!\REGS|regs[1][31]~q ), + .datab(!\ROM|mem~0_combout ), + .datac(!\REGS|regs[9][31]~DUPLICATE_q ), + .datad(!\rt_alu[17]~11_combout ), + .datae(gnd), + .dataf(!\rt_alu[31]~37_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[31]~38_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[31]~38 .extended_lut = "off"; +defparam \rt_alu[31]~38 .lut_mask = 64'h4700470047FF47FF; +defparam \rt_alu[31]~38 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X33_Y9_N0 +cyclonev_lcell_comb \rt_alu[31]~271 ( +// Equation(s): +// \rt_alu[31]~271_combout = ( \rt_alu[31]~45_combout & ( \rt_alu[31]~38_combout & ( (\rt_alu[31]~39_combout ) # (\rt_alu[31]~40_combout ) ) ) ) # ( !\rt_alu[31]~45_combout & ( \rt_alu[31]~38_combout & ( (\rt_alu[31]~40_combout & +// ((!\rt_alu[31]~39_combout ) # (\rt_alu[31]~44_combout ))) ) ) ) # ( \rt_alu[31]~45_combout & ( !\rt_alu[31]~38_combout & ( \rt_alu[31]~39_combout ) ) ) # ( !\rt_alu[31]~45_combout & ( !\rt_alu[31]~38_combout & ( (\rt_alu[31]~40_combout & +// (\rt_alu[31]~44_combout & \rt_alu[31]~39_combout )) ) ) ) + + .dataa(!\rt_alu[31]~40_combout ), + .datab(!\rt_alu[31]~44_combout ), + .datac(!\rt_alu[31]~39_combout ), + .datad(gnd), + .datae(!\rt_alu[31]~45_combout ), + .dataf(!\rt_alu[31]~38_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[31]~271_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[31]~271 .extended_lut = "off"; +defparam \rt_alu[31]~271 .lut_mask = 64'h01010F0F51515F5F; +defparam \rt_alu[31]~271 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X33_Y7_N51 +cyclonev_lcell_comb \ALU|Mux0~0 ( +// Equation(s): +// \ALU|Mux0~0_combout = ( \rt_alu[31]~271_combout & ( \ALU|Mux29~1_combout & ( (!\REGS|Mux0~2_combout ) # ((\CONTROL_UNIT|ALU_FN [1] & \ALU|Mux15~0_combout )) ) ) ) # ( !\rt_alu[31]~271_combout & ( \ALU|Mux29~1_combout & ( ((!\CONTROL_UNIT|ALU_FN [1] & +// \ALU|Mux15~0_combout )) # (\REGS|Mux0~2_combout ) ) ) ) # ( \rt_alu[31]~271_combout & ( !\ALU|Mux29~1_combout & ( (\CONTROL_UNIT|ALU_FN [1] & (\ALU|Mux15~0_combout & ((!\CONTROL_UNIT|ALU_FN [0]) # (\REGS|Mux0~2_combout )))) ) ) ) # ( +// !\rt_alu[31]~271_combout & ( !\ALU|Mux29~1_combout & ( (\ALU|Mux15~0_combout & ((!\CONTROL_UNIT|ALU_FN [1] & (!\REGS|Mux0~2_combout )) # (\CONTROL_UNIT|ALU_FN [1] & (\REGS|Mux0~2_combout & !\CONTROL_UNIT|ALU_FN [0])))) ) ) ) + + .dataa(!\CONTROL_UNIT|ALU_FN [1]), + .datab(!\ALU|Mux15~0_combout ), + .datac(!\REGS|Mux0~2_combout ), + .datad(!\CONTROL_UNIT|ALU_FN [0]), + .datae(!\rt_alu[31]~271_combout ), + .dataf(!\ALU|Mux29~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\ALU|Mux0~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \ALU|Mux0~0 .extended_lut = "off"; +defparam \ALU|Mux0~0 .lut_mask = 64'h212011012F2FF1F1; +defparam \ALU|Mux0~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X33_Y9_N48 +cyclonev_lcell_comb \ALU|adder_unit|operand[31]~0 ( +// Equation(s): +// \ALU|adder_unit|operand[31]~0_combout = ( \rt_alu[31]~45_combout & ( \rt_alu[31]~38_combout & ( !\CONTROL_UNIT|ALU_FN [1] $ (((\rt_alu[31]~39_combout ) # (\rt_alu[31]~40_combout ))) ) ) ) # ( !\rt_alu[31]~45_combout & ( \rt_alu[31]~38_combout & ( +// !\CONTROL_UNIT|ALU_FN [1] $ (((\rt_alu[31]~40_combout & ((!\rt_alu[31]~39_combout ) # (\rt_alu[31]~44_combout ))))) ) ) ) # ( \rt_alu[31]~45_combout & ( !\rt_alu[31]~38_combout & ( !\rt_alu[31]~39_combout $ (\CONTROL_UNIT|ALU_FN [1]) ) ) ) # ( +// !\rt_alu[31]~45_combout & ( !\rt_alu[31]~38_combout & ( !\CONTROL_UNIT|ALU_FN [1] $ (((\rt_alu[31]~40_combout & (\rt_alu[31]~44_combout & \rt_alu[31]~39_combout )))) ) ) ) + + .dataa(!\rt_alu[31]~40_combout ), + .datab(!\rt_alu[31]~44_combout ), + .datac(!\rt_alu[31]~39_combout ), + .datad(!\CONTROL_UNIT|ALU_FN [1]), + .datae(!\rt_alu[31]~45_combout ), + .dataf(!\rt_alu[31]~38_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\ALU|adder_unit|operand[31]~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \ALU|adder_unit|operand[31]~0 .extended_lut = "off"; +defparam \ALU|adder_unit|operand[31]~0 .lut_mask = 64'hFE01F00FAE51A05F; +defparam \ALU|adder_unit|operand[31]~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X38_Y10_N33 +cyclonev_lcell_comb \rt_alu[1]~46 ( +// Equation(s): +// \rt_alu[1]~46_combout = ( \ROM|mem~7_combout & ( \ROM|mem~1_combout & ( (!\PC|pc [9] & (!\PC|pc[8]~DUPLICATE_q & \ROM|mem~0_combout )) ) ) ) # ( \ROM|mem~7_combout & ( !\ROM|mem~1_combout & ( (!\PC|pc [9] & (!\PC|pc[8]~DUPLICATE_q & +// (\ROM|mem~2_combout & \ROM|mem~0_combout ))) ) ) ) + + .dataa(!\PC|pc [9]), + .datab(!\PC|pc[8]~DUPLICATE_q ), + .datac(!\ROM|mem~2_combout ), + .datad(!\ROM|mem~0_combout ), + .datae(!\ROM|mem~7_combout ), + .dataf(!\ROM|mem~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[1]~46_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[1]~46 .extended_lut = "off"; +defparam \rt_alu[1]~46 .lut_mask = 64'h0000000800000088; +defparam \rt_alu[1]~46 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X38_Y10_N18 +cyclonev_lcell_comb \ALU|adder_unit|operand[1]~2 ( +// Equation(s): +// \ALU|adder_unit|operand[1]~2_combout = ( \CONTROL_UNIT|ALU_FN [1] & ( \REGS|Mux62~14_combout & ( ((!\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout & (\REGS|Mux62~9_combout & \ROM|mem~9_combout ))) # (\rt_alu[1]~46_combout ) ) ) ) # ( !\CONTROL_UNIT|ALU_FN +// [1] & ( \REGS|Mux62~14_combout & ( (!\rt_alu[1]~46_combout & (((!\REGS|Mux62~9_combout ) # (!\ROM|mem~9_combout )) # (\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout ))) ) ) ) # ( \CONTROL_UNIT|ALU_FN [1] & ( !\REGS|Mux62~14_combout & ( +// ((!\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout & ((!\ROM|mem~9_combout ) # (\REGS|Mux62~9_combout )))) # (\rt_alu[1]~46_combout ) ) ) ) # ( !\CONTROL_UNIT|ALU_FN [1] & ( !\REGS|Mux62~14_combout & ( (!\rt_alu[1]~46_combout & (((!\REGS|Mux62~9_combout & +// \ROM|mem~9_combout )) # (\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout ))) ) ) ) + + .dataa(!\rt_alu[1]~46_combout ), + .datab(!\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout ), + .datac(!\REGS|Mux62~9_combout ), + .datad(!\ROM|mem~9_combout ), + .datae(!\CONTROL_UNIT|ALU_FN [1]), + .dataf(!\REGS|Mux62~14_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\ALU|adder_unit|operand[1]~2_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \ALU|adder_unit|operand[1]~2 .extended_lut = "off"; +defparam \ALU|adder_unit|operand[1]~2 .lut_mask = 64'h22A2DD5DAAA2555D; +defparam \ALU|adder_unit|operand[1]~2 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X38_Y7_N26 +dffeas \REGS|regs[24][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[0]~86_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~4_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[24][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[24][0] .is_wysiwyg = "true"; +defparam \REGS|regs[24][0] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y6_N21 +cyclonev_lcell_comb \REGS|regs[16][0]~feeder ( +// Equation(s): +// \REGS|regs[16][0]~feeder_combout = ( \rd[0]~86_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[0]~86_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[16][0]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[16][0]~feeder .extended_lut = "off"; +defparam \REGS|regs[16][0]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[16][0]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X42_Y6_N22 +dffeas \REGS|regs[16][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[16][0]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~2_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[16][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[16][0] .is_wysiwyg = "true"; +defparam \REGS|regs[16][0] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X38_Y7_N5 +dffeas \REGS|regs[25][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[0]~86_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~13_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[25][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[25][0] .is_wysiwyg = "true"; +defparam \REGS|regs[25][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X38_Y7_N0 +cyclonev_lcell_comb \REGS|Mux63~8 ( +// Equation(s): +// \REGS|Mux63~8_combout = ( \ROM|mem~0_combout & ( (!\ROM|mem~10_combout & ((\REGS|regs[25][0]~q ))) # (\ROM|mem~10_combout & (\REGS|regs[24][0]~q )) ) ) # ( !\ROM|mem~0_combout & ( \REGS|regs[16][0]~q ) ) + + .dataa(!\REGS|regs[24][0]~q ), + .datab(!\REGS|regs[16][0]~q ), + .datac(!\REGS|regs[25][0]~q ), + .datad(!\ROM|mem~10_combout ), + .datae(!\ROM|mem~0_combout ), + .dataf(gnd), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux63~8_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux63~8 .extended_lut = "off"; +defparam \REGS|Mux63~8 .lut_mask = 64'h33330F5533330F55; +defparam \REGS|Mux63~8 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X41_Y6_N45 +cyclonev_lcell_comb \REGS|regs[19][0]~feeder ( +// Equation(s): +// \REGS|regs[19][0]~feeder_combout = ( \rd[0]~86_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[0]~86_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[19][0]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[19][0]~feeder .extended_lut = "off"; +defparam \REGS|regs[19][0]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[19][0]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X41_Y6_N47 +dffeas \REGS|regs[19][0]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[19][0]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~14_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[19][0]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[19][0]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[19][0]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X41_Y6_N6 +cyclonev_lcell_comb \REGS|regs[27][0]~feeder ( +// Equation(s): +// \REGS|regs[27][0]~feeder_combout = ( \rd[0]~86_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[0]~86_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[27][0]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[27][0]~feeder .extended_lut = "off"; +defparam \REGS|regs[27][0]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[27][0]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X41_Y6_N8 +dffeas \REGS|regs[27][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[27][0]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~15_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[27][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[27][0] .is_wysiwyg = "true"; +defparam \REGS|regs[27][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X41_Y6_N0 +cyclonev_lcell_comb \REGS|Mux63~5 ( +// Equation(s): +// \REGS|Mux63~5_combout = ( \PC|pc [9] & ( \PC|pc [7] & ( \REGS|regs[19][0]~DUPLICATE_q ) ) ) # ( !\PC|pc [9] & ( \PC|pc [7] & ( \REGS|regs[19][0]~DUPLICATE_q ) ) ) # ( \PC|pc [9] & ( !\PC|pc [7] & ( \REGS|regs[19][0]~DUPLICATE_q ) ) ) # ( !\PC|pc [9] & +// ( !\PC|pc [7] & ( (!\PC|pc[6]~DUPLICATE_q & ((!\PC|pc [8] & ((\REGS|regs[27][0]~q ))) # (\PC|pc [8] & (\REGS|regs[19][0]~DUPLICATE_q )))) # (\PC|pc[6]~DUPLICATE_q & (\REGS|regs[19][0]~DUPLICATE_q )) ) ) ) + + .dataa(!\PC|pc[6]~DUPLICATE_q ), + .datab(!\REGS|regs[19][0]~DUPLICATE_q ), + .datac(!\PC|pc [8]), + .datad(!\REGS|regs[27][0]~q ), + .datae(!\PC|pc [9]), + .dataf(!\PC|pc [7]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux63~5_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux63~5 .extended_lut = "off"; +defparam \REGS|Mux63~5 .lut_mask = 64'h13B3333333333333; +defparam \REGS|Mux63~5 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X37_Y9_N56 +dffeas \REGS|regs[30][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[0]~86_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~10_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[30][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[30][0] .is_wysiwyg = "true"; +defparam \REGS|regs[30][0] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X41_Y5_N35 +dffeas \REGS|regs[22][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[0]~86_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~9_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[22][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[22][0] .is_wysiwyg = "true"; +defparam \REGS|regs[22][0] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y9_N57 +cyclonev_lcell_comb \REGS|Mux63~2 ( +// Equation(s): +// \REGS|Mux63~2_combout = ( \PC|pc[6]~DUPLICATE_q & ( \REGS|regs[22][0]~q ) ) # ( !\PC|pc[6]~DUPLICATE_q & ( \REGS|regs[22][0]~q & ( (((\PC|pc [9]) # (\PC|pc [8])) # (\PC|pc[7]~DUPLICATE_q )) # (\REGS|regs[30][0]~q ) ) ) ) # ( !\PC|pc[6]~DUPLICATE_q & +// ( !\REGS|regs[22][0]~q & ( (\REGS|regs[30][0]~q & (!\PC|pc[7]~DUPLICATE_q & (!\PC|pc [8] & !\PC|pc [9]))) ) ) ) + + .dataa(!\REGS|regs[30][0]~q ), + .datab(!\PC|pc[7]~DUPLICATE_q ), + .datac(!\PC|pc [8]), + .datad(!\PC|pc [9]), + .datae(!\PC|pc[6]~DUPLICATE_q ), + .dataf(!\REGS|regs[22][0]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux63~2_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux63~2 .extended_lut = "off"; +defparam \REGS|Mux63~2 .lut_mask = 64'h400000007FFFFFFF; +defparam \REGS|Mux63~2 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X38_Y5_N54 +cyclonev_lcell_comb \REGS|regs[20][0]~feeder ( +// Equation(s): +// \REGS|regs[20][0]~feeder_combout = ( \rd[0]~86_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[0]~86_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[20][0]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[20][0]~feeder .extended_lut = "off"; +defparam \REGS|regs[20][0]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[20][0]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X38_Y5_N56 +dffeas \REGS|regs[20][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[20][0]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~7_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[20][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[20][0] .is_wysiwyg = "true"; +defparam \REGS|regs[20][0] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X38_Y7_N38 +dffeas \REGS|regs[28][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[0]~86_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~8_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[28][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[28][0] .is_wysiwyg = "true"; +defparam \REGS|regs[28][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X38_Y5_N6 +cyclonev_lcell_comb \REGS|regs[29][0]~feeder ( +// Equation(s): +// \REGS|regs[29][0]~feeder_combout = ( \rd[0]~86_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[0]~86_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[29][0]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[29][0]~feeder .extended_lut = "off"; +defparam \REGS|regs[29][0]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[29][0]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X38_Y5_N8 +dffeas \REGS|regs[29][0]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[29][0]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~17_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[29][0]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[29][0]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[29][0]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X38_Y5_N36 +cyclonev_lcell_comb \REGS|Mux63~6 ( +// Equation(s): +// \REGS|Mux63~6_combout = ( \ROM|mem~0_combout & ( \ROM|mem~10_combout & ( \REGS|regs[28][0]~q ) ) ) # ( !\ROM|mem~0_combout & ( \ROM|mem~10_combout & ( \REGS|regs[20][0]~q ) ) ) # ( \ROM|mem~0_combout & ( !\ROM|mem~10_combout & ( +// \REGS|regs[29][0]~DUPLICATE_q ) ) ) # ( !\ROM|mem~0_combout & ( !\ROM|mem~10_combout & ( \REGS|regs[20][0]~q ) ) ) + + .dataa(!\REGS|regs[20][0]~q ), + .datab(gnd), + .datac(!\REGS|regs[28][0]~q ), + .datad(!\REGS|regs[29][0]~DUPLICATE_q ), + .datae(!\ROM|mem~0_combout ), + .dataf(!\ROM|mem~10_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux63~6_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux63~6 .extended_lut = "off"; +defparam \REGS|Mux63~6 .lut_mask = 64'h555500FF55550F0F; +defparam \REGS|Mux63~6 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X40_Y10_N56 +dffeas \REGS|regs[23][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[0]~86_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~18_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[23][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[23][0] .is_wysiwyg = "true"; +defparam \REGS|regs[23][0] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X40_Y10_N8 +dffeas \REGS|regs[31][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[0]~86_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~19_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[31][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[31][0] .is_wysiwyg = "true"; +defparam \REGS|regs[31][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X40_Y10_N51 +cyclonev_lcell_comb \REGS|Mux63~3 ( +// Equation(s): +// \REGS|Mux63~3_combout = ( \PC|pc[7]~DUPLICATE_q & ( \PC|pc [6] & ( \REGS|regs[23][0]~q ) ) ) # ( !\PC|pc[7]~DUPLICATE_q & ( \PC|pc [6] & ( \REGS|regs[23][0]~q ) ) ) # ( \PC|pc[7]~DUPLICATE_q & ( !\PC|pc [6] & ( \REGS|regs[23][0]~q ) ) ) # ( +// !\PC|pc[7]~DUPLICATE_q & ( !\PC|pc [6] & ( (!\PC|pc [9] & ((!\PC|pc [8] & ((\REGS|regs[31][0]~q ))) # (\PC|pc [8] & (\REGS|regs[23][0]~q )))) # (\PC|pc [9] & (\REGS|regs[23][0]~q )) ) ) ) + + .dataa(!\REGS|regs[23][0]~q ), + .datab(!\REGS|regs[31][0]~q ), + .datac(!\PC|pc [9]), + .datad(!\PC|pc [8]), + .datae(!\PC|pc[7]~DUPLICATE_q ), + .dataf(!\PC|pc [6]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux63~3_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux63~3 .extended_lut = "off"; +defparam \REGS|Mux63~3 .lut_mask = 64'h3555555555555555; +defparam \REGS|Mux63~3 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X38_Y7_N42 +cyclonev_lcell_comb \REGS|Mux63~7 ( +// Equation(s): +// \REGS|Mux63~7_combout = ( \REGS|Mux63~6_combout & ( \REGS|Mux63~3_combout & ( (!\ROM|mem~12_combout ) # ((\REGS|Mux63~2_combout ) # (\ROM|mem~13_combout )) ) ) ) # ( !\REGS|Mux63~6_combout & ( \REGS|Mux63~3_combout & ( (\ROM|mem~12_combout & +// ((\REGS|Mux63~2_combout ) # (\ROM|mem~13_combout ))) ) ) ) # ( \REGS|Mux63~6_combout & ( !\REGS|Mux63~3_combout & ( (!\ROM|mem~12_combout ) # ((!\ROM|mem~13_combout & \REGS|Mux63~2_combout )) ) ) ) # ( !\REGS|Mux63~6_combout & ( !\REGS|Mux63~3_combout +// & ( (\ROM|mem~12_combout & (!\ROM|mem~13_combout & \REGS|Mux63~2_combout )) ) ) ) + + .dataa(gnd), + .datab(!\ROM|mem~12_combout ), + .datac(!\ROM|mem~13_combout ), + .datad(!\REGS|Mux63~2_combout ), + .datae(!\REGS|Mux63~6_combout ), + .dataf(!\REGS|Mux63~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux63~7_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux63~7 .extended_lut = "off"; +defparam \REGS|Mux63~7 .lut_mask = 64'h0030CCFC0333CFFF; +defparam \REGS|Mux63~7 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X38_Y7_N33 +cyclonev_lcell_comb \REGS|Mux63~9 ( +// Equation(s): +// \REGS|Mux63~9_combout = ( \REGS|Mux63~4_combout & ( \REGS|Mux63~7_combout & ( ((!\rt_alu[17]~5_combout & (\REGS|Mux63~8_combout )) # (\rt_alu[17]~5_combout & ((\REGS|Mux63~5_combout )))) # (\rt_alu[17]~4_combout ) ) ) ) # ( !\REGS|Mux63~4_combout & +// ( \REGS|Mux63~7_combout & ( (!\rt_alu[17]~4_combout & ((!\rt_alu[17]~5_combout & (\REGS|Mux63~8_combout )) # (\rt_alu[17]~5_combout & ((\REGS|Mux63~5_combout ))))) # (\rt_alu[17]~4_combout & (((!\rt_alu[17]~5_combout )))) ) ) ) # ( +// \REGS|Mux63~4_combout & ( !\REGS|Mux63~7_combout & ( (!\rt_alu[17]~4_combout & ((!\rt_alu[17]~5_combout & (\REGS|Mux63~8_combout )) # (\rt_alu[17]~5_combout & ((\REGS|Mux63~5_combout ))))) # (\rt_alu[17]~4_combout & (((\rt_alu[17]~5_combout )))) ) ) +// ) # ( !\REGS|Mux63~4_combout & ( !\REGS|Mux63~7_combout & ( (!\rt_alu[17]~4_combout & ((!\rt_alu[17]~5_combout & (\REGS|Mux63~8_combout )) # (\rt_alu[17]~5_combout & ((\REGS|Mux63~5_combout ))))) ) ) ) + + .dataa(!\REGS|Mux63~8_combout ), + .datab(!\rt_alu[17]~4_combout ), + .datac(!\rt_alu[17]~5_combout ), + .datad(!\REGS|Mux63~5_combout ), + .datae(!\REGS|Mux63~4_combout ), + .dataf(!\REGS|Mux63~7_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux63~9_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux63~9 .extended_lut = "off"; +defparam \REGS|Mux63~9 .lut_mask = 64'h404C434F707C737F; +defparam \REGS|Mux63~9 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X38_Y12_N17 +dffeas \REGS|regs[2][0]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[0]~86_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~32_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[2][0]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[2][0]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[2][0]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: FF_X38_Y12_N40 +dffeas \REGS|regs[10][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[0]~86_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~33_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[10][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[10][0] .is_wysiwyg = "true"; +defparam \REGS|regs[10][0] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X38_Y12_N11 +dffeas \REGS|regs[11][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[0]~86_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~37_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[11][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[11][0] .is_wysiwyg = "true"; +defparam \REGS|regs[11][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X38_Y12_N39 +cyclonev_lcell_comb \REGS|Mux63~12 ( +// Equation(s): +// \REGS|Mux63~12_combout = ( \REGS|regs[11][0]~q & ( (!\ROM|mem~0_combout & (((\REGS|regs[2][0]~DUPLICATE_q )))) # (\ROM|mem~0_combout & ((!\ROM|mem~10_combout ) # ((\REGS|regs[10][0]~q )))) ) ) # ( !\REGS|regs[11][0]~q & ( (!\ROM|mem~0_combout & +// (((\REGS|regs[2][0]~DUPLICATE_q )))) # (\ROM|mem~0_combout & (\ROM|mem~10_combout & ((\REGS|regs[10][0]~q )))) ) ) + + .dataa(!\ROM|mem~10_combout ), + .datab(!\ROM|mem~0_combout ), + .datac(!\REGS|regs[2][0]~DUPLICATE_q ), + .datad(!\REGS|regs[10][0]~q ), + .datae(gnd), + .dataf(!\REGS|regs[11][0]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux63~12_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux63~12 .extended_lut = "off"; +defparam \REGS|Mux63~12 .lut_mask = 64'h0C1D0C1D2E3F2E3F; +defparam \REGS|Mux63~12 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X41_Y10_N36 +cyclonev_lcell_comb \REGS|regs[9][0]~feeder ( +// Equation(s): +// \REGS|regs[9][0]~feeder_combout = ( \rd[0]~86_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[0]~86_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[9][0]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[9][0]~feeder .extended_lut = "off"; +defparam \REGS|regs[9][0]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[9][0]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X41_Y10_N38 +dffeas \REGS|regs[9][0]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[9][0]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~29_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[9][0]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[9][0]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[9][0]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: FF_X35_Y9_N55 +dffeas \REGS|regs[8][0]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[0]~86_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~24_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[8][0]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[8][0]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[8][0]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X41_Y4_N24 +cyclonev_lcell_comb \REGS|regs[1][0]~feeder ( +// Equation(s): +// \REGS|regs[1][0]~feeder_combout = ( \rd[0]~86_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[0]~86_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[1][0]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[1][0]~feeder .extended_lut = "off"; +defparam \REGS|regs[1][0]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[1][0]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X41_Y4_N26 +dffeas \REGS|regs[1][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[1][0]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~28_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[1][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[1][0] .is_wysiwyg = "true"; +defparam \REGS|regs[1][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X41_Y10_N27 +cyclonev_lcell_comb \REGS|Mux63~13 ( +// Equation(s): +// \REGS|Mux63~13_combout = ( !\rt_alu[17]~11_combout & ( \rt_alu[17]~10_combout & ( (!\ROM|mem~0_combout & ((\REGS|regs[1][0]~q ))) # (\ROM|mem~0_combout & (\REGS|regs[9][0]~DUPLICATE_q )) ) ) ) # ( !\rt_alu[17]~11_combout & ( !\rt_alu[17]~10_combout +// & ( (\REGS|regs[8][0]~DUPLICATE_q & \ROM|mem~0_combout ) ) ) ) + + .dataa(!\REGS|regs[9][0]~DUPLICATE_q ), + .datab(!\REGS|regs[8][0]~DUPLICATE_q ), + .datac(!\ROM|mem~0_combout ), + .datad(!\REGS|regs[1][0]~q ), + .datae(!\rt_alu[17]~11_combout ), + .dataf(!\rt_alu[17]~10_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux63~13_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux63~13 .extended_lut = "off"; +defparam \REGS|Mux63~13 .lut_mask = 64'h0303000005F50000; +defparam \REGS|Mux63~13 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X40_Y8_N32 +dffeas \REGS|regs[12][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[0]~86_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~26_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[12][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[12][0] .is_wysiwyg = "true"; +defparam \REGS|regs[12][0] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X40_Y8_N4 +dffeas \REGS|regs[4][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[0]~86_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~22_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[4][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[4][0] .is_wysiwyg = "true"; +defparam \REGS|regs[4][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X40_Y8_N30 +cyclonev_lcell_comb \REGS|Mux63~0 ( +// Equation(s): +// \REGS|Mux63~0_combout = ( \REGS|regs[12][0]~q & ( \REGS|regs[4][0]~q ) ) # ( !\REGS|regs[12][0]~q & ( \REGS|regs[4][0]~q & ( (((\PC|pc[8]~DUPLICATE_q ) # (\PC|pc [9])) # (\PC|pc [7])) # (\PC|pc[6]~DUPLICATE_q ) ) ) ) # ( \REGS|regs[12][0]~q & ( +// !\REGS|regs[4][0]~q & ( (!\PC|pc[6]~DUPLICATE_q & (!\PC|pc [7] & (!\PC|pc [9] & !\PC|pc[8]~DUPLICATE_q ))) ) ) ) + + .dataa(!\PC|pc[6]~DUPLICATE_q ), + .datab(!\PC|pc [7]), + .datac(!\PC|pc [9]), + .datad(!\PC|pc[8]~DUPLICATE_q ), + .datae(!\REGS|regs[12][0]~q ), + .dataf(!\REGS|regs[4][0]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux63~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux63~0 .extended_lut = "off"; +defparam \REGS|Mux63~0 .lut_mask = 64'h000080007FFFFFFF; +defparam \REGS|Mux63~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X41_Y10_N44 +dffeas \REGS|regs[14][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[0]~86_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~35_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[14][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[14][0] .is_wysiwyg = "true"; +defparam \REGS|regs[14][0] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X41_Y10_N11 +dffeas \REGS|regs[15][0]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[0]~86_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~39_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[15][0]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[15][0]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[15][0]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: FF_X40_Y14_N13 +dffeas \REGS|regs[6][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[0]~86_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~34_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[6][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[6][0] .is_wysiwyg = "true"; +defparam \REGS|regs[6][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X41_Y10_N45 +cyclonev_lcell_comb \REGS|Mux63~10 ( +// Equation(s): +// \REGS|Mux63~10_combout = ( \ROM|mem~10_combout & ( \ROM|mem~0_combout & ( \REGS|regs[14][0]~q ) ) ) # ( !\ROM|mem~10_combout & ( \ROM|mem~0_combout & ( \REGS|regs[15][0]~DUPLICATE_q ) ) ) # ( \ROM|mem~10_combout & ( !\ROM|mem~0_combout & ( +// \REGS|regs[6][0]~q ) ) ) # ( !\ROM|mem~10_combout & ( !\ROM|mem~0_combout & ( \REGS|regs[6][0]~q ) ) ) + + .dataa(gnd), + .datab(!\REGS|regs[14][0]~q ), + .datac(!\REGS|regs[15][0]~DUPLICATE_q ), + .datad(!\REGS|regs[6][0]~q ), + .datae(!\ROM|mem~10_combout ), + .dataf(!\ROM|mem~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux63~10_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux63~10 .extended_lut = "off"; +defparam \REGS|Mux63~10 .lut_mask = 64'h00FF00FF0F0F3333; +defparam \REGS|Mux63~10 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X36_Y9_N50 +dffeas \REGS|regs[13][0]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[0]~86_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~31_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[13][0]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[13][0]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[13][0]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: FF_X41_Y14_N26 +dffeas \REGS|regs[5][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[0]~86_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~30_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[5][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[5][0] .is_wysiwyg = "true"; +defparam \REGS|regs[5][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X36_Y9_N51 +cyclonev_lcell_comb \REGS|Mux63~1 ( +// Equation(s): +// \REGS|Mux63~1_combout = ( \PC|pc [6] & ( \REGS|regs[5][0]~q ) ) # ( !\PC|pc [6] & ( \REGS|regs[5][0]~q & ( (((\PC|pc [7]) # (\PC|pc [9])) # (\PC|pc[8]~DUPLICATE_q )) # (\REGS|regs[13][0]~DUPLICATE_q ) ) ) ) # ( !\PC|pc [6] & ( !\REGS|regs[5][0]~q & ( +// (\REGS|regs[13][0]~DUPLICATE_q & (!\PC|pc[8]~DUPLICATE_q & (!\PC|pc [9] & !\PC|pc [7]))) ) ) ) + + .dataa(!\REGS|regs[13][0]~DUPLICATE_q ), + .datab(!\PC|pc[8]~DUPLICATE_q ), + .datac(!\PC|pc [9]), + .datad(!\PC|pc [7]), + .datae(!\PC|pc [6]), + .dataf(!\REGS|regs[5][0]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux63~1_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux63~1 .extended_lut = "off"; +defparam \REGS|Mux63~1 .lut_mask = 64'h400000007FFFFFFF; +defparam \REGS|Mux63~1 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X40_Y10_N39 +cyclonev_lcell_comb \REGS|Mux63~11 ( +// Equation(s): +// \REGS|Mux63~11_combout = ( \ROM|mem~13_combout & ( \REGS|Mux63~1_combout & ( (!\ROM|mem~12_combout ) # (\REGS|Mux63~10_combout ) ) ) ) # ( !\ROM|mem~13_combout & ( \REGS|Mux63~1_combout & ( (!\ROM|mem~12_combout & (\REGS|Mux63~0_combout )) # +// (\ROM|mem~12_combout & ((\REGS|Mux63~10_combout ))) ) ) ) # ( \ROM|mem~13_combout & ( !\REGS|Mux63~1_combout & ( (\ROM|mem~12_combout & \REGS|Mux63~10_combout ) ) ) ) # ( !\ROM|mem~13_combout & ( !\REGS|Mux63~1_combout & ( (!\ROM|mem~12_combout & +// (\REGS|Mux63~0_combout )) # (\ROM|mem~12_combout & ((\REGS|Mux63~10_combout ))) ) ) ) + + .dataa(gnd), + .datab(!\ROM|mem~12_combout ), + .datac(!\REGS|Mux63~0_combout ), + .datad(!\REGS|Mux63~10_combout ), + .datae(!\ROM|mem~13_combout ), + .dataf(!\REGS|Mux63~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux63~11_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux63~11 .extended_lut = "off"; +defparam \REGS|Mux63~11 .lut_mask = 64'h0C3F00330C3FCCFF; +defparam \REGS|Mux63~11 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X40_Y10_N18 +cyclonev_lcell_comb \REGS|Mux63~14 ( +// Equation(s): +// \REGS|Mux63~14_combout = ( !\REGS|Mux63~13_combout & ( \REGS|Mux63~11_combout & ( (!\rt_alu[17]~11_combout ) # ((\rt_alu[17]~10_combout & !\REGS|Mux63~12_combout )) ) ) ) # ( !\REGS|Mux63~13_combout & ( !\REGS|Mux63~11_combout & ( +// (!\rt_alu[17]~10_combout ) # ((!\rt_alu[17]~11_combout ) # (!\REGS|Mux63~12_combout )) ) ) ) + + .dataa(gnd), + .datab(!\rt_alu[17]~10_combout ), + .datac(!\rt_alu[17]~11_combout ), + .datad(!\REGS|Mux63~12_combout ), + .datae(!\REGS|Mux63~13_combout ), + .dataf(!\REGS|Mux63~11_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux63~14_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux63~14 .extended_lut = "off"; +defparam \REGS|Mux63~14 .lut_mask = 64'hFFFC0000F3F00000; +defparam \REGS|Mux63~14 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X49_Y7_N15 +cyclonev_lcell_comb \RAM|mem~0 ( +// Equation(s): +// \RAM|mem~0_combout = ( \REGS|Mux63~14_combout & ( \ROM|mem~9_combout & ( (!\rst[0]~input_o & \REGS|Mux63~9_combout ) ) ) ) # ( !\REGS|Mux63~14_combout & ( \ROM|mem~9_combout & ( (!\rst[0]~input_o & \REGS|Mux63~9_combout ) ) ) ) # ( +// !\REGS|Mux63~14_combout & ( !\ROM|mem~9_combout & ( !\rst[0]~input_o ) ) ) + + .dataa(!\rst[0]~input_o ), + .datab(gnd), + .datac(gnd), + .datad(!\REGS|Mux63~9_combout ), + .datae(!\REGS|Mux63~14_combout ), + .dataf(!\ROM|mem~9_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem~0 .extended_lut = "off"; +defparam \RAM|mem~0 .lut_mask = 64'hAAAA000000AA00AA; +defparam \RAM|mem~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X38_Y10_N48 +cyclonev_lcell_comb \rt_alu[1]~47 ( +// Equation(s): +// \rt_alu[1]~47_combout = ( \REGS|Mux62~9_combout & ( \REGS|Mux62~14_combout & ( (!\rt_alu[1]~46_combout & ((!\ROM|mem~9_combout ) # (\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout ))) ) ) ) # ( !\REGS|Mux62~9_combout & ( \REGS|Mux62~14_combout & ( +// !\rt_alu[1]~46_combout ) ) ) # ( \REGS|Mux62~9_combout & ( !\REGS|Mux62~14_combout & ( (!\rt_alu[1]~46_combout & \CONTROL_UNIT|CLASSIFIER|Equal0~1_combout ) ) ) ) # ( !\REGS|Mux62~9_combout & ( !\REGS|Mux62~14_combout & ( (!\rt_alu[1]~46_combout & +// ((\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout ) # (\ROM|mem~9_combout ))) ) ) ) + + .dataa(!\rt_alu[1]~46_combout ), + .datab(!\ROM|mem~9_combout ), + .datac(gnd), + .datad(!\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout ), + .datae(!\REGS|Mux62~9_combout ), + .dataf(!\REGS|Mux62~14_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[1]~47_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[1]~47 .extended_lut = "off"; +defparam \rt_alu[1]~47 .lut_mask = 64'h22AA00AAAAAA88AA; +defparam \rt_alu[1]~47 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X38_Y10_N12 +cyclonev_lcell_comb \ALU|Mux30~0 ( +// Equation(s): +// \ALU|Mux30~0_combout = ( \ALU|Mux15~0_combout & ( \rt_alu[1]~47_combout & ( (!\REGS|Mux30~2_combout & (((!\CONTROL_UNIT|ALU_FN [1])))) # (\REGS|Mux30~2_combout & (((!\CONTROL_UNIT|ALU_FN [0] & \CONTROL_UNIT|ALU_FN [1])) # (\ALU|Mux29~1_combout ))) ) +// ) ) # ( !\ALU|Mux15~0_combout & ( \rt_alu[1]~47_combout & ( (\REGS|Mux30~2_combout & \ALU|Mux29~1_combout ) ) ) ) # ( \ALU|Mux15~0_combout & ( !\rt_alu[1]~47_combout & ( (!\REGS|Mux30~2_combout & (((!\CONTROL_UNIT|ALU_FN [0] & \CONTROL_UNIT|ALU_FN +// [1])) # (\ALU|Mux29~1_combout ))) # (\REGS|Mux30~2_combout & (((\CONTROL_UNIT|ALU_FN [1])))) ) ) ) # ( !\ALU|Mux15~0_combout & ( !\rt_alu[1]~47_combout & ( (!\REGS|Mux30~2_combout & \ALU|Mux29~1_combout ) ) ) ) + + .dataa(!\CONTROL_UNIT|ALU_FN [0]), + .datab(!\REGS|Mux30~2_combout ), + .datac(!\ALU|Mux29~1_combout ), + .datad(!\CONTROL_UNIT|ALU_FN [1]), + .datae(!\ALU|Mux15~0_combout ), + .dataf(!\rt_alu[1]~47_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\ALU|Mux30~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \ALU|Mux30~0 .extended_lut = "off"; +defparam \ALU|Mux30~0 .lut_mask = 64'h0C0C0CBF0303CF23; +defparam \ALU|Mux30~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y11_N36 +cyclonev_lcell_comb \rt_alu[0]~33 ( +// Equation(s): +// \rt_alu[0]~33_combout = ( \rt_alu[5]~32_combout & ( \REGS|Mux63~14_combout & ( ((!\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout & (\REGS|Mux63~9_combout & \ROM|mem~9_combout ))) # (\ROM|mem~8_combout ) ) ) ) # ( !\rt_alu[5]~32_combout & ( +// \REGS|Mux63~14_combout & ( (!\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout & (\REGS|Mux63~9_combout & \ROM|mem~9_combout )) ) ) ) # ( \rt_alu[5]~32_combout & ( !\REGS|Mux63~14_combout & ( ((!\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout & +// ((!\ROM|mem~9_combout ) # (\REGS|Mux63~9_combout )))) # (\ROM|mem~8_combout ) ) ) ) # ( !\rt_alu[5]~32_combout & ( !\REGS|Mux63~14_combout & ( (!\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout & ((!\ROM|mem~9_combout ) # (\REGS|Mux63~9_combout ))) ) ) ) + + .dataa(!\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout ), + .datab(!\ROM|mem~8_combout ), + .datac(!\REGS|Mux63~9_combout ), + .datad(!\ROM|mem~9_combout ), + .datae(!\rt_alu[5]~32_combout ), + .dataf(!\REGS|Mux63~14_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[0]~33_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[0]~33 .extended_lut = "off"; +defparam \rt_alu[0]~33 .lut_mask = 64'hAA0ABB3B000A333B; +defparam \rt_alu[0]~33 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y11_N0 +cyclonev_lcell_comb \ALU|adder_unit|OUT_1[0] ( +// Equation(s): +// \ALU|adder_unit|OUT_1 [0] = SUM(( !\REGS|Mux31~2_combout $ (!\rt_alu[0]~33_combout ) ) + ( !VCC ) + ( !VCC )) +// \ALU|adder_unit|_~13 = CARRY(( !\REGS|Mux31~2_combout $ (!\rt_alu[0]~33_combout ) ) + ( !VCC ) + ( !VCC )) +// \ALU|adder_unit|_~14 = SHARE((!\rt_alu[0]~33_combout & (((\CONTROL_UNIT|ALU_FN~1_combout )) # (\CONTROL_UNIT|B~0_combout ))) # (\rt_alu[0]~33_combout & (((\REGS|Mux31~2_combout ))))) + + .dataa(!\CONTROL_UNIT|B~0_combout ), + .datab(!\CONTROL_UNIT|ALU_FN~1_combout ), + .datac(!\REGS|Mux31~2_combout ), + .datad(!\rt_alu[0]~33_combout ), + .datae(gnd), + .dataf(gnd), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(), + .sumout(\ALU|adder_unit|OUT_1 [0]), + .cout(\ALU|adder_unit|_~13 ), + .shareout(\ALU|adder_unit|_~14 )); +// synopsys translate_off +defparam \ALU|adder_unit|OUT_1[0] .extended_lut = "off"; +defparam \ALU|adder_unit|OUT_1[0] .lut_mask = 64'h0000770F00000FF0; +defparam \ALU|adder_unit|OUT_1[0] .shared_arith = "on"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y11_N3 +cyclonev_lcell_comb \ALU|adder_unit|OUT_1[1] ( +// Equation(s): +// \ALU|adder_unit|OUT_1 [1] = SUM(( !\REGS|Mux30~2_combout $ (!\ALU|adder_unit|operand[1]~2_combout ) ) + ( \ALU|adder_unit|_~14 ) + ( \ALU|adder_unit|_~13 )) +// \ALU|adder_unit|_~16 = CARRY(( !\REGS|Mux30~2_combout $ (!\ALU|adder_unit|operand[1]~2_combout ) ) + ( \ALU|adder_unit|_~14 ) + ( \ALU|adder_unit|_~13 )) +// \ALU|adder_unit|_~17 = SHARE((\REGS|Mux30~2_combout & \ALU|adder_unit|operand[1]~2_combout )) + + .dataa(gnd), + .datab(gnd), + .datac(!\REGS|Mux30~2_combout ), + .datad(!\ALU|adder_unit|operand[1]~2_combout ), + .datae(gnd), + .dataf(gnd), + .datag(gnd), + .cin(\ALU|adder_unit|_~13 ), + .sharein(\ALU|adder_unit|_~14 ), + .combout(), + .sumout(\ALU|adder_unit|OUT_1 [1]), + .cout(\ALU|adder_unit|_~16 ), + .shareout(\ALU|adder_unit|_~17 )); +// synopsys translate_off +defparam \ALU|adder_unit|OUT_1[1] .extended_lut = "off"; +defparam \ALU|adder_unit|OUT_1[1] .lut_mask = 64'h0000000F00000FF0; +defparam \ALU|adder_unit|OUT_1[1] .shared_arith = "on"; +// synopsys translate_on + +// Location: LABCELL_X41_Y9_N39 +cyclonev_lcell_comb \ALU|Mux30~1 ( +// Equation(s): +// \ALU|Mux30~1_combout = ( \ALU|adder_unit|OUT_1 [1] & ( (\ALU|Mux29~0_combout & !\ALU|Mux30~0_combout ) ) ) # ( !\ALU|adder_unit|OUT_1 [1] & ( !\ALU|Mux30~0_combout ) ) + + .dataa(gnd), + .datab(gnd), + .datac(!\ALU|Mux29~0_combout ), + .datad(!\ALU|Mux30~0_combout ), + .datae(gnd), + .dataf(!\ALU|adder_unit|OUT_1 [1]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\ALU|Mux30~1_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \ALU|Mux30~1 .extended_lut = "off"; +defparam \ALU|Mux30~1 .lut_mask = 64'hFF00FF000F000F00; +defparam \ALU|Mux30~1 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X41_Y9_N36 +cyclonev_lcell_comb \RAM|Decoder0~8 ( +// Equation(s): +// \RAM|Decoder0~8_combout = ( !\ALU|Mux30~1_combout & ( !\ALU|Mux27~1_combout ) ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(!\ALU|Mux27~1_combout ), + .datae(gnd), + .dataf(!\ALU|Mux30~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|Decoder0~8_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|Decoder0~8 .extended_lut = "off"; +defparam \RAM|Decoder0~8 .lut_mask = 64'hFF00FF0000000000; +defparam \RAM|Decoder0~8 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X40_Y11_N30 +cyclonev_lcell_comb \ALU|Mux25~0 ( +// Equation(s): +// \ALU|Mux25~0_combout = ( \ALU|Mux15~0_combout & ( \rt_alu[6]~31_combout & ( (!\REGS|Mux25~2_combout & (((!\CONTROL_UNIT|ALU_FN [0] & \CONTROL_UNIT|ALU_FN [1])) # (\ALU|Mux29~1_combout ))) # (\REGS|Mux25~2_combout & (((\CONTROL_UNIT|ALU_FN [1])))) ) ) +// ) # ( !\ALU|Mux15~0_combout & ( \rt_alu[6]~31_combout & ( (!\REGS|Mux25~2_combout & \ALU|Mux29~1_combout ) ) ) ) # ( \ALU|Mux15~0_combout & ( !\rt_alu[6]~31_combout & ( (!\REGS|Mux25~2_combout & (((!\CONTROL_UNIT|ALU_FN [1])))) # +// (\REGS|Mux25~2_combout & (((!\CONTROL_UNIT|ALU_FN [0] & \CONTROL_UNIT|ALU_FN [1])) # (\ALU|Mux29~1_combout ))) ) ) ) # ( !\ALU|Mux15~0_combout & ( !\rt_alu[6]~31_combout & ( (\REGS|Mux25~2_combout & \ALU|Mux29~1_combout ) ) ) ) + + .dataa(!\REGS|Mux25~2_combout ), + .datab(!\CONTROL_UNIT|ALU_FN [0]), + .datac(!\CONTROL_UNIT|ALU_FN [1]), + .datad(!\ALU|Mux29~1_combout ), + .datae(!\ALU|Mux15~0_combout ), + .dataf(!\rt_alu[6]~31_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\ALU|Mux25~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \ALU|Mux25~0 .extended_lut = "off"; +defparam \ALU|Mux25~0 .lut_mask = 64'h0055A4F500AA0DAF; +defparam \ALU|Mux25~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X49_Y11_N33 +cyclonev_lcell_comb \RAM|Decoder0~31 ( +// Equation(s): +// \RAM|Decoder0~31_combout = ( \ALU|adder_unit|OUT_1 [5] & ( \ALU|adder_unit|OUT_1 [6] & ( (!\ALU|Mux25~0_combout & (\ALU|Mux29~0_combout & \ALU|Mux26~0_combout )) ) ) ) # ( !\ALU|adder_unit|OUT_1 [5] & ( \ALU|adder_unit|OUT_1 [6] & ( +// (!\ALU|Mux25~0_combout & (\ALU|Mux29~0_combout & \ALU|Mux26~0_combout )) ) ) ) # ( \ALU|adder_unit|OUT_1 [5] & ( !\ALU|adder_unit|OUT_1 [6] & ( (!\ALU|Mux25~0_combout & ((!\ALU|Mux29~0_combout ) # (\ALU|Mux26~0_combout ))) ) ) ) # ( +// !\ALU|adder_unit|OUT_1 [5] & ( !\ALU|adder_unit|OUT_1 [6] & ( (!\ALU|Mux25~0_combout & \ALU|Mux26~0_combout ) ) ) ) + + .dataa(!\ALU|Mux25~0_combout ), + .datab(gnd), + .datac(!\ALU|Mux29~0_combout ), + .datad(!\ALU|Mux26~0_combout ), + .datae(!\ALU|adder_unit|OUT_1 [5]), + .dataf(!\ALU|adder_unit|OUT_1 [6]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|Decoder0~31_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|Decoder0~31 .extended_lut = "off"; +defparam \RAM|Decoder0~31 .lut_mask = 64'h00AAA0AA000A000A; +defparam \RAM|Decoder0~31 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X49_Y11_N36 +cyclonev_lcell_comb \RAM|Decoder0~32 ( +// Equation(s): +// \RAM|Decoder0~32_combout = ( \ALU|Mux24~1_combout & ( \RAM|Decoder0~31_combout ) ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(!\ALU|Mux24~1_combout ), + .dataf(!\RAM|Decoder0~31_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|Decoder0~32_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|Decoder0~32 .extended_lut = "off"; +defparam \RAM|Decoder0~32 .lut_mask = 64'h000000000000FFFF; +defparam \RAM|Decoder0~32 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X46_Y9_N21 +cyclonev_lcell_comb \RAM|mem[51][0]~125 ( +// Equation(s): +// \RAM|mem[51][0]~125_combout = ( \RAM|Decoder0~32_combout & ( \ALU|Mux28~1_combout & ( ((\RAM|Decoder0~8_combout & \RAM|Decoder0~4_combout )) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~32_combout & ( \ALU|Mux28~1_combout & ( \rst[0]~input_o ) ) ) +// # ( \RAM|Decoder0~32_combout & ( !\ALU|Mux28~1_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~32_combout & ( !\ALU|Mux28~1_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\RAM|Decoder0~8_combout ), + .datab(!\RAM|Decoder0~4_combout ), + .datac(gnd), + .datad(!\rst[0]~input_o ), + .datae(!\RAM|Decoder0~32_combout ), + .dataf(!\ALU|Mux28~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[51][0]~125_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[51][0]~125 .extended_lut = "off"; +defparam \RAM|mem[51][0]~125 .lut_mask = 64'h00FF00FF00FF11FF; +defparam \RAM|mem[51][0]~125 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X46_Y9_N34 +dffeas \RAM|mem[51][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[51][0]~125_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[51][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[51][0] .is_wysiwyg = "true"; +defparam \RAM|mem[51][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X46_Y9_N42 +cyclonev_lcell_comb \RAM|mem[59][2]~127 ( +// Equation(s): +// \RAM|mem[59][2]~127_combout = ( \RAM|Decoder0~4_combout & ( \ALU|Mux28~1_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~4_combout & ( \ALU|Mux28~1_combout & ( \rst[0]~input_o ) ) ) # ( \RAM|Decoder0~4_combout & ( !\ALU|Mux28~1_combout & ( +// ((\RAM|Decoder0~32_combout & \RAM|Decoder0~8_combout )) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~4_combout & ( !\ALU|Mux28~1_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\rst[0]~input_o ), + .datab(!\RAM|Decoder0~32_combout ), + .datac(!\RAM|Decoder0~8_combout ), + .datad(gnd), + .datae(!\RAM|Decoder0~4_combout ), + .dataf(!\ALU|Mux28~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[59][2]~127_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[59][2]~127 .extended_lut = "off"; +defparam \RAM|mem[59][2]~127 .lut_mask = 64'h5555575755555555; +defparam \RAM|mem[59][2]~127 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X46_Y9_N44 +dffeas \RAM|mem[59][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[59][2]~127_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[59][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[59][0] .is_wysiwyg = "true"; +defparam \RAM|mem[59][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X36_Y9_N42 +cyclonev_lcell_comb \ALU|logic_unit|Mux31~0 ( +// Equation(s): +// \ALU|logic_unit|Mux31~0_combout = ( \REGS|Mux31~2_combout & ( \rt_alu[0]~33_combout & ( \CONTROL_UNIT|ALU_FN [1] ) ) ) # ( !\REGS|Mux31~2_combout & ( \rt_alu[0]~33_combout & ( !\CONTROL_UNIT|ALU_FN [1] $ (!\CONTROL_UNIT|ALU_FN [0]) ) ) ) # ( +// \REGS|Mux31~2_combout & ( !\rt_alu[0]~33_combout & ( !\CONTROL_UNIT|ALU_FN [1] $ (!\CONTROL_UNIT|ALU_FN [0]) ) ) ) # ( !\REGS|Mux31~2_combout & ( !\rt_alu[0]~33_combout & ( (!\CONTROL_UNIT|ALU_FN [1] & !\CONTROL_UNIT|ALU_FN [0]) ) ) ) + + .dataa(gnd), + .datab(!\CONTROL_UNIT|ALU_FN [1]), + .datac(!\CONTROL_UNIT|ALU_FN [0]), + .datad(gnd), + .datae(!\REGS|Mux31~2_combout ), + .dataf(!\rt_alu[0]~33_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\ALU|logic_unit|Mux31~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \ALU|logic_unit|Mux31~0 .extended_lut = "off"; +defparam \ALU|logic_unit|Mux31~0 .lut_mask = 64'hC0C03C3C3C3C3333; +defparam \ALU|logic_unit|Mux31~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y9_N6 +cyclonev_lcell_comb \ALU|Mux31~0 ( +// Equation(s): +// \ALU|Mux31~0_combout = ( \ALU|logic_unit|Mux31~0_combout & ( \ALU|adder_unit|OUT_1 [0] & ( (!\ROM|mem~6_combout ) # (!\comb~0_combout ) ) ) ) # ( !\ALU|logic_unit|Mux31~0_combout & ( \ALU|adder_unit|OUT_1 [0] & ( (!\comb~0_combout ) # +// ((!\ROM|mem~6_combout & !\ROM|mem~25_combout )) ) ) ) # ( \ALU|logic_unit|Mux31~0_combout & ( !\ALU|adder_unit|OUT_1 [0] & ( (!\ROM|mem~6_combout & (\ROM|mem~25_combout & \comb~0_combout )) ) ) ) + + .dataa(!\ROM|mem~6_combout ), + .datab(gnd), + .datac(!\ROM|mem~25_combout ), + .datad(!\comb~0_combout ), + .datae(!\ALU|logic_unit|Mux31~0_combout ), + .dataf(!\ALU|adder_unit|OUT_1 [0]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\ALU|Mux31~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \ALU|Mux31~0 .extended_lut = "off"; +defparam \ALU|Mux31~0 .lut_mask = 64'h0000000AFFA0FFAA; +defparam \ALU|Mux31~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y9_N39 +cyclonev_lcell_comb \ALU|Mux31~1 ( +// Equation(s): +// \ALU|Mux31~1_combout = ( \comb~0_combout & ( \CONTROL_UNIT|ALU_FN [0] & ( (!\ROM|mem~25_combout & (!\CONTROL_UNIT|ALU_FN [1] & \ROM|mem~6_combout )) ) ) ) + + .dataa(!\ROM|mem~25_combout ), + .datab(!\CONTROL_UNIT|ALU_FN [1]), + .datac(gnd), + .datad(!\ROM|mem~6_combout ), + .datae(!\comb~0_combout ), + .dataf(!\CONTROL_UNIT|ALU_FN [0]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\ALU|Mux31~1_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \ALU|Mux31~1 .extended_lut = "off"; +defparam \ALU|Mux31~1 .lut_mask = 64'h0000000000000088; +defparam \ALU|Mux31~1 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y9_N51 +cyclonev_lcell_comb \ALU|Mux31~2 ( +// Equation(s): +// \ALU|Mux31~2_combout = ( \comb~0_combout & ( !\CONTROL_UNIT|ALU_FN [0] & ( (!\ROM|mem~25_combout & (!\CONTROL_UNIT|ALU_FN [1] & \ROM|mem~6_combout )) ) ) ) + + .dataa(!\ROM|mem~25_combout ), + .datab(!\CONTROL_UNIT|ALU_FN [1]), + .datac(gnd), + .datad(!\ROM|mem~6_combout ), + .datae(!\comb~0_combout ), + .dataf(!\CONTROL_UNIT|ALU_FN [0]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\ALU|Mux31~2_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \ALU|Mux31~2 .extended_lut = "off"; +defparam \ALU|Mux31~2 .lut_mask = 64'h0000008800000000; +defparam \ALU|Mux31~2 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X38_Y9_N48 +cyclonev_lcell_comb \RAM|Decoder0~1 ( +// Equation(s): +// \RAM|Decoder0~1_combout = ( \ROM|mem~1_combout & ( (\ROM|mem~0_combout & \ROM|mem~2_combout ) ) ) + + .dataa(gnd), + .datab(gnd), + .datac(!\ROM|mem~0_combout ), + .datad(!\ROM|mem~2_combout ), + .datae(gnd), + .dataf(!\ROM|mem~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|Decoder0~1_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|Decoder0~1 .extended_lut = "off"; +defparam \RAM|Decoder0~1 .lut_mask = 64'h00000000000F000F; +defparam \RAM|Decoder0~1 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X43_Y11_N30 +cyclonev_lcell_comb \RAM|Decoder0~14 ( +// Equation(s): +// \RAM|Decoder0~14_combout = ( \ALU|adder_unit|OUT_1 [8] & ( \ALU|Mux28~1_combout & ( (\ALU|Mux29~0_combout & (\RAM|Decoder0~1_combout & (!\ALU|Mux29~3_combout & !\ALU|Mux23~0_combout ))) ) ) ) # ( !\ALU|adder_unit|OUT_1 [8] & ( \ALU|Mux28~1_combout & +// ( (\RAM|Decoder0~1_combout & (!\ALU|Mux29~3_combout & !\ALU|Mux23~0_combout )) ) ) ) + + .dataa(!\ALU|Mux29~0_combout ), + .datab(!\RAM|Decoder0~1_combout ), + .datac(!\ALU|Mux29~3_combout ), + .datad(!\ALU|Mux23~0_combout ), + .datae(!\ALU|adder_unit|OUT_1 [8]), + .dataf(!\ALU|Mux28~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|Decoder0~14_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|Decoder0~14 .extended_lut = "off"; +defparam \RAM|Decoder0~14 .lut_mask = 64'h0000000030001000; +defparam \RAM|Decoder0~14 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y9_N51 +cyclonev_lcell_comb \ALU|OUT_1~0 ( +// Equation(s): +// \ALU|OUT_1~0_combout = ( \REGS|Mux0~2_combout & ( !\ALU|adder_unit|operand[31]~0_combout ) ) # ( !\REGS|Mux0~2_combout & ( \ALU|adder_unit|operand[31]~0_combout ) ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(!\ALU|adder_unit|operand[31]~0_combout ), + .datae(gnd), + .dataf(!\REGS|Mux0~2_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\ALU|OUT_1~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \ALU|OUT_1~0 .extended_lut = "off"; +defparam \ALU|OUT_1~0 .lut_mask = 64'h00FF00FFFF00FF00; +defparam \ALU|OUT_1~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X43_Y11_N18 +cyclonev_lcell_comb \RAM|Decoder0~16 ( +// Equation(s): +// \RAM|Decoder0~16_combout = ( \ALU|OUT_1~0_combout & ( \ALU|adder_unit|COUT [0] & ( (\ALU|Mux31~0_combout & \RAM|Decoder0~14_combout ) ) ) ) # ( !\ALU|OUT_1~0_combout & ( \ALU|adder_unit|COUT [0] & ( (\RAM|Decoder0~14_combout & ((\ALU|Mux31~1_combout +// ) # (\ALU|Mux31~0_combout ))) ) ) ) # ( \ALU|OUT_1~0_combout & ( !\ALU|adder_unit|COUT [0] & ( (\RAM|Decoder0~14_combout & (((\ALU|Mux31~2_combout ) # (\ALU|Mux31~1_combout )) # (\ALU|Mux31~0_combout ))) ) ) ) # ( !\ALU|OUT_1~0_combout & ( +// !\ALU|adder_unit|COUT [0] & ( (\RAM|Decoder0~14_combout & ((\ALU|Mux31~2_combout ) # (\ALU|Mux31~0_combout ))) ) ) ) + + .dataa(!\ALU|Mux31~0_combout ), + .datab(!\ALU|Mux31~1_combout ), + .datac(!\ALU|Mux31~2_combout ), + .datad(!\RAM|Decoder0~14_combout ), + .datae(!\ALU|OUT_1~0_combout ), + .dataf(!\ALU|adder_unit|COUT [0]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|Decoder0~16_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|Decoder0~16 .extended_lut = "off"; +defparam \RAM|Decoder0~16 .lut_mask = 64'h005F007F00770055; +defparam \RAM|Decoder0~16 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X46_Y13_N57 +cyclonev_lcell_comb \RAM|mem[55][2]~126 ( +// Equation(s): +// \RAM|mem[55][2]~126_combout = ( \RAM|Decoder0~8_combout & ( \RAM|Decoder0~16_combout & ( (\RAM|Decoder0~32_combout ) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~8_combout & ( \RAM|Decoder0~16_combout & ( \rst[0]~input_o ) ) ) # ( +// \RAM|Decoder0~8_combout & ( !\RAM|Decoder0~16_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~8_combout & ( !\RAM|Decoder0~16_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\rst[0]~input_o ), + .datab(gnd), + .datac(!\RAM|Decoder0~32_combout ), + .datad(gnd), + .datae(!\RAM|Decoder0~8_combout ), + .dataf(!\RAM|Decoder0~16_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[55][2]~126_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[55][2]~126 .extended_lut = "off"; +defparam \RAM|mem[55][2]~126 .lut_mask = 64'h5555555555555F5F; +defparam \RAM|mem[55][2]~126 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X46_Y13_N4 +dffeas \RAM|mem[55][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[55][2]~126_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[55][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[55][0] .is_wysiwyg = "true"; +defparam \RAM|mem[55][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X43_Y11_N6 +cyclonev_lcell_comb \RAM|Decoder0~25 ( +// Equation(s): +// \RAM|Decoder0~25_combout = ( \ALU|adder_unit|OUT_1 [8] & ( !\ALU|Mux28~1_combout & ( (\ALU|Mux29~0_combout & (\RAM|Decoder0~1_combout & (!\ALU|Mux29~3_combout & !\ALU|Mux23~0_combout ))) ) ) ) # ( !\ALU|adder_unit|OUT_1 [8] & ( !\ALU|Mux28~1_combout +// & ( (\RAM|Decoder0~1_combout & (!\ALU|Mux29~3_combout & !\ALU|Mux23~0_combout )) ) ) ) + + .dataa(!\ALU|Mux29~0_combout ), + .datab(!\RAM|Decoder0~1_combout ), + .datac(!\ALU|Mux29~3_combout ), + .datad(!\ALU|Mux23~0_combout ), + .datae(!\ALU|adder_unit|OUT_1 [8]), + .dataf(!\ALU|Mux28~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|Decoder0~25_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|Decoder0~25 .extended_lut = "off"; +defparam \RAM|Decoder0~25 .lut_mask = 64'h3000100000000000; +defparam \RAM|Decoder0~25 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X41_Y9_N30 +cyclonev_lcell_comb \ALU|Mux31~3 ( +// Equation(s): +// \ALU|Mux31~3_combout = ( \ALU|adder_unit|COUT [0] & ( (!\ALU|Mux31~0_combout & ((!\ALU|Mux31~1_combout ) # (\ALU|OUT_1~0_combout ))) ) ) # ( !\ALU|adder_unit|COUT [0] & ( (!\ALU|Mux31~2_combout & (!\ALU|Mux31~0_combout & ((!\ALU|OUT_1~0_combout ) # +// (!\ALU|Mux31~1_combout )))) ) ) + + .dataa(!\ALU|OUT_1~0_combout ), + .datab(!\ALU|Mux31~1_combout ), + .datac(!\ALU|Mux31~2_combout ), + .datad(!\ALU|Mux31~0_combout ), + .datae(gnd), + .dataf(!\ALU|adder_unit|COUT [0]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\ALU|Mux31~3_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \ALU|Mux31~3 .extended_lut = "off"; +defparam \ALU|Mux31~3 .lut_mask = 64'hE000E000DD00DD00; +defparam \ALU|Mux31~3 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X46_Y13_N21 +cyclonev_lcell_comb \RAM|mem[63][2]~128 ( +// Equation(s): +// \RAM|mem[63][2]~128_combout = ( \RAM|Decoder0~32_combout & ( \ALU|Mux31~3_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~32_combout & ( \ALU|Mux31~3_combout & ( \rst[0]~input_o ) ) ) # ( \RAM|Decoder0~32_combout & ( !\ALU|Mux31~3_combout & +// ( ((\RAM|Decoder0~25_combout & \RAM|Decoder0~8_combout )) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~32_combout & ( !\ALU|Mux31~3_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\RAM|Decoder0~25_combout ), + .datab(gnd), + .datac(!\RAM|Decoder0~8_combout ), + .datad(!\rst[0]~input_o ), + .datae(!\RAM|Decoder0~32_combout ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[63][2]~128_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[63][2]~128 .extended_lut = "off"; +defparam \RAM|mem[63][2]~128 .lut_mask = 64'h00FF05FF00FF00FF; +defparam \RAM|mem[63][2]~128 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X46_Y13_N23 +dffeas \RAM|mem[63][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[63][2]~128_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[63][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[63][0] .is_wysiwyg = "true"; +defparam \RAM|mem[63][0] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y13_N27 +cyclonev_lcell_comb \rd[0]~40 ( +// Equation(s): +// \rd[0]~40_combout = ( \ALU|Mux28~1_combout & ( \ALU|Mux29~3_combout & ( \RAM|mem[51][0]~q ) ) ) # ( !\ALU|Mux28~1_combout & ( \ALU|Mux29~3_combout & ( \RAM|mem[59][0]~q ) ) ) # ( \ALU|Mux28~1_combout & ( !\ALU|Mux29~3_combout & ( +// \RAM|mem[55][0]~q ) ) ) # ( !\ALU|Mux28~1_combout & ( !\ALU|Mux29~3_combout & ( \RAM|mem[63][0]~q ) ) ) + + .dataa(!\RAM|mem[51][0]~q ), + .datab(!\RAM|mem[59][0]~q ), + .datac(!\RAM|mem[55][0]~q ), + .datad(!\RAM|mem[63][0]~q ), + .datae(!\ALU|Mux28~1_combout ), + .dataf(!\ALU|Mux29~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[0]~40_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[0]~40 .extended_lut = "off"; +defparam \rd[0]~40 .lut_mask = 64'h00FF0F0F33335555; +defparam \rd[0]~40 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y16_N42 +cyclonev_lcell_comb \RAM|mem[57][2]~119 ( +// Equation(s): +// \RAM|mem[57][2]~119_combout = ( \RAM|Decoder0~4_combout & ( \RAM|Decoder0~32_combout & ( ((!\ALU|Mux28~1_combout & (!\ALU|Mux27~1_combout & \ALU|Mux30~1_combout ))) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~4_combout & ( \RAM|Decoder0~32_combout +// & ( \rst[0]~input_o ) ) ) # ( \RAM|Decoder0~4_combout & ( !\RAM|Decoder0~32_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~4_combout & ( !\RAM|Decoder0~32_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\rst[0]~input_o ), + .datab(!\ALU|Mux28~1_combout ), + .datac(!\ALU|Mux27~1_combout ), + .datad(!\ALU|Mux30~1_combout ), + .datae(!\RAM|Decoder0~4_combout ), + .dataf(!\RAM|Decoder0~32_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[57][2]~119_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[57][2]~119 .extended_lut = "off"; +defparam \RAM|mem[57][2]~119 .lut_mask = 64'h55555555555555D5; +defparam \RAM|mem[57][2]~119 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X43_Y16_N4 +dffeas \RAM|mem[57][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[57][2]~119_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[57][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[57][0] .is_wysiwyg = "true"; +defparam \RAM|mem[57][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X43_Y15_N12 +cyclonev_lcell_comb \RAM|mem[49][0]~117 ( +// Equation(s): +// \RAM|mem[49][0]~117_combout = ( \ALU|Mux28~1_combout & ( \RAM|Decoder0~4_combout & ( ((\RAM|Decoder0~32_combout & (\ALU|Mux30~1_combout & !\ALU|Mux27~1_combout ))) # (\rst[0]~input_o ) ) ) ) # ( !\ALU|Mux28~1_combout & ( \RAM|Decoder0~4_combout & ( +// \rst[0]~input_o ) ) ) # ( \ALU|Mux28~1_combout & ( !\RAM|Decoder0~4_combout & ( \rst[0]~input_o ) ) ) # ( !\ALU|Mux28~1_combout & ( !\RAM|Decoder0~4_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\RAM|Decoder0~32_combout ), + .datab(!\rst[0]~input_o ), + .datac(!\ALU|Mux30~1_combout ), + .datad(!\ALU|Mux27~1_combout ), + .datae(!\ALU|Mux28~1_combout ), + .dataf(!\RAM|Decoder0~4_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[49][0]~117_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[49][0]~117 .extended_lut = "off"; +defparam \RAM|mem[49][0]~117 .lut_mask = 64'h3333333333333733; +defparam \RAM|mem[49][0]~117 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X43_Y15_N16 +dffeas \RAM|mem[49][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[49][0]~117_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[49][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[49][0] .is_wysiwyg = "true"; +defparam \RAM|mem[49][0] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X47_Y11_N33 +cyclonev_lcell_comb \RAM|mem[53][2]~118 ( +// Equation(s): +// \RAM|mem[53][2]~118_combout = ( \ALU|Mux27~1_combout & ( \RAM|Decoder0~16_combout & ( \rst[0]~input_o ) ) ) # ( !\ALU|Mux27~1_combout & ( \RAM|Decoder0~16_combout & ( ((\ALU|Mux30~1_combout & \RAM|Decoder0~32_combout )) # (\rst[0]~input_o ) ) ) ) # +// ( \ALU|Mux27~1_combout & ( !\RAM|Decoder0~16_combout & ( \rst[0]~input_o ) ) ) # ( !\ALU|Mux27~1_combout & ( !\RAM|Decoder0~16_combout & ( \rst[0]~input_o ) ) ) + + .dataa(gnd), + .datab(!\ALU|Mux30~1_combout ), + .datac(!\rst[0]~input_o ), + .datad(!\RAM|Decoder0~32_combout ), + .datae(!\ALU|Mux27~1_combout ), + .dataf(!\RAM|Decoder0~16_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[53][2]~118_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[53][2]~118 .extended_lut = "off"; +defparam \RAM|mem[53][2]~118 .lut_mask = 64'h0F0F0F0F0F3F0F0F; +defparam \RAM|mem[53][2]~118 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X46_Y13_N37 +dffeas \RAM|mem[53][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[53][2]~118_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[53][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[53][0] .is_wysiwyg = "true"; +defparam \RAM|mem[53][0] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X47_Y11_N6 +cyclonev_lcell_comb \RAM|Decoder0~20 ( +// Equation(s): +// \RAM|Decoder0~20_combout = ( !\ALU|Mux23~0_combout & ( \ALU|adder_unit|OUT_1 [8] & ( (\ALU|Mux29~0_combout & \RAM|Decoder0~1_combout ) ) ) ) # ( !\ALU|Mux23~0_combout & ( !\ALU|adder_unit|OUT_1 [8] & ( \RAM|Decoder0~1_combout ) ) ) + + .dataa(gnd), + .datab(!\ALU|Mux29~0_combout ), + .datac(!\RAM|Decoder0~1_combout ), + .datad(gnd), + .datae(!\ALU|Mux23~0_combout ), + .dataf(!\ALU|adder_unit|OUT_1 [8]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|Decoder0~20_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|Decoder0~20 .extended_lut = "off"; +defparam \RAM|Decoder0~20 .lut_mask = 64'h0F0F000003030000; +defparam \RAM|Decoder0~20 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X46_Y11_N42 +cyclonev_lcell_comb \RAM|Decoder0~34 ( +// Equation(s): +// \RAM|Decoder0~34_combout = ( \RAM|Decoder0~20_combout & ( \ALU|Mux30~1_combout & ( (!\ALU|Mux29~3_combout & (!\ALU|Mux28~1_combout & (\RAM|Decoder0~31_combout & \ALU|Mux24~1_combout ))) ) ) ) + + .dataa(!\ALU|Mux29~3_combout ), + .datab(!\ALU|Mux28~1_combout ), + .datac(!\RAM|Decoder0~31_combout ), + .datad(!\ALU|Mux24~1_combout ), + .datae(!\RAM|Decoder0~20_combout ), + .dataf(!\ALU|Mux30~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|Decoder0~34_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|Decoder0~34 .extended_lut = "off"; +defparam \RAM|Decoder0~34 .lut_mask = 64'h0000000000000008; +defparam \RAM|Decoder0~34 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X45_Y14_N54 +cyclonev_lcell_comb \RAM|Decoder0~35 ( +// Equation(s): +// \RAM|Decoder0~35_combout = ( \ALU|Mux31~0_combout & ( \ALU|adder_unit|COUT [0] & ( \RAM|Decoder0~34_combout ) ) ) # ( !\ALU|Mux31~0_combout & ( \ALU|adder_unit|COUT [0] & ( (!\ALU|OUT_1~0_combout & (\ALU|Mux31~1_combout & \RAM|Decoder0~34_combout )) +// ) ) ) # ( \ALU|Mux31~0_combout & ( !\ALU|adder_unit|COUT [0] & ( \RAM|Decoder0~34_combout ) ) ) # ( !\ALU|Mux31~0_combout & ( !\ALU|adder_unit|COUT [0] & ( (\RAM|Decoder0~34_combout & (((\ALU|OUT_1~0_combout & \ALU|Mux31~1_combout )) # +// (\ALU|Mux31~2_combout ))) ) ) ) + + .dataa(!\ALU|OUT_1~0_combout ), + .datab(!\ALU|Mux31~1_combout ), + .datac(!\RAM|Decoder0~34_combout ), + .datad(!\ALU|Mux31~2_combout ), + .datae(!\ALU|Mux31~0_combout ), + .dataf(!\ALU|adder_unit|COUT [0]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|Decoder0~35_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|Decoder0~35 .extended_lut = "off"; +defparam \RAM|Decoder0~35 .lut_mask = 64'h010F0F0F02020F0F; +defparam \RAM|Decoder0~35 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X45_Y14_N27 +cyclonev_lcell_comb \RAM|mem[61][0]~120 ( +// Equation(s): +// \RAM|mem[61][0]~120_combout = ( \RAM|Decoder0~35_combout & ( \ALU|Mux27~1_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~35_combout & ( \ALU|Mux27~1_combout & ( \rst[0]~input_o ) ) ) # ( \RAM|Decoder0~35_combout & ( !\ALU|Mux27~1_combout ) +// ) # ( !\RAM|Decoder0~35_combout & ( !\ALU|Mux27~1_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\rst[0]~input_o ), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(!\RAM|Decoder0~35_combout ), + .dataf(!\ALU|Mux27~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[61][0]~120_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[61][0]~120 .extended_lut = "off"; +defparam \RAM|mem[61][0]~120 .lut_mask = 64'h5555FFFF55555555; +defparam \RAM|mem[61][0]~120 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X45_Y14_N50 +dffeas \RAM|mem[61][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[61][0]~120_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[61][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[61][0] .is_wysiwyg = "true"; +defparam \RAM|mem[61][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X45_Y14_N48 +cyclonev_lcell_comb \rd[0]~38 ( +// Equation(s): +// \rd[0]~38_combout = ( \RAM|mem[61][0]~q & ( \ALU|Mux29~3_combout & ( (!\ALU|Mux28~1_combout & (\RAM|mem[57][0]~q )) # (\ALU|Mux28~1_combout & ((\RAM|mem[49][0]~q ))) ) ) ) # ( !\RAM|mem[61][0]~q & ( \ALU|Mux29~3_combout & ( (!\ALU|Mux28~1_combout +// & (\RAM|mem[57][0]~q )) # (\ALU|Mux28~1_combout & ((\RAM|mem[49][0]~q ))) ) ) ) # ( \RAM|mem[61][0]~q & ( !\ALU|Mux29~3_combout & ( (!\ALU|Mux28~1_combout ) # (\RAM|mem[53][0]~q ) ) ) ) # ( !\RAM|mem[61][0]~q & ( !\ALU|Mux29~3_combout & ( +// (\ALU|Mux28~1_combout & \RAM|mem[53][0]~q ) ) ) ) + + .dataa(!\RAM|mem[57][0]~q ), + .datab(!\RAM|mem[49][0]~q ), + .datac(!\ALU|Mux28~1_combout ), + .datad(!\RAM|mem[53][0]~q ), + .datae(!\RAM|mem[61][0]~q ), + .dataf(!\ALU|Mux29~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[0]~38_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[0]~38 .extended_lut = "off"; +defparam \rd[0]~38 .lut_mask = 64'h000FF0FF53535353; +defparam \rd[0]~38 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X43_Y11_N54 +cyclonev_lcell_comb \RAM|Decoder0~15 ( +// Equation(s): +// \RAM|Decoder0~15_combout = ( \ALU|OUT_1~0_combout & ( \ALU|adder_unit|COUT [0] & ( (!\ALU|Mux31~0_combout & \RAM|Decoder0~14_combout ) ) ) ) # ( !\ALU|OUT_1~0_combout & ( \ALU|adder_unit|COUT [0] & ( (!\ALU|Mux31~0_combout & (!\ALU|Mux31~1_combout & +// \RAM|Decoder0~14_combout )) ) ) ) # ( \ALU|OUT_1~0_combout & ( !\ALU|adder_unit|COUT [0] & ( (!\ALU|Mux31~0_combout & (!\ALU|Mux31~1_combout & (!\ALU|Mux31~2_combout & \RAM|Decoder0~14_combout ))) ) ) ) # ( !\ALU|OUT_1~0_combout & ( +// !\ALU|adder_unit|COUT [0] & ( (!\ALU|Mux31~0_combout & (!\ALU|Mux31~2_combout & \RAM|Decoder0~14_combout )) ) ) ) + + .dataa(!\ALU|Mux31~0_combout ), + .datab(!\ALU|Mux31~1_combout ), + .datac(!\ALU|Mux31~2_combout ), + .datad(!\RAM|Decoder0~14_combout ), + .datae(!\ALU|OUT_1~0_combout ), + .dataf(!\ALU|adder_unit|COUT [0]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|Decoder0~15_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|Decoder0~15 .extended_lut = "off"; +defparam \RAM|Decoder0~15 .lut_mask = 64'h00A00080008800AA; +defparam \RAM|Decoder0~15 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X49_Y12_N12 +cyclonev_lcell_comb \RAM|mem[54][1]~122 ( +// Equation(s): +// \RAM|mem[54][1]~122_combout = ( \ALU|Mux24~1_combout & ( \RAM|Decoder0~15_combout & ( ((\RAM|Decoder0~8_combout & (!\ALU|Mux26~1_combout & \ALU|Mux25~1_combout ))) # (\rst[0]~input_o ) ) ) ) # ( !\ALU|Mux24~1_combout & ( \RAM|Decoder0~15_combout & +// ( \rst[0]~input_o ) ) ) # ( \ALU|Mux24~1_combout & ( !\RAM|Decoder0~15_combout & ( \rst[0]~input_o ) ) ) # ( !\ALU|Mux24~1_combout & ( !\RAM|Decoder0~15_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\rst[0]~input_o ), + .datab(!\RAM|Decoder0~8_combout ), + .datac(!\ALU|Mux26~1_combout ), + .datad(!\ALU|Mux25~1_combout ), + .datae(!\ALU|Mux24~1_combout ), + .dataf(!\RAM|Decoder0~15_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[54][1]~122_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[54][1]~122 .extended_lut = "off"; +defparam \RAM|mem[54][1]~122 .lut_mask = 64'h5555555555555575; +defparam \RAM|mem[54][1]~122 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X50_Y12_N46 +dffeas \RAM|mem[54][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[54][1]~122_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[54][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[54][0] .is_wysiwyg = "true"; +defparam \RAM|mem[54][0] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y9_N30 +cyclonev_lcell_comb \RAM|Decoder0~2 ( +// Equation(s): +// \RAM|Decoder0~2_combout = ( !\ALU|Mux29~2_combout & ( \ALU|adder_unit|OUT_1 [8] & ( (!\ALU|Mux23~0_combout & (\RAM|Decoder0~1_combout & \ALU|Mux29~0_combout )) ) ) ) # ( !\ALU|Mux29~2_combout & ( !\ALU|adder_unit|OUT_1 [8] & ( (!\ALU|Mux23~0_combout +// & (\RAM|Decoder0~1_combout & ((!\ALU|adder_unit|OUT_1 [2]) # (\ALU|Mux29~0_combout )))) ) ) ) + + .dataa(!\ALU|Mux23~0_combout ), + .datab(!\RAM|Decoder0~1_combout ), + .datac(!\ALU|Mux29~0_combout ), + .datad(!\ALU|adder_unit|OUT_1 [2]), + .datae(!\ALU|Mux29~2_combout ), + .dataf(!\ALU|adder_unit|OUT_1 [8]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|Decoder0~2_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|Decoder0~2 .extended_lut = "off"; +defparam \RAM|Decoder0~2 .lut_mask = 64'h2202000002020000; +defparam \RAM|Decoder0~2 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y9_N12 +cyclonev_lcell_comb \RAM|Decoder0~3 ( +// Equation(s): +// \RAM|Decoder0~3_combout = ( \ALU|Mux31~2_combout & ( \RAM|Decoder0~2_combout & ( (\ALU|adder_unit|COUT [0] & (!\ALU|Mux31~0_combout & ((!\ALU|Mux31~1_combout ) # (\ALU|OUT_1~0_combout )))) ) ) ) # ( !\ALU|Mux31~2_combout & ( \RAM|Decoder0~2_combout +// & ( (!\ALU|Mux31~0_combout & ((!\ALU|Mux31~1_combout ) # (!\ALU|adder_unit|COUT [0] $ (\ALU|OUT_1~0_combout )))) ) ) ) + + .dataa(!\ALU|adder_unit|COUT [0]), + .datab(!\ALU|Mux31~1_combout ), + .datac(!\ALU|OUT_1~0_combout ), + .datad(!\ALU|Mux31~0_combout ), + .datae(!\ALU|Mux31~2_combout ), + .dataf(!\RAM|Decoder0~2_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|Decoder0~3_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|Decoder0~3 .extended_lut = "off"; +defparam \RAM|Decoder0~3 .lut_mask = 64'h00000000ED004500; +defparam \RAM|Decoder0~3 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X43_Y13_N36 +cyclonev_lcell_comb \RAM|Decoder0~33 ( +// Equation(s): +// \RAM|Decoder0~33_combout = ( \RAM|Decoder0~3_combout & ( (\ALU|Mux25~1_combout & (!\ALU|Mux26~1_combout & \ALU|Mux24~1_combout )) ) ) + + .dataa(!\ALU|Mux25~1_combout ), + .datab(gnd), + .datac(!\ALU|Mux26~1_combout ), + .datad(!\ALU|Mux24~1_combout ), + .datae(gnd), + .dataf(!\RAM|Decoder0~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|Decoder0~33_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|Decoder0~33 .extended_lut = "off"; +defparam \RAM|Decoder0~33 .lut_mask = 64'h0000000000500050; +defparam \RAM|Decoder0~33 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X43_Y13_N45 +cyclonev_lcell_comb \RAM|mem[50][2]~121 ( +// Equation(s): +// \RAM|mem[50][2]~121_combout = ( \RAM|Decoder0~33_combout & ( \RAM|Decoder0~8_combout & ( (\ALU|Mux28~1_combout ) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~33_combout & ( \RAM|Decoder0~8_combout & ( \rst[0]~input_o ) ) ) # ( +// \RAM|Decoder0~33_combout & ( !\RAM|Decoder0~8_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~33_combout & ( !\RAM|Decoder0~8_combout & ( \rst[0]~input_o ) ) ) + + .dataa(gnd), + .datab(!\rst[0]~input_o ), + .datac(!\ALU|Mux28~1_combout ), + .datad(gnd), + .datae(!\RAM|Decoder0~33_combout ), + .dataf(!\RAM|Decoder0~8_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[50][2]~121_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[50][2]~121 .extended_lut = "off"; +defparam \RAM|mem[50][2]~121 .lut_mask = 64'h3333333333333F3F; +defparam \RAM|mem[50][2]~121 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X46_Y12_N22 +dffeas \RAM|mem[50][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[50][2]~121_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[50][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[50][0] .is_wysiwyg = "true"; +defparam \RAM|mem[50][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X45_Y13_N21 +cyclonev_lcell_comb \RAM|mem[58][2]~123 ( +// Equation(s): +// \RAM|mem[58][2]~123_combout = ( \rst[0]~input_o & ( \RAM|Decoder0~33_combout ) ) # ( !\rst[0]~input_o & ( \RAM|Decoder0~33_combout & ( (\RAM|Decoder0~8_combout & !\ALU|Mux28~1_combout ) ) ) ) # ( \rst[0]~input_o & ( !\RAM|Decoder0~33_combout ) ) + + .dataa(gnd), + .datab(gnd), + .datac(!\RAM|Decoder0~8_combout ), + .datad(!\ALU|Mux28~1_combout ), + .datae(!\rst[0]~input_o ), + .dataf(!\RAM|Decoder0~33_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[58][2]~123_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[58][2]~123 .extended_lut = "off"; +defparam \RAM|mem[58][2]~123 .lut_mask = 64'h0000FFFF0F00FFFF; +defparam \RAM|mem[58][2]~123 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X46_Y12_N5 +dffeas \RAM|mem[58][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[58][2]~123_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[58][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[58][0] .is_wysiwyg = "true"; +defparam \RAM|mem[58][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X48_Y11_N18 +cyclonev_lcell_comb \RAM|Decoder0~26 ( +// Equation(s): +// \RAM|Decoder0~26_combout = ( \RAM|Decoder0~25_combout & ( \ALU|adder_unit|COUT [0] & ( (!\ALU|Mux31~0_combout & ((!\ALU|Mux31~1_combout ) # (\ALU|OUT_1~0_combout ))) ) ) ) # ( \RAM|Decoder0~25_combout & ( !\ALU|adder_unit|COUT [0] & ( +// (!\ALU|Mux31~2_combout & (!\ALU|Mux31~0_combout & ((!\ALU|Mux31~1_combout ) # (!\ALU|OUT_1~0_combout )))) ) ) ) + + .dataa(!\ALU|Mux31~2_combout ), + .datab(!\ALU|Mux31~1_combout ), + .datac(!\ALU|OUT_1~0_combout ), + .datad(!\ALU|Mux31~0_combout ), + .datae(!\RAM|Decoder0~25_combout ), + .dataf(!\ALU|adder_unit|COUT [0]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|Decoder0~26_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|Decoder0~26 .extended_lut = "off"; +defparam \RAM|Decoder0~26 .lut_mask = 64'h0000A8000000CF00; +defparam \RAM|Decoder0~26 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X47_Y9_N3 +cyclonev_lcell_comb \RAM|mem[62][2]~124 ( +// Equation(s): +// \RAM|mem[62][2]~124_combout = ( \RAM|Decoder0~26_combout & ( ((\RAM|Decoder0~8_combout & \RAM|Decoder0~32_combout )) # (\rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~26_combout & ( \rst[0]~input_o ) ) + + .dataa(!\RAM|Decoder0~8_combout ), + .datab(!\rst[0]~input_o ), + .datac(gnd), + .datad(!\RAM|Decoder0~32_combout ), + .datae(gnd), + .dataf(!\RAM|Decoder0~26_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[62][2]~124_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[62][2]~124 .extended_lut = "off"; +defparam \RAM|mem[62][2]~124 .lut_mask = 64'h3333333333773377; +defparam \RAM|mem[62][2]~124 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X46_Y12_N14 +dffeas \RAM|mem[62][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[62][2]~124_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[62][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[62][0] .is_wysiwyg = "true"; +defparam \RAM|mem[62][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X46_Y12_N12 +cyclonev_lcell_comb \rd[0]~39 ( +// Equation(s): +// \rd[0]~39_combout = ( \RAM|mem[62][0]~q & ( \ALU|Mux29~3_combout & ( (!\ALU|Mux28~1_combout & ((\RAM|mem[58][0]~q ))) # (\ALU|Mux28~1_combout & (\RAM|mem[50][0]~q )) ) ) ) # ( !\RAM|mem[62][0]~q & ( \ALU|Mux29~3_combout & ( (!\ALU|Mux28~1_combout +// & ((\RAM|mem[58][0]~q ))) # (\ALU|Mux28~1_combout & (\RAM|mem[50][0]~q )) ) ) ) # ( \RAM|mem[62][0]~q & ( !\ALU|Mux29~3_combout & ( (!\ALU|Mux28~1_combout ) # (\RAM|mem[54][0]~q ) ) ) ) # ( !\RAM|mem[62][0]~q & ( !\ALU|Mux29~3_combout & ( +// (\RAM|mem[54][0]~q & \ALU|Mux28~1_combout ) ) ) ) + + .dataa(!\RAM|mem[54][0]~q ), + .datab(!\RAM|mem[50][0]~q ), + .datac(!\RAM|mem[58][0]~q ), + .datad(!\ALU|Mux28~1_combout ), + .datae(!\RAM|mem[62][0]~q ), + .dataf(!\ALU|Mux29~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[0]~39_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[0]~39 .extended_lut = "off"; +defparam \rd[0]~39 .lut_mask = 64'h0055FF550F330F33; +defparam \rd[0]~39 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X45_Y12_N42 +cyclonev_lcell_comb \RAM|mem[56][0]~feeder ( +// Equation(s): +// \RAM|mem[56][0]~feeder_combout = ( \RAM|mem~0_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[56][0]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[56][0]~feeder .extended_lut = "off"; +defparam \RAM|mem[56][0]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[56][0]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X51_Y11_N24 +cyclonev_lcell_comb \RAM|Decoder0~19 ( +// Equation(s): +// \RAM|Decoder0~19_combout = ( \ALU|Mux30~1_combout & ( !\ALU|Mux27~1_combout & ( !\ALU|Mux28~1_combout ) ) ) + + .dataa(gnd), + .datab(gnd), + .datac(!\ALU|Mux28~1_combout ), + .datad(gnd), + .datae(!\ALU|Mux30~1_combout ), + .dataf(!\ALU|Mux27~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|Decoder0~19_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|Decoder0~19 .extended_lut = "off"; +defparam \RAM|Decoder0~19 .lut_mask = 64'h0000F0F000000000; +defparam \RAM|Decoder0~19 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X45_Y12_N30 +cyclonev_lcell_comb \RAM|mem[56][4]~115 ( +// Equation(s): +// \RAM|mem[56][4]~115_combout = ( \RAM|Decoder0~3_combout & ( \RAM|Decoder0~19_combout & ( ((!\ALU|Mux26~1_combout & (\ALU|Mux24~1_combout & \ALU|Mux25~1_combout ))) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~3_combout & ( \RAM|Decoder0~19_combout +// & ( \rst[0]~input_o ) ) ) # ( \RAM|Decoder0~3_combout & ( !\RAM|Decoder0~19_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~3_combout & ( !\RAM|Decoder0~19_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\ALU|Mux26~1_combout ), + .datab(!\ALU|Mux24~1_combout ), + .datac(!\ALU|Mux25~1_combout ), + .datad(!\rst[0]~input_o ), + .datae(!\RAM|Decoder0~3_combout ), + .dataf(!\RAM|Decoder0~19_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[56][4]~115_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[56][4]~115 .extended_lut = "off"; +defparam \RAM|mem[56][4]~115 .lut_mask = 64'h00FF00FF00FF02FF; +defparam \RAM|mem[56][4]~115 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X45_Y12_N43 +dffeas \RAM|mem[56][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[56][0]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[56][4]~115_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[56][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[56][0] .is_wysiwyg = "true"; +defparam \RAM|mem[56][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X48_Y12_N0 +cyclonev_lcell_comb \RAM|mem[52][0]~114 ( +// Equation(s): +// \RAM|mem[52][0]~114_combout = ( \ALU|Mux24~1_combout & ( \RAM|Decoder0~15_combout & ( ((\ALU|Mux30~1_combout & (!\ALU|Mux27~1_combout & \RAM|Decoder0~31_combout ))) # (\rst[0]~input_o ) ) ) ) # ( !\ALU|Mux24~1_combout & ( \RAM|Decoder0~15_combout & +// ( \rst[0]~input_o ) ) ) # ( \ALU|Mux24~1_combout & ( !\RAM|Decoder0~15_combout & ( \rst[0]~input_o ) ) ) # ( !\ALU|Mux24~1_combout & ( !\RAM|Decoder0~15_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\rst[0]~input_o ), + .datab(!\ALU|Mux30~1_combout ), + .datac(!\ALU|Mux27~1_combout ), + .datad(!\RAM|Decoder0~31_combout ), + .datae(!\ALU|Mux24~1_combout ), + .dataf(!\RAM|Decoder0~15_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[52][0]~114_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[52][0]~114 .extended_lut = "off"; +defparam \RAM|mem[52][0]~114 .lut_mask = 64'h5555555555555575; +defparam \RAM|mem[52][0]~114 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X46_Y15_N32 +dffeas \RAM|mem[52][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[52][0]~114_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[52][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[52][0] .is_wysiwyg = "true"; +defparam \RAM|mem[52][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X49_Y7_N21 +cyclonev_lcell_comb \RAM|Decoder0~12 ( +// Equation(s): +// \RAM|Decoder0~12_combout = ( \ALU|Mux30~1_combout & ( \ALU|Mux28~1_combout & ( !\ALU|Mux27~1_combout ) ) ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(!\ALU|Mux27~1_combout ), + .datae(!\ALU|Mux30~1_combout ), + .dataf(!\ALU|Mux28~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|Decoder0~12_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|Decoder0~12 .extended_lut = "off"; +defparam \RAM|Decoder0~12 .lut_mask = 64'h000000000000FF00; +defparam \RAM|Decoder0~12 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X50_Y14_N54 +cyclonev_lcell_comb \RAM|mem[48][2]~113 ( +// Equation(s): +// \RAM|mem[48][2]~113_combout = ( \ALU|Mux25~1_combout & ( \RAM|Decoder0~3_combout & ( ((!\ALU|Mux26~1_combout & (\RAM|Decoder0~12_combout & \ALU|Mux24~1_combout ))) # (\rst[0]~input_o ) ) ) ) # ( !\ALU|Mux25~1_combout & ( \RAM|Decoder0~3_combout & ( +// \rst[0]~input_o ) ) ) # ( \ALU|Mux25~1_combout & ( !\RAM|Decoder0~3_combout & ( \rst[0]~input_o ) ) ) # ( !\ALU|Mux25~1_combout & ( !\RAM|Decoder0~3_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\ALU|Mux26~1_combout ), + .datab(!\rst[0]~input_o ), + .datac(!\RAM|Decoder0~12_combout ), + .datad(!\ALU|Mux24~1_combout ), + .datae(!\ALU|Mux25~1_combout ), + .dataf(!\RAM|Decoder0~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[48][2]~113_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[48][2]~113 .extended_lut = "off"; +defparam \RAM|mem[48][2]~113 .lut_mask = 64'h333333333333333B; +defparam \RAM|mem[48][2]~113 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X50_Y14_N37 +dffeas \RAM|mem[48][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[48][2]~113_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[48][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[48][0] .is_wysiwyg = "true"; +defparam \RAM|mem[48][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X41_Y9_N33 +cyclonev_lcell_comb \RAM|Decoder0~7 ( +// Equation(s): +// \RAM|Decoder0~7_combout = ( \ALU|Mux30~1_combout & ( !\ALU|Mux27~1_combout ) ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(!\ALU|Mux27~1_combout ), + .datae(gnd), + .dataf(!\ALU|Mux30~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|Decoder0~7_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|Decoder0~7 .extended_lut = "off"; +defparam \RAM|Decoder0~7 .lut_mask = 64'h00000000FF00FF00; +defparam \RAM|Decoder0~7 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X46_Y15_N3 +cyclonev_lcell_comb \RAM|mem[60][4]~116 ( +// Equation(s): +// \RAM|mem[60][4]~116_combout = ( \RAM|Decoder0~32_combout & ( \RAM|Decoder0~26_combout & ( (\RAM|Decoder0~7_combout ) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~32_combout & ( \RAM|Decoder0~26_combout & ( \rst[0]~input_o ) ) ) # ( +// \RAM|Decoder0~32_combout & ( !\RAM|Decoder0~26_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~32_combout & ( !\RAM|Decoder0~26_combout & ( \rst[0]~input_o ) ) ) + + .dataa(gnd), + .datab(gnd), + .datac(!\rst[0]~input_o ), + .datad(!\RAM|Decoder0~7_combout ), + .datae(!\RAM|Decoder0~32_combout ), + .dataf(!\RAM|Decoder0~26_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[60][4]~116_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[60][4]~116 .extended_lut = "off"; +defparam \RAM|mem[60][4]~116 .lut_mask = 64'h0F0F0F0F0F0F0FFF; +defparam \RAM|mem[60][4]~116 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X46_Y15_N26 +dffeas \RAM|mem[60][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[60][4]~116_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[60][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[60][0] .is_wysiwyg = "true"; +defparam \RAM|mem[60][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X46_Y15_N24 +cyclonev_lcell_comb \rd[0]~37 ( +// Equation(s): +// \rd[0]~37_combout = ( \RAM|mem[60][0]~q & ( \ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout & (\RAM|mem[52][0]~q )) # (\ALU|Mux29~3_combout & ((\RAM|mem[48][0]~q ))) ) ) ) # ( !\RAM|mem[60][0]~q & ( \ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout +// & (\RAM|mem[52][0]~q )) # (\ALU|Mux29~3_combout & ((\RAM|mem[48][0]~q ))) ) ) ) # ( \RAM|mem[60][0]~q & ( !\ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout ) # (\RAM|mem[56][0]~q ) ) ) ) # ( !\RAM|mem[60][0]~q & ( !\ALU|Mux28~1_combout & ( +// (\RAM|mem[56][0]~q & \ALU|Mux29~3_combout ) ) ) ) + + .dataa(!\RAM|mem[56][0]~q ), + .datab(!\RAM|mem[52][0]~q ), + .datac(!\ALU|Mux29~3_combout ), + .datad(!\RAM|mem[48][0]~q ), + .datae(!\RAM|mem[60][0]~q ), + .dataf(!\ALU|Mux28~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[0]~37_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[0]~37 .extended_lut = "off"; +defparam \rd[0]~37 .lut_mask = 64'h0505F5F5303F303F; +defparam \rd[0]~37 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X41_Y10_N18 +cyclonev_lcell_comb \rd[0]~41 ( +// Equation(s): +// \rd[0]~41_combout = ( \rd[0]~37_combout & ( \ALU|Mux31~3_combout & ( (\ALU|Mux30~1_combout ) # (\rd[0]~39_combout ) ) ) ) # ( !\rd[0]~37_combout & ( \ALU|Mux31~3_combout & ( (\rd[0]~39_combout & !\ALU|Mux30~1_combout ) ) ) ) # ( \rd[0]~37_combout & +// ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & (\rd[0]~40_combout )) # (\ALU|Mux30~1_combout & ((\rd[0]~38_combout ))) ) ) ) # ( !\rd[0]~37_combout & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & (\rd[0]~40_combout )) # +// (\ALU|Mux30~1_combout & ((\rd[0]~38_combout ))) ) ) ) + + .dataa(!\rd[0]~40_combout ), + .datab(!\rd[0]~38_combout ), + .datac(!\rd[0]~39_combout ), + .datad(!\ALU|Mux30~1_combout ), + .datae(!\rd[0]~37_combout ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[0]~41_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[0]~41 .extended_lut = "off"; +defparam \rd[0]~41 .lut_mask = 64'h553355330F000FFF; +defparam \rd[0]~41 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X41_Y11_N54 +cyclonev_lcell_comb \pc_we[0]~1 ( +// Equation(s): +// \pc_we[0]~1_combout = ( \ALU|adder_unit|OUT_1 [7] & ( \ALU|Mux26~1_combout & ( (!\ALU|Mux24~0_combout & (\ALU|Mux29~0_combout & !\ALU|Mux25~0_combout )) ) ) ) # ( !\ALU|adder_unit|OUT_1 [7] & ( \ALU|Mux26~1_combout & ( (!\ALU|Mux24~0_combout & +// (!\ALU|Mux25~0_combout & ((!\ALU|adder_unit|OUT_1 [6]) # (\ALU|Mux29~0_combout )))) ) ) ) + + .dataa(!\ALU|Mux24~0_combout ), + .datab(!\ALU|Mux29~0_combout ), + .datac(!\ALU|Mux25~0_combout ), + .datad(!\ALU|adder_unit|OUT_1 [6]), + .datae(!\ALU|adder_unit|OUT_1 [7]), + .dataf(!\ALU|Mux26~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\pc_we[0]~1_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \pc_we[0]~1 .extended_lut = "off"; +defparam \pc_we[0]~1 .lut_mask = 64'h00000000A0202020; +defparam \pc_we[0]~1 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X56_Y8_N51 +cyclonev_lcell_comb \RAM|mem[24][3]~83 ( +// Equation(s): +// \RAM|mem[24][3]~83_combout = ( \RAM|Decoder0~3_combout & ( ((\RAM|Decoder0~7_combout & (!\ALU|Mux28~1_combout & \pc_we[0]~1_combout ))) # (\rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~3_combout & ( \rst[0]~input_o ) ) + + .dataa(!\RAM|Decoder0~7_combout ), + .datab(!\rst[0]~input_o ), + .datac(!\ALU|Mux28~1_combout ), + .datad(!\pc_we[0]~1_combout ), + .datae(gnd), + .dataf(!\RAM|Decoder0~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[24][3]~83_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[24][3]~83 .extended_lut = "off"; +defparam \RAM|mem[24][3]~83 .lut_mask = 64'h3333333333733373; +defparam \RAM|mem[24][3]~83 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X56_Y8_N52 +dffeas \RAM|mem[24][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[24][3]~83_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[24][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[24][0] .is_wysiwyg = "true"; +defparam \RAM|mem[24][0] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y11_N36 +cyclonev_lcell_comb \RAM|mem[16][4]~81 ( +// Equation(s): +// \RAM|mem[16][4]~81_combout = ( \pc_we[0]~1_combout & ( \RAM|Decoder0~3_combout & ( ((\ALU|Mux28~1_combout & \RAM|Decoder0~7_combout )) # (\rst[0]~input_o ) ) ) ) # ( !\pc_we[0]~1_combout & ( \RAM|Decoder0~3_combout & ( \rst[0]~input_o ) ) ) # ( +// \pc_we[0]~1_combout & ( !\RAM|Decoder0~3_combout & ( \rst[0]~input_o ) ) ) # ( !\pc_we[0]~1_combout & ( !\RAM|Decoder0~3_combout & ( \rst[0]~input_o ) ) ) + + .dataa(gnd), + .datab(!\rst[0]~input_o ), + .datac(!\ALU|Mux28~1_combout ), + .datad(!\RAM|Decoder0~7_combout ), + .datae(!\pc_we[0]~1_combout ), + .dataf(!\RAM|Decoder0~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[16][4]~81_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[16][4]~81 .extended_lut = "off"; +defparam \RAM|mem[16][4]~81 .lut_mask = 64'h333333333333333F; +defparam \RAM|mem[16][4]~81 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X42_Y11_N38 +dffeas \RAM|mem[16][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[16][4]~81_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[16][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[16][0] .is_wysiwyg = "true"; +defparam \RAM|mem[16][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X46_Y15_N36 +cyclonev_lcell_comb \RAM|mem[28][0]~84 ( +// Equation(s): +// \RAM|mem[28][0]~84_combout = ( \RAM|Decoder0~26_combout & ( ((\pc_we[0]~1_combout & \RAM|Decoder0~7_combout )) # (\rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~26_combout & ( \rst[0]~input_o ) ) + + .dataa(!\pc_we[0]~1_combout ), + .datab(!\rst[0]~input_o ), + .datac(!\RAM|Decoder0~7_combout ), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|Decoder0~26_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[28][0]~84_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[28][0]~84 .extended_lut = "off"; +defparam \RAM|mem[28][0]~84 .lut_mask = 64'h3333333337373737; +defparam \RAM|mem[28][0]~84 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X46_Y15_N40 +dffeas \RAM|mem[28][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[28][0]~84_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[28][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[28][0] .is_wysiwyg = "true"; +defparam \RAM|mem[28][0] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X50_Y11_N54 +cyclonev_lcell_comb \RAM|Decoder0~29 ( +// Equation(s): +// \RAM|Decoder0~29_combout = ( \ALU|adder_unit|OUT_1 [6] & ( (\ALU|Mux29~0_combout & (!\ALU|Mux26~0_combout & !\ALU|Mux25~0_combout )) ) ) # ( !\ALU|adder_unit|OUT_1 [6] & ( (!\ALU|Mux26~0_combout & (!\ALU|Mux25~0_combout & ((!\ALU|adder_unit|OUT_1 +// [5]) # (\ALU|Mux29~0_combout )))) ) ) + + .dataa(!\ALU|Mux29~0_combout ), + .datab(!\ALU|Mux26~0_combout ), + .datac(!\ALU|adder_unit|OUT_1 [5]), + .datad(!\ALU|Mux25~0_combout ), + .datae(gnd), + .dataf(!\ALU|adder_unit|OUT_1 [6]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|Decoder0~29_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|Decoder0~29 .extended_lut = "off"; +defparam \RAM|Decoder0~29 .lut_mask = 64'hC400C40044004400; +defparam \RAM|Decoder0~29 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X50_Y11_N18 +cyclonev_lcell_comb \RAM|mem[20][4]~82 ( +// Equation(s): +// \RAM|mem[20][4]~82_combout = ( \ALU|Mux24~1_combout & ( \RAM|Decoder0~15_combout & ( ((\ALU|Mux30~1_combout & (\RAM|Decoder0~29_combout & !\ALU|Mux27~1_combout ))) # (\rst[0]~input_o ) ) ) ) # ( !\ALU|Mux24~1_combout & ( \RAM|Decoder0~15_combout & +// ( \rst[0]~input_o ) ) ) # ( \ALU|Mux24~1_combout & ( !\RAM|Decoder0~15_combout & ( \rst[0]~input_o ) ) ) # ( !\ALU|Mux24~1_combout & ( !\RAM|Decoder0~15_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\rst[0]~input_o ), + .datab(!\ALU|Mux30~1_combout ), + .datac(!\RAM|Decoder0~29_combout ), + .datad(!\ALU|Mux27~1_combout ), + .datae(!\ALU|Mux24~1_combout ), + .dataf(!\RAM|Decoder0~15_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[20][4]~82_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[20][4]~82 .extended_lut = "off"; +defparam \RAM|mem[20][4]~82 .lut_mask = 64'h5555555555555755; +defparam \RAM|mem[20][4]~82 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X47_Y12_N8 +dffeas \RAM|mem[20][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[20][4]~82_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[20][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[20][0] .is_wysiwyg = "true"; +defparam \RAM|mem[20][0] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X47_Y12_N6 +cyclonev_lcell_comb \rd[0]~27 ( +// Equation(s): +// \rd[0]~27_combout = ( \RAM|mem[20][0]~q & ( \ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout ) # (\RAM|mem[16][0]~q ) ) ) ) # ( !\RAM|mem[20][0]~q & ( \ALU|Mux28~1_combout & ( (\ALU|Mux29~3_combout & \RAM|mem[16][0]~q ) ) ) ) # ( \RAM|mem[20][0]~q & +// ( !\ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout & ((\RAM|mem[28][0]~q ))) # (\ALU|Mux29~3_combout & (\RAM|mem[24][0]~q )) ) ) ) # ( !\RAM|mem[20][0]~q & ( !\ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout & ((\RAM|mem[28][0]~q ))) # +// (\ALU|Mux29~3_combout & (\RAM|mem[24][0]~q )) ) ) ) + + .dataa(!\RAM|mem[24][0]~q ), + .datab(!\ALU|Mux29~3_combout ), + .datac(!\RAM|mem[16][0]~q ), + .datad(!\RAM|mem[28][0]~q ), + .datae(!\RAM|mem[20][0]~q ), + .dataf(!\ALU|Mux28~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[0]~27_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[0]~27 .extended_lut = "off"; +defparam \rd[0]~27 .lut_mask = 64'h11DD11DD0303CFCF; +defparam \rd[0]~27 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X49_Y14_N48 +cyclonev_lcell_comb \RAM|mem[22][0]~feeder ( +// Equation(s): +// \RAM|mem[22][0]~feeder_combout = ( \RAM|mem~0_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[22][0]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[22][0]~feeder .extended_lut = "off"; +defparam \RAM|mem[22][0]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[22][0]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X48_Y7_N12 +cyclonev_lcell_comb \RAM|Decoder0~30 ( +// Equation(s): +// \RAM|Decoder0~30_combout = ( \ALU|Mux26~1_combout & ( (!\ALU|Mux30~1_combout & !\ALU|Mux27~1_combout ) ) ) + + .dataa(gnd), + .datab(gnd), + .datac(!\ALU|Mux30~1_combout ), + .datad(!\ALU|Mux27~1_combout ), + .datae(gnd), + .dataf(!\ALU|Mux26~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|Decoder0~30_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|Decoder0~30 .extended_lut = "off"; +defparam \RAM|Decoder0~30 .lut_mask = 64'h00000000F000F000; +defparam \RAM|Decoder0~30 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X49_Y7_N39 +cyclonev_lcell_comb \RAM|mem[22][2]~90 ( +// Equation(s): +// \RAM|mem[22][2]~90_combout = ( \RAM|Decoder0~30_combout & ( \RAM|Decoder0~15_combout & ( ((\ALU|Mux24~1_combout & \ALU|Mux25~1_combout )) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~30_combout & ( \RAM|Decoder0~15_combout & ( \rst[0]~input_o ) ) +// ) # ( \RAM|Decoder0~30_combout & ( !\RAM|Decoder0~15_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~30_combout & ( !\RAM|Decoder0~15_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\ALU|Mux24~1_combout ), + .datab(gnd), + .datac(!\ALU|Mux25~1_combout ), + .datad(!\rst[0]~input_o ), + .datae(!\RAM|Decoder0~30_combout ), + .dataf(!\RAM|Decoder0~15_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[22][2]~90_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[22][2]~90 .extended_lut = "off"; +defparam \RAM|mem[22][2]~90 .lut_mask = 64'h00FF00FF00FF05FF; +defparam \RAM|mem[22][2]~90 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X49_Y14_N49 +dffeas \RAM|mem[22][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[22][0]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[22][2]~90_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[22][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[22][0] .is_wysiwyg = "true"; +defparam \RAM|mem[22][0] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X47_Y14_N12 +cyclonev_lcell_comb \RAM|mem[26][0]~feeder ( +// Equation(s): +// \RAM|mem[26][0]~feeder_combout = ( \RAM|mem~0_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[26][0]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[26][0]~feeder .extended_lut = "off"; +defparam \RAM|mem[26][0]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[26][0]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X46_Y13_N12 +cyclonev_lcell_comb \RAM|mem[26][4]~91 ( +// Equation(s): +// \RAM|mem[26][4]~91_combout = ( \RAM|Decoder0~8_combout & ( \RAM|Decoder0~3_combout & ( ((\pc_we[0]~1_combout & !\ALU|Mux28~1_combout )) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~8_combout & ( \RAM|Decoder0~3_combout & ( \rst[0]~input_o ) ) ) # +// ( \RAM|Decoder0~8_combout & ( !\RAM|Decoder0~3_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~8_combout & ( !\RAM|Decoder0~3_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\pc_we[0]~1_combout ), + .datab(!\ALU|Mux28~1_combout ), + .datac(!\rst[0]~input_o ), + .datad(gnd), + .datae(!\RAM|Decoder0~8_combout ), + .dataf(!\RAM|Decoder0~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[26][4]~91_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[26][4]~91 .extended_lut = "off"; +defparam \RAM|mem[26][4]~91 .lut_mask = 64'h0F0F0F0F0F0F4F4F; +defparam \RAM|mem[26][4]~91 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X47_Y14_N14 +dffeas \RAM|mem[26][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[26][0]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[26][4]~91_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[26][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[26][0] .is_wysiwyg = "true"; +defparam \RAM|mem[26][0] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y11_N42 +cyclonev_lcell_comb \RAM|mem[18][0]~89 ( +// Equation(s): +// \RAM|mem[18][0]~89_combout = ( \ALU|Mux28~1_combout & ( \RAM|Decoder0~3_combout & ( ((\pc_we[0]~1_combout & \RAM|Decoder0~8_combout )) # (\rst[0]~input_o ) ) ) ) # ( !\ALU|Mux28~1_combout & ( \RAM|Decoder0~3_combout & ( \rst[0]~input_o ) ) ) # ( +// \ALU|Mux28~1_combout & ( !\RAM|Decoder0~3_combout & ( \rst[0]~input_o ) ) ) # ( !\ALU|Mux28~1_combout & ( !\RAM|Decoder0~3_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\rst[0]~input_o ), + .datab(gnd), + .datac(!\pc_we[0]~1_combout ), + .datad(!\RAM|Decoder0~8_combout ), + .datae(!\ALU|Mux28~1_combout ), + .dataf(!\RAM|Decoder0~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[18][0]~89_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[18][0]~89 .extended_lut = "off"; +defparam \RAM|mem[18][0]~89 .lut_mask = 64'h555555555555555F; +defparam \RAM|mem[18][0]~89 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X42_Y16_N10 +dffeas \RAM|mem[18][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[18][0]~89_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[18][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[18][0] .is_wysiwyg = "true"; +defparam \RAM|mem[18][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X48_Y11_N30 +cyclonev_lcell_comb \RAM|mem[30][3]~92 ( +// Equation(s): +// \RAM|mem[30][3]~92_combout = ( \RAM|Decoder0~26_combout & ( ((\RAM|Decoder0~8_combout & \pc_we[0]~1_combout )) # (\rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~26_combout & ( \rst[0]~input_o ) ) + + .dataa(!\RAM|Decoder0~8_combout ), + .datab(gnd), + .datac(!\rst[0]~input_o ), + .datad(!\pc_we[0]~1_combout ), + .datae(gnd), + .dataf(!\RAM|Decoder0~26_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[30][3]~92_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[30][3]~92 .extended_lut = "off"; +defparam \RAM|mem[30][3]~92 .lut_mask = 64'h0F0F0F0F0F5F0F5F; +defparam \RAM|mem[30][3]~92 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X47_Y14_N20 +dffeas \RAM|mem[30][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[30][3]~92_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[30][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[30][0] .is_wysiwyg = "true"; +defparam \RAM|mem[30][0] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X47_Y14_N18 +cyclonev_lcell_comb \rd[0]~29 ( +// Equation(s): +// \rd[0]~29_combout = ( \RAM|mem[30][0]~q & ( \ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout & (\RAM|mem[22][0]~q )) # (\ALU|Mux29~3_combout & ((\RAM|mem[18][0]~q ))) ) ) ) # ( !\RAM|mem[30][0]~q & ( \ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout +// & (\RAM|mem[22][0]~q )) # (\ALU|Mux29~3_combout & ((\RAM|mem[18][0]~q ))) ) ) ) # ( \RAM|mem[30][0]~q & ( !\ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout ) # (\RAM|mem[26][0]~q ) ) ) ) # ( !\RAM|mem[30][0]~q & ( !\ALU|Mux28~1_combout & ( +// (\RAM|mem[26][0]~q & \ALU|Mux29~3_combout ) ) ) ) + + .dataa(!\RAM|mem[22][0]~q ), + .datab(!\RAM|mem[26][0]~q ), + .datac(!\ALU|Mux29~3_combout ), + .datad(!\RAM|mem[18][0]~q ), + .datae(!\RAM|mem[30][0]~q ), + .dataf(!\ALU|Mux28~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[0]~29_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[0]~29 .extended_lut = "off"; +defparam \rd[0]~29 .lut_mask = 64'h0303F3F3505F505F; +defparam \rd[0]~29 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X41_Y13_N27 +cyclonev_lcell_comb \RAM|mem[31][0]~feeder ( +// Equation(s): +// \RAM|mem[31][0]~feeder_combout = ( \RAM|mem~0_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[31][0]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[31][0]~feeder .extended_lut = "off"; +defparam \RAM|mem[31][0]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[31][0]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y13_N18 +cyclonev_lcell_comb \RAM|mem[31][2]~96 ( +// Equation(s): +// \RAM|mem[31][2]~96_combout = ( \ALU|Mux31~3_combout & ( \rst[0]~input_o ) ) # ( !\ALU|Mux31~3_combout & ( ((\RAM|Decoder0~8_combout & (\pc_we[0]~1_combout & \RAM|Decoder0~25_combout ))) # (\rst[0]~input_o ) ) ) + + .dataa(!\rst[0]~input_o ), + .datab(!\RAM|Decoder0~8_combout ), + .datac(!\pc_we[0]~1_combout ), + .datad(!\RAM|Decoder0~25_combout ), + .datae(gnd), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[31][2]~96_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[31][2]~96 .extended_lut = "off"; +defparam \RAM|mem[31][2]~96 .lut_mask = 64'h5557555755555555; +defparam \RAM|mem[31][2]~96 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X41_Y13_N28 +dffeas \RAM|mem[31][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[31][0]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[31][2]~96_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[31][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[31][0] .is_wysiwyg = "true"; +defparam \RAM|mem[31][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X43_Y14_N51 +cyclonev_lcell_comb \RAM|mem[23][0]~94 ( +// Equation(s): +// \RAM|mem[23][0]~94_combout = ( \RAM|Decoder0~16_combout & ( \pc_we[0]~1_combout & ( (\RAM|Decoder0~8_combout ) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~16_combout & ( \pc_we[0]~1_combout & ( \rst[0]~input_o ) ) ) # ( \RAM|Decoder0~16_combout & +// ( !\pc_we[0]~1_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~16_combout & ( !\pc_we[0]~1_combout & ( \rst[0]~input_o ) ) ) + + .dataa(gnd), + .datab(gnd), + .datac(!\rst[0]~input_o ), + .datad(!\RAM|Decoder0~8_combout ), + .datae(!\RAM|Decoder0~16_combout ), + .dataf(!\pc_we[0]~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[23][0]~94_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[23][0]~94 .extended_lut = "off"; +defparam \RAM|mem[23][0]~94 .lut_mask = 64'h0F0F0F0F0F0F0FFF; +defparam \RAM|mem[23][0]~94 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X43_Y14_N52 +dffeas \RAM|mem[23][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[23][0]~94_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[23][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[23][0] .is_wysiwyg = "true"; +defparam \RAM|mem[23][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X41_Y13_N12 +cyclonev_lcell_comb \RAM|mem[27][1]~95 ( +// Equation(s): +// \RAM|mem[27][1]~95_combout = ( \pc_we[0]~1_combout & ( \RAM|Decoder0~4_combout & ( ((!\ALU|Mux28~1_combout & \RAM|Decoder0~8_combout )) # (\rst[0]~input_o ) ) ) ) # ( !\pc_we[0]~1_combout & ( \RAM|Decoder0~4_combout & ( \rst[0]~input_o ) ) ) # ( +// \pc_we[0]~1_combout & ( !\RAM|Decoder0~4_combout & ( \rst[0]~input_o ) ) ) # ( !\pc_we[0]~1_combout & ( !\RAM|Decoder0~4_combout & ( \rst[0]~input_o ) ) ) + + .dataa(gnd), + .datab(!\ALU|Mux28~1_combout ), + .datac(!\rst[0]~input_o ), + .datad(!\RAM|Decoder0~8_combout ), + .datae(!\pc_we[0]~1_combout ), + .dataf(!\RAM|Decoder0~4_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[27][1]~95_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[27][1]~95 .extended_lut = "off"; +defparam \RAM|mem[27][1]~95 .lut_mask = 64'h0F0F0F0F0F0F0FCF; +defparam \RAM|mem[27][1]~95 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X41_Y13_N13 +dffeas \RAM|mem[27][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[27][1]~95_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[27][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[27][0] .is_wysiwyg = "true"; +defparam \RAM|mem[27][0] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y14_N24 +cyclonev_lcell_comb \RAM|mem[19][3]~93 ( +// Equation(s): +// \RAM|mem[19][3]~93_combout = ( \RAM|Decoder0~8_combout & ( \RAM|Decoder0~4_combout & ( ((\ALU|Mux28~1_combout & \pc_we[0]~1_combout )) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~8_combout & ( \RAM|Decoder0~4_combout & ( \rst[0]~input_o ) ) ) # ( +// \RAM|Decoder0~8_combout & ( !\RAM|Decoder0~4_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~8_combout & ( !\RAM|Decoder0~4_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\rst[0]~input_o ), + .datab(!\ALU|Mux28~1_combout ), + .datac(!\pc_we[0]~1_combout ), + .datad(gnd), + .datae(!\RAM|Decoder0~8_combout ), + .dataf(!\RAM|Decoder0~4_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[19][3]~93_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[19][3]~93 .extended_lut = "off"; +defparam \RAM|mem[19][3]~93 .lut_mask = 64'h5555555555555757; +defparam \RAM|mem[19][3]~93 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X42_Y16_N31 +dffeas \RAM|mem[19][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[19][3]~93_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[19][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[19][0] .is_wysiwyg = "true"; +defparam \RAM|mem[19][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X46_Y13_N39 +cyclonev_lcell_comb \rd[0]~30 ( +// Equation(s): +// \rd[0]~30_combout = ( \ALU|Mux29~3_combout & ( \ALU|Mux28~1_combout & ( \RAM|mem[19][0]~q ) ) ) # ( !\ALU|Mux29~3_combout & ( \ALU|Mux28~1_combout & ( \RAM|mem[23][0]~q ) ) ) # ( \ALU|Mux29~3_combout & ( !\ALU|Mux28~1_combout & ( +// \RAM|mem[27][0]~q ) ) ) # ( !\ALU|Mux29~3_combout & ( !\ALU|Mux28~1_combout & ( \RAM|mem[31][0]~q ) ) ) + + .dataa(!\RAM|mem[31][0]~q ), + .datab(!\RAM|mem[23][0]~q ), + .datac(!\RAM|mem[27][0]~q ), + .datad(!\RAM|mem[19][0]~q ), + .datae(!\ALU|Mux29~3_combout ), + .dataf(!\ALU|Mux28~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[0]~30_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[0]~30 .extended_lut = "off"; +defparam \rd[0]~30 .lut_mask = 64'h55550F0F333300FF; +defparam \rd[0]~30 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y15_N15 +cyclonev_lcell_comb \RAM|mem[21][3]~86 ( +// Equation(s): +// \RAM|mem[21][3]~86_combout = ( \ALU|Mux27~1_combout & ( \RAM|Decoder0~16_combout & ( \rst[0]~input_o ) ) ) # ( !\ALU|Mux27~1_combout & ( \RAM|Decoder0~16_combout & ( ((\ALU|Mux30~1_combout & \pc_we[0]~1_combout )) # (\rst[0]~input_o ) ) ) ) # ( +// \ALU|Mux27~1_combout & ( !\RAM|Decoder0~16_combout & ( \rst[0]~input_o ) ) ) # ( !\ALU|Mux27~1_combout & ( !\RAM|Decoder0~16_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\ALU|Mux30~1_combout ), + .datab(gnd), + .datac(!\rst[0]~input_o ), + .datad(!\pc_we[0]~1_combout ), + .datae(!\ALU|Mux27~1_combout ), + .dataf(!\RAM|Decoder0~16_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[21][3]~86_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[21][3]~86 .extended_lut = "off"; +defparam \RAM|mem[21][3]~86 .lut_mask = 64'h0F0F0F0F0F5F0F0F; +defparam \RAM|mem[21][3]~86 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X42_Y15_N17 +dffeas \RAM|mem[21][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[21][3]~86_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[21][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[21][0] .is_wysiwyg = "true"; +defparam \RAM|mem[21][0] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y15_N39 +cyclonev_lcell_comb \RAM|mem[29][2]~88 ( +// Equation(s): +// \RAM|mem[29][2]~88_combout = ( \pc_we[0]~1_combout & ( \ALU|Mux31~3_combout & ( \rst[0]~input_o ) ) ) # ( !\pc_we[0]~1_combout & ( \ALU|Mux31~3_combout & ( \rst[0]~input_o ) ) ) # ( \pc_we[0]~1_combout & ( !\ALU|Mux31~3_combout & ( +// ((\RAM|Decoder0~7_combout & \RAM|Decoder0~25_combout )) # (\rst[0]~input_o ) ) ) ) # ( !\pc_we[0]~1_combout & ( !\ALU|Mux31~3_combout & ( \rst[0]~input_o ) ) ) + + .dataa(gnd), + .datab(!\rst[0]~input_o ), + .datac(!\RAM|Decoder0~7_combout ), + .datad(!\RAM|Decoder0~25_combout ), + .datae(!\pc_we[0]~1_combout ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[29][2]~88_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[29][2]~88 .extended_lut = "off"; +defparam \RAM|mem[29][2]~88 .lut_mask = 64'h3333333F33333333; +defparam \RAM|mem[29][2]~88 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X48_Y15_N31 +dffeas \RAM|mem[29][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[29][2]~88_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[29][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[29][0] .is_wysiwyg = "true"; +defparam \RAM|mem[29][0] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y16_N0 +cyclonev_lcell_comb \RAM|mem[25][2]~87 ( +// Equation(s): +// \RAM|mem[25][2]~87_combout = ( \RAM|Decoder0~4_combout & ( \pc_we[0]~1_combout & ( ((!\ALU|Mux28~1_combout & (!\ALU|Mux27~1_combout & \ALU|Mux30~1_combout ))) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~4_combout & ( \pc_we[0]~1_combout & ( +// \rst[0]~input_o ) ) ) # ( \RAM|Decoder0~4_combout & ( !\pc_we[0]~1_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~4_combout & ( !\pc_we[0]~1_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\rst[0]~input_o ), + .datab(!\ALU|Mux28~1_combout ), + .datac(!\ALU|Mux27~1_combout ), + .datad(!\ALU|Mux30~1_combout ), + .datae(!\RAM|Decoder0~4_combout ), + .dataf(!\pc_we[0]~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[25][2]~87_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[25][2]~87 .extended_lut = "off"; +defparam \RAM|mem[25][2]~87 .lut_mask = 64'h55555555555555D5; +defparam \RAM|mem[25][2]~87 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X43_Y16_N43 +dffeas \RAM|mem[25][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[25][2]~87_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[25][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[25][0] .is_wysiwyg = "true"; +defparam \RAM|mem[25][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X41_Y13_N18 +cyclonev_lcell_comb \RAM|mem[17][0]~85 ( +// Equation(s): +// \RAM|mem[17][0]~85_combout = ( \pc_we[0]~1_combout & ( \RAM|Decoder0~4_combout & ( ((\ALU|Mux30~1_combout & (!\ALU|Mux27~1_combout & \ALU|Mux28~1_combout ))) # (\rst[0]~input_o ) ) ) ) # ( !\pc_we[0]~1_combout & ( \RAM|Decoder0~4_combout & ( +// \rst[0]~input_o ) ) ) # ( \pc_we[0]~1_combout & ( !\RAM|Decoder0~4_combout & ( \rst[0]~input_o ) ) ) # ( !\pc_we[0]~1_combout & ( !\RAM|Decoder0~4_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\rst[0]~input_o ), + .datab(!\ALU|Mux30~1_combout ), + .datac(!\ALU|Mux27~1_combout ), + .datad(!\ALU|Mux28~1_combout ), + .datae(!\pc_we[0]~1_combout ), + .dataf(!\RAM|Decoder0~4_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[17][0]~85_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[17][0]~85 .extended_lut = "off"; +defparam \RAM|mem[17][0]~85 .lut_mask = 64'h5555555555555575; +defparam \RAM|mem[17][0]~85 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X41_Y13_N19 +dffeas \RAM|mem[17][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[17][0]~85_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[17][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[17][0] .is_wysiwyg = "true"; +defparam \RAM|mem[17][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X43_Y15_N24 +cyclonev_lcell_comb \rd[0]~28 ( +// Equation(s): +// \rd[0]~28_combout = ( \ALU|Mux29~3_combout & ( \ALU|Mux28~1_combout & ( \RAM|mem[17][0]~q ) ) ) # ( !\ALU|Mux29~3_combout & ( \ALU|Mux28~1_combout & ( \RAM|mem[21][0]~q ) ) ) # ( \ALU|Mux29~3_combout & ( !\ALU|Mux28~1_combout & ( +// \RAM|mem[25][0]~q ) ) ) # ( !\ALU|Mux29~3_combout & ( !\ALU|Mux28~1_combout & ( \RAM|mem[29][0]~q ) ) ) + + .dataa(!\RAM|mem[21][0]~q ), + .datab(!\RAM|mem[29][0]~q ), + .datac(!\RAM|mem[25][0]~q ), + .datad(!\RAM|mem[17][0]~q ), + .datae(!\ALU|Mux29~3_combout ), + .dataf(!\ALU|Mux28~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[0]~28_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[0]~28 .extended_lut = "off"; +defparam \rd[0]~28 .lut_mask = 64'h33330F0F555500FF; +defparam \rd[0]~28 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X46_Y12_N39 +cyclonev_lcell_comb \rd[0]~31 ( +// Equation(s): +// \rd[0]~31_combout = ( \rd[0]~28_combout & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & ((\rd[0]~29_combout ))) # (\ALU|Mux30~1_combout & (\rd[0]~27_combout )) ) ) ) # ( !\rd[0]~28_combout & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout +// & ((\rd[0]~29_combout ))) # (\ALU|Mux30~1_combout & (\rd[0]~27_combout )) ) ) ) # ( \rd[0]~28_combout & ( !\ALU|Mux31~3_combout & ( (\rd[0]~30_combout ) # (\ALU|Mux30~1_combout ) ) ) ) # ( !\rd[0]~28_combout & ( !\ALU|Mux31~3_combout & ( +// (!\ALU|Mux30~1_combout & \rd[0]~30_combout ) ) ) ) + + .dataa(!\rd[0]~27_combout ), + .datab(!\ALU|Mux30~1_combout ), + .datac(!\rd[0]~29_combout ), + .datad(!\rd[0]~30_combout ), + .datae(!\rd[0]~28_combout ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[0]~31_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[0]~31 .extended_lut = "off"; +defparam \rd[0]~31 .lut_mask = 64'h00CC33FF1D1D1D1D; +defparam \rd[0]~31 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X40_Y15_N51 +cyclonev_lcell_comb \RAM|mem[1][0]~69 ( +// Equation(s): +// \RAM|mem[1][0]~69_combout = ( \pc_we[0]~1_combout & ( \RAM|Decoder0~4_combout & ( ((\ALU|Mux30~1_combout & (\ALU|Mux27~1_combout & \ALU|Mux28~1_combout ))) # (\rst[0]~input_o ) ) ) ) # ( !\pc_we[0]~1_combout & ( \RAM|Decoder0~4_combout & ( +// \rst[0]~input_o ) ) ) # ( \pc_we[0]~1_combout & ( !\RAM|Decoder0~4_combout & ( \rst[0]~input_o ) ) ) # ( !\pc_we[0]~1_combout & ( !\RAM|Decoder0~4_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\ALU|Mux30~1_combout ), + .datab(!\ALU|Mux27~1_combout ), + .datac(!\rst[0]~input_o ), + .datad(!\ALU|Mux28~1_combout ), + .datae(!\pc_we[0]~1_combout ), + .dataf(!\RAM|Decoder0~4_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[1][0]~69_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[1][0]~69 .extended_lut = "off"; +defparam \RAM|mem[1][0]~69 .lut_mask = 64'h0F0F0F0F0F0F0F1F; +defparam \RAM|mem[1][0]~69 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X40_Y15_N52 +dffeas \RAM|mem[1][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[1][0]~69_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[1][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[1][0] .is_wysiwyg = "true"; +defparam \RAM|mem[1][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X45_Y11_N27 +cyclonev_lcell_comb \RAM|Decoder0~28 ( +// Equation(s): +// \RAM|Decoder0~28_combout = ( \ALU|adder_unit|OUT_1 [4] & ( (\ALU|Mux29~0_combout & (!\ALU|Mux30~0_combout & !\ALU|Mux27~0_combout )) ) ) # ( !\ALU|adder_unit|OUT_1 [4] & ( (!\ALU|Mux30~0_combout & (!\ALU|Mux27~0_combout & ((!\ALU|adder_unit|OUT_1 +// [1]) # (\ALU|Mux29~0_combout )))) ) ) + + .dataa(!\ALU|Mux29~0_combout ), + .datab(!\ALU|Mux30~0_combout ), + .datac(!\ALU|Mux27~0_combout ), + .datad(!\ALU|adder_unit|OUT_1 [1]), + .datae(gnd), + .dataf(!\ALU|adder_unit|OUT_1 [4]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|Decoder0~28_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|Decoder0~28 .extended_lut = "off"; +defparam \RAM|Decoder0~28 .lut_mask = 64'hC040C04040404040; +defparam \RAM|Decoder0~28 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X46_Y14_N15 +cyclonev_lcell_comb \RAM|mem[13][1]~72 ( +// Equation(s): +// \RAM|mem[13][1]~72_combout = ( \RAM|Decoder0~28_combout & ( \ALU|Mux31~3_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~28_combout & ( \ALU|Mux31~3_combout & ( \rst[0]~input_o ) ) ) # ( \RAM|Decoder0~28_combout & ( !\ALU|Mux31~3_combout & ( +// ((\pc_we[0]~1_combout & \RAM|Decoder0~25_combout )) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~28_combout & ( !\ALU|Mux31~3_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\rst[0]~input_o ), + .datab(!\pc_we[0]~1_combout ), + .datac(!\RAM|Decoder0~25_combout ), + .datad(gnd), + .datae(!\RAM|Decoder0~28_combout ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[13][1]~72_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[13][1]~72 .extended_lut = "off"; +defparam \RAM|mem[13][1]~72 .lut_mask = 64'h5555575755555555; +defparam \RAM|mem[13][1]~72 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X46_Y14_N7 +dffeas \RAM|mem[13][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[13][1]~72_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[13][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[13][0] .is_wysiwyg = "true"; +defparam \RAM|mem[13][0] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y15_N3 +cyclonev_lcell_comb \RAM|mem[9][2]~71 ( +// Equation(s): +// \RAM|mem[9][2]~71_combout = ( \ALU|Mux27~1_combout & ( \RAM|Decoder0~4_combout & ( ((!\ALU|Mux28~1_combout & (\pc_we[0]~1_combout & \ALU|Mux30~1_combout ))) # (\rst[0]~input_o ) ) ) ) # ( !\ALU|Mux27~1_combout & ( \RAM|Decoder0~4_combout & ( +// \rst[0]~input_o ) ) ) # ( \ALU|Mux27~1_combout & ( !\RAM|Decoder0~4_combout & ( \rst[0]~input_o ) ) ) # ( !\ALU|Mux27~1_combout & ( !\RAM|Decoder0~4_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\ALU|Mux28~1_combout ), + .datab(!\pc_we[0]~1_combout ), + .datac(!\rst[0]~input_o ), + .datad(!\ALU|Mux30~1_combout ), + .datae(!\ALU|Mux27~1_combout ), + .dataf(!\RAM|Decoder0~4_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[9][2]~71_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[9][2]~71 .extended_lut = "off"; +defparam \RAM|mem[9][2]~71 .lut_mask = 64'h0F0F0F0F0F0F0F2F; +defparam \RAM|mem[9][2]~71 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X43_Y16_N13 +dffeas \RAM|mem[9][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[9][2]~71_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[9][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[9][0] .is_wysiwyg = "true"; +defparam \RAM|mem[9][0] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y15_N30 +cyclonev_lcell_comb \RAM|mem[5][0]~70 ( +// Equation(s): +// \RAM|mem[5][0]~70_combout = ( \RAM|Decoder0~16_combout & ( ((\pc_we[0]~1_combout & (\ALU|Mux27~1_combout & \ALU|Mux30~1_combout ))) # (\rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~16_combout & ( \rst[0]~input_o ) ) + + .dataa(!\pc_we[0]~1_combout ), + .datab(!\rst[0]~input_o ), + .datac(!\ALU|Mux27~1_combout ), + .datad(!\ALU|Mux30~1_combout ), + .datae(gnd), + .dataf(!\RAM|Decoder0~16_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[5][0]~70_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[5][0]~70 .extended_lut = "off"; +defparam \RAM|mem[5][0]~70 .lut_mask = 64'h3333333333373337; +defparam \RAM|mem[5][0]~70 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X41_Y15_N50 +dffeas \RAM|mem[5][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[5][0]~70_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[5][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[5][0] .is_wysiwyg = "true"; +defparam \RAM|mem[5][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X41_Y15_N48 +cyclonev_lcell_comb \rd[0]~23 ( +// Equation(s): +// \rd[0]~23_combout = ( \RAM|mem[5][0]~q & ( \ALU|Mux29~3_combout & ( (!\ALU|Mux28~1_combout & ((\RAM|mem[9][0]~q ))) # (\ALU|Mux28~1_combout & (\RAM|mem[1][0]~q )) ) ) ) # ( !\RAM|mem[5][0]~q & ( \ALU|Mux29~3_combout & ( (!\ALU|Mux28~1_combout & +// ((\RAM|mem[9][0]~q ))) # (\ALU|Mux28~1_combout & (\RAM|mem[1][0]~q )) ) ) ) # ( \RAM|mem[5][0]~q & ( !\ALU|Mux29~3_combout & ( (\ALU|Mux28~1_combout ) # (\RAM|mem[13][0]~q ) ) ) ) # ( !\RAM|mem[5][0]~q & ( !\ALU|Mux29~3_combout & ( (\RAM|mem[13][0]~q +// & !\ALU|Mux28~1_combout ) ) ) ) + + .dataa(!\RAM|mem[1][0]~q ), + .datab(!\RAM|mem[13][0]~q ), + .datac(!\RAM|mem[9][0]~q ), + .datad(!\ALU|Mux28~1_combout ), + .datae(!\RAM|mem[5][0]~q ), + .dataf(!\ALU|Mux29~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[0]~23_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[0]~23 .extended_lut = "off"; +defparam \rd[0]~23 .lut_mask = 64'h330033FF0F550F55; +defparam \rd[0]~23 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X47_Y11_N18 +cyclonev_lcell_comb \RAM|Decoder0~6 ( +// Equation(s): +// \RAM|Decoder0~6_combout = ( !\ALU|Mux27~0_combout & ( \ALU|adder_unit|OUT_1 [1] & ( (!\ALU|Mux29~0_combout & ((!\ALU|adder_unit|OUT_1 [4]))) # (\ALU|Mux29~0_combout & (\ALU|Mux30~0_combout )) ) ) ) # ( !\ALU|Mux27~0_combout & ( !\ALU|adder_unit|OUT_1 +// [1] & ( (\ALU|Mux30~0_combout & ((!\ALU|adder_unit|OUT_1 [4]) # (\ALU|Mux29~0_combout ))) ) ) ) + + .dataa(gnd), + .datab(!\ALU|Mux30~0_combout ), + .datac(!\ALU|adder_unit|OUT_1 [4]), + .datad(!\ALU|Mux29~0_combout ), + .datae(!\ALU|Mux27~0_combout ), + .dataf(!\ALU|adder_unit|OUT_1 [1]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|Decoder0~6_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|Decoder0~6 .extended_lut = "off"; +defparam \RAM|Decoder0~6 .lut_mask = 64'h30330000F0330000; +defparam \RAM|Decoder0~6 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X53_Y11_N39 +cyclonev_lcell_comb \RAM|mem[10][4]~75 ( +// Equation(s): +// \RAM|mem[10][4]~75_combout = ( \RAM|Decoder0~3_combout & ( ((\RAM|Decoder0~6_combout & (!\ALU|Mux28~1_combout & \pc_we[0]~1_combout ))) # (\rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~3_combout & ( \rst[0]~input_o ) ) + + .dataa(!\rst[0]~input_o ), + .datab(!\RAM|Decoder0~6_combout ), + .datac(!\ALU|Mux28~1_combout ), + .datad(!\pc_we[0]~1_combout ), + .datae(gnd), + .dataf(!\RAM|Decoder0~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[10][4]~75_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[10][4]~75 .extended_lut = "off"; +defparam \RAM|mem[10][4]~75 .lut_mask = 64'h5555555555755575; +defparam \RAM|mem[10][4]~75 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X53_Y11_N2 +dffeas \RAM|mem[10][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[10][4]~75_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[10][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[10][0] .is_wysiwyg = "true"; +defparam \RAM|mem[10][0] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X50_Y11_N0 +cyclonev_lcell_comb \RAM|mem[6][2]~74 ( +// Equation(s): +// \RAM|mem[6][2]~74_combout = ( \ALU|Mux25~1_combout & ( \RAM|Decoder0~15_combout & ( ((\RAM|Decoder0~6_combout & (\ALU|Mux24~1_combout & \ALU|Mux26~1_combout ))) # (\rst[0]~input_o ) ) ) ) # ( !\ALU|Mux25~1_combout & ( \RAM|Decoder0~15_combout & ( +// \rst[0]~input_o ) ) ) # ( \ALU|Mux25~1_combout & ( !\RAM|Decoder0~15_combout & ( \rst[0]~input_o ) ) ) # ( !\ALU|Mux25~1_combout & ( !\RAM|Decoder0~15_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\rst[0]~input_o ), + .datab(!\RAM|Decoder0~6_combout ), + .datac(!\ALU|Mux24~1_combout ), + .datad(!\ALU|Mux26~1_combout ), + .datae(!\ALU|Mux25~1_combout ), + .dataf(!\RAM|Decoder0~15_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[6][2]~74_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[6][2]~74 .extended_lut = "off"; +defparam \RAM|mem[6][2]~74 .lut_mask = 64'h5555555555555557; +defparam \RAM|mem[6][2]~74 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X53_Y11_N44 +dffeas \RAM|mem[6][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[6][2]~74_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[6][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[6][0] .is_wysiwyg = "true"; +defparam \RAM|mem[6][0] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X47_Y11_N42 +cyclonev_lcell_comb \RAM|mem[2][0]~73 ( +// Equation(s): +// \RAM|mem[2][0]~73_combout = ( \RAM|Decoder0~3_combout & ( ((\ALU|Mux28~1_combout & (\RAM|Decoder0~6_combout & \pc_we[0]~1_combout ))) # (\rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~3_combout & ( \rst[0]~input_o ) ) + + .dataa(!\ALU|Mux28~1_combout ), + .datab(!\rst[0]~input_o ), + .datac(!\RAM|Decoder0~6_combout ), + .datad(!\pc_we[0]~1_combout ), + .datae(gnd), + .dataf(!\RAM|Decoder0~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[2][0]~73_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[2][0]~73 .extended_lut = "off"; +defparam \RAM|mem[2][0]~73 .lut_mask = 64'h3333333333373337; +defparam \RAM|mem[2][0]~73 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X56_Y11_N40 +dffeas \RAM|mem[2][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[2][0]~73_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[2][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[2][0] .is_wysiwyg = "true"; +defparam \RAM|mem[2][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X49_Y11_N15 +cyclonev_lcell_comb \RAM|mem[14][1]~76 ( +// Equation(s): +// \RAM|mem[14][1]~76_combout = ( \RAM|Decoder0~26_combout & ( ((\pc_we[0]~1_combout & \RAM|Decoder0~6_combout )) # (\rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~26_combout & ( \rst[0]~input_o ) ) + + .dataa(!\pc_we[0]~1_combout ), + .datab(gnd), + .datac(!\rst[0]~input_o ), + .datad(!\RAM|Decoder0~6_combout ), + .datae(gnd), + .dataf(!\RAM|Decoder0~26_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[14][1]~76_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[14][1]~76 .extended_lut = "off"; +defparam \RAM|mem[14][1]~76 .lut_mask = 64'h0F0F0F0F0F5F0F5F; +defparam \RAM|mem[14][1]~76 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X53_Y11_N32 +dffeas \RAM|mem[14][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[14][1]~76_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[14][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[14][0] .is_wysiwyg = "true"; +defparam \RAM|mem[14][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X53_Y11_N30 +cyclonev_lcell_comb \rd[0]~24 ( +// Equation(s): +// \rd[0]~24_combout = ( \RAM|mem[14][0]~q & ( \ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout & (\RAM|mem[6][0]~q )) # (\ALU|Mux29~3_combout & ((\RAM|mem[2][0]~q ))) ) ) ) # ( !\RAM|mem[14][0]~q & ( \ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout & +// (\RAM|mem[6][0]~q )) # (\ALU|Mux29~3_combout & ((\RAM|mem[2][0]~q ))) ) ) ) # ( \RAM|mem[14][0]~q & ( !\ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout ) # (\RAM|mem[10][0]~q ) ) ) ) # ( !\RAM|mem[14][0]~q & ( !\ALU|Mux28~1_combout & ( +// (\RAM|mem[10][0]~q & \ALU|Mux29~3_combout ) ) ) ) + + .dataa(!\RAM|mem[10][0]~q ), + .datab(!\RAM|mem[6][0]~q ), + .datac(!\RAM|mem[2][0]~q ), + .datad(!\ALU|Mux29~3_combout ), + .datae(!\RAM|mem[14][0]~q ), + .dataf(!\ALU|Mux28~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[0]~24_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[0]~24 .extended_lut = "off"; +defparam \rd[0]~24 .lut_mask = 64'h0055FF55330F330F; +defparam \rd[0]~24 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X41_Y15_N6 +cyclonev_lcell_comb \RAM|mem[11][3]~79 ( +// Equation(s): +// \RAM|mem[11][3]~79_combout = ( \RAM|Decoder0~4_combout & ( \RAM|Decoder0~6_combout & ( ((!\ALU|Mux28~1_combout & \pc_we[0]~1_combout )) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~4_combout & ( \RAM|Decoder0~6_combout & ( \rst[0]~input_o ) ) ) # +// ( \RAM|Decoder0~4_combout & ( !\RAM|Decoder0~6_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~4_combout & ( !\RAM|Decoder0~6_combout & ( \rst[0]~input_o ) ) ) + + .dataa(gnd), + .datab(!\ALU|Mux28~1_combout ), + .datac(!\rst[0]~input_o ), + .datad(!\pc_we[0]~1_combout ), + .datae(!\RAM|Decoder0~4_combout ), + .dataf(!\RAM|Decoder0~6_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[11][3]~79_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[11][3]~79 .extended_lut = "off"; +defparam \RAM|mem[11][3]~79 .lut_mask = 64'h0F0F0F0F0F0F0FCF; +defparam \RAM|mem[11][3]~79 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X41_Y15_N7 +dffeas \RAM|mem[11][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[11][3]~79_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[11][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[11][0] .is_wysiwyg = "true"; +defparam \RAM|mem[11][0] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X47_Y15_N0 +cyclonev_lcell_comb \RAM|mem[7][0]~feeder ( +// Equation(s): +// \RAM|mem[7][0]~feeder_combout = ( \RAM|mem~0_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[7][0]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[7][0]~feeder .extended_lut = "off"; +defparam \RAM|mem[7][0]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[7][0]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y15_N24 +cyclonev_lcell_comb \RAM|mem[7][0]~78 ( +// Equation(s): +// \RAM|mem[7][0]~78_combout = ( \RAM|Decoder0~6_combout & ( \RAM|Decoder0~16_combout & ( (\rst[0]~input_o ) # (\pc_we[0]~1_combout ) ) ) ) # ( !\RAM|Decoder0~6_combout & ( \RAM|Decoder0~16_combout & ( \rst[0]~input_o ) ) ) # ( \RAM|Decoder0~6_combout +// & ( !\RAM|Decoder0~16_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~6_combout & ( !\RAM|Decoder0~16_combout & ( \rst[0]~input_o ) ) ) + + .dataa(gnd), + .datab(gnd), + .datac(!\pc_we[0]~1_combout ), + .datad(!\rst[0]~input_o ), + .datae(!\RAM|Decoder0~6_combout ), + .dataf(!\RAM|Decoder0~16_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[7][0]~78_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[7][0]~78 .extended_lut = "off"; +defparam \RAM|mem[7][0]~78 .lut_mask = 64'h00FF00FF00FF0FFF; +defparam \RAM|mem[7][0]~78 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X47_Y15_N1 +dffeas \RAM|mem[7][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[7][0]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[7][0]~78_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[7][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[7][0] .is_wysiwyg = "true"; +defparam \RAM|mem[7][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X40_Y15_N18 +cyclonev_lcell_comb \RAM|mem[3][0]~feeder ( +// Equation(s): +// \RAM|mem[3][0]~feeder_combout = ( \RAM|mem~0_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[3][0]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[3][0]~feeder .extended_lut = "off"; +defparam \RAM|mem[3][0]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[3][0]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X40_Y15_N12 +cyclonev_lcell_comb \RAM|mem[3][2]~77 ( +// Equation(s): +// \RAM|mem[3][2]~77_combout = ( \RAM|Decoder0~4_combout & ( ((\ALU|Mux28~1_combout & (\RAM|Decoder0~6_combout & \pc_we[0]~1_combout ))) # (\rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~4_combout & ( \rst[0]~input_o ) ) + + .dataa(!\ALU|Mux28~1_combout ), + .datab(!\rst[0]~input_o ), + .datac(!\RAM|Decoder0~6_combout ), + .datad(!\pc_we[0]~1_combout ), + .datae(gnd), + .dataf(!\RAM|Decoder0~4_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[3][2]~77_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[3][2]~77 .extended_lut = "off"; +defparam \RAM|mem[3][2]~77 .lut_mask = 64'h3333333333373337; +defparam \RAM|mem[3][2]~77 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X40_Y15_N19 +dffeas \RAM|mem[3][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[3][0]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[3][2]~77_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[3][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[3][0] .is_wysiwyg = "true"; +defparam \RAM|mem[3][0] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X47_Y11_N0 +cyclonev_lcell_comb \RAM|Decoder0~27 ( +// Equation(s): +// \RAM|Decoder0~27_combout = ( !\ALU|Mux23~0_combout & ( \RAM|Decoder0~6_combout & ( (\RAM|Decoder0~1_combout & ((!\ALU|adder_unit|OUT_1 [8]) # (\ALU|Mux29~0_combout ))) ) ) ) + + .dataa(!\RAM|Decoder0~1_combout ), + .datab(!\ALU|Mux29~0_combout ), + .datac(!\ALU|adder_unit|OUT_1 [8]), + .datad(gnd), + .datae(!\ALU|Mux23~0_combout ), + .dataf(!\RAM|Decoder0~6_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|Decoder0~27_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|Decoder0~27 .extended_lut = "off"; +defparam \RAM|Decoder0~27 .lut_mask = 64'h0000000051510000; +defparam \RAM|Decoder0~27 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X41_Y15_N3 +cyclonev_lcell_comb \RAM|mem[15][4]~80 ( +// Equation(s): +// \RAM|mem[15][4]~80_combout = ( \pc_we[0]~1_combout & ( \ALU|Mux31~3_combout & ( \rst[0]~input_o ) ) ) # ( !\pc_we[0]~1_combout & ( \ALU|Mux31~3_combout & ( \rst[0]~input_o ) ) ) # ( \pc_we[0]~1_combout & ( !\ALU|Mux31~3_combout & ( +// ((!\ALU|Mux28~1_combout & (\RAM|Decoder0~27_combout & !\ALU|Mux29~3_combout ))) # (\rst[0]~input_o ) ) ) ) # ( !\pc_we[0]~1_combout & ( !\ALU|Mux31~3_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\rst[0]~input_o ), + .datab(!\ALU|Mux28~1_combout ), + .datac(!\RAM|Decoder0~27_combout ), + .datad(!\ALU|Mux29~3_combout ), + .datae(!\pc_we[0]~1_combout ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[15][4]~80_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[15][4]~80 .extended_lut = "off"; +defparam \RAM|mem[15][4]~80 .lut_mask = 64'h55555D5555555555; +defparam \RAM|mem[15][4]~80 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X41_Y15_N44 +dffeas \RAM|mem[15][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[15][4]~80_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[15][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[15][0] .is_wysiwyg = "true"; +defparam \RAM|mem[15][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X41_Y15_N42 +cyclonev_lcell_comb \rd[0]~25 ( +// Equation(s): +// \rd[0]~25_combout = ( \RAM|mem[15][0]~q & ( \ALU|Mux29~3_combout & ( (!\ALU|Mux28~1_combout & (\RAM|mem[11][0]~q )) # (\ALU|Mux28~1_combout & ((\RAM|mem[3][0]~q ))) ) ) ) # ( !\RAM|mem[15][0]~q & ( \ALU|Mux29~3_combout & ( (!\ALU|Mux28~1_combout & +// (\RAM|mem[11][0]~q )) # (\ALU|Mux28~1_combout & ((\RAM|mem[3][0]~q ))) ) ) ) # ( \RAM|mem[15][0]~q & ( !\ALU|Mux29~3_combout & ( (!\ALU|Mux28~1_combout ) # (\RAM|mem[7][0]~q ) ) ) ) # ( !\RAM|mem[15][0]~q & ( !\ALU|Mux29~3_combout & ( +// (\RAM|mem[7][0]~q & \ALU|Mux28~1_combout ) ) ) ) + + .dataa(!\RAM|mem[11][0]~q ), + .datab(!\RAM|mem[7][0]~q ), + .datac(!\RAM|mem[3][0]~q ), + .datad(!\ALU|Mux28~1_combout ), + .datae(!\RAM|mem[15][0]~q ), + .dataf(!\ALU|Mux29~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[0]~25_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[0]~25 .extended_lut = "off"; +defparam \rd[0]~25 .lut_mask = 64'h0033FF33550F550F; +defparam \rd[0]~25 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X53_Y6_N51 +cyclonev_lcell_comb \RAM|mem[12][3]~68 ( +// Equation(s): +// \RAM|mem[12][3]~68_combout = ( \RAM|Decoder0~28_combout & ( \RAM|Decoder0~26_combout & ( (\pc_we[0]~1_combout ) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~28_combout & ( \RAM|Decoder0~26_combout & ( \rst[0]~input_o ) ) ) # ( +// \RAM|Decoder0~28_combout & ( !\RAM|Decoder0~26_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~28_combout & ( !\RAM|Decoder0~26_combout & ( \rst[0]~input_o ) ) ) + + .dataa(gnd), + .datab(!\rst[0]~input_o ), + .datac(!\pc_we[0]~1_combout ), + .datad(gnd), + .datae(!\RAM|Decoder0~28_combout ), + .dataf(!\RAM|Decoder0~26_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[12][3]~68_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[12][3]~68 .extended_lut = "off"; +defparam \RAM|mem[12][3]~68 .lut_mask = 64'h3333333333333F3F; +defparam \RAM|mem[12][3]~68 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X53_Y6_N52 +dffeas \RAM|mem[12][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[12][3]~68_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[12][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[12][0] .is_wysiwyg = "true"; +defparam \RAM|mem[12][0] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y11_N33 +cyclonev_lcell_comb \RAM|mem[0][3]~65 ( +// Equation(s): +// \RAM|mem[0][3]~65_combout = ( \RAM|Decoder0~3_combout & ( ((\pc_we[0]~1_combout & (\RAM|Decoder0~28_combout & \ALU|Mux28~1_combout ))) # (\rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~3_combout & ( \rst[0]~input_o ) ) + + .dataa(!\pc_we[0]~1_combout ), + .datab(!\rst[0]~input_o ), + .datac(!\RAM|Decoder0~28_combout ), + .datad(!\ALU|Mux28~1_combout ), + .datae(gnd), + .dataf(!\RAM|Decoder0~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[0][3]~65_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[0][3]~65 .extended_lut = "off"; +defparam \RAM|mem[0][3]~65 .lut_mask = 64'h3333333333373337; +defparam \RAM|mem[0][3]~65 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X42_Y11_N46 +dffeas \RAM|mem[0][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[0][3]~65_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[0][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[0][0] .is_wysiwyg = "true"; +defparam \RAM|mem[0][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X46_Y11_N36 +cyclonev_lcell_comb \RAM|mem[8][2]~67 ( +// Equation(s): +// \RAM|mem[8][2]~67_combout = ( \pc_we[0]~1_combout & ( \RAM|Decoder0~3_combout & ( ((!\ALU|Mux28~1_combout & \RAM|Decoder0~28_combout )) # (\rst[0]~input_o ) ) ) ) # ( !\pc_we[0]~1_combout & ( \RAM|Decoder0~3_combout & ( \rst[0]~input_o ) ) ) # ( +// \pc_we[0]~1_combout & ( !\RAM|Decoder0~3_combout & ( \rst[0]~input_o ) ) ) # ( !\pc_we[0]~1_combout & ( !\RAM|Decoder0~3_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\ALU|Mux28~1_combout ), + .datab(!\rst[0]~input_o ), + .datac(!\RAM|Decoder0~28_combout ), + .datad(gnd), + .datae(!\pc_we[0]~1_combout ), + .dataf(!\RAM|Decoder0~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[8][2]~67_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[8][2]~67 .extended_lut = "off"; +defparam \RAM|mem[8][2]~67 .lut_mask = 64'h3333333333333B3B; +defparam \RAM|mem[8][2]~67 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X46_Y14_N1 +dffeas \RAM|mem[8][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[8][2]~67_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[8][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[8][0] .is_wysiwyg = "true"; +defparam \RAM|mem[8][0] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X47_Y12_N24 +cyclonev_lcell_comb \RAM|mem[4][0]~66 ( +// Equation(s): +// \RAM|mem[4][0]~66_combout = ( \ALU|Mux24~1_combout & ( \RAM|Decoder0~15_combout & ( ((\ALU|Mux27~1_combout & (\ALU|Mux30~1_combout & \RAM|Decoder0~29_combout ))) # (\rst[0]~input_o ) ) ) ) # ( !\ALU|Mux24~1_combout & ( \RAM|Decoder0~15_combout & ( +// \rst[0]~input_o ) ) ) # ( \ALU|Mux24~1_combout & ( !\RAM|Decoder0~15_combout & ( \rst[0]~input_o ) ) ) # ( !\ALU|Mux24~1_combout & ( !\RAM|Decoder0~15_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\rst[0]~input_o ), + .datab(!\ALU|Mux27~1_combout ), + .datac(!\ALU|Mux30~1_combout ), + .datad(!\RAM|Decoder0~29_combout ), + .datae(!\ALU|Mux24~1_combout ), + .dataf(!\RAM|Decoder0~15_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[4][0]~66_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[4][0]~66 .extended_lut = "off"; +defparam \RAM|mem[4][0]~66 .lut_mask = 64'h5555555555555557; +defparam \RAM|mem[4][0]~66 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X47_Y12_N2 +dffeas \RAM|mem[4][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[4][0]~66_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[4][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[4][0] .is_wysiwyg = "true"; +defparam \RAM|mem[4][0] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X47_Y12_N0 +cyclonev_lcell_comb \rd[0]~22 ( +// Equation(s): +// \rd[0]~22_combout = ( \RAM|mem[4][0]~q & ( \ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout ) # (\RAM|mem[0][0]~q ) ) ) ) # ( !\RAM|mem[4][0]~q & ( \ALU|Mux28~1_combout & ( (\ALU|Mux29~3_combout & \RAM|mem[0][0]~q ) ) ) ) # ( \RAM|mem[4][0]~q & ( +// !\ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout & (\RAM|mem[12][0]~q )) # (\ALU|Mux29~3_combout & ((\RAM|mem[8][0]~q ))) ) ) ) # ( !\RAM|mem[4][0]~q & ( !\ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout & (\RAM|mem[12][0]~q )) # +// (\ALU|Mux29~3_combout & ((\RAM|mem[8][0]~q ))) ) ) ) + + .dataa(!\RAM|mem[12][0]~q ), + .datab(!\ALU|Mux29~3_combout ), + .datac(!\RAM|mem[0][0]~q ), + .datad(!\RAM|mem[8][0]~q ), + .datae(!\RAM|mem[4][0]~q ), + .dataf(!\ALU|Mux28~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[0]~22_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[0]~22 .extended_lut = "off"; +defparam \rd[0]~22 .lut_mask = 64'h447744770303CFCF; +defparam \rd[0]~22 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y14_N21 +cyclonev_lcell_comb \rd[0]~26 ( +// Equation(s): +// \rd[0]~26_combout = ( \rd[0]~22_combout & ( \ALU|Mux31~3_combout & ( (\rd[0]~24_combout ) # (\ALU|Mux30~1_combout ) ) ) ) # ( !\rd[0]~22_combout & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & \rd[0]~24_combout ) ) ) ) # ( \rd[0]~22_combout & +// ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & ((\rd[0]~25_combout ))) # (\ALU|Mux30~1_combout & (\rd[0]~23_combout )) ) ) ) # ( !\rd[0]~22_combout & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & ((\rd[0]~25_combout ))) # +// (\ALU|Mux30~1_combout & (\rd[0]~23_combout )) ) ) ) + + .dataa(!\rd[0]~23_combout ), + .datab(!\ALU|Mux30~1_combout ), + .datac(!\rd[0]~24_combout ), + .datad(!\rd[0]~25_combout ), + .datae(!\rd[0]~22_combout ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[0]~26_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[0]~26 .extended_lut = "off"; +defparam \rd[0]~26 .lut_mask = 64'h11DD11DD0C0C3F3F; +defparam \rd[0]~26 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X41_Y11_N24 +cyclonev_lcell_comb \RAM|mem[32][0]~feeder ( +// Equation(s): +// \RAM|mem[32][0]~feeder_combout = ( \RAM|mem~0_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[32][0]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[32][0]~feeder .extended_lut = "off"; +defparam \RAM|mem[32][0]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[32][0]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y8_N30 +cyclonev_lcell_comb \pc_we[0]~0 ( +// Equation(s): +// \pc_we[0]~0_combout = ( \ALU|adder_unit|OUT_1 [4] & ( \ALU|Mux30~1_combout & ( (\ALU|Mux29~0_combout & (!\ALU|Mux28~0_combout & !\ALU|Mux27~0_combout )) ) ) ) # ( !\ALU|adder_unit|OUT_1 [4] & ( \ALU|Mux30~1_combout & ( (!\ALU|Mux28~0_combout & +// (!\ALU|Mux27~0_combout & ((!\ALU|adder_unit|OUT_1 [3]) # (\ALU|Mux29~0_combout )))) ) ) ) + + .dataa(!\ALU|Mux29~0_combout ), + .datab(!\ALU|adder_unit|OUT_1 [3]), + .datac(!\ALU|Mux28~0_combout ), + .datad(!\ALU|Mux27~0_combout ), + .datae(!\ALU|adder_unit|OUT_1 [4]), + .dataf(!\ALU|Mux30~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\pc_we[0]~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \pc_we[0]~0 .extended_lut = "off"; +defparam \pc_we[0]~0 .lut_mask = 64'h00000000D0005000; +defparam \pc_we[0]~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y11_N9 +cyclonev_lcell_comb \RAM|mem[32][1]~97 ( +// Equation(s): +// \RAM|mem[32][1]~97_combout = ( \ALU|Mux25~1_combout & ( \RAM|Decoder0~3_combout & ( ((\pc_we[0]~0_combout & (!\ALU|Mux26~1_combout & \ALU|Mux24~1_combout ))) # (\rst[0]~input_o ) ) ) ) # ( !\ALU|Mux25~1_combout & ( \RAM|Decoder0~3_combout & ( +// \rst[0]~input_o ) ) ) # ( \ALU|Mux25~1_combout & ( !\RAM|Decoder0~3_combout & ( \rst[0]~input_o ) ) ) # ( !\ALU|Mux25~1_combout & ( !\RAM|Decoder0~3_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\rst[0]~input_o ), + .datab(!\pc_we[0]~0_combout ), + .datac(!\ALU|Mux26~1_combout ), + .datad(!\ALU|Mux24~1_combout ), + .datae(!\ALU|Mux25~1_combout ), + .dataf(!\RAM|Decoder0~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[32][1]~97_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[32][1]~97 .extended_lut = "off"; +defparam \RAM|mem[32][1]~97 .lut_mask = 64'h5555555555555575; +defparam \RAM|mem[32][1]~97 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X41_Y11_N26 +dffeas \RAM|mem[32][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[32][0]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[32][1]~97_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[32][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[32][0] .is_wysiwyg = "true"; +defparam \RAM|mem[32][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X43_Y15_N0 +cyclonev_lcell_comb \RAM|mem[33][3]~98 ( +// Equation(s): +// \RAM|mem[33][3]~98_combout = ( \ALU|Mux28~1_combout & ( \RAM|Decoder0~4_combout & ( ((\RAM|Decoder0~32_combout & (\ALU|Mux27~1_combout & \ALU|Mux30~1_combout ))) # (\rst[0]~input_o ) ) ) ) # ( !\ALU|Mux28~1_combout & ( \RAM|Decoder0~4_combout & ( +// \rst[0]~input_o ) ) ) # ( \ALU|Mux28~1_combout & ( !\RAM|Decoder0~4_combout & ( \rst[0]~input_o ) ) ) # ( !\ALU|Mux28~1_combout & ( !\RAM|Decoder0~4_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\RAM|Decoder0~32_combout ), + .datab(!\ALU|Mux27~1_combout ), + .datac(!\ALU|Mux30~1_combout ), + .datad(!\rst[0]~input_o ), + .datae(!\ALU|Mux28~1_combout ), + .dataf(!\RAM|Decoder0~4_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[33][3]~98_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[33][3]~98 .extended_lut = "off"; +defparam \RAM|mem[33][3]~98 .lut_mask = 64'h00FF00FF00FF01FF; +defparam \RAM|mem[33][3]~98 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X43_Y15_N59 +dffeas \RAM|mem[33][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[33][3]~98_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[33][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[33][0] .is_wysiwyg = "true"; +defparam \RAM|mem[33][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X41_Y11_N30 +cyclonev_lcell_comb \RAM|mem[34][0]~feeder ( +// Equation(s): +// \RAM|mem[34][0]~feeder_combout = ( \RAM|mem~0_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[34][0]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[34][0]~feeder .extended_lut = "off"; +defparam \RAM|mem[34][0]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[34][0]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y15_N42 +cyclonev_lcell_comb \RAM|mem[34][3]~99 ( +// Equation(s): +// \RAM|mem[34][3]~99_combout = ( \RAM|Decoder0~6_combout & ( \RAM|Decoder0~33_combout & ( (\rst[0]~input_o ) # (\ALU|Mux28~1_combout ) ) ) ) # ( !\RAM|Decoder0~6_combout & ( \RAM|Decoder0~33_combout & ( \rst[0]~input_o ) ) ) # ( +// \RAM|Decoder0~6_combout & ( !\RAM|Decoder0~33_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~6_combout & ( !\RAM|Decoder0~33_combout & ( \rst[0]~input_o ) ) ) + + .dataa(gnd), + .datab(!\ALU|Mux28~1_combout ), + .datac(gnd), + .datad(!\rst[0]~input_o ), + .datae(!\RAM|Decoder0~6_combout ), + .dataf(!\RAM|Decoder0~33_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[34][3]~99_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[34][3]~99 .extended_lut = "off"; +defparam \RAM|mem[34][3]~99 .lut_mask = 64'h00FF00FF00FF33FF; +defparam \RAM|mem[34][3]~99 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X41_Y11_N32 +dffeas \RAM|mem[34][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[34][0]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[34][3]~99_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[34][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[34][0] .is_wysiwyg = "true"; +defparam \RAM|mem[34][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X41_Y11_N48 +cyclonev_lcell_comb \RAM|mem[35][2]~100 ( +// Equation(s): +// \RAM|mem[35][2]~100_combout = ( \RAM|Decoder0~6_combout & ( ((\RAM|Decoder0~32_combout & (\RAM|Decoder0~4_combout & \ALU|Mux28~1_combout ))) # (\rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~6_combout & ( \rst[0]~input_o ) ) + + .dataa(!\RAM|Decoder0~32_combout ), + .datab(!\rst[0]~input_o ), + .datac(!\RAM|Decoder0~4_combout ), + .datad(!\ALU|Mux28~1_combout ), + .datae(gnd), + .dataf(!\RAM|Decoder0~6_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[35][2]~100_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[35][2]~100 .extended_lut = "off"; +defparam \RAM|mem[35][2]~100 .lut_mask = 64'h3333333333373337; +defparam \RAM|mem[35][2]~100 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X41_Y11_N14 +dffeas \RAM|mem[35][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[35][2]~100_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[35][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[35][0] .is_wysiwyg = "true"; +defparam \RAM|mem[35][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X41_Y11_N12 +cyclonev_lcell_comb \rd[0]~32 ( +// Equation(s): +// \rd[0]~32_combout = ( \RAM|mem[35][0]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & ((\RAM|mem[34][0]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[32][0]~q )) ) ) ) # ( !\RAM|mem[35][0]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout +// & ((\RAM|mem[34][0]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[32][0]~q )) ) ) ) # ( \RAM|mem[35][0]~q & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout ) # (\RAM|mem[33][0]~q ) ) ) ) # ( !\RAM|mem[35][0]~q & ( !\ALU|Mux31~3_combout & ( +// (\RAM|mem[33][0]~q & \ALU|Mux30~1_combout ) ) ) ) + + .dataa(!\RAM|mem[32][0]~q ), + .datab(!\RAM|mem[33][0]~q ), + .datac(!\ALU|Mux30~1_combout ), + .datad(!\RAM|mem[34][0]~q ), + .datae(!\RAM|mem[35][0]~q ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[0]~32_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[0]~32 .extended_lut = "off"; +defparam \rd[0]~32 .lut_mask = 64'h0303F3F305F505F5; +defparam \rd[0]~32 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X47_Y11_N24 +cyclonev_lcell_comb \RAM|mem[44][1]~109 ( +// Equation(s): +// \RAM|mem[44][1]~109_combout = ( \RAM|Decoder0~28_combout & ( \RAM|Decoder0~26_combout & ( (\rst[0]~input_o ) # (\RAM|Decoder0~32_combout ) ) ) ) # ( !\RAM|Decoder0~28_combout & ( \RAM|Decoder0~26_combout & ( \rst[0]~input_o ) ) ) # ( +// \RAM|Decoder0~28_combout & ( !\RAM|Decoder0~26_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~28_combout & ( !\RAM|Decoder0~26_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\RAM|Decoder0~32_combout ), + .datab(!\rst[0]~input_o ), + .datac(gnd), + .datad(gnd), + .datae(!\RAM|Decoder0~28_combout ), + .dataf(!\RAM|Decoder0~26_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[44][1]~109_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[44][1]~109 .extended_lut = "off"; +defparam \RAM|mem[44][1]~109 .lut_mask = 64'h3333333333337777; +defparam \RAM|mem[44][1]~109 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X47_Y11_N26 +dffeas \RAM|mem[44][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[44][1]~109_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[44][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[44][0] .is_wysiwyg = "true"; +defparam \RAM|mem[44][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X46_Y14_N27 +cyclonev_lcell_comb \RAM|mem[45][4]~110 ( +// Equation(s): +// \RAM|mem[45][4]~110_combout = ( \RAM|Decoder0~35_combout & ( (\ALU|Mux27~1_combout ) # (\rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~35_combout & ( \rst[0]~input_o ) ) + + .dataa(!\rst[0]~input_o ), + .datab(gnd), + .datac(gnd), + .datad(!\ALU|Mux27~1_combout ), + .datae(gnd), + .dataf(!\RAM|Decoder0~35_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[45][4]~110_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[45][4]~110 .extended_lut = "off"; +defparam \RAM|mem[45][4]~110 .lut_mask = 64'h5555555555FF55FF; +defparam \RAM|mem[45][4]~110 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X46_Y14_N28 +dffeas \RAM|mem[45][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[45][4]~110_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[45][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[45][0] .is_wysiwyg = "true"; +defparam \RAM|mem[45][0] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X47_Y11_N12 +cyclonev_lcell_comb \RAM|mem[46][2]~111 ( +// Equation(s): +// \RAM|mem[46][2]~111_combout = ( \RAM|Decoder0~26_combout & ( ((\RAM|Decoder0~6_combout & \RAM|Decoder0~32_combout )) # (\rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~26_combout & ( \rst[0]~input_o ) ) + + .dataa(!\RAM|Decoder0~6_combout ), + .datab(!\rst[0]~input_o ), + .datac(!\RAM|Decoder0~32_combout ), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|Decoder0~26_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[46][2]~111_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[46][2]~111 .extended_lut = "off"; +defparam \RAM|mem[46][2]~111 .lut_mask = 64'h3333333337373737; +defparam \RAM|mem[46][2]~111 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X47_Y11_N10 +dffeas \RAM|mem[46][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[46][2]~111_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[46][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[46][0] .is_wysiwyg = "true"; +defparam \RAM|mem[46][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X45_Y7_N57 +cyclonev_lcell_comb \RAM|Decoder0~22 ( +// Equation(s): +// \RAM|Decoder0~22_combout = ( !\ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout & !\ALU|Mux26~1_combout ) ) ) + + .dataa(gnd), + .datab(gnd), + .datac(!\ALU|Mux29~3_combout ), + .datad(!\ALU|Mux26~1_combout ), + .datae(gnd), + .dataf(!\ALU|Mux28~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|Decoder0~22_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|Decoder0~22 .extended_lut = "off"; +defparam \RAM|Decoder0~22 .lut_mask = 64'hF000F00000000000; +defparam \RAM|Decoder0~22 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X47_Y11_N36 +cyclonev_lcell_comb \RAM|mem[47][0]~112 ( +// Equation(s): +// \RAM|mem[47][0]~112_combout = ( \RAM|Decoder0~22_combout & ( \ALU|Mux31~3_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~22_combout & ( \ALU|Mux31~3_combout & ( \rst[0]~input_o ) ) ) # ( \RAM|Decoder0~22_combout & ( !\ALU|Mux31~3_combout & +// ( ((\ALU|Mux24~1_combout & (\RAM|Decoder0~27_combout & \ALU|Mux25~1_combout ))) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~22_combout & ( !\ALU|Mux31~3_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\ALU|Mux24~1_combout ), + .datab(!\rst[0]~input_o ), + .datac(!\RAM|Decoder0~27_combout ), + .datad(!\ALU|Mux25~1_combout ), + .datae(!\RAM|Decoder0~22_combout ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[47][0]~112_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[47][0]~112 .extended_lut = "off"; +defparam \RAM|mem[47][0]~112 .lut_mask = 64'h3333333733333333; +defparam \RAM|mem[47][0]~112 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X47_Y11_N49 +dffeas \RAM|mem[47][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[47][0]~112_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[47][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[47][0] .is_wysiwyg = "true"; +defparam \RAM|mem[47][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X43_Y10_N6 +cyclonev_lcell_comb \rd[0]~35 ( +// Equation(s): +// \rd[0]~35_combout = ( \RAM|mem[47][0]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & ((\RAM|mem[46][0]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[44][0]~q )) ) ) ) # ( !\RAM|mem[47][0]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout +// & ((\RAM|mem[46][0]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[44][0]~q )) ) ) ) # ( \RAM|mem[47][0]~q & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout ) # (\RAM|mem[45][0]~q ) ) ) ) # ( !\RAM|mem[47][0]~q & ( !\ALU|Mux31~3_combout & ( +// (\RAM|mem[45][0]~q & \ALU|Mux30~1_combout ) ) ) ) + + .dataa(!\RAM|mem[44][0]~q ), + .datab(!\RAM|mem[45][0]~q ), + .datac(!\ALU|Mux30~1_combout ), + .datad(!\RAM|mem[46][0]~q ), + .datae(!\RAM|mem[47][0]~q ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[0]~35_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[0]~35 .extended_lut = "off"; +defparam \rd[0]~35 .lut_mask = 64'h0303F3F305F505F5; +defparam \rd[0]~35 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X49_Y12_N54 +cyclonev_lcell_comb \RAM|mem[36][2]~101 ( +// Equation(s): +// \RAM|mem[36][2]~101_combout = ( \RAM|Decoder0~31_combout & ( \RAM|Decoder0~15_combout & ( ((\ALU|Mux30~1_combout & (\ALU|Mux27~1_combout & \ALU|Mux24~1_combout ))) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~31_combout & ( \RAM|Decoder0~15_combout +// & ( \rst[0]~input_o ) ) ) # ( \RAM|Decoder0~31_combout & ( !\RAM|Decoder0~15_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~31_combout & ( !\RAM|Decoder0~15_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\ALU|Mux30~1_combout ), + .datab(!\ALU|Mux27~1_combout ), + .datac(!\rst[0]~input_o ), + .datad(!\ALU|Mux24~1_combout ), + .datae(!\RAM|Decoder0~31_combout ), + .dataf(!\RAM|Decoder0~15_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[36][2]~101_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[36][2]~101 .extended_lut = "off"; +defparam \RAM|mem[36][2]~101 .lut_mask = 64'h0F0F0F0F0F0F0F1F; +defparam \RAM|mem[36][2]~101 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X43_Y10_N20 +dffeas \RAM|mem[36][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[36][2]~101_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[36][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[36][0] .is_wysiwyg = "true"; +defparam \RAM|mem[36][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X49_Y14_N45 +cyclonev_lcell_comb \RAM|mem[37][0]~102 ( +// Equation(s): +// \RAM|mem[37][0]~102_combout = ( \RAM|Decoder0~32_combout & ( \RAM|Decoder0~16_combout & ( ((\ALU|Mux30~1_combout & \ALU|Mux27~1_combout )) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~32_combout & ( \RAM|Decoder0~16_combout & ( \rst[0]~input_o ) ) +// ) # ( \RAM|Decoder0~32_combout & ( !\RAM|Decoder0~16_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~32_combout & ( !\RAM|Decoder0~16_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\rst[0]~input_o ), + .datab(gnd), + .datac(!\ALU|Mux30~1_combout ), + .datad(!\ALU|Mux27~1_combout ), + .datae(!\RAM|Decoder0~32_combout ), + .dataf(!\RAM|Decoder0~16_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[37][0]~102_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[37][0]~102 .extended_lut = "off"; +defparam \RAM|mem[37][0]~102 .lut_mask = 64'h555555555555555F; +defparam \RAM|mem[37][0]~102 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X43_Y10_N32 +dffeas \RAM|mem[37][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[37][0]~102_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[37][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[37][0] .is_wysiwyg = "true"; +defparam \RAM|mem[37][0] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X50_Y14_N18 +cyclonev_lcell_comb \RAM|mem[38][0]~103 ( +// Equation(s): +// \RAM|mem[38][0]~103_combout = ( \RAM|Decoder0~15_combout & ( \RAM|Decoder0~6_combout & ( ((!\ALU|Mux26~1_combout & (\ALU|Mux25~1_combout & \ALU|Mux24~1_combout ))) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~15_combout & ( \RAM|Decoder0~6_combout +// & ( \rst[0]~input_o ) ) ) # ( \RAM|Decoder0~15_combout & ( !\RAM|Decoder0~6_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~15_combout & ( !\RAM|Decoder0~6_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\ALU|Mux26~1_combout ), + .datab(!\rst[0]~input_o ), + .datac(!\ALU|Mux25~1_combout ), + .datad(!\ALU|Mux24~1_combout ), + .datae(!\RAM|Decoder0~15_combout ), + .dataf(!\RAM|Decoder0~6_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[38][0]~103_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[38][0]~103 .extended_lut = "off"; +defparam \RAM|mem[38][0]~103 .lut_mask = 64'h333333333333333B; +defparam \RAM|mem[38][0]~103 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X50_Y14_N22 +dffeas \RAM|mem[38][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[38][0]~103_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[38][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[38][0] .is_wysiwyg = "true"; +defparam \RAM|mem[38][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X43_Y10_N36 +cyclonev_lcell_comb \RAM|mem[39][4]~104 ( +// Equation(s): +// \RAM|mem[39][4]~104_combout = ( \RAM|Decoder0~32_combout & ( ((\RAM|Decoder0~6_combout & \RAM|Decoder0~16_combout )) # (\rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~32_combout & ( \rst[0]~input_o ) ) + + .dataa(!\rst[0]~input_o ), + .datab(!\RAM|Decoder0~6_combout ), + .datac(!\RAM|Decoder0~16_combout ), + .datad(gnd), + .datae(!\RAM|Decoder0~32_combout ), + .dataf(gnd), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[39][4]~104_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[39][4]~104 .extended_lut = "off"; +defparam \RAM|mem[39][4]~104 .lut_mask = 64'h5555575755555757; +defparam \RAM|mem[39][4]~104 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X43_Y10_N56 +dffeas \RAM|mem[39][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[39][4]~104_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[39][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[39][0] .is_wysiwyg = "true"; +defparam \RAM|mem[39][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X43_Y10_N54 +cyclonev_lcell_comb \rd[0]~33 ( +// Equation(s): +// \rd[0]~33_combout = ( \RAM|mem[39][0]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & ((\RAM|mem[38][0]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[36][0]~q )) ) ) ) # ( !\RAM|mem[39][0]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout +// & ((\RAM|mem[38][0]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[36][0]~q )) ) ) ) # ( \RAM|mem[39][0]~q & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout ) # (\RAM|mem[37][0]~q ) ) ) ) # ( !\RAM|mem[39][0]~q & ( !\ALU|Mux31~3_combout & ( +// (\RAM|mem[37][0]~q & \ALU|Mux30~1_combout ) ) ) ) + + .dataa(!\RAM|mem[36][0]~q ), + .datab(!\RAM|mem[37][0]~q ), + .datac(!\ALU|Mux30~1_combout ), + .datad(!\RAM|mem[38][0]~q ), + .datae(!\RAM|mem[39][0]~q ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[0]~33_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[0]~33 .extended_lut = "off"; +defparam \rd[0]~33 .lut_mask = 64'h0303F3F305F505F5; +defparam \rd[0]~33 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X41_Y16_N48 +cyclonev_lcell_comb \RAM|mem[42][0]~feeder ( +// Equation(s): +// \RAM|mem[42][0]~feeder_combout = ( \RAM|mem~0_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[42][0]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[42][0]~feeder .extended_lut = "off"; +defparam \RAM|mem[42][0]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[42][0]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y16_N57 +cyclonev_lcell_comb \RAM|mem[42][4]~107 ( +// Equation(s): +// \RAM|mem[42][4]~107_combout = ( \RAM|Decoder0~6_combout & ( \RAM|Decoder0~33_combout & ( (!\ALU|Mux28~1_combout ) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~6_combout & ( \RAM|Decoder0~33_combout & ( \rst[0]~input_o ) ) ) # ( +// \RAM|Decoder0~6_combout & ( !\RAM|Decoder0~33_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~6_combout & ( !\RAM|Decoder0~33_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\rst[0]~input_o ), + .datab(gnd), + .datac(!\ALU|Mux28~1_combout ), + .datad(gnd), + .datae(!\RAM|Decoder0~6_combout ), + .dataf(!\RAM|Decoder0~33_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[42][4]~107_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[42][4]~107 .extended_lut = "off"; +defparam \RAM|mem[42][4]~107 .lut_mask = 64'h555555555555F5F5; +defparam \RAM|mem[42][4]~107 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X41_Y16_N50 +dffeas \RAM|mem[42][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[42][0]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[42][4]~107_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[42][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[42][0] .is_wysiwyg = "true"; +defparam \RAM|mem[42][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X41_Y16_N12 +cyclonev_lcell_comb \RAM|mem[41][0]~feeder ( +// Equation(s): +// \RAM|mem[41][0]~feeder_combout = ( \RAM|mem~0_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[41][0]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[41][0]~feeder .extended_lut = "off"; +defparam \RAM|mem[41][0]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[41][0]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X41_Y16_N36 +cyclonev_lcell_comb \RAM|mem[41][1]~106 ( +// Equation(s): +// \RAM|mem[41][1]~106_combout = ( \RAM|Decoder0~32_combout & ( \RAM|Decoder0~4_combout & ( ((\ALU|Mux27~1_combout & (\ALU|Mux30~1_combout & !\ALU|Mux28~1_combout ))) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~32_combout & ( \RAM|Decoder0~4_combout +// & ( \rst[0]~input_o ) ) ) # ( \RAM|Decoder0~32_combout & ( !\RAM|Decoder0~4_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~32_combout & ( !\RAM|Decoder0~4_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\ALU|Mux27~1_combout ), + .datab(!\ALU|Mux30~1_combout ), + .datac(!\rst[0]~input_o ), + .datad(!\ALU|Mux28~1_combout ), + .datae(!\RAM|Decoder0~32_combout ), + .dataf(!\RAM|Decoder0~4_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[41][1]~106_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[41][1]~106 .extended_lut = "off"; +defparam \RAM|mem[41][1]~106 .lut_mask = 64'h0F0F0F0F0F0F1F0F; +defparam \RAM|mem[41][1]~106 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X41_Y16_N14 +dffeas \RAM|mem[41][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[41][0]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[41][1]~106_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[41][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[41][0] .is_wysiwyg = "true"; +defparam \RAM|mem[41][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X51_Y13_N27 +cyclonev_lcell_comb \RAM|Decoder0~17 ( +// Equation(s): +// \RAM|Decoder0~17_combout = ( \ALU|Mux30~1_combout & ( \ALU|Mux27~1_combout & ( !\ALU|Mux28~1_combout ) ) ) + + .dataa(gnd), + .datab(gnd), + .datac(!\ALU|Mux28~1_combout ), + .datad(gnd), + .datae(!\ALU|Mux30~1_combout ), + .dataf(!\ALU|Mux27~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|Decoder0~17_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|Decoder0~17 .extended_lut = "off"; +defparam \RAM|Decoder0~17 .lut_mask = 64'h000000000000F0F0; +defparam \RAM|Decoder0~17 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X45_Y12_N27 +cyclonev_lcell_comb \RAM|mem[40][4]~105 ( +// Equation(s): +// \RAM|mem[40][4]~105_combout = ( \ALU|Mux25~1_combout & ( \RAM|Decoder0~3_combout & ( ((\ALU|Mux24~1_combout & (\RAM|Decoder0~17_combout & !\ALU|Mux26~1_combout ))) # (\rst[0]~input_o ) ) ) ) # ( !\ALU|Mux25~1_combout & ( \RAM|Decoder0~3_combout & ( +// \rst[0]~input_o ) ) ) # ( \ALU|Mux25~1_combout & ( !\RAM|Decoder0~3_combout & ( \rst[0]~input_o ) ) ) # ( !\ALU|Mux25~1_combout & ( !\RAM|Decoder0~3_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\rst[0]~input_o ), + .datab(!\ALU|Mux24~1_combout ), + .datac(!\RAM|Decoder0~17_combout ), + .datad(!\ALU|Mux26~1_combout ), + .datae(!\ALU|Mux25~1_combout ), + .dataf(!\RAM|Decoder0~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[40][4]~105_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[40][4]~105 .extended_lut = "off"; +defparam \RAM|mem[40][4]~105 .lut_mask = 64'h5555555555555755; +defparam \RAM|mem[40][4]~105 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X45_Y12_N28 +dffeas \RAM|mem[40][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[40][4]~105_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[40][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[40][0] .is_wysiwyg = "true"; +defparam \RAM|mem[40][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X41_Y16_N57 +cyclonev_lcell_comb \RAM|mem[43][0]~108 ( +// Equation(s): +// \RAM|mem[43][0]~108_combout = ( \RAM|Decoder0~32_combout & ( \RAM|Decoder0~4_combout & ( ((!\ALU|Mux28~1_combout & \RAM|Decoder0~6_combout )) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~32_combout & ( \RAM|Decoder0~4_combout & ( \rst[0]~input_o ) +// ) ) # ( \RAM|Decoder0~32_combout & ( !\RAM|Decoder0~4_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~32_combout & ( !\RAM|Decoder0~4_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\rst[0]~input_o ), + .datab(!\ALU|Mux28~1_combout ), + .datac(!\RAM|Decoder0~6_combout ), + .datad(gnd), + .datae(!\RAM|Decoder0~32_combout ), + .dataf(!\RAM|Decoder0~4_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[43][0]~108_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[43][0]~108 .extended_lut = "off"; +defparam \RAM|mem[43][0]~108 .lut_mask = 64'h5555555555555D5D; +defparam \RAM|mem[43][0]~108 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X41_Y16_N20 +dffeas \RAM|mem[43][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[43][0]~108_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[43][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[43][0] .is_wysiwyg = "true"; +defparam \RAM|mem[43][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X41_Y16_N18 +cyclonev_lcell_comb \rd[0]~34 ( +// Equation(s): +// \rd[0]~34_combout = ( \RAM|mem[43][0]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & (\RAM|mem[42][0]~q )) # (\ALU|Mux30~1_combout & ((\RAM|mem[40][0]~q ))) ) ) ) # ( !\RAM|mem[43][0]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout +// & (\RAM|mem[42][0]~q )) # (\ALU|Mux30~1_combout & ((\RAM|mem[40][0]~q ))) ) ) ) # ( \RAM|mem[43][0]~q & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout ) # (\RAM|mem[41][0]~q ) ) ) ) # ( !\RAM|mem[43][0]~q & ( !\ALU|Mux31~3_combout & ( +// (\RAM|mem[41][0]~q & \ALU|Mux30~1_combout ) ) ) ) + + .dataa(!\RAM|mem[42][0]~q ), + .datab(!\RAM|mem[41][0]~q ), + .datac(!\RAM|mem[40][0]~q ), + .datad(!\ALU|Mux30~1_combout ), + .datae(!\RAM|mem[43][0]~q ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[0]~34_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[0]~34 .extended_lut = "off"; +defparam \rd[0]~34 .lut_mask = 64'h0033FF33550F550F; +defparam \rd[0]~34 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X41_Y10_N30 +cyclonev_lcell_comb \rd[0]~36 ( +// Equation(s): +// \rd[0]~36_combout = ( \rd[0]~33_combout & ( \rd[0]~34_combout & ( (!\ALU|Mux28~1_combout & (((\rd[0]~35_combout )) # (\ALU|Mux29~3_combout ))) # (\ALU|Mux28~1_combout & ((!\ALU|Mux29~3_combout ) # ((\rd[0]~32_combout )))) ) ) ) # ( !\rd[0]~33_combout +// & ( \rd[0]~34_combout & ( (!\ALU|Mux28~1_combout & (((\rd[0]~35_combout )) # (\ALU|Mux29~3_combout ))) # (\ALU|Mux28~1_combout & (\ALU|Mux29~3_combout & (\rd[0]~32_combout ))) ) ) ) # ( \rd[0]~33_combout & ( !\rd[0]~34_combout & ( +// (!\ALU|Mux28~1_combout & (!\ALU|Mux29~3_combout & ((\rd[0]~35_combout )))) # (\ALU|Mux28~1_combout & ((!\ALU|Mux29~3_combout ) # ((\rd[0]~32_combout )))) ) ) ) # ( !\rd[0]~33_combout & ( !\rd[0]~34_combout & ( (!\ALU|Mux28~1_combout & +// (!\ALU|Mux29~3_combout & ((\rd[0]~35_combout )))) # (\ALU|Mux28~1_combout & (\ALU|Mux29~3_combout & (\rd[0]~32_combout ))) ) ) ) + + .dataa(!\ALU|Mux28~1_combout ), + .datab(!\ALU|Mux29~3_combout ), + .datac(!\rd[0]~32_combout ), + .datad(!\rd[0]~35_combout ), + .datae(!\rd[0]~33_combout ), + .dataf(!\rd[0]~34_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[0]~36_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[0]~36 .extended_lut = "off"; +defparam \rd[0]~36 .lut_mask = 64'h018945CD23AB67EF; +defparam \rd[0]~36 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X41_Y10_N54 +cyclonev_lcell_comb \rd[0]~42 ( +// Equation(s): +// \rd[0]~42_combout = ( \rd[0]~26_combout & ( \rd[0]~36_combout & ( ((!\ALU|Mux26~1_combout & (\rd[0]~41_combout )) # (\ALU|Mux26~1_combout & ((\rd[0]~31_combout )))) # (\ALU|Mux27~1_combout ) ) ) ) # ( !\rd[0]~26_combout & ( \rd[0]~36_combout & ( +// (!\ALU|Mux27~1_combout & ((!\ALU|Mux26~1_combout & (\rd[0]~41_combout )) # (\ALU|Mux26~1_combout & ((\rd[0]~31_combout ))))) # (\ALU|Mux27~1_combout & (((!\ALU|Mux26~1_combout )))) ) ) ) # ( \rd[0]~26_combout & ( !\rd[0]~36_combout & ( +// (!\ALU|Mux27~1_combout & ((!\ALU|Mux26~1_combout & (\rd[0]~41_combout )) # (\ALU|Mux26~1_combout & ((\rd[0]~31_combout ))))) # (\ALU|Mux27~1_combout & (((\ALU|Mux26~1_combout )))) ) ) ) # ( !\rd[0]~26_combout & ( !\rd[0]~36_combout & ( +// (!\ALU|Mux27~1_combout & ((!\ALU|Mux26~1_combout & (\rd[0]~41_combout )) # (\ALU|Mux26~1_combout & ((\rd[0]~31_combout ))))) ) ) ) + + .dataa(!\rd[0]~41_combout ), + .datab(!\ALU|Mux27~1_combout ), + .datac(!\rd[0]~31_combout ), + .datad(!\ALU|Mux26~1_combout ), + .datae(!\rd[0]~26_combout ), + .dataf(!\rd[0]~36_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[0]~42_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[0]~42 .extended_lut = "off"; +defparam \rd[0]~42 .lut_mask = 64'h440C443F770C773F; +defparam \rd[0]~42 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y13_N30 +cyclonev_lcell_comb \rd[3]~457 ( +// Equation(s): +// \rd[3]~457_combout = ( \ALU|adder_unit|OUT_1 [6] & ( \ALU|adder_unit|OUT_1 [7] & ( (\ALU|Mux24~0_combout & (!\ALU|Mux25~0_combout & \ALU|Mux29~0_combout )) ) ) ) # ( !\ALU|adder_unit|OUT_1 [6] & ( \ALU|adder_unit|OUT_1 [7] & ( (!\ALU|Mux25~0_combout & +// ((!\ALU|Mux29~0_combout ) # (\ALU|Mux24~0_combout ))) ) ) ) # ( \ALU|adder_unit|OUT_1 [6] & ( !\ALU|adder_unit|OUT_1 [7] & ( (\ALU|Mux24~0_combout & (!\ALU|Mux25~0_combout & \ALU|Mux29~0_combout )) ) ) ) # ( !\ALU|adder_unit|OUT_1 [6] & ( +// !\ALU|adder_unit|OUT_1 [7] & ( (\ALU|Mux24~0_combout & !\ALU|Mux25~0_combout ) ) ) ) + + .dataa(!\ALU|Mux24~0_combout ), + .datab(gnd), + .datac(!\ALU|Mux25~0_combout ), + .datad(!\ALU|Mux29~0_combout ), + .datae(!\ALU|adder_unit|OUT_1 [6]), + .dataf(!\ALU|adder_unit|OUT_1 [7]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[3]~457_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[3]~457 .extended_lut = "off"; +defparam \rd[3]~457 .lut_mask = 64'h50500050F0500050; +defparam \rd[3]~457 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y13_N51 +cyclonev_lcell_comb \RAM|Decoder0~36 ( +// Equation(s): +// \RAM|Decoder0~36_combout = ( \ALU|adder_unit|OUT_1 [8] & ( \rd[3]~457_combout & ( (\RAM|Decoder0~1_combout & (\ALU|Mux29~0_combout & !\ALU|Mux23~0_combout )) ) ) ) # ( !\ALU|adder_unit|OUT_1 [8] & ( \rd[3]~457_combout & ( (\RAM|Decoder0~1_combout & +// !\ALU|Mux23~0_combout ) ) ) ) + + .dataa(!\RAM|Decoder0~1_combout ), + .datab(!\ALU|Mux29~0_combout ), + .datac(gnd), + .datad(!\ALU|Mux23~0_combout ), + .datae(!\ALU|adder_unit|OUT_1 [8]), + .dataf(!\rd[3]~457_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|Decoder0~36_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|Decoder0~36 .extended_lut = "off"; +defparam \RAM|Decoder0~36 .lut_mask = 64'h0000000055001100; +defparam \RAM|Decoder0~36 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y9_N15 +cyclonev_lcell_comb \RAM|Decoder0~37 ( +// Equation(s): +// \RAM|Decoder0~37_combout = ( \ALU|Mux31~2_combout & ( \RAM|Decoder0~36_combout & ( (\ALU|adder_unit|COUT [0] & (!\ALU|Mux31~0_combout & ((!\ALU|Mux31~1_combout ) # (\ALU|OUT_1~0_combout )))) ) ) ) # ( !\ALU|Mux31~2_combout & ( +// \RAM|Decoder0~36_combout & ( (!\ALU|Mux31~0_combout & ((!\ALU|Mux31~1_combout ) # (!\ALU|adder_unit|COUT [0] $ (\ALU|OUT_1~0_combout )))) ) ) ) + + .dataa(!\ALU|adder_unit|COUT [0]), + .datab(!\ALU|Mux31~1_combout ), + .datac(!\ALU|Mux31~0_combout ), + .datad(!\ALU|OUT_1~0_combout ), + .datae(!\ALU|Mux31~2_combout ), + .dataf(!\RAM|Decoder0~36_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|Decoder0~37_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|Decoder0~37 .extended_lut = "off"; +defparam \RAM|Decoder0~37 .lut_mask = 64'h00000000E0D04050; +defparam \RAM|Decoder0~37 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X45_Y6_N3 +cyclonev_lcell_comb \RAM|mem[148][1]~146 ( +// Equation(s): +// \RAM|mem[148][1]~146_combout = ( \RAM|Decoder0~12_combout & ( \RAM|Decoder0~37_combout & ( ((!\ALU|Mux29~3_combout & \ALU|Mux26~1_combout )) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~12_combout & ( \RAM|Decoder0~37_combout & ( \rst[0]~input_o ) +// ) ) # ( \RAM|Decoder0~12_combout & ( !\RAM|Decoder0~37_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~12_combout & ( !\RAM|Decoder0~37_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\ALU|Mux29~3_combout ), + .datab(!\ALU|Mux26~1_combout ), + .datac(!\rst[0]~input_o ), + .datad(gnd), + .datae(!\RAM|Decoder0~12_combout ), + .dataf(!\RAM|Decoder0~37_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[148][1]~146_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[148][1]~146 .extended_lut = "off"; +defparam \RAM|mem[148][1]~146 .lut_mask = 64'h0F0F0F0F0F0F2F2F; +defparam \RAM|mem[148][1]~146 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X45_Y6_N1 +dffeas \RAM|mem[148][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[148][1]~146_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[148][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[148][0] .is_wysiwyg = "true"; +defparam \RAM|mem[148][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X51_Y8_N42 +cyclonev_lcell_comb \RAM|mem[144][0]~feeder ( +// Equation(s): +// \RAM|mem[144][0]~feeder_combout = ( \RAM|mem~0_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[144][0]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[144][0]~feeder .extended_lut = "off"; +defparam \RAM|mem[144][0]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[144][0]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X51_Y9_N12 +cyclonev_lcell_comb \RAM|mem[144][3]~145 ( +// Equation(s): +// \RAM|mem[144][3]~145_combout = ( \ALU|Mux29~3_combout & ( \RAM|Decoder0~37_combout & ( ((\RAM|Decoder0~7_combout & (\ALU|Mux26~1_combout & \ALU|Mux28~1_combout ))) # (\rst[0]~input_o ) ) ) ) # ( !\ALU|Mux29~3_combout & ( \RAM|Decoder0~37_combout & +// ( \rst[0]~input_o ) ) ) # ( \ALU|Mux29~3_combout & ( !\RAM|Decoder0~37_combout & ( \rst[0]~input_o ) ) ) # ( !\ALU|Mux29~3_combout & ( !\RAM|Decoder0~37_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\RAM|Decoder0~7_combout ), + .datab(!\rst[0]~input_o ), + .datac(!\ALU|Mux26~1_combout ), + .datad(!\ALU|Mux28~1_combout ), + .datae(!\ALU|Mux29~3_combout ), + .dataf(!\RAM|Decoder0~37_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[144][3]~145_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[144][3]~145 .extended_lut = "off"; +defparam \RAM|mem[144][3]~145 .lut_mask = 64'h3333333333333337; +defparam \RAM|mem[144][3]~145 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X51_Y8_N43 +dffeas \RAM|mem[144][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[144][0]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[144][3]~145_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[144][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[144][0] .is_wysiwyg = "true"; +defparam \RAM|mem[144][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X51_Y11_N51 +cyclonev_lcell_comb \RAM|mem[152][3]~147 ( +// Equation(s): +// \RAM|mem[152][3]~147_combout = ( \RAM|Decoder0~7_combout & ( \RAM|Decoder0~37_combout & ( ((!\ALU|Mux28~1_combout & (\ALU|Mux29~3_combout & \ALU|Mux26~1_combout ))) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~7_combout & ( \RAM|Decoder0~37_combout +// & ( \rst[0]~input_o ) ) ) # ( \RAM|Decoder0~7_combout & ( !\RAM|Decoder0~37_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~7_combout & ( !\RAM|Decoder0~37_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\ALU|Mux28~1_combout ), + .datab(!\ALU|Mux29~3_combout ), + .datac(!\ALU|Mux26~1_combout ), + .datad(!\rst[0]~input_o ), + .datae(!\RAM|Decoder0~7_combout ), + .dataf(!\RAM|Decoder0~37_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[152][3]~147_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[152][3]~147 .extended_lut = "off"; +defparam \RAM|mem[152][3]~147 .lut_mask = 64'h00FF00FF00FF02FF; +defparam \RAM|mem[152][3]~147 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X51_Y11_N40 +dffeas \RAM|mem[152][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[152][3]~147_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[152][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[152][0] .is_wysiwyg = "true"; +defparam \RAM|mem[152][0] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y4_N51 +cyclonev_lcell_comb \RAM|mem[156][1]~148 ( +// Equation(s): +// \RAM|mem[156][1]~148_combout = ( \RAM|Decoder0~19_combout & ( \RAM|Decoder0~37_combout & ( ((\ALU|Mux26~1_combout & !\ALU|Mux29~3_combout )) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~19_combout & ( \RAM|Decoder0~37_combout & ( \rst[0]~input_o ) +// ) ) # ( \RAM|Decoder0~19_combout & ( !\RAM|Decoder0~37_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~19_combout & ( !\RAM|Decoder0~37_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\rst[0]~input_o ), + .datab(gnd), + .datac(!\ALU|Mux26~1_combout ), + .datad(!\ALU|Mux29~3_combout ), + .datae(!\RAM|Decoder0~19_combout ), + .dataf(!\RAM|Decoder0~37_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[156][1]~148_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[156][1]~148 .extended_lut = "off"; +defparam \RAM|mem[156][1]~148 .lut_mask = 64'h5555555555555F55; +defparam \RAM|mem[156][1]~148 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X42_Y4_N52 +dffeas \RAM|mem[156][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[156][1]~148_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[156][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[156][0] .is_wysiwyg = "true"; +defparam \RAM|mem[156][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X43_Y6_N39 +cyclonev_lcell_comb \rd[0]~48 ( +// Equation(s): +// \rd[0]~48_combout = ( \ALU|Mux28~1_combout & ( \ALU|Mux29~3_combout & ( \RAM|mem[144][0]~q ) ) ) # ( !\ALU|Mux28~1_combout & ( \ALU|Mux29~3_combout & ( \RAM|mem[152][0]~q ) ) ) # ( \ALU|Mux28~1_combout & ( !\ALU|Mux29~3_combout & ( +// \RAM|mem[148][0]~q ) ) ) # ( !\ALU|Mux28~1_combout & ( !\ALU|Mux29~3_combout & ( \RAM|mem[156][0]~q ) ) ) + + .dataa(!\RAM|mem[148][0]~q ), + .datab(!\RAM|mem[144][0]~q ), + .datac(!\RAM|mem[152][0]~q ), + .datad(!\RAM|mem[156][0]~q ), + .datae(!\ALU|Mux28~1_combout ), + .dataf(!\ALU|Mux29~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[0]~48_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[0]~48 .extended_lut = "off"; +defparam \rd[0]~48 .lut_mask = 64'h00FF55550F0F3333; +defparam \rd[0]~48 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y13_N6 +cyclonev_lcell_comb \RAM|Decoder0~38 ( +// Equation(s): +// \RAM|Decoder0~38_combout = ( \ALU|Mux26~1_combout & ( \rd[3]~457_combout ) ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(!\ALU|Mux26~1_combout ), + .dataf(!\rd[3]~457_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|Decoder0~38_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|Decoder0~38 .extended_lut = "off"; +defparam \RAM|Decoder0~38 .lut_mask = 64'h000000000000FFFF; +defparam \RAM|Decoder0~38 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y12_N48 +cyclonev_lcell_comb \RAM|mem[145][3]~149 ( +// Equation(s): +// \RAM|mem[145][3]~149_combout = ( \ALU|Mux28~1_combout & ( \RAM|Decoder0~4_combout & ( ((!\ALU|Mux27~1_combout & (\RAM|Decoder0~38_combout & \ALU|Mux30~1_combout ))) # (\rst[0]~input_o ) ) ) ) # ( !\ALU|Mux28~1_combout & ( \RAM|Decoder0~4_combout & +// ( \rst[0]~input_o ) ) ) # ( \ALU|Mux28~1_combout & ( !\RAM|Decoder0~4_combout & ( \rst[0]~input_o ) ) ) # ( !\ALU|Mux28~1_combout & ( !\RAM|Decoder0~4_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\ALU|Mux27~1_combout ), + .datab(!\RAM|Decoder0~38_combout ), + .datac(!\rst[0]~input_o ), + .datad(!\ALU|Mux30~1_combout ), + .datae(!\ALU|Mux28~1_combout ), + .dataf(!\RAM|Decoder0~4_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[145][3]~149_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[145][3]~149 .extended_lut = "off"; +defparam \RAM|mem[145][3]~149 .lut_mask = 64'h0F0F0F0F0F0F0F2F; +defparam \RAM|mem[145][3]~149 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X42_Y12_N49 +dffeas \RAM|mem[145][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[145][3]~149_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[145][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[145][0] .is_wysiwyg = "true"; +defparam \RAM|mem[145][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X51_Y12_N9 +cyclonev_lcell_comb \RAM|mem[153][0]~151 ( +// Equation(s): +// \RAM|mem[153][0]~151_combout = ( \RAM|Decoder0~38_combout & ( \RAM|Decoder0~4_combout & ( ((!\ALU|Mux27~1_combout & (\ALU|Mux30~1_combout & !\ALU|Mux28~1_combout ))) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~38_combout & ( +// \RAM|Decoder0~4_combout & ( \rst[0]~input_o ) ) ) # ( \RAM|Decoder0~38_combout & ( !\RAM|Decoder0~4_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~38_combout & ( !\RAM|Decoder0~4_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\ALU|Mux27~1_combout ), + .datab(!\ALU|Mux30~1_combout ), + .datac(!\rst[0]~input_o ), + .datad(!\ALU|Mux28~1_combout ), + .datae(!\RAM|Decoder0~38_combout ), + .dataf(!\RAM|Decoder0~4_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[153][0]~151_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[153][0]~151 .extended_lut = "off"; +defparam \RAM|mem[153][0]~151 .lut_mask = 64'h0F0F0F0F0F0F2F0F; +defparam \RAM|mem[153][0]~151 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X51_Y12_N10 +dffeas \RAM|mem[153][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[153][0]~151_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[153][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[153][0] .is_wysiwyg = "true"; +defparam \RAM|mem[153][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X43_Y8_N24 +cyclonev_lcell_comb \RAM|mem[149][4]~150 ( +// Equation(s): +// \RAM|mem[149][4]~150_combout = ( \RAM|Decoder0~38_combout & ( ((\RAM|Decoder0~16_combout & (!\ALU|Mux27~1_combout & \ALU|Mux30~1_combout ))) # (\rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~38_combout & ( \rst[0]~input_o ) ) + + .dataa(!\rst[0]~input_o ), + .datab(!\RAM|Decoder0~16_combout ), + .datac(!\ALU|Mux27~1_combout ), + .datad(!\ALU|Mux30~1_combout ), + .datae(gnd), + .dataf(!\RAM|Decoder0~38_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[149][4]~150_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[149][4]~150 .extended_lut = "off"; +defparam \RAM|mem[149][4]~150 .lut_mask = 64'h5555555555755575; +defparam \RAM|mem[149][4]~150 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X49_Y11_N40 +dffeas \RAM|mem[149][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[149][4]~150_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[149][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[149][0] .is_wysiwyg = "true"; +defparam \RAM|mem[149][0] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y9_N45 +cyclonev_lcell_comb \RAM|Decoder0~39 ( +// Equation(s): +// \RAM|Decoder0~39_combout = ( \ALU|Mux31~2_combout & ( \RAM|Decoder0~36_combout & ( (!\ALU|adder_unit|COUT [0]) # (((\ALU|Mux31~1_combout & !\ALU|OUT_1~0_combout )) # (\ALU|Mux31~0_combout )) ) ) ) # ( !\ALU|Mux31~2_combout & ( +// \RAM|Decoder0~36_combout & ( ((\ALU|Mux31~1_combout & (!\ALU|adder_unit|COUT [0] $ (!\ALU|OUT_1~0_combout )))) # (\ALU|Mux31~0_combout ) ) ) ) + + .dataa(!\ALU|adder_unit|COUT [0]), + .datab(!\ALU|Mux31~1_combout ), + .datac(!\ALU|Mux31~0_combout ), + .datad(!\ALU|OUT_1~0_combout ), + .datae(!\ALU|Mux31~2_combout ), + .dataf(!\RAM|Decoder0~36_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|Decoder0~39_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|Decoder0~39 .extended_lut = "off"; +defparam \RAM|Decoder0~39 .lut_mask = 64'h000000001F2FBFAF; +defparam \RAM|Decoder0~39 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X47_Y13_N3 +cyclonev_lcell_comb \RAM|mem[157][3]~152 ( +// Equation(s): +// \RAM|mem[157][3]~152_combout = ( \RAM|Decoder0~39_combout & ( \ALU|Mux29~3_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~39_combout & ( \ALU|Mux29~3_combout & ( \rst[0]~input_o ) ) ) # ( \RAM|Decoder0~39_combout & ( !\ALU|Mux29~3_combout & +// ( ((\ALU|Mux26~1_combout & (\RAM|Decoder0~7_combout & !\ALU|Mux28~1_combout ))) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~39_combout & ( !\ALU|Mux29~3_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\rst[0]~input_o ), + .datab(!\ALU|Mux26~1_combout ), + .datac(!\RAM|Decoder0~7_combout ), + .datad(!\ALU|Mux28~1_combout ), + .datae(!\RAM|Decoder0~39_combout ), + .dataf(!\ALU|Mux29~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[157][3]~152_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[157][3]~152 .extended_lut = "off"; +defparam \RAM|mem[157][3]~152 .lut_mask = 64'h5555575555555555; +defparam \RAM|mem[157][3]~152 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X48_Y14_N44 +dffeas \RAM|mem[157][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[157][3]~152_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[157][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[157][0] .is_wysiwyg = "true"; +defparam \RAM|mem[157][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X48_Y14_N42 +cyclonev_lcell_comb \rd[0]~49 ( +// Equation(s): +// \rd[0]~49_combout = ( \RAM|mem[157][0]~q & ( \ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout & ((\RAM|mem[149][0]~q ))) # (\ALU|Mux29~3_combout & (\RAM|mem[145][0]~q )) ) ) ) # ( !\RAM|mem[157][0]~q & ( \ALU|Mux28~1_combout & ( +// (!\ALU|Mux29~3_combout & ((\RAM|mem[149][0]~q ))) # (\ALU|Mux29~3_combout & (\RAM|mem[145][0]~q )) ) ) ) # ( \RAM|mem[157][0]~q & ( !\ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout ) # (\RAM|mem[153][0]~q ) ) ) ) # ( !\RAM|mem[157][0]~q & ( +// !\ALU|Mux28~1_combout & ( (\RAM|mem[153][0]~q & \ALU|Mux29~3_combout ) ) ) ) + + .dataa(!\RAM|mem[145][0]~q ), + .datab(!\RAM|mem[153][0]~q ), + .datac(!\ALU|Mux29~3_combout ), + .datad(!\RAM|mem[149][0]~q ), + .datae(!\RAM|mem[157][0]~q ), + .dataf(!\ALU|Mux28~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[0]~49_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[0]~49 .extended_lut = "off"; +defparam \rd[0]~49 .lut_mask = 64'h0303F3F305F505F5; +defparam \rd[0]~49 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X45_Y15_N21 +cyclonev_lcell_comb \RAM|mem[147][0]~feeder ( +// Equation(s): +// \RAM|mem[147][0]~feeder_combout = ( \RAM|mem~0_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[147][0]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[147][0]~feeder .extended_lut = "off"; +defparam \RAM|mem[147][0]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[147][0]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X45_Y15_N51 +cyclonev_lcell_comb \RAM|mem[147][1]~157 ( +// Equation(s): +// \RAM|mem[147][1]~157_combout = ( \RAM|Decoder0~30_combout & ( \RAM|Decoder0~4_combout & ( ((\ALU|Mux28~1_combout & \rd[3]~457_combout )) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~30_combout & ( \RAM|Decoder0~4_combout & ( \rst[0]~input_o ) ) ) +// # ( \RAM|Decoder0~30_combout & ( !\RAM|Decoder0~4_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~30_combout & ( !\RAM|Decoder0~4_combout & ( \rst[0]~input_o ) ) ) + + .dataa(gnd), + .datab(!\ALU|Mux28~1_combout ), + .datac(!\rst[0]~input_o ), + .datad(!\rd[3]~457_combout ), + .datae(!\RAM|Decoder0~30_combout ), + .dataf(!\RAM|Decoder0~4_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[147][1]~157_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[147][1]~157 .extended_lut = "off"; +defparam \RAM|mem[147][1]~157 .lut_mask = 64'h0F0F0F0F0F0F0F3F; +defparam \RAM|mem[147][1]~157 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X45_Y15_N22 +dffeas \RAM|mem[147][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[147][0]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[147][1]~157_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[147][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[147][0] .is_wysiwyg = "true"; +defparam \RAM|mem[147][0] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y13_N36 +cyclonev_lcell_comb \RAM|mem[155][0]~159 ( +// Equation(s): +// \RAM|mem[155][0]~159_combout = ( \RAM|Decoder0~30_combout & ( ((\rd[3]~457_combout & (!\ALU|Mux28~1_combout & \RAM|Decoder0~4_combout ))) # (\rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~30_combout & ( \rst[0]~input_o ) ) + + .dataa(!\rst[0]~input_o ), + .datab(!\rd[3]~457_combout ), + .datac(!\ALU|Mux28~1_combout ), + .datad(!\RAM|Decoder0~4_combout ), + .datae(gnd), + .dataf(!\RAM|Decoder0~30_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[155][0]~159_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[155][0]~159 .extended_lut = "off"; +defparam \RAM|mem[155][0]~159 .lut_mask = 64'h5555555555755575; +defparam \RAM|mem[155][0]~159 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X42_Y13_N10 +dffeas \RAM|mem[155][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[155][0]~159_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[155][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[155][0] .is_wysiwyg = "true"; +defparam \RAM|mem[155][0] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y13_N12 +cyclonev_lcell_comb \RAM|mem[151][3]~158 ( +// Equation(s): +// \RAM|mem[151][3]~158_combout = ( \RAM|Decoder0~30_combout & ( ((\rd[3]~457_combout & \RAM|Decoder0~16_combout )) # (\rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~30_combout & ( \rst[0]~input_o ) ) + + .dataa(!\rst[0]~input_o ), + .datab(!\rd[3]~457_combout ), + .datac(!\RAM|Decoder0~16_combout ), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|Decoder0~30_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[151][3]~158_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[151][3]~158 .extended_lut = "off"; +defparam \RAM|mem[151][3]~158 .lut_mask = 64'h5555555557575757; +defparam \RAM|mem[151][3]~158 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X43_Y11_N4 +dffeas \RAM|mem[151][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[151][3]~158_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[151][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[151][0] .is_wysiwyg = "true"; +defparam \RAM|mem[151][0] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y13_N42 +cyclonev_lcell_comb \RAM|mem[159][3]~160 ( +// Equation(s): +// \RAM|mem[159][3]~160_combout = ( \RAM|Decoder0~39_combout & ( \RAM|Decoder0~30_combout & ( ((!\ALU|Mux28~1_combout & !\ALU|Mux29~3_combout )) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~39_combout & ( \RAM|Decoder0~30_combout & ( \rst[0]~input_o +// ) ) ) # ( \RAM|Decoder0~39_combout & ( !\RAM|Decoder0~30_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~39_combout & ( !\RAM|Decoder0~30_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\rst[0]~input_o ), + .datab(gnd), + .datac(!\ALU|Mux28~1_combout ), + .datad(!\ALU|Mux29~3_combout ), + .datae(!\RAM|Decoder0~39_combout ), + .dataf(!\RAM|Decoder0~30_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[159][3]~160_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[159][3]~160 .extended_lut = "off"; +defparam \RAM|mem[159][3]~160 .lut_mask = 64'h555555555555F555; +defparam \RAM|mem[159][3]~160 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X43_Y11_N14 +dffeas \RAM|mem[159][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[159][3]~160_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[159][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[159][0] .is_wysiwyg = "true"; +defparam \RAM|mem[159][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X43_Y11_N12 +cyclonev_lcell_comb \rd[0]~51 ( +// Equation(s): +// \rd[0]~51_combout = ( \RAM|mem[159][0]~q & ( \ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout & ((\RAM|mem[151][0]~q ))) # (\ALU|Mux29~3_combout & (\RAM|mem[147][0]~q )) ) ) ) # ( !\RAM|mem[159][0]~q & ( \ALU|Mux28~1_combout & ( +// (!\ALU|Mux29~3_combout & ((\RAM|mem[151][0]~q ))) # (\ALU|Mux29~3_combout & (\RAM|mem[147][0]~q )) ) ) ) # ( \RAM|mem[159][0]~q & ( !\ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout ) # (\RAM|mem[155][0]~q ) ) ) ) # ( !\RAM|mem[159][0]~q & ( +// !\ALU|Mux28~1_combout & ( (\RAM|mem[155][0]~q & \ALU|Mux29~3_combout ) ) ) ) + + .dataa(!\RAM|mem[147][0]~q ), + .datab(!\RAM|mem[155][0]~q ), + .datac(!\ALU|Mux29~3_combout ), + .datad(!\RAM|mem[151][0]~q ), + .datae(!\RAM|mem[159][0]~q ), + .dataf(!\ALU|Mux28~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[0]~51_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[0]~51 .extended_lut = "off"; +defparam \rd[0]~51 .lut_mask = 64'h0303F3F305F505F5; +defparam \rd[0]~51 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X48_Y6_N3 +cyclonev_lcell_comb \RAM|mem[146][0]~feeder ( +// Equation(s): +// \RAM|mem[146][0]~feeder_combout = ( \RAM|mem~0_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[146][0]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[146][0]~feeder .extended_lut = "off"; +defparam \RAM|mem[146][0]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[146][0]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X48_Y7_N6 +cyclonev_lcell_comb \RAM|mem[146][4]~153 ( +// Equation(s): +// \RAM|mem[146][4]~153_combout = ( \RAM|Decoder0~37_combout & ( \ALU|Mux29~3_combout & ( ((\ALU|Mux28~1_combout & \RAM|Decoder0~30_combout )) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~37_combout & ( \ALU|Mux29~3_combout & ( \rst[0]~input_o ) ) ) +// # ( \RAM|Decoder0~37_combout & ( !\ALU|Mux29~3_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~37_combout & ( !\ALU|Mux29~3_combout & ( \rst[0]~input_o ) ) ) + + .dataa(gnd), + .datab(!\ALU|Mux28~1_combout ), + .datac(!\rst[0]~input_o ), + .datad(!\RAM|Decoder0~30_combout ), + .datae(!\RAM|Decoder0~37_combout ), + .dataf(!\ALU|Mux29~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[146][4]~153_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[146][4]~153 .extended_lut = "off"; +defparam \RAM|mem[146][4]~153 .lut_mask = 64'h0F0F0F0F0F0F0F3F; +defparam \RAM|mem[146][4]~153 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X48_Y6_N4 +dffeas \RAM|mem[146][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[146][0]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[146][4]~153_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[146][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[146][0] .is_wysiwyg = "true"; +defparam \RAM|mem[146][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X49_Y5_N39 +cyclonev_lcell_comb \RAM|mem[154][0]~feeder ( +// Equation(s): +// \RAM|mem[154][0]~feeder_combout = ( \RAM|mem~0_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[154][0]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[154][0]~feeder .extended_lut = "off"; +defparam \RAM|mem[154][0]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[154][0]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X46_Y6_N6 +cyclonev_lcell_comb \RAM|mem[154][2]~155 ( +// Equation(s): +// \RAM|mem[154][2]~155_combout = ( \RAM|Decoder0~30_combout & ( \RAM|Decoder0~37_combout & ( ((\ALU|Mux29~3_combout & !\ALU|Mux28~1_combout )) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~30_combout & ( \RAM|Decoder0~37_combout & ( \rst[0]~input_o ) +// ) ) # ( \RAM|Decoder0~30_combout & ( !\RAM|Decoder0~37_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~30_combout & ( !\RAM|Decoder0~37_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\rst[0]~input_o ), + .datab(!\ALU|Mux29~3_combout ), + .datac(!\ALU|Mux28~1_combout ), + .datad(gnd), + .datae(!\RAM|Decoder0~30_combout ), + .dataf(!\RAM|Decoder0~37_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[154][2]~155_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[154][2]~155 .extended_lut = "off"; +defparam \RAM|mem[154][2]~155 .lut_mask = 64'h5555555555557575; +defparam \RAM|mem[154][2]~155 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X49_Y5_N40 +dffeas \RAM|mem[154][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[154][0]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[154][2]~155_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[154][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[154][0] .is_wysiwyg = "true"; +defparam \RAM|mem[154][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X49_Y16_N27 +cyclonev_lcell_comb \RAM|mem[150][0]~feeder ( +// Equation(s): +// \RAM|mem[150][0]~feeder_combout = ( \RAM|mem~0_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[150][0]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[150][0]~feeder .extended_lut = "off"; +defparam \RAM|mem[150][0]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[150][0]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X49_Y7_N54 +cyclonev_lcell_comb \RAM|mem[150][3]~154 ( +// Equation(s): +// \RAM|mem[150][3]~154_combout = ( \RAM|Decoder0~30_combout & ( \RAM|Decoder0~37_combout & ( ((!\ALU|Mux29~3_combout & \ALU|Mux28~1_combout )) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~30_combout & ( \RAM|Decoder0~37_combout & ( \rst[0]~input_o ) +// ) ) # ( \RAM|Decoder0~30_combout & ( !\RAM|Decoder0~37_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~30_combout & ( !\RAM|Decoder0~37_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\rst[0]~input_o ), + .datab(!\ALU|Mux29~3_combout ), + .datac(gnd), + .datad(!\ALU|Mux28~1_combout ), + .datae(!\RAM|Decoder0~30_combout ), + .dataf(!\RAM|Decoder0~37_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[150][3]~154_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[150][3]~154 .extended_lut = "off"; +defparam \RAM|mem[150][3]~154 .lut_mask = 64'h55555555555555DD; +defparam \RAM|mem[150][3]~154 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X49_Y16_N28 +dffeas \RAM|mem[150][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[150][0]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[150][3]~154_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[150][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[150][0] .is_wysiwyg = "true"; +defparam \RAM|mem[150][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X46_Y6_N12 +cyclonev_lcell_comb \RAM|mem[158][0]~feeder ( +// Equation(s): +// \RAM|mem[158][0]~feeder_combout = ( \RAM|mem~0_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[158][0]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[158][0]~feeder .extended_lut = "off"; +defparam \RAM|mem[158][0]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[158][0]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X46_Y6_N36 +cyclonev_lcell_comb \RAM|mem[158][4]~156 ( +// Equation(s): +// \RAM|mem[158][4]~156_combout = ( \RAM|Decoder0~30_combout & ( \RAM|Decoder0~37_combout & ( ((!\ALU|Mux28~1_combout & !\ALU|Mux29~3_combout )) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~30_combout & ( \RAM|Decoder0~37_combout & ( \rst[0]~input_o +// ) ) ) # ( \RAM|Decoder0~30_combout & ( !\RAM|Decoder0~37_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~30_combout & ( !\RAM|Decoder0~37_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\ALU|Mux28~1_combout ), + .datab(!\ALU|Mux29~3_combout ), + .datac(!\rst[0]~input_o ), + .datad(gnd), + .datae(!\RAM|Decoder0~30_combout ), + .dataf(!\RAM|Decoder0~37_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[158][4]~156_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[158][4]~156 .extended_lut = "off"; +defparam \RAM|mem[158][4]~156 .lut_mask = 64'h0F0F0F0F0F0F8F8F; +defparam \RAM|mem[158][4]~156 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X46_Y6_N13 +dffeas \RAM|mem[158][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[158][0]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[158][4]~156_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[158][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[158][0] .is_wysiwyg = "true"; +defparam \RAM|mem[158][0] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X47_Y9_N15 +cyclonev_lcell_comb \rd[0]~50 ( +// Equation(s): +// \rd[0]~50_combout = ( \ALU|Mux29~3_combout & ( \ALU|Mux28~1_combout & ( \RAM|mem[146][0]~q ) ) ) # ( !\ALU|Mux29~3_combout & ( \ALU|Mux28~1_combout & ( \RAM|mem[150][0]~q ) ) ) # ( \ALU|Mux29~3_combout & ( !\ALU|Mux28~1_combout & ( +// \RAM|mem[154][0]~q ) ) ) # ( !\ALU|Mux29~3_combout & ( !\ALU|Mux28~1_combout & ( \RAM|mem[158][0]~q ) ) ) + + .dataa(!\RAM|mem[146][0]~q ), + .datab(!\RAM|mem[154][0]~q ), + .datac(!\RAM|mem[150][0]~q ), + .datad(!\RAM|mem[158][0]~q ), + .datae(!\ALU|Mux29~3_combout ), + .dataf(!\ALU|Mux28~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[0]~50_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[0]~50 .extended_lut = "off"; +defparam \rd[0]~50 .lut_mask = 64'h00FF33330F0F5555; +defparam \rd[0]~50 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y10_N18 +cyclonev_lcell_comb \rd[0]~52 ( +// Equation(s): +// \rd[0]~52_combout = ( \rd[0]~50_combout & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout ) # (\rd[0]~48_combout ) ) ) ) # ( !\rd[0]~50_combout & ( \ALU|Mux31~3_combout & ( (\ALU|Mux30~1_combout & \rd[0]~48_combout ) ) ) ) # ( \rd[0]~50_combout & +// ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & ((\rd[0]~51_combout ))) # (\ALU|Mux30~1_combout & (\rd[0]~49_combout )) ) ) ) # ( !\rd[0]~50_combout & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & ((\rd[0]~51_combout ))) # +// (\ALU|Mux30~1_combout & (\rd[0]~49_combout )) ) ) ) + + .dataa(!\ALU|Mux30~1_combout ), + .datab(!\rd[0]~48_combout ), + .datac(!\rd[0]~49_combout ), + .datad(!\rd[0]~51_combout ), + .datae(!\rd[0]~50_combout ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[0]~52_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[0]~52 .extended_lut = "off"; +defparam \rd[0]~52 .lut_mask = 64'h05AF05AF1111BBBB; +defparam \rd[0]~52 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X45_Y4_N12 +cyclonev_lcell_comb \RAM|mem[186][0]~187 ( +// Equation(s): +// \RAM|mem[186][0]~187_combout = ( \RAM|Decoder0~8_combout & ( \RAM|Decoder0~37_combout & ( ((!\ALU|Mux26~1_combout & (\ALU|Mux29~3_combout & !\ALU|Mux28~1_combout ))) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~8_combout & ( +// \RAM|Decoder0~37_combout & ( \rst[0]~input_o ) ) ) # ( \RAM|Decoder0~8_combout & ( !\RAM|Decoder0~37_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~8_combout & ( !\RAM|Decoder0~37_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\ALU|Mux26~1_combout ), + .datab(!\rst[0]~input_o ), + .datac(!\ALU|Mux29~3_combout ), + .datad(!\ALU|Mux28~1_combout ), + .datae(!\RAM|Decoder0~8_combout ), + .dataf(!\RAM|Decoder0~37_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[186][0]~187_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[186][0]~187 .extended_lut = "off"; +defparam \RAM|mem[186][0]~187 .lut_mask = 64'h3333333333333B33; +defparam \RAM|mem[186][0]~187 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X45_Y4_N46 +dffeas \RAM|mem[186][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[186][0]~187_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[186][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[186][0] .is_wysiwyg = "true"; +defparam \RAM|mem[186][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X45_Y6_N51 +cyclonev_lcell_comb \RAM|mem[178][0]~feeder ( +// Equation(s): +// \RAM|mem[178][0]~feeder_combout = ( \RAM|mem~0_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[178][0]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[178][0]~feeder .extended_lut = "off"; +defparam \RAM|mem[178][0]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[178][0]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X45_Y6_N54 +cyclonev_lcell_comb \RAM|mem[178][3]~185 ( +// Equation(s): +// \RAM|mem[178][3]~185_combout = ( \ALU|Mux28~1_combout & ( \RAM|Decoder0~37_combout & ( ((\ALU|Mux29~3_combout & (\RAM|Decoder0~8_combout & !\ALU|Mux26~1_combout ))) # (\rst[0]~input_o ) ) ) ) # ( !\ALU|Mux28~1_combout & ( \RAM|Decoder0~37_combout & +// ( \rst[0]~input_o ) ) ) # ( \ALU|Mux28~1_combout & ( !\RAM|Decoder0~37_combout & ( \rst[0]~input_o ) ) ) # ( !\ALU|Mux28~1_combout & ( !\RAM|Decoder0~37_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\ALU|Mux29~3_combout ), + .datab(!\rst[0]~input_o ), + .datac(!\RAM|Decoder0~8_combout ), + .datad(!\ALU|Mux26~1_combout ), + .datae(!\ALU|Mux28~1_combout ), + .dataf(!\RAM|Decoder0~37_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[178][3]~185_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[178][3]~185 .extended_lut = "off"; +defparam \RAM|mem[178][3]~185 .lut_mask = 64'h3333333333333733; +defparam \RAM|mem[178][3]~185 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X45_Y6_N53 +dffeas \RAM|mem[178][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[178][0]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[178][3]~185_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[178][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[178][0] .is_wysiwyg = "true"; +defparam \RAM|mem[178][0] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y12_N39 +cyclonev_lcell_comb \RAM|mem[182][0]~feeder ( +// Equation(s): +// \RAM|mem[182][0]~feeder_combout = ( \RAM|mem~0_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[182][0]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[182][0]~feeder .extended_lut = "off"; +defparam \RAM|mem[182][0]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[182][0]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X45_Y8_N24 +cyclonev_lcell_comb \RAM|Decoder0~13 ( +// Equation(s): +// \RAM|Decoder0~13_combout = ( !\ALU|Mux27~1_combout & ( (!\ALU|Mux30~1_combout & \ALU|Mux28~1_combout ) ) ) + + .dataa(gnd), + .datab(gnd), + .datac(!\ALU|Mux30~1_combout ), + .datad(!\ALU|Mux28~1_combout ), + .datae(gnd), + .dataf(!\ALU|Mux27~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|Decoder0~13_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|Decoder0~13 .extended_lut = "off"; +defparam \RAM|Decoder0~13 .lut_mask = 64'h00F000F000000000; +defparam \RAM|Decoder0~13 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X45_Y8_N18 +cyclonev_lcell_comb \RAM|mem[182][0]~186 ( +// Equation(s): +// \RAM|mem[182][0]~186_combout = ( \ALU|Mux29~3_combout & ( \RAM|Decoder0~37_combout & ( \rst[0]~input_o ) ) ) # ( !\ALU|Mux29~3_combout & ( \RAM|Decoder0~37_combout & ( ((\RAM|Decoder0~13_combout & !\ALU|Mux26~1_combout )) # (\rst[0]~input_o ) ) ) ) +// # ( \ALU|Mux29~3_combout & ( !\RAM|Decoder0~37_combout & ( \rst[0]~input_o ) ) ) # ( !\ALU|Mux29~3_combout & ( !\RAM|Decoder0~37_combout & ( \rst[0]~input_o ) ) ) + + .dataa(gnd), + .datab(!\rst[0]~input_o ), + .datac(!\RAM|Decoder0~13_combout ), + .datad(!\ALU|Mux26~1_combout ), + .datae(!\ALU|Mux29~3_combout ), + .dataf(!\RAM|Decoder0~37_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[182][0]~186_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[182][0]~186 .extended_lut = "off"; +defparam \RAM|mem[182][0]~186 .lut_mask = 64'h333333333F333333; +defparam \RAM|mem[182][0]~186 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X42_Y12_N40 +dffeas \RAM|mem[182][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[182][0]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[182][0]~186_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[182][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[182][0] .is_wysiwyg = "true"; +defparam \RAM|mem[182][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X45_Y7_N18 +cyclonev_lcell_comb \RAM|mem[190][2]~188 ( +// Equation(s): +// \RAM|mem[190][2]~188_combout = ( \RAM|Decoder0~8_combout & ( ((\RAM|Decoder0~22_combout & \RAM|Decoder0~37_combout )) # (\rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~8_combout & ( \rst[0]~input_o ) ) + + .dataa(!\RAM|Decoder0~22_combout ), + .datab(!\rst[0]~input_o ), + .datac(gnd), + .datad(!\RAM|Decoder0~37_combout ), + .datae(gnd), + .dataf(!\RAM|Decoder0~8_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[190][2]~188_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[190][2]~188 .extended_lut = "off"; +defparam \RAM|mem[190][2]~188 .lut_mask = 64'h3333333333773377; +defparam \RAM|mem[190][2]~188 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X45_Y7_N14 +dffeas \RAM|mem[190][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[190][2]~188_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[190][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[190][0] .is_wysiwyg = "true"; +defparam \RAM|mem[190][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X45_Y7_N12 +cyclonev_lcell_comb \rd[0]~60 ( +// Equation(s): +// \rd[0]~60_combout = ( \RAM|mem[190][0]~q & ( \ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout & ((\RAM|mem[182][0]~q ))) # (\ALU|Mux29~3_combout & (\RAM|mem[178][0]~q )) ) ) ) # ( !\RAM|mem[190][0]~q & ( \ALU|Mux28~1_combout & ( +// (!\ALU|Mux29~3_combout & ((\RAM|mem[182][0]~q ))) # (\ALU|Mux29~3_combout & (\RAM|mem[178][0]~q )) ) ) ) # ( \RAM|mem[190][0]~q & ( !\ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout ) # (\RAM|mem[186][0]~q ) ) ) ) # ( !\RAM|mem[190][0]~q & ( +// !\ALU|Mux28~1_combout & ( (\RAM|mem[186][0]~q & \ALU|Mux29~3_combout ) ) ) ) + + .dataa(!\RAM|mem[186][0]~q ), + .datab(!\RAM|mem[178][0]~q ), + .datac(!\RAM|mem[182][0]~q ), + .datad(!\ALU|Mux29~3_combout ), + .datae(!\RAM|mem[190][0]~q ), + .dataf(!\ALU|Mux28~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[0]~60_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[0]~60 .extended_lut = "off"; +defparam \rd[0]~60 .lut_mask = 64'h0055FF550F330F33; +defparam \rd[0]~60 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y13_N39 +cyclonev_lcell_comb \RAM|Decoder0~40 ( +// Equation(s): +// \RAM|Decoder0~40_combout = (\rd[3]~457_combout & !\ALU|Mux26~1_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(!\rd[3]~457_combout ), + .datad(!\ALU|Mux26~1_combout ), + .datae(gnd), + .dataf(gnd), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|Decoder0~40_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|Decoder0~40 .extended_lut = "off"; +defparam \RAM|Decoder0~40 .lut_mask = 64'h0F000F000F000F00; +defparam \RAM|Decoder0~40 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X43_Y11_N45 +cyclonev_lcell_comb \RAM|mem[183][4]~190 ( +// Equation(s): +// \RAM|mem[183][4]~190_combout = ( \RAM|Decoder0~16_combout & ( ((\RAM|Decoder0~40_combout & \RAM|Decoder0~8_combout )) # (\rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~16_combout & ( \rst[0]~input_o ) ) + + .dataa(!\RAM|Decoder0~40_combout ), + .datab(!\rst[0]~input_o ), + .datac(!\RAM|Decoder0~8_combout ), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|Decoder0~16_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[183][4]~190_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[183][4]~190 .extended_lut = "off"; +defparam \RAM|mem[183][4]~190 .lut_mask = 64'h3333333337373737; +defparam \RAM|mem[183][4]~190 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X43_Y11_N22 +dffeas \RAM|mem[183][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[183][4]~190_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[183][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[183][0] .is_wysiwyg = "true"; +defparam \RAM|mem[183][0] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y5_N33 +cyclonev_lcell_comb \RAM|mem[179][4]~189 ( +// Equation(s): +// \RAM|mem[179][4]~189_combout = ( \ALU|Mux28~1_combout & ( \RAM|Decoder0~4_combout & ( ((\RAM|Decoder0~40_combout & \RAM|Decoder0~8_combout )) # (\rst[0]~input_o ) ) ) ) # ( !\ALU|Mux28~1_combout & ( \RAM|Decoder0~4_combout & ( \rst[0]~input_o ) ) ) +// # ( \ALU|Mux28~1_combout & ( !\RAM|Decoder0~4_combout & ( \rst[0]~input_o ) ) ) # ( !\ALU|Mux28~1_combout & ( !\RAM|Decoder0~4_combout & ( \rst[0]~input_o ) ) ) + + .dataa(gnd), + .datab(!\RAM|Decoder0~40_combout ), + .datac(!\rst[0]~input_o ), + .datad(!\RAM|Decoder0~8_combout ), + .datae(!\ALU|Mux28~1_combout ), + .dataf(!\RAM|Decoder0~4_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[179][4]~189_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[179][4]~189 .extended_lut = "off"; +defparam \RAM|mem[179][4]~189 .lut_mask = 64'h0F0F0F0F0F0F0F3F; +defparam \RAM|mem[179][4]~189 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X42_Y5_N34 +dffeas \RAM|mem[179][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[179][4]~189_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[179][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[179][0] .is_wysiwyg = "true"; +defparam \RAM|mem[179][0] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y6_N45 +cyclonev_lcell_comb \RAM|mem[187][0]~191 ( +// Equation(s): +// \RAM|mem[187][0]~191_combout = ( \ALU|Mux28~1_combout & ( \RAM|Decoder0~4_combout & ( \rst[0]~input_o ) ) ) # ( !\ALU|Mux28~1_combout & ( \RAM|Decoder0~4_combout & ( ((\RAM|Decoder0~40_combout & \RAM|Decoder0~8_combout )) # (\rst[0]~input_o ) ) ) ) +// # ( \ALU|Mux28~1_combout & ( !\RAM|Decoder0~4_combout & ( \rst[0]~input_o ) ) ) # ( !\ALU|Mux28~1_combout & ( !\RAM|Decoder0~4_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\rst[0]~input_o ), + .datab(!\RAM|Decoder0~40_combout ), + .datac(!\RAM|Decoder0~8_combout ), + .datad(gnd), + .datae(!\ALU|Mux28~1_combout ), + .dataf(!\RAM|Decoder0~4_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[187][0]~191_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[187][0]~191 .extended_lut = "off"; +defparam \RAM|mem[187][0]~191 .lut_mask = 64'h5555555557575555; +defparam \RAM|mem[187][0]~191 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X43_Y6_N59 +dffeas \RAM|mem[187][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[187][0]~191_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[187][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[187][0] .is_wysiwyg = "true"; +defparam \RAM|mem[187][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X43_Y6_N42 +cyclonev_lcell_comb \RAM|mem[191][2]~192 ( +// Equation(s): +// \RAM|mem[191][2]~192_combout = ( \RAM|Decoder0~39_combout & ( ((\RAM|Decoder0~8_combout & \RAM|Decoder0~22_combout )) # (\rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~39_combout & ( \rst[0]~input_o ) ) + + .dataa(!\RAM|Decoder0~8_combout ), + .datab(gnd), + .datac(!\rst[0]~input_o ), + .datad(!\RAM|Decoder0~22_combout ), + .datae(gnd), + .dataf(!\RAM|Decoder0~39_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[191][2]~192_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[191][2]~192 .extended_lut = "off"; +defparam \RAM|mem[191][2]~192 .lut_mask = 64'h0F0F0F0F0F5F0F5F; +defparam \RAM|mem[191][2]~192 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X43_Y6_N32 +dffeas \RAM|mem[191][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[191][2]~192_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[191][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[191][0] .is_wysiwyg = "true"; +defparam \RAM|mem[191][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X43_Y6_N30 +cyclonev_lcell_comb \rd[0]~61 ( +// Equation(s): +// \rd[0]~61_combout = ( \RAM|mem[191][0]~q & ( \ALU|Mux29~3_combout & ( (!\ALU|Mux28~1_combout & ((\RAM|mem[187][0]~q ))) # (\ALU|Mux28~1_combout & (\RAM|mem[179][0]~q )) ) ) ) # ( !\RAM|mem[191][0]~q & ( \ALU|Mux29~3_combout & ( +// (!\ALU|Mux28~1_combout & ((\RAM|mem[187][0]~q ))) # (\ALU|Mux28~1_combout & (\RAM|mem[179][0]~q )) ) ) ) # ( \RAM|mem[191][0]~q & ( !\ALU|Mux29~3_combout & ( (!\ALU|Mux28~1_combout ) # (\RAM|mem[183][0]~q ) ) ) ) # ( !\RAM|mem[191][0]~q & ( +// !\ALU|Mux29~3_combout & ( (\RAM|mem[183][0]~q & \ALU|Mux28~1_combout ) ) ) ) + + .dataa(!\RAM|mem[183][0]~q ), + .datab(!\RAM|mem[179][0]~q ), + .datac(!\ALU|Mux28~1_combout ), + .datad(!\RAM|mem[187][0]~q ), + .datae(!\RAM|mem[191][0]~q ), + .dataf(!\ALU|Mux29~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[0]~61_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[0]~61 .extended_lut = "off"; +defparam \rd[0]~61 .lut_mask = 64'h0505F5F503F303F3; +defparam \rd[0]~61 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X49_Y6_N45 +cyclonev_lcell_comb \RAM|mem[177][3]~181 ( +// Equation(s): +// \RAM|mem[177][3]~181_combout = ( \RAM|Decoder0~4_combout & ( \ALU|Mux30~1_combout & ( ((\RAM|Decoder0~40_combout & (\ALU|Mux28~1_combout & !\ALU|Mux27~1_combout ))) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~4_combout & ( \ALU|Mux30~1_combout & +// ( \rst[0]~input_o ) ) ) # ( \RAM|Decoder0~4_combout & ( !\ALU|Mux30~1_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~4_combout & ( !\ALU|Mux30~1_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\rst[0]~input_o ), + .datab(!\RAM|Decoder0~40_combout ), + .datac(!\ALU|Mux28~1_combout ), + .datad(!\ALU|Mux27~1_combout ), + .datae(!\RAM|Decoder0~4_combout ), + .dataf(!\ALU|Mux30~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[177][3]~181_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[177][3]~181 .extended_lut = "off"; +defparam \RAM|mem[177][3]~181 .lut_mask = 64'h5555555555555755; +defparam \RAM|mem[177][3]~181 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X49_Y6_N46 +dffeas \RAM|mem[177][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[177][3]~181_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[177][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[177][0] .is_wysiwyg = "true"; +defparam \RAM|mem[177][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X49_Y11_N45 +cyclonev_lcell_comb \RAM|mem[181][4]~182 ( +// Equation(s): +// \RAM|mem[181][4]~182_combout = ( \RAM|Decoder0~40_combout & ( \RAM|Decoder0~16_combout & ( ((\ALU|Mux30~1_combout & !\ALU|Mux27~1_combout )) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~40_combout & ( \RAM|Decoder0~16_combout & ( \rst[0]~input_o ) +// ) ) # ( \RAM|Decoder0~40_combout & ( !\RAM|Decoder0~16_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~40_combout & ( !\RAM|Decoder0~16_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\ALU|Mux30~1_combout ), + .datab(!\rst[0]~input_o ), + .datac(!\ALU|Mux27~1_combout ), + .datad(gnd), + .datae(!\RAM|Decoder0~40_combout ), + .dataf(!\RAM|Decoder0~16_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[181][4]~182_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[181][4]~182 .extended_lut = "off"; +defparam \RAM|mem[181][4]~182 .lut_mask = 64'h3333333333337373; +defparam \RAM|mem[181][4]~182 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X49_Y11_N46 +dffeas \RAM|mem[181][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[181][4]~182_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[181][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[181][0] .is_wysiwyg = "true"; +defparam \RAM|mem[181][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X51_Y12_N3 +cyclonev_lcell_comb \RAM|mem[185][4]~183 ( +// Equation(s): +// \RAM|mem[185][4]~183_combout = ( \RAM|Decoder0~40_combout & ( \RAM|Decoder0~4_combout & ( ((!\ALU|Mux27~1_combout & (\ALU|Mux30~1_combout & !\ALU|Mux28~1_combout ))) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~40_combout & ( +// \RAM|Decoder0~4_combout & ( \rst[0]~input_o ) ) ) # ( \RAM|Decoder0~40_combout & ( !\RAM|Decoder0~4_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~40_combout & ( !\RAM|Decoder0~4_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\ALU|Mux27~1_combout ), + .datab(!\ALU|Mux30~1_combout ), + .datac(!\rst[0]~input_o ), + .datad(!\ALU|Mux28~1_combout ), + .datae(!\RAM|Decoder0~40_combout ), + .dataf(!\RAM|Decoder0~4_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[185][4]~183_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[185][4]~183 .extended_lut = "off"; +defparam \RAM|mem[185][4]~183 .lut_mask = 64'h0F0F0F0F0F0F2F0F; +defparam \RAM|mem[185][4]~183 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X51_Y12_N4 +dffeas \RAM|mem[185][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[185][4]~183_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[185][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[185][0] .is_wysiwyg = "true"; +defparam \RAM|mem[185][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X45_Y7_N54 +cyclonev_lcell_comb \RAM|mem[189][3]~184 ( +// Equation(s): +// \RAM|mem[189][3]~184_combout = ( \RAM|Decoder0~39_combout & ( ((\RAM|Decoder0~22_combout & \RAM|Decoder0~7_combout )) # (\rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~39_combout & ( \rst[0]~input_o ) ) + + .dataa(!\RAM|Decoder0~22_combout ), + .datab(!\rst[0]~input_o ), + .datac(!\RAM|Decoder0~7_combout ), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|Decoder0~39_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[189][3]~184_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[189][3]~184 .extended_lut = "off"; +defparam \RAM|mem[189][3]~184 .lut_mask = 64'h3333333337373737; +defparam \RAM|mem[189][3]~184 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X48_Y13_N23 +dffeas \RAM|mem[189][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[189][3]~184_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[189][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[189][0] .is_wysiwyg = "true"; +defparam \RAM|mem[189][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X48_Y13_N21 +cyclonev_lcell_comb \rd[0]~59 ( +// Equation(s): +// \rd[0]~59_combout = ( \RAM|mem[189][0]~q & ( \ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout & ((\RAM|mem[181][0]~q ))) # (\ALU|Mux29~3_combout & (\RAM|mem[177][0]~q )) ) ) ) # ( !\RAM|mem[189][0]~q & ( \ALU|Mux28~1_combout & ( +// (!\ALU|Mux29~3_combout & ((\RAM|mem[181][0]~q ))) # (\ALU|Mux29~3_combout & (\RAM|mem[177][0]~q )) ) ) ) # ( \RAM|mem[189][0]~q & ( !\ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout ) # (\RAM|mem[185][0]~q ) ) ) ) # ( !\RAM|mem[189][0]~q & ( +// !\ALU|Mux28~1_combout & ( (\ALU|Mux29~3_combout & \RAM|mem[185][0]~q ) ) ) ) + + .dataa(!\RAM|mem[177][0]~q ), + .datab(!\RAM|mem[181][0]~q ), + .datac(!\ALU|Mux29~3_combout ), + .datad(!\RAM|mem[185][0]~q ), + .datae(!\RAM|mem[189][0]~q ), + .dataf(!\ALU|Mux28~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[0]~59_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[0]~59 .extended_lut = "off"; +defparam \rd[0]~59 .lut_mask = 64'h000FF0FF35353535; +defparam \rd[0]~59 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X51_Y8_N48 +cyclonev_lcell_comb \RAM|mem[176][1]~177 ( +// Equation(s): +// \RAM|mem[176][1]~177_combout = ( \RAM|Decoder0~7_combout & ( \RAM|Decoder0~37_combout & ( ((\ALU|Mux28~1_combout & (!\ALU|Mux26~1_combout & \ALU|Mux29~3_combout ))) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~7_combout & ( \RAM|Decoder0~37_combout +// & ( \rst[0]~input_o ) ) ) # ( \RAM|Decoder0~7_combout & ( !\RAM|Decoder0~37_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~7_combout & ( !\RAM|Decoder0~37_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\ALU|Mux28~1_combout ), + .datab(!\rst[0]~input_o ), + .datac(!\ALU|Mux26~1_combout ), + .datad(!\ALU|Mux29~3_combout ), + .datae(!\RAM|Decoder0~7_combout ), + .dataf(!\RAM|Decoder0~37_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[176][1]~177_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[176][1]~177 .extended_lut = "off"; +defparam \RAM|mem[176][1]~177 .lut_mask = 64'h3333333333333373; +defparam \RAM|mem[176][1]~177 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X51_Y8_N50 +dffeas \RAM|mem[176][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[176][1]~177_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[176][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[176][0] .is_wysiwyg = "true"; +defparam \RAM|mem[176][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X51_Y8_N33 +cyclonev_lcell_comb \RAM|mem[184][4]~179 ( +// Equation(s): +// \RAM|mem[184][4]~179_combout = ( \RAM|Decoder0~7_combout & ( \RAM|Decoder0~37_combout & ( ((!\ALU|Mux28~1_combout & (\ALU|Mux29~3_combout & !\ALU|Mux26~1_combout ))) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~7_combout & ( +// \RAM|Decoder0~37_combout & ( \rst[0]~input_o ) ) ) # ( \RAM|Decoder0~7_combout & ( !\RAM|Decoder0~37_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~7_combout & ( !\RAM|Decoder0~37_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\ALU|Mux28~1_combout ), + .datab(!\rst[0]~input_o ), + .datac(!\ALU|Mux29~3_combout ), + .datad(!\ALU|Mux26~1_combout ), + .datae(!\RAM|Decoder0~7_combout ), + .dataf(!\RAM|Decoder0~37_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[184][4]~179_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[184][4]~179 .extended_lut = "off"; +defparam \RAM|mem[184][4]~179 .lut_mask = 64'h3333333333333B33; +defparam \RAM|mem[184][4]~179 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X51_Y11_N29 +dffeas \RAM|mem[184][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[184][4]~179_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[184][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[184][0] .is_wysiwyg = "true"; +defparam \RAM|mem[184][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X45_Y6_N45 +cyclonev_lcell_comb \RAM|mem[180][4]~178 ( +// Equation(s): +// \RAM|mem[180][4]~178_combout = ( \RAM|Decoder0~12_combout & ( \RAM|Decoder0~37_combout & ( ((!\ALU|Mux26~1_combout & !\ALU|Mux29~3_combout )) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~12_combout & ( \RAM|Decoder0~37_combout & ( \rst[0]~input_o +// ) ) ) # ( \RAM|Decoder0~12_combout & ( !\RAM|Decoder0~37_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~12_combout & ( !\RAM|Decoder0~37_combout & ( \rst[0]~input_o ) ) ) + + .dataa(gnd), + .datab(!\rst[0]~input_o ), + .datac(!\ALU|Mux26~1_combout ), + .datad(!\ALU|Mux29~3_combout ), + .datae(!\RAM|Decoder0~12_combout ), + .dataf(!\RAM|Decoder0~37_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[180][4]~178_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[180][4]~178 .extended_lut = "off"; +defparam \RAM|mem[180][4]~178 .lut_mask = 64'h333333333333F333; +defparam \RAM|mem[180][4]~178 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X45_Y6_N46 +dffeas \RAM|mem[180][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[180][4]~178_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[180][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[180][0] .is_wysiwyg = "true"; +defparam \RAM|mem[180][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X45_Y7_N21 +cyclonev_lcell_comb \RAM|mem[188][2]~180 ( +// Equation(s): +// \RAM|mem[188][2]~180_combout = ( \RAM|Decoder0~7_combout & ( ((\RAM|Decoder0~22_combout & \RAM|Decoder0~37_combout )) # (\rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~7_combout & ( \rst[0]~input_o ) ) + + .dataa(!\RAM|Decoder0~22_combout ), + .datab(!\rst[0]~input_o ), + .datac(gnd), + .datad(!\RAM|Decoder0~37_combout ), + .datae(gnd), + .dataf(!\RAM|Decoder0~7_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[188][2]~180_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[188][2]~180 .extended_lut = "off"; +defparam \RAM|mem[188][2]~180 .lut_mask = 64'h3333333333773377; +defparam \RAM|mem[188][2]~180 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X46_Y5_N14 +dffeas \RAM|mem[188][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[188][2]~180_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[188][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[188][0] .is_wysiwyg = "true"; +defparam \RAM|mem[188][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X46_Y5_N12 +cyclonev_lcell_comb \rd[0]~58 ( +// Equation(s): +// \rd[0]~58_combout = ( \RAM|mem[188][0]~q & ( \ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout & ((\RAM|mem[180][0]~q ))) # (\ALU|Mux29~3_combout & (\RAM|mem[176][0]~q )) ) ) ) # ( !\RAM|mem[188][0]~q & ( \ALU|Mux28~1_combout & ( +// (!\ALU|Mux29~3_combout & ((\RAM|mem[180][0]~q ))) # (\ALU|Mux29~3_combout & (\RAM|mem[176][0]~q )) ) ) ) # ( \RAM|mem[188][0]~q & ( !\ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout ) # (\RAM|mem[184][0]~q ) ) ) ) # ( !\RAM|mem[188][0]~q & ( +// !\ALU|Mux28~1_combout & ( (\RAM|mem[184][0]~q & \ALU|Mux29~3_combout ) ) ) ) + + .dataa(!\RAM|mem[176][0]~q ), + .datab(!\RAM|mem[184][0]~q ), + .datac(!\ALU|Mux29~3_combout ), + .datad(!\RAM|mem[180][0]~q ), + .datae(!\RAM|mem[188][0]~q ), + .dataf(!\ALU|Mux28~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[0]~58_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[0]~58 .extended_lut = "off"; +defparam \rd[0]~58 .lut_mask = 64'h0303F3F305F505F5; +defparam \rd[0]~58 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y10_N6 +cyclonev_lcell_comb \rd[0]~62 ( +// Equation(s): +// \rd[0]~62_combout = ( \rd[0]~58_combout & ( \ALU|Mux31~3_combout & ( (\rd[0]~60_combout ) # (\ALU|Mux30~1_combout ) ) ) ) # ( !\rd[0]~58_combout & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & \rd[0]~60_combout ) ) ) ) # ( \rd[0]~58_combout & +// ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & (\rd[0]~61_combout )) # (\ALU|Mux30~1_combout & ((\rd[0]~59_combout ))) ) ) ) # ( !\rd[0]~58_combout & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & (\rd[0]~61_combout )) # +// (\ALU|Mux30~1_combout & ((\rd[0]~59_combout ))) ) ) ) + + .dataa(!\ALU|Mux30~1_combout ), + .datab(!\rd[0]~60_combout ), + .datac(!\rd[0]~61_combout ), + .datad(!\rd[0]~59_combout ), + .datae(!\rd[0]~58_combout ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[0]~62_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[0]~62 .extended_lut = "off"; +defparam \rd[0]~62 .lut_mask = 64'h0A5F0A5F22227777; +defparam \rd[0]~62 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y5_N36 +cyclonev_lcell_comb \RAM|mem[129][0]~133 ( +// Equation(s): +// \RAM|mem[129][0]~133_combout = ( \RAM|Decoder0~4_combout & ( \RAM|Decoder0~38_combout & ( ((\ALU|Mux28~1_combout & (\ALU|Mux30~1_combout & \ALU|Mux27~1_combout ))) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~4_combout & ( \RAM|Decoder0~38_combout +// & ( \rst[0]~input_o ) ) ) # ( \RAM|Decoder0~4_combout & ( !\RAM|Decoder0~38_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~4_combout & ( !\RAM|Decoder0~38_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\ALU|Mux28~1_combout ), + .datab(!\rst[0]~input_o ), + .datac(!\ALU|Mux30~1_combout ), + .datad(!\ALU|Mux27~1_combout ), + .datae(!\RAM|Decoder0~4_combout ), + .dataf(!\RAM|Decoder0~38_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[129][0]~133_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[129][0]~133 .extended_lut = "off"; +defparam \RAM|mem[129][0]~133 .lut_mask = 64'h3333333333333337; +defparam \RAM|mem[129][0]~133 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X42_Y5_N38 +dffeas \RAM|mem[129][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[129][0]~133_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[129][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[129][0] .is_wysiwyg = "true"; +defparam \RAM|mem[129][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X51_Y12_N51 +cyclonev_lcell_comb \RAM|mem[137][0]~feeder ( +// Equation(s): +// \RAM|mem[137][0]~feeder_combout = ( \RAM|mem~0_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[137][0]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[137][0]~feeder .extended_lut = "off"; +defparam \RAM|mem[137][0]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[137][0]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X48_Y9_N9 +cyclonev_lcell_comb \RAM|mem[137][1]~135 ( +// Equation(s): +// \RAM|mem[137][1]~135_combout = ( \RAM|Decoder0~38_combout & ( \RAM|Decoder0~4_combout & ( ((\ALU|Mux30~1_combout & (!\ALU|Mux28~1_combout & \ALU|Mux27~1_combout ))) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~38_combout & ( \RAM|Decoder0~4_combout +// & ( \rst[0]~input_o ) ) ) # ( \RAM|Decoder0~38_combout & ( !\RAM|Decoder0~4_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~38_combout & ( !\RAM|Decoder0~4_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\rst[0]~input_o ), + .datab(!\ALU|Mux30~1_combout ), + .datac(!\ALU|Mux28~1_combout ), + .datad(!\ALU|Mux27~1_combout ), + .datae(!\RAM|Decoder0~38_combout ), + .dataf(!\RAM|Decoder0~4_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[137][1]~135_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[137][1]~135 .extended_lut = "off"; +defparam \RAM|mem[137][1]~135 .lut_mask = 64'h5555555555555575; +defparam \RAM|mem[137][1]~135 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X51_Y12_N52 +dffeas \RAM|mem[137][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[137][0]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[137][1]~135_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[137][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[137][0] .is_wysiwyg = "true"; +defparam \RAM|mem[137][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X48_Y14_N51 +cyclonev_lcell_comb \RAM|mem[141][4]~136 ( +// Equation(s): +// \RAM|mem[141][4]~136_combout = ( \RAM|Decoder0~28_combout & ( \RAM|Decoder0~39_combout & ( ((!\ALU|Mux29~3_combout & (\ALU|Mux26~1_combout & !\ALU|Mux28~1_combout ))) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~28_combout & ( +// \RAM|Decoder0~39_combout & ( \rst[0]~input_o ) ) ) # ( \RAM|Decoder0~28_combout & ( !\RAM|Decoder0~39_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~28_combout & ( !\RAM|Decoder0~39_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\ALU|Mux29~3_combout ), + .datab(!\ALU|Mux26~1_combout ), + .datac(!\rst[0]~input_o ), + .datad(!\ALU|Mux28~1_combout ), + .datae(!\RAM|Decoder0~28_combout ), + .dataf(!\RAM|Decoder0~39_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[141][4]~136_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[141][4]~136 .extended_lut = "off"; +defparam \RAM|mem[141][4]~136 .lut_mask = 64'h0F0F0F0F0F0F2F0F; +defparam \RAM|mem[141][4]~136 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X48_Y14_N52 +dffeas \RAM|mem[141][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[141][4]~136_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[141][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[141][0] .is_wysiwyg = "true"; +defparam \RAM|mem[141][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X43_Y13_N6 +cyclonev_lcell_comb \RAM|mem[133][1]~134 ( +// Equation(s): +// \RAM|mem[133][1]~134_combout = ( \ALU|Mux30~1_combout & ( \RAM|Decoder0~16_combout & ( ((\ALU|Mux27~1_combout & \RAM|Decoder0~38_combout )) # (\rst[0]~input_o ) ) ) ) # ( !\ALU|Mux30~1_combout & ( \RAM|Decoder0~16_combout & ( \rst[0]~input_o ) ) ) +// # ( \ALU|Mux30~1_combout & ( !\RAM|Decoder0~16_combout & ( \rst[0]~input_o ) ) ) # ( !\ALU|Mux30~1_combout & ( !\RAM|Decoder0~16_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\ALU|Mux27~1_combout ), + .datab(!\rst[0]~input_o ), + .datac(!\RAM|Decoder0~38_combout ), + .datad(gnd), + .datae(!\ALU|Mux30~1_combout ), + .dataf(!\RAM|Decoder0~16_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[133][1]~134_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[133][1]~134 .extended_lut = "off"; +defparam \RAM|mem[133][1]~134 .lut_mask = 64'h3333333333333737; +defparam \RAM|mem[133][1]~134 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X42_Y10_N44 +dffeas \RAM|mem[133][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[133][1]~134_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[133][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[133][0] .is_wysiwyg = "true"; +defparam \RAM|mem[133][0] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y10_N42 +cyclonev_lcell_comb \rd[0]~44 ( +// Equation(s): +// \rd[0]~44_combout = ( \RAM|mem[133][0]~q & ( \ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout ) # (\RAM|mem[129][0]~q ) ) ) ) # ( !\RAM|mem[133][0]~q & ( \ALU|Mux28~1_combout & ( (\RAM|mem[129][0]~q & \ALU|Mux29~3_combout ) ) ) ) # ( +// \RAM|mem[133][0]~q & ( !\ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout & ((\RAM|mem[141][0]~q ))) # (\ALU|Mux29~3_combout & (\RAM|mem[137][0]~q )) ) ) ) # ( !\RAM|mem[133][0]~q & ( !\ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout & +// ((\RAM|mem[141][0]~q ))) # (\ALU|Mux29~3_combout & (\RAM|mem[137][0]~q )) ) ) ) + + .dataa(!\RAM|mem[129][0]~q ), + .datab(!\RAM|mem[137][0]~q ), + .datac(!\RAM|mem[141][0]~q ), + .datad(!\ALU|Mux29~3_combout ), + .datae(!\RAM|mem[133][0]~q ), + .dataf(!\ALU|Mux28~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[0]~44_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[0]~44 .extended_lut = "off"; +defparam \rd[0]~44 .lut_mask = 64'h0F330F330055FF55; +defparam \rd[0]~44 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X53_Y9_N51 +cyclonev_lcell_comb \RAM|mem[136][1]~131 ( +// Equation(s): +// \RAM|mem[136][1]~131_combout = ( \ALU|Mux29~3_combout & ( \RAM|Decoder0~37_combout & ( ((\ALU|Mux26~1_combout & \RAM|Decoder0~17_combout )) # (\rst[0]~input_o ) ) ) ) # ( !\ALU|Mux29~3_combout & ( \RAM|Decoder0~37_combout & ( \rst[0]~input_o ) ) ) +// # ( \ALU|Mux29~3_combout & ( !\RAM|Decoder0~37_combout & ( \rst[0]~input_o ) ) ) # ( !\ALU|Mux29~3_combout & ( !\RAM|Decoder0~37_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\rst[0]~input_o ), + .datab(gnd), + .datac(!\ALU|Mux26~1_combout ), + .datad(!\RAM|Decoder0~17_combout ), + .datae(!\ALU|Mux29~3_combout ), + .dataf(!\RAM|Decoder0~37_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[136][1]~131_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[136][1]~131 .extended_lut = "off"; +defparam \RAM|mem[136][1]~131 .lut_mask = 64'h555555555555555F; +defparam \RAM|mem[136][1]~131 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X53_Y9_N52 +dffeas \RAM|mem[136][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[136][1]~131_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[136][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[136][0] .is_wysiwyg = "true"; +defparam \RAM|mem[136][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X46_Y5_N48 +cyclonev_lcell_comb \RAM|mem[140][4]~132 ( +// Equation(s): +// \RAM|mem[140][4]~132_combout = ( \RAM|Decoder0~17_combout & ( \RAM|Decoder0~37_combout & ( ((\ALU|Mux26~1_combout & !\ALU|Mux29~3_combout )) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~17_combout & ( \RAM|Decoder0~37_combout & ( \rst[0]~input_o ) +// ) ) # ( \RAM|Decoder0~17_combout & ( !\RAM|Decoder0~37_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~17_combout & ( !\RAM|Decoder0~37_combout & ( \rst[0]~input_o ) ) ) + + .dataa(gnd), + .datab(!\rst[0]~input_o ), + .datac(!\ALU|Mux26~1_combout ), + .datad(!\ALU|Mux29~3_combout ), + .datae(!\RAM|Decoder0~17_combout ), + .dataf(!\RAM|Decoder0~37_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[140][4]~132_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[140][4]~132 .extended_lut = "off"; +defparam \RAM|mem[140][4]~132 .lut_mask = 64'h3333333333333F33; +defparam \RAM|mem[140][4]~132 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X46_Y5_N49 +dffeas \RAM|mem[140][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[140][4]~132_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[140][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[140][0] .is_wysiwyg = "true"; +defparam \RAM|mem[140][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X51_Y8_N3 +cyclonev_lcell_comb \RAM|mem[128][4]~129 ( +// Equation(s): +// \RAM|mem[128][4]~129_combout = ( \RAM|Decoder0~37_combout & ( ((\ALU|Mux26~1_combout & (\ALU|Mux29~3_combout & \pc_we[0]~0_combout ))) # (\rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~37_combout & ( \rst[0]~input_o ) ) + + .dataa(!\ALU|Mux26~1_combout ), + .datab(!\rst[0]~input_o ), + .datac(!\ALU|Mux29~3_combout ), + .datad(!\pc_we[0]~0_combout ), + .datae(gnd), + .dataf(!\RAM|Decoder0~37_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[128][4]~129_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[128][4]~129 .extended_lut = "off"; +defparam \RAM|mem[128][4]~129 .lut_mask = 64'h3333333333373337; +defparam \RAM|mem[128][4]~129 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X51_Y8_N4 +dffeas \RAM|mem[128][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[128][4]~129_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[128][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[128][0] .is_wysiwyg = "true"; +defparam \RAM|mem[128][0] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y10_N33 +cyclonev_lcell_comb \RAM|mem[132][0]~130 ( +// Equation(s): +// \RAM|mem[132][0]~130_combout = ( \pc_we[0]~0_combout & ( \RAM|Decoder0~37_combout & ( ((\ALU|Mux26~1_combout & !\ALU|Mux29~3_combout )) # (\rst[0]~input_o ) ) ) ) # ( !\pc_we[0]~0_combout & ( \RAM|Decoder0~37_combout & ( \rst[0]~input_o ) ) ) # ( +// \pc_we[0]~0_combout & ( !\RAM|Decoder0~37_combout & ( \rst[0]~input_o ) ) ) # ( !\pc_we[0]~0_combout & ( !\RAM|Decoder0~37_combout & ( \rst[0]~input_o ) ) ) + + .dataa(gnd), + .datab(!\ALU|Mux26~1_combout ), + .datac(!\ALU|Mux29~3_combout ), + .datad(!\rst[0]~input_o ), + .datae(!\pc_we[0]~0_combout ), + .dataf(!\RAM|Decoder0~37_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[132][0]~130_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[132][0]~130 .extended_lut = "off"; +defparam \RAM|mem[132][0]~130 .lut_mask = 64'h00FF00FF00FF30FF; +defparam \RAM|mem[132][0]~130 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X42_Y10_N2 +dffeas \RAM|mem[132][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[132][0]~130_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[132][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[132][0] .is_wysiwyg = "true"; +defparam \RAM|mem[132][0] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y10_N0 +cyclonev_lcell_comb \rd[0]~43 ( +// Equation(s): +// \rd[0]~43_combout = ( \RAM|mem[132][0]~q & ( \ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout ) # (\RAM|mem[128][0]~q ) ) ) ) # ( !\RAM|mem[132][0]~q & ( \ALU|Mux28~1_combout & ( (\RAM|mem[128][0]~q & \ALU|Mux29~3_combout ) ) ) ) # ( +// \RAM|mem[132][0]~q & ( !\ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout & ((\RAM|mem[140][0]~q ))) # (\ALU|Mux29~3_combout & (\RAM|mem[136][0]~q )) ) ) ) # ( !\RAM|mem[132][0]~q & ( !\ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout & +// ((\RAM|mem[140][0]~q ))) # (\ALU|Mux29~3_combout & (\RAM|mem[136][0]~q )) ) ) ) + + .dataa(!\RAM|mem[136][0]~q ), + .datab(!\RAM|mem[140][0]~q ), + .datac(!\RAM|mem[128][0]~q ), + .datad(!\ALU|Mux29~3_combout ), + .datae(!\RAM|mem[132][0]~q ), + .dataf(!\ALU|Mux28~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[0]~43_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[0]~43 .extended_lut = "off"; +defparam \rd[0]~43 .lut_mask = 64'h33553355000FFF0F; +defparam \rd[0]~43 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X53_Y9_N39 +cyclonev_lcell_comb \RAM|mem[138][3]~139 ( +// Equation(s): +// \RAM|mem[138][3]~139_combout = ( \RAM|Decoder0~6_combout & ( \RAM|Decoder0~37_combout & ( ((!\ALU|Mux28~1_combout & (\ALU|Mux26~1_combout & \ALU|Mux29~3_combout ))) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~6_combout & ( \RAM|Decoder0~37_combout +// & ( \rst[0]~input_o ) ) ) # ( \RAM|Decoder0~6_combout & ( !\RAM|Decoder0~37_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~6_combout & ( !\RAM|Decoder0~37_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\ALU|Mux28~1_combout ), + .datab(!\rst[0]~input_o ), + .datac(!\ALU|Mux26~1_combout ), + .datad(!\ALU|Mux29~3_combout ), + .datae(!\RAM|Decoder0~6_combout ), + .dataf(!\RAM|Decoder0~37_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[138][3]~139_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[138][3]~139 .extended_lut = "off"; +defparam \RAM|mem[138][3]~139 .lut_mask = 64'h333333333333333B; +defparam \RAM|mem[138][3]~139 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X53_Y9_N40 +dffeas \RAM|mem[138][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[138][3]~139_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[138][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[138][0] .is_wysiwyg = "true"; +defparam \RAM|mem[138][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X46_Y11_N24 +cyclonev_lcell_comb \RAM|mem[142][1]~140 ( +// Equation(s): +// \RAM|mem[142][1]~140_combout = ( \ALU|Mux29~3_combout & ( \RAM|Decoder0~37_combout & ( \rst[0]~input_o ) ) ) # ( !\ALU|Mux29~3_combout & ( \RAM|Decoder0~37_combout & ( ((\RAM|Decoder0~6_combout & (\ALU|Mux26~1_combout & !\ALU|Mux28~1_combout ))) # +// (\rst[0]~input_o ) ) ) ) # ( \ALU|Mux29~3_combout & ( !\RAM|Decoder0~37_combout & ( \rst[0]~input_o ) ) ) # ( !\ALU|Mux29~3_combout & ( !\RAM|Decoder0~37_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\rst[0]~input_o ), + .datab(!\RAM|Decoder0~6_combout ), + .datac(!\ALU|Mux26~1_combout ), + .datad(!\ALU|Mux28~1_combout ), + .datae(!\ALU|Mux29~3_combout ), + .dataf(!\RAM|Decoder0~37_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[142][1]~140_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[142][1]~140 .extended_lut = "off"; +defparam \RAM|mem[142][1]~140 .lut_mask = 64'h5555555557555555; +defparam \RAM|mem[142][1]~140 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X46_Y11_N55 +dffeas \RAM|mem[142][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[142][1]~140_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[142][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[142][0] .is_wysiwyg = "true"; +defparam \RAM|mem[142][0] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y5_N9 +cyclonev_lcell_comb \RAM|mem[130][1]~137 ( +// Equation(s): +// \RAM|mem[130][1]~137_combout = ( \ALU|Mux29~3_combout & ( \RAM|Decoder0~37_combout & ( ((\ALU|Mux28~1_combout & (\ALU|Mux26~1_combout & \RAM|Decoder0~6_combout ))) # (\rst[0]~input_o ) ) ) ) # ( !\ALU|Mux29~3_combout & ( \RAM|Decoder0~37_combout & +// ( \rst[0]~input_o ) ) ) # ( \ALU|Mux29~3_combout & ( !\RAM|Decoder0~37_combout & ( \rst[0]~input_o ) ) ) # ( !\ALU|Mux29~3_combout & ( !\RAM|Decoder0~37_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\ALU|Mux28~1_combout ), + .datab(!\ALU|Mux26~1_combout ), + .datac(!\RAM|Decoder0~6_combout ), + .datad(!\rst[0]~input_o ), + .datae(!\ALU|Mux29~3_combout ), + .dataf(!\RAM|Decoder0~37_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[130][1]~137_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[130][1]~137 .extended_lut = "off"; +defparam \RAM|mem[130][1]~137 .lut_mask = 64'h00FF00FF00FF01FF; +defparam \RAM|mem[130][1]~137 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X42_Y5_N10 +dffeas \RAM|mem[130][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[130][1]~137_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[130][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[130][0] .is_wysiwyg = "true"; +defparam \RAM|mem[130][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X45_Y5_N27 +cyclonev_lcell_comb \RAM|mem[134][0]~feeder ( +// Equation(s): +// \RAM|mem[134][0]~feeder_combout = ( \RAM|mem~0_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[134][0]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[134][0]~feeder .extended_lut = "off"; +defparam \RAM|mem[134][0]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[134][0]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X46_Y5_N39 +cyclonev_lcell_comb \RAM|Decoder0~10 ( +// Equation(s): +// \RAM|Decoder0~10_combout = ( \RAM|Decoder0~6_combout & ( \ALU|Mux28~1_combout ) ) + + .dataa(gnd), + .datab(gnd), + .datac(!\ALU|Mux28~1_combout ), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|Decoder0~6_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|Decoder0~10_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|Decoder0~10 .extended_lut = "off"; +defparam \RAM|Decoder0~10 .lut_mask = 64'h000000000F0F0F0F; +defparam \RAM|Decoder0~10 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X45_Y5_N36 +cyclonev_lcell_comb \RAM|mem[134][4]~138 ( +// Equation(s): +// \RAM|mem[134][4]~138_combout = ( \rst[0]~input_o & ( \RAM|Decoder0~37_combout ) ) # ( !\rst[0]~input_o & ( \RAM|Decoder0~37_combout & ( (!\ALU|Mux29~3_combout & (\RAM|Decoder0~10_combout & \ALU|Mux26~1_combout )) ) ) ) # ( \rst[0]~input_o & ( +// !\RAM|Decoder0~37_combout ) ) + + .dataa(gnd), + .datab(!\ALU|Mux29~3_combout ), + .datac(!\RAM|Decoder0~10_combout ), + .datad(!\ALU|Mux26~1_combout ), + .datae(!\rst[0]~input_o ), + .dataf(!\RAM|Decoder0~37_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[134][4]~138_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[134][4]~138 .extended_lut = "off"; +defparam \RAM|mem[134][4]~138 .lut_mask = 64'h0000FFFF000CFFFF; +defparam \RAM|mem[134][4]~138 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X45_Y5_N28 +dffeas \RAM|mem[134][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[134][0]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[134][4]~138_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[134][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[134][0] .is_wysiwyg = "true"; +defparam \RAM|mem[134][0] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y9_N0 +cyclonev_lcell_comb \rd[0]~45 ( +// Equation(s): +// \rd[0]~45_combout = ( \ALU|Mux29~3_combout & ( \RAM|mem[134][0]~q & ( (!\ALU|Mux28~1_combout & (\RAM|mem[138][0]~q )) # (\ALU|Mux28~1_combout & ((\RAM|mem[130][0]~q ))) ) ) ) # ( !\ALU|Mux29~3_combout & ( \RAM|mem[134][0]~q & ( +// (\ALU|Mux28~1_combout ) # (\RAM|mem[142][0]~q ) ) ) ) # ( \ALU|Mux29~3_combout & ( !\RAM|mem[134][0]~q & ( (!\ALU|Mux28~1_combout & (\RAM|mem[138][0]~q )) # (\ALU|Mux28~1_combout & ((\RAM|mem[130][0]~q ))) ) ) ) # ( !\ALU|Mux29~3_combout & ( +// !\RAM|mem[134][0]~q & ( (\RAM|mem[142][0]~q & !\ALU|Mux28~1_combout ) ) ) ) + + .dataa(!\RAM|mem[138][0]~q ), + .datab(!\RAM|mem[142][0]~q ), + .datac(!\ALU|Mux28~1_combout ), + .datad(!\RAM|mem[130][0]~q ), + .datae(!\ALU|Mux29~3_combout ), + .dataf(!\RAM|mem[134][0]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[0]~45_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[0]~45 .extended_lut = "off"; +defparam \rd[0]~45 .lut_mask = 64'h3030505F3F3F505F; +defparam \rd[0]~45 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X43_Y13_N30 +cyclonev_lcell_comb \RAM|mem[135][3]~142 ( +// Equation(s): +// \RAM|mem[135][3]~142_combout = ( \RAM|Decoder0~38_combout & ( \RAM|Decoder0~16_combout & ( (\RAM|Decoder0~6_combout ) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~38_combout & ( \RAM|Decoder0~16_combout & ( \rst[0]~input_o ) ) ) # ( +// \RAM|Decoder0~38_combout & ( !\RAM|Decoder0~16_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~38_combout & ( !\RAM|Decoder0~16_combout & ( \rst[0]~input_o ) ) ) + + .dataa(gnd), + .datab(!\rst[0]~input_o ), + .datac(!\RAM|Decoder0~6_combout ), + .datad(gnd), + .datae(!\RAM|Decoder0~38_combout ), + .dataf(!\RAM|Decoder0~16_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[135][3]~142_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[135][3]~142 .extended_lut = "off"; +defparam \RAM|mem[135][3]~142 .lut_mask = 64'h3333333333333F3F; +defparam \RAM|mem[135][3]~142 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X43_Y13_N34 +dffeas \RAM|mem[135][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[135][3]~142_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[135][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[135][0] .is_wysiwyg = "true"; +defparam \RAM|mem[135][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X53_Y9_N45 +cyclonev_lcell_comb \RAM|mem[139][0]~feeder ( +// Equation(s): +// \RAM|mem[139][0]~feeder_combout = ( \RAM|mem~0_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[139][0]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[139][0]~feeder .extended_lut = "off"; +defparam \RAM|mem[139][0]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[139][0]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y9_N57 +cyclonev_lcell_comb \RAM|mem[139][3]~143 ( +// Equation(s): +// \RAM|mem[139][3]~143_combout = ( \RAM|Decoder0~38_combout & ( ((!\ALU|Mux28~1_combout & (\RAM|Decoder0~4_combout & \RAM|Decoder0~6_combout ))) # (\rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~38_combout & ( \rst[0]~input_o ) ) + + .dataa(!\ALU|Mux28~1_combout ), + .datab(!\RAM|Decoder0~4_combout ), + .datac(!\rst[0]~input_o ), + .datad(!\RAM|Decoder0~6_combout ), + .datae(gnd), + .dataf(!\RAM|Decoder0~38_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[139][3]~143_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[139][3]~143 .extended_lut = "off"; +defparam \RAM|mem[139][3]~143 .lut_mask = 64'h0F0F0F0F0F2F0F2F; +defparam \RAM|mem[139][3]~143 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X53_Y9_N46 +dffeas \RAM|mem[139][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[139][0]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[139][3]~143_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[139][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[139][0] .is_wysiwyg = "true"; +defparam \RAM|mem[139][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X45_Y13_N51 +cyclonev_lcell_comb \RAM|mem[131][0]~feeder ( +// Equation(s): +// \RAM|mem[131][0]~feeder_combout = ( \RAM|mem~0_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[131][0]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[131][0]~feeder .extended_lut = "off"; +defparam \RAM|mem[131][0]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[131][0]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X45_Y13_N3 +cyclonev_lcell_comb \RAM|mem[131][0]~141 ( +// Equation(s): +// \RAM|mem[131][0]~141_combout = ( \ALU|Mux28~1_combout & ( \RAM|Decoder0~4_combout & ( ((\RAM|Decoder0~6_combout & \RAM|Decoder0~38_combout )) # (\rst[0]~input_o ) ) ) ) # ( !\ALU|Mux28~1_combout & ( \RAM|Decoder0~4_combout & ( \rst[0]~input_o ) ) ) +// # ( \ALU|Mux28~1_combout & ( !\RAM|Decoder0~4_combout & ( \rst[0]~input_o ) ) ) # ( !\ALU|Mux28~1_combout & ( !\RAM|Decoder0~4_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\rst[0]~input_o ), + .datab(!\RAM|Decoder0~6_combout ), + .datac(!\RAM|Decoder0~38_combout ), + .datad(gnd), + .datae(!\ALU|Mux28~1_combout ), + .dataf(!\RAM|Decoder0~4_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[131][0]~141_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[131][0]~141 .extended_lut = "off"; +defparam \RAM|mem[131][0]~141 .lut_mask = 64'h5555555555555757; +defparam \RAM|mem[131][0]~141 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X45_Y13_N52 +dffeas \RAM|mem[131][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[131][0]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[131][0]~141_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[131][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[131][0] .is_wysiwyg = "true"; +defparam \RAM|mem[131][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X45_Y13_N6 +cyclonev_lcell_comb \RAM|mem[143][3]~144 ( +// Equation(s): +// \RAM|mem[143][3]~144_combout = ( \ALU|Mux26~1_combout & ( \RAM|Decoder0~39_combout & ( ((!\ALU|Mux28~1_combout & (\RAM|Decoder0~6_combout & !\ALU|Mux29~3_combout ))) # (\rst[0]~input_o ) ) ) ) # ( !\ALU|Mux26~1_combout & ( \RAM|Decoder0~39_combout +// & ( \rst[0]~input_o ) ) ) # ( \ALU|Mux26~1_combout & ( !\RAM|Decoder0~39_combout & ( \rst[0]~input_o ) ) ) # ( !\ALU|Mux26~1_combout & ( !\RAM|Decoder0~39_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\ALU|Mux28~1_combout ), + .datab(!\RAM|Decoder0~6_combout ), + .datac(!\rst[0]~input_o ), + .datad(!\ALU|Mux29~3_combout ), + .datae(!\ALU|Mux26~1_combout ), + .dataf(!\RAM|Decoder0~39_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[143][3]~144_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[143][3]~144 .extended_lut = "off"; +defparam \RAM|mem[143][3]~144 .lut_mask = 64'h0F0F0F0F0F0F2F0F; +defparam \RAM|mem[143][3]~144 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X45_Y13_N56 +dffeas \RAM|mem[143][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[143][3]~144_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[143][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[143][0] .is_wysiwyg = "true"; +defparam \RAM|mem[143][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X45_Y13_N54 +cyclonev_lcell_comb \rd[0]~46 ( +// Equation(s): +// \rd[0]~46_combout = ( \RAM|mem[143][0]~q & ( \ALU|Mux29~3_combout & ( (!\ALU|Mux28~1_combout & (\RAM|mem[139][0]~q )) # (\ALU|Mux28~1_combout & ((\RAM|mem[131][0]~q ))) ) ) ) # ( !\RAM|mem[143][0]~q & ( \ALU|Mux29~3_combout & ( +// (!\ALU|Mux28~1_combout & (\RAM|mem[139][0]~q )) # (\ALU|Mux28~1_combout & ((\RAM|mem[131][0]~q ))) ) ) ) # ( \RAM|mem[143][0]~q & ( !\ALU|Mux29~3_combout & ( (!\ALU|Mux28~1_combout ) # (\RAM|mem[135][0]~q ) ) ) ) # ( !\RAM|mem[143][0]~q & ( +// !\ALU|Mux29~3_combout & ( (\RAM|mem[135][0]~q & \ALU|Mux28~1_combout ) ) ) ) + + .dataa(!\RAM|mem[135][0]~q ), + .datab(!\RAM|mem[139][0]~q ), + .datac(!\ALU|Mux28~1_combout ), + .datad(!\RAM|mem[131][0]~q ), + .datae(!\RAM|mem[143][0]~q ), + .dataf(!\ALU|Mux29~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[0]~46_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[0]~46 .extended_lut = "off"; +defparam \rd[0]~46 .lut_mask = 64'h0505F5F5303F303F; +defparam \rd[0]~46 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y10_N54 +cyclonev_lcell_comb \rd[0]~47 ( +// Equation(s): +// \rd[0]~47_combout = ( \rd[0]~46_combout & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & ((\rd[0]~45_combout ))) # (\ALU|Mux30~1_combout & (\rd[0]~43_combout )) ) ) ) # ( !\rd[0]~46_combout & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout +// & ((\rd[0]~45_combout ))) # (\ALU|Mux30~1_combout & (\rd[0]~43_combout )) ) ) ) # ( \rd[0]~46_combout & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout ) # (\rd[0]~44_combout ) ) ) ) # ( !\rd[0]~46_combout & ( !\ALU|Mux31~3_combout & ( +// (\ALU|Mux30~1_combout & \rd[0]~44_combout ) ) ) ) + + .dataa(!\ALU|Mux30~1_combout ), + .datab(!\rd[0]~44_combout ), + .datac(!\rd[0]~43_combout ), + .datad(!\rd[0]~45_combout ), + .datae(!\rd[0]~46_combout ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[0]~47_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[0]~47 .extended_lut = "off"; +defparam \rd[0]~47 .lut_mask = 64'h1111BBBB05AF05AF; +defparam \rd[0]~47 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X48_Y6_N39 +cyclonev_lcell_comb \RAM|mem[169][0]~feeder ( +// Equation(s): +// \RAM|mem[169][0]~feeder_combout = ( \RAM|mem~0_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[169][0]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[169][0]~feeder .extended_lut = "off"; +defparam \RAM|mem[169][0]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[169][0]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X43_Y13_N21 +cyclonev_lcell_comb \RAM|mem[169][2]~170 ( +// Equation(s): +// \RAM|mem[169][2]~170_combout = ( \RAM|Decoder0~40_combout & ( \RAM|Decoder0~4_combout & ( ((\ALU|Mux27~1_combout & (\ALU|Mux30~1_combout & !\ALU|Mux28~1_combout ))) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~40_combout & ( \RAM|Decoder0~4_combout +// & ( \rst[0]~input_o ) ) ) # ( \RAM|Decoder0~40_combout & ( !\RAM|Decoder0~4_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~40_combout & ( !\RAM|Decoder0~4_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\ALU|Mux27~1_combout ), + .datab(!\rst[0]~input_o ), + .datac(!\ALU|Mux30~1_combout ), + .datad(!\ALU|Mux28~1_combout ), + .datae(!\RAM|Decoder0~40_combout ), + .dataf(!\RAM|Decoder0~4_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[169][2]~170_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[169][2]~170 .extended_lut = "off"; +defparam \RAM|mem[169][2]~170 .lut_mask = 64'h3333333333333733; +defparam \RAM|mem[169][2]~170 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X48_Y6_N41 +dffeas \RAM|mem[169][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[169][0]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[169][2]~170_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[169][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[169][0] .is_wysiwyg = "true"; +defparam \RAM|mem[169][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X45_Y11_N57 +cyclonev_lcell_comb \RAM|mem[170][4]~171 ( +// Equation(s): +// \RAM|mem[170][4]~171_combout = ( \ALU|Mux28~1_combout & ( \RAM|Decoder0~37_combout & ( \rst[0]~input_o ) ) ) # ( !\ALU|Mux28~1_combout & ( \RAM|Decoder0~37_combout & ( ((\RAM|Decoder0~6_combout & (\ALU|Mux29~3_combout & !\ALU|Mux26~1_combout ))) # +// (\rst[0]~input_o ) ) ) ) # ( \ALU|Mux28~1_combout & ( !\RAM|Decoder0~37_combout & ( \rst[0]~input_o ) ) ) # ( !\ALU|Mux28~1_combout & ( !\RAM|Decoder0~37_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\RAM|Decoder0~6_combout ), + .datab(!\ALU|Mux29~3_combout ), + .datac(!\rst[0]~input_o ), + .datad(!\ALU|Mux26~1_combout ), + .datae(!\ALU|Mux28~1_combout ), + .dataf(!\RAM|Decoder0~37_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[170][4]~171_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[170][4]~171 .extended_lut = "off"; +defparam \RAM|mem[170][4]~171 .lut_mask = 64'h0F0F0F0F1F0F0F0F; +defparam \RAM|mem[170][4]~171 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X45_Y4_N25 +dffeas \RAM|mem[170][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[170][4]~171_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[170][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[170][0] .is_wysiwyg = "true"; +defparam \RAM|mem[170][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X51_Y11_N6 +cyclonev_lcell_comb \RAM|mem[168][2]~169 ( +// Equation(s): +// \RAM|mem[168][2]~169_combout = ( \RAM|Decoder0~17_combout & ( \RAM|Decoder0~37_combout & ( ((\ALU|Mux29~3_combout & !\ALU|Mux26~1_combout )) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~17_combout & ( \RAM|Decoder0~37_combout & ( \rst[0]~input_o ) +// ) ) # ( \RAM|Decoder0~17_combout & ( !\RAM|Decoder0~37_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~17_combout & ( !\RAM|Decoder0~37_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\rst[0]~input_o ), + .datab(!\ALU|Mux29~3_combout ), + .datac(!\ALU|Mux26~1_combout ), + .datad(gnd), + .datae(!\RAM|Decoder0~17_combout ), + .dataf(!\RAM|Decoder0~37_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[168][2]~169_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[168][2]~169 .extended_lut = "off"; +defparam \RAM|mem[168][2]~169 .lut_mask = 64'h5555555555557575; +defparam \RAM|mem[168][2]~169 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X51_Y11_N11 +dffeas \RAM|mem[168][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[168][2]~169_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[168][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[168][0] .is_wysiwyg = "true"; +defparam \RAM|mem[168][0] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y13_N15 +cyclonev_lcell_comb \RAM|Decoder0~41 ( +// Equation(s): +// \RAM|Decoder0~41_combout = (\rd[3]~457_combout & (!\ALU|Mux26~1_combout & \RAM|Decoder0~6_combout )) + + .dataa(gnd), + .datab(!\rd[3]~457_combout ), + .datac(!\ALU|Mux26~1_combout ), + .datad(!\RAM|Decoder0~6_combout ), + .datae(gnd), + .dataf(gnd), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|Decoder0~41_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|Decoder0~41 .extended_lut = "off"; +defparam \RAM|Decoder0~41 .lut_mask = 64'h0030003000300030; +defparam \RAM|Decoder0~41 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X43_Y6_N9 +cyclonev_lcell_comb \RAM|mem[171][2]~172 ( +// Equation(s): +// \RAM|mem[171][2]~172_combout = ( \RAM|Decoder0~4_combout & ( \RAM|Decoder0~41_combout & ( (!\ALU|Mux28~1_combout ) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~4_combout & ( \RAM|Decoder0~41_combout & ( \rst[0]~input_o ) ) ) # ( +// \RAM|Decoder0~4_combout & ( !\RAM|Decoder0~41_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~4_combout & ( !\RAM|Decoder0~41_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\rst[0]~input_o ), + .datab(gnd), + .datac(gnd), + .datad(!\ALU|Mux28~1_combout ), + .datae(!\RAM|Decoder0~4_combout ), + .dataf(!\RAM|Decoder0~41_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[171][2]~172_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[171][2]~172 .extended_lut = "off"; +defparam \RAM|mem[171][2]~172 .lut_mask = 64'h555555555555FF55; +defparam \RAM|mem[171][2]~172 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X42_Y10_N38 +dffeas \RAM|mem[171][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[171][2]~172_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[171][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[171][0] .is_wysiwyg = "true"; +defparam \RAM|mem[171][0] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y10_N36 +cyclonev_lcell_comb \rd[0]~55 ( +// Equation(s): +// \rd[0]~55_combout = ( \RAM|mem[171][0]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & (\RAM|mem[170][0]~q )) # (\ALU|Mux30~1_combout & ((\RAM|mem[168][0]~q ))) ) ) ) # ( !\RAM|mem[171][0]~q & ( \ALU|Mux31~3_combout & ( +// (!\ALU|Mux30~1_combout & (\RAM|mem[170][0]~q )) # (\ALU|Mux30~1_combout & ((\RAM|mem[168][0]~q ))) ) ) ) # ( \RAM|mem[171][0]~q & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout ) # (\RAM|mem[169][0]~q ) ) ) ) # ( !\RAM|mem[171][0]~q & ( +// !\ALU|Mux31~3_combout & ( (\RAM|mem[169][0]~q & \ALU|Mux30~1_combout ) ) ) ) + + .dataa(!\RAM|mem[169][0]~q ), + .datab(!\RAM|mem[170][0]~q ), + .datac(!\ALU|Mux30~1_combout ), + .datad(!\RAM|mem[168][0]~q ), + .datae(!\RAM|mem[171][0]~q ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[0]~55_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[0]~55 .extended_lut = "off"; +defparam \rd[0]~55 .lut_mask = 64'h0505F5F5303F303F; +defparam \rd[0]~55 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X45_Y5_N42 +cyclonev_lcell_comb \RAM|mem[166][2]~167 ( +// Equation(s): +// \RAM|mem[166][2]~167_combout = ( \ALU|Mux26~1_combout & ( \RAM|Decoder0~37_combout & ( \rst[0]~input_o ) ) ) # ( !\ALU|Mux26~1_combout & ( \RAM|Decoder0~37_combout & ( ((\RAM|Decoder0~6_combout & (\ALU|Mux28~1_combout & !\ALU|Mux29~3_combout ))) # +// (\rst[0]~input_o ) ) ) ) # ( \ALU|Mux26~1_combout & ( !\RAM|Decoder0~37_combout & ( \rst[0]~input_o ) ) ) # ( !\ALU|Mux26~1_combout & ( !\RAM|Decoder0~37_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\RAM|Decoder0~6_combout ), + .datab(!\rst[0]~input_o ), + .datac(!\ALU|Mux28~1_combout ), + .datad(!\ALU|Mux29~3_combout ), + .datae(!\ALU|Mux26~1_combout ), + .dataf(!\RAM|Decoder0~37_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[166][2]~167_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[166][2]~167 .extended_lut = "off"; +defparam \RAM|mem[166][2]~167 .lut_mask = 64'h3333333337333333; +defparam \RAM|mem[166][2]~167 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X45_Y5_N44 +dffeas \RAM|mem[166][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[166][2]~167_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[166][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[166][0] .is_wysiwyg = "true"; +defparam \RAM|mem[166][0] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X47_Y9_N45 +cyclonev_lcell_comb \RAM|mem[165][2]~166 ( +// Equation(s): +// \RAM|mem[165][2]~166_combout = ( \RAM|Decoder0~16_combout & ( ((\RAM|Decoder0~40_combout & (\ALU|Mux27~1_combout & \ALU|Mux30~1_combout ))) # (\rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~16_combout & ( \rst[0]~input_o ) ) + + .dataa(!\RAM|Decoder0~40_combout ), + .datab(!\ALU|Mux27~1_combout ), + .datac(!\rst[0]~input_o ), + .datad(!\ALU|Mux30~1_combout ), + .datae(gnd), + .dataf(!\RAM|Decoder0~16_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[165][2]~166_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[165][2]~166 .extended_lut = "off"; +defparam \RAM|mem[165][2]~166 .lut_mask = 64'h0F0F0F0F0F1F0F1F; +defparam \RAM|mem[165][2]~166 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X47_Y9_N10 +dffeas \RAM|mem[165][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[165][2]~166_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[165][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[165][0] .is_wysiwyg = "true"; +defparam \RAM|mem[165][0] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X47_Y9_N36 +cyclonev_lcell_comb \RAM|mem[164][4]~165 ( +// Equation(s): +// \RAM|mem[164][4]~165_combout = ( \RAM|Decoder0~37_combout & ( ((!\ALU|Mux29~3_combout & (\pc_we[0]~0_combout & !\ALU|Mux26~1_combout ))) # (\rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~37_combout & ( \rst[0]~input_o ) ) + + .dataa(!\ALU|Mux29~3_combout ), + .datab(!\rst[0]~input_o ), + .datac(!\pc_we[0]~0_combout ), + .datad(!\ALU|Mux26~1_combout ), + .datae(gnd), + .dataf(!\RAM|Decoder0~37_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[164][4]~165_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[164][4]~165 .extended_lut = "off"; +defparam \RAM|mem[164][4]~165 .lut_mask = 64'h333333333B333B33; +defparam \RAM|mem[164][4]~165 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X47_Y9_N40 +dffeas \RAM|mem[164][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[164][4]~165_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[164][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[164][0] .is_wysiwyg = "true"; +defparam \RAM|mem[164][0] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y13_N21 +cyclonev_lcell_comb \RAM|mem[167][1]~168 ( +// Equation(s): +// \RAM|mem[167][1]~168_combout = ( \RAM|Decoder0~41_combout & ( (\RAM|Decoder0~16_combout ) # (\rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~41_combout & ( \rst[0]~input_o ) ) + + .dataa(!\rst[0]~input_o ), + .datab(gnd), + .datac(!\RAM|Decoder0~16_combout ), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|Decoder0~41_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[167][1]~168_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[167][1]~168 .extended_lut = "off"; +defparam \RAM|mem[167][1]~168 .lut_mask = 64'h555555555F5F5F5F; +defparam \RAM|mem[167][1]~168 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X47_Y9_N28 +dffeas \RAM|mem[167][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[167][1]~168_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[167][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[167][0] .is_wysiwyg = "true"; +defparam \RAM|mem[167][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X45_Y9_N42 +cyclonev_lcell_comb \rd[0]~54 ( +// Equation(s): +// \rd[0]~54_combout = ( \RAM|mem[167][0]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & (\RAM|mem[166][0]~q )) # (\ALU|Mux30~1_combout & ((\RAM|mem[164][0]~q ))) ) ) ) # ( !\RAM|mem[167][0]~q & ( \ALU|Mux31~3_combout & ( +// (!\ALU|Mux30~1_combout & (\RAM|mem[166][0]~q )) # (\ALU|Mux30~1_combout & ((\RAM|mem[164][0]~q ))) ) ) ) # ( \RAM|mem[167][0]~q & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout ) # (\RAM|mem[165][0]~q ) ) ) ) # ( !\RAM|mem[167][0]~q & ( +// !\ALU|Mux31~3_combout & ( (\RAM|mem[165][0]~q & \ALU|Mux30~1_combout ) ) ) ) + + .dataa(!\RAM|mem[166][0]~q ), + .datab(!\RAM|mem[165][0]~q ), + .datac(!\RAM|mem[164][0]~q ), + .datad(!\ALU|Mux30~1_combout ), + .datae(!\RAM|mem[167][0]~q ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[0]~54_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[0]~54 .extended_lut = "off"; +defparam \rd[0]~54 .lut_mask = 64'h0033FF33550F550F; +defparam \rd[0]~54 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X48_Y6_N33 +cyclonev_lcell_comb \RAM|mem[161][0]~feeder ( +// Equation(s): +// \RAM|mem[161][0]~feeder_combout = ( \RAM|mem~0_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[161][0]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[161][0]~feeder .extended_lut = "off"; +defparam \RAM|mem[161][0]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[161][0]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X48_Y6_N12 +cyclonev_lcell_comb \RAM|mem[161][0]~162 ( +// Equation(s): +// \RAM|mem[161][0]~162_combout = ( \RAM|Decoder0~40_combout & ( \RAM|Decoder0~4_combout & ( ((\ALU|Mux30~1_combout & (\ALU|Mux28~1_combout & \ALU|Mux27~1_combout ))) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~40_combout & ( \RAM|Decoder0~4_combout +// & ( \rst[0]~input_o ) ) ) # ( \RAM|Decoder0~40_combout & ( !\RAM|Decoder0~4_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~40_combout & ( !\RAM|Decoder0~4_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\rst[0]~input_o ), + .datab(!\ALU|Mux30~1_combout ), + .datac(!\ALU|Mux28~1_combout ), + .datad(!\ALU|Mux27~1_combout ), + .datae(!\RAM|Decoder0~40_combout ), + .dataf(!\RAM|Decoder0~4_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[161][0]~162_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[161][0]~162 .extended_lut = "off"; +defparam \RAM|mem[161][0]~162 .lut_mask = 64'h5555555555555557; +defparam \RAM|mem[161][0]~162 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X48_Y6_N34 +dffeas \RAM|mem[161][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[161][0]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[161][0]~162_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[161][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[161][0] .is_wysiwyg = "true"; +defparam \RAM|mem[161][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X45_Y11_N36 +cyclonev_lcell_comb \RAM|mem[160][3]~161 ( +// Equation(s): +// \RAM|mem[160][3]~161_combout = ( \pc_we[0]~0_combout & ( \RAM|Decoder0~37_combout & ( ((!\ALU|Mux26~1_combout & \ALU|Mux29~3_combout )) # (\rst[0]~input_o ) ) ) ) # ( !\pc_we[0]~0_combout & ( \RAM|Decoder0~37_combout & ( \rst[0]~input_o ) ) ) # ( +// \pc_we[0]~0_combout & ( !\RAM|Decoder0~37_combout & ( \rst[0]~input_o ) ) ) # ( !\pc_we[0]~0_combout & ( !\RAM|Decoder0~37_combout & ( \rst[0]~input_o ) ) ) + + .dataa(gnd), + .datab(!\rst[0]~input_o ), + .datac(!\ALU|Mux26~1_combout ), + .datad(!\ALU|Mux29~3_combout ), + .datae(!\pc_we[0]~0_combout ), + .dataf(!\RAM|Decoder0~37_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[160][3]~161_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[160][3]~161 .extended_lut = "off"; +defparam \RAM|mem[160][3]~161 .lut_mask = 64'h33333333333333F3; +defparam \RAM|mem[160][3]~161 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X45_Y11_N41 +dffeas \RAM|mem[160][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[160][3]~161_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[160][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[160][0] .is_wysiwyg = "true"; +defparam \RAM|mem[160][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X45_Y11_N9 +cyclonev_lcell_comb \RAM|mem[162][0]~163 ( +// Equation(s): +// \RAM|mem[162][0]~163_combout = ( \ALU|Mux28~1_combout & ( \RAM|Decoder0~37_combout & ( ((!\ALU|Mux26~1_combout & (\ALU|Mux29~3_combout & \RAM|Decoder0~6_combout ))) # (\rst[0]~input_o ) ) ) ) # ( !\ALU|Mux28~1_combout & ( \RAM|Decoder0~37_combout & +// ( \rst[0]~input_o ) ) ) # ( \ALU|Mux28~1_combout & ( !\RAM|Decoder0~37_combout & ( \rst[0]~input_o ) ) ) # ( !\ALU|Mux28~1_combout & ( !\RAM|Decoder0~37_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\ALU|Mux26~1_combout ), + .datab(!\rst[0]~input_o ), + .datac(!\ALU|Mux29~3_combout ), + .datad(!\RAM|Decoder0~6_combout ), + .datae(!\ALU|Mux28~1_combout ), + .dataf(!\RAM|Decoder0~37_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[162][0]~163_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[162][0]~163 .extended_lut = "off"; +defparam \RAM|mem[162][0]~163 .lut_mask = 64'h333333333333333B; +defparam \RAM|mem[162][0]~163 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X45_Y11_N8 +dffeas \RAM|mem[162][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[162][0]~163_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[162][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[162][0] .is_wysiwyg = "true"; +defparam \RAM|mem[162][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X45_Y11_N12 +cyclonev_lcell_comb \RAM|mem[163][3]~164 ( +// Equation(s): +// \RAM|mem[163][3]~164_combout = ( \RAM|Decoder0~6_combout & ( \RAM|Decoder0~4_combout & ( ((\RAM|Decoder0~40_combout & \ALU|Mux28~1_combout )) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~6_combout & ( \RAM|Decoder0~4_combout & ( \rst[0]~input_o ) +// ) ) # ( \RAM|Decoder0~6_combout & ( !\RAM|Decoder0~4_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~6_combout & ( !\RAM|Decoder0~4_combout & ( \rst[0]~input_o ) ) ) + + .dataa(gnd), + .datab(!\rst[0]~input_o ), + .datac(!\RAM|Decoder0~40_combout ), + .datad(!\ALU|Mux28~1_combout ), + .datae(!\RAM|Decoder0~6_combout ), + .dataf(!\RAM|Decoder0~4_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[163][3]~164_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[163][3]~164 .extended_lut = "off"; +defparam \RAM|mem[163][3]~164 .lut_mask = 64'h333333333333333F; +defparam \RAM|mem[163][3]~164 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X45_Y11_N2 +dffeas \RAM|mem[163][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[163][3]~164_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[163][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[163][0] .is_wysiwyg = "true"; +defparam \RAM|mem[163][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X45_Y11_N0 +cyclonev_lcell_comb \rd[0]~53 ( +// Equation(s): +// \rd[0]~53_combout = ( \RAM|mem[163][0]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & ((\RAM|mem[162][0]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[160][0]~q )) ) ) ) # ( !\RAM|mem[163][0]~q & ( \ALU|Mux31~3_combout & ( +// (!\ALU|Mux30~1_combout & ((\RAM|mem[162][0]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[160][0]~q )) ) ) ) # ( \RAM|mem[163][0]~q & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout ) # (\RAM|mem[161][0]~q ) ) ) ) # ( !\RAM|mem[163][0]~q & ( +// !\ALU|Mux31~3_combout & ( (\RAM|mem[161][0]~q & \ALU|Mux30~1_combout ) ) ) ) + + .dataa(!\RAM|mem[161][0]~q ), + .datab(!\RAM|mem[160][0]~q ), + .datac(!\ALU|Mux30~1_combout ), + .datad(!\RAM|mem[162][0]~q ), + .datae(!\RAM|mem[163][0]~q ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[0]~53_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[0]~53 .extended_lut = "off"; +defparam \rd[0]~53 .lut_mask = 64'h0505F5F503F303F3; +defparam \rd[0]~53 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X46_Y5_N30 +cyclonev_lcell_comb \RAM|mem[172][2]~173 ( +// Equation(s): +// \RAM|mem[172][2]~173_combout = ( \RAM|Decoder0~22_combout & ( \RAM|Decoder0~37_combout & ( ((\ALU|Mux30~1_combout & \ALU|Mux27~1_combout )) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~22_combout & ( \RAM|Decoder0~37_combout & ( \rst[0]~input_o ) +// ) ) # ( \RAM|Decoder0~22_combout & ( !\RAM|Decoder0~37_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~22_combout & ( !\RAM|Decoder0~37_combout & ( \rst[0]~input_o ) ) ) + + .dataa(gnd), + .datab(!\rst[0]~input_o ), + .datac(!\ALU|Mux30~1_combout ), + .datad(!\ALU|Mux27~1_combout ), + .datae(!\RAM|Decoder0~22_combout ), + .dataf(!\RAM|Decoder0~37_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[172][2]~173_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[172][2]~173 .extended_lut = "off"; +defparam \RAM|mem[172][2]~173 .lut_mask = 64'h333333333333333F; +defparam \RAM|mem[172][2]~173 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X46_Y5_N31 +dffeas \RAM|mem[172][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[172][2]~173_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[172][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[172][0] .is_wysiwyg = "true"; +defparam \RAM|mem[172][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X45_Y8_N6 +cyclonev_lcell_comb \RAM|mem[174][4]~175 ( +// Equation(s): +// \RAM|mem[174][4]~175_combout = ( \RAM|Decoder0~37_combout & ( ((\RAM|Decoder0~22_combout & \RAM|Decoder0~6_combout )) # (\rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~37_combout & ( \rst[0]~input_o ) ) + + .dataa(gnd), + .datab(!\rst[0]~input_o ), + .datac(!\RAM|Decoder0~22_combout ), + .datad(!\RAM|Decoder0~6_combout ), + .datae(gnd), + .dataf(!\RAM|Decoder0~37_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[174][4]~175_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[174][4]~175 .extended_lut = "off"; +defparam \RAM|mem[174][4]~175 .lut_mask = 64'h33333333333F333F; +defparam \RAM|mem[174][4]~175 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X46_Y10_N11 +dffeas \RAM|mem[174][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[174][4]~175_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[174][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[174][0] .is_wysiwyg = "true"; +defparam \RAM|mem[174][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X46_Y10_N33 +cyclonev_lcell_comb \RAM|mem[173][1]~174 ( +// Equation(s): +// \RAM|mem[173][1]~174_combout = ( \rst[0]~input_o & ( \RAM|Decoder0~39_combout ) ) # ( !\rst[0]~input_o & ( \RAM|Decoder0~39_combout & ( (\ALU|Mux30~1_combout & (\RAM|Decoder0~22_combout & \ALU|Mux27~1_combout )) ) ) ) # ( \rst[0]~input_o & ( +// !\RAM|Decoder0~39_combout ) ) + + .dataa(!\ALU|Mux30~1_combout ), + .datab(gnd), + .datac(!\RAM|Decoder0~22_combout ), + .datad(!\ALU|Mux27~1_combout ), + .datae(!\rst[0]~input_o ), + .dataf(!\RAM|Decoder0~39_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[173][1]~174_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[173][1]~174 .extended_lut = "off"; +defparam \RAM|mem[173][1]~174 .lut_mask = 64'h0000FFFF0005FFFF; +defparam \RAM|mem[173][1]~174 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X46_Y10_N34 +dffeas \RAM|mem[173][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[173][1]~174_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[173][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[173][0] .is_wysiwyg = "true"; +defparam \RAM|mem[173][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X46_Y10_N54 +cyclonev_lcell_comb \RAM|mem[175][0]~176 ( +// Equation(s): +// \RAM|mem[175][0]~176_combout = ( \rst[0]~input_o & ( \RAM|Decoder0~39_combout ) ) # ( !\rst[0]~input_o & ( \RAM|Decoder0~39_combout & ( (\RAM|Decoder0~22_combout & \RAM|Decoder0~6_combout ) ) ) ) # ( \rst[0]~input_o & ( !\RAM|Decoder0~39_combout ) +// ) + + .dataa(gnd), + .datab(!\RAM|Decoder0~22_combout ), + .datac(!\RAM|Decoder0~6_combout ), + .datad(gnd), + .datae(!\rst[0]~input_o ), + .dataf(!\RAM|Decoder0~39_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[175][0]~176_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[175][0]~176 .extended_lut = "off"; +defparam \RAM|mem[175][0]~176 .lut_mask = 64'h0000FFFF0303FFFF; +defparam \RAM|mem[175][0]~176 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X46_Y10_N20 +dffeas \RAM|mem[175][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[175][0]~176_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[175][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[175][0] .is_wysiwyg = "true"; +defparam \RAM|mem[175][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X46_Y10_N18 +cyclonev_lcell_comb \rd[0]~56 ( +// Equation(s): +// \rd[0]~56_combout = ( \RAM|mem[175][0]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & ((\RAM|mem[174][0]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[172][0]~q )) ) ) ) # ( !\RAM|mem[175][0]~q & ( \ALU|Mux31~3_combout & ( +// (!\ALU|Mux30~1_combout & ((\RAM|mem[174][0]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[172][0]~q )) ) ) ) # ( \RAM|mem[175][0]~q & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout ) # (\RAM|mem[173][0]~q ) ) ) ) # ( !\RAM|mem[175][0]~q & ( +// !\ALU|Mux31~3_combout & ( (\ALU|Mux30~1_combout & \RAM|mem[173][0]~q ) ) ) ) + + .dataa(!\RAM|mem[172][0]~q ), + .datab(!\RAM|mem[174][0]~q ), + .datac(!\ALU|Mux30~1_combout ), + .datad(!\RAM|mem[173][0]~q ), + .datae(!\RAM|mem[175][0]~q ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[0]~56_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[0]~56 .extended_lut = "off"; +defparam \rd[0]~56 .lut_mask = 64'h000FF0FF35353535; +defparam \rd[0]~56 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y10_N24 +cyclonev_lcell_comb \rd[0]~57 ( +// Equation(s): +// \rd[0]~57_combout = ( \rd[0]~53_combout & ( \rd[0]~56_combout & ( (!\ALU|Mux28~1_combout & (((!\ALU|Mux29~3_combout )) # (\rd[0]~55_combout ))) # (\ALU|Mux28~1_combout & (((\ALU|Mux29~3_combout ) # (\rd[0]~54_combout )))) ) ) ) # ( !\rd[0]~53_combout +// & ( \rd[0]~56_combout & ( (!\ALU|Mux28~1_combout & (((!\ALU|Mux29~3_combout )) # (\rd[0]~55_combout ))) # (\ALU|Mux28~1_combout & (((\rd[0]~54_combout & !\ALU|Mux29~3_combout )))) ) ) ) # ( \rd[0]~53_combout & ( !\rd[0]~56_combout & ( +// (!\ALU|Mux28~1_combout & (\rd[0]~55_combout & ((\ALU|Mux29~3_combout )))) # (\ALU|Mux28~1_combout & (((\ALU|Mux29~3_combout ) # (\rd[0]~54_combout )))) ) ) ) # ( !\rd[0]~53_combout & ( !\rd[0]~56_combout & ( (!\ALU|Mux28~1_combout & +// (\rd[0]~55_combout & ((\ALU|Mux29~3_combout )))) # (\ALU|Mux28~1_combout & (((\rd[0]~54_combout & !\ALU|Mux29~3_combout )))) ) ) ) + + .dataa(!\rd[0]~55_combout ), + .datab(!\ALU|Mux28~1_combout ), + .datac(!\rd[0]~54_combout ), + .datad(!\ALU|Mux29~3_combout ), + .datae(!\rd[0]~53_combout ), + .dataf(!\rd[0]~56_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[0]~57_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[0]~57 .extended_lut = "off"; +defparam \rd[0]~57 .lut_mask = 64'h03440377CF44CF77; +defparam \rd[0]~57 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y10_N12 +cyclonev_lcell_comb \rd[0]~63 ( +// Equation(s): +// \rd[0]~63_combout = ( \rd[0]~47_combout & ( \rd[0]~57_combout & ( ((!\ALU|Mux26~1_combout & ((\rd[0]~62_combout ))) # (\ALU|Mux26~1_combout & (\rd[0]~52_combout ))) # (\ALU|Mux27~1_combout ) ) ) ) # ( !\rd[0]~47_combout & ( \rd[0]~57_combout & ( +// (!\ALU|Mux27~1_combout & ((!\ALU|Mux26~1_combout & ((\rd[0]~62_combout ))) # (\ALU|Mux26~1_combout & (\rd[0]~52_combout )))) # (\ALU|Mux27~1_combout & (!\ALU|Mux26~1_combout )) ) ) ) # ( \rd[0]~47_combout & ( !\rd[0]~57_combout & ( +// (!\ALU|Mux27~1_combout & ((!\ALU|Mux26~1_combout & ((\rd[0]~62_combout ))) # (\ALU|Mux26~1_combout & (\rd[0]~52_combout )))) # (\ALU|Mux27~1_combout & (\ALU|Mux26~1_combout )) ) ) ) # ( !\rd[0]~47_combout & ( !\rd[0]~57_combout & ( +// (!\ALU|Mux27~1_combout & ((!\ALU|Mux26~1_combout & ((\rd[0]~62_combout ))) # (\ALU|Mux26~1_combout & (\rd[0]~52_combout )))) ) ) ) + + .dataa(!\ALU|Mux27~1_combout ), + .datab(!\ALU|Mux26~1_combout ), + .datac(!\rd[0]~52_combout ), + .datad(!\rd[0]~62_combout ), + .datae(!\rd[0]~47_combout ), + .dataf(!\rd[0]~57_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[0]~63_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[0]~63 .extended_lut = "off"; +defparam \rd[0]~63 .lut_mask = 64'h028A139B46CE57DF; +defparam \rd[0]~63 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X43_Y5_N18 +cyclonev_lcell_comb \RAM|mem[225][0]~feeder ( +// Equation(s): +// \RAM|mem[225][0]~feeder_combout = ( \RAM|mem~0_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[225][0]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[225][0]~feeder .extended_lut = "off"; +defparam \RAM|mem[225][0]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[225][0]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y9_N21 +cyclonev_lcell_comb \RAM|Decoder0~44 ( +// Equation(s): +// \RAM|Decoder0~44_combout = ( \RAM|Decoder0~4_combout & ( (\ALU|Mux27~1_combout & (\ALU|Mux30~1_combout & \ALU|Mux28~1_combout )) ) ) + + .dataa(!\ALU|Mux27~1_combout ), + .datab(gnd), + .datac(!\ALU|Mux30~1_combout ), + .datad(!\ALU|Mux28~1_combout ), + .datae(gnd), + .dataf(!\RAM|Decoder0~4_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|Decoder0~44_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|Decoder0~44 .extended_lut = "off"; +defparam \RAM|Decoder0~44 .lut_mask = 64'h0000000000050005; +defparam \RAM|Decoder0~44 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X43_Y5_N6 +cyclonev_lcell_comb \RAM|mem[225][3]~211 ( +// Equation(s): +// \RAM|mem[225][3]~211_combout = ( \ALU|Mux24~1_combout & ( \RAM|Decoder0~44_combout & ( \rst[0]~input_o ) ) ) # ( !\ALU|Mux24~1_combout & ( \RAM|Decoder0~44_combout & ( (\RAM|Decoder0~11_combout ) # (\rst[0]~input_o ) ) ) ) # ( \ALU|Mux24~1_combout +// & ( !\RAM|Decoder0~44_combout & ( \rst[0]~input_o ) ) ) # ( !\ALU|Mux24~1_combout & ( !\RAM|Decoder0~44_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\rst[0]~input_o ), + .datab(gnd), + .datac(!\RAM|Decoder0~11_combout ), + .datad(gnd), + .datae(!\ALU|Mux24~1_combout ), + .dataf(!\RAM|Decoder0~44_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[225][3]~211_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[225][3]~211 .extended_lut = "off"; +defparam \RAM|mem[225][3]~211 .lut_mask = 64'h555555555F5F5555; +defparam \RAM|mem[225][3]~211 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X43_Y5_N19 +dffeas \RAM|mem[225][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[225][0]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[225][3]~211_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[225][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[225][0] .is_wysiwyg = "true"; +defparam \RAM|mem[225][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X51_Y10_N33 +cyclonev_lcell_comb \RAM|Decoder0~0 ( +// Equation(s): +// \RAM|Decoder0~0_combout = ( !\ALU|Mux25~1_combout & ( \ALU|Mux26~1_combout ) ) + + .dataa(gnd), + .datab(gnd), + .datac(!\ALU|Mux26~1_combout ), + .datad(gnd), + .datae(gnd), + .dataf(!\ALU|Mux25~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|Decoder0~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|Decoder0~0 .extended_lut = "off"; +defparam \RAM|Decoder0~0 .lut_mask = 64'h0F0F0F0F00000000; +defparam \RAM|Decoder0~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y9_N18 +cyclonev_lcell_comb \RAM|mem[193][1]~209 ( +// Equation(s): +// \RAM|mem[193][1]~209_combout = ( \RAM|Decoder0~0_combout & ( ((!\ALU|Mux24~1_combout & \RAM|Decoder0~44_combout )) # (\rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~0_combout & ( \rst[0]~input_o ) ) + + .dataa(gnd), + .datab(!\rst[0]~input_o ), + .datac(!\ALU|Mux24~1_combout ), + .datad(!\RAM|Decoder0~44_combout ), + .datae(gnd), + .dataf(!\RAM|Decoder0~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[193][1]~209_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[193][1]~209 .extended_lut = "off"; +defparam \RAM|mem[193][1]~209 .lut_mask = 64'h3333333333F333F3; +defparam \RAM|mem[193][1]~209 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X49_Y9_N52 +dffeas \RAM|mem[193][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[193][1]~209_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[193][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[193][0] .is_wysiwyg = "true"; +defparam \RAM|mem[193][0] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X50_Y6_N19 +dffeas \RAM|mem[241][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[241][4]~212_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[241][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[241][0] .is_wysiwyg = "true"; +defparam \RAM|mem[241][0] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y9_N24 +cyclonev_lcell_comb \RAM|mem[209][0]~210 ( +// Equation(s): +// \RAM|mem[209][0]~210_combout = ( \RAM|Decoder0~0_combout & ( ((!\ALU|Mux24~1_combout & \RAM|Decoder0~45_combout )) # (\rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~0_combout & ( \rst[0]~input_o ) ) + + .dataa(!\ALU|Mux24~1_combout ), + .datab(!\rst[0]~input_o ), + .datac(!\RAM|Decoder0~45_combout ), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|Decoder0~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[209][0]~210_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[209][0]~210 .extended_lut = "off"; +defparam \RAM|mem[209][0]~210 .lut_mask = 64'h333333333B3B3B3B; +defparam \RAM|mem[209][0]~210 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X48_Y8_N26 +dffeas \RAM|mem[209][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[209][0]~210_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[209][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[209][0] .is_wysiwyg = "true"; +defparam \RAM|mem[209][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X48_Y8_N24 +cyclonev_lcell_comb \rd[0]~69 ( +// Equation(s): +// \rd[0]~69_combout = ( \RAM|mem[209][0]~q & ( \ALU|Mux26~1_combout & ( (!\ALU|Mux27~1_combout ) # (\RAM|mem[193][0]~q ) ) ) ) # ( !\RAM|mem[209][0]~q & ( \ALU|Mux26~1_combout & ( (\RAM|mem[193][0]~q & \ALU|Mux27~1_combout ) ) ) ) # ( +// \RAM|mem[209][0]~q & ( !\ALU|Mux26~1_combout & ( (!\ALU|Mux27~1_combout & ((\RAM|mem[241][0]~q ))) # (\ALU|Mux27~1_combout & (\RAM|mem[225][0]~q )) ) ) ) # ( !\RAM|mem[209][0]~q & ( !\ALU|Mux26~1_combout & ( (!\ALU|Mux27~1_combout & +// ((\RAM|mem[241][0]~q ))) # (\ALU|Mux27~1_combout & (\RAM|mem[225][0]~q )) ) ) ) + + .dataa(!\RAM|mem[225][0]~q ), + .datab(!\RAM|mem[193][0]~q ), + .datac(!\RAM|mem[241][0]~q ), + .datad(!\ALU|Mux27~1_combout ), + .datae(!\RAM|mem[209][0]~q ), + .dataf(!\ALU|Mux26~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[0]~69_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[0]~69 .extended_lut = "off"; +defparam \rd[0]~69 .lut_mask = 64'h0F550F550033FF33; +defparam \rd[0]~69 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X48_Y9_N12 +cyclonev_lcell_comb \RAM|Decoder0~46 ( +// Equation(s): +// \RAM|Decoder0~46_combout = ( \ALU|Mux30~1_combout & ( \RAM|Decoder0~4_combout & ( (!\ALU|Mux28~1_combout & \ALU|Mux27~1_combout ) ) ) ) + + .dataa(gnd), + .datab(!\ALU|Mux28~1_combout ), + .datac(!\ALU|Mux27~1_combout ), + .datad(gnd), + .datae(!\ALU|Mux30~1_combout ), + .dataf(!\RAM|Decoder0~4_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|Decoder0~46_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|Decoder0~46 .extended_lut = "off"; +defparam \RAM|Decoder0~46 .lut_mask = 64'h0000000000000C0C; +defparam \RAM|Decoder0~46 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X53_Y12_N48 +cyclonev_lcell_comb \RAM|mem[201][4]~217 ( +// Equation(s): +// \RAM|mem[201][4]~217_combout = ( \RAM|Decoder0~46_combout & ( ((\RAM|Decoder0~0_combout & !\ALU|Mux24~1_combout )) # (\rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~46_combout & ( \rst[0]~input_o ) ) + + .dataa(!\rst[0]~input_o ), + .datab(!\RAM|Decoder0~0_combout ), + .datac(gnd), + .datad(!\ALU|Mux24~1_combout ), + .datae(gnd), + .dataf(!\RAM|Decoder0~46_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[201][4]~217_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[201][4]~217 .extended_lut = "off"; +defparam \RAM|mem[201][4]~217 .lut_mask = 64'h5555555577557755; +defparam \RAM|mem[201][4]~217 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X53_Y12_N52 +dffeas \RAM|mem[201][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[201][4]~217_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[201][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[201][0] .is_wysiwyg = "true"; +defparam \RAM|mem[201][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X48_Y11_N9 +cyclonev_lcell_comb \RAM|Decoder0~43 ( +// Equation(s): +// \RAM|Decoder0~43_combout = ( !\ALU|Mux24~1_combout & ( !\ALU|Mux27~1_combout ) ) + + .dataa(gnd), + .datab(gnd), + .datac(!\ALU|Mux27~1_combout ), + .datad(gnd), + .datae(gnd), + .dataf(!\ALU|Mux24~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|Decoder0~43_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|Decoder0~43 .extended_lut = "off"; +defparam \RAM|Decoder0~43 .lut_mask = 64'hF0F0F0F000000000; +defparam \RAM|Decoder0~43 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X53_Y10_N51 +cyclonev_lcell_comb \RAM|mem[217][1]~218 ( +// Equation(s): +// \RAM|mem[217][1]~218_combout = ( \RAM|Decoder0~0_combout & ( \RAM|Decoder0~4_combout & ( ((!\ALU|Mux28~1_combout & (\ALU|Mux30~1_combout & \RAM|Decoder0~43_combout ))) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~0_combout & ( +// \RAM|Decoder0~4_combout & ( \rst[0]~input_o ) ) ) # ( \RAM|Decoder0~0_combout & ( !\RAM|Decoder0~4_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~0_combout & ( !\RAM|Decoder0~4_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\ALU|Mux28~1_combout ), + .datab(!\rst[0]~input_o ), + .datac(!\ALU|Mux30~1_combout ), + .datad(!\RAM|Decoder0~43_combout ), + .datae(!\RAM|Decoder0~0_combout ), + .dataf(!\RAM|Decoder0~4_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[217][1]~218_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[217][1]~218 .extended_lut = "off"; +defparam \RAM|mem[217][1]~218 .lut_mask = 64'h333333333333333B; +defparam \RAM|mem[217][1]~218 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X53_Y10_N53 +dffeas \RAM|mem[217][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[217][1]~218_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[217][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[217][0] .is_wysiwyg = "true"; +defparam \RAM|mem[217][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X48_Y9_N0 +cyclonev_lcell_comb \RAM|mem[233][0]~219 ( +// Equation(s): +// \RAM|mem[233][0]~219_combout = ( \RAM|Decoder0~11_combout & ( \RAM|Decoder0~46_combout & ( (!\ALU|Mux24~1_combout ) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~11_combout & ( \RAM|Decoder0~46_combout & ( \rst[0]~input_o ) ) ) # ( +// \RAM|Decoder0~11_combout & ( !\RAM|Decoder0~46_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~11_combout & ( !\RAM|Decoder0~46_combout & ( \rst[0]~input_o ) ) ) + + .dataa(gnd), + .datab(!\rst[0]~input_o ), + .datac(gnd), + .datad(!\ALU|Mux24~1_combout ), + .datae(!\RAM|Decoder0~11_combout ), + .dataf(!\RAM|Decoder0~46_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[233][0]~219_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[233][0]~219 .extended_lut = "off"; +defparam \RAM|mem[233][0]~219 .lut_mask = 64'h333333333333FF33; +defparam \RAM|mem[233][0]~219 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X45_Y9_N22 +dffeas \RAM|mem[233][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[233][0]~219_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[233][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[233][0] .is_wysiwyg = "true"; +defparam \RAM|mem[233][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X48_Y8_N12 +cyclonev_lcell_comb \RAM|mem[249][1]~220 ( +// Equation(s): +// \RAM|mem[249][1]~220_combout = ( \RAM|Decoder0~43_combout & ( \RAM|Decoder0~4_combout & ( ((\RAM|Decoder0~11_combout & (!\ALU|Mux28~1_combout & \ALU|Mux30~1_combout ))) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~43_combout & ( +// \RAM|Decoder0~4_combout & ( \rst[0]~input_o ) ) ) # ( \RAM|Decoder0~43_combout & ( !\RAM|Decoder0~4_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~43_combout & ( !\RAM|Decoder0~4_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\RAM|Decoder0~11_combout ), + .datab(!\ALU|Mux28~1_combout ), + .datac(!\rst[0]~input_o ), + .datad(!\ALU|Mux30~1_combout ), + .datae(!\RAM|Decoder0~43_combout ), + .dataf(!\RAM|Decoder0~4_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[249][1]~220_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[249][1]~220 .extended_lut = "off"; +defparam \RAM|mem[249][1]~220 .lut_mask = 64'h0F0F0F0F0F0F0F4F; +defparam \RAM|mem[249][1]~220 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X48_Y8_N44 +dffeas \RAM|mem[249][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[249][1]~220_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[249][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[249][0] .is_wysiwyg = "true"; +defparam \RAM|mem[249][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X48_Y8_N42 +cyclonev_lcell_comb \rd[0]~71 ( +// Equation(s): +// \rd[0]~71_combout = ( \RAM|mem[249][0]~q & ( \ALU|Mux26~1_combout & ( (!\ALU|Mux27~1_combout & ((\RAM|mem[217][0]~q ))) # (\ALU|Mux27~1_combout & (\RAM|mem[201][0]~q )) ) ) ) # ( !\RAM|mem[249][0]~q & ( \ALU|Mux26~1_combout & ( +// (!\ALU|Mux27~1_combout & ((\RAM|mem[217][0]~q ))) # (\ALU|Mux27~1_combout & (\RAM|mem[201][0]~q )) ) ) ) # ( \RAM|mem[249][0]~q & ( !\ALU|Mux26~1_combout & ( (!\ALU|Mux27~1_combout ) # (\RAM|mem[233][0]~q ) ) ) ) # ( !\RAM|mem[249][0]~q & ( +// !\ALU|Mux26~1_combout & ( (\RAM|mem[233][0]~q & \ALU|Mux27~1_combout ) ) ) ) + + .dataa(!\RAM|mem[201][0]~q ), + .datab(!\RAM|mem[217][0]~q ), + .datac(!\RAM|mem[233][0]~q ), + .datad(!\ALU|Mux27~1_combout ), + .datae(!\RAM|mem[249][0]~q ), + .dataf(!\ALU|Mux26~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[0]~71_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[0]~71 .extended_lut = "off"; +defparam \rd[0]~71 .lut_mask = 64'h000FFF0F33553355; +defparam \rd[0]~71 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X53_Y11_N6 +cyclonev_lcell_comb \RAM|Decoder0~21 ( +// Equation(s): +// \RAM|Decoder0~21_combout = ( !\ALU|Mux25~1_combout & ( \RAM|Decoder0~20_combout & ( (\ALU|Mux26~1_combout & (!\ALU|Mux29~3_combout & (\ALU|Mux30~1_combout & !\ALU|Mux28~1_combout ))) ) ) ) + + .dataa(!\ALU|Mux26~1_combout ), + .datab(!\ALU|Mux29~3_combout ), + .datac(!\ALU|Mux30~1_combout ), + .datad(!\ALU|Mux28~1_combout ), + .datae(!\ALU|Mux25~1_combout ), + .dataf(!\RAM|Decoder0~20_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|Decoder0~21_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|Decoder0~21 .extended_lut = "off"; +defparam \RAM|Decoder0~21 .lut_mask = 64'h0000000004000000; +defparam \RAM|Decoder0~21 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X53_Y12_N45 +cyclonev_lcell_comb \RAM|mem[205][3]~221 ( +// Equation(s): +// \RAM|mem[205][3]~221_combout = ( \RAM|Decoder0~21_combout & ( \ALU|Mux31~3_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~21_combout & ( \ALU|Mux31~3_combout & ( \rst[0]~input_o ) ) ) # ( \RAM|Decoder0~21_combout & ( !\ALU|Mux31~3_combout & +// ( ((!\ALU|Mux24~1_combout & \ALU|Mux27~1_combout )) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~21_combout & ( !\ALU|Mux31~3_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\rst[0]~input_o ), + .datab(!\ALU|Mux24~1_combout ), + .datac(!\ALU|Mux27~1_combout ), + .datad(gnd), + .datae(!\RAM|Decoder0~21_combout ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[205][3]~221_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[205][3]~221 .extended_lut = "off"; +defparam \RAM|mem[205][3]~221 .lut_mask = 64'h55555D5D55555555; +defparam \RAM|mem[205][3]~221 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X53_Y12_N46 +dffeas \RAM|mem[205][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[205][3]~221_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[205][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[205][0] .is_wysiwyg = "true"; +defparam \RAM|mem[205][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X54_Y11_N24 +cyclonev_lcell_comb \RAM|mem[221][3]~222 ( +// Equation(s): +// \RAM|mem[221][3]~222_combout = ( \RAM|Decoder0~43_combout & ( \ALU|Mux31~3_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~43_combout & ( \ALU|Mux31~3_combout & ( \rst[0]~input_o ) ) ) # ( \RAM|Decoder0~43_combout & ( !\ALU|Mux31~3_combout & +// ( (\RAM|Decoder0~21_combout ) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~43_combout & ( !\ALU|Mux31~3_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\rst[0]~input_o ), + .datab(gnd), + .datac(!\RAM|Decoder0~21_combout ), + .datad(gnd), + .datae(!\RAM|Decoder0~43_combout ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[221][3]~222_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[221][3]~222 .extended_lut = "off"; +defparam \RAM|mem[221][3]~222 .lut_mask = 64'h55555F5F55555555; +defparam \RAM|mem[221][3]~222 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X54_Y11_N29 +dffeas \RAM|mem[221][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[221][3]~222_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[221][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[221][0] .is_wysiwyg = "true"; +defparam \RAM|mem[221][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X51_Y10_N51 +cyclonev_lcell_comb \RAM|Decoder0~23 ( +// Equation(s): +// \RAM|Decoder0~23_combout = ( \RAM|Decoder0~1_combout & ( !\ALU|Mux25~1_combout & ( (\ALU|Mux30~1_combout & (!\ALU|Mux23~0_combout & ((!\ALU|adder_unit|OUT_1 [8]) # (\ALU|Mux29~0_combout )))) ) ) ) + + .dataa(!\ALU|Mux30~1_combout ), + .datab(!\ALU|Mux23~0_combout ), + .datac(!\ALU|Mux29~0_combout ), + .datad(!\ALU|adder_unit|OUT_1 [8]), + .datae(!\RAM|Decoder0~1_combout ), + .dataf(!\ALU|Mux25~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|Decoder0~23_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|Decoder0~23 .extended_lut = "off"; +defparam \RAM|Decoder0~23 .lut_mask = 64'h0000440400000000; +defparam \RAM|Decoder0~23 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X53_Y12_N3 +cyclonev_lcell_comb \RAM|mem[237][2]~223 ( +// Equation(s): +// \RAM|mem[237][2]~223_combout = ( \RAM|Decoder0~23_combout & ( \ALU|Mux31~3_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~23_combout & ( \ALU|Mux31~3_combout & ( \rst[0]~input_o ) ) ) # ( \RAM|Decoder0~23_combout & ( !\ALU|Mux31~3_combout & +// ( ((\RAM|Decoder0~22_combout & (\ALU|Mux27~1_combout & !\ALU|Mux24~1_combout ))) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~23_combout & ( !\ALU|Mux31~3_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\RAM|Decoder0~22_combout ), + .datab(!\ALU|Mux27~1_combout ), + .datac(!\ALU|Mux24~1_combout ), + .datad(!\rst[0]~input_o ), + .datae(!\RAM|Decoder0~23_combout ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[237][2]~223_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[237][2]~223 .extended_lut = "off"; +defparam \RAM|mem[237][2]~223 .lut_mask = 64'h00FF10FF00FF00FF; +defparam \RAM|mem[237][2]~223 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X53_Y12_N4 +dffeas \RAM|mem[237][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[237][2]~223_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[237][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[237][0] .is_wysiwyg = "true"; +defparam \RAM|mem[237][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X51_Y11_N42 +cyclonev_lcell_comb \RAM|Decoder0~24 ( +// Equation(s): +// \RAM|Decoder0~24_combout = ( \ALU|Mux30~1_combout & ( \RAM|Decoder0~20_combout & ( (!\ALU|Mux28~1_combout & (!\ALU|Mux29~3_combout & (!\ALU|Mux26~1_combout & !\ALU|Mux25~1_combout ))) ) ) ) + + .dataa(!\ALU|Mux28~1_combout ), + .datab(!\ALU|Mux29~3_combout ), + .datac(!\ALU|Mux26~1_combout ), + .datad(!\ALU|Mux25~1_combout ), + .datae(!\ALU|Mux30~1_combout ), + .dataf(!\RAM|Decoder0~20_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|Decoder0~24_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|Decoder0~24 .extended_lut = "off"; +defparam \RAM|Decoder0~24 .lut_mask = 64'h0000000000008000; +defparam \RAM|Decoder0~24 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X51_Y10_N42 +cyclonev_lcell_comb \RAM|mem[253][2]~224 ( +// Equation(s): +// \RAM|mem[253][2]~224_combout = ( \RAM|Decoder0~24_combout & ( \ALU|Mux31~3_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~24_combout & ( \ALU|Mux31~3_combout & ( \rst[0]~input_o ) ) ) # ( \RAM|Decoder0~24_combout & ( !\ALU|Mux31~3_combout & +// ( (\RAM|Decoder0~43_combout ) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~24_combout & ( !\ALU|Mux31~3_combout & ( \rst[0]~input_o ) ) ) + + .dataa(gnd), + .datab(gnd), + .datac(!\rst[0]~input_o ), + .datad(!\RAM|Decoder0~43_combout ), + .datae(!\RAM|Decoder0~24_combout ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[253][2]~224_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[253][2]~224 .extended_lut = "off"; +defparam \RAM|mem[253][2]~224 .lut_mask = 64'h0F0F0FFF0F0F0F0F; +defparam \RAM|mem[253][2]~224 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X48_Y8_N38 +dffeas \RAM|mem[253][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[253][2]~224_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[253][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[253][0] .is_wysiwyg = "true"; +defparam \RAM|mem[253][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X48_Y8_N36 +cyclonev_lcell_comb \rd[0]~72 ( +// Equation(s): +// \rd[0]~72_combout = ( \RAM|mem[253][0]~q & ( \ALU|Mux26~1_combout & ( (!\ALU|Mux27~1_combout & ((\RAM|mem[221][0]~q ))) # (\ALU|Mux27~1_combout & (\RAM|mem[205][0]~q )) ) ) ) # ( !\RAM|mem[253][0]~q & ( \ALU|Mux26~1_combout & ( +// (!\ALU|Mux27~1_combout & ((\RAM|mem[221][0]~q ))) # (\ALU|Mux27~1_combout & (\RAM|mem[205][0]~q )) ) ) ) # ( \RAM|mem[253][0]~q & ( !\ALU|Mux26~1_combout & ( (!\ALU|Mux27~1_combout ) # (\RAM|mem[237][0]~q ) ) ) ) # ( !\RAM|mem[253][0]~q & ( +// !\ALU|Mux26~1_combout & ( (\RAM|mem[237][0]~q & \ALU|Mux27~1_combout ) ) ) ) + + .dataa(!\RAM|mem[205][0]~q ), + .datab(!\RAM|mem[221][0]~q ), + .datac(!\RAM|mem[237][0]~q ), + .datad(!\ALU|Mux27~1_combout ), + .datae(!\RAM|mem[253][0]~q ), + .dataf(!\ALU|Mux26~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[0]~72_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[0]~72 .extended_lut = "off"; +defparam \rd[0]~72 .lut_mask = 64'h000FFF0F33553355; +defparam \rd[0]~72 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X49_Y12_N9 +cyclonev_lcell_comb \RAM|mem[229][2]~215 ( +// Equation(s): +// \RAM|mem[229][2]~215_combout = ( \RAM|Decoder0~11_combout & ( \RAM|Decoder0~16_combout & ( ((\ALU|Mux27~1_combout & (!\ALU|Mux24~1_combout & \ALU|Mux30~1_combout ))) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~11_combout & ( +// \RAM|Decoder0~16_combout & ( \rst[0]~input_o ) ) ) # ( \RAM|Decoder0~11_combout & ( !\RAM|Decoder0~16_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~11_combout & ( !\RAM|Decoder0~16_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\rst[0]~input_o ), + .datab(!\ALU|Mux27~1_combout ), + .datac(!\ALU|Mux24~1_combout ), + .datad(!\ALU|Mux30~1_combout ), + .datae(!\RAM|Decoder0~11_combout ), + .dataf(!\RAM|Decoder0~16_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[229][2]~215_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[229][2]~215 .extended_lut = "off"; +defparam \RAM|mem[229][2]~215 .lut_mask = 64'h5555555555555575; +defparam \RAM|mem[229][2]~215 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X43_Y9_N41 +dffeas \RAM|mem[229][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[229][2]~215_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[229][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[229][0] .is_wysiwyg = "true"; +defparam \RAM|mem[229][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X48_Y11_N12 +cyclonev_lcell_comb \RAM|mem[245][0]~216 ( +// Equation(s): +// \RAM|mem[245][0]~216_combout = ( \RAM|Decoder0~11_combout & ( \RAM|Decoder0~16_combout & ( ((\RAM|Decoder0~43_combout & \ALU|Mux30~1_combout )) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~11_combout & ( \RAM|Decoder0~16_combout & ( \rst[0]~input_o +// ) ) ) # ( \RAM|Decoder0~11_combout & ( !\RAM|Decoder0~16_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~11_combout & ( !\RAM|Decoder0~16_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\rst[0]~input_o ), + .datab(!\RAM|Decoder0~43_combout ), + .datac(!\ALU|Mux30~1_combout ), + .datad(gnd), + .datae(!\RAM|Decoder0~11_combout ), + .dataf(!\RAM|Decoder0~16_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[245][0]~216_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[245][0]~216 .extended_lut = "off"; +defparam \RAM|mem[245][0]~216 .lut_mask = 64'h5555555555555757; +defparam \RAM|mem[245][0]~216 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X48_Y11_N14 +dffeas \RAM|mem[245][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[245][0]~216_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[245][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[245][0] .is_wysiwyg = "true"; +defparam \RAM|mem[245][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X48_Y11_N6 +cyclonev_lcell_comb \RAM|mem[213][2]~214 ( +// Equation(s): +// \RAM|mem[213][2]~214_combout = ( \RAM|Decoder0~16_combout & ( ((\ALU|Mux30~1_combout & (\RAM|Decoder0~43_combout & \RAM|Decoder0~0_combout ))) # (\rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~16_combout & ( \rst[0]~input_o ) ) + + .dataa(!\ALU|Mux30~1_combout ), + .datab(!\RAM|Decoder0~43_combout ), + .datac(!\rst[0]~input_o ), + .datad(!\RAM|Decoder0~0_combout ), + .datae(gnd), + .dataf(!\RAM|Decoder0~16_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[213][2]~214_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[213][2]~214 .extended_lut = "off"; +defparam \RAM|mem[213][2]~214 .lut_mask = 64'h0F0F0F0F0F1F0F1F; +defparam \RAM|mem[213][2]~214 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X48_Y11_N35 +dffeas \RAM|mem[213][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[213][2]~214_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[213][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[213][0] .is_wysiwyg = "true"; +defparam \RAM|mem[213][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X48_Y11_N0 +cyclonev_lcell_comb \RAM|mem[197][1]~213 ( +// Equation(s): +// \RAM|mem[197][1]~213_combout = ( \RAM|Decoder0~0_combout & ( \RAM|Decoder0~16_combout & ( ((\ALU|Mux27~1_combout & (\ALU|Mux30~1_combout & !\ALU|Mux24~1_combout ))) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~0_combout & ( \RAM|Decoder0~16_combout +// & ( \rst[0]~input_o ) ) ) # ( \RAM|Decoder0~0_combout & ( !\RAM|Decoder0~16_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~0_combout & ( !\RAM|Decoder0~16_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\ALU|Mux27~1_combout ), + .datab(!\rst[0]~input_o ), + .datac(!\ALU|Mux30~1_combout ), + .datad(!\ALU|Mux24~1_combout ), + .datae(!\RAM|Decoder0~0_combout ), + .dataf(!\RAM|Decoder0~16_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[197][1]~213_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[197][1]~213 .extended_lut = "off"; +defparam \RAM|mem[197][1]~213 .lut_mask = 64'h3333333333333733; +defparam \RAM|mem[197][1]~213 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X48_Y11_N1 +dffeas \RAM|mem[197][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[197][1]~213_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[197][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[197][0] .is_wysiwyg = "true"; +defparam \RAM|mem[197][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X48_Y11_N54 +cyclonev_lcell_comb \rd[0]~70 ( +// Equation(s): +// \rd[0]~70_combout = ( \ALU|Mux27~1_combout & ( \ALU|Mux26~1_combout & ( \RAM|mem[197][0]~q ) ) ) # ( !\ALU|Mux27~1_combout & ( \ALU|Mux26~1_combout & ( \RAM|mem[213][0]~q ) ) ) # ( \ALU|Mux27~1_combout & ( !\ALU|Mux26~1_combout & ( +// \RAM|mem[229][0]~q ) ) ) # ( !\ALU|Mux27~1_combout & ( !\ALU|Mux26~1_combout & ( \RAM|mem[245][0]~q ) ) ) + + .dataa(!\RAM|mem[229][0]~q ), + .datab(!\RAM|mem[245][0]~q ), + .datac(!\RAM|mem[213][0]~q ), + .datad(!\RAM|mem[197][0]~q ), + .datae(!\ALU|Mux27~1_combout ), + .dataf(!\ALU|Mux26~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[0]~70_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[0]~70 .extended_lut = "off"; +defparam \rd[0]~70 .lut_mask = 64'h333355550F0F00FF; +defparam \rd[0]~70 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X48_Y8_N6 +cyclonev_lcell_comb \rd[0]~73 ( +// Equation(s): +// \rd[0]~73_combout = ( \rd[0]~72_combout & ( \rd[0]~70_combout & ( (!\ALU|Mux29~3_combout ) # ((!\ALU|Mux28~1_combout & ((\rd[0]~71_combout ))) # (\ALU|Mux28~1_combout & (\rd[0]~69_combout ))) ) ) ) # ( !\rd[0]~72_combout & ( \rd[0]~70_combout & ( +// (!\ALU|Mux29~3_combout & (\ALU|Mux28~1_combout )) # (\ALU|Mux29~3_combout & ((!\ALU|Mux28~1_combout & ((\rd[0]~71_combout ))) # (\ALU|Mux28~1_combout & (\rd[0]~69_combout )))) ) ) ) # ( \rd[0]~72_combout & ( !\rd[0]~70_combout & ( +// (!\ALU|Mux29~3_combout & (!\ALU|Mux28~1_combout )) # (\ALU|Mux29~3_combout & ((!\ALU|Mux28~1_combout & ((\rd[0]~71_combout ))) # (\ALU|Mux28~1_combout & (\rd[0]~69_combout )))) ) ) ) # ( !\rd[0]~72_combout & ( !\rd[0]~70_combout & ( +// (\ALU|Mux29~3_combout & ((!\ALU|Mux28~1_combout & ((\rd[0]~71_combout ))) # (\ALU|Mux28~1_combout & (\rd[0]~69_combout )))) ) ) ) + + .dataa(!\ALU|Mux29~3_combout ), + .datab(!\ALU|Mux28~1_combout ), + .datac(!\rd[0]~69_combout ), + .datad(!\rd[0]~71_combout ), + .datae(!\rd[0]~72_combout ), + .dataf(!\rd[0]~70_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[0]~73_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[0]~73 .extended_lut = "off"; +defparam \rd[0]~73 .lut_mask = 64'h014589CD2367ABEF; +defparam \rd[0]~73 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X43_Y12_N15 +cyclonev_lcell_comb \RAM|Decoder0~49 ( +// Equation(s): +// \RAM|Decoder0~49_combout = ( \RAM|Decoder0~6_combout & ( !\ALU|Mux24~1_combout & ( (!\ALU|Mux25~1_combout & !\ALU|Mux26~1_combout ) ) ) ) + + .dataa(gnd), + .datab(gnd), + .datac(!\ALU|Mux25~1_combout ), + .datad(!\ALU|Mux26~1_combout ), + .datae(!\RAM|Decoder0~6_combout ), + .dataf(!\ALU|Mux24~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|Decoder0~49_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|Decoder0~49 .extended_lut = "off"; +defparam \RAM|Decoder0~49 .lut_mask = 64'h0000F00000000000; +defparam \RAM|Decoder0~49 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X45_Y9_N3 +cyclonev_lcell_comb \RAM|mem[235][2]~251 ( +// Equation(s): +// \RAM|mem[235][2]~251_combout = ( \RAM|Decoder0~49_combout & ( \RAM|Decoder0~4_combout & ( (!\ALU|Mux28~1_combout ) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~49_combout & ( \RAM|Decoder0~4_combout & ( \rst[0]~input_o ) ) ) # ( +// \RAM|Decoder0~49_combout & ( !\RAM|Decoder0~4_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~49_combout & ( !\RAM|Decoder0~4_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\ALU|Mux28~1_combout ), + .datab(gnd), + .datac(!\rst[0]~input_o ), + .datad(gnd), + .datae(!\RAM|Decoder0~49_combout ), + .dataf(!\RAM|Decoder0~4_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[235][2]~251_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[235][2]~251 .extended_lut = "off"; +defparam \RAM|mem[235][2]~251 .lut_mask = 64'h0F0F0F0F0F0FAFAF; +defparam \RAM|mem[235][2]~251 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X45_Y9_N35 +dffeas \RAM|mem[235][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[235][2]~251_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[235][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[235][0] .is_wysiwyg = "true"; +defparam \RAM|mem[235][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X43_Y9_N6 +cyclonev_lcell_comb \RAM|mem[231][2]~250 ( +// Equation(s): +// \RAM|mem[231][2]~250_combout = ( \RAM|Decoder0~16_combout & ( \RAM|Decoder0~49_combout ) ) # ( !\RAM|Decoder0~16_combout & ( \RAM|Decoder0~49_combout & ( \rst[0]~input_o ) ) ) # ( \RAM|Decoder0~16_combout & ( !\RAM|Decoder0~49_combout & ( +// \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~16_combout & ( !\RAM|Decoder0~49_combout & ( \rst[0]~input_o ) ) ) + + .dataa(gnd), + .datab(!\rst[0]~input_o ), + .datac(gnd), + .datad(gnd), + .datae(!\RAM|Decoder0~16_combout ), + .dataf(!\RAM|Decoder0~49_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[231][2]~250_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[231][2]~250 .extended_lut = "off"; +defparam \RAM|mem[231][2]~250 .lut_mask = 64'h333333333333FFFF; +defparam \RAM|mem[231][2]~250 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X43_Y9_N34 +dffeas \RAM|mem[231][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[231][2]~250_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[231][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[231][0] .is_wysiwyg = "true"; +defparam \RAM|mem[231][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X43_Y5_N54 +cyclonev_lcell_comb \RAM|mem[227][3]~249 ( +// Equation(s): +// \RAM|mem[227][3]~249_combout = ( \ALU|Mux28~1_combout & ( \RAM|Decoder0~4_combout & ( (\RAM|Decoder0~49_combout ) # (\rst[0]~input_o ) ) ) ) # ( !\ALU|Mux28~1_combout & ( \RAM|Decoder0~4_combout & ( \rst[0]~input_o ) ) ) # ( \ALU|Mux28~1_combout & +// ( !\RAM|Decoder0~4_combout & ( \rst[0]~input_o ) ) ) # ( !\ALU|Mux28~1_combout & ( !\RAM|Decoder0~4_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\rst[0]~input_o ), + .datab(gnd), + .datac(!\RAM|Decoder0~49_combout ), + .datad(gnd), + .datae(!\ALU|Mux28~1_combout ), + .dataf(!\RAM|Decoder0~4_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[227][3]~249_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[227][3]~249 .extended_lut = "off"; +defparam \RAM|mem[227][3]~249 .lut_mask = 64'h5555555555555F5F; +defparam \RAM|mem[227][3]~249 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X43_Y5_N55 +dffeas \RAM|mem[227][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[227][3]~249_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[227][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[227][0] .is_wysiwyg = "true"; +defparam \RAM|mem[227][0] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y11_N18 +cyclonev_lcell_comb \RAM|Decoder0~42 ( +// Equation(s): +// \RAM|Decoder0~42_combout = ( !\ALU|Mux24~1_combout & ( !\ALU|Mux25~1_combout ) ) + + .dataa(gnd), + .datab(gnd), + .datac(!\ALU|Mux25~1_combout ), + .datad(gnd), + .datae(gnd), + .dataf(!\ALU|Mux24~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|Decoder0~42_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|Decoder0~42 .extended_lut = "off"; +defparam \RAM|Decoder0~42 .lut_mask = 64'hF0F0F0F000000000; +defparam \RAM|Decoder0~42 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X48_Y10_N57 +cyclonev_lcell_comb \RAM|mem[239][1]~252 ( +// Equation(s): +// \RAM|mem[239][1]~252_combout = ( \RAM|Decoder0~42_combout & ( \ALU|Mux31~3_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~42_combout & ( \ALU|Mux31~3_combout & ( \rst[0]~input_o ) ) ) # ( \RAM|Decoder0~42_combout & ( !\ALU|Mux31~3_combout & +// ( ((\RAM|Decoder0~27_combout & \RAM|Decoder0~22_combout )) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~42_combout & ( !\ALU|Mux31~3_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\rst[0]~input_o ), + .datab(gnd), + .datac(!\RAM|Decoder0~27_combout ), + .datad(!\RAM|Decoder0~22_combout ), + .datae(!\RAM|Decoder0~42_combout ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[239][1]~252_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[239][1]~252 .extended_lut = "off"; +defparam \RAM|mem[239][1]~252 .lut_mask = 64'h5555555F55555555; +defparam \RAM|mem[239][1]~252 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X48_Y10_N20 +dffeas \RAM|mem[239][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[239][1]~252_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[239][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[239][0] .is_wysiwyg = "true"; +defparam \RAM|mem[239][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X48_Y10_N18 +cyclonev_lcell_comb \rd[0]~81 ( +// Equation(s): +// \rd[0]~81_combout = ( \RAM|mem[239][0]~q & ( \ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout & (\RAM|mem[231][0]~q )) # (\ALU|Mux29~3_combout & ((\RAM|mem[227][0]~q ))) ) ) ) # ( !\RAM|mem[239][0]~q & ( \ALU|Mux28~1_combout & ( +// (!\ALU|Mux29~3_combout & (\RAM|mem[231][0]~q )) # (\ALU|Mux29~3_combout & ((\RAM|mem[227][0]~q ))) ) ) ) # ( \RAM|mem[239][0]~q & ( !\ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout ) # (\RAM|mem[235][0]~q ) ) ) ) # ( !\RAM|mem[239][0]~q & ( +// !\ALU|Mux28~1_combout & ( (\RAM|mem[235][0]~q & \ALU|Mux29~3_combout ) ) ) ) + + .dataa(!\RAM|mem[235][0]~q ), + .datab(!\ALU|Mux29~3_combout ), + .datac(!\RAM|mem[231][0]~q ), + .datad(!\RAM|mem[227][0]~q ), + .datae(!\RAM|mem[239][0]~q ), + .dataf(!\ALU|Mux28~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[0]~81_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[0]~81 .extended_lut = "off"; +defparam \rd[0]~81 .lut_mask = 64'h1111DDDD0C3F0C3F; +defparam \rd[0]~81 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X43_Y8_N9 +cyclonev_lcell_comb \RAM|Decoder0~51 ( +// Equation(s): +// \RAM|Decoder0~51_combout = ( !\ALU|Mux24~1_combout & ( (!\ALU|Mux26~1_combout & !\ALU|Mux25~1_combout ) ) ) + + .dataa(gnd), + .datab(gnd), + .datac(!\ALU|Mux26~1_combout ), + .datad(!\ALU|Mux25~1_combout ), + .datae(gnd), + .dataf(!\ALU|Mux24~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|Decoder0~51_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|Decoder0~51 .extended_lut = "off"; +defparam \RAM|Decoder0~51 .lut_mask = 64'hF000F00000000000; +defparam \RAM|Decoder0~51 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X47_Y8_N27 +cyclonev_lcell_comb \RAM|mem[243][2]~253 ( +// Equation(s): +// \RAM|mem[243][2]~253_combout = ( \RAM|Decoder0~51_combout & ( \RAM|Decoder0~4_combout & ( ((\RAM|Decoder0~8_combout & \ALU|Mux28~1_combout )) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~51_combout & ( \RAM|Decoder0~4_combout & ( \rst[0]~input_o ) +// ) ) # ( \RAM|Decoder0~51_combout & ( !\RAM|Decoder0~4_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~51_combout & ( !\RAM|Decoder0~4_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\rst[0]~input_o ), + .datab(!\RAM|Decoder0~8_combout ), + .datac(gnd), + .datad(!\ALU|Mux28~1_combout ), + .datae(!\RAM|Decoder0~51_combout ), + .dataf(!\RAM|Decoder0~4_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[243][2]~253_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[243][2]~253 .extended_lut = "off"; +defparam \RAM|mem[243][2]~253 .lut_mask = 64'h5555555555555577; +defparam \RAM|mem[243][2]~253 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X47_Y8_N28 +dffeas \RAM|mem[243][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[243][2]~253_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[243][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[243][0] .is_wysiwyg = "true"; +defparam \RAM|mem[243][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X43_Y8_N6 +cyclonev_lcell_comb \RAM|mem[247][4]~254 ( +// Equation(s): +// \RAM|mem[247][4]~254_combout = ( \RAM|Decoder0~8_combout & ( ((\RAM|Decoder0~51_combout & \RAM|Decoder0~16_combout )) # (\rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~8_combout & ( \rst[0]~input_o ) ) + + .dataa(gnd), + .datab(!\RAM|Decoder0~51_combout ), + .datac(!\rst[0]~input_o ), + .datad(!\RAM|Decoder0~16_combout ), + .datae(gnd), + .dataf(!\RAM|Decoder0~8_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[247][4]~254_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[247][4]~254 .extended_lut = "off"; +defparam \RAM|mem[247][4]~254 .lut_mask = 64'h0F0F0F0F0F3F0F3F; +defparam \RAM|mem[247][4]~254 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X43_Y8_N4 +dffeas \RAM|mem[247][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[247][4]~254_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[247][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[247][0] .is_wysiwyg = "true"; +defparam \RAM|mem[247][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X54_Y12_N51 +cyclonev_lcell_comb \RAM|mem[255][0]~feeder ( +// Equation(s): +// \RAM|mem[255][0]~feeder_combout = ( \RAM|mem~0_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[255][0]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[255][0]~feeder .extended_lut = "off"; +defparam \RAM|mem[255][0]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[255][0]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X54_Y10_N36 +cyclonev_lcell_comb \RAM|mem[255][3]~256 ( +// Equation(s): +// \RAM|mem[255][3]~256_combout = ( \ALU|Mux31~3_combout & ( \RAM|Decoder0~8_combout & ( \rst[0]~input_o ) ) ) # ( !\ALU|Mux31~3_combout & ( \RAM|Decoder0~8_combout & ( ((\RAM|Decoder0~51_combout & \RAM|Decoder0~25_combout )) # (\rst[0]~input_o ) ) ) +// ) # ( \ALU|Mux31~3_combout & ( !\RAM|Decoder0~8_combout & ( \rst[0]~input_o ) ) ) # ( !\ALU|Mux31~3_combout & ( !\RAM|Decoder0~8_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\RAM|Decoder0~51_combout ), + .datab(!\rst[0]~input_o ), + .datac(!\RAM|Decoder0~25_combout ), + .datad(gnd), + .datae(!\ALU|Mux31~3_combout ), + .dataf(!\RAM|Decoder0~8_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[255][3]~256_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[255][3]~256 .extended_lut = "off"; +defparam \RAM|mem[255][3]~256 .lut_mask = 64'h3333333337373333; +defparam \RAM|mem[255][3]~256 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X54_Y12_N52 +dffeas \RAM|mem[255][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[255][0]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[255][3]~256_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[255][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[255][0] .is_wysiwyg = "true"; +defparam \RAM|mem[255][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X45_Y12_N18 +cyclonev_lcell_comb \RAM|mem[251][2]~255 ( +// Equation(s): +// \RAM|mem[251][2]~255_combout = ( \RAM|Decoder0~51_combout & ( \RAM|Decoder0~4_combout & ( ((!\ALU|Mux28~1_combout & \RAM|Decoder0~8_combout )) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~51_combout & ( \RAM|Decoder0~4_combout & ( \rst[0]~input_o +// ) ) ) # ( \RAM|Decoder0~51_combout & ( !\RAM|Decoder0~4_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~51_combout & ( !\RAM|Decoder0~4_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\rst[0]~input_o ), + .datab(gnd), + .datac(!\ALU|Mux28~1_combout ), + .datad(!\RAM|Decoder0~8_combout ), + .datae(!\RAM|Decoder0~51_combout ), + .dataf(!\RAM|Decoder0~4_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[251][2]~255_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[251][2]~255 .extended_lut = "off"; +defparam \RAM|mem[251][2]~255 .lut_mask = 64'h55555555555555F5; +defparam \RAM|mem[251][2]~255 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X48_Y10_N8 +dffeas \RAM|mem[251][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[251][2]~255_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[251][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[251][0] .is_wysiwyg = "true"; +defparam \RAM|mem[251][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X48_Y10_N6 +cyclonev_lcell_comb \rd[0]~82 ( +// Equation(s): +// \rd[0]~82_combout = ( \RAM|mem[251][0]~q & ( \ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout & ((\RAM|mem[247][0]~q ))) # (\ALU|Mux29~3_combout & (\RAM|mem[243][0]~q )) ) ) ) # ( !\RAM|mem[251][0]~q & ( \ALU|Mux28~1_combout & ( +// (!\ALU|Mux29~3_combout & ((\RAM|mem[247][0]~q ))) # (\ALU|Mux29~3_combout & (\RAM|mem[243][0]~q )) ) ) ) # ( \RAM|mem[251][0]~q & ( !\ALU|Mux28~1_combout & ( (\RAM|mem[255][0]~q ) # (\ALU|Mux29~3_combout ) ) ) ) # ( !\RAM|mem[251][0]~q & ( +// !\ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout & \RAM|mem[255][0]~q ) ) ) ) + + .dataa(!\RAM|mem[243][0]~q ), + .datab(!\ALU|Mux29~3_combout ), + .datac(!\RAM|mem[247][0]~q ), + .datad(!\RAM|mem[255][0]~q ), + .datae(!\RAM|mem[251][0]~q ), + .dataf(!\ALU|Mux28~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[0]~82_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[0]~82 .extended_lut = "off"; +defparam \rd[0]~82 .lut_mask = 64'h00CC33FF1D1D1D1D; +defparam \rd[0]~82 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X47_Y9_N54 +cyclonev_lcell_comb \RAM|Decoder0~50 ( +// Equation(s): +// \RAM|Decoder0~50_combout = ( !\ALU|Mux25~1_combout & ( (!\ALU|Mux24~1_combout & \ALU|Mux26~1_combout ) ) ) + + .dataa(gnd), + .datab(gnd), + .datac(!\ALU|Mux24~1_combout ), + .datad(!\ALU|Mux26~1_combout ), + .datae(gnd), + .dataf(!\ALU|Mux25~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|Decoder0~50_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|Decoder0~50 .extended_lut = "off"; +defparam \RAM|Decoder0~50 .lut_mask = 64'h00F000F000000000; +defparam \RAM|Decoder0~50 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X43_Y8_N27 +cyclonev_lcell_comb \RAM|mem[215][1]~246 ( +// Equation(s): +// \RAM|mem[215][1]~246_combout = ( \RAM|Decoder0~8_combout & ( ((\RAM|Decoder0~16_combout & \RAM|Decoder0~50_combout )) # (\rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~8_combout & ( \rst[0]~input_o ) ) + + .dataa(!\rst[0]~input_o ), + .datab(!\RAM|Decoder0~16_combout ), + .datac(!\RAM|Decoder0~50_combout ), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|Decoder0~8_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[215][1]~246_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[215][1]~246 .extended_lut = "off"; +defparam \RAM|mem[215][1]~246 .lut_mask = 64'h5555555557575757; +defparam \RAM|mem[215][1]~246 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X43_Y8_N28 +dffeas \RAM|mem[215][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[215][1]~246_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[215][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[215][0] .is_wysiwyg = "true"; +defparam \RAM|mem[215][0] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X47_Y12_N30 +cyclonev_lcell_comb \RAM|mem[219][0]~247 ( +// Equation(s): +// \RAM|mem[219][0]~247_combout = ( \RAM|Decoder0~50_combout & ( \RAM|Decoder0~4_combout & ( ((!\ALU|Mux28~1_combout & \RAM|Decoder0~8_combout )) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~50_combout & ( \RAM|Decoder0~4_combout & ( \rst[0]~input_o +// ) ) ) # ( \RAM|Decoder0~50_combout & ( !\RAM|Decoder0~4_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~50_combout & ( !\RAM|Decoder0~4_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\rst[0]~input_o ), + .datab(!\ALU|Mux28~1_combout ), + .datac(!\RAM|Decoder0~8_combout ), + .datad(gnd), + .datae(!\RAM|Decoder0~50_combout ), + .dataf(!\RAM|Decoder0~4_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[219][0]~247_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[219][0]~247 .extended_lut = "off"; +defparam \RAM|mem[219][0]~247 .lut_mask = 64'h5555555555555D5D; +defparam \RAM|mem[219][0]~247 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X48_Y10_N40 +dffeas \RAM|mem[219][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[219][0]~247_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[219][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[219][0] .is_wysiwyg = "true"; +defparam \RAM|mem[219][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X43_Y12_N42 +cyclonev_lcell_comb \RAM|mem[211][1]~245 ( +// Equation(s): +// \RAM|mem[211][1]~245_combout = ( \RAM|Decoder0~8_combout & ( \RAM|Decoder0~4_combout & ( ((\ALU|Mux28~1_combout & \RAM|Decoder0~50_combout )) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~8_combout & ( \RAM|Decoder0~4_combout & ( \rst[0]~input_o ) +// ) ) # ( \RAM|Decoder0~8_combout & ( !\RAM|Decoder0~4_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~8_combout & ( !\RAM|Decoder0~4_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\rst[0]~input_o ), + .datab(!\ALU|Mux28~1_combout ), + .datac(!\RAM|Decoder0~50_combout ), + .datad(gnd), + .datae(!\RAM|Decoder0~8_combout ), + .dataf(!\RAM|Decoder0~4_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[211][1]~245_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[211][1]~245 .extended_lut = "off"; +defparam \RAM|mem[211][1]~245 .lut_mask = 64'h5555555555555757; +defparam \RAM|mem[211][1]~245 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X43_Y12_N44 +dffeas \RAM|mem[211][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[211][1]~245_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[211][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[211][0] .is_wysiwyg = "true"; +defparam \RAM|mem[211][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X54_Y10_N57 +cyclonev_lcell_comb \RAM|mem[223][2]~248 ( +// Equation(s): +// \RAM|mem[223][2]~248_combout = ( \ALU|Mux31~3_combout & ( \RAM|Decoder0~8_combout & ( \rst[0]~input_o ) ) ) # ( !\ALU|Mux31~3_combout & ( \RAM|Decoder0~8_combout & ( ((\RAM|Decoder0~50_combout & \RAM|Decoder0~25_combout )) # (\rst[0]~input_o ) ) ) +// ) # ( \ALU|Mux31~3_combout & ( !\RAM|Decoder0~8_combout & ( \rst[0]~input_o ) ) ) # ( !\ALU|Mux31~3_combout & ( !\RAM|Decoder0~8_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\rst[0]~input_o ), + .datab(gnd), + .datac(!\RAM|Decoder0~50_combout ), + .datad(!\RAM|Decoder0~25_combout ), + .datae(!\ALU|Mux31~3_combout ), + .dataf(!\RAM|Decoder0~8_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[223][2]~248_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[223][2]~248 .extended_lut = "off"; +defparam \RAM|mem[223][2]~248 .lut_mask = 64'h55555555555F5555; +defparam \RAM|mem[223][2]~248 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X54_Y10_N44 +dffeas \RAM|mem[223][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[223][2]~248_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[223][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[223][0] .is_wysiwyg = "true"; +defparam \RAM|mem[223][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X54_Y10_N42 +cyclonev_lcell_comb \rd[0]~80 ( +// Equation(s): +// \rd[0]~80_combout = ( \RAM|mem[223][0]~q & ( \ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout & (\RAM|mem[215][0]~q )) # (\ALU|Mux29~3_combout & ((\RAM|mem[211][0]~q ))) ) ) ) # ( !\RAM|mem[223][0]~q & ( \ALU|Mux28~1_combout & ( +// (!\ALU|Mux29~3_combout & (\RAM|mem[215][0]~q )) # (\ALU|Mux29~3_combout & ((\RAM|mem[211][0]~q ))) ) ) ) # ( \RAM|mem[223][0]~q & ( !\ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout ) # (\RAM|mem[219][0]~q ) ) ) ) # ( !\RAM|mem[223][0]~q & ( +// !\ALU|Mux28~1_combout & ( (\RAM|mem[219][0]~q & \ALU|Mux29~3_combout ) ) ) ) + + .dataa(!\RAM|mem[215][0]~q ), + .datab(!\RAM|mem[219][0]~q ), + .datac(!\RAM|mem[211][0]~q ), + .datad(!\ALU|Mux29~3_combout ), + .datae(!\RAM|mem[223][0]~q ), + .dataf(!\ALU|Mux28~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[0]~80_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[0]~80 .extended_lut = "off"; +defparam \rd[0]~80 .lut_mask = 64'h0033FF33550F550F; +defparam \rd[0]~80 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X48_Y11_N48 +cyclonev_lcell_comb \RAM|Decoder0~48 ( +// Equation(s): +// \RAM|Decoder0~48_combout = ( !\ALU|Mux25~1_combout & ( \RAM|Decoder0~6_combout & ( (\ALU|Mux26~1_combout & !\ALU|Mux24~1_combout ) ) ) ) + + .dataa(gnd), + .datab(gnd), + .datac(!\ALU|Mux26~1_combout ), + .datad(!\ALU|Mux24~1_combout ), + .datae(!\ALU|Mux25~1_combout ), + .dataf(!\RAM|Decoder0~6_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|Decoder0~48_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|Decoder0~48 .extended_lut = "off"; +defparam \RAM|Decoder0~48 .lut_mask = 64'h000000000F000000; +defparam \RAM|Decoder0~48 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X48_Y13_N33 +cyclonev_lcell_comb \RAM|mem[195][0]~241 ( +// Equation(s): +// \RAM|mem[195][0]~241_combout = ( \RAM|Decoder0~48_combout & ( \RAM|Decoder0~4_combout & ( (\rst[0]~input_o ) # (\ALU|Mux28~1_combout ) ) ) ) # ( !\RAM|Decoder0~48_combout & ( \RAM|Decoder0~4_combout & ( \rst[0]~input_o ) ) ) # ( +// \RAM|Decoder0~48_combout & ( !\RAM|Decoder0~4_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~48_combout & ( !\RAM|Decoder0~4_combout & ( \rst[0]~input_o ) ) ) + + .dataa(gnd), + .datab(gnd), + .datac(!\ALU|Mux28~1_combout ), + .datad(!\rst[0]~input_o ), + .datae(!\RAM|Decoder0~48_combout ), + .dataf(!\RAM|Decoder0~4_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[195][0]~241_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[195][0]~241 .extended_lut = "off"; +defparam \RAM|mem[195][0]~241 .lut_mask = 64'h00FF00FF00FF0FFF; +defparam \RAM|mem[195][0]~241 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X49_Y13_N20 +dffeas \RAM|mem[195][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[195][0]~241_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[195][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[195][0] .is_wysiwyg = "true"; +defparam \RAM|mem[195][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X49_Y10_N45 +cyclonev_lcell_comb \RAM|mem[199][3]~242 ( +// Equation(s): +// \RAM|mem[199][3]~242_combout = ( \RAM|Decoder0~48_combout & ( \RAM|Decoder0~16_combout ) ) # ( !\RAM|Decoder0~48_combout & ( \RAM|Decoder0~16_combout & ( \rst[0]~input_o ) ) ) # ( \RAM|Decoder0~48_combout & ( !\RAM|Decoder0~16_combout & ( +// \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~48_combout & ( !\RAM|Decoder0~16_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\rst[0]~input_o ), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(!\RAM|Decoder0~48_combout ), + .dataf(!\RAM|Decoder0~16_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[199][3]~242_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[199][3]~242 .extended_lut = "off"; +defparam \RAM|mem[199][3]~242 .lut_mask = 64'h555555555555FFFF; +defparam \RAM|mem[199][3]~242 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X49_Y10_N44 +dffeas \RAM|mem[199][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[199][3]~242_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[199][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[199][0] .is_wysiwyg = "true"; +defparam \RAM|mem[199][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X48_Y13_N24 +cyclonev_lcell_comb \RAM|mem[203][0]~feeder ( +// Equation(s): +// \RAM|mem[203][0]~feeder_combout = ( \RAM|mem~0_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[203][0]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[203][0]~feeder .extended_lut = "off"; +defparam \RAM|mem[203][0]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[203][0]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X48_Y13_N57 +cyclonev_lcell_comb \RAM|mem[203][4]~243 ( +// Equation(s): +// \RAM|mem[203][4]~243_combout = ( \RAM|Decoder0~4_combout & ( ((!\ALU|Mux28~1_combout & \RAM|Decoder0~48_combout )) # (\rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~4_combout & ( \rst[0]~input_o ) ) + + .dataa(!\rst[0]~input_o ), + .datab(gnd), + .datac(!\ALU|Mux28~1_combout ), + .datad(!\RAM|Decoder0~48_combout ), + .datae(gnd), + .dataf(!\RAM|Decoder0~4_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[203][4]~243_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[203][4]~243 .extended_lut = "off"; +defparam \RAM|mem[203][4]~243 .lut_mask = 64'h5555555555F555F5; +defparam \RAM|mem[203][4]~243 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X48_Y13_N25 +dffeas \RAM|mem[203][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[203][0]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[203][4]~243_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[203][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[203][0] .is_wysiwyg = "true"; +defparam \RAM|mem[203][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X49_Y13_N3 +cyclonev_lcell_comb \RAM|mem[207][0]~244 ( +// Equation(s): +// \RAM|mem[207][0]~244_combout = ( \RAM|Decoder0~27_combout & ( \ALU|Mux31~3_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~27_combout & ( \ALU|Mux31~3_combout & ( \rst[0]~input_o ) ) ) # ( \RAM|Decoder0~27_combout & ( !\ALU|Mux31~3_combout & +// ( ((!\ALU|Mux28~1_combout & (!\ALU|Mux29~3_combout & \RAM|Decoder0~50_combout ))) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~27_combout & ( !\ALU|Mux31~3_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\ALU|Mux28~1_combout ), + .datab(!\rst[0]~input_o ), + .datac(!\ALU|Mux29~3_combout ), + .datad(!\RAM|Decoder0~50_combout ), + .datae(!\RAM|Decoder0~27_combout ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[207][0]~244_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[207][0]~244 .extended_lut = "off"; +defparam \RAM|mem[207][0]~244 .lut_mask = 64'h333333B333333333; +defparam \RAM|mem[207][0]~244 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X49_Y13_N38 +dffeas \RAM|mem[207][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[207][0]~244_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[207][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[207][0] .is_wysiwyg = "true"; +defparam \RAM|mem[207][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X49_Y13_N36 +cyclonev_lcell_comb \rd[0]~79 ( +// Equation(s): +// \rd[0]~79_combout = ( \RAM|mem[207][0]~q & ( \ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout & ((\RAM|mem[199][0]~q ))) # (\ALU|Mux29~3_combout & (\RAM|mem[195][0]~q )) ) ) ) # ( !\RAM|mem[207][0]~q & ( \ALU|Mux28~1_combout & ( +// (!\ALU|Mux29~3_combout & ((\RAM|mem[199][0]~q ))) # (\ALU|Mux29~3_combout & (\RAM|mem[195][0]~q )) ) ) ) # ( \RAM|mem[207][0]~q & ( !\ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout ) # (\RAM|mem[203][0]~q ) ) ) ) # ( !\RAM|mem[207][0]~q & ( +// !\ALU|Mux28~1_combout & ( (\RAM|mem[203][0]~q & \ALU|Mux29~3_combout ) ) ) ) + + .dataa(!\RAM|mem[195][0]~q ), + .datab(!\RAM|mem[199][0]~q ), + .datac(!\RAM|mem[203][0]~q ), + .datad(!\ALU|Mux29~3_combout ), + .datae(!\RAM|mem[207][0]~q ), + .dataf(!\ALU|Mux28~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[0]~79_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[0]~79 .extended_lut = "off"; +defparam \rd[0]~79 .lut_mask = 64'h000FFF0F33553355; +defparam \rd[0]~79 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X48_Y10_N0 +cyclonev_lcell_comb \rd[0]~83 ( +// Equation(s): +// \rd[0]~83_combout = ( \rd[0]~80_combout & ( \rd[0]~79_combout & ( ((!\ALU|Mux27~1_combout & ((\rd[0]~82_combout ))) # (\ALU|Mux27~1_combout & (\rd[0]~81_combout ))) # (\ALU|Mux26~1_combout ) ) ) ) # ( !\rd[0]~80_combout & ( \rd[0]~79_combout & ( +// (!\ALU|Mux27~1_combout & (!\ALU|Mux26~1_combout & ((\rd[0]~82_combout )))) # (\ALU|Mux27~1_combout & (((\rd[0]~81_combout )) # (\ALU|Mux26~1_combout ))) ) ) ) # ( \rd[0]~80_combout & ( !\rd[0]~79_combout & ( (!\ALU|Mux27~1_combout & +// (((\rd[0]~82_combout )) # (\ALU|Mux26~1_combout ))) # (\ALU|Mux27~1_combout & (!\ALU|Mux26~1_combout & (\rd[0]~81_combout ))) ) ) ) # ( !\rd[0]~80_combout & ( !\rd[0]~79_combout & ( (!\ALU|Mux26~1_combout & ((!\ALU|Mux27~1_combout & +// ((\rd[0]~82_combout ))) # (\ALU|Mux27~1_combout & (\rd[0]~81_combout )))) ) ) ) + + .dataa(!\ALU|Mux27~1_combout ), + .datab(!\ALU|Mux26~1_combout ), + .datac(!\rd[0]~81_combout ), + .datad(!\rd[0]~82_combout ), + .datae(!\rd[0]~80_combout ), + .dataf(!\rd[0]~79_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[0]~83_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[0]~83 .extended_lut = "off"; +defparam \rd[0]~83 .lut_mask = 64'h048C26AE159D37BF; +defparam \rd[0]~83 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X47_Y11_N57 +cyclonev_lcell_comb \RAM|mem[228][4]~199 ( +// Equation(s): +// \RAM|mem[228][4]~199_combout = ( \RAM|Decoder0~42_combout & ( \RAM|Decoder0~15_combout & ( ((\RAM|Decoder0~28_combout & !\ALU|Mux26~1_combout )) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~42_combout & ( \RAM|Decoder0~15_combout & ( +// \rst[0]~input_o ) ) ) # ( \RAM|Decoder0~42_combout & ( !\RAM|Decoder0~15_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~42_combout & ( !\RAM|Decoder0~15_combout & ( \rst[0]~input_o ) ) ) + + .dataa(gnd), + .datab(!\rst[0]~input_o ), + .datac(!\RAM|Decoder0~28_combout ), + .datad(!\ALU|Mux26~1_combout ), + .datae(!\RAM|Decoder0~42_combout ), + .dataf(!\RAM|Decoder0~15_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[228][4]~199_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[228][4]~199 .extended_lut = "off"; +defparam \RAM|mem[228][4]~199 .lut_mask = 64'h3333333333333F33; +defparam \RAM|mem[228][4]~199 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X53_Y7_N34 +dffeas \RAM|mem[228][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[228][4]~199_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[228][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[228][0] .is_wysiwyg = "true"; +defparam \RAM|mem[228][0] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X50_Y6_N51 +cyclonev_lcell_comb \RAM|mem[244][2]~200 ( +// Equation(s): +// \RAM|mem[244][2]~200_combout = ( \RAM|Decoder0~42_combout & ( \RAM|Decoder0~15_combout & ( ((!\ALU|Mux26~1_combout & \RAM|Decoder0~7_combout )) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~42_combout & ( \RAM|Decoder0~15_combout & ( \rst[0]~input_o +// ) ) ) # ( \RAM|Decoder0~42_combout & ( !\RAM|Decoder0~15_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~42_combout & ( !\RAM|Decoder0~15_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\rst[0]~input_o ), + .datab(gnd), + .datac(!\ALU|Mux26~1_combout ), + .datad(!\RAM|Decoder0~7_combout ), + .datae(!\RAM|Decoder0~42_combout ), + .dataf(!\RAM|Decoder0~15_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[244][2]~200_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[244][2]~200 .extended_lut = "off"; +defparam \RAM|mem[244][2]~200 .lut_mask = 64'h55555555555555F5; +defparam \RAM|mem[244][2]~200 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X50_Y6_N49 +dffeas \RAM|mem[244][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[244][2]~200_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[244][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[244][0] .is_wysiwyg = "true"; +defparam \RAM|mem[244][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X48_Y7_N30 +cyclonev_lcell_comb \RAM|mem[212][1]~198 ( +// Equation(s): +// \RAM|mem[212][1]~198_combout = ( \RAM|Decoder0~15_combout & ( ((\ALU|Mux26~1_combout & (\RAM|Decoder0~7_combout & \RAM|Decoder0~42_combout ))) # (\rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~15_combout & ( \rst[0]~input_o ) ) + + .dataa(!\rst[0]~input_o ), + .datab(!\ALU|Mux26~1_combout ), + .datac(!\RAM|Decoder0~7_combout ), + .datad(!\RAM|Decoder0~42_combout ), + .datae(gnd), + .dataf(!\RAM|Decoder0~15_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[212][1]~198_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[212][1]~198 .extended_lut = "off"; +defparam \RAM|mem[212][1]~198 .lut_mask = 64'h5555555555575557; +defparam \RAM|mem[212][1]~198 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X48_Y7_N31 +dffeas \RAM|mem[212][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[212][1]~198_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[212][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[212][0] .is_wysiwyg = "true"; +defparam \RAM|mem[212][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X49_Y10_N36 +cyclonev_lcell_comb \RAM|mem[196][0]~197 ( +// Equation(s): +// \RAM|mem[196][0]~197_combout = ( \RAM|Decoder0~42_combout & ( \RAM|Decoder0~15_combout & ( ((\ALU|Mux26~1_combout & \RAM|Decoder0~28_combout )) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~42_combout & ( \RAM|Decoder0~15_combout & ( \rst[0]~input_o +// ) ) ) # ( \RAM|Decoder0~42_combout & ( !\RAM|Decoder0~15_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~42_combout & ( !\RAM|Decoder0~15_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\rst[0]~input_o ), + .datab(gnd), + .datac(!\ALU|Mux26~1_combout ), + .datad(!\RAM|Decoder0~28_combout ), + .datae(!\RAM|Decoder0~42_combout ), + .dataf(!\RAM|Decoder0~15_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[196][0]~197_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[196][0]~197 .extended_lut = "off"; +defparam \RAM|mem[196][0]~197 .lut_mask = 64'h555555555555555F; +defparam \RAM|mem[196][0]~197 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X49_Y10_N4 +dffeas \RAM|mem[196][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[196][0]~197_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[196][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[196][0] .is_wysiwyg = "true"; +defparam \RAM|mem[196][0] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X47_Y9_N18 +cyclonev_lcell_comb \rd[0]~65 ( +// Equation(s): +// \rd[0]~65_combout = ( \ALU|Mux27~1_combout & ( \ALU|Mux26~1_combout & ( \RAM|mem[196][0]~q ) ) ) # ( !\ALU|Mux27~1_combout & ( \ALU|Mux26~1_combout & ( \RAM|mem[212][0]~q ) ) ) # ( \ALU|Mux27~1_combout & ( !\ALU|Mux26~1_combout & ( +// \RAM|mem[228][0]~q ) ) ) # ( !\ALU|Mux27~1_combout & ( !\ALU|Mux26~1_combout & ( \RAM|mem[244][0]~q ) ) ) + + .dataa(!\RAM|mem[228][0]~q ), + .datab(!\RAM|mem[244][0]~q ), + .datac(!\RAM|mem[212][0]~q ), + .datad(!\RAM|mem[196][0]~q ), + .datae(!\ALU|Mux27~1_combout ), + .dataf(!\ALU|Mux26~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[0]~65_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[0]~65 .extended_lut = "off"; +defparam \rd[0]~65 .lut_mask = 64'h333355550F0F00FF; +defparam \rd[0]~65 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X51_Y9_N21 +cyclonev_lcell_comb \RAM|mem[192][3]~193 ( +// Equation(s): +// \RAM|mem[192][3]~193_combout = ( \RAM|Decoder0~0_combout & ( \RAM|Decoder0~3_combout & ( ((\pc_we[0]~0_combout & !\ALU|Mux24~1_combout )) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~0_combout & ( \RAM|Decoder0~3_combout & ( \rst[0]~input_o ) ) ) +// # ( \RAM|Decoder0~0_combout & ( !\RAM|Decoder0~3_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~0_combout & ( !\RAM|Decoder0~3_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\pc_we[0]~0_combout ), + .datab(!\ALU|Mux24~1_combout ), + .datac(!\rst[0]~input_o ), + .datad(gnd), + .datae(!\RAM|Decoder0~0_combout ), + .dataf(!\RAM|Decoder0~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[192][3]~193_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[192][3]~193 .extended_lut = "off"; +defparam \RAM|mem[192][3]~193 .lut_mask = 64'h0F0F0F0F0F0F4F4F; +defparam \RAM|mem[192][3]~193 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X49_Y9_N40 +dffeas \RAM|mem[192][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[192][3]~193_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[192][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[192][0] .is_wysiwyg = "true"; +defparam \RAM|mem[192][0] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X50_Y8_N45 +cyclonev_lcell_comb \RAM|mem[240][0]~feeder ( +// Equation(s): +// \RAM|mem[240][0]~feeder_combout = ( \RAM|mem~0_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[240][0]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[240][0]~feeder .extended_lut = "off"; +defparam \RAM|mem[240][0]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[240][0]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X50_Y8_N21 +cyclonev_lcell_comb \RAM|mem[240][1]~196 ( +// Equation(s): +// \RAM|mem[240][1]~196_combout = ( \ALU|Mux26~1_combout & ( \RAM|Decoder0~3_combout & ( \rst[0]~input_o ) ) ) # ( !\ALU|Mux26~1_combout & ( \RAM|Decoder0~3_combout & ( ((\RAM|Decoder0~12_combout & \RAM|Decoder0~42_combout )) # (\rst[0]~input_o ) ) ) +// ) # ( \ALU|Mux26~1_combout & ( !\RAM|Decoder0~3_combout & ( \rst[0]~input_o ) ) ) # ( !\ALU|Mux26~1_combout & ( !\RAM|Decoder0~3_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\rst[0]~input_o ), + .datab(gnd), + .datac(!\RAM|Decoder0~12_combout ), + .datad(!\RAM|Decoder0~42_combout ), + .datae(!\ALU|Mux26~1_combout ), + .dataf(!\RAM|Decoder0~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[240][1]~196_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[240][1]~196 .extended_lut = "off"; +defparam \RAM|mem[240][1]~196 .lut_mask = 64'h55555555555F5555; +defparam \RAM|mem[240][1]~196 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X50_Y8_N46 +dffeas \RAM|mem[240][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[240][0]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[240][1]~196_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[240][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[240][0] .is_wysiwyg = "true"; +defparam \RAM|mem[240][0] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X47_Y7_N45 +cyclonev_lcell_comb \RAM|mem[208][4]~194 ( +// Equation(s): +// \RAM|mem[208][4]~194_combout = ( \RAM|Decoder0~7_combout & ( \RAM|Decoder0~3_combout & ( ((!\ALU|Mux24~1_combout & (\RAM|Decoder0~0_combout & \ALU|Mux28~1_combout ))) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~7_combout & ( +// \RAM|Decoder0~3_combout & ( \rst[0]~input_o ) ) ) # ( \RAM|Decoder0~7_combout & ( !\RAM|Decoder0~3_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~7_combout & ( !\RAM|Decoder0~3_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\ALU|Mux24~1_combout ), + .datab(!\rst[0]~input_o ), + .datac(!\RAM|Decoder0~0_combout ), + .datad(!\ALU|Mux28~1_combout ), + .datae(!\RAM|Decoder0~7_combout ), + .dataf(!\RAM|Decoder0~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[208][4]~194_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[208][4]~194 .extended_lut = "off"; +defparam \RAM|mem[208][4]~194 .lut_mask = 64'h333333333333333B; +defparam \RAM|mem[208][4]~194 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X48_Y7_N14 +dffeas \RAM|mem[208][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[208][4]~194_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[208][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[208][0] .is_wysiwyg = "true"; +defparam \RAM|mem[208][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X48_Y5_N36 +cyclonev_lcell_comb \RAM|mem[224][1]~195 ( +// Equation(s): +// \RAM|mem[224][1]~195_combout = ( \pc_we[0]~0_combout & ( \RAM|Decoder0~3_combout & ( ((!\ALU|Mux26~1_combout & \RAM|Decoder0~42_combout )) # (\rst[0]~input_o ) ) ) ) # ( !\pc_we[0]~0_combout & ( \RAM|Decoder0~3_combout & ( \rst[0]~input_o ) ) ) # ( +// \pc_we[0]~0_combout & ( !\RAM|Decoder0~3_combout & ( \rst[0]~input_o ) ) ) # ( !\pc_we[0]~0_combout & ( !\RAM|Decoder0~3_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\rst[0]~input_o ), + .datab(gnd), + .datac(!\ALU|Mux26~1_combout ), + .datad(!\RAM|Decoder0~42_combout ), + .datae(!\pc_we[0]~0_combout ), + .dataf(!\RAM|Decoder0~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[224][1]~195_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[224][1]~195 .extended_lut = "off"; +defparam \RAM|mem[224][1]~195 .lut_mask = 64'h55555555555555F5; +defparam \RAM|mem[224][1]~195 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X48_Y5_N40 +dffeas \RAM|mem[224][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[224][1]~195_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[224][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[224][0] .is_wysiwyg = "true"; +defparam \RAM|mem[224][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X48_Y10_N36 +cyclonev_lcell_comb \rd[0]~64 ( +// Equation(s): +// \rd[0]~64_combout = ( \ALU|Mux27~1_combout & ( \ALU|Mux26~1_combout & ( \RAM|mem[192][0]~q ) ) ) # ( !\ALU|Mux27~1_combout & ( \ALU|Mux26~1_combout & ( \RAM|mem[208][0]~q ) ) ) # ( \ALU|Mux27~1_combout & ( !\ALU|Mux26~1_combout & ( +// \RAM|mem[224][0]~q ) ) ) # ( !\ALU|Mux27~1_combout & ( !\ALU|Mux26~1_combout & ( \RAM|mem[240][0]~q ) ) ) + + .dataa(!\RAM|mem[192][0]~q ), + .datab(!\RAM|mem[240][0]~q ), + .datac(!\RAM|mem[208][0]~q ), + .datad(!\RAM|mem[224][0]~q ), + .datae(!\ALU|Mux27~1_combout ), + .dataf(!\ALU|Mux26~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[0]~64_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[0]~64 .extended_lut = "off"; +defparam \rd[0]~64 .lut_mask = 64'h333300FF0F0F5555; +defparam \rd[0]~64 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X54_Y7_N36 +cyclonev_lcell_comb \RAM|mem[232][3]~203 ( +// Equation(s): +// \RAM|mem[232][3]~203_combout = ( \RAM|Decoder0~17_combout & ( \RAM|Decoder0~3_combout & ( ((!\ALU|Mux26~1_combout & \RAM|Decoder0~42_combout )) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~17_combout & ( \RAM|Decoder0~3_combout & ( \rst[0]~input_o +// ) ) ) # ( \RAM|Decoder0~17_combout & ( !\RAM|Decoder0~3_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~17_combout & ( !\RAM|Decoder0~3_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\rst[0]~input_o ), + .datab(gnd), + .datac(!\ALU|Mux26~1_combout ), + .datad(!\RAM|Decoder0~42_combout ), + .datae(!\RAM|Decoder0~17_combout ), + .dataf(!\RAM|Decoder0~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[232][3]~203_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[232][3]~203 .extended_lut = "off"; +defparam \RAM|mem[232][3]~203 .lut_mask = 64'h55555555555555F5; +defparam \RAM|mem[232][3]~203 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X54_Y7_N38 +dffeas \RAM|mem[232][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[232][3]~203_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[232][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[232][0] .is_wysiwyg = "true"; +defparam \RAM|mem[232][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X54_Y7_N42 +cyclonev_lcell_comb \RAM|mem[216][3]~202 ( +// Equation(s): +// \RAM|mem[216][3]~202_combout = ( \ALU|Mux28~1_combout & ( \RAM|Decoder0~3_combout & ( \rst[0]~input_o ) ) ) # ( !\ALU|Mux28~1_combout & ( \RAM|Decoder0~3_combout & ( ((!\ALU|Mux24~1_combout & (\RAM|Decoder0~0_combout & \RAM|Decoder0~7_combout ))) +// # (\rst[0]~input_o ) ) ) ) # ( \ALU|Mux28~1_combout & ( !\RAM|Decoder0~3_combout & ( \rst[0]~input_o ) ) ) # ( !\ALU|Mux28~1_combout & ( !\RAM|Decoder0~3_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\ALU|Mux24~1_combout ), + .datab(!\RAM|Decoder0~0_combout ), + .datac(!\RAM|Decoder0~7_combout ), + .datad(!\rst[0]~input_o ), + .datae(!\ALU|Mux28~1_combout ), + .dataf(!\RAM|Decoder0~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[216][3]~202_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[216][3]~202 .extended_lut = "off"; +defparam \RAM|mem[216][3]~202 .lut_mask = 64'h00FF00FF02FF00FF; +defparam \RAM|mem[216][3]~202 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X54_Y7_N43 +dffeas \RAM|mem[216][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[216][3]~202_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[216][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[216][0] .is_wysiwyg = "true"; +defparam \RAM|mem[216][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X54_Y7_N48 +cyclonev_lcell_comb \RAM|mem[200][0]~feeder ( +// Equation(s): +// \RAM|mem[200][0]~feeder_combout = ( \RAM|mem~0_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[200][0]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[200][0]~feeder .extended_lut = "off"; +defparam \RAM|mem[200][0]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[200][0]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X54_Y7_N21 +cyclonev_lcell_comb \RAM|mem[200][2]~201 ( +// Equation(s): +// \RAM|mem[200][2]~201_combout = ( \RAM|Decoder0~17_combout & ( \RAM|Decoder0~3_combout & ( ((!\ALU|Mux24~1_combout & \RAM|Decoder0~0_combout )) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~17_combout & ( \RAM|Decoder0~3_combout & ( \rst[0]~input_o +// ) ) ) # ( \RAM|Decoder0~17_combout & ( !\RAM|Decoder0~3_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~17_combout & ( !\RAM|Decoder0~3_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\ALU|Mux24~1_combout ), + .datab(gnd), + .datac(!\rst[0]~input_o ), + .datad(!\RAM|Decoder0~0_combout ), + .datae(!\RAM|Decoder0~17_combout ), + .dataf(!\RAM|Decoder0~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[200][2]~201_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[200][2]~201 .extended_lut = "off"; +defparam \RAM|mem[200][2]~201 .lut_mask = 64'h0F0F0F0F0F0F0FAF; +defparam \RAM|mem[200][2]~201 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X54_Y7_N50 +dffeas \RAM|mem[200][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[200][0]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[200][2]~201_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[200][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[200][0] .is_wysiwyg = "true"; +defparam \RAM|mem[200][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X48_Y7_N3 +cyclonev_lcell_comb \RAM|mem[248][3]~204 ( +// Equation(s): +// \RAM|mem[248][3]~204_combout = ( \RAM|Decoder0~3_combout & ( ((!\ALU|Mux26~1_combout & (\RAM|Decoder0~42_combout & \RAM|Decoder0~19_combout ))) # (\rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~3_combout & ( \rst[0]~input_o ) ) + + .dataa(!\rst[0]~input_o ), + .datab(!\ALU|Mux26~1_combout ), + .datac(!\RAM|Decoder0~42_combout ), + .datad(!\RAM|Decoder0~19_combout ), + .datae(gnd), + .dataf(!\RAM|Decoder0~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[248][3]~204_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[248][3]~204 .extended_lut = "off"; +defparam \RAM|mem[248][3]~204 .lut_mask = 64'h55555555555D555D; +defparam \RAM|mem[248][3]~204 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X48_Y7_N38 +dffeas \RAM|mem[248][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[248][3]~204_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[248][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[248][0] .is_wysiwyg = "true"; +defparam \RAM|mem[248][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X48_Y7_N36 +cyclonev_lcell_comb \rd[0]~66 ( +// Equation(s): +// \rd[0]~66_combout = ( \RAM|mem[248][0]~q & ( \ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout & (\RAM|mem[232][0]~q )) # (\ALU|Mux26~1_combout & ((\RAM|mem[200][0]~q ))) ) ) ) # ( !\RAM|mem[248][0]~q & ( \ALU|Mux27~1_combout & ( +// (!\ALU|Mux26~1_combout & (\RAM|mem[232][0]~q )) # (\ALU|Mux26~1_combout & ((\RAM|mem[200][0]~q ))) ) ) ) # ( \RAM|mem[248][0]~q & ( !\ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout ) # (\RAM|mem[216][0]~q ) ) ) ) # ( !\RAM|mem[248][0]~q & ( +// !\ALU|Mux27~1_combout & ( (\RAM|mem[216][0]~q & \ALU|Mux26~1_combout ) ) ) ) + + .dataa(!\RAM|mem[232][0]~q ), + .datab(!\RAM|mem[216][0]~q ), + .datac(!\ALU|Mux26~1_combout ), + .datad(!\RAM|mem[200][0]~q ), + .datae(!\RAM|mem[248][0]~q ), + .dataf(!\ALU|Mux27~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[0]~66_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[0]~66 .extended_lut = "off"; +defparam \rd[0]~66 .lut_mask = 64'h0303F3F3505F505F; +defparam \rd[0]~66 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X53_Y8_N36 +cyclonev_lcell_comb \RAM|mem[204][1]~205 ( +// Equation(s): +// \RAM|mem[204][1]~205_combout = ( \ALU|Mux24~1_combout & ( \ALU|Mux31~3_combout & ( \rst[0]~input_o ) ) ) # ( !\ALU|Mux24~1_combout & ( \ALU|Mux31~3_combout & ( ((\ALU|Mux27~1_combout & \RAM|Decoder0~21_combout )) # (\rst[0]~input_o ) ) ) ) # ( +// \ALU|Mux24~1_combout & ( !\ALU|Mux31~3_combout & ( \rst[0]~input_o ) ) ) # ( !\ALU|Mux24~1_combout & ( !\ALU|Mux31~3_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\rst[0]~input_o ), + .datab(!\ALU|Mux27~1_combout ), + .datac(!\RAM|Decoder0~21_combout ), + .datad(gnd), + .datae(!\ALU|Mux24~1_combout ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[204][1]~205_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[204][1]~205 .extended_lut = "off"; +defparam \RAM|mem[204][1]~205 .lut_mask = 64'h5555555557575555; +defparam \RAM|mem[204][1]~205 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X53_Y8_N40 +dffeas \RAM|mem[204][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[204][1]~205_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[204][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[204][0] .is_wysiwyg = "true"; +defparam \RAM|mem[204][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X49_Y6_N0 +cyclonev_lcell_comb \RAM|mem[236][3]~207 ( +// Equation(s): +// \RAM|mem[236][3]~207_combout = ( \ALU|Mux27~1_combout & ( \ALU|Mux31~3_combout & ( ((\RAM|Decoder0~22_combout & (!\ALU|Mux24~1_combout & \RAM|Decoder0~23_combout ))) # (\rst[0]~input_o ) ) ) ) # ( !\ALU|Mux27~1_combout & ( \ALU|Mux31~3_combout & ( +// \rst[0]~input_o ) ) ) # ( \ALU|Mux27~1_combout & ( !\ALU|Mux31~3_combout & ( \rst[0]~input_o ) ) ) # ( !\ALU|Mux27~1_combout & ( !\ALU|Mux31~3_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\rst[0]~input_o ), + .datab(!\RAM|Decoder0~22_combout ), + .datac(!\ALU|Mux24~1_combout ), + .datad(!\RAM|Decoder0~23_combout ), + .datae(!\ALU|Mux27~1_combout ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[236][3]~207_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[236][3]~207 .extended_lut = "off"; +defparam \RAM|mem[236][3]~207 .lut_mask = 64'h5555555555555575; +defparam \RAM|mem[236][3]~207 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X49_Y6_N1 +dffeas \RAM|mem[236][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[236][3]~207_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[236][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[236][0] .is_wysiwyg = "true"; +defparam \RAM|mem[236][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X53_Y8_N57 +cyclonev_lcell_comb \RAM|mem[220][4]~206 ( +// Equation(s): +// \RAM|mem[220][4]~206_combout = ( \RAM|Decoder0~43_combout & ( \ALU|Mux31~3_combout & ( (\RAM|Decoder0~21_combout ) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~43_combout & ( \ALU|Mux31~3_combout & ( \rst[0]~input_o ) ) ) # ( +// \RAM|Decoder0~43_combout & ( !\ALU|Mux31~3_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~43_combout & ( !\ALU|Mux31~3_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\rst[0]~input_o ), + .datab(gnd), + .datac(gnd), + .datad(!\RAM|Decoder0~21_combout ), + .datae(!\RAM|Decoder0~43_combout ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[220][4]~206_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[220][4]~206 .extended_lut = "off"; +defparam \RAM|mem[220][4]~206 .lut_mask = 64'h55555555555555FF; +defparam \RAM|mem[220][4]~206 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X53_Y8_N58 +dffeas \RAM|mem[220][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[220][4]~206_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[220][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[220][0] .is_wysiwyg = "true"; +defparam \RAM|mem[220][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X51_Y10_N21 +cyclonev_lcell_comb \RAM|mem[252][3]~208 ( +// Equation(s): +// \RAM|mem[252][3]~208_combout = ( \RAM|Decoder0~43_combout & ( \ALU|Mux31~3_combout & ( (\RAM|Decoder0~24_combout ) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~43_combout & ( \ALU|Mux31~3_combout & ( \rst[0]~input_o ) ) ) # ( +// \RAM|Decoder0~43_combout & ( !\ALU|Mux31~3_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~43_combout & ( !\ALU|Mux31~3_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\rst[0]~input_o ), + .datab(gnd), + .datac(!\RAM|Decoder0~24_combout ), + .datad(gnd), + .datae(!\RAM|Decoder0~43_combout ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[252][3]~208_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[252][3]~208 .extended_lut = "off"; +defparam \RAM|mem[252][3]~208 .lut_mask = 64'h5555555555555F5F; +defparam \RAM|mem[252][3]~208 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X51_Y10_N26 +dffeas \RAM|mem[252][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[252][3]~208_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[252][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[252][0] .is_wysiwyg = "true"; +defparam \RAM|mem[252][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X51_Y10_N24 +cyclonev_lcell_comb \rd[0]~67 ( +// Equation(s): +// \rd[0]~67_combout = ( \RAM|mem[252][0]~q & ( \ALU|Mux26~1_combout & ( (!\ALU|Mux27~1_combout & ((\RAM|mem[220][0]~q ))) # (\ALU|Mux27~1_combout & (\RAM|mem[204][0]~q )) ) ) ) # ( !\RAM|mem[252][0]~q & ( \ALU|Mux26~1_combout & ( +// (!\ALU|Mux27~1_combout & ((\RAM|mem[220][0]~q ))) # (\ALU|Mux27~1_combout & (\RAM|mem[204][0]~q )) ) ) ) # ( \RAM|mem[252][0]~q & ( !\ALU|Mux26~1_combout & ( (!\ALU|Mux27~1_combout ) # (\RAM|mem[236][0]~q ) ) ) ) # ( !\RAM|mem[252][0]~q & ( +// !\ALU|Mux26~1_combout & ( (\RAM|mem[236][0]~q & \ALU|Mux27~1_combout ) ) ) ) + + .dataa(!\RAM|mem[204][0]~q ), + .datab(!\RAM|mem[236][0]~q ), + .datac(!\ALU|Mux27~1_combout ), + .datad(!\RAM|mem[220][0]~q ), + .datae(!\RAM|mem[252][0]~q ), + .dataf(!\ALU|Mux26~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[0]~67_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[0]~67 .extended_lut = "off"; +defparam \rd[0]~67 .lut_mask = 64'h0303F3F305F505F5; +defparam \rd[0]~67 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X48_Y10_N12 +cyclonev_lcell_comb \rd[0]~68 ( +// Equation(s): +// \rd[0]~68_combout = ( \rd[0]~66_combout & ( \rd[0]~67_combout & ( (!\ALU|Mux28~1_combout ) # ((!\ALU|Mux29~3_combout & (\rd[0]~65_combout )) # (\ALU|Mux29~3_combout & ((\rd[0]~64_combout )))) ) ) ) # ( !\rd[0]~66_combout & ( \rd[0]~67_combout & ( +// (!\ALU|Mux29~3_combout & (((!\ALU|Mux28~1_combout )) # (\rd[0]~65_combout ))) # (\ALU|Mux29~3_combout & (((\rd[0]~64_combout & \ALU|Mux28~1_combout )))) ) ) ) # ( \rd[0]~66_combout & ( !\rd[0]~67_combout & ( (!\ALU|Mux29~3_combout & +// (\rd[0]~65_combout & ((\ALU|Mux28~1_combout )))) # (\ALU|Mux29~3_combout & (((!\ALU|Mux28~1_combout ) # (\rd[0]~64_combout )))) ) ) ) # ( !\rd[0]~66_combout & ( !\rd[0]~67_combout & ( (\ALU|Mux28~1_combout & ((!\ALU|Mux29~3_combout & +// (\rd[0]~65_combout )) # (\ALU|Mux29~3_combout & ((\rd[0]~64_combout ))))) ) ) ) + + .dataa(!\rd[0]~65_combout ), + .datab(!\ALU|Mux29~3_combout ), + .datac(!\rd[0]~64_combout ), + .datad(!\ALU|Mux28~1_combout ), + .datae(!\rd[0]~66_combout ), + .dataf(!\rd[0]~67_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[0]~68_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[0]~68 .extended_lut = "off"; +defparam \rd[0]~68 .lut_mask = 64'h00473347CC47FF47; +defparam \rd[0]~68 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X53_Y10_N6 +cyclonev_lcell_comb \RAM|mem[202][4]~233 ( +// Equation(s): +// \RAM|mem[202][4]~233_combout = ( \RAM|Decoder0~6_combout & ( \RAM|Decoder0~3_combout & ( ((!\ALU|Mux28~1_combout & (\RAM|Decoder0~0_combout & !\ALU|Mux24~1_combout ))) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~6_combout & ( +// \RAM|Decoder0~3_combout & ( \rst[0]~input_o ) ) ) # ( \RAM|Decoder0~6_combout & ( !\RAM|Decoder0~3_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~6_combout & ( !\RAM|Decoder0~3_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\ALU|Mux28~1_combout ), + .datab(!\rst[0]~input_o ), + .datac(!\RAM|Decoder0~0_combout ), + .datad(!\ALU|Mux24~1_combout ), + .datae(!\RAM|Decoder0~6_combout ), + .dataf(!\RAM|Decoder0~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[202][4]~233_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[202][4]~233 .extended_lut = "off"; +defparam \RAM|mem[202][4]~233 .lut_mask = 64'h3333333333333B33; +defparam \RAM|mem[202][4]~233 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X53_Y10_N10 +dffeas \RAM|mem[202][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[202][4]~233_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[202][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[202][0] .is_wysiwyg = "true"; +defparam \RAM|mem[202][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X53_Y10_N39 +cyclonev_lcell_comb \RAM|mem[218][0]~feeder ( +// Equation(s): +// \RAM|mem[218][0]~feeder_combout = ( \RAM|mem~0_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[218][0]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[218][0]~feeder .extended_lut = "off"; +defparam \RAM|mem[218][0]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[218][0]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X53_Y10_N3 +cyclonev_lcell_comb \RAM|mem[218][2]~234 ( +// Equation(s): +// \RAM|mem[218][2]~234_combout = ( \RAM|Decoder0~8_combout & ( \RAM|Decoder0~3_combout & ( ((!\ALU|Mux28~1_combout & (!\ALU|Mux24~1_combout & \RAM|Decoder0~0_combout ))) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~8_combout & ( +// \RAM|Decoder0~3_combout & ( \rst[0]~input_o ) ) ) # ( \RAM|Decoder0~8_combout & ( !\RAM|Decoder0~3_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~8_combout & ( !\RAM|Decoder0~3_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\ALU|Mux28~1_combout ), + .datab(!\ALU|Mux24~1_combout ), + .datac(!\rst[0]~input_o ), + .datad(!\RAM|Decoder0~0_combout ), + .datae(!\RAM|Decoder0~8_combout ), + .dataf(!\RAM|Decoder0~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[218][2]~234_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[218][2]~234 .extended_lut = "off"; +defparam \RAM|mem[218][2]~234 .lut_mask = 64'h0F0F0F0F0F0F0F8F; +defparam \RAM|mem[218][2]~234 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X53_Y10_N40 +dffeas \RAM|mem[218][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[218][0]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[218][2]~234_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[218][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[218][0] .is_wysiwyg = "true"; +defparam \RAM|mem[218][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X48_Y13_N39 +cyclonev_lcell_comb \RAM|Decoder0~47 ( +// Equation(s): +// \RAM|Decoder0~47_combout = ( !\ALU|Mux25~1_combout & ( \RAM|Decoder0~6_combout & ( !\ALU|Mux24~1_combout ) ) ) + + .dataa(gnd), + .datab(gnd), + .datac(!\ALU|Mux24~1_combout ), + .datad(gnd), + .datae(!\ALU|Mux25~1_combout ), + .dataf(!\RAM|Decoder0~6_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|Decoder0~47_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|Decoder0~47 .extended_lut = "off"; +defparam \RAM|Decoder0~47 .lut_mask = 64'h00000000F0F00000; +defparam \RAM|Decoder0~47 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X45_Y9_N36 +cyclonev_lcell_comb \RAM|mem[234][0]~235 ( +// Equation(s): +// \RAM|mem[234][0]~235_combout = ( \RAM|Decoder0~47_combout & ( \RAM|Decoder0~3_combout & ( ((!\ALU|Mux26~1_combout & !\ALU|Mux28~1_combout )) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~47_combout & ( \RAM|Decoder0~3_combout & ( \rst[0]~input_o ) +// ) ) # ( \RAM|Decoder0~47_combout & ( !\RAM|Decoder0~3_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~47_combout & ( !\RAM|Decoder0~3_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\ALU|Mux26~1_combout ), + .datab(!\rst[0]~input_o ), + .datac(!\ALU|Mux28~1_combout ), + .datad(gnd), + .datae(!\RAM|Decoder0~47_combout ), + .dataf(!\RAM|Decoder0~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[234][0]~235_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[234][0]~235 .extended_lut = "off"; +defparam \RAM|mem[234][0]~235 .lut_mask = 64'h333333333333B3B3; +defparam \RAM|mem[234][0]~235 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X45_Y9_N46 +dffeas \RAM|mem[234][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[234][0]~235_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[234][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[234][0] .is_wysiwyg = "true"; +defparam \RAM|mem[234][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X49_Y8_N0 +cyclonev_lcell_comb \RAM|mem[250][4]~236 ( +// Equation(s): +// \RAM|mem[250][4]~236_combout = ( \ALU|Mux26~1_combout & ( \RAM|Decoder0~3_combout & ( \rst[0]~input_o ) ) ) # ( !\ALU|Mux26~1_combout & ( \RAM|Decoder0~3_combout & ( ((!\ALU|Mux28~1_combout & (\RAM|Decoder0~8_combout & \RAM|Decoder0~42_combout ))) +// # (\rst[0]~input_o ) ) ) ) # ( \ALU|Mux26~1_combout & ( !\RAM|Decoder0~3_combout & ( \rst[0]~input_o ) ) ) # ( !\ALU|Mux26~1_combout & ( !\RAM|Decoder0~3_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\ALU|Mux28~1_combout ), + .datab(!\rst[0]~input_o ), + .datac(!\RAM|Decoder0~8_combout ), + .datad(!\RAM|Decoder0~42_combout ), + .datae(!\ALU|Mux26~1_combout ), + .dataf(!\RAM|Decoder0~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[250][4]~236_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[250][4]~236 .extended_lut = "off"; +defparam \RAM|mem[250][4]~236 .lut_mask = 64'h33333333333B3333; +defparam \RAM|mem[250][4]~236 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X49_Y8_N38 +dffeas \RAM|mem[250][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[250][4]~236_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[250][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[250][0] .is_wysiwyg = "true"; +defparam \RAM|mem[250][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X49_Y8_N36 +cyclonev_lcell_comb \rd[0]~76 ( +// Equation(s): +// \rd[0]~76_combout = ( \RAM|mem[250][0]~q & ( \ALU|Mux26~1_combout & ( (!\ALU|Mux27~1_combout & ((\RAM|mem[218][0]~q ))) # (\ALU|Mux27~1_combout & (\RAM|mem[202][0]~q )) ) ) ) # ( !\RAM|mem[250][0]~q & ( \ALU|Mux26~1_combout & ( +// (!\ALU|Mux27~1_combout & ((\RAM|mem[218][0]~q ))) # (\ALU|Mux27~1_combout & (\RAM|mem[202][0]~q )) ) ) ) # ( \RAM|mem[250][0]~q & ( !\ALU|Mux26~1_combout & ( (!\ALU|Mux27~1_combout ) # (\RAM|mem[234][0]~q ) ) ) ) # ( !\RAM|mem[250][0]~q & ( +// !\ALU|Mux26~1_combout & ( (\RAM|mem[234][0]~q & \ALU|Mux27~1_combout ) ) ) ) + + .dataa(!\RAM|mem[202][0]~q ), + .datab(!\RAM|mem[218][0]~q ), + .datac(!\RAM|mem[234][0]~q ), + .datad(!\ALU|Mux27~1_combout ), + .datae(!\RAM|mem[250][0]~q ), + .dataf(!\ALU|Mux26~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[0]~76_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[0]~76 .extended_lut = "off"; +defparam \rd[0]~76 .lut_mask = 64'h000FFF0F33553355; +defparam \rd[0]~76 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X51_Y10_N6 +cyclonev_lcell_comb \RAM|mem[214][2]~230 ( +// Equation(s): +// \RAM|mem[214][2]~230_combout = ( \RAM|Decoder0~15_combout & ( ((\RAM|Decoder0~42_combout & \RAM|Decoder0~30_combout )) # (\rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~15_combout & ( \rst[0]~input_o ) ) + + .dataa(!\rst[0]~input_o ), + .datab(!\RAM|Decoder0~42_combout ), + .datac(gnd), + .datad(!\RAM|Decoder0~30_combout ), + .datae(gnd), + .dataf(!\RAM|Decoder0~15_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[214][2]~230_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[214][2]~230 .extended_lut = "off"; +defparam \RAM|mem[214][2]~230 .lut_mask = 64'h5555555555775577; +defparam \RAM|mem[214][2]~230 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X51_Y10_N7 +dffeas \RAM|mem[214][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[214][2]~230_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[214][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[214][0] .is_wysiwyg = "true"; +defparam \RAM|mem[214][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X49_Y10_N12 +cyclonev_lcell_comb \RAM|mem[198][3]~229 ( +// Equation(s): +// \RAM|mem[198][3]~229_combout = ( \RAM|Decoder0~48_combout & ( \RAM|Decoder0~15_combout ) ) # ( !\RAM|Decoder0~48_combout & ( \RAM|Decoder0~15_combout & ( \rst[0]~input_o ) ) ) # ( \RAM|Decoder0~48_combout & ( !\RAM|Decoder0~15_combout & ( +// \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~48_combout & ( !\RAM|Decoder0~15_combout & ( \rst[0]~input_o ) ) ) + + .dataa(gnd), + .datab(gnd), + .datac(!\rst[0]~input_o ), + .datad(gnd), + .datae(!\RAM|Decoder0~48_combout ), + .dataf(!\RAM|Decoder0~15_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[198][3]~229_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[198][3]~229 .extended_lut = "off"; +defparam \RAM|mem[198][3]~229 .lut_mask = 64'h0F0F0F0F0F0FFFFF; +defparam \RAM|mem[198][3]~229 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X49_Y10_N34 +dffeas \RAM|mem[198][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[198][3]~229_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[198][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[198][0] .is_wysiwyg = "true"; +defparam \RAM|mem[198][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X48_Y5_N42 +cyclonev_lcell_comb \RAM|mem[230][1]~231 ( +// Equation(s): +// \RAM|mem[230][1]~231_combout = ( \RAM|Decoder0~15_combout & ( (\RAM|Decoder0~49_combout ) # (\rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~15_combout & ( \rst[0]~input_o ) ) + + .dataa(gnd), + .datab(gnd), + .datac(!\rst[0]~input_o ), + .datad(!\RAM|Decoder0~49_combout ), + .datae(gnd), + .dataf(!\RAM|Decoder0~15_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[230][1]~231_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[230][1]~231 .extended_lut = "off"; +defparam \RAM|mem[230][1]~231 .lut_mask = 64'h0F0F0F0F0FFF0FFF; +defparam \RAM|mem[230][1]~231 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X48_Y5_N43 +dffeas \RAM|mem[230][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[230][1]~231_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[230][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[230][0] .is_wysiwyg = "true"; +defparam \RAM|mem[230][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X49_Y8_N57 +cyclonev_lcell_comb \RAM|mem[246][2]~232 ( +// Equation(s): +// \RAM|mem[246][2]~232_combout = ( \RAM|Decoder0~8_combout & ( \RAM|Decoder0~15_combout & ( ((\RAM|Decoder0~42_combout & !\ALU|Mux26~1_combout )) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~8_combout & ( \RAM|Decoder0~15_combout & ( \rst[0]~input_o +// ) ) ) # ( \RAM|Decoder0~8_combout & ( !\RAM|Decoder0~15_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~8_combout & ( !\RAM|Decoder0~15_combout & ( \rst[0]~input_o ) ) ) + + .dataa(gnd), + .datab(!\rst[0]~input_o ), + .datac(!\RAM|Decoder0~42_combout ), + .datad(!\ALU|Mux26~1_combout ), + .datae(!\RAM|Decoder0~8_combout ), + .dataf(!\RAM|Decoder0~15_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[246][2]~232_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[246][2]~232 .extended_lut = "off"; +defparam \RAM|mem[246][2]~232 .lut_mask = 64'h3333333333333F33; +defparam \RAM|mem[246][2]~232 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X49_Y8_N32 +dffeas \RAM|mem[246][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[246][2]~232_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[246][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[246][0] .is_wysiwyg = "true"; +defparam \RAM|mem[246][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X49_Y8_N30 +cyclonev_lcell_comb \rd[0]~75 ( +// Equation(s): +// \rd[0]~75_combout = ( \RAM|mem[246][0]~q & ( \ALU|Mux26~1_combout & ( (!\ALU|Mux27~1_combout & (\RAM|mem[214][0]~q )) # (\ALU|Mux27~1_combout & ((\RAM|mem[198][0]~q ))) ) ) ) # ( !\RAM|mem[246][0]~q & ( \ALU|Mux26~1_combout & ( +// (!\ALU|Mux27~1_combout & (\RAM|mem[214][0]~q )) # (\ALU|Mux27~1_combout & ((\RAM|mem[198][0]~q ))) ) ) ) # ( \RAM|mem[246][0]~q & ( !\ALU|Mux26~1_combout & ( (!\ALU|Mux27~1_combout ) # (\RAM|mem[230][0]~q ) ) ) ) # ( !\RAM|mem[246][0]~q & ( +// !\ALU|Mux26~1_combout & ( (\RAM|mem[230][0]~q & \ALU|Mux27~1_combout ) ) ) ) + + .dataa(!\RAM|mem[214][0]~q ), + .datab(!\RAM|mem[198][0]~q ), + .datac(!\RAM|mem[230][0]~q ), + .datad(!\ALU|Mux27~1_combout ), + .datae(!\RAM|mem[246][0]~q ), + .dataf(!\ALU|Mux26~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[0]~75_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[0]~75 .extended_lut = "off"; +defparam \rd[0]~75 .lut_mask = 64'h000FFF0F55335533; +defparam \rd[0]~75 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X54_Y10_N15 +cyclonev_lcell_comb \RAM|mem[206][0]~feeder ( +// Equation(s): +// \RAM|mem[206][0]~feeder_combout = ( \RAM|mem~0_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[206][0]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[206][0]~feeder .extended_lut = "off"; +defparam \RAM|mem[206][0]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[206][0]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X54_Y10_N0 +cyclonev_lcell_comb \RAM|mem[206][0]~237 ( +// Equation(s): +// \RAM|mem[206][0]~237_combout = ( \RAM|Decoder0~26_combout & ( \RAM|Decoder0~48_combout ) ) # ( !\RAM|Decoder0~26_combout & ( \RAM|Decoder0~48_combout & ( \rst[0]~input_o ) ) ) # ( \RAM|Decoder0~26_combout & ( !\RAM|Decoder0~48_combout & ( +// \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~26_combout & ( !\RAM|Decoder0~48_combout & ( \rst[0]~input_o ) ) ) + + .dataa(gnd), + .datab(!\rst[0]~input_o ), + .datac(gnd), + .datad(gnd), + .datae(!\RAM|Decoder0~26_combout ), + .dataf(!\RAM|Decoder0~48_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[206][0]~237_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[206][0]~237 .extended_lut = "off"; +defparam \RAM|mem[206][0]~237 .lut_mask = 64'h333333333333FFFF; +defparam \RAM|mem[206][0]~237 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X54_Y10_N17 +dffeas \RAM|mem[206][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[206][0]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[206][0]~237_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[206][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[206][0] .is_wysiwyg = "true"; +defparam \RAM|mem[206][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X54_Y11_N6 +cyclonev_lcell_comb \RAM|mem[222][3]~238 ( +// Equation(s): +// \RAM|mem[222][3]~238_combout = ( \RAM|Decoder0~26_combout & ( ((\RAM|Decoder0~50_combout & \RAM|Decoder0~8_combout )) # (\rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~26_combout & ( \rst[0]~input_o ) ) + + .dataa(!\rst[0]~input_o ), + .datab(gnd), + .datac(!\RAM|Decoder0~50_combout ), + .datad(!\RAM|Decoder0~8_combout ), + .datae(gnd), + .dataf(!\RAM|Decoder0~26_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[222][3]~238_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[222][3]~238 .extended_lut = "off"; +defparam \RAM|mem[222][3]~238 .lut_mask = 64'h55555555555F555F; +defparam \RAM|mem[222][3]~238 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X54_Y11_N7 +dffeas \RAM|mem[222][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[222][3]~238_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[222][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[222][0] .is_wysiwyg = "true"; +defparam \RAM|mem[222][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X49_Y13_N48 +cyclonev_lcell_comb \RAM|mem[238][1]~239 ( +// Equation(s): +// \RAM|mem[238][1]~239_combout = ( \RAM|Decoder0~26_combout & ( (\RAM|Decoder0~49_combout ) # (\rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~26_combout & ( \rst[0]~input_o ) ) + + .dataa(gnd), + .datab(!\rst[0]~input_o ), + .datac(!\RAM|Decoder0~49_combout ), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|Decoder0~26_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[238][1]~239_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[238][1]~239 .extended_lut = "off"; +defparam \RAM|mem[238][1]~239 .lut_mask = 64'h333333333F3F3F3F; +defparam \RAM|mem[238][1]~239 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X49_Y13_N49 +dffeas \RAM|mem[238][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[238][1]~239_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[238][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[238][0] .is_wysiwyg = "true"; +defparam \RAM|mem[238][0] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X47_Y8_N42 +cyclonev_lcell_comb \RAM|mem[254][4]~240 ( +// Equation(s): +// \RAM|mem[254][4]~240_combout = ( \RAM|Decoder0~51_combout & ( \RAM|Decoder0~26_combout & ( (\RAM|Decoder0~8_combout ) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~51_combout & ( \RAM|Decoder0~26_combout & ( \rst[0]~input_o ) ) ) # ( +// \RAM|Decoder0~51_combout & ( !\RAM|Decoder0~26_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~51_combout & ( !\RAM|Decoder0~26_combout & ( \rst[0]~input_o ) ) ) + + .dataa(gnd), + .datab(gnd), + .datac(!\rst[0]~input_o ), + .datad(!\RAM|Decoder0~8_combout ), + .datae(!\RAM|Decoder0~51_combout ), + .dataf(!\RAM|Decoder0~26_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[254][4]~240_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[254][4]~240 .extended_lut = "off"; +defparam \RAM|mem[254][4]~240 .lut_mask = 64'h0F0F0F0F0F0F0FFF; +defparam \RAM|mem[254][4]~240 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X53_Y8_N32 +dffeas \RAM|mem[254][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[254][4]~240_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[254][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[254][0] .is_wysiwyg = "true"; +defparam \RAM|mem[254][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X53_Y8_N30 +cyclonev_lcell_comb \rd[0]~77 ( +// Equation(s): +// \rd[0]~77_combout = ( \RAM|mem[254][0]~q & ( \ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout & ((\RAM|mem[238][0]~q ))) # (\ALU|Mux26~1_combout & (\RAM|mem[206][0]~q )) ) ) ) # ( !\RAM|mem[254][0]~q & ( \ALU|Mux27~1_combout & ( +// (!\ALU|Mux26~1_combout & ((\RAM|mem[238][0]~q ))) # (\ALU|Mux26~1_combout & (\RAM|mem[206][0]~q )) ) ) ) # ( \RAM|mem[254][0]~q & ( !\ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout ) # (\RAM|mem[222][0]~q ) ) ) ) # ( !\RAM|mem[254][0]~q & ( +// !\ALU|Mux27~1_combout & ( (\RAM|mem[222][0]~q & \ALU|Mux26~1_combout ) ) ) ) + + .dataa(!\RAM|mem[206][0]~q ), + .datab(!\RAM|mem[222][0]~q ), + .datac(!\RAM|mem[238][0]~q ), + .datad(!\ALU|Mux26~1_combout ), + .datae(!\RAM|mem[254][0]~q ), + .dataf(!\ALU|Mux27~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[0]~77_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[0]~77 .extended_lut = "off"; +defparam \rd[0]~77 .lut_mask = 64'h0033FF330F550F55; +defparam \rd[0]~77 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X43_Y12_N18 +cyclonev_lcell_comb \RAM|mem[210][3]~226 ( +// Equation(s): +// \RAM|mem[210][3]~226_combout = ( \RAM|Decoder0~3_combout & ( \RAM|Decoder0~0_combout & ( ((\RAM|Decoder0~8_combout & (!\ALU|Mux24~1_combout & \ALU|Mux28~1_combout ))) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~3_combout & ( +// \RAM|Decoder0~0_combout & ( \rst[0]~input_o ) ) ) # ( \RAM|Decoder0~3_combout & ( !\RAM|Decoder0~0_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~3_combout & ( !\RAM|Decoder0~0_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\RAM|Decoder0~8_combout ), + .datab(!\rst[0]~input_o ), + .datac(!\ALU|Mux24~1_combout ), + .datad(!\ALU|Mux28~1_combout ), + .datae(!\RAM|Decoder0~3_combout ), + .dataf(!\RAM|Decoder0~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[210][3]~226_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[210][3]~226 .extended_lut = "off"; +defparam \RAM|mem[210][3]~226 .lut_mask = 64'h3333333333333373; +defparam \RAM|mem[210][3]~226 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X43_Y12_N20 +dffeas \RAM|mem[210][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[210][3]~226_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[210][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[210][0] .is_wysiwyg = "true"; +defparam \RAM|mem[210][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X49_Y9_N54 +cyclonev_lcell_comb \RAM|mem[194][4]~225 ( +// Equation(s): +// \RAM|mem[194][4]~225_combout = ( \RAM|Decoder0~0_combout & ( \RAM|Decoder0~3_combout & ( ((\ALU|Mux28~1_combout & (!\ALU|Mux24~1_combout & \RAM|Decoder0~6_combout ))) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~0_combout & ( +// \RAM|Decoder0~3_combout & ( \rst[0]~input_o ) ) ) # ( \RAM|Decoder0~0_combout & ( !\RAM|Decoder0~3_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~0_combout & ( !\RAM|Decoder0~3_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\rst[0]~input_o ), + .datab(!\ALU|Mux28~1_combout ), + .datac(!\ALU|Mux24~1_combout ), + .datad(!\RAM|Decoder0~6_combout ), + .datae(!\RAM|Decoder0~0_combout ), + .dataf(!\RAM|Decoder0~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[194][4]~225_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[194][4]~225 .extended_lut = "off"; +defparam \RAM|mem[194][4]~225 .lut_mask = 64'h5555555555555575; +defparam \RAM|mem[194][4]~225 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X49_Y9_N56 +dffeas \RAM|mem[194][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[194][4]~225_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[194][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[194][0] .is_wysiwyg = "true"; +defparam \RAM|mem[194][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X43_Y5_N42 +cyclonev_lcell_comb \RAM|mem[226][3]~227 ( +// Equation(s): +// \RAM|mem[226][3]~227_combout = ( \RAM|Decoder0~47_combout & ( \RAM|Decoder0~3_combout & ( ((!\ALU|Mux26~1_combout & \ALU|Mux28~1_combout )) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~47_combout & ( \RAM|Decoder0~3_combout & ( \rst[0]~input_o ) ) +// ) # ( \RAM|Decoder0~47_combout & ( !\RAM|Decoder0~3_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~47_combout & ( !\RAM|Decoder0~3_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\rst[0]~input_o ), + .datab(!\ALU|Mux26~1_combout ), + .datac(!\ALU|Mux28~1_combout ), + .datad(gnd), + .datae(!\RAM|Decoder0~47_combout ), + .dataf(!\RAM|Decoder0~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[226][3]~227_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[226][3]~227 .extended_lut = "off"; +defparam \RAM|mem[226][3]~227 .lut_mask = 64'h5555555555555D5D; +defparam \RAM|mem[226][3]~227 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X43_Y5_N46 +dffeas \RAM|mem[226][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[226][3]~227_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[226][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[226][0] .is_wysiwyg = "true"; +defparam \RAM|mem[226][0] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X47_Y8_N30 +cyclonev_lcell_comb \RAM|mem[242][0]~228 ( +// Equation(s): +// \RAM|mem[242][0]~228_combout = ( \RAM|Decoder0~13_combout & ( \RAM|Decoder0~3_combout & ( ((\RAM|Decoder0~42_combout & !\ALU|Mux26~1_combout )) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~13_combout & ( \RAM|Decoder0~3_combout & ( \rst[0]~input_o +// ) ) ) # ( \RAM|Decoder0~13_combout & ( !\RAM|Decoder0~3_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~13_combout & ( !\RAM|Decoder0~3_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\rst[0]~input_o ), + .datab(!\RAM|Decoder0~42_combout ), + .datac(gnd), + .datad(!\ALU|Mux26~1_combout ), + .datae(!\RAM|Decoder0~13_combout ), + .dataf(!\RAM|Decoder0~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[242][0]~228_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[242][0]~228 .extended_lut = "off"; +defparam \RAM|mem[242][0]~228 .lut_mask = 64'h5555555555557755; +defparam \RAM|mem[242][0]~228 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X48_Y15_N5 +dffeas \RAM|mem[242][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[242][0]~228_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[242][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[242][0] .is_wysiwyg = "true"; +defparam \RAM|mem[242][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X48_Y15_N3 +cyclonev_lcell_comb \rd[0]~74 ( +// Equation(s): +// \rd[0]~74_combout = ( \RAM|mem[242][0]~q & ( \ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout & ((\RAM|mem[226][0]~q ))) # (\ALU|Mux26~1_combout & (\RAM|mem[194][0]~q )) ) ) ) # ( !\RAM|mem[242][0]~q & ( \ALU|Mux27~1_combout & ( +// (!\ALU|Mux26~1_combout & ((\RAM|mem[226][0]~q ))) # (\ALU|Mux26~1_combout & (\RAM|mem[194][0]~q )) ) ) ) # ( \RAM|mem[242][0]~q & ( !\ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout ) # (\RAM|mem[210][0]~q ) ) ) ) # ( !\RAM|mem[242][0]~q & ( +// !\ALU|Mux27~1_combout & ( (\RAM|mem[210][0]~q & \ALU|Mux26~1_combout ) ) ) ) + + .dataa(!\RAM|mem[210][0]~q ), + .datab(!\RAM|mem[194][0]~q ), + .datac(!\ALU|Mux26~1_combout ), + .datad(!\RAM|mem[226][0]~q ), + .datae(!\RAM|mem[242][0]~q ), + .dataf(!\ALU|Mux27~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[0]~74_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[0]~74 .extended_lut = "off"; +defparam \rd[0]~74 .lut_mask = 64'h0505F5F503F303F3; +defparam \rd[0]~74 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X49_Y8_N24 +cyclonev_lcell_comb \rd[0]~78 ( +// Equation(s): +// \rd[0]~78_combout = ( \rd[0]~77_combout & ( \rd[0]~74_combout & ( (!\ALU|Mux28~1_combout & (((!\ALU|Mux29~3_combout )) # (\rd[0]~76_combout ))) # (\ALU|Mux28~1_combout & (((\ALU|Mux29~3_combout ) # (\rd[0]~75_combout )))) ) ) ) # ( !\rd[0]~77_combout +// & ( \rd[0]~74_combout & ( (!\ALU|Mux28~1_combout & (\rd[0]~76_combout & ((\ALU|Mux29~3_combout )))) # (\ALU|Mux28~1_combout & (((\ALU|Mux29~3_combout ) # (\rd[0]~75_combout )))) ) ) ) # ( \rd[0]~77_combout & ( !\rd[0]~74_combout & ( +// (!\ALU|Mux28~1_combout & (((!\ALU|Mux29~3_combout )) # (\rd[0]~76_combout ))) # (\ALU|Mux28~1_combout & (((\rd[0]~75_combout & !\ALU|Mux29~3_combout )))) ) ) ) # ( !\rd[0]~77_combout & ( !\rd[0]~74_combout & ( (!\ALU|Mux28~1_combout & +// (\rd[0]~76_combout & ((\ALU|Mux29~3_combout )))) # (\ALU|Mux28~1_combout & (((\rd[0]~75_combout & !\ALU|Mux29~3_combout )))) ) ) ) + + .dataa(!\rd[0]~76_combout ), + .datab(!\rd[0]~75_combout ), + .datac(!\ALU|Mux28~1_combout ), + .datad(!\ALU|Mux29~3_combout ), + .datae(!\rd[0]~77_combout ), + .dataf(!\rd[0]~74_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[0]~78_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[0]~78 .extended_lut = "off"; +defparam \rd[0]~78 .lut_mask = 64'h0350F350035FF35F; +defparam \rd[0]~78 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X48_Y10_N42 +cyclonev_lcell_comb \rd[0]~84 ( +// Equation(s): +// \rd[0]~84_combout = ( \rd[0]~78_combout & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout ) # (\rd[0]~68_combout ) ) ) ) # ( !\rd[0]~78_combout & ( \ALU|Mux31~3_combout & ( (\ALU|Mux30~1_combout & \rd[0]~68_combout ) ) ) ) # ( \rd[0]~78_combout & +// ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & ((\rd[0]~83_combout ))) # (\ALU|Mux30~1_combout & (\rd[0]~73_combout )) ) ) ) # ( !\rd[0]~78_combout & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & ((\rd[0]~83_combout ))) # +// (\ALU|Mux30~1_combout & (\rd[0]~73_combout )) ) ) ) + + .dataa(!\ALU|Mux30~1_combout ), + .datab(!\rd[0]~73_combout ), + .datac(!\rd[0]~83_combout ), + .datad(!\rd[0]~68_combout ), + .datae(!\rd[0]~78_combout ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[0]~84_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[0]~84 .extended_lut = "off"; +defparam \rd[0]~84 .lut_mask = 64'h1B1B1B1B0055AAFF; +defparam \rd[0]~84 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X41_Y10_N0 +cyclonev_lcell_comb \rd[0]~85 ( +// Equation(s): +// \rd[0]~85_combout = ( \ALU|Mux25~1_combout & ( \rd[0]~84_combout & ( (!\CONTROL_UNIT|M2R[0]~0_combout & (!\ALU|Mux31~3_combout )) # (\CONTROL_UNIT|M2R[0]~0_combout & (((!\ALU|Mux24~1_combout & \rd[0]~63_combout )))) ) ) ) # ( !\ALU|Mux25~1_combout +// & ( \rd[0]~84_combout & ( (!\CONTROL_UNIT|M2R[0]~0_combout & (!\ALU|Mux31~3_combout )) # (\CONTROL_UNIT|M2R[0]~0_combout & ((!\ALU|Mux24~1_combout ))) ) ) ) # ( \ALU|Mux25~1_combout & ( !\rd[0]~84_combout & ( (!\CONTROL_UNIT|M2R[0]~0_combout & +// (!\ALU|Mux31~3_combout )) # (\CONTROL_UNIT|M2R[0]~0_combout & (((!\ALU|Mux24~1_combout & \rd[0]~63_combout )))) ) ) ) # ( !\ALU|Mux25~1_combout & ( !\rd[0]~84_combout & ( (!\CONTROL_UNIT|M2R[0]~0_combout & !\ALU|Mux31~3_combout ) ) ) ) + + .dataa(!\CONTROL_UNIT|M2R[0]~0_combout ), + .datab(!\ALU|Mux31~3_combout ), + .datac(!\ALU|Mux24~1_combout ), + .datad(!\rd[0]~63_combout ), + .datae(!\ALU|Mux25~1_combout ), + .dataf(!\rd[0]~84_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[0]~85_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[0]~85 .extended_lut = "off"; +defparam \rd[0]~85 .lut_mask = 64'h888888D8D8D888D8; +defparam \rd[0]~85 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X51_Y13_N9 +cyclonev_lcell_comb \RAM|mem[89][0]~feeder ( +// Equation(s): +// \RAM|mem[89][0]~feeder_combout = ( \RAM|mem~0_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[89][0]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[89][0]~feeder .extended_lut = "off"; +defparam \RAM|mem[89][0]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[89][0]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X49_Y11_N6 +cyclonev_lcell_comb \RAM|Decoder0~5 ( +// Equation(s): +// \RAM|Decoder0~5_combout = ( !\ALU|Mux25~1_combout & ( (\ALU|Mux24~1_combout & \ALU|Mux26~1_combout ) ) ) + + .dataa(gnd), + .datab(!\ALU|Mux24~1_combout ), + .datac(gnd), + .datad(!\ALU|Mux26~1_combout ), + .datae(!\ALU|Mux25~1_combout ), + .dataf(gnd), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|Decoder0~5_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|Decoder0~5 .extended_lut = "off"; +defparam \RAM|Decoder0~5 .lut_mask = 64'h0033000000330000; +defparam \RAM|Decoder0~5 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X51_Y13_N54 +cyclonev_lcell_comb \RAM|mem[89][2]~38 ( +// Equation(s): +// \RAM|mem[89][2]~38_combout = ( \RAM|Decoder0~5_combout & ( \RAM|Decoder0~4_combout & ( ((!\ALU|Mux27~1_combout & (\ALU|Mux30~1_combout & !\ALU|Mux28~1_combout ))) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~5_combout & ( \RAM|Decoder0~4_combout & +// ( \rst[0]~input_o ) ) ) # ( \RAM|Decoder0~5_combout & ( !\RAM|Decoder0~4_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~5_combout & ( !\RAM|Decoder0~4_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\rst[0]~input_o ), + .datab(!\ALU|Mux27~1_combout ), + .datac(!\ALU|Mux30~1_combout ), + .datad(!\ALU|Mux28~1_combout ), + .datae(!\RAM|Decoder0~5_combout ), + .dataf(!\RAM|Decoder0~4_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[89][2]~38_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[89][2]~38 .extended_lut = "off"; +defparam \RAM|mem[89][2]~38 .lut_mask = 64'h5555555555555D55; +defparam \RAM|mem[89][2]~38 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X51_Y13_N10 +dffeas \RAM|mem[89][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[89][0]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[89][2]~38_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[89][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[89][0] .is_wysiwyg = "true"; +defparam \RAM|mem[89][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X54_Y9_N30 +cyclonev_lcell_comb \RAM|mem[88][4]~37 ( +// Equation(s): +// \RAM|mem[88][4]~37_combout = ( \ALU|Mux24~1_combout & ( \RAM|Decoder0~3_combout & ( ((\RAM|Decoder0~7_combout & (\RAM|Decoder0~0_combout & !\ALU|Mux28~1_combout ))) # (\rst[0]~input_o ) ) ) ) # ( !\ALU|Mux24~1_combout & ( \RAM|Decoder0~3_combout & +// ( \rst[0]~input_o ) ) ) # ( \ALU|Mux24~1_combout & ( !\RAM|Decoder0~3_combout & ( \rst[0]~input_o ) ) ) # ( !\ALU|Mux24~1_combout & ( !\RAM|Decoder0~3_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\RAM|Decoder0~7_combout ), + .datab(!\RAM|Decoder0~0_combout ), + .datac(!\rst[0]~input_o ), + .datad(!\ALU|Mux28~1_combout ), + .datae(!\ALU|Mux24~1_combout ), + .dataf(!\RAM|Decoder0~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[88][4]~37_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[88][4]~37 .extended_lut = "off"; +defparam \RAM|mem[88][4]~37 .lut_mask = 64'h0F0F0F0F0F0F1F0F; +defparam \RAM|mem[88][4]~37 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X54_Y9_N34 +dffeas \RAM|mem[88][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[88][4]~37_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[88][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[88][0] .is_wysiwyg = "true"; +defparam \RAM|mem[88][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X49_Y6_N36 +cyclonev_lcell_comb \RAM|mem[90][0]~feeder ( +// Equation(s): +// \RAM|mem[90][0]~feeder_combout = ( \RAM|mem~0_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[90][0]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[90][0]~feeder .extended_lut = "off"; +defparam \RAM|mem[90][0]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[90][0]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X49_Y6_N24 +cyclonev_lcell_comb \RAM|mem[90][0]~39 ( +// Equation(s): +// \RAM|mem[90][0]~39_combout = ( \RAM|Decoder0~8_combout & ( \RAM|Decoder0~3_combout & ( ((\RAM|Decoder0~0_combout & (!\ALU|Mux28~1_combout & \ALU|Mux24~1_combout ))) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~8_combout & ( \RAM|Decoder0~3_combout +// & ( \rst[0]~input_o ) ) ) # ( \RAM|Decoder0~8_combout & ( !\RAM|Decoder0~3_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~8_combout & ( !\RAM|Decoder0~3_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\RAM|Decoder0~0_combout ), + .datab(!\ALU|Mux28~1_combout ), + .datac(!\ALU|Mux24~1_combout ), + .datad(!\rst[0]~input_o ), + .datae(!\RAM|Decoder0~8_combout ), + .dataf(!\RAM|Decoder0~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[90][0]~39_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[90][0]~39 .extended_lut = "off"; +defparam \RAM|mem[90][0]~39 .lut_mask = 64'h00FF00FF00FF04FF; +defparam \RAM|mem[90][0]~39 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X49_Y6_N37 +dffeas \RAM|mem[90][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[90][0]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[90][0]~39_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[90][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[90][0] .is_wysiwyg = "true"; +defparam \RAM|mem[90][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X45_Y10_N30 +cyclonev_lcell_comb \RAM|mem[91][0]~40 ( +// Equation(s): +// \RAM|mem[91][0]~40_combout = ( \RAM|Decoder0~4_combout & ( ((\RAM|Decoder0~5_combout & (\RAM|Decoder0~8_combout & !\ALU|Mux28~1_combout ))) # (\rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~4_combout & ( \rst[0]~input_o ) ) + + .dataa(!\RAM|Decoder0~5_combout ), + .datab(!\rst[0]~input_o ), + .datac(!\RAM|Decoder0~8_combout ), + .datad(!\ALU|Mux28~1_combout ), + .datae(gnd), + .dataf(!\RAM|Decoder0~4_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[91][0]~40_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[91][0]~40 .extended_lut = "off"; +defparam \RAM|mem[91][0]~40 .lut_mask = 64'h3333333337333733; +defparam \RAM|mem[91][0]~40 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X45_Y10_N20 +dffeas \RAM|mem[91][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[91][0]~40_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[91][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[91][0] .is_wysiwyg = "true"; +defparam \RAM|mem[91][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X45_Y10_N18 +cyclonev_lcell_comb \rd[0]~12 ( +// Equation(s): +// \rd[0]~12_combout = ( \RAM|mem[91][0]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & ((\RAM|mem[90][0]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[88][0]~q )) ) ) ) # ( !\RAM|mem[91][0]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout +// & ((\RAM|mem[90][0]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[88][0]~q )) ) ) ) # ( \RAM|mem[91][0]~q & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout ) # (\RAM|mem[89][0]~q ) ) ) ) # ( !\RAM|mem[91][0]~q & ( !\ALU|Mux31~3_combout & ( +// (\RAM|mem[89][0]~q & \ALU|Mux30~1_combout ) ) ) ) + + .dataa(!\RAM|mem[89][0]~q ), + .datab(!\RAM|mem[88][0]~q ), + .datac(!\ALU|Mux30~1_combout ), + .datad(!\RAM|mem[90][0]~q ), + .datae(!\RAM|mem[91][0]~q ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[0]~12_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[0]~12 .extended_lut = "off"; +defparam \rd[0]~12 .lut_mask = 64'h0505F5F503F303F3; +defparam \rd[0]~12 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X47_Y13_N6 +cyclonev_lcell_comb \RAM|Decoder0~9 ( +// Equation(s): +// \RAM|Decoder0~9_combout = ( !\ALU|Mux25~1_combout & ( \ALU|Mux24~1_combout & ( !\ALU|Mux26~1_combout ) ) ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(!\ALU|Mux26~1_combout ), + .datae(!\ALU|Mux25~1_combout ), + .dataf(!\ALU|Mux24~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|Decoder0~9_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|Decoder0~9 .extended_lut = "off"; +defparam \RAM|Decoder0~9 .lut_mask = 64'h00000000FF000000; +defparam \RAM|Decoder0~9 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X48_Y13_N51 +cyclonev_lcell_comb \RAM|mem[121][2]~46 ( +// Equation(s): +// \RAM|mem[121][2]~46_combout = ( \RAM|Decoder0~4_combout & ( \ALU|Mux28~1_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~4_combout & ( \ALU|Mux28~1_combout & ( \rst[0]~input_o ) ) ) # ( \RAM|Decoder0~4_combout & ( !\ALU|Mux28~1_combout & ( +// ((\RAM|Decoder0~9_combout & (!\ALU|Mux27~1_combout & \ALU|Mux30~1_combout ))) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~4_combout & ( !\ALU|Mux28~1_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\rst[0]~input_o ), + .datab(!\RAM|Decoder0~9_combout ), + .datac(!\ALU|Mux27~1_combout ), + .datad(!\ALU|Mux30~1_combout ), + .datae(!\RAM|Decoder0~4_combout ), + .dataf(!\ALU|Mux28~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[121][2]~46_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[121][2]~46 .extended_lut = "off"; +defparam \RAM|mem[121][2]~46 .lut_mask = 64'h5555557555555555; +defparam \RAM|mem[121][2]~46 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X48_Y13_N52 +dffeas \RAM|mem[121][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[121][2]~46_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[121][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[121][0] .is_wysiwyg = "true"; +defparam \RAM|mem[121][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X54_Y9_N0 +cyclonev_lcell_comb \RAM|mem[120][0]~45 ( +// Equation(s): +// \RAM|mem[120][0]~45_combout = ( \RAM|Decoder0~19_combout & ( \RAM|Decoder0~3_combout & ( ((!\ALU|Mux26~1_combout & (!\ALU|Mux25~1_combout & \ALU|Mux24~1_combout ))) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~19_combout & ( \RAM|Decoder0~3_combout +// & ( \rst[0]~input_o ) ) ) # ( \RAM|Decoder0~19_combout & ( !\RAM|Decoder0~3_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~19_combout & ( !\RAM|Decoder0~3_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\rst[0]~input_o ), + .datab(!\ALU|Mux26~1_combout ), + .datac(!\ALU|Mux25~1_combout ), + .datad(!\ALU|Mux24~1_combout ), + .datae(!\RAM|Decoder0~19_combout ), + .dataf(!\RAM|Decoder0~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[120][0]~45_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[120][0]~45 .extended_lut = "off"; +defparam \RAM|mem[120][0]~45 .lut_mask = 64'h55555555555555D5; +defparam \RAM|mem[120][0]~45 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X54_Y9_N1 +dffeas \RAM|mem[120][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[120][0]~45_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[120][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[120][0] .is_wysiwyg = "true"; +defparam \RAM|mem[120][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X43_Y10_N33 +cyclonev_lcell_comb \RAM|Decoder0~18 ( +// Equation(s): +// \RAM|Decoder0~18_combout = ( \ALU|Mux24~1_combout & ( \RAM|Decoder0~3_combout & ( (!\ALU|Mux25~1_combout & !\ALU|Mux26~1_combout ) ) ) ) + + .dataa(gnd), + .datab(gnd), + .datac(!\ALU|Mux25~1_combout ), + .datad(!\ALU|Mux26~1_combout ), + .datae(!\ALU|Mux24~1_combout ), + .dataf(!\RAM|Decoder0~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|Decoder0~18_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|Decoder0~18 .extended_lut = "off"; +defparam \RAM|Decoder0~18 .lut_mask = 64'h000000000000F000; +defparam \RAM|Decoder0~18 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X49_Y8_N12 +cyclonev_lcell_comb \RAM|mem[122][2]~47 ( +// Equation(s): +// \RAM|mem[122][2]~47_combout = ( \RAM|Decoder0~8_combout & ( \RAM|Decoder0~18_combout & ( (!\ALU|Mux28~1_combout ) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~8_combout & ( \RAM|Decoder0~18_combout & ( \rst[0]~input_o ) ) ) # ( +// \RAM|Decoder0~8_combout & ( !\RAM|Decoder0~18_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~8_combout & ( !\RAM|Decoder0~18_combout & ( \rst[0]~input_o ) ) ) + + .dataa(gnd), + .datab(!\rst[0]~input_o ), + .datac(gnd), + .datad(!\ALU|Mux28~1_combout ), + .datae(!\RAM|Decoder0~8_combout ), + .dataf(!\RAM|Decoder0~18_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[122][2]~47_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[122][2]~47 .extended_lut = "off"; +defparam \RAM|mem[122][2]~47 .lut_mask = 64'h333333333333FF33; +defparam \RAM|mem[122][2]~47 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X49_Y8_N22 +dffeas \RAM|mem[122][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[122][2]~47_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[122][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[122][0] .is_wysiwyg = "true"; +defparam \RAM|mem[122][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X45_Y10_N54 +cyclonev_lcell_comb \RAM|mem[123][1]~48 ( +// Equation(s): +// \RAM|mem[123][1]~48_combout = ( \RAM|Decoder0~4_combout & ( ((\RAM|Decoder0~9_combout & (\RAM|Decoder0~8_combout & !\ALU|Mux28~1_combout ))) # (\rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~4_combout & ( \rst[0]~input_o ) ) + + .dataa(!\RAM|Decoder0~9_combout ), + .datab(!\RAM|Decoder0~8_combout ), + .datac(!\ALU|Mux28~1_combout ), + .datad(!\rst[0]~input_o ), + .datae(gnd), + .dataf(!\RAM|Decoder0~4_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[123][1]~48_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[123][1]~48 .extended_lut = "off"; +defparam \RAM|mem[123][1]~48 .lut_mask = 64'h00FF00FF10FF10FF; +defparam \RAM|mem[123][1]~48 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X45_Y10_N14 +dffeas \RAM|mem[123][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[123][1]~48_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[123][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[123][0] .is_wysiwyg = "true"; +defparam \RAM|mem[123][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X45_Y10_N12 +cyclonev_lcell_comb \rd[0]~14 ( +// Equation(s): +// \rd[0]~14_combout = ( \RAM|mem[123][0]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & ((\RAM|mem[122][0]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[120][0]~q )) ) ) ) # ( !\RAM|mem[123][0]~q & ( \ALU|Mux31~3_combout & ( +// (!\ALU|Mux30~1_combout & ((\RAM|mem[122][0]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[120][0]~q )) ) ) ) # ( \RAM|mem[123][0]~q & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout ) # (\RAM|mem[121][0]~q ) ) ) ) # ( !\RAM|mem[123][0]~q & ( +// !\ALU|Mux31~3_combout & ( (\RAM|mem[121][0]~q & \ALU|Mux30~1_combout ) ) ) ) + + .dataa(!\RAM|mem[121][0]~q ), + .datab(!\RAM|mem[120][0]~q ), + .datac(!\ALU|Mux30~1_combout ), + .datad(!\RAM|mem[122][0]~q ), + .datae(!\RAM|mem[123][0]~q ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[0]~14_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[0]~14 .extended_lut = "off"; +defparam \rd[0]~14 .lut_mask = 64'h0505F5F503F303F3; +defparam \rd[0]~14 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X43_Y13_N12 +cyclonev_lcell_comb \RAM|mem[107][2]~44 ( +// Equation(s): +// \RAM|mem[107][2]~44_combout = ( \RAM|Decoder0~9_combout & ( \RAM|Decoder0~4_combout & ( ((\RAM|Decoder0~6_combout & !\ALU|Mux28~1_combout )) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~9_combout & ( \RAM|Decoder0~4_combout & ( \rst[0]~input_o ) ) +// ) # ( \RAM|Decoder0~9_combout & ( !\RAM|Decoder0~4_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~9_combout & ( !\RAM|Decoder0~4_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\RAM|Decoder0~6_combout ), + .datab(!\ALU|Mux28~1_combout ), + .datac(gnd), + .datad(!\rst[0]~input_o ), + .datae(!\RAM|Decoder0~9_combout ), + .dataf(!\RAM|Decoder0~4_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[107][2]~44_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[107][2]~44 .extended_lut = "off"; +defparam \RAM|mem[107][2]~44 .lut_mask = 64'h00FF00FF00FF44FF; +defparam \RAM|mem[107][2]~44 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X42_Y14_N19 +dffeas \RAM|mem[107][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[107][2]~44_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[107][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[107][0] .is_wysiwyg = "true"; +defparam \RAM|mem[107][0] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y14_N45 +cyclonev_lcell_comb \RAM|mem[106][0]~43 ( +// Equation(s): +// \RAM|mem[106][0]~43_combout = ( \RAM|Decoder0~18_combout & ( ((\RAM|Decoder0~6_combout & !\ALU|Mux28~1_combout )) # (\rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~18_combout & ( \rst[0]~input_o ) ) + + .dataa(!\rst[0]~input_o ), + .datab(!\RAM|Decoder0~6_combout ), + .datac(gnd), + .datad(!\ALU|Mux28~1_combout ), + .datae(gnd), + .dataf(!\RAM|Decoder0~18_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[106][0]~43_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[106][0]~43 .extended_lut = "off"; +defparam \RAM|mem[106][0]~43 .lut_mask = 64'h5555555577557755; +defparam \RAM|mem[106][0]~43 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X42_Y14_N46 +dffeas \RAM|mem[106][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[106][0]~43_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[106][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[106][0] .is_wysiwyg = "true"; +defparam \RAM|mem[106][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X53_Y13_N45 +cyclonev_lcell_comb \RAM|mem[104][0]~41 ( +// Equation(s): +// \RAM|mem[104][0]~41_combout = ( \RAM|Decoder0~17_combout & ( \RAM|Decoder0~3_combout & ( ((\ALU|Mux24~1_combout & (!\ALU|Mux26~1_combout & !\ALU|Mux25~1_combout ))) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~17_combout & ( \RAM|Decoder0~3_combout +// & ( \rst[0]~input_o ) ) ) # ( \RAM|Decoder0~17_combout & ( !\RAM|Decoder0~3_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~17_combout & ( !\RAM|Decoder0~3_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\ALU|Mux24~1_combout ), + .datab(!\rst[0]~input_o ), + .datac(!\ALU|Mux26~1_combout ), + .datad(!\ALU|Mux25~1_combout ), + .datae(!\RAM|Decoder0~17_combout ), + .dataf(!\RAM|Decoder0~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[104][0]~41_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[104][0]~41 .extended_lut = "off"; +defparam \RAM|mem[104][0]~41 .lut_mask = 64'h3333333333337333; +defparam \RAM|mem[104][0]~41 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X53_Y13_N46 +dffeas \RAM|mem[104][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[104][0]~41_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[104][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[104][0] .is_wysiwyg = "true"; +defparam \RAM|mem[104][0] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y14_N36 +cyclonev_lcell_comb \RAM|mem[105][0]~42 ( +// Equation(s): +// \RAM|mem[105][0]~42_combout = ( \ALU|Mux28~1_combout & ( \RAM|Decoder0~4_combout & ( \rst[0]~input_o ) ) ) # ( !\ALU|Mux28~1_combout & ( \RAM|Decoder0~4_combout & ( ((\RAM|Decoder0~9_combout & (\ALU|Mux27~1_combout & \ALU|Mux30~1_combout ))) # +// (\rst[0]~input_o ) ) ) ) # ( \ALU|Mux28~1_combout & ( !\RAM|Decoder0~4_combout & ( \rst[0]~input_o ) ) ) # ( !\ALU|Mux28~1_combout & ( !\RAM|Decoder0~4_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\rst[0]~input_o ), + .datab(!\RAM|Decoder0~9_combout ), + .datac(!\ALU|Mux27~1_combout ), + .datad(!\ALU|Mux30~1_combout ), + .datae(!\ALU|Mux28~1_combout ), + .dataf(!\RAM|Decoder0~4_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[105][0]~42_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[105][0]~42 .extended_lut = "off"; +defparam \RAM|mem[105][0]~42 .lut_mask = 64'h5555555555575555; +defparam \RAM|mem[105][0]~42 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X42_Y14_N7 +dffeas \RAM|mem[105][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[105][0]~42_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[105][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[105][0] .is_wysiwyg = "true"; +defparam \RAM|mem[105][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X45_Y10_N0 +cyclonev_lcell_comb \rd[0]~13 ( +// Equation(s): +// \rd[0]~13_combout = ( \RAM|mem[105][0]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & (\RAM|mem[106][0]~q )) # (\ALU|Mux30~1_combout & ((\RAM|mem[104][0]~q ))) ) ) ) # ( !\RAM|mem[105][0]~q & ( \ALU|Mux31~3_combout & ( +// (!\ALU|Mux30~1_combout & (\RAM|mem[106][0]~q )) # (\ALU|Mux30~1_combout & ((\RAM|mem[104][0]~q ))) ) ) ) # ( \RAM|mem[105][0]~q & ( !\ALU|Mux31~3_combout & ( (\ALU|Mux30~1_combout ) # (\RAM|mem[107][0]~q ) ) ) ) # ( !\RAM|mem[105][0]~q & ( +// !\ALU|Mux31~3_combout & ( (\RAM|mem[107][0]~q & !\ALU|Mux30~1_combout ) ) ) ) + + .dataa(!\RAM|mem[107][0]~q ), + .datab(!\RAM|mem[106][0]~q ), + .datac(!\ALU|Mux30~1_combout ), + .datad(!\RAM|mem[104][0]~q ), + .datae(!\RAM|mem[105][0]~q ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[0]~13_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[0]~13 .extended_lut = "off"; +defparam \rd[0]~13 .lut_mask = 64'h50505F5F303F303F; +defparam \rd[0]~13 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X54_Y9_N24 +cyclonev_lcell_comb \RAM|mem[72][3]~33 ( +// Equation(s): +// \RAM|mem[72][3]~33_combout = ( \RAM|Decoder0~17_combout & ( \RAM|Decoder0~3_combout & ( ((\ALU|Mux24~1_combout & \RAM|Decoder0~0_combout )) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~17_combout & ( \RAM|Decoder0~3_combout & ( \rst[0]~input_o ) ) +// ) # ( \RAM|Decoder0~17_combout & ( !\RAM|Decoder0~3_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~17_combout & ( !\RAM|Decoder0~3_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\ALU|Mux24~1_combout ), + .datab(gnd), + .datac(!\rst[0]~input_o ), + .datad(!\RAM|Decoder0~0_combout ), + .datae(!\RAM|Decoder0~17_combout ), + .dataf(!\RAM|Decoder0~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[72][3]~33_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[72][3]~33 .extended_lut = "off"; +defparam \RAM|mem[72][3]~33 .lut_mask = 64'h0F0F0F0F0F0F0F5F; +defparam \RAM|mem[72][3]~33 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X54_Y9_N29 +dffeas \RAM|mem[72][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[72][3]~33_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[72][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[72][0] .is_wysiwyg = "true"; +defparam \RAM|mem[72][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X51_Y13_N51 +cyclonev_lcell_comb \RAM|mem[73][1]~34 ( +// Equation(s): +// \RAM|mem[73][1]~34_combout = ( \RAM|Decoder0~5_combout & ( \RAM|Decoder0~4_combout & ( ((\ALU|Mux30~1_combout & (!\ALU|Mux28~1_combout & \ALU|Mux27~1_combout ))) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~5_combout & ( \RAM|Decoder0~4_combout & +// ( \rst[0]~input_o ) ) ) # ( \RAM|Decoder0~5_combout & ( !\RAM|Decoder0~4_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~5_combout & ( !\RAM|Decoder0~4_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\ALU|Mux30~1_combout ), + .datab(!\ALU|Mux28~1_combout ), + .datac(!\rst[0]~input_o ), + .datad(!\ALU|Mux27~1_combout ), + .datae(!\RAM|Decoder0~5_combout ), + .dataf(!\RAM|Decoder0~4_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[73][1]~34_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[73][1]~34 .extended_lut = "off"; +defparam \RAM|mem[73][1]~34 .lut_mask = 64'h0F0F0F0F0F0F0F4F; +defparam \RAM|mem[73][1]~34 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X51_Y13_N53 +dffeas \RAM|mem[73][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[73][1]~34_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[73][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[73][0] .is_wysiwyg = "true"; +defparam \RAM|mem[73][0] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X50_Y8_N27 +cyclonev_lcell_comb \RAM|mem[74][0]~feeder ( +// Equation(s): +// \RAM|mem[74][0]~feeder_combout = ( \RAM|mem~0_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[74][0]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[74][0]~feeder .extended_lut = "off"; +defparam \RAM|mem[74][0]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[74][0]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X50_Y8_N3 +cyclonev_lcell_comb \RAM|mem[74][1]~35 ( +// Equation(s): +// \RAM|mem[74][1]~35_combout = ( \RAM|Decoder0~6_combout & ( \RAM|Decoder0~3_combout & ( ((\ALU|Mux24~1_combout & (\RAM|Decoder0~0_combout & !\ALU|Mux28~1_combout ))) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~6_combout & ( \RAM|Decoder0~3_combout +// & ( \rst[0]~input_o ) ) ) # ( \RAM|Decoder0~6_combout & ( !\RAM|Decoder0~3_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~6_combout & ( !\RAM|Decoder0~3_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\ALU|Mux24~1_combout ), + .datab(!\rst[0]~input_o ), + .datac(!\RAM|Decoder0~0_combout ), + .datad(!\ALU|Mux28~1_combout ), + .datae(!\RAM|Decoder0~6_combout ), + .dataf(!\RAM|Decoder0~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[74][1]~35_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[74][1]~35 .extended_lut = "off"; +defparam \RAM|mem[74][1]~35 .lut_mask = 64'h3333333333333733; +defparam \RAM|mem[74][1]~35 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X50_Y8_N28 +dffeas \RAM|mem[74][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[74][0]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[74][1]~35_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[74][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[74][0] .is_wysiwyg = "true"; +defparam \RAM|mem[74][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X45_Y10_N45 +cyclonev_lcell_comb \RAM|mem[75][2]~36 ( +// Equation(s): +// \RAM|mem[75][2]~36_combout = ( \RAM|Decoder0~6_combout & ( \RAM|Decoder0~4_combout & ( ((!\ALU|Mux28~1_combout & \RAM|Decoder0~5_combout )) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~6_combout & ( \RAM|Decoder0~4_combout & ( \rst[0]~input_o ) ) +// ) # ( \RAM|Decoder0~6_combout & ( !\RAM|Decoder0~4_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~6_combout & ( !\RAM|Decoder0~4_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\ALU|Mux28~1_combout ), + .datab(!\rst[0]~input_o ), + .datac(gnd), + .datad(!\RAM|Decoder0~5_combout ), + .datae(!\RAM|Decoder0~6_combout ), + .dataf(!\RAM|Decoder0~4_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[75][2]~36_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[75][2]~36 .extended_lut = "off"; +defparam \RAM|mem[75][2]~36 .lut_mask = 64'h33333333333333BB; +defparam \RAM|mem[75][2]~36 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X45_Y10_N50 +dffeas \RAM|mem[75][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[75][2]~36_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[75][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[75][0] .is_wysiwyg = "true"; +defparam \RAM|mem[75][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X45_Y10_N48 +cyclonev_lcell_comb \rd[0]~11 ( +// Equation(s): +// \rd[0]~11_combout = ( \RAM|mem[75][0]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & ((\RAM|mem[74][0]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[72][0]~q )) ) ) ) # ( !\RAM|mem[75][0]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout +// & ((\RAM|mem[74][0]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[72][0]~q )) ) ) ) # ( \RAM|mem[75][0]~q & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout ) # (\RAM|mem[73][0]~q ) ) ) ) # ( !\RAM|mem[75][0]~q & ( !\ALU|Mux31~3_combout & ( +// (\RAM|mem[73][0]~q & \ALU|Mux30~1_combout ) ) ) ) + + .dataa(!\RAM|mem[72][0]~q ), + .datab(!\RAM|mem[73][0]~q ), + .datac(!\ALU|Mux30~1_combout ), + .datad(!\RAM|mem[74][0]~q ), + .datae(!\RAM|mem[75][0]~q ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[0]~11_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[0]~11 .extended_lut = "off"; +defparam \rd[0]~11 .lut_mask = 64'h0303F3F305F505F5; +defparam \rd[0]~11 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X45_Y10_N36 +cyclonev_lcell_comb \rd[0]~15 ( +// Equation(s): +// \rd[0]~15_combout = ( \rd[0]~13_combout & ( \rd[0]~11_combout & ( ((!\ALU|Mux26~1_combout & ((\rd[0]~14_combout ))) # (\ALU|Mux26~1_combout & (\rd[0]~12_combout ))) # (\ALU|Mux27~1_combout ) ) ) ) # ( !\rd[0]~13_combout & ( \rd[0]~11_combout & ( +// (!\ALU|Mux27~1_combout & ((!\ALU|Mux26~1_combout & ((\rd[0]~14_combout ))) # (\ALU|Mux26~1_combout & (\rd[0]~12_combout )))) # (\ALU|Mux27~1_combout & (\ALU|Mux26~1_combout )) ) ) ) # ( \rd[0]~13_combout & ( !\rd[0]~11_combout & ( +// (!\ALU|Mux27~1_combout & ((!\ALU|Mux26~1_combout & ((\rd[0]~14_combout ))) # (\ALU|Mux26~1_combout & (\rd[0]~12_combout )))) # (\ALU|Mux27~1_combout & (!\ALU|Mux26~1_combout )) ) ) ) # ( !\rd[0]~13_combout & ( !\rd[0]~11_combout & ( +// (!\ALU|Mux27~1_combout & ((!\ALU|Mux26~1_combout & ((\rd[0]~14_combout ))) # (\ALU|Mux26~1_combout & (\rd[0]~12_combout )))) ) ) ) + + .dataa(!\ALU|Mux27~1_combout ), + .datab(!\ALU|Mux26~1_combout ), + .datac(!\rd[0]~12_combout ), + .datad(!\rd[0]~14_combout ), + .datae(!\rd[0]~13_combout ), + .dataf(!\rd[0]~11_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[0]~15_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[0]~15 .extended_lut = "off"; +defparam \rd[0]~15 .lut_mask = 64'h028A46CE139B57DF; +defparam \rd[0]~15 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X48_Y9_N42 +cyclonev_lcell_comb \RAM|mem[111][2]~63 ( +// Equation(s): +// \RAM|mem[111][2]~63_combout = ( \RAM|Decoder0~27_combout & ( \ALU|Mux31~3_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~27_combout & ( \ALU|Mux31~3_combout & ( \rst[0]~input_o ) ) ) # ( \RAM|Decoder0~27_combout & ( !\ALU|Mux31~3_combout & +// ( ((!\ALU|Mux25~1_combout & (\RAM|Decoder0~22_combout & \ALU|Mux24~1_combout ))) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~27_combout & ( !\ALU|Mux31~3_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\ALU|Mux25~1_combout ), + .datab(!\RAM|Decoder0~22_combout ), + .datac(!\rst[0]~input_o ), + .datad(!\ALU|Mux24~1_combout ), + .datae(!\RAM|Decoder0~27_combout ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[111][2]~63_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[111][2]~63 .extended_lut = "off"; +defparam \RAM|mem[111][2]~63 .lut_mask = 64'h0F0F0F2F0F0F0F0F; +defparam \RAM|mem[111][2]~63 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X48_Y9_N43 +dffeas \RAM|mem[111][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[111][2]~63_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[111][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[111][0] .is_wysiwyg = "true"; +defparam \RAM|mem[111][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X46_Y7_N18 +cyclonev_lcell_comb \RAM|mem[95][4]~62 ( +// Equation(s): +// \RAM|mem[95][4]~62_combout = ( \RAM|Decoder0~25_combout & ( \ALU|Mux31~3_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~25_combout & ( \ALU|Mux31~3_combout & ( \rst[0]~input_o ) ) ) # ( \RAM|Decoder0~25_combout & ( !\ALU|Mux31~3_combout & ( +// ((\RAM|Decoder0~8_combout & \RAM|Decoder0~5_combout )) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~25_combout & ( !\ALU|Mux31~3_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\RAM|Decoder0~8_combout ), + .datab(!\RAM|Decoder0~5_combout ), + .datac(!\rst[0]~input_o ), + .datad(gnd), + .datae(!\RAM|Decoder0~25_combout ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[95][4]~62_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[95][4]~62 .extended_lut = "off"; +defparam \RAM|mem[95][4]~62 .lut_mask = 64'h0F0F1F1F0F0F0F0F; +defparam \RAM|mem[95][4]~62 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X46_Y7_N47 +dffeas \RAM|mem[95][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[95][4]~62_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[95][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[95][0] .is_wysiwyg = "true"; +defparam \RAM|mem[95][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X46_Y7_N24 +cyclonev_lcell_comb \RAM|mem[79][0]~61 ( +// Equation(s): +// \RAM|mem[79][0]~61_combout = ( \ALU|Mux29~3_combout & ( \ALU|Mux31~3_combout & ( \rst[0]~input_o ) ) ) # ( !\ALU|Mux29~3_combout & ( \ALU|Mux31~3_combout & ( \rst[0]~input_o ) ) ) # ( \ALU|Mux29~3_combout & ( !\ALU|Mux31~3_combout & ( +// \rst[0]~input_o ) ) ) # ( !\ALU|Mux29~3_combout & ( !\ALU|Mux31~3_combout & ( ((!\ALU|Mux28~1_combout & (\RAM|Decoder0~27_combout & \RAM|Decoder0~5_combout ))) # (\rst[0]~input_o ) ) ) ) + + .dataa(!\rst[0]~input_o ), + .datab(!\ALU|Mux28~1_combout ), + .datac(!\RAM|Decoder0~27_combout ), + .datad(!\RAM|Decoder0~5_combout ), + .datae(!\ALU|Mux29~3_combout ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[79][0]~61_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[79][0]~61 .extended_lut = "off"; +defparam \RAM|mem[79][0]~61 .lut_mask = 64'h555D555555555555; +defparam \RAM|mem[79][0]~61 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X46_Y7_N26 +dffeas \RAM|mem[79][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[79][0]~61_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[79][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[79][0] .is_wysiwyg = "true"; +defparam \RAM|mem[79][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X46_Y8_N24 +cyclonev_lcell_comb \RAM|mem[127][1]~64 ( +// Equation(s): +// \RAM|mem[127][1]~64_combout = ( \RAM|Decoder0~8_combout & ( \ALU|Mux31~3_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~8_combout & ( \ALU|Mux31~3_combout & ( \rst[0]~input_o ) ) ) # ( \RAM|Decoder0~8_combout & ( !\ALU|Mux31~3_combout & ( +// ((\RAM|Decoder0~25_combout & \RAM|Decoder0~9_combout )) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~8_combout & ( !\ALU|Mux31~3_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\rst[0]~input_o ), + .datab(gnd), + .datac(!\RAM|Decoder0~25_combout ), + .datad(!\RAM|Decoder0~9_combout ), + .datae(!\RAM|Decoder0~8_combout ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[127][1]~64_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[127][1]~64 .extended_lut = "off"; +defparam \RAM|mem[127][1]~64 .lut_mask = 64'h5555555F55555555; +defparam \RAM|mem[127][1]~64 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X46_Y7_N55 +dffeas \RAM|mem[127][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[127][1]~64_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[127][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[127][0] .is_wysiwyg = "true"; +defparam \RAM|mem[127][0] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X50_Y7_N0 +cyclonev_lcell_comb \rd[0]~19 ( +// Equation(s): +// \rd[0]~19_combout = ( \ALU|Mux26~1_combout & ( \ALU|Mux27~1_combout & ( \RAM|mem[79][0]~q ) ) ) # ( !\ALU|Mux26~1_combout & ( \ALU|Mux27~1_combout & ( \RAM|mem[111][0]~q ) ) ) # ( \ALU|Mux26~1_combout & ( !\ALU|Mux27~1_combout & ( +// \RAM|mem[95][0]~q ) ) ) # ( !\ALU|Mux26~1_combout & ( !\ALU|Mux27~1_combout & ( \RAM|mem[127][0]~q ) ) ) + + .dataa(!\RAM|mem[111][0]~q ), + .datab(!\RAM|mem[95][0]~q ), + .datac(!\RAM|mem[79][0]~q ), + .datad(!\RAM|mem[127][0]~q ), + .datae(!\ALU|Mux26~1_combout ), + .dataf(!\ALU|Mux27~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[0]~19_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[0]~19 .extended_lut = "off"; +defparam \rd[0]~19 .lut_mask = 64'h00FF333355550F0F; +defparam \rd[0]~19 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X53_Y7_N21 +cyclonev_lcell_comb \RAM|mem[109][1]~55 ( +// Equation(s): +// \RAM|mem[109][1]~55_combout = ( \RAM|Decoder0~22_combout & ( \ALU|Mux31~3_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~22_combout & ( \ALU|Mux31~3_combout & ( \rst[0]~input_o ) ) ) # ( \RAM|Decoder0~22_combout & ( !\ALU|Mux31~3_combout & +// ( ((\ALU|Mux27~1_combout & (\ALU|Mux24~1_combout & \RAM|Decoder0~23_combout ))) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~22_combout & ( !\ALU|Mux31~3_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\ALU|Mux27~1_combout ), + .datab(!\rst[0]~input_o ), + .datac(!\ALU|Mux24~1_combout ), + .datad(!\RAM|Decoder0~23_combout ), + .datae(!\RAM|Decoder0~22_combout ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[109][1]~55_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[109][1]~55 .extended_lut = "off"; +defparam \RAM|mem[109][1]~55 .lut_mask = 64'h3333333733333333; +defparam \RAM|mem[109][1]~55 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X53_Y7_N28 +dffeas \RAM|mem[109][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[109][1]~55_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[109][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[109][0] .is_wysiwyg = "true"; +defparam \RAM|mem[109][0] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X55_Y11_N42 +cyclonev_lcell_comb \RAM|mem[93][2]~54 ( +// Equation(s): +// \RAM|mem[93][2]~54_combout = ( \ALU|Mux31~3_combout & ( \rst[0]~input_o ) ) # ( !\ALU|Mux31~3_combout & ( ((!\ALU|Mux27~1_combout & (\RAM|Decoder0~21_combout & \ALU|Mux24~1_combout ))) # (\rst[0]~input_o ) ) ) + + .dataa(!\ALU|Mux27~1_combout ), + .datab(!\RAM|Decoder0~21_combout ), + .datac(!\rst[0]~input_o ), + .datad(!\ALU|Mux24~1_combout ), + .datae(gnd), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[93][2]~54_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[93][2]~54 .extended_lut = "off"; +defparam \RAM|mem[93][2]~54 .lut_mask = 64'h0F2F0F2F0F0F0F0F; +defparam \RAM|mem[93][2]~54 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X55_Y11_N43 +dffeas \RAM|mem[93][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[93][2]~54_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[93][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[93][0] .is_wysiwyg = "true"; +defparam \RAM|mem[93][0] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X55_Y11_N57 +cyclonev_lcell_comb \RAM|mem[77][3]~53 ( +// Equation(s): +// \RAM|mem[77][3]~53_combout = ( \ALU|Mux24~1_combout & ( \ALU|Mux31~3_combout & ( \rst[0]~input_o ) ) ) # ( !\ALU|Mux24~1_combout & ( \ALU|Mux31~3_combout & ( \rst[0]~input_o ) ) ) # ( \ALU|Mux24~1_combout & ( !\ALU|Mux31~3_combout & ( +// ((\RAM|Decoder0~21_combout & \ALU|Mux27~1_combout )) # (\rst[0]~input_o ) ) ) ) # ( !\ALU|Mux24~1_combout & ( !\ALU|Mux31~3_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\rst[0]~input_o ), + .datab(gnd), + .datac(!\RAM|Decoder0~21_combout ), + .datad(!\ALU|Mux27~1_combout ), + .datae(!\ALU|Mux24~1_combout ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[77][3]~53_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[77][3]~53 .extended_lut = "off"; +defparam \RAM|mem[77][3]~53 .lut_mask = 64'h5555555F55555555; +defparam \RAM|mem[77][3]~53 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X55_Y11_N14 +dffeas \RAM|mem[77][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[77][3]~53_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[77][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[77][0] .is_wysiwyg = "true"; +defparam \RAM|mem[77][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X51_Y13_N42 +cyclonev_lcell_comb \RAM|mem[125][4]~56 ( +// Equation(s): +// \RAM|mem[125][4]~56_combout = ( \RAM|Decoder0~24_combout & ( \ALU|Mux31~3_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~24_combout & ( \ALU|Mux31~3_combout & ( \rst[0]~input_o ) ) ) # ( \RAM|Decoder0~24_combout & ( !\ALU|Mux31~3_combout & +// ( ((\ALU|Mux24~1_combout & !\ALU|Mux27~1_combout )) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~24_combout & ( !\ALU|Mux31~3_combout & ( \rst[0]~input_o ) ) ) + + .dataa(gnd), + .datab(!\rst[0]~input_o ), + .datac(!\ALU|Mux24~1_combout ), + .datad(!\ALU|Mux27~1_combout ), + .datae(!\RAM|Decoder0~24_combout ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[125][4]~56_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[125][4]~56 .extended_lut = "off"; +defparam \RAM|mem[125][4]~56 .lut_mask = 64'h33333F3333333333; +defparam \RAM|mem[125][4]~56 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X55_Y11_N38 +dffeas \RAM|mem[125][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[125][4]~56_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[125][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[125][0] .is_wysiwyg = "true"; +defparam \RAM|mem[125][0] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X55_Y11_N36 +cyclonev_lcell_comb \rd[0]~17 ( +// Equation(s): +// \rd[0]~17_combout = ( \RAM|mem[125][0]~q & ( \ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout & (\RAM|mem[109][0]~q )) # (\ALU|Mux26~1_combout & ((\RAM|mem[77][0]~q ))) ) ) ) # ( !\RAM|mem[125][0]~q & ( \ALU|Mux27~1_combout & ( +// (!\ALU|Mux26~1_combout & (\RAM|mem[109][0]~q )) # (\ALU|Mux26~1_combout & ((\RAM|mem[77][0]~q ))) ) ) ) # ( \RAM|mem[125][0]~q & ( !\ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout ) # (\RAM|mem[93][0]~q ) ) ) ) # ( !\RAM|mem[125][0]~q & ( +// !\ALU|Mux27~1_combout & ( (\RAM|mem[93][0]~q & \ALU|Mux26~1_combout ) ) ) ) + + .dataa(!\RAM|mem[109][0]~q ), + .datab(!\RAM|mem[93][0]~q ), + .datac(!\ALU|Mux26~1_combout ), + .datad(!\RAM|mem[77][0]~q ), + .datae(!\RAM|mem[125][0]~q ), + .dataf(!\ALU|Mux27~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[0]~17_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[0]~17 .extended_lut = "off"; +defparam \rd[0]~17 .lut_mask = 64'h0303F3F3505F505F; +defparam \rd[0]~17 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X50_Y10_N9 +cyclonev_lcell_comb \RAM|mem[94][4]~58 ( +// Equation(s): +// \RAM|mem[94][4]~58_combout = ( \RAM|Decoder0~8_combout & ( \RAM|Decoder0~26_combout & ( ((\ALU|Mux24~1_combout & \RAM|Decoder0~0_combout )) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~8_combout & ( \RAM|Decoder0~26_combout & ( \rst[0]~input_o ) ) +// ) # ( \RAM|Decoder0~8_combout & ( !\RAM|Decoder0~26_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~8_combout & ( !\RAM|Decoder0~26_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\ALU|Mux24~1_combout ), + .datab(gnd), + .datac(!\rst[0]~input_o ), + .datad(!\RAM|Decoder0~0_combout ), + .datae(!\RAM|Decoder0~8_combout ), + .dataf(!\RAM|Decoder0~26_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[94][4]~58_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[94][4]~58 .extended_lut = "off"; +defparam \RAM|mem[94][4]~58 .lut_mask = 64'h0F0F0F0F0F0F0F5F; +defparam \RAM|mem[94][4]~58 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X50_Y10_N10 +dffeas \RAM|mem[94][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[94][4]~58_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[94][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[94][0] .is_wysiwyg = "true"; +defparam \RAM|mem[94][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X48_Y9_N27 +cyclonev_lcell_comb \RAM|mem[110][0]~feeder ( +// Equation(s): +// \RAM|mem[110][0]~feeder_combout = ( \RAM|mem~0_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[110][0]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[110][0]~feeder .extended_lut = "off"; +defparam \RAM|mem[110][0]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[110][0]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X48_Y9_N54 +cyclonev_lcell_comb \RAM|mem[110][0]~59 ( +// Equation(s): +// \RAM|mem[110][0]~59_combout = ( \RAM|Decoder0~11_combout & ( \RAM|Decoder0~26_combout & ( ((\RAM|Decoder0~6_combout & \ALU|Mux24~1_combout )) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~11_combout & ( \RAM|Decoder0~26_combout & ( \rst[0]~input_o +// ) ) ) # ( \RAM|Decoder0~11_combout & ( !\RAM|Decoder0~26_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~11_combout & ( !\RAM|Decoder0~26_combout & ( \rst[0]~input_o ) ) ) + + .dataa(gnd), + .datab(!\RAM|Decoder0~6_combout ), + .datac(!\rst[0]~input_o ), + .datad(!\ALU|Mux24~1_combout ), + .datae(!\RAM|Decoder0~11_combout ), + .dataf(!\RAM|Decoder0~26_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[110][0]~59_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[110][0]~59 .extended_lut = "off"; +defparam \RAM|mem[110][0]~59 .lut_mask = 64'h0F0F0F0F0F0F0F3F; +defparam \RAM|mem[110][0]~59 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X48_Y9_N28 +dffeas \RAM|mem[110][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[110][0]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[110][0]~59_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[110][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[110][0] .is_wysiwyg = "true"; +defparam \RAM|mem[110][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X54_Y8_N39 +cyclonev_lcell_comb \RAM|mem[78][0]~57 ( +// Equation(s): +// \RAM|mem[78][0]~57_combout = ( \RAM|Decoder0~26_combout & ( ((\RAM|Decoder0~6_combout & (\RAM|Decoder0~0_combout & \ALU|Mux24~1_combout ))) # (\rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~26_combout & ( \rst[0]~input_o ) ) + + .dataa(!\rst[0]~input_o ), + .datab(!\RAM|Decoder0~6_combout ), + .datac(!\RAM|Decoder0~0_combout ), + .datad(!\ALU|Mux24~1_combout ), + .datae(gnd), + .dataf(!\RAM|Decoder0~26_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[78][0]~57_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[78][0]~57 .extended_lut = "off"; +defparam \RAM|mem[78][0]~57 .lut_mask = 64'h5555555555575557; +defparam \RAM|mem[78][0]~57 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X54_Y8_N41 +dffeas \RAM|mem[78][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[78][0]~57_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[78][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[78][0] .is_wysiwyg = "true"; +defparam \RAM|mem[78][0] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X50_Y9_N30 +cyclonev_lcell_comb \RAM|mem[126][1]~60 ( +// Equation(s): +// \RAM|mem[126][1]~60_combout = ( \RAM|Decoder0~26_combout & ( ((\ALU|Mux24~1_combout & (\RAM|Decoder0~11_combout & \RAM|Decoder0~8_combout ))) # (\rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~26_combout & ( \rst[0]~input_o ) ) + + .dataa(!\ALU|Mux24~1_combout ), + .datab(!\RAM|Decoder0~11_combout ), + .datac(!\RAM|Decoder0~8_combout ), + .datad(!\rst[0]~input_o ), + .datae(gnd), + .dataf(!\RAM|Decoder0~26_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[126][1]~60_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[126][1]~60 .extended_lut = "off"; +defparam \RAM|mem[126][1]~60 .lut_mask = 64'h00FF00FF01FF01FF; +defparam \RAM|mem[126][1]~60 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X50_Y9_N44 +dffeas \RAM|mem[126][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[126][1]~60_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[126][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[126][0] .is_wysiwyg = "true"; +defparam \RAM|mem[126][0] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X50_Y9_N42 +cyclonev_lcell_comb \rd[0]~18 ( +// Equation(s): +// \rd[0]~18_combout = ( \RAM|mem[126][0]~q & ( \ALU|Mux26~1_combout & ( (!\ALU|Mux27~1_combout & (\RAM|mem[94][0]~q )) # (\ALU|Mux27~1_combout & ((\RAM|mem[78][0]~q ))) ) ) ) # ( !\RAM|mem[126][0]~q & ( \ALU|Mux26~1_combout & ( (!\ALU|Mux27~1_combout +// & (\RAM|mem[94][0]~q )) # (\ALU|Mux27~1_combout & ((\RAM|mem[78][0]~q ))) ) ) ) # ( \RAM|mem[126][0]~q & ( !\ALU|Mux26~1_combout & ( (!\ALU|Mux27~1_combout ) # (\RAM|mem[110][0]~q ) ) ) ) # ( !\RAM|mem[126][0]~q & ( !\ALU|Mux26~1_combout & ( +// (\RAM|mem[110][0]~q & \ALU|Mux27~1_combout ) ) ) ) + + .dataa(!\RAM|mem[94][0]~q ), + .datab(!\RAM|mem[110][0]~q ), + .datac(!\ALU|Mux27~1_combout ), + .datad(!\RAM|mem[78][0]~q ), + .datae(!\RAM|mem[126][0]~q ), + .dataf(!\ALU|Mux26~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[0]~18_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[0]~18 .extended_lut = "off"; +defparam \rd[0]~18 .lut_mask = 64'h0303F3F3505F505F; +defparam \rd[0]~18 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X55_Y10_N0 +cyclonev_lcell_comb \RAM|mem[76][0]~feeder ( +// Equation(s): +// \RAM|mem[76][0]~feeder_combout = ( \RAM|mem~0_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[76][0]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[76][0]~feeder .extended_lut = "off"; +defparam \RAM|mem[76][0]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[76][0]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X55_Y10_N18 +cyclonev_lcell_comb \RAM|mem[76][2]~49 ( +// Equation(s): +// \RAM|mem[76][2]~49_combout = ( \ALU|Mux31~3_combout & ( ((\RAM|Decoder0~21_combout & (\ALU|Mux27~1_combout & \ALU|Mux24~1_combout ))) # (\rst[0]~input_o ) ) ) # ( !\ALU|Mux31~3_combout & ( \rst[0]~input_o ) ) + + .dataa(!\rst[0]~input_o ), + .datab(!\RAM|Decoder0~21_combout ), + .datac(!\ALU|Mux27~1_combout ), + .datad(!\ALU|Mux24~1_combout ), + .datae(gnd), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[76][2]~49_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[76][2]~49 .extended_lut = "off"; +defparam \RAM|mem[76][2]~49 .lut_mask = 64'h5555555555575557; +defparam \RAM|mem[76][2]~49 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X55_Y10_N2 +dffeas \RAM|mem[76][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[76][0]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[76][2]~49_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[76][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[76][0] .is_wysiwyg = "true"; +defparam \RAM|mem[76][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X49_Y9_N15 +cyclonev_lcell_comb \RAM|mem[108][3]~51 ( +// Equation(s): +// \RAM|mem[108][3]~51_combout = ( \RAM|Decoder0~23_combout & ( \ALU|Mux31~3_combout & ( ((\ALU|Mux24~1_combout & (\ALU|Mux27~1_combout & \RAM|Decoder0~22_combout ))) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~23_combout & ( \ALU|Mux31~3_combout & +// ( \rst[0]~input_o ) ) ) # ( \RAM|Decoder0~23_combout & ( !\ALU|Mux31~3_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~23_combout & ( !\ALU|Mux31~3_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\ALU|Mux24~1_combout ), + .datab(!\rst[0]~input_o ), + .datac(!\ALU|Mux27~1_combout ), + .datad(!\RAM|Decoder0~22_combout ), + .datae(!\RAM|Decoder0~23_combout ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[108][3]~51_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[108][3]~51 .extended_lut = "off"; +defparam \RAM|mem[108][3]~51 .lut_mask = 64'h3333333333333337; +defparam \RAM|mem[108][3]~51 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X50_Y14_N25 +dffeas \RAM|mem[108][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[108][3]~51_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[108][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[108][0] .is_wysiwyg = "true"; +defparam \RAM|mem[108][0] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X55_Y10_N6 +cyclonev_lcell_comb \RAM|mem[92][2]~50 ( +// Equation(s): +// \RAM|mem[92][2]~50_combout = ( \ALU|Mux31~3_combout & ( \RAM|Decoder0~21_combout & ( ((!\ALU|Mux27~1_combout & \ALU|Mux24~1_combout )) # (\rst[0]~input_o ) ) ) ) # ( !\ALU|Mux31~3_combout & ( \RAM|Decoder0~21_combout & ( \rst[0]~input_o ) ) ) # ( +// \ALU|Mux31~3_combout & ( !\RAM|Decoder0~21_combout & ( \rst[0]~input_o ) ) ) # ( !\ALU|Mux31~3_combout & ( !\RAM|Decoder0~21_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\rst[0]~input_o ), + .datab(!\ALU|Mux27~1_combout ), + .datac(gnd), + .datad(!\ALU|Mux24~1_combout ), + .datae(!\ALU|Mux31~3_combout ), + .dataf(!\RAM|Decoder0~21_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[92][2]~50_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[92][2]~50 .extended_lut = "off"; +defparam \RAM|mem[92][2]~50 .lut_mask = 64'h55555555555555DD; +defparam \RAM|mem[92][2]~50 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X55_Y10_N7 +dffeas \RAM|mem[92][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[92][2]~50_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[92][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[92][0] .is_wysiwyg = "true"; +defparam \RAM|mem[92][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X51_Y10_N57 +cyclonev_lcell_comb \RAM|mem[124][2]~52 ( +// Equation(s): +// \RAM|mem[124][2]~52_combout = ( \ALU|Mux24~1_combout & ( \ALU|Mux31~3_combout & ( ((\RAM|Decoder0~24_combout & !\ALU|Mux27~1_combout )) # (\rst[0]~input_o ) ) ) ) # ( !\ALU|Mux24~1_combout & ( \ALU|Mux31~3_combout & ( \rst[0]~input_o ) ) ) # ( +// \ALU|Mux24~1_combout & ( !\ALU|Mux31~3_combout & ( \rst[0]~input_o ) ) ) # ( !\ALU|Mux24~1_combout & ( !\ALU|Mux31~3_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\rst[0]~input_o ), + .datab(gnd), + .datac(!\RAM|Decoder0~24_combout ), + .datad(!\ALU|Mux27~1_combout ), + .datae(!\ALU|Mux24~1_combout ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[124][2]~52_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[124][2]~52 .extended_lut = "off"; +defparam \RAM|mem[124][2]~52 .lut_mask = 64'h5555555555555F55; +defparam \RAM|mem[124][2]~52 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X55_Y10_N50 +dffeas \RAM|mem[124][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[124][2]~52_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[124][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[124][0] .is_wysiwyg = "true"; +defparam \RAM|mem[124][0] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X55_Y10_N48 +cyclonev_lcell_comb \rd[0]~16 ( +// Equation(s): +// \rd[0]~16_combout = ( \RAM|mem[124][0]~q & ( \ALU|Mux26~1_combout & ( (!\ALU|Mux27~1_combout & ((\RAM|mem[92][0]~q ))) # (\ALU|Mux27~1_combout & (\RAM|mem[76][0]~q )) ) ) ) # ( !\RAM|mem[124][0]~q & ( \ALU|Mux26~1_combout & ( (!\ALU|Mux27~1_combout +// & ((\RAM|mem[92][0]~q ))) # (\ALU|Mux27~1_combout & (\RAM|mem[76][0]~q )) ) ) ) # ( \RAM|mem[124][0]~q & ( !\ALU|Mux26~1_combout & ( (!\ALU|Mux27~1_combout ) # (\RAM|mem[108][0]~q ) ) ) ) # ( !\RAM|mem[124][0]~q & ( !\ALU|Mux26~1_combout & ( +// (\RAM|mem[108][0]~q & \ALU|Mux27~1_combout ) ) ) ) + + .dataa(!\RAM|mem[76][0]~q ), + .datab(!\RAM|mem[108][0]~q ), + .datac(!\RAM|mem[92][0]~q ), + .datad(!\ALU|Mux27~1_combout ), + .datae(!\RAM|mem[124][0]~q ), + .dataf(!\ALU|Mux26~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[0]~16_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[0]~16 .extended_lut = "off"; +defparam \rd[0]~16 .lut_mask = 64'h0033FF330F550F55; +defparam \rd[0]~16 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X50_Y9_N12 +cyclonev_lcell_comb \rd[0]~20 ( +// Equation(s): +// \rd[0]~20_combout = ( \rd[0]~16_combout & ( \ALU|Mux31~3_combout & ( (\rd[0]~18_combout ) # (\ALU|Mux30~1_combout ) ) ) ) # ( !\rd[0]~16_combout & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & \rd[0]~18_combout ) ) ) ) # ( \rd[0]~16_combout & +// ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & (\rd[0]~19_combout )) # (\ALU|Mux30~1_combout & ((\rd[0]~17_combout ))) ) ) ) # ( !\rd[0]~16_combout & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & (\rd[0]~19_combout )) # +// (\ALU|Mux30~1_combout & ((\rd[0]~17_combout ))) ) ) ) + + .dataa(!\ALU|Mux30~1_combout ), + .datab(!\rd[0]~19_combout ), + .datac(!\rd[0]~17_combout ), + .datad(!\rd[0]~18_combout ), + .datae(!\rd[0]~16_combout ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[0]~20_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[0]~20 .extended_lut = "off"; +defparam \rd[0]~20 .lut_mask = 64'h2727272700AA55FF; +defparam \rd[0]~20 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X55_Y9_N36 +cyclonev_lcell_comb \RAM|mem[112][1]~13 ( +// Equation(s): +// \RAM|mem[112][1]~13_combout = ( \RAM|Decoder0~12_combout & ( \RAM|Decoder0~3_combout & ( ((!\ALU|Mux26~1_combout & (\ALU|Mux24~1_combout & !\ALU|Mux25~1_combout ))) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~12_combout & ( \RAM|Decoder0~3_combout +// & ( \rst[0]~input_o ) ) ) # ( \RAM|Decoder0~12_combout & ( !\RAM|Decoder0~3_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~12_combout & ( !\RAM|Decoder0~3_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\ALU|Mux26~1_combout ), + .datab(!\rst[0]~input_o ), + .datac(!\ALU|Mux24~1_combout ), + .datad(!\ALU|Mux25~1_combout ), + .datae(!\RAM|Decoder0~12_combout ), + .dataf(!\RAM|Decoder0~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[112][1]~13_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[112][1]~13 .extended_lut = "off"; +defparam \RAM|mem[112][1]~13 .lut_mask = 64'h3333333333333B33; +defparam \RAM|mem[112][1]~13 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X55_Y9_N38 +dffeas \RAM|mem[112][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[112][1]~13_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[112][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[112][0] .is_wysiwyg = "true"; +defparam \RAM|mem[112][0] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X47_Y5_N33 +cyclonev_lcell_comb \RAM|mem[114][0]~feeder ( +// Equation(s): +// \RAM|mem[114][0]~feeder_combout = ( \RAM|mem~0_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[114][0]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[114][0]~feeder .extended_lut = "off"; +defparam \RAM|mem[114][0]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[114][0]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X50_Y9_N36 +cyclonev_lcell_comb \RAM|mem[114][0]~15 ( +// Equation(s): +// \RAM|mem[114][0]~15_combout = ( \RAM|Decoder0~13_combout & ( \RAM|Decoder0~3_combout & ( ((!\ALU|Mux26~1_combout & (\ALU|Mux24~1_combout & !\ALU|Mux25~1_combout ))) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~13_combout & ( \RAM|Decoder0~3_combout +// & ( \rst[0]~input_o ) ) ) # ( \RAM|Decoder0~13_combout & ( !\RAM|Decoder0~3_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~13_combout & ( !\RAM|Decoder0~3_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\ALU|Mux26~1_combout ), + .datab(!\rst[0]~input_o ), + .datac(!\ALU|Mux24~1_combout ), + .datad(!\ALU|Mux25~1_combout ), + .datae(!\RAM|Decoder0~13_combout ), + .dataf(!\RAM|Decoder0~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[114][0]~15_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[114][0]~15 .extended_lut = "off"; +defparam \RAM|mem[114][0]~15 .lut_mask = 64'h3333333333333B33; +defparam \RAM|mem[114][0]~15 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X47_Y5_N34 +dffeas \RAM|mem[114][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[114][0]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[114][0]~15_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[114][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[114][0] .is_wysiwyg = "true"; +defparam \RAM|mem[114][0] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X47_Y5_N45 +cyclonev_lcell_comb \RAM|mem[113][0]~feeder ( +// Equation(s): +// \RAM|mem[113][0]~feeder_combout = ( \RAM|mem~0_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[113][0]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[113][0]~feeder .extended_lut = "off"; +defparam \RAM|mem[113][0]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[113][0]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X47_Y5_N36 +cyclonev_lcell_comb \RAM|mem[113][0]~14 ( +// Equation(s): +// \RAM|mem[113][0]~14_combout = ( \RAM|Decoder0~4_combout & ( \ALU|Mux28~1_combout & ( ((\ALU|Mux30~1_combout & (\RAM|Decoder0~9_combout & !\ALU|Mux27~1_combout ))) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~4_combout & ( \ALU|Mux28~1_combout & ( +// \rst[0]~input_o ) ) ) # ( \RAM|Decoder0~4_combout & ( !\ALU|Mux28~1_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~4_combout & ( !\ALU|Mux28~1_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\rst[0]~input_o ), + .datab(!\ALU|Mux30~1_combout ), + .datac(!\RAM|Decoder0~9_combout ), + .datad(!\ALU|Mux27~1_combout ), + .datae(!\RAM|Decoder0~4_combout ), + .dataf(!\ALU|Mux28~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[113][0]~14_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[113][0]~14 .extended_lut = "off"; +defparam \RAM|mem[113][0]~14 .lut_mask = 64'h5555555555555755; +defparam \RAM|mem[113][0]~14 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X47_Y5_N46 +dffeas \RAM|mem[113][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[113][0]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[113][0]~14_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[113][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[113][0] .is_wysiwyg = "true"; +defparam \RAM|mem[113][0] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X47_Y10_N24 +cyclonev_lcell_comb \RAM|mem[115][2]~16 ( +// Equation(s): +// \RAM|mem[115][2]~16_combout = ( \RAM|Decoder0~9_combout & ( \RAM|Decoder0~4_combout & ( ((\ALU|Mux28~1_combout & \RAM|Decoder0~8_combout )) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~9_combout & ( \RAM|Decoder0~4_combout & ( \rst[0]~input_o ) ) +// ) # ( \RAM|Decoder0~9_combout & ( !\RAM|Decoder0~4_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~9_combout & ( !\RAM|Decoder0~4_combout & ( \rst[0]~input_o ) ) ) + + .dataa(gnd), + .datab(!\ALU|Mux28~1_combout ), + .datac(!\RAM|Decoder0~8_combout ), + .datad(!\rst[0]~input_o ), + .datae(!\RAM|Decoder0~9_combout ), + .dataf(!\RAM|Decoder0~4_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[115][2]~16_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[115][2]~16 .extended_lut = "off"; +defparam \RAM|mem[115][2]~16 .lut_mask = 64'h00FF00FF00FF03FF; +defparam \RAM|mem[115][2]~16 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X47_Y10_N56 +dffeas \RAM|mem[115][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[115][2]~16_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[115][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[115][0] .is_wysiwyg = "true"; +defparam \RAM|mem[115][0] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X47_Y10_N54 +cyclonev_lcell_comb \rd[0]~4 ( +// Equation(s): +// \rd[0]~4_combout = ( \RAM|mem[115][0]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & ((\RAM|mem[114][0]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[112][0]~q )) ) ) ) # ( !\RAM|mem[115][0]~q & ( \ALU|Mux31~3_combout & ( +// (!\ALU|Mux30~1_combout & ((\RAM|mem[114][0]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[112][0]~q )) ) ) ) # ( \RAM|mem[115][0]~q & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout ) # (\RAM|mem[113][0]~q ) ) ) ) # ( !\RAM|mem[115][0]~q & ( +// !\ALU|Mux31~3_combout & ( (\ALU|Mux30~1_combout & \RAM|mem[113][0]~q ) ) ) ) + + .dataa(!\RAM|mem[112][0]~q ), + .datab(!\RAM|mem[114][0]~q ), + .datac(!\ALU|Mux30~1_combout ), + .datad(!\RAM|mem[113][0]~q ), + .datae(!\RAM|mem[115][0]~q ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[0]~4_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[0]~4 .extended_lut = "off"; +defparam \rd[0]~4 .lut_mask = 64'h000FF0FF35353535; +defparam \rd[0]~4 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X51_Y9_N42 +cyclonev_lcell_comb \RAM|mem[67][3]~4 ( +// Equation(s): +// \RAM|mem[67][3]~4_combout = ( \RAM|Decoder0~0_combout & ( \RAM|Decoder0~4_combout & ( ((\RAM|Decoder0~6_combout & (\ALU|Mux28~1_combout & \ALU|Mux24~1_combout ))) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~0_combout & ( \RAM|Decoder0~4_combout & +// ( \rst[0]~input_o ) ) ) # ( \RAM|Decoder0~0_combout & ( !\RAM|Decoder0~4_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~0_combout & ( !\RAM|Decoder0~4_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\RAM|Decoder0~6_combout ), + .datab(!\ALU|Mux28~1_combout ), + .datac(!\ALU|Mux24~1_combout ), + .datad(!\rst[0]~input_o ), + .datae(!\RAM|Decoder0~0_combout ), + .dataf(!\RAM|Decoder0~4_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[67][3]~4_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[67][3]~4 .extended_lut = "off"; +defparam \RAM|mem[67][3]~4 .lut_mask = 64'h00FF00FF00FF01FF; +defparam \RAM|mem[67][3]~4 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X51_Y9_N47 +dffeas \RAM|mem[67][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[67][3]~4_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[67][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[67][0] .is_wysiwyg = "true"; +defparam \RAM|mem[67][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X54_Y8_N24 +cyclonev_lcell_comb \RAM|mem[66][2]~3 ( +// Equation(s): +// \RAM|mem[66][2]~3_combout = ( \RAM|Decoder0~0_combout & ( \RAM|Decoder0~3_combout & ( ((\RAM|Decoder0~6_combout & (\ALU|Mux24~1_combout & \ALU|Mux28~1_combout ))) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~0_combout & ( \RAM|Decoder0~3_combout & +// ( \rst[0]~input_o ) ) ) # ( \RAM|Decoder0~0_combout & ( !\RAM|Decoder0~3_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~0_combout & ( !\RAM|Decoder0~3_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\rst[0]~input_o ), + .datab(!\RAM|Decoder0~6_combout ), + .datac(!\ALU|Mux24~1_combout ), + .datad(!\ALU|Mux28~1_combout ), + .datae(!\RAM|Decoder0~0_combout ), + .dataf(!\RAM|Decoder0~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[66][2]~3_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[66][2]~3 .extended_lut = "off"; +defparam \RAM|mem[66][2]~3 .lut_mask = 64'h5555555555555557; +defparam \RAM|mem[66][2]~3 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X54_Y8_N31 +dffeas \RAM|mem[66][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[66][2]~3_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[66][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[66][0] .is_wysiwyg = "true"; +defparam \RAM|mem[66][0] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X55_Y9_N51 +cyclonev_lcell_comb \RAM|mem[64][1]~1 ( +// Equation(s): +// \RAM|mem[64][1]~1_combout = ( \pc_we[0]~0_combout & ( \RAM|Decoder0~3_combout & ( ((\RAM|Decoder0~0_combout & \ALU|Mux24~1_combout )) # (\rst[0]~input_o ) ) ) ) # ( !\pc_we[0]~0_combout & ( \RAM|Decoder0~3_combout & ( \rst[0]~input_o ) ) ) # ( +// \pc_we[0]~0_combout & ( !\RAM|Decoder0~3_combout & ( \rst[0]~input_o ) ) ) # ( !\pc_we[0]~0_combout & ( !\RAM|Decoder0~3_combout & ( \rst[0]~input_o ) ) ) + + .dataa(gnd), + .datab(!\rst[0]~input_o ), + .datac(!\RAM|Decoder0~0_combout ), + .datad(!\ALU|Mux24~1_combout ), + .datae(!\pc_we[0]~0_combout ), + .dataf(!\RAM|Decoder0~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[64][1]~1_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[64][1]~1 .extended_lut = "off"; +defparam \RAM|mem[64][1]~1 .lut_mask = 64'h333333333333333F; +defparam \RAM|mem[64][1]~1 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X55_Y9_N52 +dffeas \RAM|mem[64][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[64][1]~1_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[64][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[64][0] .is_wysiwyg = "true"; +defparam \RAM|mem[64][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X51_Y9_N30 +cyclonev_lcell_comb \RAM|mem[65][3]~2 ( +// Equation(s): +// \RAM|mem[65][3]~2_combout = ( \RAM|Decoder0~5_combout & ( \RAM|Decoder0~4_combout & ( ((\ALU|Mux30~1_combout & (\ALU|Mux27~1_combout & \ALU|Mux28~1_combout ))) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~5_combout & ( \RAM|Decoder0~4_combout & ( +// \rst[0]~input_o ) ) ) # ( \RAM|Decoder0~5_combout & ( !\RAM|Decoder0~4_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~5_combout & ( !\RAM|Decoder0~4_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\ALU|Mux30~1_combout ), + .datab(!\rst[0]~input_o ), + .datac(!\ALU|Mux27~1_combout ), + .datad(!\ALU|Mux28~1_combout ), + .datae(!\RAM|Decoder0~5_combout ), + .dataf(!\RAM|Decoder0~4_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[65][3]~2_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[65][3]~2 .extended_lut = "off"; +defparam \RAM|mem[65][3]~2 .lut_mask = 64'h3333333333333337; +defparam \RAM|mem[65][3]~2 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X47_Y10_N20 +dffeas \RAM|mem[65][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[65][3]~2_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[65][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[65][0] .is_wysiwyg = "true"; +defparam \RAM|mem[65][0] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X47_Y10_N18 +cyclonev_lcell_comb \rd[0]~1 ( +// Equation(s): +// \rd[0]~1_combout = ( \RAM|mem[65][0]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & (\RAM|mem[66][0]~q )) # (\ALU|Mux30~1_combout & ((\RAM|mem[64][0]~q ))) ) ) ) # ( !\RAM|mem[65][0]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & +// (\RAM|mem[66][0]~q )) # (\ALU|Mux30~1_combout & ((\RAM|mem[64][0]~q ))) ) ) ) # ( \RAM|mem[65][0]~q & ( !\ALU|Mux31~3_combout & ( (\RAM|mem[67][0]~q ) # (\ALU|Mux30~1_combout ) ) ) ) # ( !\RAM|mem[65][0]~q & ( !\ALU|Mux31~3_combout & ( +// (!\ALU|Mux30~1_combout & \RAM|mem[67][0]~q ) ) ) ) + + .dataa(!\ALU|Mux30~1_combout ), + .datab(!\RAM|mem[67][0]~q ), + .datac(!\RAM|mem[66][0]~q ), + .datad(!\RAM|mem[64][0]~q ), + .datae(!\RAM|mem[65][0]~q ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[0]~1_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[0]~1 .extended_lut = "off"; +defparam \rd[0]~1 .lut_mask = 64'h222277770A5F0A5F; +defparam \rd[0]~1 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X47_Y7_N54 +cyclonev_lcell_comb \RAM|mem[98][3]~11 ( +// Equation(s): +// \RAM|mem[98][3]~11_combout = ( \ALU|Mux25~1_combout & ( \RAM|Decoder0~3_combout & ( \rst[0]~input_o ) ) ) # ( !\ALU|Mux25~1_combout & ( \RAM|Decoder0~3_combout & ( ((\ALU|Mux24~1_combout & (!\ALU|Mux26~1_combout & \RAM|Decoder0~10_combout ))) # +// (\rst[0]~input_o ) ) ) ) # ( \ALU|Mux25~1_combout & ( !\RAM|Decoder0~3_combout & ( \rst[0]~input_o ) ) ) # ( !\ALU|Mux25~1_combout & ( !\RAM|Decoder0~3_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\ALU|Mux24~1_combout ), + .datab(!\ALU|Mux26~1_combout ), + .datac(!\RAM|Decoder0~10_combout ), + .datad(!\rst[0]~input_o ), + .datae(!\ALU|Mux25~1_combout ), + .dataf(!\RAM|Decoder0~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[98][3]~11_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[98][3]~11 .extended_lut = "off"; +defparam \RAM|mem[98][3]~11 .lut_mask = 64'h00FF00FF04FF00FF; +defparam \RAM|mem[98][3]~11 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X47_Y7_N19 +dffeas \RAM|mem[98][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[98][3]~11_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[98][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[98][0] .is_wysiwyg = "true"; +defparam \RAM|mem[98][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X54_Y13_N27 +cyclonev_lcell_comb \RAM|mem[96][1]~9 ( +// Equation(s): +// \RAM|mem[96][1]~9_combout = ( \pc_we[0]~0_combout & ( \RAM|Decoder0~3_combout & ( ((\ALU|Mux24~1_combout & (!\ALU|Mux26~1_combout & !\ALU|Mux25~1_combout ))) # (\rst[0]~input_o ) ) ) ) # ( !\pc_we[0]~0_combout & ( \RAM|Decoder0~3_combout & ( +// \rst[0]~input_o ) ) ) # ( \pc_we[0]~0_combout & ( !\RAM|Decoder0~3_combout & ( \rst[0]~input_o ) ) ) # ( !\pc_we[0]~0_combout & ( !\RAM|Decoder0~3_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\ALU|Mux24~1_combout ), + .datab(!\rst[0]~input_o ), + .datac(!\ALU|Mux26~1_combout ), + .datad(!\ALU|Mux25~1_combout ), + .datae(!\pc_we[0]~0_combout ), + .dataf(!\RAM|Decoder0~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[96][1]~9_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[96][1]~9 .extended_lut = "off"; +defparam \RAM|mem[96][1]~9 .lut_mask = 64'h3333333333337333; +defparam \RAM|mem[96][1]~9 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X54_Y13_N28 +dffeas \RAM|mem[96][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[96][1]~9_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[96][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[96][0] .is_wysiwyg = "true"; +defparam \RAM|mem[96][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X49_Y13_N42 +cyclonev_lcell_comb \RAM|mem[97][4]~10 ( +// Equation(s): +// \RAM|mem[97][4]~10_combout = ( \ALU|Mux30~1_combout & ( \RAM|Decoder0~4_combout & ( ((\ALU|Mux28~1_combout & (\RAM|Decoder0~9_combout & \ALU|Mux27~1_combout ))) # (\rst[0]~input_o ) ) ) ) # ( !\ALU|Mux30~1_combout & ( \RAM|Decoder0~4_combout & ( +// \rst[0]~input_o ) ) ) # ( \ALU|Mux30~1_combout & ( !\RAM|Decoder0~4_combout & ( \rst[0]~input_o ) ) ) # ( !\ALU|Mux30~1_combout & ( !\RAM|Decoder0~4_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\ALU|Mux28~1_combout ), + .datab(!\rst[0]~input_o ), + .datac(!\RAM|Decoder0~9_combout ), + .datad(!\ALU|Mux27~1_combout ), + .datae(!\ALU|Mux30~1_combout ), + .dataf(!\RAM|Decoder0~4_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[97][4]~10_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[97][4]~10 .extended_lut = "off"; +defparam \RAM|mem[97][4]~10 .lut_mask = 64'h3333333333333337; +defparam \RAM|mem[97][4]~10 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X50_Y13_N1 +dffeas \RAM|mem[97][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[97][4]~10_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[97][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[97][0] .is_wysiwyg = "true"; +defparam \RAM|mem[97][0] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X47_Y10_N45 +cyclonev_lcell_comb \RAM|mem[99][0]~12 ( +// Equation(s): +// \RAM|mem[99][0]~12_combout = ( \RAM|Decoder0~6_combout & ( \RAM|Decoder0~4_combout & ( ((\ALU|Mux24~1_combout & (\ALU|Mux28~1_combout & \RAM|Decoder0~11_combout ))) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~6_combout & ( \RAM|Decoder0~4_combout +// & ( \rst[0]~input_o ) ) ) # ( \RAM|Decoder0~6_combout & ( !\RAM|Decoder0~4_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~6_combout & ( !\RAM|Decoder0~4_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\rst[0]~input_o ), + .datab(!\ALU|Mux24~1_combout ), + .datac(!\ALU|Mux28~1_combout ), + .datad(!\RAM|Decoder0~11_combout ), + .datae(!\RAM|Decoder0~6_combout ), + .dataf(!\RAM|Decoder0~4_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[99][0]~12_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[99][0]~12 .extended_lut = "off"; +defparam \RAM|mem[99][0]~12 .lut_mask = 64'h5555555555555557; +defparam \RAM|mem[99][0]~12 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X47_Y10_N38 +dffeas \RAM|mem[99][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[99][0]~12_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[99][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[99][0] .is_wysiwyg = "true"; +defparam \RAM|mem[99][0] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X47_Y10_N36 +cyclonev_lcell_comb \rd[0]~3 ( +// Equation(s): +// \rd[0]~3_combout = ( \RAM|mem[99][0]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & (\RAM|mem[98][0]~q )) # (\ALU|Mux30~1_combout & ((\RAM|mem[96][0]~q ))) ) ) ) # ( !\RAM|mem[99][0]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & +// (\RAM|mem[98][0]~q )) # (\ALU|Mux30~1_combout & ((\RAM|mem[96][0]~q ))) ) ) ) # ( \RAM|mem[99][0]~q & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout ) # (\RAM|mem[97][0]~q ) ) ) ) # ( !\RAM|mem[99][0]~q & ( !\ALU|Mux31~3_combout & ( +// (\ALU|Mux30~1_combout & \RAM|mem[97][0]~q ) ) ) ) + + .dataa(!\RAM|mem[98][0]~q ), + .datab(!\RAM|mem[96][0]~q ), + .datac(!\ALU|Mux30~1_combout ), + .datad(!\RAM|mem[97][0]~q ), + .datae(!\RAM|mem[99][0]~q ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[0]~3_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[0]~3 .extended_lut = "off"; +defparam \rd[0]~3 .lut_mask = 64'h000FF0FF53535353; +defparam \rd[0]~3 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X55_Y9_N30 +cyclonev_lcell_comb \RAM|mem[80][0]~5 ( +// Equation(s): +// \RAM|mem[80][0]~5_combout = ( \RAM|Decoder0~0_combout & ( \RAM|Decoder0~3_combout & ( ((\ALU|Mux28~1_combout & (\ALU|Mux24~1_combout & \RAM|Decoder0~7_combout ))) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~0_combout & ( \RAM|Decoder0~3_combout & +// ( \rst[0]~input_o ) ) ) # ( \RAM|Decoder0~0_combout & ( !\RAM|Decoder0~3_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~0_combout & ( !\RAM|Decoder0~3_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\ALU|Mux28~1_combout ), + .datab(!\rst[0]~input_o ), + .datac(!\ALU|Mux24~1_combout ), + .datad(!\RAM|Decoder0~7_combout ), + .datae(!\RAM|Decoder0~0_combout ), + .dataf(!\RAM|Decoder0~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[80][0]~5_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[80][0]~5 .extended_lut = "off"; +defparam \RAM|mem[80][0]~5 .lut_mask = 64'h3333333333333337; +defparam \RAM|mem[80][0]~5 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X55_Y9_N34 +dffeas \RAM|mem[80][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[80][0]~5_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[80][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[80][0] .is_wysiwyg = "true"; +defparam \RAM|mem[80][0] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X47_Y7_N36 +cyclonev_lcell_comb \RAM|mem[82][1]~7 ( +// Equation(s): +// \RAM|mem[82][1]~7_combout = ( \RAM|Decoder0~0_combout & ( \RAM|Decoder0~3_combout & ( ((\ALU|Mux28~1_combout & (\ALU|Mux24~1_combout & \RAM|Decoder0~8_combout ))) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~0_combout & ( \RAM|Decoder0~3_combout & +// ( \rst[0]~input_o ) ) ) # ( \RAM|Decoder0~0_combout & ( !\RAM|Decoder0~3_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~0_combout & ( !\RAM|Decoder0~3_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\ALU|Mux28~1_combout ), + .datab(!\rst[0]~input_o ), + .datac(!\ALU|Mux24~1_combout ), + .datad(!\RAM|Decoder0~8_combout ), + .datae(!\RAM|Decoder0~0_combout ), + .dataf(!\RAM|Decoder0~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[82][1]~7_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[82][1]~7 .extended_lut = "off"; +defparam \RAM|mem[82][1]~7 .lut_mask = 64'h3333333333333337; +defparam \RAM|mem[82][1]~7 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X47_Y7_N41 +dffeas \RAM|mem[82][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[82][1]~7_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[82][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[82][0] .is_wysiwyg = "true"; +defparam \RAM|mem[82][0] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X47_Y13_N48 +cyclonev_lcell_comb \RAM|mem[81][0]~6 ( +// Equation(s): +// \RAM|mem[81][0]~6_combout = ( \RAM|Decoder0~5_combout & ( \RAM|Decoder0~4_combout & ( ((\ALU|Mux30~1_combout & (!\ALU|Mux27~1_combout & \ALU|Mux28~1_combout ))) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~5_combout & ( \RAM|Decoder0~4_combout & ( +// \rst[0]~input_o ) ) ) # ( \RAM|Decoder0~5_combout & ( !\RAM|Decoder0~4_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~5_combout & ( !\RAM|Decoder0~4_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\ALU|Mux30~1_combout ), + .datab(!\ALU|Mux27~1_combout ), + .datac(!\rst[0]~input_o ), + .datad(!\ALU|Mux28~1_combout ), + .datae(!\RAM|Decoder0~5_combout ), + .dataf(!\RAM|Decoder0~4_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[81][0]~6_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[81][0]~6 .extended_lut = "off"; +defparam \RAM|mem[81][0]~6 .lut_mask = 64'h0F0F0F0F0F0F0F4F; +defparam \RAM|mem[81][0]~6 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X47_Y13_N52 +dffeas \RAM|mem[81][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[81][0]~6_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[81][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[81][0] .is_wysiwyg = "true"; +defparam \RAM|mem[81][0] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X47_Y7_N24 +cyclonev_lcell_comb \RAM|mem[83][0]~8 ( +// Equation(s): +// \RAM|mem[83][0]~8_combout = ( \RAM|Decoder0~4_combout & ( ((\ALU|Mux28~1_combout & (\RAM|Decoder0~5_combout & \RAM|Decoder0~8_combout ))) # (\rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~4_combout & ( \rst[0]~input_o ) ) + + .dataa(!\ALU|Mux28~1_combout ), + .datab(!\rst[0]~input_o ), + .datac(!\RAM|Decoder0~5_combout ), + .datad(!\RAM|Decoder0~8_combout ), + .datae(gnd), + .dataf(!\RAM|Decoder0~4_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[83][0]~8_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[83][0]~8 .extended_lut = "off"; +defparam \RAM|mem[83][0]~8 .lut_mask = 64'h3333333333373337; +defparam \RAM|mem[83][0]~8 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X47_Y7_N14 +dffeas \RAM|mem[83][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[83][0]~8_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[83][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[83][0] .is_wysiwyg = "true"; +defparam \RAM|mem[83][0] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X47_Y7_N12 +cyclonev_lcell_comb \rd[0]~2 ( +// Equation(s): +// \rd[0]~2_combout = ( \RAM|mem[83][0]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & ((\RAM|mem[82][0]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[80][0]~q )) ) ) ) # ( !\RAM|mem[83][0]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & +// ((\RAM|mem[82][0]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[80][0]~q )) ) ) ) # ( \RAM|mem[83][0]~q & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout ) # (\RAM|mem[81][0]~q ) ) ) ) # ( !\RAM|mem[83][0]~q & ( !\ALU|Mux31~3_combout & ( +// (\ALU|Mux30~1_combout & \RAM|mem[81][0]~q ) ) ) ) + + .dataa(!\RAM|mem[80][0]~q ), + .datab(!\RAM|mem[82][0]~q ), + .datac(!\ALU|Mux30~1_combout ), + .datad(!\RAM|mem[81][0]~q ), + .datae(!\RAM|mem[83][0]~q ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[0]~2_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[0]~2 .extended_lut = "off"; +defparam \rd[0]~2 .lut_mask = 64'h000FF0FF35353535; +defparam \rd[0]~2 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X47_Y10_N0 +cyclonev_lcell_comb \rd[0]~5 ( +// Equation(s): +// \rd[0]~5_combout = ( \rd[0]~3_combout & ( \rd[0]~2_combout & ( (!\ALU|Mux27~1_combout & (((\ALU|Mux26~1_combout )) # (\rd[0]~4_combout ))) # (\ALU|Mux27~1_combout & (((!\ALU|Mux26~1_combout ) # (\rd[0]~1_combout )))) ) ) ) # ( !\rd[0]~3_combout & ( +// \rd[0]~2_combout & ( (!\ALU|Mux27~1_combout & (((\ALU|Mux26~1_combout )) # (\rd[0]~4_combout ))) # (\ALU|Mux27~1_combout & (((\rd[0]~1_combout & \ALU|Mux26~1_combout )))) ) ) ) # ( \rd[0]~3_combout & ( !\rd[0]~2_combout & ( (!\ALU|Mux27~1_combout & +// (\rd[0]~4_combout & ((!\ALU|Mux26~1_combout )))) # (\ALU|Mux27~1_combout & (((!\ALU|Mux26~1_combout ) # (\rd[0]~1_combout )))) ) ) ) # ( !\rd[0]~3_combout & ( !\rd[0]~2_combout & ( (!\ALU|Mux27~1_combout & (\rd[0]~4_combout & ((!\ALU|Mux26~1_combout +// )))) # (\ALU|Mux27~1_combout & (((\rd[0]~1_combout & \ALU|Mux26~1_combout )))) ) ) ) + + .dataa(!\rd[0]~4_combout ), + .datab(!\ALU|Mux27~1_combout ), + .datac(!\rd[0]~1_combout ), + .datad(!\ALU|Mux26~1_combout ), + .datae(!\rd[0]~3_combout ), + .dataf(!\rd[0]~2_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[0]~5_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[0]~5 .extended_lut = "off"; +defparam \rd[0]~5 .lut_mask = 64'h4403770344CF77CF; +defparam \rd[0]~5 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X48_Y12_N57 +cyclonev_lcell_comb \RAM|mem[101][1]~26 ( +// Equation(s): +// \RAM|mem[101][1]~26_combout = ( \rst[0]~input_o & ( \RAM|Decoder0~16_combout ) ) # ( !\rst[0]~input_o & ( \RAM|Decoder0~16_combout & ( (\ALU|Mux30~1_combout & (\RAM|Decoder0~9_combout & \ALU|Mux27~1_combout )) ) ) ) # ( \rst[0]~input_o & ( +// !\RAM|Decoder0~16_combout ) ) + + .dataa(gnd), + .datab(!\ALU|Mux30~1_combout ), + .datac(!\RAM|Decoder0~9_combout ), + .datad(!\ALU|Mux27~1_combout ), + .datae(!\rst[0]~input_o ), + .dataf(!\RAM|Decoder0~16_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[101][1]~26_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[101][1]~26 .extended_lut = "off"; +defparam \RAM|mem[101][1]~26 .lut_mask = 64'h0000FFFF0003FFFF; +defparam \RAM|mem[101][1]~26 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X47_Y6_N16 +dffeas \RAM|mem[101][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[101][1]~26_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[101][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[101][0] .is_wysiwyg = "true"; +defparam \RAM|mem[101][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X54_Y13_N42 +cyclonev_lcell_comb \RAM|mem[102][1]~27 ( +// Equation(s): +// \RAM|mem[102][1]~27_combout = ( \RAM|Decoder0~15_combout & ( ((\RAM|Decoder0~6_combout & (\ALU|Mux24~1_combout & \RAM|Decoder0~11_combout ))) # (\rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~15_combout & ( \rst[0]~input_o ) ) + + .dataa(!\RAM|Decoder0~6_combout ), + .datab(!\rst[0]~input_o ), + .datac(!\ALU|Mux24~1_combout ), + .datad(!\RAM|Decoder0~11_combout ), + .datae(gnd), + .dataf(!\RAM|Decoder0~15_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[102][1]~27_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[102][1]~27 .extended_lut = "off"; +defparam \RAM|mem[102][1]~27 .lut_mask = 64'h3333333333373337; +defparam \RAM|mem[102][1]~27 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X54_Y13_N46 +dffeas \RAM|mem[102][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[102][1]~27_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[102][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[102][0] .is_wysiwyg = "true"; +defparam \RAM|mem[102][0] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X47_Y6_N3 +cyclonev_lcell_comb \RAM|mem[100][0]~25 ( +// Equation(s): +// \RAM|mem[100][0]~25_combout = ( \ALU|Mux30~1_combout & ( \RAM|Decoder0~15_combout & ( ((\ALU|Mux27~1_combout & (\ALU|Mux24~1_combout & \RAM|Decoder0~11_combout ))) # (\rst[0]~input_o ) ) ) ) # ( !\ALU|Mux30~1_combout & ( \RAM|Decoder0~15_combout & +// ( \rst[0]~input_o ) ) ) # ( \ALU|Mux30~1_combout & ( !\RAM|Decoder0~15_combout & ( \rst[0]~input_o ) ) ) # ( !\ALU|Mux30~1_combout & ( !\RAM|Decoder0~15_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\rst[0]~input_o ), + .datab(!\ALU|Mux27~1_combout ), + .datac(!\ALU|Mux24~1_combout ), + .datad(!\RAM|Decoder0~11_combout ), + .datae(!\ALU|Mux30~1_combout ), + .dataf(!\RAM|Decoder0~15_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[100][0]~25_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[100][0]~25 .extended_lut = "off"; +defparam \RAM|mem[100][0]~25 .lut_mask = 64'h5555555555555557; +defparam \RAM|mem[100][0]~25 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X47_Y6_N22 +dffeas \RAM|mem[100][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[100][0]~25_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[100][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[100][0] .is_wysiwyg = "true"; +defparam \RAM|mem[100][0] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y7_N9 +cyclonev_lcell_comb \RAM|mem[103][1]~28 ( +// Equation(s): +// \RAM|mem[103][1]~28_combout = ( \RAM|Decoder0~9_combout & ( ((\RAM|Decoder0~6_combout & \RAM|Decoder0~16_combout )) # (\rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~9_combout & ( \rst[0]~input_o ) ) + + .dataa(gnd), + .datab(!\rst[0]~input_o ), + .datac(!\RAM|Decoder0~6_combout ), + .datad(!\RAM|Decoder0~16_combout ), + .datae(gnd), + .dataf(!\RAM|Decoder0~9_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[103][1]~28_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[103][1]~28 .extended_lut = "off"; +defparam \RAM|mem[103][1]~28 .lut_mask = 64'h33333333333F333F; +defparam \RAM|mem[103][1]~28 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X42_Y7_N26 +dffeas \RAM|mem[103][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[103][1]~28_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[103][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[103][0] .is_wysiwyg = "true"; +defparam \RAM|mem[103][0] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y7_N24 +cyclonev_lcell_comb \rd[0]~8 ( +// Equation(s): +// \rd[0]~8_combout = ( \RAM|mem[103][0]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & (\RAM|mem[102][0]~q )) # (\ALU|Mux30~1_combout & ((\RAM|mem[100][0]~q ))) ) ) ) # ( !\RAM|mem[103][0]~q & ( \ALU|Mux31~3_combout & ( +// (!\ALU|Mux30~1_combout & (\RAM|mem[102][0]~q )) # (\ALU|Mux30~1_combout & ((\RAM|mem[100][0]~q ))) ) ) ) # ( \RAM|mem[103][0]~q & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout ) # (\RAM|mem[101][0]~q ) ) ) ) # ( !\RAM|mem[103][0]~q & ( +// !\ALU|Mux31~3_combout & ( (\RAM|mem[101][0]~q & \ALU|Mux30~1_combout ) ) ) ) + + .dataa(!\RAM|mem[101][0]~q ), + .datab(!\RAM|mem[102][0]~q ), + .datac(!\RAM|mem[100][0]~q ), + .datad(!\ALU|Mux30~1_combout ), + .datae(!\RAM|mem[103][0]~q ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[0]~8_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[0]~8 .extended_lut = "off"; +defparam \rd[0]~8 .lut_mask = 64'h0055FF55330F330F; +defparam \rd[0]~8 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X51_Y7_N0 +cyclonev_lcell_comb \RAM|mem[70][4]~19 ( +// Equation(s): +// \RAM|mem[70][4]~19_combout = ( \RAM|Decoder0~0_combout & ( \RAM|Decoder0~15_combout & ( ((\ALU|Mux24~1_combout & \RAM|Decoder0~6_combout )) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~0_combout & ( \RAM|Decoder0~15_combout & ( \rst[0]~input_o ) ) +// ) # ( \RAM|Decoder0~0_combout & ( !\RAM|Decoder0~15_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~0_combout & ( !\RAM|Decoder0~15_combout & ( \rst[0]~input_o ) ) ) + + .dataa(gnd), + .datab(!\rst[0]~input_o ), + .datac(!\ALU|Mux24~1_combout ), + .datad(!\RAM|Decoder0~6_combout ), + .datae(!\RAM|Decoder0~0_combout ), + .dataf(!\RAM|Decoder0~15_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[70][4]~19_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[70][4]~19 .extended_lut = "off"; +defparam \RAM|mem[70][4]~19 .lut_mask = 64'h333333333333333F; +defparam \RAM|mem[70][4]~19 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X51_Y7_N49 +dffeas \RAM|mem[70][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[70][4]~19_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[70][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[70][0] .is_wysiwyg = "true"; +defparam \RAM|mem[70][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X49_Y11_N27 +cyclonev_lcell_comb \RAM|mem[69][1]~18 ( +// Equation(s): +// \RAM|mem[69][1]~18_combout = ( \RAM|Decoder0~5_combout & ( \RAM|Decoder0~16_combout & ( ((\ALU|Mux27~1_combout & \ALU|Mux30~1_combout )) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~5_combout & ( \RAM|Decoder0~16_combout & ( \rst[0]~input_o ) ) ) +// # ( \RAM|Decoder0~5_combout & ( !\RAM|Decoder0~16_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~5_combout & ( !\RAM|Decoder0~16_combout & ( \rst[0]~input_o ) ) ) + + .dataa(gnd), + .datab(!\rst[0]~input_o ), + .datac(!\ALU|Mux27~1_combout ), + .datad(!\ALU|Mux30~1_combout ), + .datae(!\RAM|Decoder0~5_combout ), + .dataf(!\RAM|Decoder0~16_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[69][1]~18_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[69][1]~18 .extended_lut = "off"; +defparam \RAM|mem[69][1]~18 .lut_mask = 64'h333333333333333F; +defparam \RAM|mem[69][1]~18 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X55_Y8_N40 +dffeas \RAM|mem[69][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[69][1]~18_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[69][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[69][0] .is_wysiwyg = "true"; +defparam \RAM|mem[69][0] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X50_Y11_N15 +cyclonev_lcell_comb \RAM|mem[68][0]~feeder ( +// Equation(s): +// \RAM|mem[68][0]~feeder_combout = ( \RAM|mem~0_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[68][0]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[68][0]~feeder .extended_lut = "off"; +defparam \RAM|mem[68][0]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[68][0]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X50_Y11_N9 +cyclonev_lcell_comb \RAM|mem[68][0]~17 ( +// Equation(s): +// \RAM|mem[68][0]~17_combout = ( \ALU|Mux24~1_combout & ( \RAM|Decoder0~15_combout & ( ((\ALU|Mux27~1_combout & (\ALU|Mux30~1_combout & \RAM|Decoder0~0_combout ))) # (\rst[0]~input_o ) ) ) ) # ( !\ALU|Mux24~1_combout & ( \RAM|Decoder0~15_combout & ( +// \rst[0]~input_o ) ) ) # ( \ALU|Mux24~1_combout & ( !\RAM|Decoder0~15_combout & ( \rst[0]~input_o ) ) ) # ( !\ALU|Mux24~1_combout & ( !\RAM|Decoder0~15_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\rst[0]~input_o ), + .datab(!\ALU|Mux27~1_combout ), + .datac(!\ALU|Mux30~1_combout ), + .datad(!\RAM|Decoder0~0_combout ), + .datae(!\ALU|Mux24~1_combout ), + .dataf(!\RAM|Decoder0~15_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[68][0]~17_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[68][0]~17 .extended_lut = "off"; +defparam \RAM|mem[68][0]~17 .lut_mask = 64'h5555555555555557; +defparam \RAM|mem[68][0]~17 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X50_Y11_N16 +dffeas \RAM|mem[68][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[68][0]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[68][0]~17_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[68][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[68][0] .is_wysiwyg = "true"; +defparam \RAM|mem[68][0] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y7_N48 +cyclonev_lcell_comb \RAM|mem[71][3]~20 ( +// Equation(s): +// \RAM|mem[71][3]~20_combout = ( \RAM|Decoder0~16_combout & ( \RAM|Decoder0~6_combout & ( (\RAM|Decoder0~5_combout ) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~16_combout & ( \RAM|Decoder0~6_combout & ( \rst[0]~input_o ) ) ) # ( +// \RAM|Decoder0~16_combout & ( !\RAM|Decoder0~6_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~16_combout & ( !\RAM|Decoder0~6_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\rst[0]~input_o ), + .datab(gnd), + .datac(!\RAM|Decoder0~5_combout ), + .datad(gnd), + .datae(!\RAM|Decoder0~16_combout ), + .dataf(!\RAM|Decoder0~6_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[71][3]~20_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[71][3]~20 .extended_lut = "off"; +defparam \RAM|mem[71][3]~20 .lut_mask = 64'h5555555555555F5F; +defparam \RAM|mem[71][3]~20 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X42_Y7_N20 +dffeas \RAM|mem[71][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[71][3]~20_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[71][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[71][0] .is_wysiwyg = "true"; +defparam \RAM|mem[71][0] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y7_N18 +cyclonev_lcell_comb \rd[0]~6 ( +// Equation(s): +// \rd[0]~6_combout = ( \RAM|mem[71][0]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & (\RAM|mem[70][0]~q )) # (\ALU|Mux30~1_combout & ((\RAM|mem[68][0]~q ))) ) ) ) # ( !\RAM|mem[71][0]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & +// (\RAM|mem[70][0]~q )) # (\ALU|Mux30~1_combout & ((\RAM|mem[68][0]~q ))) ) ) ) # ( \RAM|mem[71][0]~q & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout ) # (\RAM|mem[69][0]~q ) ) ) ) # ( !\RAM|mem[71][0]~q & ( !\ALU|Mux31~3_combout & ( +// (\RAM|mem[69][0]~q & \ALU|Mux30~1_combout ) ) ) ) + + .dataa(!\RAM|mem[70][0]~q ), + .datab(!\RAM|mem[69][0]~q ), + .datac(!\ALU|Mux30~1_combout ), + .datad(!\RAM|mem[68][0]~q ), + .datae(!\RAM|mem[71][0]~q ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[0]~6_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[0]~6 .extended_lut = "off"; +defparam \rd[0]~6 .lut_mask = 64'h0303F3F3505F505F; +defparam \rd[0]~6 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X50_Y11_N30 +cyclonev_lcell_comb \RAM|mem[84][1]~21 ( +// Equation(s): +// \RAM|mem[84][1]~21_combout = ( \ALU|Mux24~1_combout & ( \RAM|Decoder0~15_combout & ( ((!\ALU|Mux27~1_combout & (\RAM|Decoder0~0_combout & \ALU|Mux30~1_combout ))) # (\rst[0]~input_o ) ) ) ) # ( !\ALU|Mux24~1_combout & ( \RAM|Decoder0~15_combout & ( +// \rst[0]~input_o ) ) ) # ( \ALU|Mux24~1_combout & ( !\RAM|Decoder0~15_combout & ( \rst[0]~input_o ) ) ) # ( !\ALU|Mux24~1_combout & ( !\RAM|Decoder0~15_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\rst[0]~input_o ), + .datab(!\ALU|Mux27~1_combout ), + .datac(!\RAM|Decoder0~0_combout ), + .datad(!\ALU|Mux30~1_combout ), + .datae(!\ALU|Mux24~1_combout ), + .dataf(!\RAM|Decoder0~15_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[84][1]~21_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[84][1]~21 .extended_lut = "off"; +defparam \RAM|mem[84][1]~21 .lut_mask = 64'h555555555555555D; +defparam \RAM|mem[84][1]~21 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X50_Y11_N32 +dffeas \RAM|mem[84][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[84][1]~21_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[84][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[84][0] .is_wysiwyg = "true"; +defparam \RAM|mem[84][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X51_Y7_N45 +cyclonev_lcell_comb \RAM|mem[86][3]~23 ( +// Equation(s): +// \RAM|mem[86][3]~23_combout = ( \RAM|Decoder0~0_combout & ( \RAM|Decoder0~15_combout & ( ((\RAM|Decoder0~8_combout & \ALU|Mux24~1_combout )) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~0_combout & ( \RAM|Decoder0~15_combout & ( \rst[0]~input_o ) ) +// ) # ( \RAM|Decoder0~0_combout & ( !\RAM|Decoder0~15_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~0_combout & ( !\RAM|Decoder0~15_combout & ( \rst[0]~input_o ) ) ) + + .dataa(gnd), + .datab(!\rst[0]~input_o ), + .datac(!\RAM|Decoder0~8_combout ), + .datad(!\ALU|Mux24~1_combout ), + .datae(!\RAM|Decoder0~0_combout ), + .dataf(!\RAM|Decoder0~15_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[86][3]~23_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[86][3]~23 .extended_lut = "off"; +defparam \RAM|mem[86][3]~23 .lut_mask = 64'h333333333333333F; +defparam \RAM|mem[86][3]~23 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X51_Y7_N22 +dffeas \RAM|mem[86][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[86][3]~23_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[86][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[86][0] .is_wysiwyg = "true"; +defparam \RAM|mem[86][0] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X50_Y10_N45 +cyclonev_lcell_comb \RAM|mem[85][1]~22 ( +// Equation(s): +// \RAM|mem[85][1]~22_combout = ( \RAM|Decoder0~5_combout & ( \RAM|Decoder0~16_combout & ( ((\ALU|Mux30~1_combout & !\ALU|Mux27~1_combout )) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~5_combout & ( \RAM|Decoder0~16_combout & ( \rst[0]~input_o ) ) ) +// # ( \RAM|Decoder0~5_combout & ( !\RAM|Decoder0~16_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~5_combout & ( !\RAM|Decoder0~16_combout & ( \rst[0]~input_o ) ) ) + + .dataa(gnd), + .datab(!\ALU|Mux30~1_combout ), + .datac(!\rst[0]~input_o ), + .datad(!\ALU|Mux27~1_combout ), + .datae(!\RAM|Decoder0~5_combout ), + .dataf(!\RAM|Decoder0~16_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[85][1]~22_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[85][1]~22 .extended_lut = "off"; +defparam \RAM|mem[85][1]~22 .lut_mask = 64'h0F0F0F0F0F0F3F0F; +defparam \RAM|mem[85][1]~22 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X50_Y10_N47 +dffeas \RAM|mem[85][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[85][1]~22_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[85][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[85][0] .is_wysiwyg = "true"; +defparam \RAM|mem[85][0] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y7_N6 +cyclonev_lcell_comb \RAM|mem[87][4]~24 ( +// Equation(s): +// \RAM|mem[87][4]~24_combout = ( \RAM|Decoder0~8_combout & ( ((\RAM|Decoder0~16_combout & \RAM|Decoder0~5_combout )) # (\rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~8_combout & ( \rst[0]~input_o ) ) + + .dataa(!\RAM|Decoder0~16_combout ), + .datab(!\rst[0]~input_o ), + .datac(!\RAM|Decoder0~5_combout ), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|Decoder0~8_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[87][4]~24_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[87][4]~24 .extended_lut = "off"; +defparam \RAM|mem[87][4]~24 .lut_mask = 64'h3333333337373737; +defparam \RAM|mem[87][4]~24 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X42_Y7_N56 +dffeas \RAM|mem[87][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[87][4]~24_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[87][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[87][0] .is_wysiwyg = "true"; +defparam \RAM|mem[87][0] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y7_N54 +cyclonev_lcell_comb \rd[0]~7 ( +// Equation(s): +// \rd[0]~7_combout = ( \RAM|mem[87][0]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & ((\RAM|mem[86][0]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[84][0]~q )) ) ) ) # ( !\RAM|mem[87][0]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & +// ((\RAM|mem[86][0]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[84][0]~q )) ) ) ) # ( \RAM|mem[87][0]~q & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout ) # (\RAM|mem[85][0]~q ) ) ) ) # ( !\RAM|mem[87][0]~q & ( !\ALU|Mux31~3_combout & ( +// (\RAM|mem[85][0]~q & \ALU|Mux30~1_combout ) ) ) ) + + .dataa(!\RAM|mem[84][0]~q ), + .datab(!\RAM|mem[86][0]~q ), + .datac(!\RAM|mem[85][0]~q ), + .datad(!\ALU|Mux30~1_combout ), + .datae(!\RAM|mem[87][0]~q ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[0]~7_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[0]~7 .extended_lut = "off"; +defparam \rd[0]~7 .lut_mask = 64'h000FFF0F33553355; +defparam \rd[0]~7 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X53_Y13_N36 +cyclonev_lcell_comb \RAM|mem[117][2]~30 ( +// Equation(s): +// \RAM|mem[117][2]~30_combout = ( \ALU|Mux27~1_combout & ( \RAM|Decoder0~16_combout & ( \rst[0]~input_o ) ) ) # ( !\ALU|Mux27~1_combout & ( \RAM|Decoder0~16_combout & ( ((\RAM|Decoder0~9_combout & \ALU|Mux30~1_combout )) # (\rst[0]~input_o ) ) ) ) # +// ( \ALU|Mux27~1_combout & ( !\RAM|Decoder0~16_combout & ( \rst[0]~input_o ) ) ) # ( !\ALU|Mux27~1_combout & ( !\RAM|Decoder0~16_combout & ( \rst[0]~input_o ) ) ) + + .dataa(gnd), + .datab(!\RAM|Decoder0~9_combout ), + .datac(!\ALU|Mux30~1_combout ), + .datad(!\rst[0]~input_o ), + .datae(!\ALU|Mux27~1_combout ), + .dataf(!\RAM|Decoder0~16_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[117][2]~30_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[117][2]~30 .extended_lut = "off"; +defparam \RAM|mem[117][2]~30 .lut_mask = 64'h00FF00FF03FF00FF; +defparam \RAM|mem[117][2]~30 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X53_Y13_N40 +dffeas \RAM|mem[117][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[117][2]~30_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[117][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[117][0] .is_wysiwyg = "true"; +defparam \RAM|mem[117][0] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X50_Y11_N36 +cyclonev_lcell_comb \RAM|mem[116][0]~29 ( +// Equation(s): +// \RAM|mem[116][0]~29_combout = ( \ALU|Mux24~1_combout & ( \RAM|Decoder0~15_combout & ( ((\ALU|Mux30~1_combout & (\RAM|Decoder0~11_combout & !\ALU|Mux27~1_combout ))) # (\rst[0]~input_o ) ) ) ) # ( !\ALU|Mux24~1_combout & ( \RAM|Decoder0~15_combout & +// ( \rst[0]~input_o ) ) ) # ( \ALU|Mux24~1_combout & ( !\RAM|Decoder0~15_combout & ( \rst[0]~input_o ) ) ) # ( !\ALU|Mux24~1_combout & ( !\RAM|Decoder0~15_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\rst[0]~input_o ), + .datab(!\ALU|Mux30~1_combout ), + .datac(!\RAM|Decoder0~11_combout ), + .datad(!\ALU|Mux27~1_combout ), + .datae(!\ALU|Mux24~1_combout ), + .dataf(!\RAM|Decoder0~15_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[116][0]~29_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[116][0]~29 .extended_lut = "off"; +defparam \RAM|mem[116][0]~29 .lut_mask = 64'h5555555555555755; +defparam \RAM|mem[116][0]~29 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X50_Y11_N40 +dffeas \RAM|mem[116][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[116][0]~29_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[116][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[116][0] .is_wysiwyg = "true"; +defparam \RAM|mem[116][0] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X50_Y9_N33 +cyclonev_lcell_comb \RAM|mem[118][4]~31 ( +// Equation(s): +// \RAM|mem[118][4]~31_combout = ( \RAM|Decoder0~15_combout & ( ((\ALU|Mux24~1_combout & (\RAM|Decoder0~11_combout & \RAM|Decoder0~8_combout ))) # (\rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~15_combout & ( \rst[0]~input_o ) ) + + .dataa(!\ALU|Mux24~1_combout ), + .datab(!\RAM|Decoder0~11_combout ), + .datac(!\rst[0]~input_o ), + .datad(!\RAM|Decoder0~8_combout ), + .datae(gnd), + .dataf(!\RAM|Decoder0~15_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[118][4]~31_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[118][4]~31 .extended_lut = "off"; +defparam \RAM|mem[118][4]~31 .lut_mask = 64'h0F0F0F0F0F1F0F1F; +defparam \RAM|mem[118][4]~31 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X50_Y9_N14 +dffeas \RAM|mem[118][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[118][4]~31_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[118][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[118][0] .is_wysiwyg = "true"; +defparam \RAM|mem[118][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X46_Y8_N33 +cyclonev_lcell_comb \RAM|mem[119][4]~32 ( +// Equation(s): +// \RAM|mem[119][4]~32_combout = ( \RAM|Decoder0~8_combout & ( \RAM|Decoder0~16_combout & ( (\RAM|Decoder0~9_combout ) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~8_combout & ( \RAM|Decoder0~16_combout & ( \rst[0]~input_o ) ) ) # ( +// \RAM|Decoder0~8_combout & ( !\RAM|Decoder0~16_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~8_combout & ( !\RAM|Decoder0~16_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\rst[0]~input_o ), + .datab(gnd), + .datac(!\RAM|Decoder0~9_combout ), + .datad(gnd), + .datae(!\RAM|Decoder0~8_combout ), + .dataf(!\RAM|Decoder0~16_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[119][4]~32_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[119][4]~32 .extended_lut = "off"; +defparam \RAM|mem[119][4]~32 .lut_mask = 64'h5555555555555F5F; +defparam \RAM|mem[119][4]~32 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X46_Y8_N32 +dffeas \RAM|mem[119][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[119][4]~32_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[119][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[119][0] .is_wysiwyg = "true"; +defparam \RAM|mem[119][0] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y13_N0 +cyclonev_lcell_comb \rd[0]~9 ( +// Equation(s): +// \rd[0]~9_combout = ( \RAM|mem[119][0]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & ((\RAM|mem[118][0]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[116][0]~q )) ) ) ) # ( !\RAM|mem[119][0]~q & ( \ALU|Mux31~3_combout & ( +// (!\ALU|Mux30~1_combout & ((\RAM|mem[118][0]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[116][0]~q )) ) ) ) # ( \RAM|mem[119][0]~q & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout ) # (\RAM|mem[117][0]~q ) ) ) ) # ( !\RAM|mem[119][0]~q & ( +// !\ALU|Mux31~3_combout & ( (\RAM|mem[117][0]~q & \ALU|Mux30~1_combout ) ) ) ) + + .dataa(!\RAM|mem[117][0]~q ), + .datab(!\RAM|mem[116][0]~q ), + .datac(!\ALU|Mux30~1_combout ), + .datad(!\RAM|mem[118][0]~q ), + .datae(!\RAM|mem[119][0]~q ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[0]~9_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[0]~9 .extended_lut = "off"; +defparam \rd[0]~9 .lut_mask = 64'h0505F5F503F303F3; +defparam \rd[0]~9 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y7_N30 +cyclonev_lcell_comb \rd[0]~10 ( +// Equation(s): +// \rd[0]~10_combout = ( \rd[0]~7_combout & ( \rd[0]~9_combout & ( (!\ALU|Mux27~1_combout ) # ((!\ALU|Mux26~1_combout & (\rd[0]~8_combout )) # (\ALU|Mux26~1_combout & ((\rd[0]~6_combout )))) ) ) ) # ( !\rd[0]~7_combout & ( \rd[0]~9_combout & ( +// (!\ALU|Mux26~1_combout & (((!\ALU|Mux27~1_combout )) # (\rd[0]~8_combout ))) # (\ALU|Mux26~1_combout & (((\rd[0]~6_combout & \ALU|Mux27~1_combout )))) ) ) ) # ( \rd[0]~7_combout & ( !\rd[0]~9_combout & ( (!\ALU|Mux26~1_combout & (\rd[0]~8_combout & +// ((\ALU|Mux27~1_combout )))) # (\ALU|Mux26~1_combout & (((!\ALU|Mux27~1_combout ) # (\rd[0]~6_combout )))) ) ) ) # ( !\rd[0]~7_combout & ( !\rd[0]~9_combout & ( (\ALU|Mux27~1_combout & ((!\ALU|Mux26~1_combout & (\rd[0]~8_combout )) # +// (\ALU|Mux26~1_combout & ((\rd[0]~6_combout ))))) ) ) ) + + .dataa(!\rd[0]~8_combout ), + .datab(!\ALU|Mux26~1_combout ), + .datac(!\rd[0]~6_combout ), + .datad(!\ALU|Mux27~1_combout ), + .datae(!\rd[0]~7_combout ), + .dataf(!\rd[0]~9_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[0]~10_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[0]~10 .extended_lut = "off"; +defparam \rd[0]~10 .lut_mask = 64'h00473347CC47FF47; +defparam \rd[0]~10 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X41_Y10_N48 +cyclonev_lcell_comb \rd[0]~21 ( +// Equation(s): +// \rd[0]~21_combout = ( \rd[0]~5_combout & ( \rd[0]~10_combout & ( ((!\ALU|Mux29~3_combout & ((\rd[0]~20_combout ))) # (\ALU|Mux29~3_combout & (\rd[0]~15_combout ))) # (\ALU|Mux28~1_combout ) ) ) ) # ( !\rd[0]~5_combout & ( \rd[0]~10_combout & ( +// (!\ALU|Mux29~3_combout & (((\rd[0]~20_combout )) # (\ALU|Mux28~1_combout ))) # (\ALU|Mux29~3_combout & (!\ALU|Mux28~1_combout & (\rd[0]~15_combout ))) ) ) ) # ( \rd[0]~5_combout & ( !\rd[0]~10_combout & ( (!\ALU|Mux29~3_combout & +// (!\ALU|Mux28~1_combout & ((\rd[0]~20_combout )))) # (\ALU|Mux29~3_combout & (((\rd[0]~15_combout )) # (\ALU|Mux28~1_combout ))) ) ) ) # ( !\rd[0]~5_combout & ( !\rd[0]~10_combout & ( (!\ALU|Mux28~1_combout & ((!\ALU|Mux29~3_combout & +// ((\rd[0]~20_combout ))) # (\ALU|Mux29~3_combout & (\rd[0]~15_combout )))) ) ) ) + + .dataa(!\ALU|Mux29~3_combout ), + .datab(!\ALU|Mux28~1_combout ), + .datac(!\rd[0]~15_combout ), + .datad(!\rd[0]~20_combout ), + .datae(!\rd[0]~5_combout ), + .dataf(!\rd[0]~10_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[0]~21_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[0]~21 .extended_lut = "off"; +defparam \rd[0]~21 .lut_mask = 64'h048C159D26AE37BF; +defparam \rd[0]~21 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X41_Y10_N15 +cyclonev_lcell_comb \rd[0]~86 ( +// Equation(s): +// \rd[0]~86_combout = ( \rd[0]~85_combout & ( \rd[0]~21_combout ) ) # ( !\rd[0]~85_combout & ( \rd[0]~21_combout & ( (\ALU|Mux24~1_combout & (\CONTROL_UNIT|M2R[0]~0_combout & ((!\ALU|Mux25~1_combout ) # (\rd[0]~42_combout )))) ) ) ) # ( +// \rd[0]~85_combout & ( !\rd[0]~21_combout ) ) # ( !\rd[0]~85_combout & ( !\rd[0]~21_combout & ( (\ALU|Mux24~1_combout & (\ALU|Mux25~1_combout & (\CONTROL_UNIT|M2R[0]~0_combout & \rd[0]~42_combout ))) ) ) ) + + .dataa(!\ALU|Mux24~1_combout ), + .datab(!\ALU|Mux25~1_combout ), + .datac(!\CONTROL_UNIT|M2R[0]~0_combout ), + .datad(!\rd[0]~42_combout ), + .datae(!\rd[0]~85_combout ), + .dataf(!\rd[0]~21_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[0]~86_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[0]~86 .extended_lut = "off"; +defparam \rd[0]~86 .lut_mask = 64'h0001FFFF0405FFFF; +defparam \rd[0]~86 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X40_Y8_N46 +dffeas \REGS|regs[26][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[0]~86_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~6_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[26][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[26][0] .is_wysiwyg = "true"; +defparam \REGS|regs[26][0] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y6_N39 +cyclonev_lcell_comb \REGS|regs[18][0]~feeder ( +// Equation(s): +// \REGS|regs[18][0]~feeder_combout = ( \rd[0]~86_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[0]~86_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[18][0]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[18][0]~feeder .extended_lut = "off"; +defparam \REGS|regs[18][0]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[18][0]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X42_Y6_N40 +dffeas \REGS|regs[18][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[18][0]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~5_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[18][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[18][0] .is_wysiwyg = "true"; +defparam \REGS|regs[18][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X40_Y8_N45 +cyclonev_lcell_comb \REGS|Mux63~4 ( +// Equation(s): +// \REGS|Mux63~4_combout = ( \REGS|regs[26][0]~q & ( \REGS|regs[18][0]~q ) ) # ( !\REGS|regs[26][0]~q & ( \REGS|regs[18][0]~q & ( (((\PC|pc [9]) # (\PC|pc[8]~DUPLICATE_q )) # (\PC|pc [7])) # (\PC|pc[6]~DUPLICATE_q ) ) ) ) # ( \REGS|regs[26][0]~q & ( +// !\REGS|regs[18][0]~q & ( (!\PC|pc[6]~DUPLICATE_q & (!\PC|pc [7] & (!\PC|pc[8]~DUPLICATE_q & !\PC|pc [9]))) ) ) ) + + .dataa(!\PC|pc[6]~DUPLICATE_q ), + .datab(!\PC|pc [7]), + .datac(!\PC|pc[8]~DUPLICATE_q ), + .datad(!\PC|pc [9]), + .datae(!\REGS|regs[26][0]~q ), + .dataf(!\REGS|regs[18][0]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux63~4_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux63~4 .extended_lut = "off"; +defparam \REGS|Mux63~4 .lut_mask = 64'h000080007FFFFFFF; +defparam \REGS|Mux63~4 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X35_Y9_N56 +dffeas \REGS|regs[8][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[0]~86_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~24_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[8][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[8][0] .is_wysiwyg = "true"; +defparam \REGS|regs[8][0] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X41_Y10_N37 +dffeas \REGS|regs[9][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[9][0]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~29_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[9][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[9][0] .is_wysiwyg = "true"; +defparam \REGS|regs[9][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X35_Y9_N57 +cyclonev_lcell_comb \REGS|Mux31~1 ( +// Equation(s): +// \REGS|Mux31~1_combout = ( \ROM|mem~15_combout & ( \REGS|regs[9][0]~q & ( \ROM|mem~0_combout ) ) ) # ( !\ROM|mem~15_combout & ( \REGS|regs[9][0]~q & ( (\ROM|mem~0_combout & \REGS|regs[8][0]~q ) ) ) ) # ( !\ROM|mem~15_combout & ( !\REGS|regs[9][0]~q +// & ( (\ROM|mem~0_combout & \REGS|regs[8][0]~q ) ) ) ) + + .dataa(gnd), + .datab(gnd), + .datac(!\ROM|mem~0_combout ), + .datad(!\REGS|regs[8][0]~q ), + .datae(!\ROM|mem~15_combout ), + .dataf(!\REGS|regs[9][0]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux31~1_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux31~1 .extended_lut = "off"; +defparam \REGS|Mux31~1 .lut_mask = 64'h000F0000000F0F0F; +defparam \REGS|Mux31~1 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X36_Y9_N24 +cyclonev_lcell_comb \REGS|Mux31~0 ( +// Equation(s): +// \REGS|Mux31~0_combout = ( \REGS|Mux63~3_combout & ( \ROM|mem~16_combout & ( (\ROM|mem~9_combout ) # (\REGS|Mux63~1_combout ) ) ) ) # ( !\REGS|Mux63~3_combout & ( \ROM|mem~16_combout & ( (\REGS|Mux63~1_combout & !\ROM|mem~9_combout ) ) ) ) # ( +// \REGS|Mux63~3_combout & ( !\ROM|mem~16_combout & ( (!\ROM|mem~9_combout & (\REGS|Mux63~0_combout )) # (\ROM|mem~9_combout & ((\REGS|Mux63~2_combout ))) ) ) ) # ( !\REGS|Mux63~3_combout & ( !\ROM|mem~16_combout & ( (!\ROM|mem~9_combout & +// (\REGS|Mux63~0_combout )) # (\ROM|mem~9_combout & ((\REGS|Mux63~2_combout ))) ) ) ) + + .dataa(!\REGS|Mux63~1_combout ), + .datab(!\REGS|Mux63~0_combout ), + .datac(!\REGS|Mux63~2_combout ), + .datad(!\ROM|mem~9_combout ), + .datae(!\REGS|Mux63~3_combout ), + .dataf(!\ROM|mem~16_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux31~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux31~0 .extended_lut = "off"; +defparam \REGS|Mux31~0 .lut_mask = 64'h330F330F550055FF; +defparam \REGS|Mux31~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X36_Y9_N54 +cyclonev_lcell_comb \REGS|Mux31~2 ( +// Equation(s): +// \REGS|Mux31~2_combout = ( \REGS|Mux31~0_combout & ( (((\REGS|Mux63~4_combout & \ROM|mem~9_combout )) # (\REGS|Mux31~1_combout )) # (\ROM|mem~17_combout ) ) ) # ( !\REGS|Mux31~0_combout & ( (!\ROM|mem~17_combout & (((\REGS|Mux63~4_combout & +// \ROM|mem~9_combout )) # (\REGS|Mux31~1_combout ))) ) ) + + .dataa(!\ROM|mem~17_combout ), + .datab(!\REGS|Mux63~4_combout ), + .datac(!\REGS|Mux31~1_combout ), + .datad(!\ROM|mem~9_combout ), + .datae(gnd), + .dataf(!\REGS|Mux31~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux31~2_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux31~2 .extended_lut = "off"; +defparam \REGS|Mux31~2 .lut_mask = 64'h0A2A0A2A5F7F5F7F; +defparam \REGS|Mux31~2 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y11_N6 +cyclonev_lcell_comb \ALU|adder_unit|OUT_1[2] ( +// Equation(s): +// \ALU|adder_unit|OUT_1 [2] = SUM(( !\rt_alu[2]~59_combout $ (!\REGS|Mux29~2_combout $ (((\CONTROL_UNIT|ALU_FN~1_combout ) # (\CONTROL_UNIT|B~0_combout )))) ) + ( \ALU|adder_unit|_~17 ) + ( \ALU|adder_unit|_~16 )) +// \ALU|adder_unit|_~25 = CARRY(( !\rt_alu[2]~59_combout $ (!\REGS|Mux29~2_combout $ (((\CONTROL_UNIT|ALU_FN~1_combout ) # (\CONTROL_UNIT|B~0_combout )))) ) + ( \ALU|adder_unit|_~17 ) + ( \ALU|adder_unit|_~16 )) +// \ALU|adder_unit|_~26 = SHARE((\REGS|Mux29~2_combout & (!\rt_alu[2]~59_combout $ (((!\CONTROL_UNIT|B~0_combout & !\CONTROL_UNIT|ALU_FN~1_combout )))))) + + .dataa(!\CONTROL_UNIT|B~0_combout ), + .datab(!\CONTROL_UNIT|ALU_FN~1_combout ), + .datac(!\rt_alu[2]~59_combout ), + .datad(!\REGS|Mux29~2_combout ), + .datae(gnd), + .dataf(gnd), + .datag(gnd), + .cin(\ALU|adder_unit|_~16 ), + .sharein(\ALU|adder_unit|_~17 ), + .combout(), + .sumout(\ALU|adder_unit|OUT_1 [2]), + .cout(\ALU|adder_unit|_~25 ), + .shareout(\ALU|adder_unit|_~26 )); +// synopsys translate_off +defparam \ALU|adder_unit|OUT_1[2] .extended_lut = "off"; +defparam \ALU|adder_unit|OUT_1[2] .lut_mask = 64'h0000007800007887; +defparam \ALU|adder_unit|OUT_1[2] .shared_arith = "on"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y11_N9 +cyclonev_lcell_comb \ALU|adder_unit|OUT_1[3] ( +// Equation(s): +// \ALU|adder_unit|OUT_1 [3] = SUM(( !\REGS|Mux28~2_combout $ (!\ALU|adder_unit|operand[3]~4_combout ) ) + ( \ALU|adder_unit|_~26 ) + ( \ALU|adder_unit|_~25 )) +// \ALU|adder_unit|_~28 = CARRY(( !\REGS|Mux28~2_combout $ (!\ALU|adder_unit|operand[3]~4_combout ) ) + ( \ALU|adder_unit|_~26 ) + ( \ALU|adder_unit|_~25 )) +// \ALU|adder_unit|_~29 = SHARE((\REGS|Mux28~2_combout & \ALU|adder_unit|operand[3]~4_combout )) + + .dataa(gnd), + .datab(gnd), + .datac(!\REGS|Mux28~2_combout ), + .datad(!\ALU|adder_unit|operand[3]~4_combout ), + .datae(gnd), + .dataf(gnd), + .datag(gnd), + .cin(\ALU|adder_unit|_~25 ), + .sharein(\ALU|adder_unit|_~26 ), + .combout(), + .sumout(\ALU|adder_unit|OUT_1 [3]), + .cout(\ALU|adder_unit|_~28 ), + .shareout(\ALU|adder_unit|_~29 )); +// synopsys translate_off +defparam \ALU|adder_unit|OUT_1[3] .extended_lut = "off"; +defparam \ALU|adder_unit|OUT_1[3] .lut_mask = 64'h0000000F00000FF0; +defparam \ALU|adder_unit|OUT_1[3] .shared_arith = "on"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y11_N12 +cyclonev_lcell_comb \ALU|adder_unit|OUT_1[4] ( +// Equation(s): +// \ALU|adder_unit|OUT_1 [4] = SUM(( !\REGS|Mux27~2_combout $ (!\rt_alu[4]~48_combout $ (((\CONTROL_UNIT|ALU_FN~1_combout ) # (\CONTROL_UNIT|B~0_combout )))) ) + ( \ALU|adder_unit|_~29 ) + ( \ALU|adder_unit|_~28 )) +// \ALU|adder_unit|_~19 = CARRY(( !\REGS|Mux27~2_combout $ (!\rt_alu[4]~48_combout $ (((\CONTROL_UNIT|ALU_FN~1_combout ) # (\CONTROL_UNIT|B~0_combout )))) ) + ( \ALU|adder_unit|_~29 ) + ( \ALU|adder_unit|_~28 )) +// \ALU|adder_unit|_~20 = SHARE((\REGS|Mux27~2_combout & (!\rt_alu[4]~48_combout $ (((!\CONTROL_UNIT|B~0_combout & !\CONTROL_UNIT|ALU_FN~1_combout )))))) + + .dataa(!\CONTROL_UNIT|B~0_combout ), + .datab(!\CONTROL_UNIT|ALU_FN~1_combout ), + .datac(!\REGS|Mux27~2_combout ), + .datad(!\rt_alu[4]~48_combout ), + .datae(gnd), + .dataf(gnd), + .datag(gnd), + .cin(\ALU|adder_unit|_~28 ), + .sharein(\ALU|adder_unit|_~29 ), + .combout(), + .sumout(\ALU|adder_unit|OUT_1 [4]), + .cout(\ALU|adder_unit|_~19 ), + .shareout(\ALU|adder_unit|_~20 )); +// synopsys translate_off +defparam \ALU|adder_unit|OUT_1[4] .extended_lut = "off"; +defparam \ALU|adder_unit|OUT_1[4] .lut_mask = 64'h0000070800007887; +defparam \ALU|adder_unit|OUT_1[4] .shared_arith = "on"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y11_N15 +cyclonev_lcell_comb \ALU|adder_unit|OUT_1[5] ( +// Equation(s): +// \ALU|adder_unit|OUT_1 [5] = SUM(( !\ALU|adder_unit|operand[5]~3_combout $ (!\REGS|Mux26~2_combout ) ) + ( \ALU|adder_unit|_~20 ) + ( \ALU|adder_unit|_~19 )) +// \ALU|adder_unit|_~22 = CARRY(( !\ALU|adder_unit|operand[5]~3_combout $ (!\REGS|Mux26~2_combout ) ) + ( \ALU|adder_unit|_~20 ) + ( \ALU|adder_unit|_~19 )) +// \ALU|adder_unit|_~23 = SHARE((\ALU|adder_unit|operand[5]~3_combout & \REGS|Mux26~2_combout )) + + .dataa(gnd), + .datab(gnd), + .datac(!\ALU|adder_unit|operand[5]~3_combout ), + .datad(!\REGS|Mux26~2_combout ), + .datae(gnd), + .dataf(gnd), + .datag(gnd), + .cin(\ALU|adder_unit|_~19 ), + .sharein(\ALU|adder_unit|_~20 ), + .combout(), + .sumout(\ALU|adder_unit|OUT_1 [5]), + .cout(\ALU|adder_unit|_~22 ), + .shareout(\ALU|adder_unit|_~23 )); +// synopsys translate_off +defparam \ALU|adder_unit|OUT_1[5] .extended_lut = "off"; +defparam \ALU|adder_unit|OUT_1[5] .lut_mask = 64'h0000000F00000FF0; +defparam \ALU|adder_unit|OUT_1[5] .shared_arith = "on"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y11_N18 +cyclonev_lcell_comb \ALU|adder_unit|OUT_1[6] ( +// Equation(s): +// \ALU|adder_unit|OUT_1 [6] = SUM(( !\rt_alu[6]~31_combout $ (!\REGS|Mux25~2_combout $ (((\CONTROL_UNIT|ALU_FN~1_combout ) # (\CONTROL_UNIT|B~0_combout )))) ) + ( \ALU|adder_unit|_~23 ) + ( \ALU|adder_unit|_~22 )) +// \ALU|adder_unit|_~7 = CARRY(( !\rt_alu[6]~31_combout $ (!\REGS|Mux25~2_combout $ (((\CONTROL_UNIT|ALU_FN~1_combout ) # (\CONTROL_UNIT|B~0_combout )))) ) + ( \ALU|adder_unit|_~23 ) + ( \ALU|adder_unit|_~22 )) +// \ALU|adder_unit|_~8 = SHARE((\REGS|Mux25~2_combout & (!\rt_alu[6]~31_combout $ (((!\CONTROL_UNIT|B~0_combout & !\CONTROL_UNIT|ALU_FN~1_combout )))))) + + .dataa(!\CONTROL_UNIT|B~0_combout ), + .datab(!\rt_alu[6]~31_combout ), + .datac(!\CONTROL_UNIT|ALU_FN~1_combout ), + .datad(!\REGS|Mux25~2_combout ), + .datae(gnd), + .dataf(gnd), + .datag(gnd), + .cin(\ALU|adder_unit|_~22 ), + .sharein(\ALU|adder_unit|_~23 ), + .combout(), + .sumout(\ALU|adder_unit|OUT_1 [6]), + .cout(\ALU|adder_unit|_~7 ), + .shareout(\ALU|adder_unit|_~8 )); +// synopsys translate_off +defparam \ALU|adder_unit|OUT_1[6] .extended_lut = "off"; +defparam \ALU|adder_unit|OUT_1[6] .lut_mask = 64'h0000006C00006C93; +defparam \ALU|adder_unit|OUT_1[6] .shared_arith = "on"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y11_N21 +cyclonev_lcell_comb \ALU|adder_unit|OUT_1[7] ( +// Equation(s): +// \ALU|adder_unit|OUT_1 [7] = SUM(( !\ALU|adder_unit|operand[7]~1_combout $ (!\REGS|Mux24~2_combout ) ) + ( \ALU|adder_unit|_~8 ) + ( \ALU|adder_unit|_~7 )) +// \ALU|adder_unit|_~4 = CARRY(( !\ALU|adder_unit|operand[7]~1_combout $ (!\REGS|Mux24~2_combout ) ) + ( \ALU|adder_unit|_~8 ) + ( \ALU|adder_unit|_~7 )) +// \ALU|adder_unit|_~5 = SHARE((\ALU|adder_unit|operand[7]~1_combout & \REGS|Mux24~2_combout )) + + .dataa(gnd), + .datab(gnd), + .datac(!\ALU|adder_unit|operand[7]~1_combout ), + .datad(!\REGS|Mux24~2_combout ), + .datae(gnd), + .dataf(gnd), + .datag(gnd), + .cin(\ALU|adder_unit|_~7 ), + .sharein(\ALU|adder_unit|_~8 ), + .combout(), + .sumout(\ALU|adder_unit|OUT_1 [7]), + .cout(\ALU|adder_unit|_~4 ), + .shareout(\ALU|adder_unit|_~5 )); +// synopsys translate_off +defparam \ALU|adder_unit|OUT_1[7] .extended_lut = "off"; +defparam \ALU|adder_unit|OUT_1[7] .lut_mask = 64'h0000000F00000FF0; +defparam \ALU|adder_unit|OUT_1[7] .shared_arith = "on"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y11_N24 +cyclonev_lcell_comb \ALU|adder_unit|OUT_1[8] ( +// Equation(s): +// \ALU|adder_unit|OUT_1 [8] = SUM(( !\rt_alu[8]~151_combout $ (!\REGS|Mux23~2_combout $ (((\CONTROL_UNIT|B~0_combout ) # (\CONTROL_UNIT|ALU_FN~1_combout )))) ) + ( \ALU|adder_unit|_~5 ) + ( \ALU|adder_unit|_~4 )) +// \ALU|adder_unit|_~55 = CARRY(( !\rt_alu[8]~151_combout $ (!\REGS|Mux23~2_combout $ (((\CONTROL_UNIT|B~0_combout ) # (\CONTROL_UNIT|ALU_FN~1_combout )))) ) + ( \ALU|adder_unit|_~5 ) + ( \ALU|adder_unit|_~4 )) +// \ALU|adder_unit|_~56 = SHARE((\REGS|Mux23~2_combout & (!\rt_alu[8]~151_combout $ (((!\CONTROL_UNIT|ALU_FN~1_combout & !\CONTROL_UNIT|B~0_combout )))))) + + .dataa(!\CONTROL_UNIT|ALU_FN~1_combout ), + .datab(!\CONTROL_UNIT|B~0_combout ), + .datac(!\rt_alu[8]~151_combout ), + .datad(!\REGS|Mux23~2_combout ), + .datae(gnd), + .dataf(gnd), + .datag(gnd), + .cin(\ALU|adder_unit|_~4 ), + .sharein(\ALU|adder_unit|_~5 ), + .combout(), + .sumout(\ALU|adder_unit|OUT_1 [8]), + .cout(\ALU|adder_unit|_~55 ), + .shareout(\ALU|adder_unit|_~56 )); +// synopsys translate_off +defparam \ALU|adder_unit|OUT_1[8] .extended_lut = "off"; +defparam \ALU|adder_unit|OUT_1[8] .lut_mask = 64'h0000007800007887; +defparam \ALU|adder_unit|OUT_1[8] .shared_arith = "on"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y11_N27 +cyclonev_lcell_comb \ALU|adder_unit|OUT_1[9] ( +// Equation(s): +// \ALU|adder_unit|OUT_1 [9] = SUM(( !\ALU|adder_unit|operand[9]~10_combout $ (!\REGS|Mux22~2_combout ) ) + ( \ALU|adder_unit|_~56 ) + ( \ALU|adder_unit|_~55 )) +// \ALU|adder_unit|_~61 = CARRY(( !\ALU|adder_unit|operand[9]~10_combout $ (!\REGS|Mux22~2_combout ) ) + ( \ALU|adder_unit|_~56 ) + ( \ALU|adder_unit|_~55 )) +// \ALU|adder_unit|_~62 = SHARE((\ALU|adder_unit|operand[9]~10_combout & \REGS|Mux22~2_combout )) + + .dataa(gnd), + .datab(gnd), + .datac(!\ALU|adder_unit|operand[9]~10_combout ), + .datad(!\REGS|Mux22~2_combout ), + .datae(gnd), + .dataf(gnd), + .datag(gnd), + .cin(\ALU|adder_unit|_~55 ), + .sharein(\ALU|adder_unit|_~56 ), + .combout(), + .sumout(\ALU|adder_unit|OUT_1 [9]), + .cout(\ALU|adder_unit|_~61 ), + .shareout(\ALU|adder_unit|_~62 )); +// synopsys translate_off +defparam \ALU|adder_unit|OUT_1[9] .extended_lut = "off"; +defparam \ALU|adder_unit|OUT_1[9] .lut_mask = 64'h0000000F00000FF0; +defparam \ALU|adder_unit|OUT_1[9] .shared_arith = "on"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y10_N0 +cyclonev_lcell_comb \ALU|adder_unit|OUT_1[10] ( +// Equation(s): +// \ALU|adder_unit|OUT_1 [10] = SUM(( !\REGS|Mux21~2_combout $ (!\rt_alu[10]~190_combout $ (((\CONTROL_UNIT|B~0_combout ) # (\CONTROL_UNIT|ALU_FN~1_combout )))) ) + ( \ALU|adder_unit|_~62 ) + ( \ALU|adder_unit|_~61 )) +// \ALU|adder_unit|_~67 = CARRY(( !\REGS|Mux21~2_combout $ (!\rt_alu[10]~190_combout $ (((\CONTROL_UNIT|B~0_combout ) # (\CONTROL_UNIT|ALU_FN~1_combout )))) ) + ( \ALU|adder_unit|_~62 ) + ( \ALU|adder_unit|_~61 )) +// \ALU|adder_unit|_~68 = SHARE((\REGS|Mux21~2_combout & (!\rt_alu[10]~190_combout $ (((!\CONTROL_UNIT|ALU_FN~1_combout & !\CONTROL_UNIT|B~0_combout )))))) + + .dataa(!\CONTROL_UNIT|ALU_FN~1_combout ), + .datab(!\CONTROL_UNIT|B~0_combout ), + .datac(!\REGS|Mux21~2_combout ), + .datad(!\rt_alu[10]~190_combout ), + .datae(gnd), + .dataf(gnd), + .datag(gnd), + .cin(\ALU|adder_unit|_~61 ), + .sharein(\ALU|adder_unit|_~62 ), + .combout(), + .sumout(\ALU|adder_unit|OUT_1 [10]), + .cout(\ALU|adder_unit|_~67 ), + .shareout(\ALU|adder_unit|_~68 )); +// synopsys translate_off +defparam \ALU|adder_unit|OUT_1[10] .extended_lut = "off"; +defparam \ALU|adder_unit|OUT_1[10] .lut_mask = 64'h0000070800007887; +defparam \ALU|adder_unit|OUT_1[10] .shared_arith = "on"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y10_N3 +cyclonev_lcell_comb \ALU|adder_unit|OUT_1[11] ( +// Equation(s): +// \ALU|adder_unit|OUT_1 [11] = SUM(( !\REGS|Mux20~2_combout $ (!\ALU|adder_unit|operand[11]~12_combout ) ) + ( \ALU|adder_unit|_~68 ) + ( \ALU|adder_unit|_~67 )) +// \ALU|adder_unit|_~73 = CARRY(( !\REGS|Mux20~2_combout $ (!\ALU|adder_unit|operand[11]~12_combout ) ) + ( \ALU|adder_unit|_~68 ) + ( \ALU|adder_unit|_~67 )) +// \ALU|adder_unit|_~74 = SHARE((\REGS|Mux20~2_combout & \ALU|adder_unit|operand[11]~12_combout )) + + .dataa(gnd), + .datab(gnd), + .datac(!\REGS|Mux20~2_combout ), + .datad(!\ALU|adder_unit|operand[11]~12_combout ), + .datae(gnd), + .dataf(gnd), + .datag(gnd), + .cin(\ALU|adder_unit|_~67 ), + .sharein(\ALU|adder_unit|_~68 ), + .combout(), + .sumout(\ALU|adder_unit|OUT_1 [11]), + .cout(\ALU|adder_unit|_~73 ), + .shareout(\ALU|adder_unit|_~74 )); +// synopsys translate_off +defparam \ALU|adder_unit|OUT_1[11] .extended_lut = "off"; +defparam \ALU|adder_unit|OUT_1[11] .lut_mask = 64'h0000000F00000FF0; +defparam \ALU|adder_unit|OUT_1[11] .shared_arith = "on"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y10_N6 +cyclonev_lcell_comb \ALU|adder_unit|OUT_1[12] ( +// Equation(s): +// \ALU|adder_unit|OUT_1 [12] = SUM(( !\rt_alu[12]~230_combout $ (!\REGS|Mux19~2_combout $ (((\CONTROL_UNIT|B~0_combout ) # (\CONTROL_UNIT|ALU_FN~1_combout )))) ) + ( \ALU|adder_unit|_~74 ) + ( \ALU|adder_unit|_~73 )) +// \ALU|adder_unit|_~79 = CARRY(( !\rt_alu[12]~230_combout $ (!\REGS|Mux19~2_combout $ (((\CONTROL_UNIT|B~0_combout ) # (\CONTROL_UNIT|ALU_FN~1_combout )))) ) + ( \ALU|adder_unit|_~74 ) + ( \ALU|adder_unit|_~73 )) +// \ALU|adder_unit|_~80 = SHARE((\REGS|Mux19~2_combout & (!\rt_alu[12]~230_combout $ (((!\CONTROL_UNIT|ALU_FN~1_combout & !\CONTROL_UNIT|B~0_combout )))))) + + .dataa(!\CONTROL_UNIT|ALU_FN~1_combout ), + .datab(!\CONTROL_UNIT|B~0_combout ), + .datac(!\rt_alu[12]~230_combout ), + .datad(!\REGS|Mux19~2_combout ), + .datae(gnd), + .dataf(gnd), + .datag(gnd), + .cin(\ALU|adder_unit|_~73 ), + .sharein(\ALU|adder_unit|_~74 ), + .combout(), + .sumout(\ALU|adder_unit|OUT_1 [12]), + .cout(\ALU|adder_unit|_~79 ), + .shareout(\ALU|adder_unit|_~80 )); +// synopsys translate_off +defparam \ALU|adder_unit|OUT_1[12] .extended_lut = "off"; +defparam \ALU|adder_unit|OUT_1[12] .lut_mask = 64'h0000007800007887; +defparam \ALU|adder_unit|OUT_1[12] .shared_arith = "on"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y10_N9 +cyclonev_lcell_comb \ALU|adder_unit|OUT_1[13] ( +// Equation(s): +// \ALU|adder_unit|OUT_1 [13] = SUM(( !\ALU|adder_unit|operand[13]~14_combout $ (!\REGS|Mux18~2_combout ) ) + ( \ALU|adder_unit|_~80 ) + ( \ALU|adder_unit|_~79 )) +// \ALU|adder_unit|_~85 = CARRY(( !\ALU|adder_unit|operand[13]~14_combout $ (!\REGS|Mux18~2_combout ) ) + ( \ALU|adder_unit|_~80 ) + ( \ALU|adder_unit|_~79 )) +// \ALU|adder_unit|_~86 = SHARE((\ALU|adder_unit|operand[13]~14_combout & \REGS|Mux18~2_combout )) + + .dataa(gnd), + .datab(gnd), + .datac(!\ALU|adder_unit|operand[13]~14_combout ), + .datad(!\REGS|Mux18~2_combout ), + .datae(gnd), + .dataf(gnd), + .datag(gnd), + .cin(\ALU|adder_unit|_~79 ), + .sharein(\ALU|adder_unit|_~80 ), + .combout(), + .sumout(\ALU|adder_unit|OUT_1 [13]), + .cout(\ALU|adder_unit|_~85 ), + .shareout(\ALU|adder_unit|_~86 )); +// synopsys translate_off +defparam \ALU|adder_unit|OUT_1[13] .extended_lut = "off"; +defparam \ALU|adder_unit|OUT_1[13] .lut_mask = 64'h0000000F00000FF0; +defparam \ALU|adder_unit|OUT_1[13] .shared_arith = "on"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y10_N12 +cyclonev_lcell_comb \ALU|adder_unit|OUT_1[14] ( +// Equation(s): +// \ALU|adder_unit|OUT_1 [14] = SUM(( !\rt_alu[14]~270_combout $ (!\REGS|Mux17~2_combout $ (((\CONTROL_UNIT|B~0_combout ) # (\CONTROL_UNIT|ALU_FN~1_combout )))) ) + ( \ALU|adder_unit|_~86 ) + ( \ALU|adder_unit|_~85 )) +// \ALU|adder_unit|_~91 = CARRY(( !\rt_alu[14]~270_combout $ (!\REGS|Mux17~2_combout $ (((\CONTROL_UNIT|B~0_combout ) # (\CONTROL_UNIT|ALU_FN~1_combout )))) ) + ( \ALU|adder_unit|_~86 ) + ( \ALU|adder_unit|_~85 )) +// \ALU|adder_unit|_~92 = SHARE((\REGS|Mux17~2_combout & (!\rt_alu[14]~270_combout $ (((!\CONTROL_UNIT|ALU_FN~1_combout & !\CONTROL_UNIT|B~0_combout )))))) + + .dataa(!\CONTROL_UNIT|ALU_FN~1_combout ), + .datab(!\CONTROL_UNIT|B~0_combout ), + .datac(!\rt_alu[14]~270_combout ), + .datad(!\REGS|Mux17~2_combout ), + .datae(gnd), + .dataf(gnd), + .datag(gnd), + .cin(\ALU|adder_unit|_~85 ), + .sharein(\ALU|adder_unit|_~86 ), + .combout(), + .sumout(\ALU|adder_unit|OUT_1 [14]), + .cout(\ALU|adder_unit|_~91 ), + .shareout(\ALU|adder_unit|_~92 )); +// synopsys translate_off +defparam \ALU|adder_unit|OUT_1[14] .extended_lut = "off"; +defparam \ALU|adder_unit|OUT_1[14] .lut_mask = 64'h0000007800007887; +defparam \ALU|adder_unit|OUT_1[14] .shared_arith = "on"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y10_N15 +cyclonev_lcell_comb \ALU|adder_unit|OUT_1[15] ( +// Equation(s): +// \ALU|adder_unit|OUT_1 [15] = SUM(( !\ALU|adder_unit|operand[15]~15_combout $ (!\REGS|Mux16~2_combout ) ) + ( \ALU|adder_unit|_~92 ) + ( \ALU|adder_unit|_~91 )) +// \ALU|adder_unit|_~97 = CARRY(( !\ALU|adder_unit|operand[15]~15_combout $ (!\REGS|Mux16~2_combout ) ) + ( \ALU|adder_unit|_~92 ) + ( \ALU|adder_unit|_~91 )) +// \ALU|adder_unit|_~98 = SHARE((\ALU|adder_unit|operand[15]~15_combout & \REGS|Mux16~2_combout )) + + .dataa(gnd), + .datab(gnd), + .datac(!\ALU|adder_unit|operand[15]~15_combout ), + .datad(!\REGS|Mux16~2_combout ), + .datae(gnd), + .dataf(gnd), + .datag(gnd), + .cin(\ALU|adder_unit|_~91 ), + .sharein(\ALU|adder_unit|_~92 ), + .combout(), + .sumout(\ALU|adder_unit|OUT_1 [15]), + .cout(\ALU|adder_unit|_~97 ), + .shareout(\ALU|adder_unit|_~98 )); +// synopsys translate_off +defparam \ALU|adder_unit|OUT_1[15] .extended_lut = "off"; +defparam \ALU|adder_unit|OUT_1[15] .lut_mask = 64'h0000000F00000FF0; +defparam \ALU|adder_unit|OUT_1[15] .shared_arith = "on"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y10_N18 +cyclonev_lcell_comb \ALU|adder_unit|OUT_1[16] ( +// Equation(s): +// \ALU|adder_unit|OUT_1 [16] = SUM(( !\REGS|Mux15~2_combout $ (!\rt_alu[16]~13_combout $ (((\CONTROL_UNIT|B~0_combout ) # (\CONTROL_UNIT|ALU_FN~1_combout )))) ) + ( \ALU|adder_unit|_~98 ) + ( \ALU|adder_unit|_~97 )) +// \ALU|adder_unit|_~1 = CARRY(( !\REGS|Mux15~2_combout $ (!\rt_alu[16]~13_combout $ (((\CONTROL_UNIT|B~0_combout ) # (\CONTROL_UNIT|ALU_FN~1_combout )))) ) + ( \ALU|adder_unit|_~98 ) + ( \ALU|adder_unit|_~97 )) +// \ALU|adder_unit|_~2 = SHARE((\REGS|Mux15~2_combout & (!\rt_alu[16]~13_combout $ (((!\CONTROL_UNIT|ALU_FN~1_combout & !\CONTROL_UNIT|B~0_combout )))))) + + .dataa(!\CONTROL_UNIT|ALU_FN~1_combout ), + .datab(!\CONTROL_UNIT|B~0_combout ), + .datac(!\REGS|Mux15~2_combout ), + .datad(!\rt_alu[16]~13_combout ), + .datae(gnd), + .dataf(gnd), + .datag(gnd), + .cin(\ALU|adder_unit|_~97 ), + .sharein(\ALU|adder_unit|_~98 ), + .combout(), + .sumout(\ALU|adder_unit|OUT_1 [16]), + .cout(\ALU|adder_unit|_~1 ), + .shareout(\ALU|adder_unit|_~2 )); +// synopsys translate_off +defparam \ALU|adder_unit|OUT_1[16] .extended_lut = "off"; +defparam \ALU|adder_unit|OUT_1[16] .lut_mask = 64'h0000070800007887; +defparam \ALU|adder_unit|OUT_1[16] .shared_arith = "on"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y10_N21 +cyclonev_lcell_comb \ALU|adder_unit|OUT_1[17] ( +// Equation(s): +// \ALU|adder_unit|OUT_1 [17] = SUM(( !\ALU|adder_unit|operand[17]~5_combout $ (!\REGS|Mux14~2_combout ) ) + ( \ALU|adder_unit|_~2 ) + ( \ALU|adder_unit|_~1 )) +// \ALU|adder_unit|_~31 = CARRY(( !\ALU|adder_unit|operand[17]~5_combout $ (!\REGS|Mux14~2_combout ) ) + ( \ALU|adder_unit|_~2 ) + ( \ALU|adder_unit|_~1 )) +// \ALU|adder_unit|_~32 = SHARE((\ALU|adder_unit|operand[17]~5_combout & \REGS|Mux14~2_combout )) + + .dataa(gnd), + .datab(gnd), + .datac(!\ALU|adder_unit|operand[17]~5_combout ), + .datad(!\REGS|Mux14~2_combout ), + .datae(gnd), + .dataf(gnd), + .datag(gnd), + .cin(\ALU|adder_unit|_~1 ), + .sharein(\ALU|adder_unit|_~2 ), + .combout(), + .sumout(\ALU|adder_unit|OUT_1 [17]), + .cout(\ALU|adder_unit|_~31 ), + .shareout(\ALU|adder_unit|_~32 )); +// synopsys translate_off +defparam \ALU|adder_unit|OUT_1[17] .extended_lut = "off"; +defparam \ALU|adder_unit|OUT_1[17] .lut_mask = 64'h0000000F00000FF0; +defparam \ALU|adder_unit|OUT_1[17] .shared_arith = "on"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y10_N24 +cyclonev_lcell_comb \ALU|adder_unit|OUT_1[18] ( +// Equation(s): +// \ALU|adder_unit|OUT_1 [18] = SUM(( !\rt_alu[18]~79_combout $ (!\REGS|Mux13~2_combout $ (((\CONTROL_UNIT|B~0_combout ) # (\CONTROL_UNIT|ALU_FN~1_combout )))) ) + ( \ALU|adder_unit|_~32 ) + ( \ALU|adder_unit|_~31 )) +// \ALU|adder_unit|_~34 = CARRY(( !\rt_alu[18]~79_combout $ (!\REGS|Mux13~2_combout $ (((\CONTROL_UNIT|B~0_combout ) # (\CONTROL_UNIT|ALU_FN~1_combout )))) ) + ( \ALU|adder_unit|_~32 ) + ( \ALU|adder_unit|_~31 )) +// \ALU|adder_unit|_~35 = SHARE((\REGS|Mux13~2_combout & (!\rt_alu[18]~79_combout $ (((!\CONTROL_UNIT|ALU_FN~1_combout & !\CONTROL_UNIT|B~0_combout )))))) + + .dataa(!\CONTROL_UNIT|ALU_FN~1_combout ), + .datab(!\CONTROL_UNIT|B~0_combout ), + .datac(!\rt_alu[18]~79_combout ), + .datad(!\REGS|Mux13~2_combout ), + .datae(gnd), + .dataf(gnd), + .datag(gnd), + .cin(\ALU|adder_unit|_~31 ), + .sharein(\ALU|adder_unit|_~32 ), + .combout(), + .sumout(\ALU|adder_unit|OUT_1 [18]), + .cout(\ALU|adder_unit|_~34 ), + .shareout(\ALU|adder_unit|_~35 )); +// synopsys translate_off +defparam \ALU|adder_unit|OUT_1[18] .extended_lut = "off"; +defparam \ALU|adder_unit|OUT_1[18] .lut_mask = 64'h0000007800007887; +defparam \ALU|adder_unit|OUT_1[18] .shared_arith = "on"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y10_N27 +cyclonev_lcell_comb \ALU|adder_unit|OUT_1[19] ( +// Equation(s): +// \ALU|adder_unit|OUT_1 [19] = SUM(( !\ALU|adder_unit|operand[19]~6_combout $ (!\REGS|Mux12~2_combout ) ) + ( \ALU|adder_unit|_~35 ) + ( \ALU|adder_unit|_~34 )) +// \ALU|adder_unit|_~37 = CARRY(( !\ALU|adder_unit|operand[19]~6_combout $ (!\REGS|Mux12~2_combout ) ) + ( \ALU|adder_unit|_~35 ) + ( \ALU|adder_unit|_~34 )) +// \ALU|adder_unit|_~38 = SHARE((\ALU|adder_unit|operand[19]~6_combout & \REGS|Mux12~2_combout )) + + .dataa(gnd), + .datab(gnd), + .datac(!\ALU|adder_unit|operand[19]~6_combout ), + .datad(!\REGS|Mux12~2_combout ), + .datae(gnd), + .dataf(gnd), + .datag(gnd), + .cin(\ALU|adder_unit|_~34 ), + .sharein(\ALU|adder_unit|_~35 ), + .combout(), + .sumout(\ALU|adder_unit|OUT_1 [19]), + .cout(\ALU|adder_unit|_~37 ), + .shareout(\ALU|adder_unit|_~38 )); +// synopsys translate_off +defparam \ALU|adder_unit|OUT_1[19] .extended_lut = "off"; +defparam \ALU|adder_unit|OUT_1[19] .lut_mask = 64'h0000000F00000FF0; +defparam \ALU|adder_unit|OUT_1[19] .shared_arith = "on"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y9_N0 +cyclonev_lcell_comb \ALU|adder_unit|OUT_1[20] ( +// Equation(s): +// \ALU|adder_unit|OUT_1 [20] = SUM(( !\REGS|Mux11~2_combout $ (!\rt_alu[20]~100_combout $ (((\CONTROL_UNIT|B~0_combout ) # (\CONTROL_UNIT|ALU_FN~1_combout )))) ) + ( \ALU|adder_unit|_~38 ) + ( \ALU|adder_unit|_~37 )) +// \ALU|adder_unit|_~40 = CARRY(( !\REGS|Mux11~2_combout $ (!\rt_alu[20]~100_combout $ (((\CONTROL_UNIT|B~0_combout ) # (\CONTROL_UNIT|ALU_FN~1_combout )))) ) + ( \ALU|adder_unit|_~38 ) + ( \ALU|adder_unit|_~37 )) +// \ALU|adder_unit|_~41 = SHARE((\REGS|Mux11~2_combout & (!\rt_alu[20]~100_combout $ (((!\CONTROL_UNIT|ALU_FN~1_combout & !\CONTROL_UNIT|B~0_combout )))))) + + .dataa(!\CONTROL_UNIT|ALU_FN~1_combout ), + .datab(!\CONTROL_UNIT|B~0_combout ), + .datac(!\REGS|Mux11~2_combout ), + .datad(!\rt_alu[20]~100_combout ), + .datae(gnd), + .dataf(gnd), + .datag(gnd), + .cin(\ALU|adder_unit|_~37 ), + .sharein(\ALU|adder_unit|_~38 ), + .combout(), + .sumout(\ALU|adder_unit|OUT_1 [20]), + .cout(\ALU|adder_unit|_~40 ), + .shareout(\ALU|adder_unit|_~41 )); +// synopsys translate_off +defparam \ALU|adder_unit|OUT_1[20] .extended_lut = "off"; +defparam \ALU|adder_unit|OUT_1[20] .lut_mask = 64'h0000070800007887; +defparam \ALU|adder_unit|OUT_1[20] .shared_arith = "on"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y9_N3 +cyclonev_lcell_comb \ALU|adder_unit|OUT_1[21] ( +// Equation(s): +// \ALU|adder_unit|OUT_1 [21] = SUM(( !\ALU|adder_unit|operand[21]~7_combout $ (!\REGS|Mux10~2_combout ) ) + ( \ALU|adder_unit|_~41 ) + ( \ALU|adder_unit|_~40 )) +// \ALU|adder_unit|_~43 = CARRY(( !\ALU|adder_unit|operand[21]~7_combout $ (!\REGS|Mux10~2_combout ) ) + ( \ALU|adder_unit|_~41 ) + ( \ALU|adder_unit|_~40 )) +// \ALU|adder_unit|_~44 = SHARE((\ALU|adder_unit|operand[21]~7_combout & \REGS|Mux10~2_combout )) + + .dataa(gnd), + .datab(gnd), + .datac(!\ALU|adder_unit|operand[21]~7_combout ), + .datad(!\REGS|Mux10~2_combout ), + .datae(gnd), + .dataf(gnd), + .datag(gnd), + .cin(\ALU|adder_unit|_~40 ), + .sharein(\ALU|adder_unit|_~41 ), + .combout(), + .sumout(\ALU|adder_unit|OUT_1 [21]), + .cout(\ALU|adder_unit|_~43 ), + .shareout(\ALU|adder_unit|_~44 )); +// synopsys translate_off +defparam \ALU|adder_unit|OUT_1[21] .extended_lut = "off"; +defparam \ALU|adder_unit|OUT_1[21] .lut_mask = 64'h0000000F00000FF0; +defparam \ALU|adder_unit|OUT_1[21] .shared_arith = "on"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y9_N6 +cyclonev_lcell_comb \ALU|adder_unit|OUT_1[22] ( +// Equation(s): +// \ALU|adder_unit|OUT_1 [22] = SUM(( !\REGS|Mux9~2_combout $ (!\rt_alu[22]~121_combout $ (((\CONTROL_UNIT|B~0_combout ) # (\CONTROL_UNIT|ALU_FN~1_combout )))) ) + ( \ALU|adder_unit|_~44 ) + ( \ALU|adder_unit|_~43 )) +// \ALU|adder_unit|_~46 = CARRY(( !\REGS|Mux9~2_combout $ (!\rt_alu[22]~121_combout $ (((\CONTROL_UNIT|B~0_combout ) # (\CONTROL_UNIT|ALU_FN~1_combout )))) ) + ( \ALU|adder_unit|_~44 ) + ( \ALU|adder_unit|_~43 )) +// \ALU|adder_unit|_~47 = SHARE((\REGS|Mux9~2_combout & (!\rt_alu[22]~121_combout $ (((!\CONTROL_UNIT|ALU_FN~1_combout & !\CONTROL_UNIT|B~0_combout )))))) + + .dataa(!\CONTROL_UNIT|ALU_FN~1_combout ), + .datab(!\CONTROL_UNIT|B~0_combout ), + .datac(!\REGS|Mux9~2_combout ), + .datad(!\rt_alu[22]~121_combout ), + .datae(gnd), + .dataf(gnd), + .datag(gnd), + .cin(\ALU|adder_unit|_~43 ), + .sharein(\ALU|adder_unit|_~44 ), + .combout(), + .sumout(\ALU|adder_unit|OUT_1 [22]), + .cout(\ALU|adder_unit|_~46 ), + .shareout(\ALU|adder_unit|_~47 )); +// synopsys translate_off +defparam \ALU|adder_unit|OUT_1[22] .extended_lut = "off"; +defparam \ALU|adder_unit|OUT_1[22] .lut_mask = 64'h0000070800007887; +defparam \ALU|adder_unit|OUT_1[22] .shared_arith = "on"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y9_N9 +cyclonev_lcell_comb \ALU|adder_unit|OUT_1[23] ( +// Equation(s): +// \ALU|adder_unit|OUT_1 [23] = SUM(( !\REGS|Mux8~2_combout $ (!\ALU|adder_unit|operand[23]~8_combout ) ) + ( \ALU|adder_unit|_~47 ) + ( \ALU|adder_unit|_~46 )) +// \ALU|adder_unit|_~49 = CARRY(( !\REGS|Mux8~2_combout $ (!\ALU|adder_unit|operand[23]~8_combout ) ) + ( \ALU|adder_unit|_~47 ) + ( \ALU|adder_unit|_~46 )) +// \ALU|adder_unit|_~50 = SHARE((\REGS|Mux8~2_combout & \ALU|adder_unit|operand[23]~8_combout )) + + .dataa(gnd), + .datab(gnd), + .datac(!\REGS|Mux8~2_combout ), + .datad(!\ALU|adder_unit|operand[23]~8_combout ), + .datae(gnd), + .dataf(gnd), + .datag(gnd), + .cin(\ALU|adder_unit|_~46 ), + .sharein(\ALU|adder_unit|_~47 ), + .combout(), + .sumout(\ALU|adder_unit|OUT_1 [23]), + .cout(\ALU|adder_unit|_~49 ), + .shareout(\ALU|adder_unit|_~50 )); +// synopsys translate_off +defparam \ALU|adder_unit|OUT_1[23] .extended_lut = "off"; +defparam \ALU|adder_unit|OUT_1[23] .lut_mask = 64'h0000000F00000FF0; +defparam \ALU|adder_unit|OUT_1[23] .shared_arith = "on"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y9_N12 +cyclonev_lcell_comb \ALU|adder_unit|OUT_1[24] ( +// Equation(s): +// \ALU|adder_unit|OUT_1 [24] = SUM(( !\REGS|Mux7~2_combout $ (!\rt_alu[24]~142_combout $ (((\CONTROL_UNIT|B~0_combout ) # (\CONTROL_UNIT|ALU_FN~1_combout )))) ) + ( \ALU|adder_unit|_~50 ) + ( \ALU|adder_unit|_~49 )) +// \ALU|adder_unit|_~52 = CARRY(( !\REGS|Mux7~2_combout $ (!\rt_alu[24]~142_combout $ (((\CONTROL_UNIT|B~0_combout ) # (\CONTROL_UNIT|ALU_FN~1_combout )))) ) + ( \ALU|adder_unit|_~50 ) + ( \ALU|adder_unit|_~49 )) +// \ALU|adder_unit|_~53 = SHARE((\REGS|Mux7~2_combout & (!\rt_alu[24]~142_combout $ (((!\CONTROL_UNIT|ALU_FN~1_combout & !\CONTROL_UNIT|B~0_combout )))))) + + .dataa(!\CONTROL_UNIT|ALU_FN~1_combout ), + .datab(!\CONTROL_UNIT|B~0_combout ), + .datac(!\REGS|Mux7~2_combout ), + .datad(!\rt_alu[24]~142_combout ), + .datae(gnd), + .dataf(gnd), + .datag(gnd), + .cin(\ALU|adder_unit|_~49 ), + .sharein(\ALU|adder_unit|_~50 ), + .combout(), + .sumout(\ALU|adder_unit|OUT_1 [24]), + .cout(\ALU|adder_unit|_~52 ), + .shareout(\ALU|adder_unit|_~53 )); +// synopsys translate_off +defparam \ALU|adder_unit|OUT_1[24] .extended_lut = "off"; +defparam \ALU|adder_unit|OUT_1[24] .lut_mask = 64'h0000070800007887; +defparam \ALU|adder_unit|OUT_1[24] .shared_arith = "on"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y9_N15 +cyclonev_lcell_comb \ALU|adder_unit|OUT_1[25] ( +// Equation(s): +// \ALU|adder_unit|OUT_1 [25] = SUM(( !\REGS|Mux6~2_combout $ (!\ALU|adder_unit|operand[25]~9_combout ) ) + ( \ALU|adder_unit|_~53 ) + ( \ALU|adder_unit|_~52 )) +// \ALU|adder_unit|_~58 = CARRY(( !\REGS|Mux6~2_combout $ (!\ALU|adder_unit|operand[25]~9_combout ) ) + ( \ALU|adder_unit|_~53 ) + ( \ALU|adder_unit|_~52 )) +// \ALU|adder_unit|_~59 = SHARE((\REGS|Mux6~2_combout & \ALU|adder_unit|operand[25]~9_combout )) + + .dataa(gnd), + .datab(gnd), + .datac(!\REGS|Mux6~2_combout ), + .datad(!\ALU|adder_unit|operand[25]~9_combout ), + .datae(gnd), + .dataf(gnd), + .datag(gnd), + .cin(\ALU|adder_unit|_~52 ), + .sharein(\ALU|adder_unit|_~53 ), + .combout(), + .sumout(\ALU|adder_unit|OUT_1 [25]), + .cout(\ALU|adder_unit|_~58 ), + .shareout(\ALU|adder_unit|_~59 )); +// synopsys translate_off +defparam \ALU|adder_unit|OUT_1[25] .extended_lut = "off"; +defparam \ALU|adder_unit|OUT_1[25] .lut_mask = 64'h0000000F00000FF0; +defparam \ALU|adder_unit|OUT_1[25] .shared_arith = "on"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y9_N18 +cyclonev_lcell_comb \ALU|adder_unit|OUT_1[26] ( +// Equation(s): +// \ALU|adder_unit|OUT_1 [26] = SUM(( !\rt_alu[26]~181_combout $ (!\REGS|Mux5~2_combout $ (((\CONTROL_UNIT|B~0_combout ) # (\CONTROL_UNIT|ALU_FN~1_combout )))) ) + ( \ALU|adder_unit|_~59 ) + ( \ALU|adder_unit|_~58 )) +// \ALU|adder_unit|_~64 = CARRY(( !\rt_alu[26]~181_combout $ (!\REGS|Mux5~2_combout $ (((\CONTROL_UNIT|B~0_combout ) # (\CONTROL_UNIT|ALU_FN~1_combout )))) ) + ( \ALU|adder_unit|_~59 ) + ( \ALU|adder_unit|_~58 )) +// \ALU|adder_unit|_~65 = SHARE((\REGS|Mux5~2_combout & (!\rt_alu[26]~181_combout $ (((!\CONTROL_UNIT|ALU_FN~1_combout & !\CONTROL_UNIT|B~0_combout )))))) + + .dataa(!\CONTROL_UNIT|ALU_FN~1_combout ), + .datab(!\CONTROL_UNIT|B~0_combout ), + .datac(!\rt_alu[26]~181_combout ), + .datad(!\REGS|Mux5~2_combout ), + .datae(gnd), + .dataf(gnd), + .datag(gnd), + .cin(\ALU|adder_unit|_~58 ), + .sharein(\ALU|adder_unit|_~59 ), + .combout(), + .sumout(\ALU|adder_unit|OUT_1 [26]), + .cout(\ALU|adder_unit|_~64 ), + .shareout(\ALU|adder_unit|_~65 )); +// synopsys translate_off +defparam \ALU|adder_unit|OUT_1[26] .extended_lut = "off"; +defparam \ALU|adder_unit|OUT_1[26] .lut_mask = 64'h0000007800007887; +defparam \ALU|adder_unit|OUT_1[26] .shared_arith = "on"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y9_N21 +cyclonev_lcell_comb \ALU|adder_unit|OUT_1[27] ( +// Equation(s): +// \ALU|adder_unit|OUT_1 [27] = SUM(( !\ALU|adder_unit|operand[27]~11_combout $ (!\REGS|Mux4~2_combout ) ) + ( \ALU|adder_unit|_~65 ) + ( \ALU|adder_unit|_~64 )) +// \ALU|adder_unit|_~70 = CARRY(( !\ALU|adder_unit|operand[27]~11_combout $ (!\REGS|Mux4~2_combout ) ) + ( \ALU|adder_unit|_~65 ) + ( \ALU|adder_unit|_~64 )) +// \ALU|adder_unit|_~71 = SHARE((\ALU|adder_unit|operand[27]~11_combout & \REGS|Mux4~2_combout )) + + .dataa(gnd), + .datab(gnd), + .datac(!\ALU|adder_unit|operand[27]~11_combout ), + .datad(!\REGS|Mux4~2_combout ), + .datae(gnd), + .dataf(gnd), + .datag(gnd), + .cin(\ALU|adder_unit|_~64 ), + .sharein(\ALU|adder_unit|_~65 ), + .combout(), + .sumout(\ALU|adder_unit|OUT_1 [27]), + .cout(\ALU|adder_unit|_~70 ), + .shareout(\ALU|adder_unit|_~71 )); +// synopsys translate_off +defparam \ALU|adder_unit|OUT_1[27] .extended_lut = "off"; +defparam \ALU|adder_unit|OUT_1[27] .lut_mask = 64'h0000000F00000FF0; +defparam \ALU|adder_unit|OUT_1[27] .shared_arith = "on"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y9_N24 +cyclonev_lcell_comb \ALU|adder_unit|OUT_1[28] ( +// Equation(s): +// \ALU|adder_unit|OUT_1 [28] = SUM(( !\rt_alu[28]~221_combout $ (!\REGS|Mux3~2_combout $ (((\CONTROL_UNIT|B~0_combout ) # (\CONTROL_UNIT|ALU_FN~1_combout )))) ) + ( \ALU|adder_unit|_~71 ) + ( \ALU|adder_unit|_~70 )) +// \ALU|adder_unit|_~76 = CARRY(( !\rt_alu[28]~221_combout $ (!\REGS|Mux3~2_combout $ (((\CONTROL_UNIT|B~0_combout ) # (\CONTROL_UNIT|ALU_FN~1_combout )))) ) + ( \ALU|adder_unit|_~71 ) + ( \ALU|adder_unit|_~70 )) +// \ALU|adder_unit|_~77 = SHARE((\REGS|Mux3~2_combout & (!\rt_alu[28]~221_combout $ (((!\CONTROL_UNIT|ALU_FN~1_combout & !\CONTROL_UNIT|B~0_combout )))))) + + .dataa(!\CONTROL_UNIT|ALU_FN~1_combout ), + .datab(!\CONTROL_UNIT|B~0_combout ), + .datac(!\rt_alu[28]~221_combout ), + .datad(!\REGS|Mux3~2_combout ), + .datae(gnd), + .dataf(gnd), + .datag(gnd), + .cin(\ALU|adder_unit|_~70 ), + .sharein(\ALU|adder_unit|_~71 ), + .combout(), + .sumout(\ALU|adder_unit|OUT_1 [28]), + .cout(\ALU|adder_unit|_~76 ), + .shareout(\ALU|adder_unit|_~77 )); +// synopsys translate_off +defparam \ALU|adder_unit|OUT_1[28] .extended_lut = "off"; +defparam \ALU|adder_unit|OUT_1[28] .lut_mask = 64'h0000007800007887; +defparam \ALU|adder_unit|OUT_1[28] .shared_arith = "on"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y9_N27 +cyclonev_lcell_comb \ALU|adder_unit|OUT_1[29] ( +// Equation(s): +// \ALU|adder_unit|OUT_1 [29] = SUM(( !\REGS|Mux2~2_combout $ (!\ALU|adder_unit|operand[29]~13_combout ) ) + ( \ALU|adder_unit|_~77 ) + ( \ALU|adder_unit|_~76 )) +// \ALU|adder_unit|_~82 = CARRY(( !\REGS|Mux2~2_combout $ (!\ALU|adder_unit|operand[29]~13_combout ) ) + ( \ALU|adder_unit|_~77 ) + ( \ALU|adder_unit|_~76 )) +// \ALU|adder_unit|_~83 = SHARE((\REGS|Mux2~2_combout & \ALU|adder_unit|operand[29]~13_combout )) + + .dataa(gnd), + .datab(gnd), + .datac(!\REGS|Mux2~2_combout ), + .datad(!\ALU|adder_unit|operand[29]~13_combout ), + .datae(gnd), + .dataf(gnd), + .datag(gnd), + .cin(\ALU|adder_unit|_~76 ), + .sharein(\ALU|adder_unit|_~77 ), + .combout(), + .sumout(\ALU|adder_unit|OUT_1 [29]), + .cout(\ALU|adder_unit|_~82 ), + .shareout(\ALU|adder_unit|_~83 )); +// synopsys translate_off +defparam \ALU|adder_unit|OUT_1[29] .extended_lut = "off"; +defparam \ALU|adder_unit|OUT_1[29] .lut_mask = 64'h0000000F00000FF0; +defparam \ALU|adder_unit|OUT_1[29] .shared_arith = "on"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y9_N30 +cyclonev_lcell_comb \ALU|adder_unit|OUT_1[30] ( +// Equation(s): +// \ALU|adder_unit|OUT_1 [30] = SUM(( !\rt_alu[30]~261_combout $ (!\REGS|Mux1~2_combout $ (((\CONTROL_UNIT|B~0_combout ) # (\CONTROL_UNIT|ALU_FN~1_combout )))) ) + ( \ALU|adder_unit|_~83 ) + ( \ALU|adder_unit|_~82 )) +// \ALU|adder_unit|_~88 = CARRY(( !\rt_alu[30]~261_combout $ (!\REGS|Mux1~2_combout $ (((\CONTROL_UNIT|B~0_combout ) # (\CONTROL_UNIT|ALU_FN~1_combout )))) ) + ( \ALU|adder_unit|_~83 ) + ( \ALU|adder_unit|_~82 )) +// \ALU|adder_unit|_~89 = SHARE((\REGS|Mux1~2_combout & (!\rt_alu[30]~261_combout $ (((!\CONTROL_UNIT|ALU_FN~1_combout & !\CONTROL_UNIT|B~0_combout )))))) + + .dataa(!\CONTROL_UNIT|ALU_FN~1_combout ), + .datab(!\CONTROL_UNIT|B~0_combout ), + .datac(!\rt_alu[30]~261_combout ), + .datad(!\REGS|Mux1~2_combout ), + .datae(gnd), + .dataf(gnd), + .datag(gnd), + .cin(\ALU|adder_unit|_~82 ), + .sharein(\ALU|adder_unit|_~83 ), + .combout(), + .sumout(\ALU|adder_unit|OUT_1 [30]), + .cout(\ALU|adder_unit|_~88 ), + .shareout(\ALU|adder_unit|_~89 )); +// synopsys translate_off +defparam \ALU|adder_unit|OUT_1[30] .extended_lut = "off"; +defparam \ALU|adder_unit|OUT_1[30] .lut_mask = 64'h0000007800007887; +defparam \ALU|adder_unit|OUT_1[30] .shared_arith = "on"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y9_N33 +cyclonev_lcell_comb \ALU|adder_unit|OUT_1[31] ( +// Equation(s): +// \ALU|adder_unit|OUT_1 [31] = SUM(( !\REGS|Mux0~2_combout $ (!\ALU|adder_unit|operand[31]~0_combout ) ) + ( \ALU|adder_unit|_~89 ) + ( \ALU|adder_unit|_~88 )) +// \ALU|adder_unit|_~94 = CARRY(( !\REGS|Mux0~2_combout $ (!\ALU|adder_unit|operand[31]~0_combout ) ) + ( \ALU|adder_unit|_~89 ) + ( \ALU|adder_unit|_~88 )) +// \ALU|adder_unit|_~95 = SHARE((\REGS|Mux0~2_combout & \ALU|adder_unit|operand[31]~0_combout )) + + .dataa(gnd), + .datab(gnd), + .datac(!\REGS|Mux0~2_combout ), + .datad(!\ALU|adder_unit|operand[31]~0_combout ), + .datae(gnd), + .dataf(gnd), + .datag(gnd), + .cin(\ALU|adder_unit|_~88 ), + .sharein(\ALU|adder_unit|_~89 ), + .combout(), + .sumout(\ALU|adder_unit|OUT_1 [31]), + .cout(\ALU|adder_unit|_~94 ), + .shareout(\ALU|adder_unit|_~95 )); +// synopsys translate_off +defparam \ALU|adder_unit|OUT_1[31] .extended_lut = "off"; +defparam \ALU|adder_unit|OUT_1[31] .lut_mask = 64'h0000000F00000FF0; +defparam \ALU|adder_unit|OUT_1[31] .shared_arith = "on"; +// synopsys translate_on + +// Location: LABCELL_X27_Y9_N27 +cyclonev_lcell_comb \rd[31]~455 ( +// Equation(s): +// \rd[31]~455_combout = ( !\CONTROL_UNIT|M2R[0]~0_combout & ( \ALU|adder_unit|OUT_1 [31] & ( (!\ALU|Mux29~0_combout ) # (\ALU|Mux0~0_combout ) ) ) ) # ( !\CONTROL_UNIT|M2R[0]~0_combout & ( !\ALU|adder_unit|OUT_1 [31] & ( \ALU|Mux0~0_combout ) ) ) + + .dataa(gnd), + .datab(!\ALU|Mux29~0_combout ), + .datac(!\ALU|Mux0~0_combout ), + .datad(gnd), + .datae(!\CONTROL_UNIT|M2R[0]~0_combout ), + .dataf(!\ALU|adder_unit|OUT_1 [31]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[31]~455_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[31]~455 .extended_lut = "off"; +defparam \rd[31]~455 .lut_mask = 64'h0F0F0000CFCF0000; +defparam \rd[31]~455 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X33_Y9_N11 +dffeas \REGS|regs[8][31] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[31]~455_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~24_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[8][31]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[8][31] .is_wysiwyg = "true"; +defparam \REGS|regs[8][31] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X33_Y9_N57 +cyclonev_lcell_comb \REGS|Mux0~1 ( +// Equation(s): +// \REGS|Mux0~1_combout = ( \ROM|mem~15_combout & ( (\ROM|mem~0_combout & \REGS|regs[9][31]~DUPLICATE_q ) ) ) # ( !\ROM|mem~15_combout & ( (\ROM|mem~0_combout & \REGS|regs[8][31]~q ) ) ) + + .dataa(gnd), + .datab(!\ROM|mem~0_combout ), + .datac(!\REGS|regs[8][31]~q ), + .datad(!\REGS|regs[9][31]~DUPLICATE_q ), + .datae(gnd), + .dataf(!\ROM|mem~15_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux0~1_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux0~1 .extended_lut = "off"; +defparam \REGS|Mux0~1 .lut_mask = 64'h0303030300330033; +defparam \REGS|Mux0~1 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X33_Y9_N6 +cyclonev_lcell_comb \REGS|Mux0~0 ( +// Equation(s): +// \REGS|Mux0~0_combout = ( \REGS|Mux32~3_combout & ( \REGS|Mux32~0_combout & ( (!\ROM|mem~16_combout & ((!\ROM|mem~9_combout ) # ((\REGS|Mux32~2_combout )))) # (\ROM|mem~16_combout & (((\REGS|Mux32~1_combout )) # (\ROM|mem~9_combout ))) ) ) ) # ( +// !\REGS|Mux32~3_combout & ( \REGS|Mux32~0_combout & ( (!\ROM|mem~16_combout & ((!\ROM|mem~9_combout ) # ((\REGS|Mux32~2_combout )))) # (\ROM|mem~16_combout & (!\ROM|mem~9_combout & (\REGS|Mux32~1_combout ))) ) ) ) # ( \REGS|Mux32~3_combout & ( +// !\REGS|Mux32~0_combout & ( (!\ROM|mem~16_combout & (\ROM|mem~9_combout & ((\REGS|Mux32~2_combout )))) # (\ROM|mem~16_combout & (((\REGS|Mux32~1_combout )) # (\ROM|mem~9_combout ))) ) ) ) # ( !\REGS|Mux32~3_combout & ( !\REGS|Mux32~0_combout & ( +// (!\ROM|mem~16_combout & (\ROM|mem~9_combout & ((\REGS|Mux32~2_combout )))) # (\ROM|mem~16_combout & (!\ROM|mem~9_combout & (\REGS|Mux32~1_combout ))) ) ) ) + + .dataa(!\ROM|mem~16_combout ), + .datab(!\ROM|mem~9_combout ), + .datac(!\REGS|Mux32~1_combout ), + .datad(!\REGS|Mux32~2_combout ), + .datae(!\REGS|Mux32~3_combout ), + .dataf(!\REGS|Mux32~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux0~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux0~0 .extended_lut = "off"; +defparam \REGS|Mux0~0 .lut_mask = 64'h042615378CAE9DBF; +defparam \REGS|Mux0~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X33_Y9_N12 +cyclonev_lcell_comb \REGS|Mux0~2 ( +// Equation(s): +// \REGS|Mux0~2_combout = ( \REGS|Mux0~0_combout & ( (((\ROM|mem~9_combout & \REGS|Mux32~4_combout )) # (\ROM|mem~17_combout )) # (\REGS|Mux0~1_combout ) ) ) # ( !\REGS|Mux0~0_combout & ( (!\ROM|mem~17_combout & (((\ROM|mem~9_combout & +// \REGS|Mux32~4_combout )) # (\REGS|Mux0~1_combout ))) ) ) + + .dataa(!\ROM|mem~9_combout ), + .datab(!\REGS|Mux0~1_combout ), + .datac(!\ROM|mem~17_combout ), + .datad(!\REGS|Mux32~4_combout ), + .datae(gnd), + .dataf(!\REGS|Mux0~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux0~2_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux0~2 .extended_lut = "off"; +defparam \REGS|Mux0~2 .lut_mask = 64'h307030703F7F3F7F; +defparam \REGS|Mux0~2 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y9_N36 +cyclonev_lcell_comb \ALU|adder_unit|COUT[0] ( +// Equation(s): +// \ALU|adder_unit|COUT [0] = SUM(( GND ) + ( \ALU|adder_unit|_~95 ) + ( \ALU|adder_unit|_~94 )) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(gnd), + .datag(gnd), + .cin(\ALU|adder_unit|_~94 ), + .sharein(\ALU|adder_unit|_~95 ), + .combout(), + .sumout(\ALU|adder_unit|COUT [0]), + .cout(), + .shareout()); +// synopsys translate_off +defparam \ALU|adder_unit|COUT[0] .extended_lut = "off"; +defparam \ALU|adder_unit|COUT[0] .lut_mask = 64'h0000000000000000; +defparam \ALU|adder_unit|COUT[0] .shared_arith = "on"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y9_N42 +cyclonev_lcell_comb \RAM|Decoder0~4 ( +// Equation(s): +// \RAM|Decoder0~4_combout = ( \ALU|Mux31~2_combout & ( \RAM|Decoder0~2_combout & ( (!\ALU|adder_unit|COUT [0]) # (((\ALU|Mux31~1_combout & !\ALU|OUT_1~0_combout )) # (\ALU|Mux31~0_combout )) ) ) ) # ( !\ALU|Mux31~2_combout & ( \RAM|Decoder0~2_combout +// & ( ((\ALU|Mux31~1_combout & (!\ALU|adder_unit|COUT [0] $ (!\ALU|OUT_1~0_combout )))) # (\ALU|Mux31~0_combout ) ) ) ) + + .dataa(!\ALU|adder_unit|COUT [0]), + .datab(!\ALU|Mux31~1_combout ), + .datac(!\ALU|OUT_1~0_combout ), + .datad(!\ALU|Mux31~0_combout ), + .datae(!\ALU|Mux31~2_combout ), + .dataf(!\RAM|Decoder0~2_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|Decoder0~4_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|Decoder0~4 .extended_lut = "off"; +defparam \RAM|Decoder0~4 .lut_mask = 64'h0000000012FFBAFF; +defparam \RAM|Decoder0~4 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y9_N54 +cyclonev_lcell_comb \RAM|Decoder0~45 ( +// Equation(s): +// \RAM|Decoder0~45_combout = (\ALU|Mux28~1_combout & (\RAM|Decoder0~4_combout & (\ALU|Mux30~1_combout & !\ALU|Mux27~1_combout ))) + + .dataa(!\ALU|Mux28~1_combout ), + .datab(!\RAM|Decoder0~4_combout ), + .datac(!\ALU|Mux30~1_combout ), + .datad(!\ALU|Mux27~1_combout ), + .datae(gnd), + .dataf(gnd), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|Decoder0~45_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|Decoder0~45 .extended_lut = "off"; +defparam \RAM|Decoder0~45 .lut_mask = 64'h0100010001000100; +defparam \RAM|Decoder0~45 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X49_Y9_N3 +cyclonev_lcell_comb \RAM|mem[241][4]~212 ( +// Equation(s): +// \RAM|mem[241][4]~212_combout = ( \RAM|Decoder0~11_combout & ( \RAM|Decoder0~45_combout & ( (!\ALU|Mux24~1_combout ) # (\rst[0]~input_o ) ) ) ) # ( !\RAM|Decoder0~11_combout & ( \RAM|Decoder0~45_combout & ( \rst[0]~input_o ) ) ) # ( +// \RAM|Decoder0~11_combout & ( !\RAM|Decoder0~45_combout & ( \rst[0]~input_o ) ) ) # ( !\RAM|Decoder0~11_combout & ( !\RAM|Decoder0~45_combout & ( \rst[0]~input_o ) ) ) + + .dataa(!\rst[0]~input_o ), + .datab(gnd), + .datac(gnd), + .datad(!\ALU|Mux24~1_combout ), + .datae(!\RAM|Decoder0~11_combout ), + .dataf(!\RAM|Decoder0~45_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[241][4]~212_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[241][4]~212 .extended_lut = "off"; +defparam \RAM|mem[241][4]~212 .lut_mask = 64'h555555555555FF55; +defparam \RAM|mem[241][4]~212 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X50_Y7_N34 +dffeas \RAM|mem[241][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[241][1]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[241][4]~212_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[241][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[241][1] .is_wysiwyg = "true"; +defparam \RAM|mem[241][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X48_Y8_N13 +dffeas \RAM|mem[249][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[249][1]~220_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[249][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[249][1] .is_wysiwyg = "true"; +defparam \RAM|mem[249][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X48_Y11_N52 +dffeas \RAM|mem[245][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[245][0]~216_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[245][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[245][1] .is_wysiwyg = "true"; +defparam \RAM|mem[245][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X51_Y10_N38 +dffeas \RAM|mem[253][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[253][2]~224_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[253][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[253][1] .is_wysiwyg = "true"; +defparam \RAM|mem[253][1] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X51_Y10_N36 +cyclonev_lcell_comb \rd[1]~104 ( +// Equation(s): +// \rd[1]~104_combout = ( \RAM|mem[253][1]~q & ( \ALU|Mux29~3_combout & ( (!\ALU|Mux28~1_combout & ((\RAM|mem[249][1]~q ))) # (\ALU|Mux28~1_combout & (\RAM|mem[241][1]~q )) ) ) ) # ( !\RAM|mem[253][1]~q & ( \ALU|Mux29~3_combout & ( +// (!\ALU|Mux28~1_combout & ((\RAM|mem[249][1]~q ))) # (\ALU|Mux28~1_combout & (\RAM|mem[241][1]~q )) ) ) ) # ( \RAM|mem[253][1]~q & ( !\ALU|Mux29~3_combout & ( (!\ALU|Mux28~1_combout ) # (\RAM|mem[245][1]~q ) ) ) ) # ( !\RAM|mem[253][1]~q & ( +// !\ALU|Mux29~3_combout & ( (\RAM|mem[245][1]~q & \ALU|Mux28~1_combout ) ) ) ) + + .dataa(!\RAM|mem[241][1]~q ), + .datab(!\RAM|mem[249][1]~q ), + .datac(!\RAM|mem[245][1]~q ), + .datad(!\ALU|Mux28~1_combout ), + .datae(!\RAM|mem[253][1]~q ), + .dataf(!\ALU|Mux29~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[1]~104_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[1]~104 .extended_lut = "off"; +defparam \rd[1]~104 .lut_mask = 64'h000FFF0F33553355; +defparam \rd[1]~104 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X50_Y6_N39 +cyclonev_lcell_comb \RAM|mem[240][1]~feeder ( +// Equation(s): +// \RAM|mem[240][1]~feeder_combout = ( \RAM|mem~257_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~257_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[240][1]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[240][1]~feeder .extended_lut = "off"; +defparam \RAM|mem[240][1]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[240][1]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X50_Y6_N40 +dffeas \RAM|mem[240][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[240][1]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[240][1]~196_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[240][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[240][1] .is_wysiwyg = "true"; +defparam \RAM|mem[240][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X48_Y7_N40 +dffeas \RAM|mem[248][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[248][3]~204_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[248][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[248][1] .is_wysiwyg = "true"; +defparam \RAM|mem[248][1] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X50_Y6_N42 +cyclonev_lcell_comb \RAM|mem[244][1]~feeder ( +// Equation(s): +// \RAM|mem[244][1]~feeder_combout = ( \RAM|mem~257_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~257_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[244][1]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[244][1]~feeder .extended_lut = "off"; +defparam \RAM|mem[244][1]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[244][1]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X50_Y6_N43 +dffeas \RAM|mem[244][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[244][1]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[244][2]~200_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[244][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[244][1] .is_wysiwyg = "true"; +defparam \RAM|mem[244][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X51_Y10_N23 +dffeas \RAM|mem[252][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[252][3]~208_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[252][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[252][1] .is_wysiwyg = "true"; +defparam \RAM|mem[252][1] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X45_Y9_N18 +cyclonev_lcell_comb \rd[1]~103 ( +// Equation(s): +// \rd[1]~103_combout = ( \ALU|Mux28~1_combout & ( \ALU|Mux29~3_combout & ( \RAM|mem[240][1]~q ) ) ) # ( !\ALU|Mux28~1_combout & ( \ALU|Mux29~3_combout & ( \RAM|mem[248][1]~q ) ) ) # ( \ALU|Mux28~1_combout & ( !\ALU|Mux29~3_combout & ( +// \RAM|mem[244][1]~q ) ) ) # ( !\ALU|Mux28~1_combout & ( !\ALU|Mux29~3_combout & ( \RAM|mem[252][1]~q ) ) ) + + .dataa(!\RAM|mem[240][1]~q ), + .datab(!\RAM|mem[248][1]~q ), + .datac(!\RAM|mem[244][1]~q ), + .datad(!\RAM|mem[252][1]~q ), + .datae(!\ALU|Mux28~1_combout ), + .dataf(!\ALU|Mux29~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[1]~103_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[1]~103 .extended_lut = "off"; +defparam \rd[1]~103 .lut_mask = 64'h00FF0F0F33335555; +defparam \rd[1]~103 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X43_Y8_N16 +dffeas \RAM|mem[247][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[247][4]~254_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[247][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[247][1] .is_wysiwyg = "true"; +defparam \RAM|mem[247][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X48_Y10_N35 +dffeas \RAM|mem[251][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[251][2]~255_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[251][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[251][1] .is_wysiwyg = "true"; +defparam \RAM|mem[251][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X47_Y8_N10 +dffeas \RAM|mem[243][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[243][2]~253_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[243][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[243][1] .is_wysiwyg = "true"; +defparam \RAM|mem[243][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X54_Y10_N37 +dffeas \RAM|mem[255][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[255][3]~256_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[255][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[255][1] .is_wysiwyg = "true"; +defparam \RAM|mem[255][1] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X47_Y9_N51 +cyclonev_lcell_comb \rd[1]~106 ( +// Equation(s): +// \rd[1]~106_combout = ( \ALU|Mux29~3_combout & ( \ALU|Mux28~1_combout & ( \RAM|mem[243][1]~q ) ) ) # ( !\ALU|Mux29~3_combout & ( \ALU|Mux28~1_combout & ( \RAM|mem[247][1]~q ) ) ) # ( \ALU|Mux29~3_combout & ( !\ALU|Mux28~1_combout & ( +// \RAM|mem[251][1]~q ) ) ) # ( !\ALU|Mux29~3_combout & ( !\ALU|Mux28~1_combout & ( \RAM|mem[255][1]~q ) ) ) + + .dataa(!\RAM|mem[247][1]~q ), + .datab(!\RAM|mem[251][1]~q ), + .datac(!\RAM|mem[243][1]~q ), + .datad(!\RAM|mem[255][1]~q ), + .datae(!\ALU|Mux29~3_combout ), + .dataf(!\ALU|Mux28~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[1]~106_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[1]~106 .extended_lut = "off"; +defparam \rd[1]~106 .lut_mask = 64'h00FF333355550F0F; +defparam \rd[1]~106 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X47_Y8_N44 +dffeas \RAM|mem[254][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[254][4]~240_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[254][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[254][1] .is_wysiwyg = "true"; +defparam \RAM|mem[254][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X49_Y8_N59 +dffeas \RAM|mem[246][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[246][2]~232_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[246][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[246][1] .is_wysiwyg = "true"; +defparam \RAM|mem[246][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X49_Y8_N28 +dffeas \RAM|mem[250][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[250][4]~236_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[250][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[250][1] .is_wysiwyg = "true"; +defparam \RAM|mem[250][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X47_Y8_N31 +dffeas \RAM|mem[242][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[242][0]~228_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[242][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[242][1] .is_wysiwyg = "true"; +defparam \RAM|mem[242][1] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X48_Y8_N21 +cyclonev_lcell_comb \rd[1]~105 ( +// Equation(s): +// \rd[1]~105_combout = ( \ALU|Mux29~3_combout & ( \ALU|Mux28~1_combout & ( \RAM|mem[242][1]~q ) ) ) # ( !\ALU|Mux29~3_combout & ( \ALU|Mux28~1_combout & ( \RAM|mem[246][1]~q ) ) ) # ( \ALU|Mux29~3_combout & ( !\ALU|Mux28~1_combout & ( +// \RAM|mem[250][1]~q ) ) ) # ( !\ALU|Mux29~3_combout & ( !\ALU|Mux28~1_combout & ( \RAM|mem[254][1]~q ) ) ) + + .dataa(!\RAM|mem[254][1]~q ), + .datab(!\RAM|mem[246][1]~q ), + .datac(!\RAM|mem[250][1]~q ), + .datad(!\RAM|mem[242][1]~q ), + .datae(!\ALU|Mux29~3_combout ), + .dataf(!\ALU|Mux28~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[1]~105_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[1]~105 .extended_lut = "off"; +defparam \rd[1]~105 .lut_mask = 64'h55550F0F333300FF; +defparam \rd[1]~105 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X43_Y9_N54 +cyclonev_lcell_comb \rd[1]~107 ( +// Equation(s): +// \rd[1]~107_combout = ( \rd[1]~105_combout & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout ) # (\rd[1]~103_combout ) ) ) ) # ( !\rd[1]~105_combout & ( \ALU|Mux31~3_combout & ( (\ALU|Mux30~1_combout & \rd[1]~103_combout ) ) ) ) # ( +// \rd[1]~105_combout & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & ((\rd[1]~106_combout ))) # (\ALU|Mux30~1_combout & (\rd[1]~104_combout )) ) ) ) # ( !\rd[1]~105_combout & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & +// ((\rd[1]~106_combout ))) # (\ALU|Mux30~1_combout & (\rd[1]~104_combout )) ) ) ) + + .dataa(!\rd[1]~104_combout ), + .datab(!\ALU|Mux30~1_combout ), + .datac(!\rd[1]~103_combout ), + .datad(!\rd[1]~106_combout ), + .datae(!\rd[1]~105_combout ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[1]~107_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[1]~107 .extended_lut = "off"; +defparam \rd[1]~107 .lut_mask = 64'h11DD11DD0303CFCF; +defparam \rd[1]~107 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X53_Y12_N31 +dffeas \RAM|mem[205][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[205][3]~221_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[205][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[205][1] .is_wysiwyg = "true"; +defparam \RAM|mem[205][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X53_Y12_N49 +dffeas \RAM|mem[201][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[201][4]~217_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[201][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[201][1] .is_wysiwyg = "true"; +defparam \RAM|mem[201][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X48_Y11_N37 +dffeas \RAM|mem[197][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[197][1]~213_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[197][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[197][1] .is_wysiwyg = "true"; +defparam \RAM|mem[197][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X42_Y9_N34 +dffeas \RAM|mem[193][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[193][1]~209_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[193][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[193][1] .is_wysiwyg = "true"; +defparam \RAM|mem[193][1] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X51_Y11_N57 +cyclonev_lcell_comb \rd[1]~89 ( +// Equation(s): +// \rd[1]~89_combout = ( \ALU|Mux28~1_combout & ( \ALU|Mux29~3_combout & ( \RAM|mem[193][1]~q ) ) ) # ( !\ALU|Mux28~1_combout & ( \ALU|Mux29~3_combout & ( \RAM|mem[201][1]~q ) ) ) # ( \ALU|Mux28~1_combout & ( !\ALU|Mux29~3_combout & ( +// \RAM|mem[197][1]~q ) ) ) # ( !\ALU|Mux28~1_combout & ( !\ALU|Mux29~3_combout & ( \RAM|mem[205][1]~q ) ) ) + + .dataa(!\RAM|mem[205][1]~q ), + .datab(!\RAM|mem[201][1]~q ), + .datac(!\RAM|mem[197][1]~q ), + .datad(!\RAM|mem[193][1]~q ), + .datae(!\ALU|Mux28~1_combout ), + .dataf(!\ALU|Mux29~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[1]~89_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[1]~89 .extended_lut = "off"; +defparam \rd[1]~89 .lut_mask = 64'h55550F0F333300FF; +defparam \rd[1]~89 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X48_Y13_N59 +dffeas \RAM|mem[203][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[203][4]~243_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[203][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[203][1] .is_wysiwyg = "true"; +defparam \RAM|mem[203][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X49_Y13_N47 +dffeas \RAM|mem[195][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[195][0]~241_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[195][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[195][1] .is_wysiwyg = "true"; +defparam \RAM|mem[195][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X49_Y10_N46 +dffeas \RAM|mem[199][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[199][3]~242_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[199][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[199][1] .is_wysiwyg = "true"; +defparam \RAM|mem[199][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X49_Y13_N26 +dffeas \RAM|mem[207][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[207][0]~244_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[207][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[207][1] .is_wysiwyg = "true"; +defparam \RAM|mem[207][1] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X49_Y13_N24 +cyclonev_lcell_comb \rd[1]~91 ( +// Equation(s): +// \rd[1]~91_combout = ( \RAM|mem[207][1]~q & ( \ALU|Mux29~3_combout & ( (!\ALU|Mux28~1_combout & (\RAM|mem[203][1]~q )) # (\ALU|Mux28~1_combout & ((\RAM|mem[195][1]~q ))) ) ) ) # ( !\RAM|mem[207][1]~q & ( \ALU|Mux29~3_combout & ( +// (!\ALU|Mux28~1_combout & (\RAM|mem[203][1]~q )) # (\ALU|Mux28~1_combout & ((\RAM|mem[195][1]~q ))) ) ) ) # ( \RAM|mem[207][1]~q & ( !\ALU|Mux29~3_combout & ( (!\ALU|Mux28~1_combout ) # (\RAM|mem[199][1]~q ) ) ) ) # ( !\RAM|mem[207][1]~q & ( +// !\ALU|Mux29~3_combout & ( (\ALU|Mux28~1_combout & \RAM|mem[199][1]~q ) ) ) ) + + .dataa(!\RAM|mem[203][1]~q ), + .datab(!\RAM|mem[195][1]~q ), + .datac(!\ALU|Mux28~1_combout ), + .datad(!\RAM|mem[199][1]~q ), + .datae(!\RAM|mem[207][1]~q ), + .dataf(!\ALU|Mux29~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[1]~91_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[1]~91 .extended_lut = "off"; +defparam \rd[1]~91 .lut_mask = 64'h000FF0FF53535353; +defparam \rd[1]~91 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X53_Y8_N49 +dffeas \RAM|mem[204][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[204][1]~205_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[204][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[204][1] .is_wysiwyg = "true"; +defparam \RAM|mem[204][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X49_Y9_N23 +dffeas \RAM|mem[192][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[192][3]~193_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[192][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[192][1] .is_wysiwyg = "true"; +defparam \RAM|mem[192][1] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X54_Y7_N33 +cyclonev_lcell_comb \RAM|mem[200][1]~feeder ( +// Equation(s): +// \RAM|mem[200][1]~feeder_combout = ( \RAM|mem~257_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~257_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[200][1]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[200][1]~feeder .extended_lut = "off"; +defparam \RAM|mem[200][1]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[200][1]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X54_Y7_N34 +dffeas \RAM|mem[200][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[200][1]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[200][2]~201_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[200][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[200][1] .is_wysiwyg = "true"; +defparam \RAM|mem[200][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X49_Y10_N2 +dffeas \RAM|mem[196][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[196][0]~197_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[196][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[196][1] .is_wysiwyg = "true"; +defparam \RAM|mem[196][1] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X49_Y10_N0 +cyclonev_lcell_comb \rd[1]~88 ( +// Equation(s): +// \rd[1]~88_combout = ( \RAM|mem[196][1]~q & ( \ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout ) # (\RAM|mem[192][1]~q ) ) ) ) # ( !\RAM|mem[196][1]~q & ( \ALU|Mux28~1_combout & ( (\RAM|mem[192][1]~q & \ALU|Mux29~3_combout ) ) ) ) # ( +// \RAM|mem[196][1]~q & ( !\ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout & (\RAM|mem[204][1]~q )) # (\ALU|Mux29~3_combout & ((\RAM|mem[200][1]~q ))) ) ) ) # ( !\RAM|mem[196][1]~q & ( !\ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout & +// (\RAM|mem[204][1]~q )) # (\ALU|Mux29~3_combout & ((\RAM|mem[200][1]~q ))) ) ) ) + + .dataa(!\RAM|mem[204][1]~q ), + .datab(!\RAM|mem[192][1]~q ), + .datac(!\ALU|Mux29~3_combout ), + .datad(!\RAM|mem[200][1]~q ), + .datae(!\RAM|mem[196][1]~q ), + .dataf(!\ALU|Mux28~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[1]~88_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[1]~88 .extended_lut = "off"; +defparam \rd[1]~88 .lut_mask = 64'h505F505F0303F3F3; +defparam \rd[1]~88 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X53_Y10_N57 +cyclonev_lcell_comb \RAM|mem[202][1]~feeder ( +// Equation(s): +// \RAM|mem[202][1]~feeder_combout = ( \RAM|mem~257_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~257_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[202][1]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[202][1]~feeder .extended_lut = "off"; +defparam \RAM|mem[202][1]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[202][1]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X53_Y10_N59 +dffeas \RAM|mem[202][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[202][1]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[202][4]~233_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[202][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[202][1] .is_wysiwyg = "true"; +defparam \RAM|mem[202][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X54_Y10_N1 +dffeas \RAM|mem[206][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[206][0]~237_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[206][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[206][1] .is_wysiwyg = "true"; +defparam \RAM|mem[206][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X49_Y9_N58 +dffeas \RAM|mem[194][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[194][4]~225_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[194][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[194][1] .is_wysiwyg = "true"; +defparam \RAM|mem[194][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X49_Y10_N16 +dffeas \RAM|mem[198][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[198][3]~229_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[198][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[198][1] .is_wysiwyg = "true"; +defparam \RAM|mem[198][1] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X46_Y10_N42 +cyclonev_lcell_comb \rd[1]~90 ( +// Equation(s): +// \rd[1]~90_combout = ( \ALU|Mux29~3_combout & ( \ALU|Mux28~1_combout & ( \RAM|mem[194][1]~q ) ) ) # ( !\ALU|Mux29~3_combout & ( \ALU|Mux28~1_combout & ( \RAM|mem[198][1]~q ) ) ) # ( \ALU|Mux29~3_combout & ( !\ALU|Mux28~1_combout & ( +// \RAM|mem[202][1]~q ) ) ) # ( !\ALU|Mux29~3_combout & ( !\ALU|Mux28~1_combout & ( \RAM|mem[206][1]~q ) ) ) + + .dataa(!\RAM|mem[202][1]~q ), + .datab(!\RAM|mem[206][1]~q ), + .datac(!\RAM|mem[194][1]~q ), + .datad(!\RAM|mem[198][1]~q ), + .datae(!\ALU|Mux29~3_combout ), + .dataf(!\ALU|Mux28~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[1]~90_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[1]~90 .extended_lut = "off"; +defparam \rd[1]~90 .lut_mask = 64'h3333555500FF0F0F; +defparam \rd[1]~90 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X43_Y9_N48 +cyclonev_lcell_comb \rd[1]~92 ( +// Equation(s): +// \rd[1]~92_combout = ( \rd[1]~90_combout & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout ) # (\rd[1]~88_combout ) ) ) ) # ( !\rd[1]~90_combout & ( \ALU|Mux31~3_combout & ( (\rd[1]~88_combout & \ALU|Mux30~1_combout ) ) ) ) # ( \rd[1]~90_combout & +// ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & ((\rd[1]~91_combout ))) # (\ALU|Mux30~1_combout & (\rd[1]~89_combout )) ) ) ) # ( !\rd[1]~90_combout & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & ((\rd[1]~91_combout ))) # +// (\ALU|Mux30~1_combout & (\rd[1]~89_combout )) ) ) ) + + .dataa(!\rd[1]~89_combout ), + .datab(!\rd[1]~91_combout ), + .datac(!\rd[1]~88_combout ), + .datad(!\ALU|Mux30~1_combout ), + .datae(!\rd[1]~90_combout ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[1]~92_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[1]~92 .extended_lut = "off"; +defparam \rd[1]~92 .lut_mask = 64'h33553355000FFF0F; +defparam \rd[1]~92 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X53_Y10_N27 +cyclonev_lcell_comb \RAM|mem[217][1]~feeder ( +// Equation(s): +// \RAM|mem[217][1]~feeder_combout = ( \RAM|mem~257_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~257_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[217][1]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[217][1]~feeder .extended_lut = "off"; +defparam \RAM|mem[217][1]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[217][1]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X53_Y10_N28 +dffeas \RAM|mem[217][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[217][1]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[217][1]~218_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[217][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[217][1] .is_wysiwyg = "true"; +defparam \RAM|mem[217][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X48_Y11_N10 +dffeas \RAM|mem[213][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[213][2]~214_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[213][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[213][1] .is_wysiwyg = "true"; +defparam \RAM|mem[213][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X43_Y12_N49 +dffeas \RAM|mem[209][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[209][0]~210_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[209][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[209][1] .is_wysiwyg = "true"; +defparam \RAM|mem[209][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X54_Y11_N50 +dffeas \RAM|mem[221][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[221][3]~222_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[221][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[221][1] .is_wysiwyg = "true"; +defparam \RAM|mem[221][1] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X54_Y11_N48 +cyclonev_lcell_comb \rd[1]~94 ( +// Equation(s): +// \rd[1]~94_combout = ( \RAM|mem[221][1]~q & ( \ALU|Mux29~3_combout & ( (!\ALU|Mux28~1_combout & (\RAM|mem[217][1]~q )) # (\ALU|Mux28~1_combout & ((\RAM|mem[209][1]~q ))) ) ) ) # ( !\RAM|mem[221][1]~q & ( \ALU|Mux29~3_combout & ( +// (!\ALU|Mux28~1_combout & (\RAM|mem[217][1]~q )) # (\ALU|Mux28~1_combout & ((\RAM|mem[209][1]~q ))) ) ) ) # ( \RAM|mem[221][1]~q & ( !\ALU|Mux29~3_combout & ( (!\ALU|Mux28~1_combout ) # (\RAM|mem[213][1]~q ) ) ) ) # ( !\RAM|mem[221][1]~q & ( +// !\ALU|Mux29~3_combout & ( (\RAM|mem[213][1]~q & \ALU|Mux28~1_combout ) ) ) ) + + .dataa(!\RAM|mem[217][1]~q ), + .datab(!\RAM|mem[213][1]~q ), + .datac(!\RAM|mem[209][1]~q ), + .datad(!\ALU|Mux28~1_combout ), + .datae(!\RAM|mem[221][1]~q ), + .dataf(!\ALU|Mux29~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[1]~94_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[1]~94 .extended_lut = "off"; +defparam \rd[1]~94 .lut_mask = 64'h0033FF33550F550F; +defparam \rd[1]~94 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X53_Y8_N1 +dffeas \RAM|mem[220][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[220][4]~206_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[220][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[220][1] .is_wysiwyg = "true"; +defparam \RAM|mem[220][1] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X54_Y7_N24 +cyclonev_lcell_comb \RAM|mem[216][1]~feeder ( +// Equation(s): +// \RAM|mem[216][1]~feeder_combout = ( \RAM|mem~257_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~257_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[216][1]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[216][1]~feeder .extended_lut = "off"; +defparam \RAM|mem[216][1]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[216][1]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X54_Y7_N25 +dffeas \RAM|mem[216][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[216][1]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[216][3]~202_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[216][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[216][1] .is_wysiwyg = "true"; +defparam \RAM|mem[216][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X48_Y7_N46 +dffeas \RAM|mem[208][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[208][4]~194_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[208][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[208][1] .is_wysiwyg = "true"; +defparam \RAM|mem[208][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X48_Y7_N34 +dffeas \RAM|mem[212][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[212][1]~198_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[212][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[212][1] .is_wysiwyg = "true"; +defparam \RAM|mem[212][1] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X45_Y9_N54 +cyclonev_lcell_comb \rd[1]~93 ( +// Equation(s): +// \rd[1]~93_combout = ( \ALU|Mux28~1_combout & ( \ALU|Mux29~3_combout & ( \RAM|mem[208][1]~q ) ) ) # ( !\ALU|Mux28~1_combout & ( \ALU|Mux29~3_combout & ( \RAM|mem[216][1]~q ) ) ) # ( \ALU|Mux28~1_combout & ( !\ALU|Mux29~3_combout & ( +// \RAM|mem[212][1]~q ) ) ) # ( !\ALU|Mux28~1_combout & ( !\ALU|Mux29~3_combout & ( \RAM|mem[220][1]~q ) ) ) + + .dataa(!\RAM|mem[220][1]~q ), + .datab(!\RAM|mem[216][1]~q ), + .datac(!\RAM|mem[208][1]~q ), + .datad(!\RAM|mem[212][1]~q ), + .datae(!\ALU|Mux28~1_combout ), + .dataf(!\ALU|Mux29~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[1]~93_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[1]~93 .extended_lut = "off"; +defparam \rd[1]~93 .lut_mask = 64'h555500FF33330F0F; +defparam \rd[1]~93 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X53_Y10_N21 +cyclonev_lcell_comb \RAM|mem[218][1]~feeder ( +// Equation(s): +// \RAM|mem[218][1]~feeder_combout = ( \RAM|mem~257_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~257_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[218][1]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[218][1]~feeder .extended_lut = "off"; +defparam \RAM|mem[218][1]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[218][1]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X53_Y10_N22 +dffeas \RAM|mem[218][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[218][1]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[218][2]~234_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[218][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[218][1] .is_wysiwyg = "true"; +defparam \RAM|mem[218][1] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X51_Y10_N12 +cyclonev_lcell_comb \RAM|mem[214][1]~feeder ( +// Equation(s): +// \RAM|mem[214][1]~feeder_combout = ( \RAM|mem~257_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~257_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[214][1]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[214][1]~feeder .extended_lut = "off"; +defparam \RAM|mem[214][1]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[214][1]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X51_Y10_N13 +dffeas \RAM|mem[214][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[214][1]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[214][2]~230_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[214][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[214][1] .is_wysiwyg = "true"; +defparam \RAM|mem[214][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X43_Y12_N7 +dffeas \RAM|mem[210][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[210][3]~226_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[210][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[210][1] .is_wysiwyg = "true"; +defparam \RAM|mem[210][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X54_Y11_N44 +dffeas \RAM|mem[222][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[222][3]~238_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[222][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[222][1] .is_wysiwyg = "true"; +defparam \RAM|mem[222][1] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X54_Y11_N42 +cyclonev_lcell_comb \rd[1]~95 ( +// Equation(s): +// \rd[1]~95_combout = ( \RAM|mem[222][1]~q & ( \ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout & (\RAM|mem[214][1]~q )) # (\ALU|Mux29~3_combout & ((\RAM|mem[210][1]~q ))) ) ) ) # ( !\RAM|mem[222][1]~q & ( \ALU|Mux28~1_combout & ( +// (!\ALU|Mux29~3_combout & (\RAM|mem[214][1]~q )) # (\ALU|Mux29~3_combout & ((\RAM|mem[210][1]~q ))) ) ) ) # ( \RAM|mem[222][1]~q & ( !\ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout ) # (\RAM|mem[218][1]~q ) ) ) ) # ( !\RAM|mem[222][1]~q & ( +// !\ALU|Mux28~1_combout & ( (\RAM|mem[218][1]~q & \ALU|Mux29~3_combout ) ) ) ) + + .dataa(!\RAM|mem[218][1]~q ), + .datab(!\RAM|mem[214][1]~q ), + .datac(!\ALU|Mux29~3_combout ), + .datad(!\RAM|mem[210][1]~q ), + .datae(!\RAM|mem[222][1]~q ), + .dataf(!\ALU|Mux28~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[1]~95_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[1]~95 .extended_lut = "off"; +defparam \rd[1]~95 .lut_mask = 64'h0505F5F5303F303F; +defparam \rd[1]~95 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X43_Y8_N22 +dffeas \RAM|mem[215][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[215][1]~246_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[215][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[215][1] .is_wysiwyg = "true"; +defparam \RAM|mem[215][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X43_Y12_N40 +dffeas \RAM|mem[211][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[211][1]~245_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[211][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[211][1] .is_wysiwyg = "true"; +defparam \RAM|mem[211][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X45_Y12_N37 +dffeas \RAM|mem[219][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[219][0]~247_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[219][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[219][1] .is_wysiwyg = "true"; +defparam \RAM|mem[219][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X54_Y10_N8 +dffeas \RAM|mem[223][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[223][2]~248_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[223][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[223][1] .is_wysiwyg = "true"; +defparam \RAM|mem[223][1] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X54_Y10_N6 +cyclonev_lcell_comb \rd[1]~96 ( +// Equation(s): +// \rd[1]~96_combout = ( \RAM|mem[223][1]~q & ( \ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout & (\RAM|mem[215][1]~q )) # (\ALU|Mux29~3_combout & ((\RAM|mem[211][1]~q ))) ) ) ) # ( !\RAM|mem[223][1]~q & ( \ALU|Mux28~1_combout & ( +// (!\ALU|Mux29~3_combout & (\RAM|mem[215][1]~q )) # (\ALU|Mux29~3_combout & ((\RAM|mem[211][1]~q ))) ) ) ) # ( \RAM|mem[223][1]~q & ( !\ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout ) # (\RAM|mem[219][1]~q ) ) ) ) # ( !\RAM|mem[223][1]~q & ( +// !\ALU|Mux28~1_combout & ( (\RAM|mem[219][1]~q & \ALU|Mux29~3_combout ) ) ) ) + + .dataa(!\RAM|mem[215][1]~q ), + .datab(!\RAM|mem[211][1]~q ), + .datac(!\RAM|mem[219][1]~q ), + .datad(!\ALU|Mux29~3_combout ), + .datae(!\RAM|mem[223][1]~q ), + .dataf(!\ALU|Mux28~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[1]~96_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[1]~96 .extended_lut = "off"; +defparam \rd[1]~96 .lut_mask = 64'h000FFF0F55335533; +defparam \rd[1]~96 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X43_Y9_N36 +cyclonev_lcell_comb \rd[1]~97 ( +// Equation(s): +// \rd[1]~97_combout = ( \rd[1]~96_combout & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & ((\rd[1]~95_combout ))) # (\ALU|Mux30~1_combout & (\rd[1]~93_combout )) ) ) ) # ( !\rd[1]~96_combout & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout +// & ((\rd[1]~95_combout ))) # (\ALU|Mux30~1_combout & (\rd[1]~93_combout )) ) ) ) # ( \rd[1]~96_combout & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout ) # (\rd[1]~94_combout ) ) ) ) # ( !\rd[1]~96_combout & ( !\ALU|Mux31~3_combout & ( +// (\rd[1]~94_combout & \ALU|Mux30~1_combout ) ) ) ) + + .dataa(!\rd[1]~94_combout ), + .datab(!\rd[1]~93_combout ), + .datac(!\rd[1]~95_combout ), + .datad(!\ALU|Mux30~1_combout ), + .datae(!\rd[1]~96_combout ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[1]~97_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[1]~97 .extended_lut = "off"; +defparam \rd[1]~97 .lut_mask = 64'h0055FF550F330F33; +defparam \rd[1]~97 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X54_Y7_N57 +cyclonev_lcell_comb \RAM|mem[232][1]~feeder ( +// Equation(s): +// \RAM|mem[232][1]~feeder_combout = ( \RAM|mem~257_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~257_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[232][1]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[232][1]~feeder .extended_lut = "off"; +defparam \RAM|mem[232][1]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[232][1]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X54_Y7_N58 +dffeas \RAM|mem[232][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[232][1]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[232][3]~203_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[232][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[232][1] .is_wysiwyg = "true"; +defparam \RAM|mem[232][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X45_Y9_N29 +dffeas \RAM|mem[233][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[233][0]~219_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[233][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[233][1] .is_wysiwyg = "true"; +defparam \RAM|mem[233][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X45_Y9_N41 +dffeas \RAM|mem[234][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[234][0]~235_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[234][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[234][1] .is_wysiwyg = "true"; +defparam \RAM|mem[234][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X45_Y9_N8 +dffeas \RAM|mem[235][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[235][2]~251_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[235][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[235][1] .is_wysiwyg = "true"; +defparam \RAM|mem[235][1] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X45_Y9_N6 +cyclonev_lcell_comb \rd[1]~100 ( +// Equation(s): +// \rd[1]~100_combout = ( \RAM|mem[235][1]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & ((\RAM|mem[234][1]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[232][1]~q )) ) ) ) # ( !\RAM|mem[235][1]~q & ( \ALU|Mux31~3_combout & ( +// (!\ALU|Mux30~1_combout & ((\RAM|mem[234][1]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[232][1]~q )) ) ) ) # ( \RAM|mem[235][1]~q & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout ) # (\RAM|mem[233][1]~q ) ) ) ) # ( !\RAM|mem[235][1]~q & ( +// !\ALU|Mux31~3_combout & ( (\ALU|Mux30~1_combout & \RAM|mem[233][1]~q ) ) ) ) + + .dataa(!\ALU|Mux30~1_combout ), + .datab(!\RAM|mem[232][1]~q ), + .datac(!\RAM|mem[233][1]~q ), + .datad(!\RAM|mem[234][1]~q ), + .datae(!\RAM|mem[235][1]~q ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[1]~100_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[1]~100 .extended_lut = "off"; +defparam \rd[1]~100 .lut_mask = 64'h0505AFAF11BB11BB; +defparam \rd[1]~100 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X48_Y5_N30 +cyclonev_lcell_comb \RAM|mem[230][1]~feeder ( +// Equation(s): +// \RAM|mem[230][1]~feeder_combout = ( \RAM|mem~257_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~257_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[230][1]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[230][1]~feeder .extended_lut = "off"; +defparam \RAM|mem[230][1]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[230][1]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X48_Y5_N31 +dffeas \RAM|mem[230][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[230][1]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[230][1]~231_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[230][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[230][1] .is_wysiwyg = "true"; +defparam \RAM|mem[230][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X53_Y7_N49 +dffeas \RAM|mem[228][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[228][4]~199_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[228][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[228][1] .is_wysiwyg = "true"; +defparam \RAM|mem[228][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X43_Y9_N22 +dffeas \RAM|mem[229][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[229][2]~215_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[229][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[229][1] .is_wysiwyg = "true"; +defparam \RAM|mem[229][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X43_Y9_N26 +dffeas \RAM|mem[231][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[231][2]~250_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[231][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[231][1] .is_wysiwyg = "true"; +defparam \RAM|mem[231][1] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X43_Y9_N24 +cyclonev_lcell_comb \rd[1]~99 ( +// Equation(s): +// \rd[1]~99_combout = ( \RAM|mem[231][1]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & (\RAM|mem[230][1]~q )) # (\ALU|Mux30~1_combout & ((\RAM|mem[228][1]~q ))) ) ) ) # ( !\RAM|mem[231][1]~q & ( \ALU|Mux31~3_combout & ( +// (!\ALU|Mux30~1_combout & (\RAM|mem[230][1]~q )) # (\ALU|Mux30~1_combout & ((\RAM|mem[228][1]~q ))) ) ) ) # ( \RAM|mem[231][1]~q & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout ) # (\RAM|mem[229][1]~q ) ) ) ) # ( !\RAM|mem[231][1]~q & ( +// !\ALU|Mux31~3_combout & ( (\ALU|Mux30~1_combout & \RAM|mem[229][1]~q ) ) ) ) + + .dataa(!\RAM|mem[230][1]~q ), + .datab(!\ALU|Mux30~1_combout ), + .datac(!\RAM|mem[228][1]~q ), + .datad(!\RAM|mem[229][1]~q ), + .datae(!\RAM|mem[231][1]~q ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[1]~99_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[1]~99 .extended_lut = "off"; +defparam \rd[1]~99 .lut_mask = 64'h0033CCFF47474747; +defparam \rd[1]~99 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X49_Y13_N8 +dffeas \RAM|mem[238][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[238][1]~239_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[238][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[238][1] .is_wysiwyg = "true"; +defparam \RAM|mem[238][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X49_Y6_N20 +dffeas \RAM|mem[236][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[236][3]~207_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[236][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[236][1] .is_wysiwyg = "true"; +defparam \RAM|mem[236][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X53_Y12_N1 +dffeas \RAM|mem[237][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[237][2]~223_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[237][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[237][1] .is_wysiwyg = "true"; +defparam \RAM|mem[237][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X43_Y9_N2 +dffeas \RAM|mem[239][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[239][1]~252_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[239][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[239][1] .is_wysiwyg = "true"; +defparam \RAM|mem[239][1] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X43_Y9_N0 +cyclonev_lcell_comb \rd[1]~101 ( +// Equation(s): +// \rd[1]~101_combout = ( \RAM|mem[239][1]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & (\RAM|mem[238][1]~q )) # (\ALU|Mux30~1_combout & ((\RAM|mem[236][1]~q ))) ) ) ) # ( !\RAM|mem[239][1]~q & ( \ALU|Mux31~3_combout & ( +// (!\ALU|Mux30~1_combout & (\RAM|mem[238][1]~q )) # (\ALU|Mux30~1_combout & ((\RAM|mem[236][1]~q ))) ) ) ) # ( \RAM|mem[239][1]~q & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout ) # (\RAM|mem[237][1]~q ) ) ) ) # ( !\RAM|mem[239][1]~q & ( +// !\ALU|Mux31~3_combout & ( (\ALU|Mux30~1_combout & \RAM|mem[237][1]~q ) ) ) ) + + .dataa(!\RAM|mem[238][1]~q ), + .datab(!\ALU|Mux30~1_combout ), + .datac(!\RAM|mem[236][1]~q ), + .datad(!\RAM|mem[237][1]~q ), + .datae(!\RAM|mem[239][1]~q ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[1]~101_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[1]~101 .extended_lut = "off"; +defparam \rd[1]~101 .lut_mask = 64'h0033CCFF47474747; +defparam \rd[1]~101 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X43_Y5_N2 +dffeas \RAM|mem[226][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[226][3]~227_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[226][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[226][1] .is_wysiwyg = "true"; +defparam \RAM|mem[226][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X43_Y5_N11 +dffeas \RAM|mem[225][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[225][3]~211_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[225][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[225][1] .is_wysiwyg = "true"; +defparam \RAM|mem[225][1] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X48_Y5_N48 +cyclonev_lcell_comb \RAM|mem[224][1]~feeder ( +// Equation(s): +// \RAM|mem[224][1]~feeder_combout = ( \RAM|mem~257_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~257_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[224][1]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[224][1]~feeder .extended_lut = "off"; +defparam \RAM|mem[224][1]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[224][1]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X48_Y5_N49 +dffeas \RAM|mem[224][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[224][1]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[224][1]~195_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[224][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[224][1] .is_wysiwyg = "true"; +defparam \RAM|mem[224][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X43_Y5_N32 +dffeas \RAM|mem[227][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[227][3]~249_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[227][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[227][1] .is_wysiwyg = "true"; +defparam \RAM|mem[227][1] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X43_Y5_N30 +cyclonev_lcell_comb \rd[1]~98 ( +// Equation(s): +// \rd[1]~98_combout = ( \RAM|mem[227][1]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & (\RAM|mem[226][1]~q )) # (\ALU|Mux30~1_combout & ((\RAM|mem[224][1]~q ))) ) ) ) # ( !\RAM|mem[227][1]~q & ( \ALU|Mux31~3_combout & ( +// (!\ALU|Mux30~1_combout & (\RAM|mem[226][1]~q )) # (\ALU|Mux30~1_combout & ((\RAM|mem[224][1]~q ))) ) ) ) # ( \RAM|mem[227][1]~q & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout ) # (\RAM|mem[225][1]~q ) ) ) ) # ( !\RAM|mem[227][1]~q & ( +// !\ALU|Mux31~3_combout & ( (\RAM|mem[225][1]~q & \ALU|Mux30~1_combout ) ) ) ) + + .dataa(!\RAM|mem[226][1]~q ), + .datab(!\RAM|mem[225][1]~q ), + .datac(!\RAM|mem[224][1]~q ), + .datad(!\ALU|Mux30~1_combout ), + .datae(!\RAM|mem[227][1]~q ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[1]~98_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[1]~98 .extended_lut = "off"; +defparam \rd[1]~98 .lut_mask = 64'h0033FF33550F550F; +defparam \rd[1]~98 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X43_Y9_N18 +cyclonev_lcell_comb \rd[1]~102 ( +// Equation(s): +// \rd[1]~102_combout = ( \rd[1]~101_combout & ( \rd[1]~98_combout & ( (!\ALU|Mux29~3_combout & (((!\ALU|Mux28~1_combout ) # (\rd[1]~99_combout )))) # (\ALU|Mux29~3_combout & (((\ALU|Mux28~1_combout )) # (\rd[1]~100_combout ))) ) ) ) # ( +// !\rd[1]~101_combout & ( \rd[1]~98_combout & ( (!\ALU|Mux29~3_combout & (((\rd[1]~99_combout & \ALU|Mux28~1_combout )))) # (\ALU|Mux29~3_combout & (((\ALU|Mux28~1_combout )) # (\rd[1]~100_combout ))) ) ) ) # ( \rd[1]~101_combout & ( +// !\rd[1]~98_combout & ( (!\ALU|Mux29~3_combout & (((!\ALU|Mux28~1_combout ) # (\rd[1]~99_combout )))) # (\ALU|Mux29~3_combout & (\rd[1]~100_combout & ((!\ALU|Mux28~1_combout )))) ) ) ) # ( !\rd[1]~101_combout & ( !\rd[1]~98_combout & ( +// (!\ALU|Mux29~3_combout & (((\rd[1]~99_combout & \ALU|Mux28~1_combout )))) # (\ALU|Mux29~3_combout & (\rd[1]~100_combout & ((!\ALU|Mux28~1_combout )))) ) ) ) + + .dataa(!\ALU|Mux29~3_combout ), + .datab(!\rd[1]~100_combout ), + .datac(!\rd[1]~99_combout ), + .datad(!\ALU|Mux28~1_combout ), + .datae(!\rd[1]~101_combout ), + .dataf(!\rd[1]~98_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[1]~102_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[1]~102 .extended_lut = "off"; +defparam \rd[1]~102 .lut_mask = 64'h110ABB0A115FBB5F; +defparam \rd[1]~102 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X43_Y9_N42 +cyclonev_lcell_comb \rd[1]~108 ( +// Equation(s): +// \rd[1]~108_combout = ( \rd[1]~97_combout & ( \rd[1]~102_combout & ( (!\ALU|Mux27~1_combout & (((\ALU|Mux26~1_combout )) # (\rd[1]~107_combout ))) # (\ALU|Mux27~1_combout & (((!\ALU|Mux26~1_combout ) # (\rd[1]~92_combout )))) ) ) ) # ( +// !\rd[1]~97_combout & ( \rd[1]~102_combout & ( (!\ALU|Mux27~1_combout & (\rd[1]~107_combout & ((!\ALU|Mux26~1_combout )))) # (\ALU|Mux27~1_combout & (((!\ALU|Mux26~1_combout ) # (\rd[1]~92_combout )))) ) ) ) # ( \rd[1]~97_combout & ( +// !\rd[1]~102_combout & ( (!\ALU|Mux27~1_combout & (((\ALU|Mux26~1_combout )) # (\rd[1]~107_combout ))) # (\ALU|Mux27~1_combout & (((\rd[1]~92_combout & \ALU|Mux26~1_combout )))) ) ) ) # ( !\rd[1]~97_combout & ( !\rd[1]~102_combout & ( +// (!\ALU|Mux27~1_combout & (\rd[1]~107_combout & ((!\ALU|Mux26~1_combout )))) # (\ALU|Mux27~1_combout & (((\rd[1]~92_combout & \ALU|Mux26~1_combout )))) ) ) ) + + .dataa(!\rd[1]~107_combout ), + .datab(!\ALU|Mux27~1_combout ), + .datac(!\rd[1]~92_combout ), + .datad(!\ALU|Mux26~1_combout ), + .datae(!\rd[1]~97_combout ), + .dataf(!\rd[1]~102_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[1]~108_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[1]~108 .extended_lut = "off"; +defparam \rd[1]~108 .lut_mask = 64'h440344CF770377CF; +defparam \rd[1]~108 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X43_Y15_N54 +cyclonev_lcell_comb \RAM|mem[33][1]~feeder ( +// Equation(s): +// \RAM|mem[33][1]~feeder_combout = ( \RAM|mem~257_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~257_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[33][1]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[33][1]~feeder .extended_lut = "off"; +defparam \RAM|mem[33][1]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[33][1]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X43_Y15_N56 +dffeas \RAM|mem[33][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[33][1]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[33][3]~98_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[33][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[33][1] .is_wysiwyg = "true"; +defparam \RAM|mem[33][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X41_Y11_N29 +dffeas \RAM|mem[32][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[32][1]~97_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[32][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[32][1] .is_wysiwyg = "true"; +defparam \RAM|mem[32][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X41_Y11_N59 +dffeas \RAM|mem[34][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[34][3]~99_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[34][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[34][1] .is_wysiwyg = "true"; +defparam \RAM|mem[34][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X41_Y11_N2 +dffeas \RAM|mem[35][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[35][2]~100_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[35][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[35][1] .is_wysiwyg = "true"; +defparam \RAM|mem[35][1] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X41_Y11_N0 +cyclonev_lcell_comb \rd[1]~111 ( +// Equation(s): +// \rd[1]~111_combout = ( \RAM|mem[35][1]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & ((\RAM|mem[34][1]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[32][1]~q )) ) ) ) # ( !\RAM|mem[35][1]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout +// & ((\RAM|mem[34][1]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[32][1]~q )) ) ) ) # ( \RAM|mem[35][1]~q & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout ) # (\RAM|mem[33][1]~q ) ) ) ) # ( !\RAM|mem[35][1]~q & ( !\ALU|Mux31~3_combout & ( +// (\ALU|Mux30~1_combout & \RAM|mem[33][1]~q ) ) ) ) + + .dataa(!\ALU|Mux30~1_combout ), + .datab(!\RAM|mem[33][1]~q ), + .datac(!\RAM|mem[32][1]~q ), + .datad(!\RAM|mem[34][1]~q ), + .datae(!\RAM|mem[35][1]~q ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[1]~111_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[1]~111 .extended_lut = "off"; +defparam \rd[1]~111 .lut_mask = 64'h1111BBBB05AF05AF; +defparam \rd[1]~111 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X46_Y9_N48 +cyclonev_lcell_comb \RAM|mem[51][1]~feeder ( +// Equation(s): +// \RAM|mem[51][1]~feeder_combout = ( \RAM|mem~257_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~257_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[51][1]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[51][1]~feeder .extended_lut = "off"; +defparam \RAM|mem[51][1]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[51][1]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X46_Y9_N49 +dffeas \RAM|mem[51][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[51][1]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[51][0]~125_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[51][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[51][1] .is_wysiwyg = "true"; +defparam \RAM|mem[51][1] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X43_Y15_N42 +cyclonev_lcell_comb \RAM|mem[49][1]~feeder ( +// Equation(s): +// \RAM|mem[49][1]~feeder_combout = ( \RAM|mem~257_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~257_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[49][1]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[49][1]~feeder .extended_lut = "off"; +defparam \RAM|mem[49][1]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[49][1]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X43_Y15_N43 +dffeas \RAM|mem[49][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[49][1]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[49][0]~117_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[49][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[49][1] .is_wysiwyg = "true"; +defparam \RAM|mem[49][1] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X50_Y14_N45 +cyclonev_lcell_comb \RAM|mem[48][1]~feeder ( +// Equation(s): +// \RAM|mem[48][1]~feeder_combout = ( \RAM|mem~257_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~257_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[48][1]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[48][1]~feeder .extended_lut = "off"; +defparam \RAM|mem[48][1]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[48][1]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X50_Y14_N46 +dffeas \RAM|mem[48][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[48][1]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[48][2]~113_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[48][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[48][1] .is_wysiwyg = "true"; +defparam \RAM|mem[48][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X46_Y12_N59 +dffeas \RAM|mem[50][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[50][2]~121_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[50][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[50][1] .is_wysiwyg = "true"; +defparam \RAM|mem[50][1] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X40_Y9_N42 +cyclonev_lcell_comb \rd[1]~112 ( +// Equation(s): +// \rd[1]~112_combout = ( \RAM|mem[50][1]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout ) # (\RAM|mem[48][1]~q ) ) ) ) # ( !\RAM|mem[50][1]~q & ( \ALU|Mux31~3_combout & ( (\ALU|Mux30~1_combout & \RAM|mem[48][1]~q ) ) ) ) # ( \RAM|mem[50][1]~q +// & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & (\RAM|mem[51][1]~q )) # (\ALU|Mux30~1_combout & ((\RAM|mem[49][1]~q ))) ) ) ) # ( !\RAM|mem[50][1]~q & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & (\RAM|mem[51][1]~q )) # +// (\ALU|Mux30~1_combout & ((\RAM|mem[49][1]~q ))) ) ) ) + + .dataa(!\RAM|mem[51][1]~q ), + .datab(!\RAM|mem[49][1]~q ), + .datac(!\ALU|Mux30~1_combout ), + .datad(!\RAM|mem[48][1]~q ), + .datae(!\RAM|mem[50][1]~q ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[1]~112_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[1]~112 .extended_lut = "off"; +defparam \rd[1]~112 .lut_mask = 64'h53535353000FF0FF; +defparam \rd[1]~112 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y16_N39 +cyclonev_lcell_comb \RAM|mem[19][1]~feeder ( +// Equation(s): +// \RAM|mem[19][1]~feeder_combout = ( \RAM|mem~257_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~257_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[19][1]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[19][1]~feeder .extended_lut = "off"; +defparam \RAM|mem[19][1]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[19][1]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X42_Y16_N40 +dffeas \RAM|mem[19][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[19][1]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[19][3]~93_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[19][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[19][1] .is_wysiwyg = "true"; +defparam \RAM|mem[19][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X42_Y11_N40 +dffeas \RAM|mem[16][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[16][4]~81_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[16][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[16][1] .is_wysiwyg = "true"; +defparam \RAM|mem[16][1] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X43_Y17_N48 +cyclonev_lcell_comb \RAM|mem[18][1]~feeder ( +// Equation(s): +// \RAM|mem[18][1]~feeder_combout = ( \RAM|mem~257_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~257_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[18][1]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[18][1]~feeder .extended_lut = "off"; +defparam \RAM|mem[18][1]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[18][1]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X43_Y17_N49 +dffeas \RAM|mem[18][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[18][1]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[18][0]~89_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[18][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[18][1] .is_wysiwyg = "true"; +defparam \RAM|mem[18][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X41_Y13_N56 +dffeas \RAM|mem[17][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[17][0]~85_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[17][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[17][1] .is_wysiwyg = "true"; +defparam \RAM|mem[17][1] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X41_Y13_N54 +cyclonev_lcell_comb \rd[1]~110 ( +// Equation(s): +// \rd[1]~110_combout = ( \RAM|mem[17][1]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & ((\RAM|mem[18][1]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[16][1]~q )) ) ) ) # ( !\RAM|mem[17][1]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout +// & ((\RAM|mem[18][1]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[16][1]~q )) ) ) ) # ( \RAM|mem[17][1]~q & ( !\ALU|Mux31~3_combout & ( (\ALU|Mux30~1_combout ) # (\RAM|mem[19][1]~q ) ) ) ) # ( !\RAM|mem[17][1]~q & ( !\ALU|Mux31~3_combout & ( +// (\RAM|mem[19][1]~q & !\ALU|Mux30~1_combout ) ) ) ) + + .dataa(!\RAM|mem[19][1]~q ), + .datab(!\ALU|Mux30~1_combout ), + .datac(!\RAM|mem[16][1]~q ), + .datad(!\RAM|mem[18][1]~q ), + .datae(!\RAM|mem[17][1]~q ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[1]~110_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[1]~110 .extended_lut = "off"; +defparam \rd[1]~110 .lut_mask = 64'h4444777703CF03CF; +defparam \rd[1]~110 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X42_Y11_N26 +dffeas \RAM|mem[0][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[0][3]~65_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[0][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[0][1] .is_wysiwyg = "true"; +defparam \RAM|mem[0][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X40_Y15_N55 +dffeas \RAM|mem[2][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[2][0]~73_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[2][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[2][1] .is_wysiwyg = "true"; +defparam \RAM|mem[2][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X40_Y15_N13 +dffeas \RAM|mem[3][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[3][2]~77_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[3][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[3][1] .is_wysiwyg = "true"; +defparam \RAM|mem[3][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X40_Y15_N26 +dffeas \RAM|mem[1][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[1][0]~69_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[1][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[1][1] .is_wysiwyg = "true"; +defparam \RAM|mem[1][1] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X40_Y15_N24 +cyclonev_lcell_comb \rd[1]~109 ( +// Equation(s): +// \rd[1]~109_combout = ( \RAM|mem[1][1]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & ((\RAM|mem[2][1]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[0][1]~q )) ) ) ) # ( !\RAM|mem[1][1]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & +// ((\RAM|mem[2][1]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[0][1]~q )) ) ) ) # ( \RAM|mem[1][1]~q & ( !\ALU|Mux31~3_combout & ( (\RAM|mem[3][1]~q ) # (\ALU|Mux30~1_combout ) ) ) ) # ( !\RAM|mem[1][1]~q & ( !\ALU|Mux31~3_combout & ( +// (!\ALU|Mux30~1_combout & \RAM|mem[3][1]~q ) ) ) ) + + .dataa(!\RAM|mem[0][1]~q ), + .datab(!\RAM|mem[2][1]~q ), + .datac(!\ALU|Mux30~1_combout ), + .datad(!\RAM|mem[3][1]~q ), + .datae(!\RAM|mem[1][1]~q ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[1]~109_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[1]~109 .extended_lut = "off"; +defparam \rd[1]~109 .lut_mask = 64'h00F00FFF35353535; +defparam \rd[1]~109 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X40_Y9_N36 +cyclonev_lcell_comb \rd[1]~113 ( +// Equation(s): +// \rd[1]~113_combout = ( \rd[1]~110_combout & ( \rd[1]~109_combout & ( ((!\ALU|Mux27~1_combout & ((\rd[1]~112_combout ))) # (\ALU|Mux27~1_combout & (\rd[1]~111_combout ))) # (\ALU|Mux26~1_combout ) ) ) ) # ( !\rd[1]~110_combout & ( \rd[1]~109_combout +// & ( (!\ALU|Mux26~1_combout & ((!\ALU|Mux27~1_combout & ((\rd[1]~112_combout ))) # (\ALU|Mux27~1_combout & (\rd[1]~111_combout )))) # (\ALU|Mux26~1_combout & (\ALU|Mux27~1_combout )) ) ) ) # ( \rd[1]~110_combout & ( !\rd[1]~109_combout & ( +// (!\ALU|Mux26~1_combout & ((!\ALU|Mux27~1_combout & ((\rd[1]~112_combout ))) # (\ALU|Mux27~1_combout & (\rd[1]~111_combout )))) # (\ALU|Mux26~1_combout & (!\ALU|Mux27~1_combout )) ) ) ) # ( !\rd[1]~110_combout & ( !\rd[1]~109_combout & ( +// (!\ALU|Mux26~1_combout & ((!\ALU|Mux27~1_combout & ((\rd[1]~112_combout ))) # (\ALU|Mux27~1_combout & (\rd[1]~111_combout )))) ) ) ) + + .dataa(!\ALU|Mux26~1_combout ), + .datab(!\ALU|Mux27~1_combout ), + .datac(!\rd[1]~111_combout ), + .datad(!\rd[1]~112_combout ), + .datae(!\rd[1]~110_combout ), + .dataf(!\rd[1]~109_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[1]~113_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[1]~113 .extended_lut = "off"; +defparam \rd[1]~113 .lut_mask = 64'h028A46CE139B57DF; +defparam \rd[1]~113 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X45_Y14_N56 +dffeas \RAM|mem[61][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[61][0]~120_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[61][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[61][1] .is_wysiwyg = "true"; +defparam \RAM|mem[61][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X46_Y14_N49 +dffeas \RAM|mem[13][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[13][1]~72_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[13][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[13][1] .is_wysiwyg = "true"; +defparam \RAM|mem[13][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X49_Y15_N25 +dffeas \RAM|mem[29][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[29][2]~88_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[29][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[29][1] .is_wysiwyg = "true"; +defparam \RAM|mem[29][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X46_Y14_N58 +dffeas \RAM|mem[45][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[45][4]~110_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[45][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[45][1] .is_wysiwyg = "true"; +defparam \RAM|mem[45][1] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X43_Y13_N51 +cyclonev_lcell_comb \rd[1]~125 ( +// Equation(s): +// \rd[1]~125_combout = ( \ALU|Mux27~1_combout & ( \ALU|Mux26~1_combout & ( \RAM|mem[13][1]~q ) ) ) # ( !\ALU|Mux27~1_combout & ( \ALU|Mux26~1_combout & ( \RAM|mem[29][1]~q ) ) ) # ( \ALU|Mux27~1_combout & ( !\ALU|Mux26~1_combout & ( +// \RAM|mem[45][1]~q ) ) ) # ( !\ALU|Mux27~1_combout & ( !\ALU|Mux26~1_combout & ( \RAM|mem[61][1]~q ) ) ) + + .dataa(!\RAM|mem[61][1]~q ), + .datab(!\RAM|mem[13][1]~q ), + .datac(!\RAM|mem[29][1]~q ), + .datad(!\RAM|mem[45][1]~q ), + .datae(!\ALU|Mux27~1_combout ), + .dataf(!\ALU|Mux26~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[1]~125_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[1]~125 .extended_lut = "off"; +defparam \rd[1]~125 .lut_mask = 64'h555500FF0F0F3333; +defparam \rd[1]~125 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X46_Y12_N37 +dffeas \RAM|mem[62][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[62][2]~124_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[62][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[62][1] .is_wysiwyg = "true"; +defparam \RAM|mem[62][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X53_Y11_N55 +dffeas \RAM|mem[14][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[14][1]~76_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[14][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[14][1] .is_wysiwyg = "true"; +defparam \RAM|mem[14][1] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X47_Y14_N24 +cyclonev_lcell_comb \RAM|mem[30][1]~feeder ( +// Equation(s): +// \RAM|mem[30][1]~feeder_combout = ( \RAM|mem~257_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~257_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[30][1]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[30][1]~feeder .extended_lut = "off"; +defparam \RAM|mem[30][1]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[30][1]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X47_Y14_N25 +dffeas \RAM|mem[30][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[30][1]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[30][3]~92_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[30][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[30][1] .is_wysiwyg = "true"; +defparam \RAM|mem[30][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X47_Y11_N23 +dffeas \RAM|mem[46][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[46][2]~111_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[46][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[46][1] .is_wysiwyg = "true"; +defparam \RAM|mem[46][1] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X48_Y11_N45 +cyclonev_lcell_comb \rd[1]~126 ( +// Equation(s): +// \rd[1]~126_combout = ( \ALU|Mux27~1_combout & ( \ALU|Mux26~1_combout & ( \RAM|mem[14][1]~q ) ) ) # ( !\ALU|Mux27~1_combout & ( \ALU|Mux26~1_combout & ( \RAM|mem[30][1]~q ) ) ) # ( \ALU|Mux27~1_combout & ( !\ALU|Mux26~1_combout & ( +// \RAM|mem[46][1]~q ) ) ) # ( !\ALU|Mux27~1_combout & ( !\ALU|Mux26~1_combout & ( \RAM|mem[62][1]~q ) ) ) + + .dataa(!\RAM|mem[62][1]~q ), + .datab(!\RAM|mem[14][1]~q ), + .datac(!\RAM|mem[30][1]~q ), + .datad(!\RAM|mem[46][1]~q ), + .datae(!\ALU|Mux27~1_combout ), + .dataf(!\ALU|Mux26~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[1]~126_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[1]~126 .extended_lut = "off"; +defparam \rd[1]~126 .lut_mask = 64'h555500FF0F0F3333; +defparam \rd[1]~126 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X47_Y11_N38 +dffeas \RAM|mem[47][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[47][0]~112_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[47][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[47][1] .is_wysiwyg = "true"; +defparam \RAM|mem[47][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X41_Y13_N34 +dffeas \RAM|mem[31][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[31][2]~96_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[31][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[31][1] .is_wysiwyg = "true"; +defparam \RAM|mem[31][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X41_Y15_N4 +dffeas \RAM|mem[15][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[15][4]~80_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[15][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[15][1] .is_wysiwyg = "true"; +defparam \RAM|mem[15][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X46_Y13_N26 +dffeas \RAM|mem[63][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[63][2]~128_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[63][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[63][1] .is_wysiwyg = "true"; +defparam \RAM|mem[63][1] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X46_Y13_N24 +cyclonev_lcell_comb \rd[1]~127 ( +// Equation(s): +// \rd[1]~127_combout = ( \RAM|mem[63][1]~q & ( \ALU|Mux26~1_combout & ( (!\ALU|Mux27~1_combout & (\RAM|mem[31][1]~q )) # (\ALU|Mux27~1_combout & ((\RAM|mem[15][1]~q ))) ) ) ) # ( !\RAM|mem[63][1]~q & ( \ALU|Mux26~1_combout & ( (!\ALU|Mux27~1_combout +// & (\RAM|mem[31][1]~q )) # (\ALU|Mux27~1_combout & ((\RAM|mem[15][1]~q ))) ) ) ) # ( \RAM|mem[63][1]~q & ( !\ALU|Mux26~1_combout & ( (!\ALU|Mux27~1_combout ) # (\RAM|mem[47][1]~q ) ) ) ) # ( !\RAM|mem[63][1]~q & ( !\ALU|Mux26~1_combout & ( +// (\RAM|mem[47][1]~q & \ALU|Mux27~1_combout ) ) ) ) + + .dataa(!\RAM|mem[47][1]~q ), + .datab(!\RAM|mem[31][1]~q ), + .datac(!\RAM|mem[15][1]~q ), + .datad(!\ALU|Mux27~1_combout ), + .datae(!\RAM|mem[63][1]~q ), + .dataf(!\ALU|Mux26~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[1]~127_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[1]~127 .extended_lut = "off"; +defparam \rd[1]~127 .lut_mask = 64'h0055FF55330F330F; +defparam \rd[1]~127 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X47_Y11_N29 +dffeas \RAM|mem[44][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[44][1]~109_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[44][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[44][1] .is_wysiwyg = "true"; +defparam \RAM|mem[44][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X53_Y6_N49 +dffeas \RAM|mem[12][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[12][3]~68_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[12][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[12][1] .is_wysiwyg = "true"; +defparam \RAM|mem[12][1] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X46_Y15_N6 +cyclonev_lcell_comb \RAM|mem[28][1]~feeder ( +// Equation(s): +// \RAM|mem[28][1]~feeder_combout = ( \RAM|mem~257_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~257_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[28][1]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[28][1]~feeder .extended_lut = "off"; +defparam \RAM|mem[28][1]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[28][1]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X46_Y15_N8 +dffeas \RAM|mem[28][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[28][1]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[28][0]~84_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[28][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[28][1] .is_wysiwyg = "true"; +defparam \RAM|mem[28][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X46_Y15_N14 +dffeas \RAM|mem[60][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[60][4]~116_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[60][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[60][1] .is_wysiwyg = "true"; +defparam \RAM|mem[60][1] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X46_Y15_N12 +cyclonev_lcell_comb \rd[1]~124 ( +// Equation(s): +// \rd[1]~124_combout = ( \RAM|mem[60][1]~q & ( \ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout & (\RAM|mem[44][1]~q )) # (\ALU|Mux26~1_combout & ((\RAM|mem[12][1]~q ))) ) ) ) # ( !\RAM|mem[60][1]~q & ( \ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout +// & (\RAM|mem[44][1]~q )) # (\ALU|Mux26~1_combout & ((\RAM|mem[12][1]~q ))) ) ) ) # ( \RAM|mem[60][1]~q & ( !\ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout ) # (\RAM|mem[28][1]~q ) ) ) ) # ( !\RAM|mem[60][1]~q & ( !\ALU|Mux27~1_combout & ( +// (\ALU|Mux26~1_combout & \RAM|mem[28][1]~q ) ) ) ) + + .dataa(!\RAM|mem[44][1]~q ), + .datab(!\RAM|mem[12][1]~q ), + .datac(!\ALU|Mux26~1_combout ), + .datad(!\RAM|mem[28][1]~q ), + .datae(!\RAM|mem[60][1]~q ), + .dataf(!\ALU|Mux27~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[1]~124_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[1]~124 .extended_lut = "off"; +defparam \rd[1]~124 .lut_mask = 64'h000FF0FF53535353; +defparam \rd[1]~124 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X40_Y9_N30 +cyclonev_lcell_comb \rd[1]~128 ( +// Equation(s): +// \rd[1]~128_combout = ( \rd[1]~127_combout & ( \rd[1]~124_combout & ( (!\ALU|Mux30~1_combout & (((!\ALU|Mux31~3_combout ) # (\rd[1]~126_combout )))) # (\ALU|Mux30~1_combout & (((\ALU|Mux31~3_combout )) # (\rd[1]~125_combout ))) ) ) ) # ( +// !\rd[1]~127_combout & ( \rd[1]~124_combout & ( (!\ALU|Mux30~1_combout & (((\rd[1]~126_combout & \ALU|Mux31~3_combout )))) # (\ALU|Mux30~1_combout & (((\ALU|Mux31~3_combout )) # (\rd[1]~125_combout ))) ) ) ) # ( \rd[1]~127_combout & ( +// !\rd[1]~124_combout & ( (!\ALU|Mux30~1_combout & (((!\ALU|Mux31~3_combout ) # (\rd[1]~126_combout )))) # (\ALU|Mux30~1_combout & (\rd[1]~125_combout & ((!\ALU|Mux31~3_combout )))) ) ) ) # ( !\rd[1]~127_combout & ( !\rd[1]~124_combout & ( +// (!\ALU|Mux30~1_combout & (((\rd[1]~126_combout & \ALU|Mux31~3_combout )))) # (\ALU|Mux30~1_combout & (\rd[1]~125_combout & ((!\ALU|Mux31~3_combout )))) ) ) ) + + .dataa(!\ALU|Mux30~1_combout ), + .datab(!\rd[1]~125_combout ), + .datac(!\rd[1]~126_combout ), + .datad(!\ALU|Mux31~3_combout ), + .datae(!\rd[1]~127_combout ), + .dataf(!\rd[1]~124_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[1]~128_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[1]~128 .extended_lut = "off"; +defparam \rd[1]~128 .lut_mask = 64'h110ABB0A115FBB5F; +defparam \rd[1]~128 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X42_Y15_N28 +dffeas \RAM|mem[7][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[7][0]~78_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[7][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[7][1] .is_wysiwyg = "true"; +defparam \RAM|mem[7][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X50_Y12_N1 +dffeas \RAM|mem[6][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[6][2]~74_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[6][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[6][1] .is_wysiwyg = "true"; +defparam \RAM|mem[6][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X47_Y12_N4 +dffeas \RAM|mem[4][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[4][0]~66_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[4][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[4][1] .is_wysiwyg = "true"; +defparam \RAM|mem[4][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X42_Y15_N31 +dffeas \RAM|mem[5][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[5][0]~70_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[5][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[5][1] .is_wysiwyg = "true"; +defparam \RAM|mem[5][1] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X43_Y12_N51 +cyclonev_lcell_comb \rd[1]~114 ( +// Equation(s): +// \rd[1]~114_combout = ( \RAM|mem[5][1]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & (\RAM|mem[6][1]~q )) # (\ALU|Mux30~1_combout & ((\RAM|mem[4][1]~q ))) ) ) ) # ( !\RAM|mem[5][1]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & +// (\RAM|mem[6][1]~q )) # (\ALU|Mux30~1_combout & ((\RAM|mem[4][1]~q ))) ) ) ) # ( \RAM|mem[5][1]~q & ( !\ALU|Mux31~3_combout & ( (\ALU|Mux30~1_combout ) # (\RAM|mem[7][1]~q ) ) ) ) # ( !\RAM|mem[5][1]~q & ( !\ALU|Mux31~3_combout & ( (\RAM|mem[7][1]~q +// & !\ALU|Mux30~1_combout ) ) ) ) + + .dataa(!\RAM|mem[7][1]~q ), + .datab(!\RAM|mem[6][1]~q ), + .datac(!\ALU|Mux30~1_combout ), + .datad(!\RAM|mem[4][1]~q ), + .datae(!\RAM|mem[5][1]~q ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[1]~114_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[1]~114 .extended_lut = "off"; +defparam \rd[1]~114 .lut_mask = 64'h50505F5F303F303F; +defparam \rd[1]~114 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X43_Y10_N29 +dffeas \RAM|mem[36][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[36][2]~101_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[36][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[36][1] .is_wysiwyg = "true"; +defparam \RAM|mem[36][1] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X50_Y14_N48 +cyclonev_lcell_comb \RAM|mem[38][1]~feeder ( +// Equation(s): +// \RAM|mem[38][1]~feeder_combout = ( \RAM|mem~257_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~257_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[38][1]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[38][1]~feeder .extended_lut = "off"; +defparam \RAM|mem[38][1]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[38][1]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X50_Y14_N49 +dffeas \RAM|mem[38][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[38][1]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[38][0]~103_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[38][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[38][1] .is_wysiwyg = "true"; +defparam \RAM|mem[38][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X43_Y10_N11 +dffeas \RAM|mem[37][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[37][0]~102_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[37][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[37][1] .is_wysiwyg = "true"; +defparam \RAM|mem[37][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X43_Y10_N50 +dffeas \RAM|mem[39][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[39][4]~104_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[39][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[39][1] .is_wysiwyg = "true"; +defparam \RAM|mem[39][1] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X43_Y10_N48 +cyclonev_lcell_comb \rd[1]~116 ( +// Equation(s): +// \rd[1]~116_combout = ( \RAM|mem[39][1]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & ((\RAM|mem[38][1]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[36][1]~q )) ) ) ) # ( !\RAM|mem[39][1]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout +// & ((\RAM|mem[38][1]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[36][1]~q )) ) ) ) # ( \RAM|mem[39][1]~q & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout ) # (\RAM|mem[37][1]~q ) ) ) ) # ( !\RAM|mem[39][1]~q & ( !\ALU|Mux31~3_combout & ( +// (\ALU|Mux30~1_combout & \RAM|mem[37][1]~q ) ) ) ) + + .dataa(!\RAM|mem[36][1]~q ), + .datab(!\RAM|mem[38][1]~q ), + .datac(!\ALU|Mux30~1_combout ), + .datad(!\RAM|mem[37][1]~q ), + .datae(!\RAM|mem[39][1]~q ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[1]~116_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[1]~116 .extended_lut = "off"; +defparam \rd[1]~116 .lut_mask = 64'h000FF0FF35353535; +defparam \rd[1]~116 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X50_Y12_N10 +dffeas \RAM|mem[54][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[54][1]~122_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[54][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[54][1] .is_wysiwyg = "true"; +defparam \RAM|mem[54][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X46_Y13_N8 +dffeas \RAM|mem[53][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[53][2]~118_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[53][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[53][1] .is_wysiwyg = "true"; +defparam \RAM|mem[53][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X47_Y12_N58 +dffeas \RAM|mem[52][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[52][0]~114_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[52][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[52][1] .is_wysiwyg = "true"; +defparam \RAM|mem[52][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X46_Y13_N2 +dffeas \RAM|mem[55][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[55][2]~126_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[55][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[55][1] .is_wysiwyg = "true"; +defparam \RAM|mem[55][1] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X46_Y13_N0 +cyclonev_lcell_comb \rd[1]~117 ( +// Equation(s): +// \rd[1]~117_combout = ( \RAM|mem[55][1]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & (\RAM|mem[54][1]~q )) # (\ALU|Mux30~1_combout & ((\RAM|mem[52][1]~q ))) ) ) ) # ( !\RAM|mem[55][1]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout +// & (\RAM|mem[54][1]~q )) # (\ALU|Mux30~1_combout & ((\RAM|mem[52][1]~q ))) ) ) ) # ( \RAM|mem[55][1]~q & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout ) # (\RAM|mem[53][1]~q ) ) ) ) # ( !\RAM|mem[55][1]~q & ( !\ALU|Mux31~3_combout & ( +// (\RAM|mem[53][1]~q & \ALU|Mux30~1_combout ) ) ) ) + + .dataa(!\RAM|mem[54][1]~q ), + .datab(!\RAM|mem[53][1]~q ), + .datac(!\RAM|mem[52][1]~q ), + .datad(!\ALU|Mux30~1_combout ), + .datae(!\RAM|mem[55][1]~q ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[1]~117_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[1]~117 .extended_lut = "off"; +defparam \rd[1]~117 .lut_mask = 64'h0033FF33550F550F; +defparam \rd[1]~117 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X43_Y14_N49 +dffeas \RAM|mem[23][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[23][0]~94_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[23][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[23][1] .is_wysiwyg = "true"; +defparam \RAM|mem[23][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X47_Y12_N40 +dffeas \RAM|mem[20][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[20][4]~82_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[20][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[20][1] .is_wysiwyg = "true"; +defparam \RAM|mem[20][1] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X50_Y7_N15 +cyclonev_lcell_comb \RAM|mem[22][1]~feeder ( +// Equation(s): +// \RAM|mem[22][1]~feeder_combout = ( \RAM|mem~257_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~257_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[22][1]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[22][1]~feeder .extended_lut = "off"; +defparam \RAM|mem[22][1]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[22][1]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X50_Y7_N16 +dffeas \RAM|mem[22][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[22][1]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[22][2]~90_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[22][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[22][1] .is_wysiwyg = "true"; +defparam \RAM|mem[22][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X40_Y16_N56 +dffeas \RAM|mem[21][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[21][3]~86_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[21][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[21][1] .is_wysiwyg = "true"; +defparam \RAM|mem[21][1] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X40_Y16_N54 +cyclonev_lcell_comb \rd[1]~115 ( +// Equation(s): +// \rd[1]~115_combout = ( \RAM|mem[21][1]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & ((\RAM|mem[22][1]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[20][1]~q )) ) ) ) # ( !\RAM|mem[21][1]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout +// & ((\RAM|mem[22][1]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[20][1]~q )) ) ) ) # ( \RAM|mem[21][1]~q & ( !\ALU|Mux31~3_combout & ( (\RAM|mem[23][1]~q ) # (\ALU|Mux30~1_combout ) ) ) ) # ( !\RAM|mem[21][1]~q & ( !\ALU|Mux31~3_combout & ( +// (!\ALU|Mux30~1_combout & \RAM|mem[23][1]~q ) ) ) ) + + .dataa(!\ALU|Mux30~1_combout ), + .datab(!\RAM|mem[23][1]~q ), + .datac(!\RAM|mem[20][1]~q ), + .datad(!\RAM|mem[22][1]~q ), + .datae(!\RAM|mem[21][1]~q ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[1]~115_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[1]~115 .extended_lut = "off"; +defparam \rd[1]~115 .lut_mask = 64'h2222777705AF05AF; +defparam \rd[1]~115 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X40_Y9_N0 +cyclonev_lcell_comb \rd[1]~118 ( +// Equation(s): +// \rd[1]~118_combout = ( \rd[1]~117_combout & ( \rd[1]~115_combout & ( (!\ALU|Mux27~1_combout ) # ((!\ALU|Mux26~1_combout & ((\rd[1]~116_combout ))) # (\ALU|Mux26~1_combout & (\rd[1]~114_combout ))) ) ) ) # ( !\rd[1]~117_combout & ( \rd[1]~115_combout +// & ( (!\ALU|Mux26~1_combout & (\ALU|Mux27~1_combout & ((\rd[1]~116_combout )))) # (\ALU|Mux26~1_combout & ((!\ALU|Mux27~1_combout ) # ((\rd[1]~114_combout )))) ) ) ) # ( \rd[1]~117_combout & ( !\rd[1]~115_combout & ( (!\ALU|Mux26~1_combout & +// ((!\ALU|Mux27~1_combout ) # ((\rd[1]~116_combout )))) # (\ALU|Mux26~1_combout & (\ALU|Mux27~1_combout & (\rd[1]~114_combout ))) ) ) ) # ( !\rd[1]~117_combout & ( !\rd[1]~115_combout & ( (\ALU|Mux27~1_combout & ((!\ALU|Mux26~1_combout & +// ((\rd[1]~116_combout ))) # (\ALU|Mux26~1_combout & (\rd[1]~114_combout )))) ) ) ) + + .dataa(!\ALU|Mux26~1_combout ), + .datab(!\ALU|Mux27~1_combout ), + .datac(!\rd[1]~114_combout ), + .datad(!\rd[1]~116_combout ), + .datae(!\rd[1]~117_combout ), + .dataf(!\rd[1]~115_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[1]~118_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[1]~118 .extended_lut = "off"; +defparam \rd[1]~118 .lut_mask = 64'h012389AB4567CDEF; +defparam \rd[1]~118 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X56_Y8_N42 +cyclonev_lcell_comb \RAM|mem[24][1]~feeder ( +// Equation(s): +// \RAM|mem[24][1]~feeder_combout = ( \RAM|mem~257_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~257_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[24][1]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[24][1]~feeder .extended_lut = "off"; +defparam \RAM|mem[24][1]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[24][1]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X56_Y8_N44 +dffeas \RAM|mem[24][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[24][1]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[24][3]~83_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[24][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[24][1] .is_wysiwyg = "true"; +defparam \RAM|mem[24][1] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X43_Y16_N48 +cyclonev_lcell_comb \RAM|mem[25][1]~feeder ( +// Equation(s): +// \RAM|mem[25][1]~feeder_combout = ( \RAM|mem~257_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~257_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[25][1]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[25][1]~feeder .extended_lut = "off"; +defparam \RAM|mem[25][1]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[25][1]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X43_Y16_N49 +dffeas \RAM|mem[25][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[25][1]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[25][2]~87_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[25][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[25][1] .is_wysiwyg = "true"; +defparam \RAM|mem[25][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X47_Y15_N32 +dffeas \RAM|mem[26][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[26][4]~91_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[26][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[26][1] .is_wysiwyg = "true"; +defparam \RAM|mem[26][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X41_Y13_N8 +dffeas \RAM|mem[27][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[27][1]~95_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[27][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[27][1] .is_wysiwyg = "true"; +defparam \RAM|mem[27][1] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X41_Y13_N6 +cyclonev_lcell_comb \rd[1]~120 ( +// Equation(s): +// \rd[1]~120_combout = ( \RAM|mem[27][1]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & ((\RAM|mem[26][1]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[24][1]~q )) ) ) ) # ( !\RAM|mem[27][1]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout +// & ((\RAM|mem[26][1]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[24][1]~q )) ) ) ) # ( \RAM|mem[27][1]~q & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout ) # (\RAM|mem[25][1]~q ) ) ) ) # ( !\RAM|mem[27][1]~q & ( !\ALU|Mux31~3_combout & ( +// (\RAM|mem[25][1]~q & \ALU|Mux30~1_combout ) ) ) ) + + .dataa(!\RAM|mem[24][1]~q ), + .datab(!\RAM|mem[25][1]~q ), + .datac(!\RAM|mem[26][1]~q ), + .datad(!\ALU|Mux30~1_combout ), + .datae(!\RAM|mem[27][1]~q ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[1]~120_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[1]~120 .extended_lut = "off"; +defparam \rd[1]~120 .lut_mask = 64'h0033FF330F550F55; +defparam \rd[1]~120 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X43_Y16_N6 +cyclonev_lcell_comb \RAM|mem[57][1]~feeder ( +// Equation(s): +// \RAM|mem[57][1]~feeder_combout = ( \RAM|mem~257_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~257_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[57][1]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[57][1]~feeder .extended_lut = "off"; +defparam \RAM|mem[57][1]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[57][1]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X43_Y16_N7 +dffeas \RAM|mem[57][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[57][1]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[57][2]~119_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[57][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[57][1] .is_wysiwyg = "true"; +defparam \RAM|mem[57][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X46_Y12_N10 +dffeas \RAM|mem[58][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[58][2]~123_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[58][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[58][1] .is_wysiwyg = "true"; +defparam \RAM|mem[58][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X45_Y12_N52 +dffeas \RAM|mem[56][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[56][4]~115_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[56][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[56][1] .is_wysiwyg = "true"; +defparam \RAM|mem[56][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X46_Y9_N8 +dffeas \RAM|mem[59][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[59][2]~127_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[59][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[59][1] .is_wysiwyg = "true"; +defparam \RAM|mem[59][1] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X46_Y9_N6 +cyclonev_lcell_comb \rd[1]~122 ( +// Equation(s): +// \rd[1]~122_combout = ( \RAM|mem[59][1]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & (\RAM|mem[58][1]~q )) # (\ALU|Mux30~1_combout & ((\RAM|mem[56][1]~q ))) ) ) ) # ( !\RAM|mem[59][1]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout +// & (\RAM|mem[58][1]~q )) # (\ALU|Mux30~1_combout & ((\RAM|mem[56][1]~q ))) ) ) ) # ( \RAM|mem[59][1]~q & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout ) # (\RAM|mem[57][1]~q ) ) ) ) # ( !\RAM|mem[59][1]~q & ( !\ALU|Mux31~3_combout & ( +// (\RAM|mem[57][1]~q & \ALU|Mux30~1_combout ) ) ) ) + + .dataa(!\RAM|mem[57][1]~q ), + .datab(!\RAM|mem[58][1]~q ), + .datac(!\RAM|mem[56][1]~q ), + .datad(!\ALU|Mux30~1_combout ), + .datae(!\RAM|mem[59][1]~q ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[1]~122_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[1]~122 .extended_lut = "off"; +defparam \rd[1]~122 .lut_mask = 64'h0055FF55330F330F; +defparam \rd[1]~122 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X43_Y16_N21 +cyclonev_lcell_comb \RAM|mem[9][1]~feeder ( +// Equation(s): +// \RAM|mem[9][1]~feeder_combout = ( \RAM|mem~257_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~257_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[9][1]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[9][1]~feeder .extended_lut = "off"; +defparam \RAM|mem[9][1]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[9][1]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X43_Y16_N22 +dffeas \RAM|mem[9][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[9][1]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[9][2]~71_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[9][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[9][1] .is_wysiwyg = "true"; +defparam \RAM|mem[9][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X46_Y14_N34 +dffeas \RAM|mem[8][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[8][2]~67_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[8][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[8][1] .is_wysiwyg = "true"; +defparam \RAM|mem[8][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X53_Y11_N40 +dffeas \RAM|mem[10][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[10][4]~75_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[10][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[10][1] .is_wysiwyg = "true"; +defparam \RAM|mem[10][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X41_Y15_N56 +dffeas \RAM|mem[11][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[11][3]~79_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[11][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[11][1] .is_wysiwyg = "true"; +defparam \RAM|mem[11][1] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X41_Y15_N54 +cyclonev_lcell_comb \rd[1]~119 ( +// Equation(s): +// \rd[1]~119_combout = ( \RAM|mem[11][1]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & ((\RAM|mem[10][1]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[8][1]~q )) ) ) ) # ( !\RAM|mem[11][1]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout +// & ((\RAM|mem[10][1]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[8][1]~q )) ) ) ) # ( \RAM|mem[11][1]~q & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout ) # (\RAM|mem[9][1]~q ) ) ) ) # ( !\RAM|mem[11][1]~q & ( !\ALU|Mux31~3_combout & ( +// (\RAM|mem[9][1]~q & \ALU|Mux30~1_combout ) ) ) ) + + .dataa(!\RAM|mem[9][1]~q ), + .datab(!\RAM|mem[8][1]~q ), + .datac(!\RAM|mem[10][1]~q ), + .datad(!\ALU|Mux30~1_combout ), + .datae(!\RAM|mem[11][1]~q ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[1]~119_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[1]~119 .extended_lut = "off"; +defparam \rd[1]~119 .lut_mask = 64'h0055FF550F330F33; +defparam \rd[1]~119 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X41_Y16_N45 +cyclonev_lcell_comb \RAM|mem[42][1]~feeder ( +// Equation(s): +// \RAM|mem[42][1]~feeder_combout = ( \RAM|mem~257_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~257_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[42][1]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[42][1]~feeder .extended_lut = "off"; +defparam \RAM|mem[42][1]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[42][1]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X41_Y16_N46 +dffeas \RAM|mem[42][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[42][1]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[42][4]~107_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[42][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[42][1] .is_wysiwyg = "true"; +defparam \RAM|mem[42][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X45_Y12_N34 +dffeas \RAM|mem[40][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[40][4]~105_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[40][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[40][1] .is_wysiwyg = "true"; +defparam \RAM|mem[40][1] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X41_Y16_N33 +cyclonev_lcell_comb \RAM|mem[41][1]~feeder ( +// Equation(s): +// \RAM|mem[41][1]~feeder_combout = ( \RAM|mem~257_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~257_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[41][1]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[41][1]~feeder .extended_lut = "off"; +defparam \RAM|mem[41][1]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[41][1]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X41_Y16_N34 +dffeas \RAM|mem[41][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[41][1]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[41][1]~106_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[41][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[41][1] .is_wysiwyg = "true"; +defparam \RAM|mem[41][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X40_Y16_N53 +dffeas \RAM|mem[43][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[43][0]~108_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[43][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[43][1] .is_wysiwyg = "true"; +defparam \RAM|mem[43][1] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X40_Y16_N51 +cyclonev_lcell_comb \rd[1]~121 ( +// Equation(s): +// \rd[1]~121_combout = ( \RAM|mem[43][1]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & (\RAM|mem[42][1]~q )) # (\ALU|Mux30~1_combout & ((\RAM|mem[40][1]~q ))) ) ) ) # ( !\RAM|mem[43][1]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout +// & (\RAM|mem[42][1]~q )) # (\ALU|Mux30~1_combout & ((\RAM|mem[40][1]~q ))) ) ) ) # ( \RAM|mem[43][1]~q & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout ) # (\RAM|mem[41][1]~q ) ) ) ) # ( !\RAM|mem[43][1]~q & ( !\ALU|Mux31~3_combout & ( +// (\RAM|mem[41][1]~q & \ALU|Mux30~1_combout ) ) ) ) + + .dataa(!\RAM|mem[42][1]~q ), + .datab(!\RAM|mem[40][1]~q ), + .datac(!\RAM|mem[41][1]~q ), + .datad(!\ALU|Mux30~1_combout ), + .datae(!\RAM|mem[43][1]~q ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[1]~121_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[1]~121 .extended_lut = "off"; +defparam \rd[1]~121 .lut_mask = 64'h000FFF0F55335533; +defparam \rd[1]~121 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X40_Y9_N12 +cyclonev_lcell_comb \rd[1]~123 ( +// Equation(s): +// \rd[1]~123_combout = ( \rd[1]~119_combout & ( \rd[1]~121_combout & ( ((!\ALU|Mux26~1_combout & ((\rd[1]~122_combout ))) # (\ALU|Mux26~1_combout & (\rd[1]~120_combout ))) # (\ALU|Mux27~1_combout ) ) ) ) # ( !\rd[1]~119_combout & ( \rd[1]~121_combout +// & ( (!\ALU|Mux26~1_combout & (((\rd[1]~122_combout )) # (\ALU|Mux27~1_combout ))) # (\ALU|Mux26~1_combout & (!\ALU|Mux27~1_combout & (\rd[1]~120_combout ))) ) ) ) # ( \rd[1]~119_combout & ( !\rd[1]~121_combout & ( (!\ALU|Mux26~1_combout & +// (!\ALU|Mux27~1_combout & ((\rd[1]~122_combout )))) # (\ALU|Mux26~1_combout & (((\rd[1]~120_combout )) # (\ALU|Mux27~1_combout ))) ) ) ) # ( !\rd[1]~119_combout & ( !\rd[1]~121_combout & ( (!\ALU|Mux27~1_combout & ((!\ALU|Mux26~1_combout & +// ((\rd[1]~122_combout ))) # (\ALU|Mux26~1_combout & (\rd[1]~120_combout )))) ) ) ) + + .dataa(!\ALU|Mux26~1_combout ), + .datab(!\ALU|Mux27~1_combout ), + .datac(!\rd[1]~120_combout ), + .datad(!\rd[1]~122_combout ), + .datae(!\rd[1]~119_combout ), + .dataf(!\rd[1]~121_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[1]~123_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[1]~123 .extended_lut = "off"; +defparam \rd[1]~123 .lut_mask = 64'h048C159D26AE37BF; +defparam \rd[1]~123 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X40_Y9_N54 +cyclonev_lcell_comb \rd[1]~129 ( +// Equation(s): +// \rd[1]~129_combout = ( \rd[1]~118_combout & ( \rd[1]~123_combout & ( (!\ALU|Mux29~3_combout & (((\rd[1]~128_combout )) # (\ALU|Mux28~1_combout ))) # (\ALU|Mux29~3_combout & ((!\ALU|Mux28~1_combout ) # ((\rd[1]~113_combout )))) ) ) ) # ( +// !\rd[1]~118_combout & ( \rd[1]~123_combout & ( (!\ALU|Mux29~3_combout & (!\ALU|Mux28~1_combout & ((\rd[1]~128_combout )))) # (\ALU|Mux29~3_combout & ((!\ALU|Mux28~1_combout ) # ((\rd[1]~113_combout )))) ) ) ) # ( \rd[1]~118_combout & ( +// !\rd[1]~123_combout & ( (!\ALU|Mux29~3_combout & (((\rd[1]~128_combout )) # (\ALU|Mux28~1_combout ))) # (\ALU|Mux29~3_combout & (\ALU|Mux28~1_combout & (\rd[1]~113_combout ))) ) ) ) # ( !\rd[1]~118_combout & ( !\rd[1]~123_combout & ( +// (!\ALU|Mux29~3_combout & (!\ALU|Mux28~1_combout & ((\rd[1]~128_combout )))) # (\ALU|Mux29~3_combout & (\ALU|Mux28~1_combout & (\rd[1]~113_combout ))) ) ) ) + + .dataa(!\ALU|Mux29~3_combout ), + .datab(!\ALU|Mux28~1_combout ), + .datac(!\rd[1]~113_combout ), + .datad(!\rd[1]~128_combout ), + .datae(!\rd[1]~118_combout ), + .dataf(!\rd[1]~123_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[1]~129_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[1]~129 .extended_lut = "off"; +defparam \rd[1]~129 .lut_mask = 64'h018923AB45CD67EF; +defparam \rd[1]~129 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X47_Y5_N19 +dffeas \RAM|mem[113][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[113][0]~14_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[113][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[113][1] .is_wysiwyg = "true"; +defparam \RAM|mem[113][1] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X50_Y13_N9 +cyclonev_lcell_comb \RAM|mem[97][1]~feeder ( +// Equation(s): +// \RAM|mem[97][1]~feeder_combout = ( \RAM|mem~257_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~257_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[97][1]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[97][1]~feeder .extended_lut = "off"; +defparam \RAM|mem[97][1]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[97][1]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X50_Y13_N10 +dffeas \RAM|mem[97][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[97][1]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[97][4]~10_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[97][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[97][1] .is_wysiwyg = "true"; +defparam \RAM|mem[97][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X51_Y9_N32 +dffeas \RAM|mem[65][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[65][3]~2_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[65][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[65][1] .is_wysiwyg = "true"; +defparam \RAM|mem[65][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X47_Y13_N44 +dffeas \RAM|mem[81][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[81][0]~6_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[81][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[81][1] .is_wysiwyg = "true"; +defparam \RAM|mem[81][1] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X47_Y13_N42 +cyclonev_lcell_comb \rd[1]~156 ( +// Equation(s): +// \rd[1]~156_combout = ( \RAM|mem[81][1]~q & ( \ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout & (\RAM|mem[97][1]~q )) # (\ALU|Mux26~1_combout & ((\RAM|mem[65][1]~q ))) ) ) ) # ( !\RAM|mem[81][1]~q & ( \ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout +// & (\RAM|mem[97][1]~q )) # (\ALU|Mux26~1_combout & ((\RAM|mem[65][1]~q ))) ) ) ) # ( \RAM|mem[81][1]~q & ( !\ALU|Mux27~1_combout & ( (\ALU|Mux26~1_combout ) # (\RAM|mem[113][1]~q ) ) ) ) # ( !\RAM|mem[81][1]~q & ( !\ALU|Mux27~1_combout & ( +// (\RAM|mem[113][1]~q & !\ALU|Mux26~1_combout ) ) ) ) + + .dataa(!\RAM|mem[113][1]~q ), + .datab(!\RAM|mem[97][1]~q ), + .datac(!\RAM|mem[65][1]~q ), + .datad(!\ALU|Mux26~1_combout ), + .datae(!\RAM|mem[81][1]~q ), + .dataf(!\ALU|Mux27~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[1]~156_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[1]~156 .extended_lut = "off"; +defparam \rd[1]~156 .lut_mask = 64'h550055FF330F330F; +defparam \rd[1]~156 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X55_Y11_N21 +cyclonev_lcell_comb \RAM|mem[77][1]~feeder ( +// Equation(s): +// \RAM|mem[77][1]~feeder_combout = ( \RAM|mem~257_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~257_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[77][1]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[77][1]~feeder .extended_lut = "off"; +defparam \RAM|mem[77][1]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[77][1]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X55_Y11_N22 +dffeas \RAM|mem[77][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[77][1]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[77][3]~53_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[77][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[77][1] .is_wysiwyg = "true"; +defparam \RAM|mem[77][1] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X55_Y11_N27 +cyclonev_lcell_comb \RAM|mem[93][1]~feeder ( +// Equation(s): +// \RAM|mem[93][1]~feeder_combout = ( \RAM|mem~257_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~257_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[93][1]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[93][1]~feeder .extended_lut = "off"; +defparam \RAM|mem[93][1]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[93][1]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X55_Y11_N28 +dffeas \RAM|mem[93][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[93][1]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[93][2]~54_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[93][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[93][1] .is_wysiwyg = "true"; +defparam \RAM|mem[93][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X53_Y7_N19 +dffeas \RAM|mem[109][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[109][1]~55_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[109][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[109][1] .is_wysiwyg = "true"; +defparam \RAM|mem[109][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X47_Y13_N20 +dffeas \RAM|mem[125][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[125][4]~56_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[125][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[125][1] .is_wysiwyg = "true"; +defparam \RAM|mem[125][1] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X47_Y13_N18 +cyclonev_lcell_comb \rd[1]~159 ( +// Equation(s): +// \rd[1]~159_combout = ( \RAM|mem[125][1]~q & ( \ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout & ((\RAM|mem[109][1]~q ))) # (\ALU|Mux26~1_combout & (\RAM|mem[77][1]~q )) ) ) ) # ( !\RAM|mem[125][1]~q & ( \ALU|Mux27~1_combout & ( +// (!\ALU|Mux26~1_combout & ((\RAM|mem[109][1]~q ))) # (\ALU|Mux26~1_combout & (\RAM|mem[77][1]~q )) ) ) ) # ( \RAM|mem[125][1]~q & ( !\ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout ) # (\RAM|mem[93][1]~q ) ) ) ) # ( !\RAM|mem[125][1]~q & ( +// !\ALU|Mux27~1_combout & ( (\RAM|mem[93][1]~q & \ALU|Mux26~1_combout ) ) ) ) + + .dataa(!\RAM|mem[77][1]~q ), + .datab(!\RAM|mem[93][1]~q ), + .datac(!\RAM|mem[109][1]~q ), + .datad(!\ALU|Mux26~1_combout ), + .datae(!\RAM|mem[125][1]~q ), + .dataf(!\ALU|Mux27~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[1]~159_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[1]~159 .extended_lut = "off"; +defparam \rd[1]~159 .lut_mask = 64'h0033FF330F550F55; +defparam \rd[1]~159 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X54_Y12_N10 +dffeas \RAM|mem[69][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[69][1]~18_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[69][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[69][1] .is_wysiwyg = "true"; +defparam \RAM|mem[69][1] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X49_Y12_N27 +cyclonev_lcell_comb \RAM|mem[101][1]~feeder ( +// Equation(s): +// \RAM|mem[101][1]~feeder_combout = ( \RAM|mem~257_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~257_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[101][1]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[101][1]~feeder .extended_lut = "off"; +defparam \RAM|mem[101][1]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[101][1]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X49_Y12_N28 +dffeas \RAM|mem[101][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[101][1]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[101][1]~26_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[101][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[101][1] .is_wysiwyg = "true"; +defparam \RAM|mem[101][1] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X53_Y13_N30 +cyclonev_lcell_comb \RAM|mem[117][1]~feeder ( +// Equation(s): +// \RAM|mem[117][1]~feeder_combout = ( \RAM|mem~257_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~257_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[117][1]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[117][1]~feeder .extended_lut = "off"; +defparam \RAM|mem[117][1]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[117][1]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X53_Y13_N31 +dffeas \RAM|mem[117][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[117][1]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[117][2]~30_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[117][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[117][1] .is_wysiwyg = "true"; +defparam \RAM|mem[117][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X47_Y13_N38 +dffeas \RAM|mem[85][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[85][1]~22_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[85][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[85][1] .is_wysiwyg = "true"; +defparam \RAM|mem[85][1] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X47_Y13_N36 +cyclonev_lcell_comb \rd[1]~157 ( +// Equation(s): +// \rd[1]~157_combout = ( \RAM|mem[85][1]~q & ( \ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout & ((\RAM|mem[101][1]~q ))) # (\ALU|Mux26~1_combout & (\RAM|mem[69][1]~q )) ) ) ) # ( !\RAM|mem[85][1]~q & ( \ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout +// & ((\RAM|mem[101][1]~q ))) # (\ALU|Mux26~1_combout & (\RAM|mem[69][1]~q )) ) ) ) # ( \RAM|mem[85][1]~q & ( !\ALU|Mux27~1_combout & ( (\ALU|Mux26~1_combout ) # (\RAM|mem[117][1]~q ) ) ) ) # ( !\RAM|mem[85][1]~q & ( !\ALU|Mux27~1_combout & ( +// (\RAM|mem[117][1]~q & !\ALU|Mux26~1_combout ) ) ) ) + + .dataa(!\RAM|mem[69][1]~q ), + .datab(!\RAM|mem[101][1]~q ), + .datac(!\RAM|mem[117][1]~q ), + .datad(!\ALU|Mux26~1_combout ), + .datae(!\RAM|mem[85][1]~q ), + .dataf(!\ALU|Mux27~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[1]~157_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[1]~157 .extended_lut = "off"; +defparam \rd[1]~157 .lut_mask = 64'h0F000FFF33553355; +defparam \rd[1]~157 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X51_Y13_N12 +cyclonev_lcell_comb \RAM|mem[73][1]~feeder ( +// Equation(s): +// \RAM|mem[73][1]~feeder_combout = ( \RAM|mem~257_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~257_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[73][1]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[73][1]~feeder .extended_lut = "off"; +defparam \RAM|mem[73][1]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[73][1]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X51_Y13_N13 +dffeas \RAM|mem[73][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[73][1]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[73][1]~34_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[73][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[73][1] .is_wysiwyg = "true"; +defparam \RAM|mem[73][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X51_Y13_N56 +dffeas \RAM|mem[89][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[89][2]~38_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[89][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[89][1] .is_wysiwyg = "true"; +defparam \RAM|mem[89][1] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y14_N54 +cyclonev_lcell_comb \RAM|mem[105][1]~feeder ( +// Equation(s): +// \RAM|mem[105][1]~feeder_combout = ( \RAM|mem~257_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~257_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[105][1]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[105][1]~feeder .extended_lut = "off"; +defparam \RAM|mem[105][1]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[105][1]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X42_Y14_N55 +dffeas \RAM|mem[105][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[105][1]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[105][0]~42_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[105][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[105][1] .is_wysiwyg = "true"; +defparam \RAM|mem[105][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X48_Y13_N14 +dffeas \RAM|mem[121][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[121][2]~46_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[121][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[121][1] .is_wysiwyg = "true"; +defparam \RAM|mem[121][1] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X48_Y13_N12 +cyclonev_lcell_comb \rd[1]~158 ( +// Equation(s): +// \rd[1]~158_combout = ( \RAM|mem[121][1]~q & ( \ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout & ((\RAM|mem[105][1]~q ))) # (\ALU|Mux26~1_combout & (\RAM|mem[73][1]~q )) ) ) ) # ( !\RAM|mem[121][1]~q & ( \ALU|Mux27~1_combout & ( +// (!\ALU|Mux26~1_combout & ((\RAM|mem[105][1]~q ))) # (\ALU|Mux26~1_combout & (\RAM|mem[73][1]~q )) ) ) ) # ( \RAM|mem[121][1]~q & ( !\ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout ) # (\RAM|mem[89][1]~q ) ) ) ) # ( !\RAM|mem[121][1]~q & ( +// !\ALU|Mux27~1_combout & ( (\RAM|mem[89][1]~q & \ALU|Mux26~1_combout ) ) ) ) + + .dataa(!\RAM|mem[73][1]~q ), + .datab(!\RAM|mem[89][1]~q ), + .datac(!\ALU|Mux26~1_combout ), + .datad(!\RAM|mem[105][1]~q ), + .datae(!\RAM|mem[121][1]~q ), + .dataf(!\ALU|Mux27~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[1]~158_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[1]~158 .extended_lut = "off"; +defparam \rd[1]~158 .lut_mask = 64'h0303F3F305F505F5; +defparam \rd[1]~158 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X47_Y13_N12 +cyclonev_lcell_comb \rd[1]~160 ( +// Equation(s): +// \rd[1]~160_combout = ( \rd[1]~157_combout & ( \rd[1]~158_combout & ( (!\ALU|Mux28~1_combout & (((\ALU|Mux29~3_combout ) # (\rd[1]~159_combout )))) # (\ALU|Mux28~1_combout & (((!\ALU|Mux29~3_combout )) # (\rd[1]~156_combout ))) ) ) ) # ( +// !\rd[1]~157_combout & ( \rd[1]~158_combout & ( (!\ALU|Mux28~1_combout & (((\ALU|Mux29~3_combout ) # (\rd[1]~159_combout )))) # (\ALU|Mux28~1_combout & (\rd[1]~156_combout & ((\ALU|Mux29~3_combout )))) ) ) ) # ( \rd[1]~157_combout & ( +// !\rd[1]~158_combout & ( (!\ALU|Mux28~1_combout & (((\rd[1]~159_combout & !\ALU|Mux29~3_combout )))) # (\ALU|Mux28~1_combout & (((!\ALU|Mux29~3_combout )) # (\rd[1]~156_combout ))) ) ) ) # ( !\rd[1]~157_combout & ( !\rd[1]~158_combout & ( +// (!\ALU|Mux28~1_combout & (((\rd[1]~159_combout & !\ALU|Mux29~3_combout )))) # (\ALU|Mux28~1_combout & (\rd[1]~156_combout & ((\ALU|Mux29~3_combout )))) ) ) ) + + .dataa(!\ALU|Mux28~1_combout ), + .datab(!\rd[1]~156_combout ), + .datac(!\rd[1]~159_combout ), + .datad(!\ALU|Mux29~3_combout ), + .datae(!\rd[1]~157_combout ), + .dataf(!\rd[1]~158_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[1]~160_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[1]~160 .extended_lut = "off"; +defparam \rd[1]~160 .lut_mask = 64'h0A115F110ABB5FBB; +defparam \rd[1]~160 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X47_Y7_N31 +dffeas \RAM|mem[82][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[82][1]~7_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[82][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[82][1] .is_wysiwyg = "true"; +defparam \RAM|mem[82][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X47_Y7_N49 +dffeas \RAM|mem[98][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[98][3]~11_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[98][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[98][1] .is_wysiwyg = "true"; +defparam \RAM|mem[98][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X54_Y8_N55 +dffeas \RAM|mem[66][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[66][2]~3_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[66][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[66][1] .is_wysiwyg = "true"; +defparam \RAM|mem[66][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X50_Y9_N20 +dffeas \RAM|mem[114][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[114][0]~15_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[114][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[114][1] .is_wysiwyg = "true"; +defparam \RAM|mem[114][1] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X50_Y9_N18 +cyclonev_lcell_comb \rd[1]~161 ( +// Equation(s): +// \rd[1]~161_combout = ( \RAM|mem[114][1]~q & ( \ALU|Mux26~1_combout & ( (!\ALU|Mux27~1_combout & (\RAM|mem[82][1]~q )) # (\ALU|Mux27~1_combout & ((\RAM|mem[66][1]~q ))) ) ) ) # ( !\RAM|mem[114][1]~q & ( \ALU|Mux26~1_combout & ( +// (!\ALU|Mux27~1_combout & (\RAM|mem[82][1]~q )) # (\ALU|Mux27~1_combout & ((\RAM|mem[66][1]~q ))) ) ) ) # ( \RAM|mem[114][1]~q & ( !\ALU|Mux26~1_combout & ( (!\ALU|Mux27~1_combout ) # (\RAM|mem[98][1]~q ) ) ) ) # ( !\RAM|mem[114][1]~q & ( +// !\ALU|Mux26~1_combout & ( (\RAM|mem[98][1]~q & \ALU|Mux27~1_combout ) ) ) ) + + .dataa(!\RAM|mem[82][1]~q ), + .datab(!\RAM|mem[98][1]~q ), + .datac(!\ALU|Mux27~1_combout ), + .datad(!\RAM|mem[66][1]~q ), + .datae(!\RAM|mem[114][1]~q ), + .dataf(!\ALU|Mux26~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[1]~161_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[1]~161 .extended_lut = "off"; +defparam \rd[1]~161 .lut_mask = 64'h0303F3F3505F505F; +defparam \rd[1]~161 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X54_Y8_N37 +dffeas \RAM|mem[78][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[78][0]~57_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[78][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[78][1] .is_wysiwyg = "true"; +defparam \RAM|mem[78][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X50_Y10_N16 +dffeas \RAM|mem[94][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[94][4]~58_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[94][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[94][1] .is_wysiwyg = "true"; +defparam \RAM|mem[94][1] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X48_Y9_N24 +cyclonev_lcell_comb \RAM|mem[110][1]~feeder ( +// Equation(s): +// \RAM|mem[110][1]~feeder_combout = ( \RAM|mem~257_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~257_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[110][1]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[110][1]~feeder .extended_lut = "off"; +defparam \RAM|mem[110][1]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[110][1]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X48_Y9_N25 +dffeas \RAM|mem[110][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[110][1]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[110][0]~59_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[110][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[110][1] .is_wysiwyg = "true"; +defparam \RAM|mem[110][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X50_Y9_N50 +dffeas \RAM|mem[126][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[126][1]~60_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[126][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[126][1] .is_wysiwyg = "true"; +defparam \RAM|mem[126][1] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X50_Y9_N48 +cyclonev_lcell_comb \rd[1]~164 ( +// Equation(s): +// \rd[1]~164_combout = ( \RAM|mem[126][1]~q & ( \ALU|Mux26~1_combout & ( (!\ALU|Mux27~1_combout & ((\RAM|mem[94][1]~q ))) # (\ALU|Mux27~1_combout & (\RAM|mem[78][1]~q )) ) ) ) # ( !\RAM|mem[126][1]~q & ( \ALU|Mux26~1_combout & ( +// (!\ALU|Mux27~1_combout & ((\RAM|mem[94][1]~q ))) # (\ALU|Mux27~1_combout & (\RAM|mem[78][1]~q )) ) ) ) # ( \RAM|mem[126][1]~q & ( !\ALU|Mux26~1_combout & ( (!\ALU|Mux27~1_combout ) # (\RAM|mem[110][1]~q ) ) ) ) # ( !\RAM|mem[126][1]~q & ( +// !\ALU|Mux26~1_combout & ( (\ALU|Mux27~1_combout & \RAM|mem[110][1]~q ) ) ) ) + + .dataa(!\RAM|mem[78][1]~q ), + .datab(!\RAM|mem[94][1]~q ), + .datac(!\ALU|Mux27~1_combout ), + .datad(!\RAM|mem[110][1]~q ), + .datae(!\RAM|mem[126][1]~q ), + .dataf(!\ALU|Mux26~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[1]~164_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[1]~164 .extended_lut = "off"; +defparam \rd[1]~164 .lut_mask = 64'h000FF0FF35353535; +defparam \rd[1]~164 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X50_Y8_N48 +cyclonev_lcell_comb \RAM|mem[74][1]~feeder ( +// Equation(s): +// \RAM|mem[74][1]~feeder_combout = ( \RAM|mem~257_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~257_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[74][1]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[74][1]~feeder .extended_lut = "off"; +defparam \RAM|mem[74][1]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[74][1]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X50_Y8_N50 +dffeas \RAM|mem[74][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[74][1]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[74][1]~35_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[74][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[74][1] .is_wysiwyg = "true"; +defparam \RAM|mem[74][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X49_Y6_N28 +dffeas \RAM|mem[90][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[90][0]~39_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[90][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[90][1] .is_wysiwyg = "true"; +defparam \RAM|mem[90][1] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y14_N0 +cyclonev_lcell_comb \RAM|mem[106][1]~feeder ( +// Equation(s): +// \RAM|mem[106][1]~feeder_combout = ( \RAM|mem~257_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~257_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[106][1]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[106][1]~feeder .extended_lut = "off"; +defparam \RAM|mem[106][1]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[106][1]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X42_Y14_N1 +dffeas \RAM|mem[106][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[106][1]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[106][0]~43_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[106][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[106][1] .is_wysiwyg = "true"; +defparam \RAM|mem[106][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X50_Y8_N32 +dffeas \RAM|mem[122][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[122][2]~47_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[122][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[122][1] .is_wysiwyg = "true"; +defparam \RAM|mem[122][1] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X50_Y8_N30 +cyclonev_lcell_comb \rd[1]~163 ( +// Equation(s): +// \rd[1]~163_combout = ( \RAM|mem[122][1]~q & ( \ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout & ((\RAM|mem[106][1]~q ))) # (\ALU|Mux26~1_combout & (\RAM|mem[74][1]~q )) ) ) ) # ( !\RAM|mem[122][1]~q & ( \ALU|Mux27~1_combout & ( +// (!\ALU|Mux26~1_combout & ((\RAM|mem[106][1]~q ))) # (\ALU|Mux26~1_combout & (\RAM|mem[74][1]~q )) ) ) ) # ( \RAM|mem[122][1]~q & ( !\ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout ) # (\RAM|mem[90][1]~q ) ) ) ) # ( !\RAM|mem[122][1]~q & ( +// !\ALU|Mux27~1_combout & ( (\RAM|mem[90][1]~q & \ALU|Mux26~1_combout ) ) ) ) + + .dataa(!\RAM|mem[74][1]~q ), + .datab(!\RAM|mem[90][1]~q ), + .datac(!\RAM|mem[106][1]~q ), + .datad(!\ALU|Mux26~1_combout ), + .datae(!\RAM|mem[122][1]~q ), + .dataf(!\ALU|Mux27~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[1]~163_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[1]~163 .extended_lut = "off"; +defparam \rd[1]~163 .lut_mask = 64'h0033FF330F550F55; +defparam \rd[1]~163 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X51_Y7_N24 +cyclonev_lcell_comb \RAM|mem[70][1]~feeder ( +// Equation(s): +// \RAM|mem[70][1]~feeder_combout = ( \RAM|mem~257_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~257_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[70][1]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[70][1]~feeder .extended_lut = "off"; +defparam \RAM|mem[70][1]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[70][1]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X51_Y7_N25 +dffeas \RAM|mem[70][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[70][1]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[70][4]~19_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[70][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[70][1] .is_wysiwyg = "true"; +defparam \RAM|mem[70][1] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X54_Y13_N54 +cyclonev_lcell_comb \RAM|mem[102][1]~feeder ( +// Equation(s): +// \RAM|mem[102][1]~feeder_combout = ( \RAM|mem~257_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~257_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[102][1]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[102][1]~feeder .extended_lut = "off"; +defparam \RAM|mem[102][1]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[102][1]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X54_Y13_N56 +dffeas \RAM|mem[102][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[102][1]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[102][1]~27_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[102][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[102][1] .is_wysiwyg = "true"; +defparam \RAM|mem[102][1] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X51_Y7_N54 +cyclonev_lcell_comb \RAM|mem[86][1]~feeder ( +// Equation(s): +// \RAM|mem[86][1]~feeder_combout = ( \RAM|mem~257_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~257_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[86][1]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[86][1]~feeder .extended_lut = "off"; +defparam \RAM|mem[86][1]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[86][1]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X51_Y7_N55 +dffeas \RAM|mem[86][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[86][1]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[86][3]~23_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[86][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[86][1] .is_wysiwyg = "true"; +defparam \RAM|mem[86][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X50_Y9_N8 +dffeas \RAM|mem[118][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[118][4]~31_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[118][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[118][1] .is_wysiwyg = "true"; +defparam \RAM|mem[118][1] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X50_Y9_N6 +cyclonev_lcell_comb \rd[1]~162 ( +// Equation(s): +// \rd[1]~162_combout = ( \RAM|mem[118][1]~q & ( \ALU|Mux26~1_combout & ( (!\ALU|Mux27~1_combout & ((\RAM|mem[86][1]~q ))) # (\ALU|Mux27~1_combout & (\RAM|mem[70][1]~q )) ) ) ) # ( !\RAM|mem[118][1]~q & ( \ALU|Mux26~1_combout & ( +// (!\ALU|Mux27~1_combout & ((\RAM|mem[86][1]~q ))) # (\ALU|Mux27~1_combout & (\RAM|mem[70][1]~q )) ) ) ) # ( \RAM|mem[118][1]~q & ( !\ALU|Mux26~1_combout & ( (!\ALU|Mux27~1_combout ) # (\RAM|mem[102][1]~q ) ) ) ) # ( !\RAM|mem[118][1]~q & ( +// !\ALU|Mux26~1_combout & ( (\RAM|mem[102][1]~q & \ALU|Mux27~1_combout ) ) ) ) + + .dataa(!\RAM|mem[70][1]~q ), + .datab(!\RAM|mem[102][1]~q ), + .datac(!\RAM|mem[86][1]~q ), + .datad(!\ALU|Mux27~1_combout ), + .datae(!\RAM|mem[118][1]~q ), + .dataf(!\ALU|Mux26~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[1]~162_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[1]~162 .extended_lut = "off"; +defparam \rd[1]~162 .lut_mask = 64'h0033FF330F550F55; +defparam \rd[1]~162 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X50_Y9_N0 +cyclonev_lcell_comb \rd[1]~165 ( +// Equation(s): +// \rd[1]~165_combout = ( \rd[1]~163_combout & ( \rd[1]~162_combout & ( (!\ALU|Mux29~3_combout & (((\ALU|Mux28~1_combout ) # (\rd[1]~164_combout )))) # (\ALU|Mux29~3_combout & (((!\ALU|Mux28~1_combout )) # (\rd[1]~161_combout ))) ) ) ) # ( +// !\rd[1]~163_combout & ( \rd[1]~162_combout & ( (!\ALU|Mux29~3_combout & (((\ALU|Mux28~1_combout ) # (\rd[1]~164_combout )))) # (\ALU|Mux29~3_combout & (\rd[1]~161_combout & ((\ALU|Mux28~1_combout )))) ) ) ) # ( \rd[1]~163_combout & ( +// !\rd[1]~162_combout & ( (!\ALU|Mux29~3_combout & (((\rd[1]~164_combout & !\ALU|Mux28~1_combout )))) # (\ALU|Mux29~3_combout & (((!\ALU|Mux28~1_combout )) # (\rd[1]~161_combout ))) ) ) ) # ( !\rd[1]~163_combout & ( !\rd[1]~162_combout & ( +// (!\ALU|Mux29~3_combout & (((\rd[1]~164_combout & !\ALU|Mux28~1_combout )))) # (\ALU|Mux29~3_combout & (\rd[1]~161_combout & ((\ALU|Mux28~1_combout )))) ) ) ) + + .dataa(!\ALU|Mux29~3_combout ), + .datab(!\rd[1]~161_combout ), + .datac(!\rd[1]~164_combout ), + .datad(!\ALU|Mux28~1_combout ), + .datae(!\rd[1]~163_combout ), + .dataf(!\rd[1]~162_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[1]~165_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[1]~165 .extended_lut = "off"; +defparam \rd[1]~165 .lut_mask = 64'h0A115F110ABB5FBB; +defparam \rd[1]~165 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X46_Y8_N55 +dffeas \RAM|mem[127][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[127][1]~64_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[127][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[127][1] .is_wysiwyg = "true"; +defparam \RAM|mem[127][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X47_Y10_N28 +dffeas \RAM|mem[115][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[115][2]~16_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[115][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[115][1] .is_wysiwyg = "true"; +defparam \RAM|mem[115][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X46_Y8_N52 +dffeas \RAM|mem[119][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[119][4]~32_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[119][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[119][1] .is_wysiwyg = "true"; +defparam \RAM|mem[119][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X45_Y10_N26 +dffeas \RAM|mem[123][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[123][1]~48_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[123][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[123][1] .is_wysiwyg = "true"; +defparam \RAM|mem[123][1] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X45_Y10_N24 +cyclonev_lcell_comb \rd[1]~169 ( +// Equation(s): +// \rd[1]~169_combout = ( \RAM|mem[123][1]~q & ( \ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout & ((\RAM|mem[119][1]~q ))) # (\ALU|Mux29~3_combout & (\RAM|mem[115][1]~q )) ) ) ) # ( !\RAM|mem[123][1]~q & ( \ALU|Mux28~1_combout & ( +// (!\ALU|Mux29~3_combout & ((\RAM|mem[119][1]~q ))) # (\ALU|Mux29~3_combout & (\RAM|mem[115][1]~q )) ) ) ) # ( \RAM|mem[123][1]~q & ( !\ALU|Mux28~1_combout & ( (\ALU|Mux29~3_combout ) # (\RAM|mem[127][1]~q ) ) ) ) # ( !\RAM|mem[123][1]~q & ( +// !\ALU|Mux28~1_combout & ( (\RAM|mem[127][1]~q & !\ALU|Mux29~3_combout ) ) ) ) + + .dataa(!\RAM|mem[127][1]~q ), + .datab(!\RAM|mem[115][1]~q ), + .datac(!\RAM|mem[119][1]~q ), + .datad(!\ALU|Mux29~3_combout ), + .datae(!\RAM|mem[123][1]~q ), + .dataf(!\ALU|Mux28~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[1]~169_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[1]~169 .extended_lut = "off"; +defparam \rd[1]~169 .lut_mask = 64'h550055FF0F330F33; +defparam \rd[1]~169 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X43_Y13_N13 +dffeas \RAM|mem[107][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[107][2]~44_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[107][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[107][1] .is_wysiwyg = "true"; +defparam \RAM|mem[107][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X47_Y10_N46 +dffeas \RAM|mem[99][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[99][0]~12_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[99][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[99][1] .is_wysiwyg = "true"; +defparam \RAM|mem[99][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X42_Y7_N28 +dffeas \RAM|mem[103][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[103][1]~28_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[103][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[103][1] .is_wysiwyg = "true"; +defparam \RAM|mem[103][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X48_Y9_N38 +dffeas \RAM|mem[111][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[111][2]~63_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[111][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[111][1] .is_wysiwyg = "true"; +defparam \RAM|mem[111][1] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X48_Y9_N36 +cyclonev_lcell_comb \rd[1]~168 ( +// Equation(s): +// \rd[1]~168_combout = ( \RAM|mem[111][1]~q & ( \ALU|Mux29~3_combout & ( (!\ALU|Mux28~1_combout & (\RAM|mem[107][1]~q )) # (\ALU|Mux28~1_combout & ((\RAM|mem[99][1]~q ))) ) ) ) # ( !\RAM|mem[111][1]~q & ( \ALU|Mux29~3_combout & ( +// (!\ALU|Mux28~1_combout & (\RAM|mem[107][1]~q )) # (\ALU|Mux28~1_combout & ((\RAM|mem[99][1]~q ))) ) ) ) # ( \RAM|mem[111][1]~q & ( !\ALU|Mux29~3_combout & ( (!\ALU|Mux28~1_combout ) # (\RAM|mem[103][1]~q ) ) ) ) # ( !\RAM|mem[111][1]~q & ( +// !\ALU|Mux29~3_combout & ( (\RAM|mem[103][1]~q & \ALU|Mux28~1_combout ) ) ) ) + + .dataa(!\RAM|mem[107][1]~q ), + .datab(!\RAM|mem[99][1]~q ), + .datac(!\RAM|mem[103][1]~q ), + .datad(!\ALU|Mux28~1_combout ), + .datae(!\RAM|mem[111][1]~q ), + .dataf(!\ALU|Mux29~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[1]~168_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[1]~168 .extended_lut = "off"; +defparam \rd[1]~168 .lut_mask = 64'h000FFF0F55335533; +defparam \rd[1]~168 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X42_Y7_N7 +dffeas \RAM|mem[87][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[87][4]~24_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[87][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[87][1] .is_wysiwyg = "true"; +defparam \RAM|mem[87][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X47_Y7_N26 +dffeas \RAM|mem[83][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[83][0]~8_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[83][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[83][1] .is_wysiwyg = "true"; +defparam \RAM|mem[83][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X45_Y10_N34 +dffeas \RAM|mem[91][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[91][0]~40_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[91][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[91][1] .is_wysiwyg = "true"; +defparam \RAM|mem[91][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X49_Y7_N8 +dffeas \RAM|mem[95][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[95][4]~62_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[95][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[95][1] .is_wysiwyg = "true"; +defparam \RAM|mem[95][1] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X49_Y7_N6 +cyclonev_lcell_comb \rd[1]~167 ( +// Equation(s): +// \rd[1]~167_combout = ( \RAM|mem[95][1]~q & ( \ALU|Mux29~3_combout & ( (!\ALU|Mux28~1_combout & ((\RAM|mem[91][1]~q ))) # (\ALU|Mux28~1_combout & (\RAM|mem[83][1]~q )) ) ) ) # ( !\RAM|mem[95][1]~q & ( \ALU|Mux29~3_combout & ( (!\ALU|Mux28~1_combout +// & ((\RAM|mem[91][1]~q ))) # (\ALU|Mux28~1_combout & (\RAM|mem[83][1]~q )) ) ) ) # ( \RAM|mem[95][1]~q & ( !\ALU|Mux29~3_combout & ( (!\ALU|Mux28~1_combout ) # (\RAM|mem[87][1]~q ) ) ) ) # ( !\RAM|mem[95][1]~q & ( !\ALU|Mux29~3_combout & ( +// (\RAM|mem[87][1]~q & \ALU|Mux28~1_combout ) ) ) ) + + .dataa(!\RAM|mem[87][1]~q ), + .datab(!\RAM|mem[83][1]~q ), + .datac(!\RAM|mem[91][1]~q ), + .datad(!\ALU|Mux28~1_combout ), + .datae(!\RAM|mem[95][1]~q ), + .dataf(!\ALU|Mux29~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[1]~167_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[1]~167 .extended_lut = "off"; +defparam \rd[1]~167 .lut_mask = 64'h0055FF550F330F33; +defparam \rd[1]~167 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X51_Y9_N24 +cyclonev_lcell_comb \RAM|mem[67][1]~feeder ( +// Equation(s): +// \RAM|mem[67][1]~feeder_combout = ( \RAM|mem~257_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~257_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[67][1]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[67][1]~feeder .extended_lut = "off"; +defparam \RAM|mem[67][1]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[67][1]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X51_Y9_N25 +dffeas \RAM|mem[67][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[67][1]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[67][3]~4_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[67][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[67][1] .is_wysiwyg = "true"; +defparam \RAM|mem[67][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X42_Y7_N5 +dffeas \RAM|mem[71][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[71][3]~20_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[71][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[71][1] .is_wysiwyg = "true"; +defparam \RAM|mem[71][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X45_Y10_N52 +dffeas \RAM|mem[75][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[75][2]~36_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[75][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[75][1] .is_wysiwyg = "true"; +defparam \RAM|mem[75][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X49_Y7_N50 +dffeas \RAM|mem[79][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[79][0]~61_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[79][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[79][1] .is_wysiwyg = "true"; +defparam \RAM|mem[79][1] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X49_Y7_N48 +cyclonev_lcell_comb \rd[1]~166 ( +// Equation(s): +// \rd[1]~166_combout = ( \RAM|mem[79][1]~q & ( \ALU|Mux29~3_combout & ( (!\ALU|Mux28~1_combout & ((\RAM|mem[75][1]~q ))) # (\ALU|Mux28~1_combout & (\RAM|mem[67][1]~q )) ) ) ) # ( !\RAM|mem[79][1]~q & ( \ALU|Mux29~3_combout & ( (!\ALU|Mux28~1_combout +// & ((\RAM|mem[75][1]~q ))) # (\ALU|Mux28~1_combout & (\RAM|mem[67][1]~q )) ) ) ) # ( \RAM|mem[79][1]~q & ( !\ALU|Mux29~3_combout & ( (!\ALU|Mux28~1_combout ) # (\RAM|mem[71][1]~q ) ) ) ) # ( !\RAM|mem[79][1]~q & ( !\ALU|Mux29~3_combout & ( +// (\RAM|mem[71][1]~q & \ALU|Mux28~1_combout ) ) ) ) + + .dataa(!\RAM|mem[67][1]~q ), + .datab(!\RAM|mem[71][1]~q ), + .datac(!\RAM|mem[75][1]~q ), + .datad(!\ALU|Mux28~1_combout ), + .datae(!\RAM|mem[79][1]~q ), + .dataf(!\ALU|Mux29~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[1]~166_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[1]~166 .extended_lut = "off"; +defparam \rd[1]~166 .lut_mask = 64'h0033FF330F550F55; +defparam \rd[1]~166 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X48_Y9_N48 +cyclonev_lcell_comb \rd[1]~170 ( +// Equation(s): +// \rd[1]~170_combout = ( \rd[1]~167_combout & ( \rd[1]~166_combout & ( ((!\ALU|Mux27~1_combout & (\rd[1]~169_combout )) # (\ALU|Mux27~1_combout & ((\rd[1]~168_combout )))) # (\ALU|Mux26~1_combout ) ) ) ) # ( !\rd[1]~167_combout & ( \rd[1]~166_combout +// & ( (!\ALU|Mux26~1_combout & ((!\ALU|Mux27~1_combout & (\rd[1]~169_combout )) # (\ALU|Mux27~1_combout & ((\rd[1]~168_combout ))))) # (\ALU|Mux26~1_combout & (((\ALU|Mux27~1_combout )))) ) ) ) # ( \rd[1]~167_combout & ( !\rd[1]~166_combout & ( +// (!\ALU|Mux26~1_combout & ((!\ALU|Mux27~1_combout & (\rd[1]~169_combout )) # (\ALU|Mux27~1_combout & ((\rd[1]~168_combout ))))) # (\ALU|Mux26~1_combout & (((!\ALU|Mux27~1_combout )))) ) ) ) # ( !\rd[1]~167_combout & ( !\rd[1]~166_combout & ( +// (!\ALU|Mux26~1_combout & ((!\ALU|Mux27~1_combout & (\rd[1]~169_combout )) # (\ALU|Mux27~1_combout & ((\rd[1]~168_combout ))))) ) ) ) + + .dataa(!\ALU|Mux26~1_combout ), + .datab(!\rd[1]~169_combout ), + .datac(!\rd[1]~168_combout ), + .datad(!\ALU|Mux27~1_combout ), + .datae(!\rd[1]~167_combout ), + .dataf(!\rd[1]~166_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[1]~170_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[1]~170 .extended_lut = "off"; +defparam \rd[1]~170 .lut_mask = 64'h220A770A225F775F; +defparam \rd[1]~170 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X55_Y9_N50 +dffeas \RAM|mem[64][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[64][1]~1_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[64][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[64][1] .is_wysiwyg = "true"; +defparam \RAM|mem[64][1] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X54_Y13_N36 +cyclonev_lcell_comb \RAM|mem[96][1]~feeder ( +// Equation(s): +// \RAM|mem[96][1]~feeder_combout = ( \RAM|mem~257_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~257_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[96][1]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[96][1]~feeder .extended_lut = "off"; +defparam \RAM|mem[96][1]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[96][1]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X54_Y13_N37 +dffeas \RAM|mem[96][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[96][1]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[96][1]~9_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[96][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[96][1] .is_wysiwyg = "true"; +defparam \RAM|mem[96][1] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X55_Y9_N12 +cyclonev_lcell_comb \RAM|mem[112][1]~feeder ( +// Equation(s): +// \RAM|mem[112][1]~feeder_combout = ( \RAM|mem~257_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~257_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[112][1]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[112][1]~feeder .extended_lut = "off"; +defparam \RAM|mem[112][1]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[112][1]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X55_Y9_N14 +dffeas \RAM|mem[112][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[112][1]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[112][1]~13_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[112][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[112][1] .is_wysiwyg = "true"; +defparam \RAM|mem[112][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X55_Y9_N8 +dffeas \RAM|mem[80][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[80][0]~5_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[80][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[80][1] .is_wysiwyg = "true"; +defparam \RAM|mem[80][1] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X55_Y9_N6 +cyclonev_lcell_comb \rd[1]~151 ( +// Equation(s): +// \rd[1]~151_combout = ( \RAM|mem[80][1]~q & ( \ALU|Mux26~1_combout & ( (!\ALU|Mux27~1_combout ) # (\RAM|mem[64][1]~q ) ) ) ) # ( !\RAM|mem[80][1]~q & ( \ALU|Mux26~1_combout & ( (\RAM|mem[64][1]~q & \ALU|Mux27~1_combout ) ) ) ) # ( \RAM|mem[80][1]~q +// & ( !\ALU|Mux26~1_combout & ( (!\ALU|Mux27~1_combout & ((\RAM|mem[112][1]~q ))) # (\ALU|Mux27~1_combout & (\RAM|mem[96][1]~q )) ) ) ) # ( !\RAM|mem[80][1]~q & ( !\ALU|Mux26~1_combout & ( (!\ALU|Mux27~1_combout & ((\RAM|mem[112][1]~q ))) # +// (\ALU|Mux27~1_combout & (\RAM|mem[96][1]~q )) ) ) ) + + .dataa(!\RAM|mem[64][1]~q ), + .datab(!\RAM|mem[96][1]~q ), + .datac(!\ALU|Mux27~1_combout ), + .datad(!\RAM|mem[112][1]~q ), + .datae(!\RAM|mem[80][1]~q ), + .dataf(!\ALU|Mux26~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[1]~151_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[1]~151 .extended_lut = "off"; +defparam \rd[1]~151 .lut_mask = 64'h03F303F30505F5F5; +defparam \rd[1]~151 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X54_Y9_N31 +dffeas \RAM|mem[88][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[88][4]~37_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[88][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[88][1] .is_wysiwyg = "true"; +defparam \RAM|mem[88][1] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X53_Y13_N24 +cyclonev_lcell_comb \RAM|mem[104][1]~feeder ( +// Equation(s): +// \RAM|mem[104][1]~feeder_combout = ( \RAM|mem~257_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~257_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[104][1]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[104][1]~feeder .extended_lut = "off"; +defparam \RAM|mem[104][1]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[104][1]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X53_Y13_N25 +dffeas \RAM|mem[104][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[104][1]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[104][0]~41_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[104][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[104][1] .is_wysiwyg = "true"; +defparam \RAM|mem[104][1] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X54_Y9_N42 +cyclonev_lcell_comb \RAM|mem[72][1]~feeder ( +// Equation(s): +// \RAM|mem[72][1]~feeder_combout = ( \RAM|mem~257_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~257_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[72][1]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[72][1]~feeder .extended_lut = "off"; +defparam \RAM|mem[72][1]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[72][1]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X54_Y9_N44 +dffeas \RAM|mem[72][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[72][1]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[72][3]~33_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[72][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[72][1] .is_wysiwyg = "true"; +defparam \RAM|mem[72][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X54_Y9_N38 +dffeas \RAM|mem[120][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[120][0]~45_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[120][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[120][1] .is_wysiwyg = "true"; +defparam \RAM|mem[120][1] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X54_Y9_N36 +cyclonev_lcell_comb \rd[1]~153 ( +// Equation(s): +// \rd[1]~153_combout = ( \RAM|mem[120][1]~q & ( \ALU|Mux26~1_combout & ( (!\ALU|Mux27~1_combout & (\RAM|mem[88][1]~q )) # (\ALU|Mux27~1_combout & ((\RAM|mem[72][1]~q ))) ) ) ) # ( !\RAM|mem[120][1]~q & ( \ALU|Mux26~1_combout & ( +// (!\ALU|Mux27~1_combout & (\RAM|mem[88][1]~q )) # (\ALU|Mux27~1_combout & ((\RAM|mem[72][1]~q ))) ) ) ) # ( \RAM|mem[120][1]~q & ( !\ALU|Mux26~1_combout & ( (!\ALU|Mux27~1_combout ) # (\RAM|mem[104][1]~q ) ) ) ) # ( !\RAM|mem[120][1]~q & ( +// !\ALU|Mux26~1_combout & ( (\RAM|mem[104][1]~q & \ALU|Mux27~1_combout ) ) ) ) + + .dataa(!\RAM|mem[88][1]~q ), + .datab(!\RAM|mem[104][1]~q ), + .datac(!\ALU|Mux27~1_combout ), + .datad(!\RAM|mem[72][1]~q ), + .datae(!\RAM|mem[120][1]~q ), + .dataf(!\ALU|Mux26~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[1]~153_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[1]~153 .extended_lut = "off"; +defparam \rd[1]~153 .lut_mask = 64'h0303F3F3505F505F; +defparam \rd[1]~153 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X50_Y11_N42 +cyclonev_lcell_comb \RAM|mem[116][1]~feeder ( +// Equation(s): +// \RAM|mem[116][1]~feeder_combout = ( \RAM|mem~257_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~257_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[116][1]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[116][1]~feeder .extended_lut = "off"; +defparam \RAM|mem[116][1]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[116][1]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X50_Y11_N43 +dffeas \RAM|mem[116][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[116][1]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[116][0]~29_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[116][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[116][1] .is_wysiwyg = "true"; +defparam \RAM|mem[116][1] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X47_Y6_N30 +cyclonev_lcell_comb \RAM|mem[100][1]~feeder ( +// Equation(s): +// \RAM|mem[100][1]~feeder_combout = ( \RAM|mem~257_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~257_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[100][1]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[100][1]~feeder .extended_lut = "off"; +defparam \RAM|mem[100][1]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[100][1]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X47_Y6_N31 +dffeas \RAM|mem[100][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[100][1]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[100][0]~25_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[100][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[100][1] .is_wysiwyg = "true"; +defparam \RAM|mem[100][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X50_Y11_N11 +dffeas \RAM|mem[68][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[68][0]~17_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[68][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[68][1] .is_wysiwyg = "true"; +defparam \RAM|mem[68][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X50_Y11_N50 +dffeas \RAM|mem[84][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[84][1]~21_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[84][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[84][1] .is_wysiwyg = "true"; +defparam \RAM|mem[84][1] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X50_Y11_N48 +cyclonev_lcell_comb \rd[1]~152 ( +// Equation(s): +// \rd[1]~152_combout = ( \RAM|mem[84][1]~q & ( \ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout & (\RAM|mem[100][1]~q )) # (\ALU|Mux26~1_combout & ((\RAM|mem[68][1]~q ))) ) ) ) # ( !\RAM|mem[84][1]~q & ( \ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout +// & (\RAM|mem[100][1]~q )) # (\ALU|Mux26~1_combout & ((\RAM|mem[68][1]~q ))) ) ) ) # ( \RAM|mem[84][1]~q & ( !\ALU|Mux27~1_combout & ( (\ALU|Mux26~1_combout ) # (\RAM|mem[116][1]~q ) ) ) ) # ( !\RAM|mem[84][1]~q & ( !\ALU|Mux27~1_combout & ( +// (\RAM|mem[116][1]~q & !\ALU|Mux26~1_combout ) ) ) ) + + .dataa(!\RAM|mem[116][1]~q ), + .datab(!\RAM|mem[100][1]~q ), + .datac(!\ALU|Mux26~1_combout ), + .datad(!\RAM|mem[68][1]~q ), + .datae(!\RAM|mem[84][1]~q ), + .dataf(!\ALU|Mux27~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[1]~152_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[1]~152 .extended_lut = "off"; +defparam \rd[1]~152 .lut_mask = 64'h50505F5F303F303F; +defparam \rd[1]~152 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X55_Y10_N38 +dffeas \RAM|mem[92][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[92][2]~50_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[92][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[92][1] .is_wysiwyg = "true"; +defparam \RAM|mem[92][1] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X50_Y14_N33 +cyclonev_lcell_comb \RAM|mem[108][1]~feeder ( +// Equation(s): +// \RAM|mem[108][1]~feeder_combout = ( \RAM|mem~257_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~257_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[108][1]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[108][1]~feeder .extended_lut = "off"; +defparam \RAM|mem[108][1]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[108][1]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X50_Y14_N34 +dffeas \RAM|mem[108][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[108][1]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[108][3]~51_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[108][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[108][1] .is_wysiwyg = "true"; +defparam \RAM|mem[108][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X55_Y10_N19 +dffeas \RAM|mem[76][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[76][2]~49_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[76][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[76][1] .is_wysiwyg = "true"; +defparam \RAM|mem[76][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X55_Y10_N59 +dffeas \RAM|mem[124][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[124][2]~52_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[124][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[124][1] .is_wysiwyg = "true"; +defparam \RAM|mem[124][1] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X55_Y10_N57 +cyclonev_lcell_comb \rd[1]~154 ( +// Equation(s): +// \rd[1]~154_combout = ( \RAM|mem[124][1]~q & ( \ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout & (\RAM|mem[108][1]~q )) # (\ALU|Mux26~1_combout & ((\RAM|mem[76][1]~q ))) ) ) ) # ( !\RAM|mem[124][1]~q & ( \ALU|Mux27~1_combout & ( +// (!\ALU|Mux26~1_combout & (\RAM|mem[108][1]~q )) # (\ALU|Mux26~1_combout & ((\RAM|mem[76][1]~q ))) ) ) ) # ( \RAM|mem[124][1]~q & ( !\ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout ) # (\RAM|mem[92][1]~q ) ) ) ) # ( !\RAM|mem[124][1]~q & ( +// !\ALU|Mux27~1_combout & ( (\RAM|mem[92][1]~q & \ALU|Mux26~1_combout ) ) ) ) + + .dataa(!\RAM|mem[92][1]~q ), + .datab(!\RAM|mem[108][1]~q ), + .datac(!\RAM|mem[76][1]~q ), + .datad(!\ALU|Mux26~1_combout ), + .datae(!\RAM|mem[124][1]~q ), + .dataf(!\ALU|Mux27~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[1]~154_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[1]~154 .extended_lut = "off"; +defparam \rd[1]~154 .lut_mask = 64'h0055FF55330F330F; +defparam \rd[1]~154 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X54_Y9_N18 +cyclonev_lcell_comb \rd[1]~155 ( +// Equation(s): +// \rd[1]~155_combout = ( \rd[1]~152_combout & ( \rd[1]~154_combout & ( (!\ALU|Mux29~3_combout ) # ((!\ALU|Mux28~1_combout & ((\rd[1]~153_combout ))) # (\ALU|Mux28~1_combout & (\rd[1]~151_combout ))) ) ) ) # ( !\rd[1]~152_combout & ( \rd[1]~154_combout +// & ( (!\ALU|Mux29~3_combout & (((!\ALU|Mux28~1_combout )))) # (\ALU|Mux29~3_combout & ((!\ALU|Mux28~1_combout & ((\rd[1]~153_combout ))) # (\ALU|Mux28~1_combout & (\rd[1]~151_combout )))) ) ) ) # ( \rd[1]~152_combout & ( !\rd[1]~154_combout & ( +// (!\ALU|Mux29~3_combout & (((\ALU|Mux28~1_combout )))) # (\ALU|Mux29~3_combout & ((!\ALU|Mux28~1_combout & ((\rd[1]~153_combout ))) # (\ALU|Mux28~1_combout & (\rd[1]~151_combout )))) ) ) ) # ( !\rd[1]~152_combout & ( !\rd[1]~154_combout & ( +// (\ALU|Mux29~3_combout & ((!\ALU|Mux28~1_combout & ((\rd[1]~153_combout ))) # (\ALU|Mux28~1_combout & (\rd[1]~151_combout )))) ) ) ) + + .dataa(!\rd[1]~151_combout ), + .datab(!\ALU|Mux29~3_combout ), + .datac(!\rd[1]~153_combout ), + .datad(!\ALU|Mux28~1_combout ), + .datae(!\rd[1]~152_combout ), + .dataf(!\rd[1]~154_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[1]~155_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[1]~155 .extended_lut = "off"; +defparam \rd[1]~155 .lut_mask = 64'h031103DDCF11CFDD; +defparam \rd[1]~155 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X41_Y9_N42 +cyclonev_lcell_comb \rd[1]~171 ( +// Equation(s): +// \rd[1]~171_combout = ( \rd[1]~170_combout & ( \rd[1]~155_combout & ( (!\ALU|Mux30~1_combout & ((!\ALU|Mux31~3_combout ) # ((\rd[1]~165_combout )))) # (\ALU|Mux30~1_combout & (((\rd[1]~160_combout )) # (\ALU|Mux31~3_combout ))) ) ) ) # ( +// !\rd[1]~170_combout & ( \rd[1]~155_combout & ( (!\ALU|Mux30~1_combout & (\ALU|Mux31~3_combout & ((\rd[1]~165_combout )))) # (\ALU|Mux30~1_combout & (((\rd[1]~160_combout )) # (\ALU|Mux31~3_combout ))) ) ) ) # ( \rd[1]~170_combout & ( +// !\rd[1]~155_combout & ( (!\ALU|Mux30~1_combout & ((!\ALU|Mux31~3_combout ) # ((\rd[1]~165_combout )))) # (\ALU|Mux30~1_combout & (!\ALU|Mux31~3_combout & (\rd[1]~160_combout ))) ) ) ) # ( !\rd[1]~170_combout & ( !\rd[1]~155_combout & ( +// (!\ALU|Mux30~1_combout & (\ALU|Mux31~3_combout & ((\rd[1]~165_combout )))) # (\ALU|Mux30~1_combout & (!\ALU|Mux31~3_combout & (\rd[1]~160_combout ))) ) ) ) + + .dataa(!\ALU|Mux30~1_combout ), + .datab(!\ALU|Mux31~3_combout ), + .datac(!\rd[1]~160_combout ), + .datad(!\rd[1]~165_combout ), + .datae(!\rd[1]~170_combout ), + .dataf(!\rd[1]~155_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[1]~171_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[1]~171 .extended_lut = "off"; +defparam \rd[1]~171 .lut_mask = 64'h04268CAE15379DBF; +defparam \rd[1]~171 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X51_Y11_N56 +dffeas \RAM|mem[184][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[184][4]~179_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[184][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[184][1] .is_wysiwyg = "true"; +defparam \RAM|mem[184][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X41_Y9_N59 +dffeas \RAM|mem[185][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[185][4]~183_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[185][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[185][1] .is_wysiwyg = "true"; +defparam \RAM|mem[185][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X45_Y4_N13 +dffeas \RAM|mem[186][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[186][0]~187_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[186][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[186][1] .is_wysiwyg = "true"; +defparam \RAM|mem[186][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X41_Y9_N50 +dffeas \RAM|mem[187][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[187][0]~191_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[187][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[187][1] .is_wysiwyg = "true"; +defparam \RAM|mem[187][1] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X41_Y9_N48 +cyclonev_lcell_comb \rd[1]~143 ( +// Equation(s): +// \rd[1]~143_combout = ( \RAM|mem[187][1]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & ((\RAM|mem[186][1]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[184][1]~q )) ) ) ) # ( !\RAM|mem[187][1]~q & ( \ALU|Mux31~3_combout & ( +// (!\ALU|Mux30~1_combout & ((\RAM|mem[186][1]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[184][1]~q )) ) ) ) # ( \RAM|mem[187][1]~q & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout ) # (\RAM|mem[185][1]~q ) ) ) ) # ( !\RAM|mem[187][1]~q & ( +// !\ALU|Mux31~3_combout & ( (\RAM|mem[185][1]~q & \ALU|Mux30~1_combout ) ) ) ) + + .dataa(!\RAM|mem[184][1]~q ), + .datab(!\RAM|mem[185][1]~q ), + .datac(!\RAM|mem[186][1]~q ), + .datad(!\ALU|Mux30~1_combout ), + .datae(!\RAM|mem[187][1]~q ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[1]~143_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[1]~143 .extended_lut = "off"; +defparam \rd[1]~143 .lut_mask = 64'h0033FF330F550F55; +defparam \rd[1]~143 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X51_Y11_N52 +dffeas \RAM|mem[152][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[152][3]~147_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[152][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[152][1] .is_wysiwyg = "true"; +defparam \RAM|mem[152][1] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X45_Y4_N0 +cyclonev_lcell_comb \RAM|mem[154][1]~feeder ( +// Equation(s): +// \RAM|mem[154][1]~feeder_combout = ( \RAM|mem~257_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~257_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[154][1]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[154][1]~feeder .extended_lut = "off"; +defparam \RAM|mem[154][1]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[154][1]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X45_Y4_N1 +dffeas \RAM|mem[154][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[154][1]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[154][2]~155_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[154][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[154][1] .is_wysiwyg = "true"; +defparam \RAM|mem[154][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X51_Y12_N7 +dffeas \RAM|mem[153][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[153][0]~151_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[153][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[153][1] .is_wysiwyg = "true"; +defparam \RAM|mem[153][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X42_Y13_N56 +dffeas \RAM|mem[155][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[155][0]~159_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[155][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[155][1] .is_wysiwyg = "true"; +defparam \RAM|mem[155][1] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y13_N54 +cyclonev_lcell_comb \rd[1]~141 ( +// Equation(s): +// \rd[1]~141_combout = ( \RAM|mem[155][1]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & ((\RAM|mem[154][1]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[152][1]~q )) ) ) ) # ( !\RAM|mem[155][1]~q & ( \ALU|Mux31~3_combout & ( +// (!\ALU|Mux30~1_combout & ((\RAM|mem[154][1]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[152][1]~q )) ) ) ) # ( \RAM|mem[155][1]~q & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout ) # (\RAM|mem[153][1]~q ) ) ) ) # ( !\RAM|mem[155][1]~q & ( +// !\ALU|Mux31~3_combout & ( (\ALU|Mux30~1_combout & \RAM|mem[153][1]~q ) ) ) ) + + .dataa(!\ALU|Mux30~1_combout ), + .datab(!\RAM|mem[152][1]~q ), + .datac(!\RAM|mem[154][1]~q ), + .datad(!\RAM|mem[153][1]~q ), + .datae(!\RAM|mem[155][1]~q ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[1]~141_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[1]~141 .extended_lut = "off"; +defparam \rd[1]~141 .lut_mask = 64'h0055AAFF1B1B1B1B; +defparam \rd[1]~141 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X53_Y9_N50 +dffeas \RAM|mem[136][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[136][1]~131_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[136][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[136][1] .is_wysiwyg = "true"; +defparam \RAM|mem[136][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X53_Y9_N37 +dffeas \RAM|mem[138][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[138][3]~139_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[138][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[138][1] .is_wysiwyg = "true"; +defparam \RAM|mem[138][1] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X51_Y12_N54 +cyclonev_lcell_comb \RAM|mem[137][1]~feeder ( +// Equation(s): +// \RAM|mem[137][1]~feeder_combout = ( \RAM|mem~257_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~257_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[137][1]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[137][1]~feeder .extended_lut = "off"; +defparam \RAM|mem[137][1]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[137][1]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X51_Y12_N55 +dffeas \RAM|mem[137][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[137][1]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[137][1]~135_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[137][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[137][1] .is_wysiwyg = "true"; +defparam \RAM|mem[137][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X53_Y9_N20 +dffeas \RAM|mem[139][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[139][3]~143_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[139][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[139][1] .is_wysiwyg = "true"; +defparam \RAM|mem[139][1] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X53_Y9_N18 +cyclonev_lcell_comb \rd[1]~140 ( +// Equation(s): +// \rd[1]~140_combout = ( \RAM|mem[139][1]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & ((\RAM|mem[138][1]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[136][1]~q )) ) ) ) # ( !\RAM|mem[139][1]~q & ( \ALU|Mux31~3_combout & ( +// (!\ALU|Mux30~1_combout & ((\RAM|mem[138][1]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[136][1]~q )) ) ) ) # ( \RAM|mem[139][1]~q & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout ) # (\RAM|mem[137][1]~q ) ) ) ) # ( !\RAM|mem[139][1]~q & ( +// !\ALU|Mux31~3_combout & ( (\RAM|mem[137][1]~q & \ALU|Mux30~1_combout ) ) ) ) + + .dataa(!\RAM|mem[136][1]~q ), + .datab(!\RAM|mem[138][1]~q ), + .datac(!\RAM|mem[137][1]~q ), + .datad(!\ALU|Mux30~1_combout ), + .datae(!\RAM|mem[139][1]~q ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[1]~140_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[1]~140 .extended_lut = "off"; +defparam \rd[1]~140 .lut_mask = 64'h000FFF0F33553355; +defparam \rd[1]~140 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X51_Y11_N21 +cyclonev_lcell_comb \RAM|mem[168][1]~feeder ( +// Equation(s): +// \RAM|mem[168][1]~feeder_combout = ( \RAM|mem~257_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~257_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[168][1]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[168][1]~feeder .extended_lut = "off"; +defparam \RAM|mem[168][1]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[168][1]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X51_Y11_N23 +dffeas \RAM|mem[168][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[168][1]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[168][2]~169_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[168][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[168][1] .is_wysiwyg = "true"; +defparam \RAM|mem[168][1] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X45_Y4_N9 +cyclonev_lcell_comb \RAM|mem[170][1]~feeder ( +// Equation(s): +// \RAM|mem[170][1]~feeder_combout = ( \RAM|mem~257_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~257_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[170][1]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[170][1]~feeder .extended_lut = "off"; +defparam \RAM|mem[170][1]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[170][1]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X45_Y4_N10 +dffeas \RAM|mem[170][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[170][1]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[170][4]~171_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[170][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[170][1] .is_wysiwyg = "true"; +defparam \RAM|mem[170][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X42_Y13_N46 +dffeas \RAM|mem[169][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[169][2]~170_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[169][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[169][1] .is_wysiwyg = "true"; +defparam \RAM|mem[169][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X43_Y6_N14 +dffeas \RAM|mem[171][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[171][2]~172_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[171][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[171][1] .is_wysiwyg = "true"; +defparam \RAM|mem[171][1] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X43_Y6_N12 +cyclonev_lcell_comb \rd[1]~142 ( +// Equation(s): +// \rd[1]~142_combout = ( \RAM|mem[171][1]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & ((\RAM|mem[170][1]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[168][1]~q )) ) ) ) # ( !\RAM|mem[171][1]~q & ( \ALU|Mux31~3_combout & ( +// (!\ALU|Mux30~1_combout & ((\RAM|mem[170][1]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[168][1]~q )) ) ) ) # ( \RAM|mem[171][1]~q & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout ) # (\RAM|mem[169][1]~q ) ) ) ) # ( !\RAM|mem[171][1]~q & ( +// !\ALU|Mux31~3_combout & ( (\ALU|Mux30~1_combout & \RAM|mem[169][1]~q ) ) ) ) + + .dataa(!\RAM|mem[168][1]~q ), + .datab(!\RAM|mem[170][1]~q ), + .datac(!\ALU|Mux30~1_combout ), + .datad(!\RAM|mem[169][1]~q ), + .datae(!\RAM|mem[171][1]~q ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[1]~142_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[1]~142 .extended_lut = "off"; +defparam \rd[1]~142 .lut_mask = 64'h000FF0FF35353535; +defparam \rd[1]~142 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X41_Y9_N54 +cyclonev_lcell_comb \rd[1]~144 ( +// Equation(s): +// \rd[1]~144_combout = ( \rd[1]~140_combout & ( \rd[1]~142_combout & ( ((!\ALU|Mux26~1_combout & (\rd[1]~143_combout )) # (\ALU|Mux26~1_combout & ((\rd[1]~141_combout )))) # (\ALU|Mux27~1_combout ) ) ) ) # ( !\rd[1]~140_combout & ( \rd[1]~142_combout +// & ( (!\ALU|Mux27~1_combout & ((!\ALU|Mux26~1_combout & (\rd[1]~143_combout )) # (\ALU|Mux26~1_combout & ((\rd[1]~141_combout ))))) # (\ALU|Mux27~1_combout & (!\ALU|Mux26~1_combout )) ) ) ) # ( \rd[1]~140_combout & ( !\rd[1]~142_combout & ( +// (!\ALU|Mux27~1_combout & ((!\ALU|Mux26~1_combout & (\rd[1]~143_combout )) # (\ALU|Mux26~1_combout & ((\rd[1]~141_combout ))))) # (\ALU|Mux27~1_combout & (\ALU|Mux26~1_combout )) ) ) ) # ( !\rd[1]~140_combout & ( !\rd[1]~142_combout & ( +// (!\ALU|Mux27~1_combout & ((!\ALU|Mux26~1_combout & (\rd[1]~143_combout )) # (\ALU|Mux26~1_combout & ((\rd[1]~141_combout ))))) ) ) ) + + .dataa(!\ALU|Mux27~1_combout ), + .datab(!\ALU|Mux26~1_combout ), + .datac(!\rd[1]~143_combout ), + .datad(!\rd[1]~141_combout ), + .datae(!\rd[1]~140_combout ), + .dataf(!\rd[1]~142_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[1]~144_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[1]~144 .extended_lut = "off"; +defparam \rd[1]~144 .lut_mask = 64'h082A193B4C6E5D7F; +defparam \rd[1]~144 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X46_Y6_N54 +cyclonev_lcell_comb \RAM|mem[158][1]~feeder ( +// Equation(s): +// \RAM|mem[158][1]~feeder_combout = ( \RAM|mem~257_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~257_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[158][1]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[158][1]~feeder .extended_lut = "off"; +defparam \RAM|mem[158][1]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[158][1]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X46_Y6_N55 +dffeas \RAM|mem[158][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[158][1]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[158][4]~156_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[158][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[158][1] .is_wysiwyg = "true"; +defparam \RAM|mem[158][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X46_Y11_N59 +dffeas \RAM|mem[142][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[142][1]~140_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[142][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[142][1] .is_wysiwyg = "true"; +defparam \RAM|mem[142][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X45_Y8_N8 +dffeas \RAM|mem[174][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[174][4]~175_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[174][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[174][1] .is_wysiwyg = "true"; +defparam \RAM|mem[174][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X45_Y7_N50 +dffeas \RAM|mem[190][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[190][2]~188_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[190][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[190][1] .is_wysiwyg = "true"; +defparam \RAM|mem[190][1] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X45_Y7_N48 +cyclonev_lcell_comb \rd[1]~147 ( +// Equation(s): +// \rd[1]~147_combout = ( \RAM|mem[190][1]~q & ( \ALU|Mux26~1_combout & ( (!\ALU|Mux27~1_combout & (\RAM|mem[158][1]~q )) # (\ALU|Mux27~1_combout & ((\RAM|mem[142][1]~q ))) ) ) ) # ( !\RAM|mem[190][1]~q & ( \ALU|Mux26~1_combout & ( +// (!\ALU|Mux27~1_combout & (\RAM|mem[158][1]~q )) # (\ALU|Mux27~1_combout & ((\RAM|mem[142][1]~q ))) ) ) ) # ( \RAM|mem[190][1]~q & ( !\ALU|Mux26~1_combout & ( (!\ALU|Mux27~1_combout ) # (\RAM|mem[174][1]~q ) ) ) ) # ( !\RAM|mem[190][1]~q & ( +// !\ALU|Mux26~1_combout & ( (\ALU|Mux27~1_combout & \RAM|mem[174][1]~q ) ) ) ) + + .dataa(!\RAM|mem[158][1]~q ), + .datab(!\RAM|mem[142][1]~q ), + .datac(!\ALU|Mux27~1_combout ), + .datad(!\RAM|mem[174][1]~q ), + .datae(!\RAM|mem[190][1]~q ), + .dataf(!\ALU|Mux26~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[1]~147_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[1]~147 .extended_lut = "off"; +defparam \rd[1]~147 .lut_mask = 64'h000FF0FF53535353; +defparam \rd[1]~147 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X45_Y13_N8 +dffeas \RAM|mem[143][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[143][3]~144_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[143][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[143][1] .is_wysiwyg = "true"; +defparam \RAM|mem[143][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X46_Y10_N22 +dffeas \RAM|mem[175][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[175][0]~176_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[175][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[175][1] .is_wysiwyg = "true"; +defparam \RAM|mem[175][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X43_Y11_N35 +dffeas \RAM|mem[159][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[159][3]~160_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[159][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[159][1] .is_wysiwyg = "true"; +defparam \RAM|mem[159][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X43_Y6_N22 +dffeas \RAM|mem[191][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[191][2]~192_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[191][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[191][1] .is_wysiwyg = "true"; +defparam \RAM|mem[191][1] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X41_Y6_N33 +cyclonev_lcell_comb \rd[1]~148 ( +// Equation(s): +// \rd[1]~148_combout = ( \ALU|Mux27~1_combout & ( \ALU|Mux26~1_combout & ( \RAM|mem[143][1]~q ) ) ) # ( !\ALU|Mux27~1_combout & ( \ALU|Mux26~1_combout & ( \RAM|mem[159][1]~q ) ) ) # ( \ALU|Mux27~1_combout & ( !\ALU|Mux26~1_combout & ( +// \RAM|mem[175][1]~q ) ) ) # ( !\ALU|Mux27~1_combout & ( !\ALU|Mux26~1_combout & ( \RAM|mem[191][1]~q ) ) ) + + .dataa(!\RAM|mem[143][1]~q ), + .datab(!\RAM|mem[175][1]~q ), + .datac(!\RAM|mem[159][1]~q ), + .datad(!\RAM|mem[191][1]~q ), + .datae(!\ALU|Mux27~1_combout ), + .dataf(!\ALU|Mux26~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[1]~148_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[1]~148 .extended_lut = "off"; +defparam \rd[1]~148 .lut_mask = 64'h00FF33330F0F5555; +defparam \rd[1]~148 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X46_Y5_N0 +cyclonev_lcell_comb \RAM|mem[172][1]~feeder ( +// Equation(s): +// \RAM|mem[172][1]~feeder_combout = ( \RAM|mem~257_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~257_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[172][1]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[172][1]~feeder .extended_lut = "off"; +defparam \RAM|mem[172][1]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[172][1]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X46_Y5_N1 +dffeas \RAM|mem[172][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[172][1]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[172][2]~173_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[172][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[172][1] .is_wysiwyg = "true"; +defparam \RAM|mem[172][1] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y4_N30 +cyclonev_lcell_comb \RAM|mem[156][1]~feeder ( +// Equation(s): +// \RAM|mem[156][1]~feeder_combout = ( \RAM|mem~257_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~257_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[156][1]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[156][1]~feeder .extended_lut = "off"; +defparam \RAM|mem[156][1]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[156][1]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X42_Y4_N31 +dffeas \RAM|mem[156][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[156][1]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[156][1]~148_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[156][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[156][1] .is_wysiwyg = "true"; +defparam \RAM|mem[156][1] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X46_Y5_N54 +cyclonev_lcell_comb \RAM|mem[140][1]~feeder ( +// Equation(s): +// \RAM|mem[140][1]~feeder_combout = ( \RAM|mem~257_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~257_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[140][1]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[140][1]~feeder .extended_lut = "off"; +defparam \RAM|mem[140][1]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[140][1]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X46_Y5_N55 +dffeas \RAM|mem[140][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[140][1]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[140][4]~132_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[140][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[140][1] .is_wysiwyg = "true"; +defparam \RAM|mem[140][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X45_Y7_N8 +dffeas \RAM|mem[188][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[188][2]~180_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[188][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[188][1] .is_wysiwyg = "true"; +defparam \RAM|mem[188][1] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X45_Y7_N6 +cyclonev_lcell_comb \rd[1]~145 ( +// Equation(s): +// \rd[1]~145_combout = ( \RAM|mem[188][1]~q & ( \ALU|Mux26~1_combout & ( (!\ALU|Mux27~1_combout & (\RAM|mem[156][1]~q )) # (\ALU|Mux27~1_combout & ((\RAM|mem[140][1]~q ))) ) ) ) # ( !\RAM|mem[188][1]~q & ( \ALU|Mux26~1_combout & ( +// (!\ALU|Mux27~1_combout & (\RAM|mem[156][1]~q )) # (\ALU|Mux27~1_combout & ((\RAM|mem[140][1]~q ))) ) ) ) # ( \RAM|mem[188][1]~q & ( !\ALU|Mux26~1_combout & ( (!\ALU|Mux27~1_combout ) # (\RAM|mem[172][1]~q ) ) ) ) # ( !\RAM|mem[188][1]~q & ( +// !\ALU|Mux26~1_combout & ( (\RAM|mem[172][1]~q & \ALU|Mux27~1_combout ) ) ) ) + + .dataa(!\RAM|mem[172][1]~q ), + .datab(!\RAM|mem[156][1]~q ), + .datac(!\ALU|Mux27~1_combout ), + .datad(!\RAM|mem[140][1]~q ), + .datae(!\RAM|mem[188][1]~q ), + .dataf(!\ALU|Mux26~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[1]~145_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[1]~145 .extended_lut = "off"; +defparam \rd[1]~145 .lut_mask = 64'h0505F5F5303F303F; +defparam \rd[1]~145 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X46_Y10_N32 +dffeas \RAM|mem[173][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[173][1]~174_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[173][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[173][1] .is_wysiwyg = "true"; +defparam \RAM|mem[173][1] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X50_Y13_N42 +cyclonev_lcell_comb \RAM|mem[157][1]~feeder ( +// Equation(s): +// \RAM|mem[157][1]~feeder_combout = ( \RAM|mem~257_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~257_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[157][1]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[157][1]~feeder .extended_lut = "off"; +defparam \RAM|mem[157][1]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[157][1]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X50_Y13_N44 +dffeas \RAM|mem[157][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[157][1]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[157][3]~152_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[157][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[157][1] .is_wysiwyg = "true"; +defparam \RAM|mem[157][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X48_Y14_N16 +dffeas \RAM|mem[141][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[141][4]~136_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[141][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[141][1] .is_wysiwyg = "true"; +defparam \RAM|mem[141][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X50_Y13_N17 +dffeas \RAM|mem[189][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[189][3]~184_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[189][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[189][1] .is_wysiwyg = "true"; +defparam \RAM|mem[189][1] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X50_Y13_N15 +cyclonev_lcell_comb \rd[1]~146 ( +// Equation(s): +// \rd[1]~146_combout = ( \RAM|mem[189][1]~q & ( \ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout & (\RAM|mem[173][1]~q )) # (\ALU|Mux26~1_combout & ((\RAM|mem[141][1]~q ))) ) ) ) # ( !\RAM|mem[189][1]~q & ( \ALU|Mux27~1_combout & ( +// (!\ALU|Mux26~1_combout & (\RAM|mem[173][1]~q )) # (\ALU|Mux26~1_combout & ((\RAM|mem[141][1]~q ))) ) ) ) # ( \RAM|mem[189][1]~q & ( !\ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout ) # (\RAM|mem[157][1]~q ) ) ) ) # ( !\RAM|mem[189][1]~q & ( +// !\ALU|Mux27~1_combout & ( (\RAM|mem[157][1]~q & \ALU|Mux26~1_combout ) ) ) ) + + .dataa(!\RAM|mem[173][1]~q ), + .datab(!\RAM|mem[157][1]~q ), + .datac(!\ALU|Mux26~1_combout ), + .datad(!\RAM|mem[141][1]~q ), + .datae(!\RAM|mem[189][1]~q ), + .dataf(!\ALU|Mux27~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[1]~146_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[1]~146 .extended_lut = "off"; +defparam \rd[1]~146 .lut_mask = 64'h0303F3F3505F505F; +defparam \rd[1]~146 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X41_Y9_N12 +cyclonev_lcell_comb \rd[1]~149 ( +// Equation(s): +// \rd[1]~149_combout = ( \rd[1]~145_combout & ( \rd[1]~146_combout & ( ((!\ALU|Mux31~3_combout & ((\rd[1]~148_combout ))) # (\ALU|Mux31~3_combout & (\rd[1]~147_combout ))) # (\ALU|Mux30~1_combout ) ) ) ) # ( !\rd[1]~145_combout & ( \rd[1]~146_combout +// & ( (!\ALU|Mux30~1_combout & ((!\ALU|Mux31~3_combout & ((\rd[1]~148_combout ))) # (\ALU|Mux31~3_combout & (\rd[1]~147_combout )))) # (\ALU|Mux30~1_combout & (((!\ALU|Mux31~3_combout )))) ) ) ) # ( \rd[1]~145_combout & ( !\rd[1]~146_combout & ( +// (!\ALU|Mux30~1_combout & ((!\ALU|Mux31~3_combout & ((\rd[1]~148_combout ))) # (\ALU|Mux31~3_combout & (\rd[1]~147_combout )))) # (\ALU|Mux30~1_combout & (((\ALU|Mux31~3_combout )))) ) ) ) # ( !\rd[1]~145_combout & ( !\rd[1]~146_combout & ( +// (!\ALU|Mux30~1_combout & ((!\ALU|Mux31~3_combout & ((\rd[1]~148_combout ))) # (\ALU|Mux31~3_combout & (\rd[1]~147_combout )))) ) ) ) + + .dataa(!\rd[1]~147_combout ), + .datab(!\ALU|Mux30~1_combout ), + .datac(!\rd[1]~148_combout ), + .datad(!\ALU|Mux31~3_combout ), + .datae(!\rd[1]~145_combout ), + .dataf(!\rd[1]~146_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[1]~149_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[1]~149 .extended_lut = "off"; +defparam \rd[1]~149 .lut_mask = 64'h0C440C773F443F77; +defparam \rd[1]~149 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X51_Y8_N40 +dffeas \RAM|mem[144][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[144][3]~145_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[144][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[144][1] .is_wysiwyg = "true"; +defparam \RAM|mem[144][1] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X45_Y15_N15 +cyclonev_lcell_comb \RAM|mem[147][1]~feeder ( +// Equation(s): +// \RAM|mem[147][1]~feeder_combout = ( \RAM|mem~257_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~257_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[147][1]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[147][1]~feeder .extended_lut = "off"; +defparam \RAM|mem[147][1]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[147][1]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X45_Y15_N17 +dffeas \RAM|mem[147][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[147][1]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[147][1]~157_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[147][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[147][1] .is_wysiwyg = "true"; +defparam \RAM|mem[147][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X48_Y6_N19 +dffeas \RAM|mem[146][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[146][4]~153_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[146][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[146][1] .is_wysiwyg = "true"; +defparam \RAM|mem[146][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X42_Y12_N26 +dffeas \RAM|mem[145][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[145][3]~149_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[145][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[145][1] .is_wysiwyg = "true"; +defparam \RAM|mem[145][1] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y12_N24 +cyclonev_lcell_comb \rd[1]~131 ( +// Equation(s): +// \rd[1]~131_combout = ( \RAM|mem[145][1]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & ((\RAM|mem[146][1]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[144][1]~q )) ) ) ) # ( !\RAM|mem[145][1]~q & ( \ALU|Mux31~3_combout & ( +// (!\ALU|Mux30~1_combout & ((\RAM|mem[146][1]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[144][1]~q )) ) ) ) # ( \RAM|mem[145][1]~q & ( !\ALU|Mux31~3_combout & ( (\ALU|Mux30~1_combout ) # (\RAM|mem[147][1]~q ) ) ) ) # ( !\RAM|mem[145][1]~q & ( +// !\ALU|Mux31~3_combout & ( (\RAM|mem[147][1]~q & !\ALU|Mux30~1_combout ) ) ) ) + + .dataa(!\RAM|mem[144][1]~q ), + .datab(!\RAM|mem[147][1]~q ), + .datac(!\RAM|mem[146][1]~q ), + .datad(!\ALU|Mux30~1_combout ), + .datae(!\RAM|mem[145][1]~q ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[1]~131_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[1]~131 .extended_lut = "off"; +defparam \rd[1]~131 .lut_mask = 64'h330033FF0F550F55; +defparam \rd[1]~131 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X51_Y8_N7 +dffeas \RAM|mem[128][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[128][4]~129_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[128][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[128][1] .is_wysiwyg = "true"; +defparam \RAM|mem[128][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X42_Y5_N7 +dffeas \RAM|mem[130][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[130][1]~137_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[130][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[130][1] .is_wysiwyg = "true"; +defparam \RAM|mem[130][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X45_Y13_N1 +dffeas \RAM|mem[131][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[131][0]~141_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[131][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[131][1] .is_wysiwyg = "true"; +defparam \RAM|mem[131][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X42_Y5_N14 +dffeas \RAM|mem[129][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[129][0]~133_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[129][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[129][1] .is_wysiwyg = "true"; +defparam \RAM|mem[129][1] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y5_N12 +cyclonev_lcell_comb \rd[1]~130 ( +// Equation(s): +// \rd[1]~130_combout = ( \RAM|mem[129][1]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & ((\RAM|mem[130][1]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[128][1]~q )) ) ) ) # ( !\RAM|mem[129][1]~q & ( \ALU|Mux31~3_combout & ( +// (!\ALU|Mux30~1_combout & ((\RAM|mem[130][1]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[128][1]~q )) ) ) ) # ( \RAM|mem[129][1]~q & ( !\ALU|Mux31~3_combout & ( (\RAM|mem[131][1]~q ) # (\ALU|Mux30~1_combout ) ) ) ) # ( !\RAM|mem[129][1]~q & ( +// !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & \RAM|mem[131][1]~q ) ) ) ) + + .dataa(!\RAM|mem[128][1]~q ), + .datab(!\ALU|Mux30~1_combout ), + .datac(!\RAM|mem[130][1]~q ), + .datad(!\RAM|mem[131][1]~q ), + .datae(!\RAM|mem[129][1]~q ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[1]~130_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[1]~130 .extended_lut = "off"; +defparam \rd[1]~130 .lut_mask = 64'h00CC33FF1D1D1D1D; +defparam \rd[1]~130 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X45_Y11_N10 +dffeas \RAM|mem[162][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[162][0]~163_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[162][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[162][1] .is_wysiwyg = "true"; +defparam \RAM|mem[162][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X45_Y11_N37 +dffeas \RAM|mem[160][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[160][3]~161_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[160][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[160][1] .is_wysiwyg = "true"; +defparam \RAM|mem[160][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X48_Y6_N31 +dffeas \RAM|mem[161][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[161][0]~162_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[161][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[161][1] .is_wysiwyg = "true"; +defparam \RAM|mem[161][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X45_Y11_N20 +dffeas \RAM|mem[163][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[163][3]~164_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[163][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[163][1] .is_wysiwyg = "true"; +defparam \RAM|mem[163][1] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X45_Y11_N18 +cyclonev_lcell_comb \rd[1]~132 ( +// Equation(s): +// \rd[1]~132_combout = ( \RAM|mem[163][1]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & (\RAM|mem[162][1]~q )) # (\ALU|Mux30~1_combout & ((\RAM|mem[160][1]~q ))) ) ) ) # ( !\RAM|mem[163][1]~q & ( \ALU|Mux31~3_combout & ( +// (!\ALU|Mux30~1_combout & (\RAM|mem[162][1]~q )) # (\ALU|Mux30~1_combout & ((\RAM|mem[160][1]~q ))) ) ) ) # ( \RAM|mem[163][1]~q & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout ) # (\RAM|mem[161][1]~q ) ) ) ) # ( !\RAM|mem[163][1]~q & ( +// !\ALU|Mux31~3_combout & ( (\ALU|Mux30~1_combout & \RAM|mem[161][1]~q ) ) ) ) + + .dataa(!\RAM|mem[162][1]~q ), + .datab(!\RAM|mem[160][1]~q ), + .datac(!\ALU|Mux30~1_combout ), + .datad(!\RAM|mem[161][1]~q ), + .datae(!\RAM|mem[163][1]~q ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[1]~132_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[1]~132 .extended_lut = "off"; +defparam \rd[1]~132 .lut_mask = 64'h000FF0FF53535353; +defparam \rd[1]~132 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X45_Y6_N56 +dffeas \RAM|mem[178][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[178][3]~185_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[178][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[178][1] .is_wysiwyg = "true"; +defparam \RAM|mem[178][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X51_Y8_N52 +dffeas \RAM|mem[176][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[176][1]~177_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[176][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[176][1] .is_wysiwyg = "true"; +defparam \RAM|mem[176][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X49_Y6_N43 +dffeas \RAM|mem[177][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[177][3]~181_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[177][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[177][1] .is_wysiwyg = "true"; +defparam \RAM|mem[177][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X42_Y5_N44 +dffeas \RAM|mem[179][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[179][4]~189_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[179][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[179][1] .is_wysiwyg = "true"; +defparam \RAM|mem[179][1] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y5_N42 +cyclonev_lcell_comb \rd[1]~133 ( +// Equation(s): +// \rd[1]~133_combout = ( \RAM|mem[179][1]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & (\RAM|mem[178][1]~q )) # (\ALU|Mux30~1_combout & ((\RAM|mem[176][1]~q ))) ) ) ) # ( !\RAM|mem[179][1]~q & ( \ALU|Mux31~3_combout & ( +// (!\ALU|Mux30~1_combout & (\RAM|mem[178][1]~q )) # (\ALU|Mux30~1_combout & ((\RAM|mem[176][1]~q ))) ) ) ) # ( \RAM|mem[179][1]~q & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout ) # (\RAM|mem[177][1]~q ) ) ) ) # ( !\RAM|mem[179][1]~q & ( +// !\ALU|Mux31~3_combout & ( (\ALU|Mux30~1_combout & \RAM|mem[177][1]~q ) ) ) ) + + .dataa(!\RAM|mem[178][1]~q ), + .datab(!\ALU|Mux30~1_combout ), + .datac(!\RAM|mem[176][1]~q ), + .datad(!\RAM|mem[177][1]~q ), + .datae(!\RAM|mem[179][1]~q ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[1]~133_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[1]~133 .extended_lut = "off"; +defparam \rd[1]~133 .lut_mask = 64'h0033CCFF47474747; +defparam \rd[1]~133 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X41_Y9_N0 +cyclonev_lcell_comb \rd[1]~134 ( +// Equation(s): +// \rd[1]~134_combout = ( \rd[1]~132_combout & ( \rd[1]~133_combout & ( (!\ALU|Mux26~1_combout ) # ((!\ALU|Mux27~1_combout & (\rd[1]~131_combout )) # (\ALU|Mux27~1_combout & ((\rd[1]~130_combout )))) ) ) ) # ( !\rd[1]~132_combout & ( \rd[1]~133_combout +// & ( (!\ALU|Mux27~1_combout & (((!\ALU|Mux26~1_combout )) # (\rd[1]~131_combout ))) # (\ALU|Mux27~1_combout & (((\ALU|Mux26~1_combout & \rd[1]~130_combout )))) ) ) ) # ( \rd[1]~132_combout & ( !\rd[1]~133_combout & ( (!\ALU|Mux27~1_combout & +// (\rd[1]~131_combout & (\ALU|Mux26~1_combout ))) # (\ALU|Mux27~1_combout & (((!\ALU|Mux26~1_combout ) # (\rd[1]~130_combout )))) ) ) ) # ( !\rd[1]~132_combout & ( !\rd[1]~133_combout & ( (\ALU|Mux26~1_combout & ((!\ALU|Mux27~1_combout & +// (\rd[1]~131_combout )) # (\ALU|Mux27~1_combout & ((\rd[1]~130_combout ))))) ) ) ) + + .dataa(!\ALU|Mux27~1_combout ), + .datab(!\rd[1]~131_combout ), + .datac(!\ALU|Mux26~1_combout ), + .datad(!\rd[1]~130_combout ), + .datae(!\rd[1]~132_combout ), + .dataf(!\rd[1]~133_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[1]~134_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[1]~134 .extended_lut = "off"; +defparam \rd[1]~134 .lut_mask = 64'h02075257A2A7F2F7; +defparam \rd[1]~134 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X43_Y7_N50 +dffeas \RAM|mem[150][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[150][3]~154_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[150][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[150][1] .is_wysiwyg = "true"; +defparam \RAM|mem[150][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X45_Y6_N4 +dffeas \RAM|mem[148][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[148][1]~146_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[148][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[148][1] .is_wysiwyg = "true"; +defparam \RAM|mem[148][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X42_Y13_N52 +dffeas \RAM|mem[151][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[151][3]~158_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[151][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[151][1] .is_wysiwyg = "true"; +defparam \RAM|mem[151][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X43_Y7_N20 +dffeas \RAM|mem[149][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[149][4]~150_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[149][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[149][1] .is_wysiwyg = "true"; +defparam \RAM|mem[149][1] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X43_Y7_N18 +cyclonev_lcell_comb \rd[1]~136 ( +// Equation(s): +// \rd[1]~136_combout = ( \RAM|mem[149][1]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & (\RAM|mem[150][1]~q )) # (\ALU|Mux30~1_combout & ((\RAM|mem[148][1]~q ))) ) ) ) # ( !\RAM|mem[149][1]~q & ( \ALU|Mux31~3_combout & ( +// (!\ALU|Mux30~1_combout & (\RAM|mem[150][1]~q )) # (\ALU|Mux30~1_combout & ((\RAM|mem[148][1]~q ))) ) ) ) # ( \RAM|mem[149][1]~q & ( !\ALU|Mux31~3_combout & ( (\ALU|Mux30~1_combout ) # (\RAM|mem[151][1]~q ) ) ) ) # ( !\RAM|mem[149][1]~q & ( +// !\ALU|Mux31~3_combout & ( (\RAM|mem[151][1]~q & !\ALU|Mux30~1_combout ) ) ) ) + + .dataa(!\RAM|mem[150][1]~q ), + .datab(!\RAM|mem[148][1]~q ), + .datac(!\RAM|mem[151][1]~q ), + .datad(!\ALU|Mux30~1_combout ), + .datae(!\RAM|mem[149][1]~q ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[1]~136_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[1]~136 .extended_lut = "off"; +defparam \rd[1]~136 .lut_mask = 64'h0F000FFF55335533; +defparam \rd[1]~136 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X47_Y9_N37 +dffeas \RAM|mem[164][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[164][4]~165_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[164][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[164][1] .is_wysiwyg = "true"; +defparam \RAM|mem[164][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X47_Y9_N46 +dffeas \RAM|mem[165][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[165][2]~166_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[165][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[165][1] .is_wysiwyg = "true"; +defparam \RAM|mem[165][1] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X45_Y5_N6 +cyclonev_lcell_comb \RAM|mem[166][1]~feeder ( +// Equation(s): +// \RAM|mem[166][1]~feeder_combout = ( \RAM|mem~257_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~257_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[166][1]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[166][1]~feeder .extended_lut = "off"; +defparam \RAM|mem[166][1]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[166][1]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X45_Y5_N7 +dffeas \RAM|mem[166][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[166][1]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[166][2]~167_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[166][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[166][1] .is_wysiwyg = "true"; +defparam \RAM|mem[166][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X47_Y9_N26 +dffeas \RAM|mem[167][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[167][1]~168_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[167][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[167][1] .is_wysiwyg = "true"; +defparam \RAM|mem[167][1] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X47_Y9_N24 +cyclonev_lcell_comb \rd[1]~137 ( +// Equation(s): +// \rd[1]~137_combout = ( \RAM|mem[167][1]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & ((\RAM|mem[166][1]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[164][1]~q )) ) ) ) # ( !\RAM|mem[167][1]~q & ( \ALU|Mux31~3_combout & ( +// (!\ALU|Mux30~1_combout & ((\RAM|mem[166][1]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[164][1]~q )) ) ) ) # ( \RAM|mem[167][1]~q & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout ) # (\RAM|mem[165][1]~q ) ) ) ) # ( !\RAM|mem[167][1]~q & ( +// !\ALU|Mux31~3_combout & ( (\ALU|Mux30~1_combout & \RAM|mem[165][1]~q ) ) ) ) + + .dataa(!\ALU|Mux30~1_combout ), + .datab(!\RAM|mem[164][1]~q ), + .datac(!\RAM|mem[165][1]~q ), + .datad(!\RAM|mem[166][1]~q ), + .datae(!\RAM|mem[167][1]~q ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[1]~137_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[1]~137 .extended_lut = "off"; +defparam \rd[1]~137 .lut_mask = 64'h0505AFAF11BB11BB; +defparam \rd[1]~137 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X42_Y10_N31 +dffeas \RAM|mem[132][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[132][0]~130_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[132][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[132][1] .is_wysiwyg = "true"; +defparam \RAM|mem[132][1] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X45_Y5_N15 +cyclonev_lcell_comb \RAM|mem[134][1]~feeder ( +// Equation(s): +// \RAM|mem[134][1]~feeder_combout = ( \RAM|mem~257_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~257_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[134][1]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[134][1]~feeder .extended_lut = "off"; +defparam \RAM|mem[134][1]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[134][1]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X45_Y5_N17 +dffeas \RAM|mem[134][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[134][1]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[134][4]~138_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[134][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[134][1] .is_wysiwyg = "true"; +defparam \RAM|mem[134][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X43_Y13_N31 +dffeas \RAM|mem[135][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[135][3]~142_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[135][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[135][1] .is_wysiwyg = "true"; +defparam \RAM|mem[135][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X42_Y16_N29 +dffeas \RAM|mem[133][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[133][1]~134_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[133][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[133][1] .is_wysiwyg = "true"; +defparam \RAM|mem[133][1] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y16_N27 +cyclonev_lcell_comb \rd[1]~135 ( +// Equation(s): +// \rd[1]~135_combout = ( \RAM|mem[133][1]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & ((\RAM|mem[134][1]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[132][1]~q )) ) ) ) # ( !\RAM|mem[133][1]~q & ( \ALU|Mux31~3_combout & ( +// (!\ALU|Mux30~1_combout & ((\RAM|mem[134][1]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[132][1]~q )) ) ) ) # ( \RAM|mem[133][1]~q & ( !\ALU|Mux31~3_combout & ( (\RAM|mem[135][1]~q ) # (\ALU|Mux30~1_combout ) ) ) ) # ( !\RAM|mem[133][1]~q & ( +// !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & \RAM|mem[135][1]~q ) ) ) ) + + .dataa(!\RAM|mem[132][1]~q ), + .datab(!\RAM|mem[134][1]~q ), + .datac(!\ALU|Mux30~1_combout ), + .datad(!\RAM|mem[135][1]~q ), + .datae(!\RAM|mem[133][1]~q ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[1]~135_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[1]~135 .extended_lut = "off"; +defparam \rd[1]~135 .lut_mask = 64'h00F00FFF35353535; +defparam \rd[1]~135 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X49_Y11_N44 +dffeas \RAM|mem[181][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[181][4]~182_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[181][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[181][1] .is_wysiwyg = "true"; +defparam \RAM|mem[181][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X45_Y6_N43 +dffeas \RAM|mem[180][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[180][4]~178_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[180][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[180][1] .is_wysiwyg = "true"; +defparam \RAM|mem[180][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X45_Y8_N25 +dffeas \RAM|mem[182][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[182][0]~186_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[182][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[182][1] .is_wysiwyg = "true"; +defparam \RAM|mem[182][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X42_Y4_N38 +dffeas \RAM|mem[183][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~257_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[183][4]~190_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[183][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[183][1] .is_wysiwyg = "true"; +defparam \RAM|mem[183][1] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y4_N36 +cyclonev_lcell_comb \rd[1]~138 ( +// Equation(s): +// \rd[1]~138_combout = ( \RAM|mem[183][1]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & ((\RAM|mem[182][1]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[180][1]~q )) ) ) ) # ( !\RAM|mem[183][1]~q & ( \ALU|Mux31~3_combout & ( +// (!\ALU|Mux30~1_combout & ((\RAM|mem[182][1]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[180][1]~q )) ) ) ) # ( \RAM|mem[183][1]~q & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout ) # (\RAM|mem[181][1]~q ) ) ) ) # ( !\RAM|mem[183][1]~q & ( +// !\ALU|Mux31~3_combout & ( (\RAM|mem[181][1]~q & \ALU|Mux30~1_combout ) ) ) ) + + .dataa(!\RAM|mem[181][1]~q ), + .datab(!\ALU|Mux30~1_combout ), + .datac(!\RAM|mem[180][1]~q ), + .datad(!\RAM|mem[182][1]~q ), + .datae(!\RAM|mem[183][1]~q ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[1]~138_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[1]~138 .extended_lut = "off"; +defparam \rd[1]~138 .lut_mask = 64'h1111DDDD03CF03CF; +defparam \rd[1]~138 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X41_Y9_N6 +cyclonev_lcell_comb \rd[1]~139 ( +// Equation(s): +// \rd[1]~139_combout = ( \rd[1]~135_combout & ( \rd[1]~138_combout & ( (!\ALU|Mux27~1_combout & (((!\ALU|Mux26~1_combout )) # (\rd[1]~136_combout ))) # (\ALU|Mux27~1_combout & (((\ALU|Mux26~1_combout ) # (\rd[1]~137_combout )))) ) ) ) # ( +// !\rd[1]~135_combout & ( \rd[1]~138_combout & ( (!\ALU|Mux27~1_combout & (((!\ALU|Mux26~1_combout )) # (\rd[1]~136_combout ))) # (\ALU|Mux27~1_combout & (((\rd[1]~137_combout & !\ALU|Mux26~1_combout )))) ) ) ) # ( \rd[1]~135_combout & ( +// !\rd[1]~138_combout & ( (!\ALU|Mux27~1_combout & (\rd[1]~136_combout & ((\ALU|Mux26~1_combout )))) # (\ALU|Mux27~1_combout & (((\ALU|Mux26~1_combout ) # (\rd[1]~137_combout )))) ) ) ) # ( !\rd[1]~135_combout & ( !\rd[1]~138_combout & ( +// (!\ALU|Mux27~1_combout & (\rd[1]~136_combout & ((\ALU|Mux26~1_combout )))) # (\ALU|Mux27~1_combout & (((\rd[1]~137_combout & !\ALU|Mux26~1_combout )))) ) ) ) + + .dataa(!\ALU|Mux27~1_combout ), + .datab(!\rd[1]~136_combout ), + .datac(!\rd[1]~137_combout ), + .datad(!\ALU|Mux26~1_combout ), + .datae(!\rd[1]~135_combout ), + .dataf(!\rd[1]~138_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[1]~139_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[1]~139 .extended_lut = "off"; +defparam \rd[1]~139 .lut_mask = 64'h05220577AF22AF77; +defparam \rd[1]~139 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X41_Y9_N18 +cyclonev_lcell_comb \rd[1]~150 ( +// Equation(s): +// \rd[1]~150_combout = ( \rd[1]~134_combout & ( \rd[1]~139_combout & ( ((!\ALU|Mux29~3_combout & ((\rd[1]~149_combout ))) # (\ALU|Mux29~3_combout & (\rd[1]~144_combout ))) # (\ALU|Mux28~1_combout ) ) ) ) # ( !\rd[1]~134_combout & ( \rd[1]~139_combout +// & ( (!\ALU|Mux28~1_combout & ((!\ALU|Mux29~3_combout & ((\rd[1]~149_combout ))) # (\ALU|Mux29~3_combout & (\rd[1]~144_combout )))) # (\ALU|Mux28~1_combout & (!\ALU|Mux29~3_combout )) ) ) ) # ( \rd[1]~134_combout & ( !\rd[1]~139_combout & ( +// (!\ALU|Mux28~1_combout & ((!\ALU|Mux29~3_combout & ((\rd[1]~149_combout ))) # (\ALU|Mux29~3_combout & (\rd[1]~144_combout )))) # (\ALU|Mux28~1_combout & (\ALU|Mux29~3_combout )) ) ) ) # ( !\rd[1]~134_combout & ( !\rd[1]~139_combout & ( +// (!\ALU|Mux28~1_combout & ((!\ALU|Mux29~3_combout & ((\rd[1]~149_combout ))) # (\ALU|Mux29~3_combout & (\rd[1]~144_combout )))) ) ) ) + + .dataa(!\ALU|Mux28~1_combout ), + .datab(!\ALU|Mux29~3_combout ), + .datac(!\rd[1]~144_combout ), + .datad(!\rd[1]~149_combout ), + .datae(!\rd[1]~134_combout ), + .dataf(!\rd[1]~139_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[1]~150_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[1]~150 .extended_lut = "off"; +defparam \rd[1]~150 .lut_mask = 64'h028A139B46CE57DF; +defparam \rd[1]~150 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X41_Y9_N24 +cyclonev_lcell_comb \rd[1]~172 ( +// Equation(s): +// \rd[1]~172_combout = ( \rd[1]~171_combout & ( \rd[1]~150_combout & ( (!\CONTROL_UNIT|M2R[0]~0_combout & (((!\ALU|Mux30~1_combout )))) # (\CONTROL_UNIT|M2R[0]~0_combout & (!\ALU|Mux24~1_combout $ (((!\ALU|Mux25~1_combout ))))) ) ) ) # ( +// !\rd[1]~171_combout & ( \rd[1]~150_combout & ( (!\CONTROL_UNIT|M2R[0]~0_combout & (((!\ALU|Mux30~1_combout )))) # (\CONTROL_UNIT|M2R[0]~0_combout & (!\ALU|Mux24~1_combout & ((\ALU|Mux25~1_combout )))) ) ) ) # ( \rd[1]~171_combout & ( +// !\rd[1]~150_combout & ( (!\CONTROL_UNIT|M2R[0]~0_combout & (((!\ALU|Mux30~1_combout )))) # (\CONTROL_UNIT|M2R[0]~0_combout & (\ALU|Mux24~1_combout & ((!\ALU|Mux25~1_combout )))) ) ) ) # ( !\rd[1]~171_combout & ( !\rd[1]~150_combout & ( +// (!\CONTROL_UNIT|M2R[0]~0_combout & !\ALU|Mux30~1_combout ) ) ) ) + + .dataa(!\ALU|Mux24~1_combout ), + .datab(!\CONTROL_UNIT|M2R[0]~0_combout ), + .datac(!\ALU|Mux30~1_combout ), + .datad(!\ALU|Mux25~1_combout ), + .datae(!\rd[1]~171_combout ), + .dataf(!\rd[1]~150_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[1]~172_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[1]~172 .extended_lut = "off"; +defparam \rd[1]~172 .lut_mask = 64'hC0C0D1C0C0E2D1E2; +defparam \rd[1]~172 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X40_Y9_N51 +cyclonev_lcell_comb \rd[1]~173 ( +// Equation(s): +// \rd[1]~173_combout = ( \rd[1]~129_combout & ( \rd[1]~172_combout ) ) # ( !\rd[1]~129_combout & ( \rd[1]~172_combout ) ) # ( \rd[1]~129_combout & ( !\rd[1]~172_combout & ( (\CONTROL_UNIT|M2R[0]~0_combout & ((!\ALU|Mux24~1_combout & +// (!\ALU|Mux25~1_combout & \rd[1]~108_combout )) # (\ALU|Mux24~1_combout & (\ALU|Mux25~1_combout )))) ) ) ) # ( !\rd[1]~129_combout & ( !\rd[1]~172_combout & ( (!\ALU|Mux24~1_combout & (\CONTROL_UNIT|M2R[0]~0_combout & (!\ALU|Mux25~1_combout & +// \rd[1]~108_combout ))) ) ) ) + + .dataa(!\ALU|Mux24~1_combout ), + .datab(!\CONTROL_UNIT|M2R[0]~0_combout ), + .datac(!\ALU|Mux25~1_combout ), + .datad(!\rd[1]~108_combout ), + .datae(!\rd[1]~129_combout ), + .dataf(!\rd[1]~172_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[1]~173_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[1]~173 .extended_lut = "off"; +defparam \rd[1]~173 .lut_mask = 64'h00200121FFFFFFFF; +defparam \rd[1]~173 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X38_Y10_N56 +dffeas \REGS|regs[9][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[1]~173_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~29_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[9][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[9][1] .is_wysiwyg = "true"; +defparam \REGS|regs[9][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X35_Y9_N2 +dffeas \REGS|regs[8][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[1]~173_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~24_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[8][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[8][1] .is_wysiwyg = "true"; +defparam \REGS|regs[8][1] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X35_Y9_N42 +cyclonev_lcell_comb \REGS|Mux30~1 ( +// Equation(s): +// \REGS|Mux30~1_combout = ( \ROM|mem~0_combout & ( (!\ROM|mem~15_combout & ((\REGS|regs[8][1]~q ))) # (\ROM|mem~15_combout & (\REGS|regs[9][1]~q )) ) ) + + .dataa(!\REGS|regs[9][1]~q ), + .datab(gnd), + .datac(!\REGS|regs[8][1]~q ), + .datad(!\ROM|mem~15_combout ), + .datae(gnd), + .dataf(!\ROM|mem~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux30~1_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux30~1 .extended_lut = "off"; +defparam \REGS|Mux30~1 .lut_mask = 64'h000000000F550F55; +defparam \REGS|Mux30~1 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X35_Y9_N18 +cyclonev_lcell_comb \REGS|Mux30~0 ( +// Equation(s): +// \REGS|Mux30~0_combout = ( \REGS|Mux62~0_combout & ( \ROM|mem~16_combout & ( (!\ROM|mem~9_combout & (\REGS|Mux62~1_combout )) # (\ROM|mem~9_combout & ((\REGS|Mux62~3_combout ))) ) ) ) # ( !\REGS|Mux62~0_combout & ( \ROM|mem~16_combout & ( +// (!\ROM|mem~9_combout & (\REGS|Mux62~1_combout )) # (\ROM|mem~9_combout & ((\REGS|Mux62~3_combout ))) ) ) ) # ( \REGS|Mux62~0_combout & ( !\ROM|mem~16_combout & ( (!\ROM|mem~9_combout ) # (\REGS|Mux62~2_combout ) ) ) ) # ( !\REGS|Mux62~0_combout & ( +// !\ROM|mem~16_combout & ( (\REGS|Mux62~2_combout & \ROM|mem~9_combout ) ) ) ) + + .dataa(!\REGS|Mux62~2_combout ), + .datab(!\REGS|Mux62~1_combout ), + .datac(!\REGS|Mux62~3_combout ), + .datad(!\ROM|mem~9_combout ), + .datae(!\REGS|Mux62~0_combout ), + .dataf(!\ROM|mem~16_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux30~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux30~0 .extended_lut = "off"; +defparam \REGS|Mux30~0 .lut_mask = 64'h0055FF55330F330F; +defparam \REGS|Mux30~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X35_Y9_N36 +cyclonev_lcell_comb \REGS|Mux30~2 ( +// Equation(s): +// \REGS|Mux30~2_combout = ( \REGS|Mux30~0_combout & ( (((\ROM|mem~9_combout & \REGS|Mux62~4_combout )) # (\REGS|Mux30~1_combout )) # (\ROM|mem~17_combout ) ) ) # ( !\REGS|Mux30~0_combout & ( (!\ROM|mem~17_combout & (((\ROM|mem~9_combout & +// \REGS|Mux62~4_combout )) # (\REGS|Mux30~1_combout ))) ) ) + + .dataa(!\ROM|mem~9_combout ), + .datab(!\ROM|mem~17_combout ), + .datac(!\REGS|Mux30~1_combout ), + .datad(!\REGS|Mux62~4_combout ), + .datae(gnd), + .dataf(!\REGS|Mux30~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux30~2_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux30~2 .extended_lut = "off"; +defparam \REGS|Mux30~2 .lut_mask = 64'h0C4C0C4C3F7F3F7F; +defparam \REGS|Mux30~2 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X43_Y11_N0 +cyclonev_lcell_comb \ALU|Mux29~3 ( +// Equation(s): +// \ALU|Mux29~3_combout = ( \ALU|adder_unit|OUT_1 [2] & ( (!\ALU|Mux29~2_combout & \ALU|Mux29~0_combout ) ) ) # ( !\ALU|adder_unit|OUT_1 [2] & ( !\ALU|Mux29~2_combout ) ) + + .dataa(gnd), + .datab(gnd), + .datac(!\ALU|Mux29~2_combout ), + .datad(!\ALU|Mux29~0_combout ), + .datae(gnd), + .dataf(!\ALU|adder_unit|OUT_1 [2]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\ALU|Mux29~3_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \ALU|Mux29~3 .extended_lut = "off"; +defparam \ALU|Mux29~3 .lut_mask = 64'hF0F0F0F000F000F0; +defparam \ALU|Mux29~3 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X38_Y12_N56 +dffeas \REGS|regs[2][2]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[2]~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~32_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[2][2]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[2][2]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[2][2]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: FF_X38_Y12_N44 +dffeas \REGS|regs[10][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[2]~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~33_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[10][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[10][2] .is_wysiwyg = "true"; +defparam \REGS|regs[10][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X38_Y12_N35 +dffeas \REGS|regs[11][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[2]~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~37_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[11][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[11][2] .is_wysiwyg = "true"; +defparam \REGS|regs[11][2] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X38_Y12_N57 +cyclonev_lcell_comb \REGS|Mux61~12 ( +// Equation(s): +// \REGS|Mux61~12_combout = ( \ROM|mem~10_combout & ( \ROM|mem~0_combout & ( \REGS|regs[10][2]~q ) ) ) # ( !\ROM|mem~10_combout & ( \ROM|mem~0_combout & ( \REGS|regs[11][2]~q ) ) ) # ( \ROM|mem~10_combout & ( !\ROM|mem~0_combout & ( +// \REGS|regs[2][2]~DUPLICATE_q ) ) ) # ( !\ROM|mem~10_combout & ( !\ROM|mem~0_combout & ( \REGS|regs[2][2]~DUPLICATE_q ) ) ) + + .dataa(!\REGS|regs[2][2]~DUPLICATE_q ), + .datab(gnd), + .datac(!\REGS|regs[10][2]~q ), + .datad(!\REGS|regs[11][2]~q ), + .datae(!\ROM|mem~10_combout ), + .dataf(!\ROM|mem~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux61~12_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux61~12 .extended_lut = "off"; +defparam \REGS|Mux61~12 .lut_mask = 64'h5555555500FF0F0F; +defparam \REGS|Mux61~12 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X40_Y12_N20 +dffeas \REGS|regs[8][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[2]~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~24_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[8][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[8][2] .is_wysiwyg = "true"; +defparam \REGS|regs[8][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X40_Y13_N11 +dffeas \REGS|regs[1][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[2]~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~28_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[1][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[1][2] .is_wysiwyg = "true"; +defparam \REGS|regs[1][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X37_Y14_N40 +dffeas \REGS|regs[9][2]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[9][2]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~29_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[9][2]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[9][2]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[9][2]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X40_Y12_N21 +cyclonev_lcell_comb \REGS|Mux61~13 ( +// Equation(s): +// \REGS|Mux61~13_combout = ( !\rt_alu[17]~11_combout & ( \rt_alu[17]~10_combout & ( (!\ROM|mem~0_combout & (\REGS|regs[1][2]~q )) # (\ROM|mem~0_combout & ((\REGS|regs[9][2]~DUPLICATE_q ))) ) ) ) # ( !\rt_alu[17]~11_combout & ( !\rt_alu[17]~10_combout +// & ( (\REGS|regs[8][2]~q & \ROM|mem~0_combout ) ) ) ) + + .dataa(!\REGS|regs[8][2]~q ), + .datab(!\REGS|regs[1][2]~q ), + .datac(!\ROM|mem~0_combout ), + .datad(!\REGS|regs[9][2]~DUPLICATE_q ), + .datae(!\rt_alu[17]~11_combout ), + .dataf(!\rt_alu[17]~10_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux61~13_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux61~13 .extended_lut = "off"; +defparam \REGS|Mux61~13 .lut_mask = 64'h05050000303F0000; +defparam \REGS|Mux61~13 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X40_Y14_N1 +dffeas \REGS|regs[15][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[2]~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~39_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[15][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[15][2] .is_wysiwyg = "true"; +defparam \REGS|regs[15][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X40_Y14_N8 +dffeas \REGS|regs[14][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[2]~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~35_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[14][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[14][2] .is_wysiwyg = "true"; +defparam \REGS|regs[14][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X40_Y12_N17 +dffeas \REGS|regs[6][2]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[2]~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~34_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[6][2]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[6][2]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[6][2]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X40_Y12_N42 +cyclonev_lcell_comb \REGS|Mux61~8 ( +// Equation(s): +// \REGS|Mux61~8_combout = ( \ROM|mem~0_combout & ( \ROM|mem~10_combout & ( \REGS|regs[14][2]~q ) ) ) # ( !\ROM|mem~0_combout & ( \ROM|mem~10_combout & ( \REGS|regs[6][2]~DUPLICATE_q ) ) ) # ( \ROM|mem~0_combout & ( !\ROM|mem~10_combout & ( +// \REGS|regs[15][2]~q ) ) ) # ( !\ROM|mem~0_combout & ( !\ROM|mem~10_combout & ( \REGS|regs[6][2]~DUPLICATE_q ) ) ) + + .dataa(!\REGS|regs[15][2]~q ), + .datab(gnd), + .datac(!\REGS|regs[14][2]~q ), + .datad(!\REGS|regs[6][2]~DUPLICATE_q ), + .datae(!\ROM|mem~0_combout ), + .dataf(!\ROM|mem~10_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux61~8_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux61~8 .extended_lut = "off"; +defparam \REGS|Mux61~8 .lut_mask = 64'h00FF555500FF0F0F; +defparam \REGS|Mux61~8 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X40_Y12_N6 +cyclonev_lcell_comb \REGS|Mux61~11 ( +// Equation(s): +// \REGS|Mux61~11_combout = ( \ROM|mem~13_combout & ( (!\ROM|mem~12_combout & ((\REGS|Mux61~9_combout ))) # (\ROM|mem~12_combout & (\REGS|Mux61~8_combout )) ) ) # ( !\ROM|mem~13_combout & ( (!\ROM|mem~12_combout & (\REGS|Mux61~10_combout )) # +// (\ROM|mem~12_combout & ((\REGS|Mux61~8_combout ))) ) ) + + .dataa(!\REGS|Mux61~10_combout ), + .datab(!\REGS|Mux61~8_combout ), + .datac(!\REGS|Mux61~9_combout ), + .datad(!\ROM|mem~12_combout ), + .datae(gnd), + .dataf(!\ROM|mem~13_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux61~11_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux61~11 .extended_lut = "off"; +defparam \REGS|Mux61~11 .lut_mask = 64'h553355330F330F33; +defparam \REGS|Mux61~11 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X40_Y12_N39 +cyclonev_lcell_comb \REGS|Mux61~14 ( +// Equation(s): +// \REGS|Mux61~14_combout = ( !\REGS|Mux61~13_combout & ( \REGS|Mux61~11_combout & ( (!\rt_alu[17]~11_combout ) # ((!\REGS|Mux61~12_combout & \rt_alu[17]~10_combout )) ) ) ) # ( !\REGS|Mux61~13_combout & ( !\REGS|Mux61~11_combout & ( +// (!\rt_alu[17]~11_combout ) # ((!\REGS|Mux61~12_combout ) # (!\rt_alu[17]~10_combout )) ) ) ) + + .dataa(!\rt_alu[17]~11_combout ), + .datab(gnd), + .datac(!\REGS|Mux61~12_combout ), + .datad(!\rt_alu[17]~10_combout ), + .datae(!\REGS|Mux61~13_combout ), + .dataf(!\REGS|Mux61~11_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux61~14_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux61~14 .extended_lut = "off"; +defparam \REGS|Mux61~14 .lut_mask = 64'hFFFA0000AAFA0000; +defparam \REGS|Mux61~14 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X47_Y11_N45 +cyclonev_lcell_comb \RAM|mem~258 ( +// Equation(s): +// \RAM|mem~258_combout = ( \REGS|Mux61~14_combout & ( (!\rst[0]~input_o & (\ROM|mem~9_combout & \REGS|Mux61~7_combout )) ) ) # ( !\REGS|Mux61~14_combout & ( (!\rst[0]~input_o & ((!\ROM|mem~9_combout ) # (\REGS|Mux61~7_combout ))) ) ) + + .dataa(gnd), + .datab(!\rst[0]~input_o ), + .datac(!\ROM|mem~9_combout ), + .datad(!\REGS|Mux61~7_combout ), + .datae(gnd), + .dataf(!\REGS|Mux61~14_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem~258_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem~258 .extended_lut = "off"; +defparam \RAM|mem~258 .lut_mask = 64'hC0CCC0CC000C000C; +defparam \RAM|mem~258 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X46_Y10_N55 +dffeas \RAM|mem[175][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[175][0]~176_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[175][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[175][2] .is_wysiwyg = "true"; +defparam \RAM|mem[175][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X47_Y9_N58 +dffeas \RAM|mem[167][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[167][1]~168_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[167][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[167][2] .is_wysiwyg = "true"; +defparam \RAM|mem[167][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X45_Y11_N22 +dffeas \RAM|mem[163][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[163][3]~164_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[163][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[163][2] .is_wysiwyg = "true"; +defparam \RAM|mem[163][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X42_Y10_N17 +dffeas \RAM|mem[171][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[171][2]~172_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[171][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[171][2] .is_wysiwyg = "true"; +defparam \RAM|mem[171][2] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X46_Y10_N24 +cyclonev_lcell_comb \rd[2]~234 ( +// Equation(s): +// \rd[2]~234_combout = ( \ALU|Mux29~3_combout & ( \ALU|Mux28~1_combout & ( \RAM|mem[163][2]~q ) ) ) # ( !\ALU|Mux29~3_combout & ( \ALU|Mux28~1_combout & ( \RAM|mem[167][2]~q ) ) ) # ( \ALU|Mux29~3_combout & ( !\ALU|Mux28~1_combout & ( +// \RAM|mem[171][2]~q ) ) ) # ( !\ALU|Mux29~3_combout & ( !\ALU|Mux28~1_combout & ( \RAM|mem[175][2]~q ) ) ) + + .dataa(!\RAM|mem[175][2]~q ), + .datab(!\RAM|mem[167][2]~q ), + .datac(!\RAM|mem[163][2]~q ), + .datad(!\RAM|mem[171][2]~q ), + .datae(!\ALU|Mux29~3_combout ), + .dataf(!\ALU|Mux28~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[2]~234_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[2]~234 .extended_lut = "off"; +defparam \rd[2]~234 .lut_mask = 64'h555500FF33330F0F; +defparam \rd[2]~234 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X42_Y13_N58 +dffeas \RAM|mem[155][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[155][0]~159_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[155][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[155][2] .is_wysiwyg = "true"; +defparam \RAM|mem[155][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X42_Y13_N14 +dffeas \RAM|mem[151][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[151][3]~158_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[151][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[151][2] .is_wysiwyg = "true"; +defparam \RAM|mem[151][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X45_Y15_N14 +dffeas \RAM|mem[147][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[147][1]~157_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[147][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[147][2] .is_wysiwyg = "true"; +defparam \RAM|mem[147][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X45_Y15_N59 +dffeas \RAM|mem[159][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[159][3]~160_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[159][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[159][2] .is_wysiwyg = "true"; +defparam \RAM|mem[159][2] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X45_Y15_N57 +cyclonev_lcell_comb \rd[2]~233 ( +// Equation(s): +// \rd[2]~233_combout = ( \RAM|mem[159][2]~q & ( \ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout & (\RAM|mem[151][2]~q )) # (\ALU|Mux29~3_combout & ((\RAM|mem[147][2]~q ))) ) ) ) # ( !\RAM|mem[159][2]~q & ( \ALU|Mux28~1_combout & ( +// (!\ALU|Mux29~3_combout & (\RAM|mem[151][2]~q )) # (\ALU|Mux29~3_combout & ((\RAM|mem[147][2]~q ))) ) ) ) # ( \RAM|mem[159][2]~q & ( !\ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout ) # (\RAM|mem[155][2]~q ) ) ) ) # ( !\RAM|mem[159][2]~q & ( +// !\ALU|Mux28~1_combout & ( (\RAM|mem[155][2]~q & \ALU|Mux29~3_combout ) ) ) ) + + .dataa(!\RAM|mem[155][2]~q ), + .datab(!\RAM|mem[151][2]~q ), + .datac(!\RAM|mem[147][2]~q ), + .datad(!\ALU|Mux29~3_combout ), + .datae(!\RAM|mem[159][2]~q ), + .dataf(!\ALU|Mux28~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[2]~233_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[2]~233 .extended_lut = "off"; +defparam \rd[2]~233 .lut_mask = 64'h0055FF55330F330F; +defparam \rd[2]~233 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X42_Y9_N37 +dffeas \RAM|mem[139][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[139][3]~143_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[139][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[139][2] .is_wysiwyg = "true"; +defparam \RAM|mem[139][2] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X48_Y5_N12 +cyclonev_lcell_comb \RAM|mem[135][2]~feeder ( +// Equation(s): +// \RAM|mem[135][2]~feeder_combout = ( \RAM|mem~258_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~258_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[135][2]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[135][2]~feeder .extended_lut = "off"; +defparam \RAM|mem[135][2]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[135][2]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X48_Y5_N13 +dffeas \RAM|mem[135][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[135][2]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[135][3]~142_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[135][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[135][2] .is_wysiwyg = "true"; +defparam \RAM|mem[135][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X45_Y13_N4 +dffeas \RAM|mem[131][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[131][0]~141_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[131][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[131][2] .is_wysiwyg = "true"; +defparam \RAM|mem[131][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X45_Y13_N38 +dffeas \RAM|mem[143][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[143][3]~144_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[143][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[143][2] .is_wysiwyg = "true"; +defparam \RAM|mem[143][2] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X45_Y13_N36 +cyclonev_lcell_comb \rd[2]~232 ( +// Equation(s): +// \rd[2]~232_combout = ( \RAM|mem[143][2]~q & ( \ALU|Mux29~3_combout & ( (!\ALU|Mux28~1_combout & (\RAM|mem[139][2]~q )) # (\ALU|Mux28~1_combout & ((\RAM|mem[131][2]~q ))) ) ) ) # ( !\RAM|mem[143][2]~q & ( \ALU|Mux29~3_combout & ( +// (!\ALU|Mux28~1_combout & (\RAM|mem[139][2]~q )) # (\ALU|Mux28~1_combout & ((\RAM|mem[131][2]~q ))) ) ) ) # ( \RAM|mem[143][2]~q & ( !\ALU|Mux29~3_combout & ( (!\ALU|Mux28~1_combout ) # (\RAM|mem[135][2]~q ) ) ) ) # ( !\RAM|mem[143][2]~q & ( +// !\ALU|Mux29~3_combout & ( (\RAM|mem[135][2]~q & \ALU|Mux28~1_combout ) ) ) ) + + .dataa(!\RAM|mem[139][2]~q ), + .datab(!\RAM|mem[135][2]~q ), + .datac(!\ALU|Mux28~1_combout ), + .datad(!\RAM|mem[131][2]~q ), + .datae(!\RAM|mem[143][2]~q ), + .dataf(!\ALU|Mux29~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[2]~232_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[2]~232 .extended_lut = "off"; +defparam \rd[2]~232 .lut_mask = 64'h0303F3F3505F505F; +defparam \rd[2]~232 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X43_Y6_N0 +cyclonev_lcell_comb \RAM|mem[187][2]~feeder ( +// Equation(s): +// \RAM|mem[187][2]~feeder_combout = ( \RAM|mem~258_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~258_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[187][2]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[187][2]~feeder .extended_lut = "off"; +defparam \RAM|mem[187][2]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[187][2]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X43_Y6_N2 +dffeas \RAM|mem[187][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[187][2]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[187][0]~191_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[187][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[187][2] .is_wysiwyg = "true"; +defparam \RAM|mem[187][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X43_Y11_N46 +dffeas \RAM|mem[183][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[183][4]~190_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[183][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[183][2] .is_wysiwyg = "true"; +defparam \RAM|mem[183][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X42_Y5_N31 +dffeas \RAM|mem[179][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[179][4]~189_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[179][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[179][2] .is_wysiwyg = "true"; +defparam \RAM|mem[179][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X43_Y6_N35 +dffeas \RAM|mem[191][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[191][2]~192_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[191][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[191][2] .is_wysiwyg = "true"; +defparam \RAM|mem[191][2] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X43_Y6_N51 +cyclonev_lcell_comb \rd[2]~235 ( +// Equation(s): +// \rd[2]~235_combout = ( \ALU|Mux28~1_combout & ( \ALU|Mux29~3_combout & ( \RAM|mem[179][2]~q ) ) ) # ( !\ALU|Mux28~1_combout & ( \ALU|Mux29~3_combout & ( \RAM|mem[187][2]~q ) ) ) # ( \ALU|Mux28~1_combout & ( !\ALU|Mux29~3_combout & ( +// \RAM|mem[183][2]~q ) ) ) # ( !\ALU|Mux28~1_combout & ( !\ALU|Mux29~3_combout & ( \RAM|mem[191][2]~q ) ) ) + + .dataa(!\RAM|mem[187][2]~q ), + .datab(!\RAM|mem[183][2]~q ), + .datac(!\RAM|mem[179][2]~q ), + .datad(!\RAM|mem[191][2]~q ), + .datae(!\ALU|Mux28~1_combout ), + .dataf(!\ALU|Mux29~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[2]~235_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[2]~235 .extended_lut = "off"; +defparam \rd[2]~235 .lut_mask = 64'h00FF333355550F0F; +defparam \rd[2]~235 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y12_N6 +cyclonev_lcell_comb \rd[2]~236 ( +// Equation(s): +// \rd[2]~236_combout = ( \rd[2]~232_combout & ( \rd[2]~235_combout & ( (!\ALU|Mux27~1_combout & (((!\ALU|Mux26~1_combout ) # (\rd[2]~233_combout )))) # (\ALU|Mux27~1_combout & (((\ALU|Mux26~1_combout )) # (\rd[2]~234_combout ))) ) ) ) # ( +// !\rd[2]~232_combout & ( \rd[2]~235_combout & ( (!\ALU|Mux27~1_combout & (((!\ALU|Mux26~1_combout ) # (\rd[2]~233_combout )))) # (\ALU|Mux27~1_combout & (\rd[2]~234_combout & ((!\ALU|Mux26~1_combout )))) ) ) ) # ( \rd[2]~232_combout & ( +// !\rd[2]~235_combout & ( (!\ALU|Mux27~1_combout & (((\rd[2]~233_combout & \ALU|Mux26~1_combout )))) # (\ALU|Mux27~1_combout & (((\ALU|Mux26~1_combout )) # (\rd[2]~234_combout ))) ) ) ) # ( !\rd[2]~232_combout & ( !\rd[2]~235_combout & ( +// (!\ALU|Mux27~1_combout & (((\rd[2]~233_combout & \ALU|Mux26~1_combout )))) # (\ALU|Mux27~1_combout & (\rd[2]~234_combout & ((!\ALU|Mux26~1_combout )))) ) ) ) + + .dataa(!\ALU|Mux27~1_combout ), + .datab(!\rd[2]~234_combout ), + .datac(!\rd[2]~233_combout ), + .datad(!\ALU|Mux26~1_combout ), + .datae(!\rd[2]~232_combout ), + .dataf(!\rd[2]~235_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[2]~236_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[2]~236 .extended_lut = "off"; +defparam \rd[2]~236 .lut_mask = 64'h110A115FBB0ABB5F; +defparam \rd[2]~236 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X48_Y6_N14 +dffeas \RAM|mem[161][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[161][0]~162_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[161][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[161][2] .is_wysiwyg = "true"; +defparam \RAM|mem[161][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X42_Y5_N17 +dffeas \RAM|mem[129][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[129][0]~133_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[129][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[129][2] .is_wysiwyg = "true"; +defparam \RAM|mem[129][2] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X49_Y6_N6 +cyclonev_lcell_comb \RAM|mem[177][2]~feeder ( +// Equation(s): +// \RAM|mem[177][2]~feeder_combout = ( \RAM|mem~258_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~258_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[177][2]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[177][2]~feeder .extended_lut = "off"; +defparam \RAM|mem[177][2]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[177][2]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X49_Y6_N7 +dffeas \RAM|mem[177][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[177][2]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[177][3]~181_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[177][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[177][2] .is_wysiwyg = "true"; +defparam \RAM|mem[177][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X42_Y12_N20 +dffeas \RAM|mem[145][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[145][3]~149_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[145][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[145][2] .is_wysiwyg = "true"; +defparam \RAM|mem[145][2] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y12_N18 +cyclonev_lcell_comb \rd[2]~222 ( +// Equation(s): +// \rd[2]~222_combout = ( \RAM|mem[145][2]~q & ( \ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout & (\RAM|mem[161][2]~q )) # (\ALU|Mux26~1_combout & ((\RAM|mem[129][2]~q ))) ) ) ) # ( !\RAM|mem[145][2]~q & ( \ALU|Mux27~1_combout & ( +// (!\ALU|Mux26~1_combout & (\RAM|mem[161][2]~q )) # (\ALU|Mux26~1_combout & ((\RAM|mem[129][2]~q ))) ) ) ) # ( \RAM|mem[145][2]~q & ( !\ALU|Mux27~1_combout & ( (\ALU|Mux26~1_combout ) # (\RAM|mem[177][2]~q ) ) ) ) # ( !\RAM|mem[145][2]~q & ( +// !\ALU|Mux27~1_combout & ( (\RAM|mem[177][2]~q & !\ALU|Mux26~1_combout ) ) ) ) + + .dataa(!\RAM|mem[161][2]~q ), + .datab(!\RAM|mem[129][2]~q ), + .datac(!\RAM|mem[177][2]~q ), + .datad(!\ALU|Mux26~1_combout ), + .datae(!\RAM|mem[145][2]~q ), + .dataf(!\ALU|Mux27~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[2]~222_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[2]~222 .extended_lut = "off"; +defparam \rd[2]~222 .lut_mask = 64'h0F000FFF55335533; +defparam \rd[2]~222 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X48_Y14_N55 +dffeas \RAM|mem[141][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[141][4]~136_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[141][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[141][2] .is_wysiwyg = "true"; +defparam \RAM|mem[141][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X48_Y14_N37 +dffeas \RAM|mem[157][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[157][3]~152_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[157][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[157][2] .is_wysiwyg = "true"; +defparam \RAM|mem[157][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X45_Y7_N56 +dffeas \RAM|mem[189][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[189][3]~184_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[189][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[189][2] .is_wysiwyg = "true"; +defparam \RAM|mem[189][2] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X46_Y10_N51 +cyclonev_lcell_comb \RAM|mem[173][2]~feeder ( +// Equation(s): +// \RAM|mem[173][2]~feeder_combout = ( \RAM|mem~258_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~258_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[173][2]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[173][2]~feeder .extended_lut = "off"; +defparam \RAM|mem[173][2]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[173][2]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X46_Y10_N52 +dffeas \RAM|mem[173][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[173][2]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[173][1]~174_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[173][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[173][2] .is_wysiwyg = "true"; +defparam \RAM|mem[173][2] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X47_Y10_N33 +cyclonev_lcell_comb \rd[2]~225 ( +// Equation(s): +// \rd[2]~225_combout = ( \ALU|Mux26~1_combout & ( \ALU|Mux27~1_combout & ( \RAM|mem[141][2]~q ) ) ) # ( !\ALU|Mux26~1_combout & ( \ALU|Mux27~1_combout & ( \RAM|mem[173][2]~q ) ) ) # ( \ALU|Mux26~1_combout & ( !\ALU|Mux27~1_combout & ( +// \RAM|mem[157][2]~q ) ) ) # ( !\ALU|Mux26~1_combout & ( !\ALU|Mux27~1_combout & ( \RAM|mem[189][2]~q ) ) ) + + .dataa(!\RAM|mem[141][2]~q ), + .datab(!\RAM|mem[157][2]~q ), + .datac(!\RAM|mem[189][2]~q ), + .datad(!\RAM|mem[173][2]~q ), + .datae(!\ALU|Mux26~1_combout ), + .dataf(!\ALU|Mux27~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[2]~225_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[2]~225 .extended_lut = "off"; +defparam \rd[2]~225 .lut_mask = 64'h0F0F333300FF5555; +defparam \rd[2]~225 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X49_Y11_N26 +dffeas \RAM|mem[133][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[133][1]~134_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[133][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[133][2] .is_wysiwyg = "true"; +defparam \RAM|mem[133][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X47_Y9_N19 +dffeas \RAM|mem[165][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[165][2]~166_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[165][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[165][2] .is_wysiwyg = "true"; +defparam \RAM|mem[165][2] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X49_Y11_N3 +cyclonev_lcell_comb \RAM|mem[181][2]~feeder ( +// Equation(s): +// \RAM|mem[181][2]~feeder_combout = ( \RAM|mem~258_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~258_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[181][2]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[181][2]~feeder .extended_lut = "off"; +defparam \RAM|mem[181][2]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[181][2]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X49_Y11_N5 +dffeas \RAM|mem[181][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[181][2]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[181][4]~182_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[181][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[181][2] .is_wysiwyg = "true"; +defparam \RAM|mem[181][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X49_Y11_N20 +dffeas \RAM|mem[149][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[149][4]~150_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[149][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[149][2] .is_wysiwyg = "true"; +defparam \RAM|mem[149][2] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X49_Y11_N18 +cyclonev_lcell_comb \rd[2]~223 ( +// Equation(s): +// \rd[2]~223_combout = ( \RAM|mem[149][2]~q & ( \ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout & ((\RAM|mem[165][2]~q ))) # (\ALU|Mux26~1_combout & (\RAM|mem[133][2]~q )) ) ) ) # ( !\RAM|mem[149][2]~q & ( \ALU|Mux27~1_combout & ( +// (!\ALU|Mux26~1_combout & ((\RAM|mem[165][2]~q ))) # (\ALU|Mux26~1_combout & (\RAM|mem[133][2]~q )) ) ) ) # ( \RAM|mem[149][2]~q & ( !\ALU|Mux27~1_combout & ( (\ALU|Mux26~1_combout ) # (\RAM|mem[181][2]~q ) ) ) ) # ( !\RAM|mem[149][2]~q & ( +// !\ALU|Mux27~1_combout & ( (\RAM|mem[181][2]~q & !\ALU|Mux26~1_combout ) ) ) ) + + .dataa(!\RAM|mem[133][2]~q ), + .datab(!\RAM|mem[165][2]~q ), + .datac(!\RAM|mem[181][2]~q ), + .datad(!\ALU|Mux26~1_combout ), + .datae(!\RAM|mem[149][2]~q ), + .dataf(!\ALU|Mux27~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[2]~223_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[2]~223 .extended_lut = "off"; +defparam \rd[2]~223 .lut_mask = 64'h0F000FFF33553355; +defparam \rd[2]~223 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X51_Y12_N38 +dffeas \RAM|mem[137][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[137][1]~135_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[137][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[137][2] .is_wysiwyg = "true"; +defparam \RAM|mem[137][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X51_Y12_N44 +dffeas \RAM|mem[153][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[153][0]~151_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[153][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[153][2] .is_wysiwyg = "true"; +defparam \RAM|mem[153][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X42_Y13_N4 +dffeas \RAM|mem[169][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[169][2]~170_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[169][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[169][2] .is_wysiwyg = "true"; +defparam \RAM|mem[169][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X51_Y12_N14 +dffeas \RAM|mem[185][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[185][4]~183_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[185][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[185][2] .is_wysiwyg = "true"; +defparam \RAM|mem[185][2] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X51_Y12_N12 +cyclonev_lcell_comb \rd[2]~224 ( +// Equation(s): +// \rd[2]~224_combout = ( \RAM|mem[185][2]~q & ( \ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout & ((\RAM|mem[169][2]~q ))) # (\ALU|Mux26~1_combout & (\RAM|mem[137][2]~q )) ) ) ) # ( !\RAM|mem[185][2]~q & ( \ALU|Mux27~1_combout & ( +// (!\ALU|Mux26~1_combout & ((\RAM|mem[169][2]~q ))) # (\ALU|Mux26~1_combout & (\RAM|mem[137][2]~q )) ) ) ) # ( \RAM|mem[185][2]~q & ( !\ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout ) # (\RAM|mem[153][2]~q ) ) ) ) # ( !\RAM|mem[185][2]~q & ( +// !\ALU|Mux27~1_combout & ( (\RAM|mem[153][2]~q & \ALU|Mux26~1_combout ) ) ) ) + + .dataa(!\RAM|mem[137][2]~q ), + .datab(!\RAM|mem[153][2]~q ), + .datac(!\ALU|Mux26~1_combout ), + .datad(!\RAM|mem[169][2]~q ), + .datae(!\RAM|mem[185][2]~q ), + .dataf(!\ALU|Mux27~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[2]~224_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[2]~224 .extended_lut = "off"; +defparam \rd[2]~224 .lut_mask = 64'h0303F3F305F505F5; +defparam \rd[2]~224 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X43_Y12_N9 +cyclonev_lcell_comb \rd[2]~226 ( +// Equation(s): +// \rd[2]~226_combout = ( \rd[2]~223_combout & ( \rd[2]~224_combout & ( (!\ALU|Mux29~3_combout & (((\rd[2]~225_combout )) # (\ALU|Mux28~1_combout ))) # (\ALU|Mux29~3_combout & ((!\ALU|Mux28~1_combout ) # ((\rd[2]~222_combout )))) ) ) ) # ( +// !\rd[2]~223_combout & ( \rd[2]~224_combout & ( (!\ALU|Mux29~3_combout & (!\ALU|Mux28~1_combout & ((\rd[2]~225_combout )))) # (\ALU|Mux29~3_combout & ((!\ALU|Mux28~1_combout ) # ((\rd[2]~222_combout )))) ) ) ) # ( \rd[2]~223_combout & ( +// !\rd[2]~224_combout & ( (!\ALU|Mux29~3_combout & (((\rd[2]~225_combout )) # (\ALU|Mux28~1_combout ))) # (\ALU|Mux29~3_combout & (\ALU|Mux28~1_combout & (\rd[2]~222_combout ))) ) ) ) # ( !\rd[2]~223_combout & ( !\rd[2]~224_combout & ( +// (!\ALU|Mux29~3_combout & (!\ALU|Mux28~1_combout & ((\rd[2]~225_combout )))) # (\ALU|Mux29~3_combout & (\ALU|Mux28~1_combout & (\rd[2]~222_combout ))) ) ) ) + + .dataa(!\ALU|Mux29~3_combout ), + .datab(!\ALU|Mux28~1_combout ), + .datac(!\rd[2]~222_combout ), + .datad(!\rd[2]~225_combout ), + .datae(!\rd[2]~223_combout ), + .dataf(!\rd[2]~224_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[2]~226_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[2]~226 .extended_lut = "off"; +defparam \rd[2]~226 .lut_mask = 64'h018923AB45CD67EF; +defparam \rd[2]~226 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y4_N9 +cyclonev_lcell_comb \RAM|mem[156][2]~feeder ( +// Equation(s): +// \RAM|mem[156][2]~feeder_combout = ( \RAM|mem~258_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~258_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[156][2]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[156][2]~feeder .extended_lut = "off"; +defparam \RAM|mem[156][2]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[156][2]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X42_Y4_N10 +dffeas \RAM|mem[156][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[156][2]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[156][1]~148_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[156][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[156][2] .is_wysiwyg = "true"; +defparam \RAM|mem[156][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X46_Y5_N29 +dffeas \RAM|mem[172][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[172][2]~173_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[172][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[172][2] .is_wysiwyg = "true"; +defparam \RAM|mem[172][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X46_Y5_N46 +dffeas \RAM|mem[140][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[140][4]~132_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[140][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[140][2] .is_wysiwyg = "true"; +defparam \RAM|mem[140][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X42_Y12_N44 +dffeas \RAM|mem[188][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[188][2]~180_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[188][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[188][2] .is_wysiwyg = "true"; +defparam \RAM|mem[188][2] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y12_N42 +cyclonev_lcell_comb \rd[2]~220 ( +// Equation(s): +// \rd[2]~220_combout = ( \RAM|mem[188][2]~q & ( \ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout & (\RAM|mem[172][2]~q )) # (\ALU|Mux26~1_combout & ((\RAM|mem[140][2]~q ))) ) ) ) # ( !\RAM|mem[188][2]~q & ( \ALU|Mux27~1_combout & ( +// (!\ALU|Mux26~1_combout & (\RAM|mem[172][2]~q )) # (\ALU|Mux26~1_combout & ((\RAM|mem[140][2]~q ))) ) ) ) # ( \RAM|mem[188][2]~q & ( !\ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout ) # (\RAM|mem[156][2]~q ) ) ) ) # ( !\RAM|mem[188][2]~q & ( +// !\ALU|Mux27~1_combout & ( (\RAM|mem[156][2]~q & \ALU|Mux26~1_combout ) ) ) ) + + .dataa(!\RAM|mem[156][2]~q ), + .datab(!\RAM|mem[172][2]~q ), + .datac(!\RAM|mem[140][2]~q ), + .datad(!\ALU|Mux26~1_combout ), + .datae(!\RAM|mem[188][2]~q ), + .dataf(!\ALU|Mux27~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[2]~220_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[2]~220 .extended_lut = "off"; +defparam \rd[2]~220 .lut_mask = 64'h0055FF55330F330F; +defparam \rd[2]~220 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X43_Y7_N55 +dffeas \RAM|mem[148][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[148][1]~146_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[148][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[148][2] .is_wysiwyg = "true"; +defparam \RAM|mem[148][2] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X45_Y6_N39 +cyclonev_lcell_comb \RAM|mem[180][2]~feeder ( +// Equation(s): +// \RAM|mem[180][2]~feeder_combout = ( \RAM|mem~258_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~258_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[180][2]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[180][2]~feeder .extended_lut = "off"; +defparam \RAM|mem[180][2]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[180][2]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X45_Y6_N40 +dffeas \RAM|mem[180][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[180][2]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[180][4]~178_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[180][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[180][2] .is_wysiwyg = "true"; +defparam \RAM|mem[180][2] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X47_Y9_N33 +cyclonev_lcell_comb \RAM|mem[164][2]~feeder ( +// Equation(s): +// \RAM|mem[164][2]~feeder_combout = ( \RAM|mem~258_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~258_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[164][2]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[164][2]~feeder .extended_lut = "off"; +defparam \RAM|mem[164][2]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[164][2]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X47_Y9_N35 +dffeas \RAM|mem[164][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[164][2]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[164][4]~165_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[164][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[164][2] .is_wysiwyg = "true"; +defparam \RAM|mem[164][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X42_Y10_N35 +dffeas \RAM|mem[132][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[132][0]~130_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[132][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[132][2] .is_wysiwyg = "true"; +defparam \RAM|mem[132][2] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X43_Y8_N36 +cyclonev_lcell_comb \rd[2]~218 ( +// Equation(s): +// \rd[2]~218_combout = ( \ALU|Mux26~1_combout & ( \RAM|mem[132][2]~q & ( (\ALU|Mux27~1_combout ) # (\RAM|mem[148][2]~q ) ) ) ) # ( !\ALU|Mux26~1_combout & ( \RAM|mem[132][2]~q & ( (!\ALU|Mux27~1_combout & (\RAM|mem[180][2]~q )) # (\ALU|Mux27~1_combout +// & ((\RAM|mem[164][2]~q ))) ) ) ) # ( \ALU|Mux26~1_combout & ( !\RAM|mem[132][2]~q & ( (\RAM|mem[148][2]~q & !\ALU|Mux27~1_combout ) ) ) ) # ( !\ALU|Mux26~1_combout & ( !\RAM|mem[132][2]~q & ( (!\ALU|Mux27~1_combout & (\RAM|mem[180][2]~q )) # +// (\ALU|Mux27~1_combout & ((\RAM|mem[164][2]~q ))) ) ) ) + + .dataa(!\RAM|mem[148][2]~q ), + .datab(!\RAM|mem[180][2]~q ), + .datac(!\ALU|Mux27~1_combout ), + .datad(!\RAM|mem[164][2]~q ), + .datae(!\ALU|Mux26~1_combout ), + .dataf(!\RAM|mem[132][2]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[2]~218_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[2]~218 .extended_lut = "off"; +defparam \rd[2]~218 .lut_mask = 64'h303F5050303F5F5F; +defparam \rd[2]~218 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X53_Y9_N12 +cyclonev_lcell_comb \RAM|mem[136][2]~feeder ( +// Equation(s): +// \RAM|mem[136][2]~feeder_combout = ( \RAM|mem~258_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~258_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[136][2]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[136][2]~feeder .extended_lut = "off"; +defparam \RAM|mem[136][2]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[136][2]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X53_Y9_N13 +dffeas \RAM|mem[136][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[136][2]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[136][1]~131_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[136][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[136][2] .is_wysiwyg = "true"; +defparam \RAM|mem[136][2] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X51_Y11_N33 +cyclonev_lcell_comb \RAM|mem[168][2]~feeder ( +// Equation(s): +// \RAM|mem[168][2]~feeder_combout = ( \RAM|mem~258_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~258_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[168][2]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[168][2]~feeder .extended_lut = "off"; +defparam \RAM|mem[168][2]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[168][2]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X51_Y11_N35 +dffeas \RAM|mem[168][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[168][2]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[168][2]~169_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[168][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[168][2] .is_wysiwyg = "true"; +defparam \RAM|mem[168][2] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X51_Y11_N15 +cyclonev_lcell_comb \RAM|mem[184][2]~feeder ( +// Equation(s): +// \RAM|mem[184][2]~feeder_combout = ( \RAM|mem~258_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~258_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[184][2]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[184][2]~feeder .extended_lut = "off"; +defparam \RAM|mem[184][2]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[184][2]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X51_Y11_N17 +dffeas \RAM|mem[184][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[184][2]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[184][4]~179_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[184][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[184][2] .is_wysiwyg = "true"; +defparam \RAM|mem[184][2] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X51_Y11_N3 +cyclonev_lcell_comb \RAM|mem[152][2]~feeder ( +// Equation(s): +// \RAM|mem[152][2]~feeder_combout = ( \RAM|mem~258_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~258_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[152][2]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[152][2]~feeder .extended_lut = "off"; +defparam \RAM|mem[152][2]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[152][2]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X51_Y11_N4 +dffeas \RAM|mem[152][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[152][2]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[152][3]~147_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[152][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[152][2] .is_wysiwyg = "true"; +defparam \RAM|mem[152][2] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X45_Y12_N39 +cyclonev_lcell_comb \rd[2]~219 ( +// Equation(s): +// \rd[2]~219_combout = ( \ALU|Mux26~1_combout & ( \ALU|Mux27~1_combout & ( \RAM|mem[136][2]~q ) ) ) # ( !\ALU|Mux26~1_combout & ( \ALU|Mux27~1_combout & ( \RAM|mem[168][2]~q ) ) ) # ( \ALU|Mux26~1_combout & ( !\ALU|Mux27~1_combout & ( +// \RAM|mem[152][2]~q ) ) ) # ( !\ALU|Mux26~1_combout & ( !\ALU|Mux27~1_combout & ( \RAM|mem[184][2]~q ) ) ) + + .dataa(!\RAM|mem[136][2]~q ), + .datab(!\RAM|mem[168][2]~q ), + .datac(!\RAM|mem[184][2]~q ), + .datad(!\RAM|mem[152][2]~q ), + .datae(!\ALU|Mux26~1_combout ), + .dataf(!\ALU|Mux27~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[2]~219_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[2]~219 .extended_lut = "off"; +defparam \rd[2]~219 .lut_mask = 64'h0F0F00FF33335555; +defparam \rd[2]~219 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X51_Y8_N13 +dffeas \RAM|mem[176][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[176][1]~177_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[176][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[176][2] .is_wysiwyg = "true"; +defparam \RAM|mem[176][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X45_Y11_N25 +dffeas \RAM|mem[160][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[160][3]~161_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[160][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[160][2] .is_wysiwyg = "true"; +defparam \RAM|mem[160][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X51_Y8_N56 +dffeas \RAM|mem[128][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[128][4]~129_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[128][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[128][2] .is_wysiwyg = "true"; +defparam \RAM|mem[128][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X51_Y8_N38 +dffeas \RAM|mem[144][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[144][3]~145_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[144][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[144][2] .is_wysiwyg = "true"; +defparam \RAM|mem[144][2] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X51_Y8_N36 +cyclonev_lcell_comb \rd[2]~217 ( +// Equation(s): +// \rd[2]~217_combout = ( \RAM|mem[144][2]~q & ( \ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout & (\RAM|mem[160][2]~q )) # (\ALU|Mux26~1_combout & ((\RAM|mem[128][2]~q ))) ) ) ) # ( !\RAM|mem[144][2]~q & ( \ALU|Mux27~1_combout & ( +// (!\ALU|Mux26~1_combout & (\RAM|mem[160][2]~q )) # (\ALU|Mux26~1_combout & ((\RAM|mem[128][2]~q ))) ) ) ) # ( \RAM|mem[144][2]~q & ( !\ALU|Mux27~1_combout & ( (\ALU|Mux26~1_combout ) # (\RAM|mem[176][2]~q ) ) ) ) # ( !\RAM|mem[144][2]~q & ( +// !\ALU|Mux27~1_combout & ( (\RAM|mem[176][2]~q & !\ALU|Mux26~1_combout ) ) ) ) + + .dataa(!\RAM|mem[176][2]~q ), + .datab(!\RAM|mem[160][2]~q ), + .datac(!\RAM|mem[128][2]~q ), + .datad(!\ALU|Mux26~1_combout ), + .datae(!\RAM|mem[144][2]~q ), + .dataf(!\ALU|Mux27~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[2]~217_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[2]~217 .extended_lut = "off"; +defparam \rd[2]~217 .lut_mask = 64'h550055FF330F330F; +defparam \rd[2]~217 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y12_N54 +cyclonev_lcell_comb \rd[2]~221 ( +// Equation(s): +// \rd[2]~221_combout = ( \rd[2]~219_combout & ( \rd[2]~217_combout & ( ((!\ALU|Mux28~1_combout & (\rd[2]~220_combout )) # (\ALU|Mux28~1_combout & ((\rd[2]~218_combout )))) # (\ALU|Mux29~3_combout ) ) ) ) # ( !\rd[2]~219_combout & ( \rd[2]~217_combout +// & ( (!\ALU|Mux29~3_combout & ((!\ALU|Mux28~1_combout & (\rd[2]~220_combout )) # (\ALU|Mux28~1_combout & ((\rd[2]~218_combout ))))) # (\ALU|Mux29~3_combout & (((\ALU|Mux28~1_combout )))) ) ) ) # ( \rd[2]~219_combout & ( !\rd[2]~217_combout & ( +// (!\ALU|Mux29~3_combout & ((!\ALU|Mux28~1_combout & (\rd[2]~220_combout )) # (\ALU|Mux28~1_combout & ((\rd[2]~218_combout ))))) # (\ALU|Mux29~3_combout & (((!\ALU|Mux28~1_combout )))) ) ) ) # ( !\rd[2]~219_combout & ( !\rd[2]~217_combout & ( +// (!\ALU|Mux29~3_combout & ((!\ALU|Mux28~1_combout & (\rd[2]~220_combout )) # (\ALU|Mux28~1_combout & ((\rd[2]~218_combout ))))) ) ) ) + + .dataa(!\ALU|Mux29~3_combout ), + .datab(!\rd[2]~220_combout ), + .datac(!\rd[2]~218_combout ), + .datad(!\ALU|Mux28~1_combout ), + .datae(!\rd[2]~219_combout ), + .dataf(!\rd[2]~217_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[2]~221_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[2]~221 .extended_lut = "off"; +defparam \rd[2]~221 .lut_mask = 64'h220A770A225F775F; +defparam \rd[2]~221 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X43_Y7_N13 +dffeas \RAM|mem[150][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[150][3]~154_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[150][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[150][2] .is_wysiwyg = "true"; +defparam \RAM|mem[150][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X45_Y5_N46 +dffeas \RAM|mem[166][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[166][2]~167_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[166][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[166][2] .is_wysiwyg = "true"; +defparam \RAM|mem[166][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X45_Y5_N37 +dffeas \RAM|mem[134][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[134][4]~138_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[134][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[134][2] .is_wysiwyg = "true"; +defparam \RAM|mem[134][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X42_Y12_N14 +dffeas \RAM|mem[182][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[182][0]~186_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[182][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[182][2] .is_wysiwyg = "true"; +defparam \RAM|mem[182][2] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y12_N12 +cyclonev_lcell_comb \rd[2]~228 ( +// Equation(s): +// \rd[2]~228_combout = ( \RAM|mem[182][2]~q & ( \ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout & (\RAM|mem[166][2]~q )) # (\ALU|Mux26~1_combout & ((\RAM|mem[134][2]~q ))) ) ) ) # ( !\RAM|mem[182][2]~q & ( \ALU|Mux27~1_combout & ( +// (!\ALU|Mux26~1_combout & (\RAM|mem[166][2]~q )) # (\ALU|Mux26~1_combout & ((\RAM|mem[134][2]~q ))) ) ) ) # ( \RAM|mem[182][2]~q & ( !\ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout ) # (\RAM|mem[150][2]~q ) ) ) ) # ( !\RAM|mem[182][2]~q & ( +// !\ALU|Mux27~1_combout & ( (\RAM|mem[150][2]~q & \ALU|Mux26~1_combout ) ) ) ) + + .dataa(!\RAM|mem[150][2]~q ), + .datab(!\RAM|mem[166][2]~q ), + .datac(!\RAM|mem[134][2]~q ), + .datad(!\ALU|Mux26~1_combout ), + .datae(!\RAM|mem[182][2]~q ), + .dataf(!\ALU|Mux27~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[2]~228_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[2]~228 .extended_lut = "off"; +defparam \rd[2]~228 .lut_mask = 64'h0055FF55330F330F; +defparam \rd[2]~228 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X46_Y11_N26 +dffeas \RAM|mem[142][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[142][1]~140_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[142][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[142][2] .is_wysiwyg = "true"; +defparam \RAM|mem[142][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X46_Y6_N40 +dffeas \RAM|mem[158][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[158][4]~156_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[158][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[158][2] .is_wysiwyg = "true"; +defparam \RAM|mem[158][2] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X45_Y8_N51 +cyclonev_lcell_comb \RAM|mem[174][2]~feeder ( +// Equation(s): +// \RAM|mem[174][2]~feeder_combout = ( \RAM|mem~258_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~258_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[174][2]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[174][2]~feeder .extended_lut = "off"; +defparam \RAM|mem[174][2]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[174][2]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X45_Y8_N53 +dffeas \RAM|mem[174][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[174][2]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[174][4]~175_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[174][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[174][2] .is_wysiwyg = "true"; +defparam \RAM|mem[174][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X45_Y7_N2 +dffeas \RAM|mem[190][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[190][2]~188_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[190][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[190][2] .is_wysiwyg = "true"; +defparam \RAM|mem[190][2] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X45_Y7_N0 +cyclonev_lcell_comb \rd[2]~230 ( +// Equation(s): +// \rd[2]~230_combout = ( \RAM|mem[190][2]~q & ( \ALU|Mux26~1_combout & ( (!\ALU|Mux27~1_combout & ((\RAM|mem[158][2]~q ))) # (\ALU|Mux27~1_combout & (\RAM|mem[142][2]~q )) ) ) ) # ( !\RAM|mem[190][2]~q & ( \ALU|Mux26~1_combout & ( +// (!\ALU|Mux27~1_combout & ((\RAM|mem[158][2]~q ))) # (\ALU|Mux27~1_combout & (\RAM|mem[142][2]~q )) ) ) ) # ( \RAM|mem[190][2]~q & ( !\ALU|Mux26~1_combout & ( (!\ALU|Mux27~1_combout ) # (\RAM|mem[174][2]~q ) ) ) ) # ( !\RAM|mem[190][2]~q & ( +// !\ALU|Mux26~1_combout & ( (\ALU|Mux27~1_combout & \RAM|mem[174][2]~q ) ) ) ) + + .dataa(!\RAM|mem[142][2]~q ), + .datab(!\RAM|mem[158][2]~q ), + .datac(!\ALU|Mux27~1_combout ), + .datad(!\RAM|mem[174][2]~q ), + .datae(!\RAM|mem[190][2]~q ), + .dataf(!\ALU|Mux26~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[2]~230_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[2]~230 .extended_lut = "off"; +defparam \rd[2]~230 .lut_mask = 64'h000FF0FF35353535; +defparam \rd[2]~230 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X48_Y6_N42 +cyclonev_lcell_comb \RAM|mem[146][2]~feeder ( +// Equation(s): +// \RAM|mem[146][2]~feeder_combout = ( \RAM|mem~258_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~258_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[146][2]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[146][2]~feeder .extended_lut = "off"; +defparam \RAM|mem[146][2]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[146][2]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X48_Y6_N43 +dffeas \RAM|mem[146][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[146][2]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[146][4]~153_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[146][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[146][2] .is_wysiwyg = "true"; +defparam \RAM|mem[146][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X42_Y5_N49 +dffeas \RAM|mem[130][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[130][1]~137_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[130][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[130][2] .is_wysiwyg = "true"; +defparam \RAM|mem[130][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X45_Y11_N34 +dffeas \RAM|mem[162][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[162][0]~163_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[162][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[162][2] .is_wysiwyg = "true"; +defparam \RAM|mem[162][2] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X45_Y6_N48 +cyclonev_lcell_comb \RAM|mem[178][2]~feeder ( +// Equation(s): +// \RAM|mem[178][2]~feeder_combout = ( \RAM|mem~258_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~258_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[178][2]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[178][2]~feeder .extended_lut = "off"; +defparam \RAM|mem[178][2]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[178][2]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X45_Y6_N49 +dffeas \RAM|mem[178][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[178][2]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[178][3]~185_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[178][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[178][2] .is_wysiwyg = "true"; +defparam \RAM|mem[178][2] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X43_Y6_N54 +cyclonev_lcell_comb \rd[2]~227 ( +// Equation(s): +// \rd[2]~227_combout = ( \ALU|Mux27~1_combout & ( \ALU|Mux26~1_combout & ( \RAM|mem[130][2]~q ) ) ) # ( !\ALU|Mux27~1_combout & ( \ALU|Mux26~1_combout & ( \RAM|mem[146][2]~q ) ) ) # ( \ALU|Mux27~1_combout & ( !\ALU|Mux26~1_combout & ( +// \RAM|mem[162][2]~q ) ) ) # ( !\ALU|Mux27~1_combout & ( !\ALU|Mux26~1_combout & ( \RAM|mem[178][2]~q ) ) ) + + .dataa(!\RAM|mem[146][2]~q ), + .datab(!\RAM|mem[130][2]~q ), + .datac(!\RAM|mem[162][2]~q ), + .datad(!\RAM|mem[178][2]~q ), + .datae(!\ALU|Mux27~1_combout ), + .dataf(!\ALU|Mux26~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[2]~227_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[2]~227 .extended_lut = "off"; +defparam \rd[2]~227 .lut_mask = 64'h00FF0F0F55553333; +defparam \rd[2]~227 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X45_Y4_N50 +dffeas \RAM|mem[170][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[170][4]~171_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[170][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[170][2] .is_wysiwyg = "true"; +defparam \RAM|mem[170][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X45_Y4_N55 +dffeas \RAM|mem[154][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[154][2]~155_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[154][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[154][2] .is_wysiwyg = "true"; +defparam \RAM|mem[154][2] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X53_Y9_N24 +cyclonev_lcell_comb \RAM|mem[138][2]~feeder ( +// Equation(s): +// \RAM|mem[138][2]~feeder_combout = ( \RAM|mem~258_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~258_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[138][2]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[138][2]~feeder .extended_lut = "off"; +defparam \RAM|mem[138][2]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[138][2]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X53_Y9_N25 +dffeas \RAM|mem[138][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[138][2]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[138][3]~139_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[138][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[138][2] .is_wysiwyg = "true"; +defparam \RAM|mem[138][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X45_Y4_N44 +dffeas \RAM|mem[186][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[186][0]~187_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[186][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[186][2] .is_wysiwyg = "true"; +defparam \RAM|mem[186][2] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X45_Y4_N42 +cyclonev_lcell_comb \rd[2]~229 ( +// Equation(s): +// \rd[2]~229_combout = ( \RAM|mem[186][2]~q & ( \ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout & (\RAM|mem[170][2]~q )) # (\ALU|Mux26~1_combout & ((\RAM|mem[138][2]~q ))) ) ) ) # ( !\RAM|mem[186][2]~q & ( \ALU|Mux27~1_combout & ( +// (!\ALU|Mux26~1_combout & (\RAM|mem[170][2]~q )) # (\ALU|Mux26~1_combout & ((\RAM|mem[138][2]~q ))) ) ) ) # ( \RAM|mem[186][2]~q & ( !\ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout ) # (\RAM|mem[154][2]~q ) ) ) ) # ( !\RAM|mem[186][2]~q & ( +// !\ALU|Mux27~1_combout & ( (\RAM|mem[154][2]~q & \ALU|Mux26~1_combout ) ) ) ) + + .dataa(!\RAM|mem[170][2]~q ), + .datab(!\RAM|mem[154][2]~q ), + .datac(!\ALU|Mux26~1_combout ), + .datad(!\RAM|mem[138][2]~q ), + .datae(!\RAM|mem[186][2]~q ), + .dataf(!\ALU|Mux27~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[2]~229_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[2]~229 .extended_lut = "off"; +defparam \rd[2]~229 .lut_mask = 64'h0303F3F3505F505F; +defparam \rd[2]~229 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y12_N30 +cyclonev_lcell_comb \rd[2]~231 ( +// Equation(s): +// \rd[2]~231_combout = ( \rd[2]~227_combout & ( \rd[2]~229_combout & ( ((!\ALU|Mux28~1_combout & ((\rd[2]~230_combout ))) # (\ALU|Mux28~1_combout & (\rd[2]~228_combout ))) # (\ALU|Mux29~3_combout ) ) ) ) # ( !\rd[2]~227_combout & ( \rd[2]~229_combout +// & ( (!\ALU|Mux29~3_combout & ((!\ALU|Mux28~1_combout & ((\rd[2]~230_combout ))) # (\ALU|Mux28~1_combout & (\rd[2]~228_combout )))) # (\ALU|Mux29~3_combout & (((!\ALU|Mux28~1_combout )))) ) ) ) # ( \rd[2]~227_combout & ( !\rd[2]~229_combout & ( +// (!\ALU|Mux29~3_combout & ((!\ALU|Mux28~1_combout & ((\rd[2]~230_combout ))) # (\ALU|Mux28~1_combout & (\rd[2]~228_combout )))) # (\ALU|Mux29~3_combout & (((\ALU|Mux28~1_combout )))) ) ) ) # ( !\rd[2]~227_combout & ( !\rd[2]~229_combout & ( +// (!\ALU|Mux29~3_combout & ((!\ALU|Mux28~1_combout & ((\rd[2]~230_combout ))) # (\ALU|Mux28~1_combout & (\rd[2]~228_combout )))) ) ) ) + + .dataa(!\ALU|Mux29~3_combout ), + .datab(!\rd[2]~228_combout ), + .datac(!\rd[2]~230_combout ), + .datad(!\ALU|Mux28~1_combout ), + .datae(!\rd[2]~227_combout ), + .dataf(!\rd[2]~229_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[2]~231_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[2]~231 .extended_lut = "off"; +defparam \rd[2]~231 .lut_mask = 64'h0A220A775F225F77; +defparam \rd[2]~231 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y12_N0 +cyclonev_lcell_comb \rd[2]~237 ( +// Equation(s): +// \rd[2]~237_combout = ( \rd[2]~221_combout & ( \rd[2]~231_combout & ( ((!\ALU|Mux30~1_combout & (\rd[2]~236_combout )) # (\ALU|Mux30~1_combout & ((\rd[2]~226_combout )))) # (\ALU|Mux31~3_combout ) ) ) ) # ( !\rd[2]~221_combout & ( \rd[2]~231_combout +// & ( (!\ALU|Mux31~3_combout & ((!\ALU|Mux30~1_combout & (\rd[2]~236_combout )) # (\ALU|Mux30~1_combout & ((\rd[2]~226_combout ))))) # (\ALU|Mux31~3_combout & (((!\ALU|Mux30~1_combout )))) ) ) ) # ( \rd[2]~221_combout & ( !\rd[2]~231_combout & ( +// (!\ALU|Mux31~3_combout & ((!\ALU|Mux30~1_combout & (\rd[2]~236_combout )) # (\ALU|Mux30~1_combout & ((\rd[2]~226_combout ))))) # (\ALU|Mux31~3_combout & (((\ALU|Mux30~1_combout )))) ) ) ) # ( !\rd[2]~221_combout & ( !\rd[2]~231_combout & ( +// (!\ALU|Mux31~3_combout & ((!\ALU|Mux30~1_combout & (\rd[2]~236_combout )) # (\ALU|Mux30~1_combout & ((\rd[2]~226_combout ))))) ) ) ) + + .dataa(!\ALU|Mux31~3_combout ), + .datab(!\rd[2]~236_combout ), + .datac(!\rd[2]~226_combout ), + .datad(!\ALU|Mux30~1_combout ), + .datae(!\rd[2]~221_combout ), + .dataf(!\rd[2]~231_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[2]~237_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[2]~237 .extended_lut = "off"; +defparam \rd[2]~237 .lut_mask = 64'h220A225F770A775F; +defparam \rd[2]~237 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X40_Y15_N43 +dffeas \RAM|mem[3][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[3][2]~77_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[3][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[3][2] .is_wysiwyg = "true"; +defparam \RAM|mem[3][2] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X47_Y15_N21 +cyclonev_lcell_comb \RAM|mem[7][2]~feeder ( +// Equation(s): +// \RAM|mem[7][2]~feeder_combout = ( \RAM|mem~258_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~258_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[7][2]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[7][2]~feeder .extended_lut = "off"; +defparam \RAM|mem[7][2]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[7][2]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X47_Y15_N22 +dffeas \RAM|mem[7][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[7][2]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[7][0]~78_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[7][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[7][2] .is_wysiwyg = "true"; +defparam \RAM|mem[7][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X41_Y15_N16 +dffeas \RAM|mem[11][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[11][3]~79_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[11][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[11][2] .is_wysiwyg = "true"; +defparam \RAM|mem[11][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X43_Y14_N56 +dffeas \RAM|mem[15][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[15][4]~80_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[15][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[15][2] .is_wysiwyg = "true"; +defparam \RAM|mem[15][2] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X43_Y14_N54 +cyclonev_lcell_comb \rd[2]~253 ( +// Equation(s): +// \rd[2]~253_combout = ( \RAM|mem[15][2]~q & ( \ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout & ((\RAM|mem[7][2]~q ))) # (\ALU|Mux29~3_combout & (\RAM|mem[3][2]~q )) ) ) ) # ( !\RAM|mem[15][2]~q & ( \ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout & +// ((\RAM|mem[7][2]~q ))) # (\ALU|Mux29~3_combout & (\RAM|mem[3][2]~q )) ) ) ) # ( \RAM|mem[15][2]~q & ( !\ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout ) # (\RAM|mem[11][2]~q ) ) ) ) # ( !\RAM|mem[15][2]~q & ( !\ALU|Mux28~1_combout & ( +// (\ALU|Mux29~3_combout & \RAM|mem[11][2]~q ) ) ) ) + + .dataa(!\RAM|mem[3][2]~q ), + .datab(!\RAM|mem[7][2]~q ), + .datac(!\ALU|Mux29~3_combout ), + .datad(!\RAM|mem[11][2]~q ), + .datae(!\RAM|mem[15][2]~q ), + .dataf(!\ALU|Mux28~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[2]~253_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[2]~253 .extended_lut = "off"; +defparam \rd[2]~253 .lut_mask = 64'h000FF0FF35353535; +defparam \rd[2]~253 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X46_Y13_N51 +cyclonev_lcell_comb \RAM|mem[63][2]~feeder ( +// Equation(s): +// \RAM|mem[63][2]~feeder_combout = ( \RAM|mem~258_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~258_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[63][2]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[63][2]~feeder .extended_lut = "off"; +defparam \RAM|mem[63][2]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[63][2]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X46_Y13_N53 +dffeas \RAM|mem[63][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[63][2]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[63][2]~128_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[63][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[63][2] .is_wysiwyg = "true"; +defparam \RAM|mem[63][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X46_Y9_N41 +dffeas \RAM|mem[55][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[55][2]~126_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[55][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[55][2] .is_wysiwyg = "true"; +defparam \RAM|mem[55][2] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X46_Y9_N51 +cyclonev_lcell_comb \RAM|mem[51][2]~feeder ( +// Equation(s): +// \RAM|mem[51][2]~feeder_combout = ( \RAM|mem~258_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~258_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[51][2]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[51][2]~feeder .extended_lut = "off"; +defparam \RAM|mem[51][2]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[51][2]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X46_Y9_N52 +dffeas \RAM|mem[51][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[51][2]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[51][0]~125_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[51][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[51][2] .is_wysiwyg = "true"; +defparam \RAM|mem[51][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X46_Y9_N14 +dffeas \RAM|mem[59][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[59][2]~127_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[59][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[59][2] .is_wysiwyg = "true"; +defparam \RAM|mem[59][2] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X46_Y9_N12 +cyclonev_lcell_comb \rd[2]~256 ( +// Equation(s): +// \rd[2]~256_combout = ( \RAM|mem[59][2]~q & ( \ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout & (\RAM|mem[55][2]~q )) # (\ALU|Mux29~3_combout & ((\RAM|mem[51][2]~q ))) ) ) ) # ( !\RAM|mem[59][2]~q & ( \ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout +// & (\RAM|mem[55][2]~q )) # (\ALU|Mux29~3_combout & ((\RAM|mem[51][2]~q ))) ) ) ) # ( \RAM|mem[59][2]~q & ( !\ALU|Mux28~1_combout & ( (\ALU|Mux29~3_combout ) # (\RAM|mem[63][2]~q ) ) ) ) # ( !\RAM|mem[59][2]~q & ( !\ALU|Mux28~1_combout & ( +// (\RAM|mem[63][2]~q & !\ALU|Mux29~3_combout ) ) ) ) + + .dataa(!\RAM|mem[63][2]~q ), + .datab(!\RAM|mem[55][2]~q ), + .datac(!\ALU|Mux29~3_combout ), + .datad(!\RAM|mem[51][2]~q ), + .datae(!\RAM|mem[59][2]~q ), + .dataf(!\ALU|Mux28~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[2]~256_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[2]~256 .extended_lut = "off"; +defparam \rd[2]~256 .lut_mask = 64'h50505F5F303F303F; +defparam \rd[2]~256 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X47_Y11_N40 +dffeas \RAM|mem[47][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[47][0]~112_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[47][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[47][2] .is_wysiwyg = "true"; +defparam \RAM|mem[47][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X43_Y10_N40 +dffeas \RAM|mem[39][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[39][4]~104_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[39][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[39][2] .is_wysiwyg = "true"; +defparam \RAM|mem[39][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X41_Y16_N58 +dffeas \RAM|mem[43][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[43][0]~108_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[43][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[43][2] .is_wysiwyg = "true"; +defparam \RAM|mem[43][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X41_Y11_N50 +dffeas \RAM|mem[35][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[35][2]~100_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[35][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[35][2] .is_wysiwyg = "true"; +defparam \RAM|mem[35][2] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X45_Y11_N51 +cyclonev_lcell_comb \rd[2]~255 ( +// Equation(s): +// \rd[2]~255_combout = ( \ALU|Mux28~1_combout & ( \ALU|Mux29~3_combout & ( \RAM|mem[35][2]~q ) ) ) # ( !\ALU|Mux28~1_combout & ( \ALU|Mux29~3_combout & ( \RAM|mem[43][2]~q ) ) ) # ( \ALU|Mux28~1_combout & ( !\ALU|Mux29~3_combout & ( +// \RAM|mem[39][2]~q ) ) ) # ( !\ALU|Mux28~1_combout & ( !\ALU|Mux29~3_combout & ( \RAM|mem[47][2]~q ) ) ) + + .dataa(!\RAM|mem[47][2]~q ), + .datab(!\RAM|mem[39][2]~q ), + .datac(!\RAM|mem[43][2]~q ), + .datad(!\RAM|mem[35][2]~q ), + .datae(!\ALU|Mux28~1_combout ), + .dataf(!\ALU|Mux29~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[2]~255_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[2]~255 .extended_lut = "off"; +defparam \rd[2]~255 .lut_mask = 64'h555533330F0F00FF; +defparam \rd[2]~255 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y16_N12 +cyclonev_lcell_comb \RAM|mem[19][2]~feeder ( +// Equation(s): +// \RAM|mem[19][2]~feeder_combout = ( \RAM|mem~258_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~258_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[19][2]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[19][2]~feeder .extended_lut = "off"; +defparam \RAM|mem[19][2]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[19][2]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X42_Y16_N13 +dffeas \RAM|mem[19][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[19][2]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[19][3]~93_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[19][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[19][2] .is_wysiwyg = "true"; +defparam \RAM|mem[19][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X41_Y13_N4 +dffeas \RAM|mem[27][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[27][1]~95_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[27][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[27][2] .is_wysiwyg = "true"; +defparam \RAM|mem[27][2] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X43_Y14_N24 +cyclonev_lcell_comb \RAM|mem[23][2]~feeder ( +// Equation(s): +// \RAM|mem[23][2]~feeder_combout = ( \RAM|mem~258_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~258_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[23][2]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[23][2]~feeder .extended_lut = "off"; +defparam \RAM|mem[23][2]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[23][2]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X43_Y14_N25 +dffeas \RAM|mem[23][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[23][2]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[23][0]~94_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[23][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[23][2] .is_wysiwyg = "true"; +defparam \RAM|mem[23][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X43_Y14_N32 +dffeas \RAM|mem[31][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[31][2]~96_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[31][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[31][2] .is_wysiwyg = "true"; +defparam \RAM|mem[31][2] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X43_Y14_N30 +cyclonev_lcell_comb \rd[2]~254 ( +// Equation(s): +// \rd[2]~254_combout = ( \RAM|mem[31][2]~q & ( \ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout & ((\RAM|mem[23][2]~q ))) # (\ALU|Mux29~3_combout & (\RAM|mem[19][2]~q )) ) ) ) # ( !\RAM|mem[31][2]~q & ( \ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout +// & ((\RAM|mem[23][2]~q ))) # (\ALU|Mux29~3_combout & (\RAM|mem[19][2]~q )) ) ) ) # ( \RAM|mem[31][2]~q & ( !\ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout ) # (\RAM|mem[27][2]~q ) ) ) ) # ( !\RAM|mem[31][2]~q & ( !\ALU|Mux28~1_combout & ( +// (\RAM|mem[27][2]~q & \ALU|Mux29~3_combout ) ) ) ) + + .dataa(!\RAM|mem[19][2]~q ), + .datab(!\RAM|mem[27][2]~q ), + .datac(!\ALU|Mux29~3_combout ), + .datad(!\RAM|mem[23][2]~q ), + .datae(!\RAM|mem[31][2]~q ), + .dataf(!\ALU|Mux28~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[2]~254_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[2]~254 .extended_lut = "off"; +defparam \rd[2]~254 .lut_mask = 64'h0303F3F305F505F5; +defparam \rd[2]~254 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X45_Y12_N48 +cyclonev_lcell_comb \rd[2]~257 ( +// Equation(s): +// \rd[2]~257_combout = ( \rd[2]~255_combout & ( \rd[2]~254_combout & ( (!\ALU|Mux26~1_combout & (((\ALU|Mux27~1_combout ) # (\rd[2]~256_combout )))) # (\ALU|Mux26~1_combout & (((!\ALU|Mux27~1_combout )) # (\rd[2]~253_combout ))) ) ) ) # ( +// !\rd[2]~255_combout & ( \rd[2]~254_combout & ( (!\ALU|Mux26~1_combout & (((\rd[2]~256_combout & !\ALU|Mux27~1_combout )))) # (\ALU|Mux26~1_combout & (((!\ALU|Mux27~1_combout )) # (\rd[2]~253_combout ))) ) ) ) # ( \rd[2]~255_combout & ( +// !\rd[2]~254_combout & ( (!\ALU|Mux26~1_combout & (((\ALU|Mux27~1_combout ) # (\rd[2]~256_combout )))) # (\ALU|Mux26~1_combout & (\rd[2]~253_combout & ((\ALU|Mux27~1_combout )))) ) ) ) # ( !\rd[2]~255_combout & ( !\rd[2]~254_combout & ( +// (!\ALU|Mux26~1_combout & (((\rd[2]~256_combout & !\ALU|Mux27~1_combout )))) # (\ALU|Mux26~1_combout & (\rd[2]~253_combout & ((\ALU|Mux27~1_combout )))) ) ) ) + + .dataa(!\ALU|Mux26~1_combout ), + .datab(!\rd[2]~253_combout ), + .datac(!\rd[2]~256_combout ), + .datad(!\ALU|Mux27~1_combout ), + .datae(!\rd[2]~255_combout ), + .dataf(!\rd[2]~254_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[2]~257_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[2]~257 .extended_lut = "off"; +defparam \rd[2]~257 .lut_mask = 64'h0A110ABB5F115FBB; +defparam \rd[2]~257 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X46_Y14_N16 +dffeas \RAM|mem[8][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[8][2]~67_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[8][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[8][2] .is_wysiwyg = "true"; +defparam \RAM|mem[8][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X56_Y8_N50 +dffeas \RAM|mem[24][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[24][3]~83_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[24][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[24][2] .is_wysiwyg = "true"; +defparam \RAM|mem[24][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X45_Y12_N56 +dffeas \RAM|mem[56][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[56][4]~115_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[56][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[56][2] .is_wysiwyg = "true"; +defparam \RAM|mem[56][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X45_Y12_N26 +dffeas \RAM|mem[40][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[40][4]~105_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[40][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[40][2] .is_wysiwyg = "true"; +defparam \RAM|mem[40][2] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X45_Y12_N54 +cyclonev_lcell_comb \rd[2]~240 ( +// Equation(s): +// \rd[2]~240_combout = ( \RAM|mem[56][2]~q & ( \RAM|mem[40][2]~q & ( (!\ALU|Mux26~1_combout ) # ((!\ALU|Mux27~1_combout & ((\RAM|mem[24][2]~q ))) # (\ALU|Mux27~1_combout & (\RAM|mem[8][2]~q ))) ) ) ) # ( !\RAM|mem[56][2]~q & ( \RAM|mem[40][2]~q & ( +// (!\ALU|Mux26~1_combout & (((\ALU|Mux27~1_combout )))) # (\ALU|Mux26~1_combout & ((!\ALU|Mux27~1_combout & ((\RAM|mem[24][2]~q ))) # (\ALU|Mux27~1_combout & (\RAM|mem[8][2]~q )))) ) ) ) # ( \RAM|mem[56][2]~q & ( !\RAM|mem[40][2]~q & ( +// (!\ALU|Mux26~1_combout & (((!\ALU|Mux27~1_combout )))) # (\ALU|Mux26~1_combout & ((!\ALU|Mux27~1_combout & ((\RAM|mem[24][2]~q ))) # (\ALU|Mux27~1_combout & (\RAM|mem[8][2]~q )))) ) ) ) # ( !\RAM|mem[56][2]~q & ( !\RAM|mem[40][2]~q & ( +// (\ALU|Mux26~1_combout & ((!\ALU|Mux27~1_combout & ((\RAM|mem[24][2]~q ))) # (\ALU|Mux27~1_combout & (\RAM|mem[8][2]~q )))) ) ) ) + + .dataa(!\RAM|mem[8][2]~q ), + .datab(!\RAM|mem[24][2]~q ), + .datac(!\ALU|Mux26~1_combout ), + .datad(!\ALU|Mux27~1_combout ), + .datae(!\RAM|mem[56][2]~q ), + .dataf(!\RAM|mem[40][2]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[2]~240_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[2]~240 .extended_lut = "off"; +defparam \rd[2]~240 .lut_mask = 64'h0305F30503F5F3F5; +defparam \rd[2]~240 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X47_Y12_N48 +cyclonev_lcell_comb \RAM|mem[52][2]~feeder ( +// Equation(s): +// \RAM|mem[52][2]~feeder_combout = ( \RAM|mem~258_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~258_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[52][2]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[52][2]~feeder .extended_lut = "off"; +defparam \RAM|mem[52][2]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[52][2]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X47_Y12_N50 +dffeas \RAM|mem[52][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[52][2]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[52][0]~114_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[52][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[52][2] .is_wysiwyg = "true"; +defparam \RAM|mem[52][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X47_Y12_N25 +dffeas \RAM|mem[4][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[4][0]~66_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[4][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[4][2] .is_wysiwyg = "true"; +defparam \RAM|mem[4][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X49_Y12_N55 +dffeas \RAM|mem[36][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[36][2]~101_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[36][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[36][2] .is_wysiwyg = "true"; +defparam \RAM|mem[36][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X47_Y12_N20 +dffeas \RAM|mem[20][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[20][4]~82_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[20][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[20][2] .is_wysiwyg = "true"; +defparam \RAM|mem[20][2] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X47_Y12_N18 +cyclonev_lcell_comb \rd[2]~239 ( +// Equation(s): +// \rd[2]~239_combout = ( \RAM|mem[20][2]~q & ( \ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout & ((\RAM|mem[36][2]~q ))) # (\ALU|Mux26~1_combout & (\RAM|mem[4][2]~q )) ) ) ) # ( !\RAM|mem[20][2]~q & ( \ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout +// & ((\RAM|mem[36][2]~q ))) # (\ALU|Mux26~1_combout & (\RAM|mem[4][2]~q )) ) ) ) # ( \RAM|mem[20][2]~q & ( !\ALU|Mux27~1_combout & ( (\ALU|Mux26~1_combout ) # (\RAM|mem[52][2]~q ) ) ) ) # ( !\RAM|mem[20][2]~q & ( !\ALU|Mux27~1_combout & ( +// (\RAM|mem[52][2]~q & !\ALU|Mux26~1_combout ) ) ) ) + + .dataa(!\RAM|mem[52][2]~q ), + .datab(!\RAM|mem[4][2]~q ), + .datac(!\ALU|Mux26~1_combout ), + .datad(!\RAM|mem[36][2]~q ), + .datae(!\RAM|mem[20][2]~q ), + .dataf(!\ALU|Mux27~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[2]~239_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[2]~239 .extended_lut = "off"; +defparam \rd[2]~239 .lut_mask = 64'h50505F5F03F303F3; +defparam \rd[2]~239 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X42_Y11_N31 +dffeas \RAM|mem[0][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[0][3]~65_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[0][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[0][2] .is_wysiwyg = "true"; +defparam \RAM|mem[0][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X42_Y11_N11 +dffeas \RAM|mem[32][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[32][1]~97_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[32][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[32][2] .is_wysiwyg = "true"; +defparam \RAM|mem[32][2] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X50_Y14_N0 +cyclonev_lcell_comb \RAM|mem[48][2]~feeder ( +// Equation(s): +// \RAM|mem[48][2]~feeder_combout = ( \RAM|mem~258_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~258_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[48][2]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[48][2]~feeder .extended_lut = "off"; +defparam \RAM|mem[48][2]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[48][2]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X50_Y14_N1 +dffeas \RAM|mem[48][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[48][2]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[48][2]~113_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[48][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[48][2] .is_wysiwyg = "true"; +defparam \RAM|mem[48][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X42_Y11_N14 +dffeas \RAM|mem[16][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[16][4]~81_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[16][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[16][2] .is_wysiwyg = "true"; +defparam \RAM|mem[16][2] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y11_N12 +cyclonev_lcell_comb \rd[2]~238 ( +// Equation(s): +// \rd[2]~238_combout = ( \RAM|mem[16][2]~q & ( \ALU|Mux26~1_combout & ( (!\ALU|Mux27~1_combout ) # (\RAM|mem[0][2]~q ) ) ) ) # ( !\RAM|mem[16][2]~q & ( \ALU|Mux26~1_combout & ( (\RAM|mem[0][2]~q & \ALU|Mux27~1_combout ) ) ) ) # ( \RAM|mem[16][2]~q & +// ( !\ALU|Mux26~1_combout & ( (!\ALU|Mux27~1_combout & ((\RAM|mem[48][2]~q ))) # (\ALU|Mux27~1_combout & (\RAM|mem[32][2]~q )) ) ) ) # ( !\RAM|mem[16][2]~q & ( !\ALU|Mux26~1_combout & ( (!\ALU|Mux27~1_combout & ((\RAM|mem[48][2]~q ))) # +// (\ALU|Mux27~1_combout & (\RAM|mem[32][2]~q )) ) ) ) + + .dataa(!\RAM|mem[0][2]~q ), + .datab(!\RAM|mem[32][2]~q ), + .datac(!\RAM|mem[48][2]~q ), + .datad(!\ALU|Mux27~1_combout ), + .datae(!\RAM|mem[16][2]~q ), + .dataf(!\ALU|Mux26~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[2]~238_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[2]~238 .extended_lut = "off"; +defparam \rd[2]~238 .lut_mask = 64'h0F330F330055FF55; +defparam \rd[2]~238 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X46_Y15_N20 +dffeas \RAM|mem[28][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[28][0]~84_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[28][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[28][2] .is_wysiwyg = "true"; +defparam \RAM|mem[28][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X47_Y11_N31 +dffeas \RAM|mem[44][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[44][1]~109_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[44][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[44][2] .is_wysiwyg = "true"; +defparam \RAM|mem[44][2] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X53_Y6_N42 +cyclonev_lcell_comb \RAM|mem[12][2]~feeder ( +// Equation(s): +// \RAM|mem[12][2]~feeder_combout = ( \RAM|mem~258_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~258_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[12][2]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[12][2]~feeder .extended_lut = "off"; +defparam \RAM|mem[12][2]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[12][2]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X53_Y6_N43 +dffeas \RAM|mem[12][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[12][2]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[12][3]~68_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[12][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[12][2] .is_wysiwyg = "true"; +defparam \RAM|mem[12][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X46_Y15_N50 +dffeas \RAM|mem[60][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[60][4]~116_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[60][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[60][2] .is_wysiwyg = "true"; +defparam \RAM|mem[60][2] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X46_Y15_N48 +cyclonev_lcell_comb \rd[2]~241 ( +// Equation(s): +// \rd[2]~241_combout = ( \RAM|mem[60][2]~q & ( \ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout & (\RAM|mem[44][2]~q )) # (\ALU|Mux26~1_combout & ((\RAM|mem[12][2]~q ))) ) ) ) # ( !\RAM|mem[60][2]~q & ( \ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout +// & (\RAM|mem[44][2]~q )) # (\ALU|Mux26~1_combout & ((\RAM|mem[12][2]~q ))) ) ) ) # ( \RAM|mem[60][2]~q & ( !\ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout ) # (\RAM|mem[28][2]~q ) ) ) ) # ( !\RAM|mem[60][2]~q & ( !\ALU|Mux27~1_combout & ( +// (\RAM|mem[28][2]~q & \ALU|Mux26~1_combout ) ) ) ) + + .dataa(!\RAM|mem[28][2]~q ), + .datab(!\RAM|mem[44][2]~q ), + .datac(!\RAM|mem[12][2]~q ), + .datad(!\ALU|Mux26~1_combout ), + .datae(!\RAM|mem[60][2]~q ), + .dataf(!\ALU|Mux27~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[2]~241_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[2]~241 .extended_lut = "off"; +defparam \rd[2]~241 .lut_mask = 64'h0055FF55330F330F; +defparam \rd[2]~241 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X45_Y12_N3 +cyclonev_lcell_comb \rd[2]~242 ( +// Equation(s): +// \rd[2]~242_combout = ( \rd[2]~238_combout & ( \rd[2]~241_combout & ( (!\ALU|Mux28~1_combout & (((!\ALU|Mux29~3_combout )) # (\rd[2]~240_combout ))) # (\ALU|Mux28~1_combout & (((\ALU|Mux29~3_combout ) # (\rd[2]~239_combout )))) ) ) ) # ( +// !\rd[2]~238_combout & ( \rd[2]~241_combout & ( (!\ALU|Mux28~1_combout & (((!\ALU|Mux29~3_combout )) # (\rd[2]~240_combout ))) # (\ALU|Mux28~1_combout & (((\rd[2]~239_combout & !\ALU|Mux29~3_combout )))) ) ) ) # ( \rd[2]~238_combout & ( +// !\rd[2]~241_combout & ( (!\ALU|Mux28~1_combout & (\rd[2]~240_combout & ((\ALU|Mux29~3_combout )))) # (\ALU|Mux28~1_combout & (((\ALU|Mux29~3_combout ) # (\rd[2]~239_combout )))) ) ) ) # ( !\rd[2]~238_combout & ( !\rd[2]~241_combout & ( +// (!\ALU|Mux28~1_combout & (\rd[2]~240_combout & ((\ALU|Mux29~3_combout )))) # (\ALU|Mux28~1_combout & (((\rd[2]~239_combout & !\ALU|Mux29~3_combout )))) ) ) ) + + .dataa(!\ALU|Mux28~1_combout ), + .datab(!\rd[2]~240_combout ), + .datac(!\rd[2]~239_combout ), + .datad(!\ALU|Mux29~3_combout ), + .datae(!\rd[2]~238_combout ), + .dataf(!\rd[2]~241_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[2]~242_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[2]~242 .extended_lut = "off"; +defparam \rd[2]~242 .lut_mask = 64'h05220577AF22AF77; +defparam \rd[2]~242 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X45_Y16_N55 +dffeas \RAM|mem[18][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[18][0]~89_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[18][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[18][2] .is_wysiwyg = "true"; +defparam \RAM|mem[18][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X41_Y11_N20 +dffeas \RAM|mem[34][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[34][3]~99_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[34][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[34][2] .is_wysiwyg = "true"; +defparam \RAM|mem[34][2] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X51_Y14_N39 +cyclonev_lcell_comb \RAM|mem[2][2]~feeder ( +// Equation(s): +// \RAM|mem[2][2]~feeder_combout = ( \RAM|mem~258_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~258_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[2][2]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[2][2]~feeder .extended_lut = "off"; +defparam \RAM|mem[2][2]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[2][2]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X51_Y14_N40 +dffeas \RAM|mem[2][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[2][2]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[2][0]~73_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[2][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[2][2] .is_wysiwyg = "true"; +defparam \RAM|mem[2][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X46_Y12_N26 +dffeas \RAM|mem[50][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[50][2]~121_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[50][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[50][2] .is_wysiwyg = "true"; +defparam \RAM|mem[50][2] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X46_Y12_N24 +cyclonev_lcell_comb \rd[2]~248 ( +// Equation(s): +// \rd[2]~248_combout = ( \RAM|mem[50][2]~q & ( \ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout & (\RAM|mem[34][2]~q )) # (\ALU|Mux26~1_combout & ((\RAM|mem[2][2]~q ))) ) ) ) # ( !\RAM|mem[50][2]~q & ( \ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout +// & (\RAM|mem[34][2]~q )) # (\ALU|Mux26~1_combout & ((\RAM|mem[2][2]~q ))) ) ) ) # ( \RAM|mem[50][2]~q & ( !\ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout ) # (\RAM|mem[18][2]~q ) ) ) ) # ( !\RAM|mem[50][2]~q & ( !\ALU|Mux27~1_combout & ( +// (\RAM|mem[18][2]~q & \ALU|Mux26~1_combout ) ) ) ) + + .dataa(!\RAM|mem[18][2]~q ), + .datab(!\RAM|mem[34][2]~q ), + .datac(!\RAM|mem[2][2]~q ), + .datad(!\ALU|Mux26~1_combout ), + .datae(!\RAM|mem[50][2]~q ), + .dataf(!\ALU|Mux27~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[2]~248_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[2]~248 .extended_lut = "off"; +defparam \rd[2]~248 .lut_mask = 64'h0055FF55330F330F; +defparam \rd[2]~248 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X53_Y11_N12 +cyclonev_lcell_comb \RAM|mem[14][2]~feeder ( +// Equation(s): +// \RAM|mem[14][2]~feeder_combout = ( \RAM|mem~258_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~258_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[14][2]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[14][2]~feeder .extended_lut = "off"; +defparam \RAM|mem[14][2]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[14][2]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X53_Y11_N14 +dffeas \RAM|mem[14][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[14][2]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[14][1]~76_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[14][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[14][2] .is_wysiwyg = "true"; +defparam \RAM|mem[14][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X47_Y14_N10 +dffeas \RAM|mem[30][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[30][3]~92_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[30][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[30][2] .is_wysiwyg = "true"; +defparam \RAM|mem[30][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X47_Y11_N13 +dffeas \RAM|mem[46][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[46][2]~111_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[46][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[46][2] .is_wysiwyg = "true"; +defparam \RAM|mem[46][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X46_Y12_N32 +dffeas \RAM|mem[62][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[62][2]~124_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[62][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[62][2] .is_wysiwyg = "true"; +defparam \RAM|mem[62][2] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X46_Y12_N30 +cyclonev_lcell_comb \rd[2]~251 ( +// Equation(s): +// \rd[2]~251_combout = ( \RAM|mem[62][2]~q & ( \ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout & ((\RAM|mem[46][2]~q ))) # (\ALU|Mux26~1_combout & (\RAM|mem[14][2]~q )) ) ) ) # ( !\RAM|mem[62][2]~q & ( \ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout +// & ((\RAM|mem[46][2]~q ))) # (\ALU|Mux26~1_combout & (\RAM|mem[14][2]~q )) ) ) ) # ( \RAM|mem[62][2]~q & ( !\ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout ) # (\RAM|mem[30][2]~q ) ) ) ) # ( !\RAM|mem[62][2]~q & ( !\ALU|Mux27~1_combout & ( +// (\RAM|mem[30][2]~q & \ALU|Mux26~1_combout ) ) ) ) + + .dataa(!\RAM|mem[14][2]~q ), + .datab(!\RAM|mem[30][2]~q ), + .datac(!\RAM|mem[46][2]~q ), + .datad(!\ALU|Mux26~1_combout ), + .datae(!\RAM|mem[62][2]~q ), + .dataf(!\ALU|Mux27~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[2]~251_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[2]~251 .extended_lut = "off"; +defparam \rd[2]~251 .lut_mask = 64'h0033FF330F550F55; +defparam \rd[2]~251 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X50_Y12_N33 +cyclonev_lcell_comb \RAM|mem[22][2]~feeder ( +// Equation(s): +// \RAM|mem[22][2]~feeder_combout = ( \RAM|mem~258_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~258_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[22][2]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[22][2]~feeder .extended_lut = "off"; +defparam \RAM|mem[22][2]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[22][2]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X50_Y12_N35 +dffeas \RAM|mem[22][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[22][2]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[22][2]~90_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[22][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[22][2] .is_wysiwyg = "true"; +defparam \RAM|mem[22][2] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X50_Y14_N51 +cyclonev_lcell_comb \RAM|mem[38][2]~feeder ( +// Equation(s): +// \RAM|mem[38][2]~feeder_combout = ( \RAM|mem~258_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~258_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[38][2]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[38][2]~feeder .extended_lut = "off"; +defparam \RAM|mem[38][2]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[38][2]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X50_Y14_N52 +dffeas \RAM|mem[38][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[38][2]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[38][0]~103_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[38][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[38][2] .is_wysiwyg = "true"; +defparam \RAM|mem[38][2] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X50_Y12_N51 +cyclonev_lcell_comb \RAM|mem[6][2]~feeder ( +// Equation(s): +// \RAM|mem[6][2]~feeder_combout = ( \RAM|mem~258_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~258_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[6][2]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[6][2]~feeder .extended_lut = "off"; +defparam \RAM|mem[6][2]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[6][2]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X50_Y12_N53 +dffeas \RAM|mem[6][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[6][2]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[6][2]~74_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[6][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[6][2] .is_wysiwyg = "true"; +defparam \RAM|mem[6][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X50_Y12_N8 +dffeas \RAM|mem[54][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[54][1]~122_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[54][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[54][2] .is_wysiwyg = "true"; +defparam \RAM|mem[54][2] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X50_Y12_N6 +cyclonev_lcell_comb \rd[2]~249 ( +// Equation(s): +// \rd[2]~249_combout = ( \RAM|mem[54][2]~q & ( \ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout & (\RAM|mem[38][2]~q )) # (\ALU|Mux26~1_combout & ((\RAM|mem[6][2]~q ))) ) ) ) # ( !\RAM|mem[54][2]~q & ( \ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout +// & (\RAM|mem[38][2]~q )) # (\ALU|Mux26~1_combout & ((\RAM|mem[6][2]~q ))) ) ) ) # ( \RAM|mem[54][2]~q & ( !\ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout ) # (\RAM|mem[22][2]~q ) ) ) ) # ( !\RAM|mem[54][2]~q & ( !\ALU|Mux27~1_combout & ( +// (\RAM|mem[22][2]~q & \ALU|Mux26~1_combout ) ) ) ) + + .dataa(!\RAM|mem[22][2]~q ), + .datab(!\RAM|mem[38][2]~q ), + .datac(!\RAM|mem[6][2]~q ), + .datad(!\ALU|Mux26~1_combout ), + .datae(!\RAM|mem[54][2]~q ), + .dataf(!\ALU|Mux27~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[2]~249_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[2]~249 .extended_lut = "off"; +defparam \rd[2]~249 .lut_mask = 64'h0055FF55330F330F; +defparam \rd[2]~249 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X47_Y15_N15 +cyclonev_lcell_comb \RAM|mem[26][2]~feeder ( +// Equation(s): +// \RAM|mem[26][2]~feeder_combout = ( \RAM|mem~258_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~258_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[26][2]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[26][2]~feeder .extended_lut = "off"; +defparam \RAM|mem[26][2]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[26][2]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X47_Y15_N17 +dffeas \RAM|mem[26][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[26][2]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[26][4]~91_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[26][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[26][2] .is_wysiwyg = "true"; +defparam \RAM|mem[26][2] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X53_Y11_N18 +cyclonev_lcell_comb \RAM|mem[10][2]~feeder ( +// Equation(s): +// \RAM|mem[10][2]~feeder_combout = ( \RAM|mem~258_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~258_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[10][2]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[10][2]~feeder .extended_lut = "off"; +defparam \RAM|mem[10][2]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[10][2]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X53_Y11_N19 +dffeas \RAM|mem[10][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[10][2]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[10][4]~75_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[10][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[10][2] .is_wysiwyg = "true"; +defparam \RAM|mem[10][2] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X41_Y16_N24 +cyclonev_lcell_comb \RAM|mem[42][2]~feeder ( +// Equation(s): +// \RAM|mem[42][2]~feeder_combout = ( \RAM|mem~258_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~258_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[42][2]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[42][2]~feeder .extended_lut = "off"; +defparam \RAM|mem[42][2]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[42][2]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X41_Y16_N25 +dffeas \RAM|mem[42][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[42][2]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[42][4]~107_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[42][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[42][2] .is_wysiwyg = "true"; +defparam \RAM|mem[42][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X46_Y12_N8 +dffeas \RAM|mem[58][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[58][2]~123_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[58][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[58][2] .is_wysiwyg = "true"; +defparam \RAM|mem[58][2] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X46_Y12_N6 +cyclonev_lcell_comb \rd[2]~250 ( +// Equation(s): +// \rd[2]~250_combout = ( \RAM|mem[58][2]~q & ( \ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout & ((\RAM|mem[42][2]~q ))) # (\ALU|Mux26~1_combout & (\RAM|mem[10][2]~q )) ) ) ) # ( !\RAM|mem[58][2]~q & ( \ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout +// & ((\RAM|mem[42][2]~q ))) # (\ALU|Mux26~1_combout & (\RAM|mem[10][2]~q )) ) ) ) # ( \RAM|mem[58][2]~q & ( !\ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout ) # (\RAM|mem[26][2]~q ) ) ) ) # ( !\RAM|mem[58][2]~q & ( !\ALU|Mux27~1_combout & ( +// (\RAM|mem[26][2]~q & \ALU|Mux26~1_combout ) ) ) ) + + .dataa(!\RAM|mem[26][2]~q ), + .datab(!\RAM|mem[10][2]~q ), + .datac(!\RAM|mem[42][2]~q ), + .datad(!\ALU|Mux26~1_combout ), + .datae(!\RAM|mem[58][2]~q ), + .dataf(!\ALU|Mux27~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[2]~250_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[2]~250 .extended_lut = "off"; +defparam \rd[2]~250 .lut_mask = 64'h0055FF550F330F33; +defparam \rd[2]~250 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X46_Y12_N18 +cyclonev_lcell_comb \rd[2]~252 ( +// Equation(s): +// \rd[2]~252_combout = ( \rd[2]~249_combout & ( \rd[2]~250_combout & ( (!\ALU|Mux28~1_combout & (((\rd[2]~251_combout ) # (\ALU|Mux29~3_combout )))) # (\ALU|Mux28~1_combout & (((!\ALU|Mux29~3_combout )) # (\rd[2]~248_combout ))) ) ) ) # ( +// !\rd[2]~249_combout & ( \rd[2]~250_combout & ( (!\ALU|Mux28~1_combout & (((\rd[2]~251_combout ) # (\ALU|Mux29~3_combout )))) # (\ALU|Mux28~1_combout & (\rd[2]~248_combout & (\ALU|Mux29~3_combout ))) ) ) ) # ( \rd[2]~249_combout & ( +// !\rd[2]~250_combout & ( (!\ALU|Mux28~1_combout & (((!\ALU|Mux29~3_combout & \rd[2]~251_combout )))) # (\ALU|Mux28~1_combout & (((!\ALU|Mux29~3_combout )) # (\rd[2]~248_combout ))) ) ) ) # ( !\rd[2]~249_combout & ( !\rd[2]~250_combout & ( +// (!\ALU|Mux28~1_combout & (((!\ALU|Mux29~3_combout & \rd[2]~251_combout )))) # (\ALU|Mux28~1_combout & (\rd[2]~248_combout & (\ALU|Mux29~3_combout ))) ) ) ) + + .dataa(!\rd[2]~248_combout ), + .datab(!\ALU|Mux28~1_combout ), + .datac(!\ALU|Mux29~3_combout ), + .datad(!\rd[2]~251_combout ), + .datae(!\rd[2]~249_combout ), + .dataf(!\rd[2]~250_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[2]~252_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[2]~252 .extended_lut = "off"; +defparam \rd[2]~252 .lut_mask = 64'h01C131F10DCD3DFD; +defparam \rd[2]~252 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X46_Y14_N9 +cyclonev_lcell_comb \RAM|mem[13][2]~feeder ( +// Equation(s): +// \RAM|mem[13][2]~feeder_combout = ( \RAM|mem~258_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~258_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[13][2]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[13][2]~feeder .extended_lut = "off"; +defparam \RAM|mem[13][2]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[13][2]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X46_Y14_N11 +dffeas \RAM|mem[13][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[13][2]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[13][1]~72_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[13][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[13][2] .is_wysiwyg = "true"; +defparam \RAM|mem[13][2] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X46_Y14_N42 +cyclonev_lcell_comb \RAM|mem[45][2]~feeder ( +// Equation(s): +// \RAM|mem[45][2]~feeder_combout = ( \RAM|mem~258_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~258_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[45][2]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[45][2]~feeder .extended_lut = "off"; +defparam \RAM|mem[45][2]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[45][2]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X46_Y14_N43 +dffeas \RAM|mem[45][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[45][2]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[45][4]~110_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[45][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[45][2] .is_wysiwyg = "true"; +defparam \RAM|mem[45][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X45_Y16_N4 +dffeas \RAM|mem[29][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[29][2]~88_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[29][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[29][2] .is_wysiwyg = "true"; +defparam \RAM|mem[29][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X45_Y14_N2 +dffeas \RAM|mem[61][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[61][0]~120_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[61][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[61][2] .is_wysiwyg = "true"; +defparam \RAM|mem[61][2] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X45_Y14_N0 +cyclonev_lcell_comb \rd[2]~246 ( +// Equation(s): +// \rd[2]~246_combout = ( \RAM|mem[61][2]~q & ( \ALU|Mux26~1_combout & ( (!\ALU|Mux27~1_combout & ((\RAM|mem[29][2]~q ))) # (\ALU|Mux27~1_combout & (\RAM|mem[13][2]~q )) ) ) ) # ( !\RAM|mem[61][2]~q & ( \ALU|Mux26~1_combout & ( (!\ALU|Mux27~1_combout +// & ((\RAM|mem[29][2]~q ))) # (\ALU|Mux27~1_combout & (\RAM|mem[13][2]~q )) ) ) ) # ( \RAM|mem[61][2]~q & ( !\ALU|Mux26~1_combout & ( (!\ALU|Mux27~1_combout ) # (\RAM|mem[45][2]~q ) ) ) ) # ( !\RAM|mem[61][2]~q & ( !\ALU|Mux26~1_combout & ( +// (\RAM|mem[45][2]~q & \ALU|Mux27~1_combout ) ) ) ) + + .dataa(!\RAM|mem[13][2]~q ), + .datab(!\RAM|mem[45][2]~q ), + .datac(!\RAM|mem[29][2]~q ), + .datad(!\ALU|Mux27~1_combout ), + .datae(!\RAM|mem[61][2]~q ), + .dataf(!\ALU|Mux26~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[2]~246_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[2]~246 .extended_lut = "off"; +defparam \rd[2]~246 .lut_mask = 64'h0033FF330F550F55; +defparam \rd[2]~246 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X49_Y14_N43 +dffeas \RAM|mem[37][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[37][0]~102_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[37][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[37][2] .is_wysiwyg = "true"; +defparam \RAM|mem[37][2] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y15_N48 +cyclonev_lcell_comb \RAM|mem[5][2]~feeder ( +// Equation(s): +// \RAM|mem[5][2]~feeder_combout = ( \RAM|mem~258_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~258_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[5][2]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[5][2]~feeder .extended_lut = "off"; +defparam \RAM|mem[5][2]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[5][2]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X42_Y15_N49 +dffeas \RAM|mem[5][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[5][2]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[5][0]~70_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[5][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[5][2] .is_wysiwyg = "true"; +defparam \RAM|mem[5][2] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X46_Y13_N30 +cyclonev_lcell_comb \RAM|mem[53][2]~feeder ( +// Equation(s): +// \RAM|mem[53][2]~feeder_combout = ( \RAM|mem~258_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~258_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[53][2]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[53][2]~feeder .extended_lut = "off"; +defparam \RAM|mem[53][2]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[53][2]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X46_Y13_N31 +dffeas \RAM|mem[53][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[53][2]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[53][2]~118_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[53][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[53][2] .is_wysiwyg = "true"; +defparam \RAM|mem[53][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X45_Y14_N44 +dffeas \RAM|mem[21][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[21][3]~86_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[21][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[21][2] .is_wysiwyg = "true"; +defparam \RAM|mem[21][2] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X45_Y14_N42 +cyclonev_lcell_comb \rd[2]~244 ( +// Equation(s): +// \rd[2]~244_combout = ( \RAM|mem[21][2]~q & ( \ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout & (\RAM|mem[37][2]~q )) # (\ALU|Mux26~1_combout & ((\RAM|mem[5][2]~q ))) ) ) ) # ( !\RAM|mem[21][2]~q & ( \ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout +// & (\RAM|mem[37][2]~q )) # (\ALU|Mux26~1_combout & ((\RAM|mem[5][2]~q ))) ) ) ) # ( \RAM|mem[21][2]~q & ( !\ALU|Mux27~1_combout & ( (\RAM|mem[53][2]~q ) # (\ALU|Mux26~1_combout ) ) ) ) # ( !\RAM|mem[21][2]~q & ( !\ALU|Mux27~1_combout & ( +// (!\ALU|Mux26~1_combout & \RAM|mem[53][2]~q ) ) ) ) + + .dataa(!\RAM|mem[37][2]~q ), + .datab(!\RAM|mem[5][2]~q ), + .datac(!\ALU|Mux26~1_combout ), + .datad(!\RAM|mem[53][2]~q ), + .datae(!\RAM|mem[21][2]~q ), + .dataf(!\ALU|Mux27~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[2]~244_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[2]~244 .extended_lut = "off"; +defparam \rd[2]~244 .lut_mask = 64'h00F00FFF53535353; +defparam \rd[2]~244 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X43_Y15_N19 +dffeas \RAM|mem[49][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[49][0]~117_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[49][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[49][2] .is_wysiwyg = "true"; +defparam \RAM|mem[49][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X43_Y15_N4 +dffeas \RAM|mem[33][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[33][3]~98_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[33][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[33][2] .is_wysiwyg = "true"; +defparam \RAM|mem[33][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X40_Y15_N10 +dffeas \RAM|mem[1][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[1][0]~69_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[1][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[1][2] .is_wysiwyg = "true"; +defparam \RAM|mem[1][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X45_Y14_N38 +dffeas \RAM|mem[17][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[17][0]~85_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[17][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[17][2] .is_wysiwyg = "true"; +defparam \RAM|mem[17][2] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X45_Y14_N36 +cyclonev_lcell_comb \rd[2]~243 ( +// Equation(s): +// \rd[2]~243_combout = ( \RAM|mem[17][2]~q & ( \ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout & (\RAM|mem[33][2]~q )) # (\ALU|Mux26~1_combout & ((\RAM|mem[1][2]~q ))) ) ) ) # ( !\RAM|mem[17][2]~q & ( \ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout +// & (\RAM|mem[33][2]~q )) # (\ALU|Mux26~1_combout & ((\RAM|mem[1][2]~q ))) ) ) ) # ( \RAM|mem[17][2]~q & ( !\ALU|Mux27~1_combout & ( (\ALU|Mux26~1_combout ) # (\RAM|mem[49][2]~q ) ) ) ) # ( !\RAM|mem[17][2]~q & ( !\ALU|Mux27~1_combout & ( +// (\RAM|mem[49][2]~q & !\ALU|Mux26~1_combout ) ) ) ) + + .dataa(!\RAM|mem[49][2]~q ), + .datab(!\RAM|mem[33][2]~q ), + .datac(!\ALU|Mux26~1_combout ), + .datad(!\RAM|mem[1][2]~q ), + .datae(!\RAM|mem[17][2]~q ), + .dataf(!\ALU|Mux27~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[2]~243_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[2]~243 .extended_lut = "off"; +defparam \rd[2]~243 .lut_mask = 64'h50505F5F303F303F; +defparam \rd[2]~243 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X41_Y16_N37 +dffeas \RAM|mem[41][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[41][1]~106_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[41][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[41][2] .is_wysiwyg = "true"; +defparam \RAM|mem[41][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X43_Y16_N32 +dffeas \RAM|mem[25][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[25][2]~87_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[25][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[25][2] .is_wysiwyg = "true"; +defparam \RAM|mem[25][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X43_Y16_N37 +dffeas \RAM|mem[9][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[9][2]~71_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[9][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[9][2] .is_wysiwyg = "true"; +defparam \RAM|mem[9][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X43_Y16_N2 +dffeas \RAM|mem[57][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[57][2]~119_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[57][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[57][2] .is_wysiwyg = "true"; +defparam \RAM|mem[57][2] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X43_Y16_N0 +cyclonev_lcell_comb \rd[2]~245 ( +// Equation(s): +// \rd[2]~245_combout = ( \RAM|mem[57][2]~q & ( \ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout & (\RAM|mem[41][2]~q )) # (\ALU|Mux26~1_combout & ((\RAM|mem[9][2]~q ))) ) ) ) # ( !\RAM|mem[57][2]~q & ( \ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout +// & (\RAM|mem[41][2]~q )) # (\ALU|Mux26~1_combout & ((\RAM|mem[9][2]~q ))) ) ) ) # ( \RAM|mem[57][2]~q & ( !\ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout ) # (\RAM|mem[25][2]~q ) ) ) ) # ( !\RAM|mem[57][2]~q & ( !\ALU|Mux27~1_combout & ( +// (\RAM|mem[25][2]~q & \ALU|Mux26~1_combout ) ) ) ) + + .dataa(!\RAM|mem[41][2]~q ), + .datab(!\RAM|mem[25][2]~q ), + .datac(!\ALU|Mux26~1_combout ), + .datad(!\RAM|mem[9][2]~q ), + .datae(!\RAM|mem[57][2]~q ), + .dataf(!\ALU|Mux27~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[2]~245_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[2]~245 .extended_lut = "off"; +defparam \rd[2]~245 .lut_mask = 64'h0303F3F3505F505F; +defparam \rd[2]~245 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X45_Y14_N30 +cyclonev_lcell_comb \rd[2]~247 ( +// Equation(s): +// \rd[2]~247_combout = ( \rd[2]~243_combout & ( \rd[2]~245_combout & ( ((!\ALU|Mux28~1_combout & (\rd[2]~246_combout )) # (\ALU|Mux28~1_combout & ((\rd[2]~244_combout )))) # (\ALU|Mux29~3_combout ) ) ) ) # ( !\rd[2]~243_combout & ( \rd[2]~245_combout +// & ( (!\ALU|Mux28~1_combout & (((\rd[2]~246_combout )) # (\ALU|Mux29~3_combout ))) # (\ALU|Mux28~1_combout & (!\ALU|Mux29~3_combout & ((\rd[2]~244_combout )))) ) ) ) # ( \rd[2]~243_combout & ( !\rd[2]~245_combout & ( (!\ALU|Mux28~1_combout & +// (!\ALU|Mux29~3_combout & (\rd[2]~246_combout ))) # (\ALU|Mux28~1_combout & (((\rd[2]~244_combout )) # (\ALU|Mux29~3_combout ))) ) ) ) # ( !\rd[2]~243_combout & ( !\rd[2]~245_combout & ( (!\ALU|Mux29~3_combout & ((!\ALU|Mux28~1_combout & +// (\rd[2]~246_combout )) # (\ALU|Mux28~1_combout & ((\rd[2]~244_combout ))))) ) ) ) + + .dataa(!\ALU|Mux28~1_combout ), + .datab(!\ALU|Mux29~3_combout ), + .datac(!\rd[2]~246_combout ), + .datad(!\rd[2]~244_combout ), + .datae(!\rd[2]~243_combout ), + .dataf(!\rd[2]~245_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[2]~247_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[2]~247 .extended_lut = "off"; +defparam \rd[2]~247 .lut_mask = 64'h084C195D2A6E3B7F; +defparam \rd[2]~247 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X45_Y12_N6 +cyclonev_lcell_comb \rd[2]~258 ( +// Equation(s): +// \rd[2]~258_combout = ( \ALU|Mux31~3_combout & ( \rd[2]~247_combout & ( (!\ALU|Mux30~1_combout & ((\rd[2]~252_combout ))) # (\ALU|Mux30~1_combout & (\rd[2]~242_combout )) ) ) ) # ( !\ALU|Mux31~3_combout & ( \rd[2]~247_combout & ( +// (\ALU|Mux30~1_combout ) # (\rd[2]~257_combout ) ) ) ) # ( \ALU|Mux31~3_combout & ( !\rd[2]~247_combout & ( (!\ALU|Mux30~1_combout & ((\rd[2]~252_combout ))) # (\ALU|Mux30~1_combout & (\rd[2]~242_combout )) ) ) ) # ( !\ALU|Mux31~3_combout & ( +// !\rd[2]~247_combout & ( (\rd[2]~257_combout & !\ALU|Mux30~1_combout ) ) ) ) + + .dataa(!\rd[2]~257_combout ), + .datab(!\ALU|Mux30~1_combout ), + .datac(!\rd[2]~242_combout ), + .datad(!\rd[2]~252_combout ), + .datae(!\ALU|Mux31~3_combout ), + .dataf(!\rd[2]~247_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[2]~258_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[2]~258 .extended_lut = "off"; +defparam \rd[2]~258 .lut_mask = 64'h444403CF777703CF; +defparam \rd[2]~258 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X40_Y12_N0 +cyclonev_lcell_comb \rd[2]~259 ( +// Equation(s): +// \rd[2]~259_combout = ( \rd[2]~237_combout & ( \rd[2]~258_combout & ( (!\CONTROL_UNIT|M2R[0]~0_combout & (!\ALU|Mux29~3_combout )) # (\CONTROL_UNIT|M2R[0]~0_combout & ((\ALU|Mux25~1_combout ))) ) ) ) # ( !\rd[2]~237_combout & ( \rd[2]~258_combout & +// ( (!\CONTROL_UNIT|M2R[0]~0_combout & (!\ALU|Mux29~3_combout )) # (\CONTROL_UNIT|M2R[0]~0_combout & (((\ALU|Mux25~1_combout & \ALU|Mux24~1_combout )))) ) ) ) # ( \rd[2]~237_combout & ( !\rd[2]~258_combout & ( (!\CONTROL_UNIT|M2R[0]~0_combout & +// (!\ALU|Mux29~3_combout )) # (\CONTROL_UNIT|M2R[0]~0_combout & (((\ALU|Mux25~1_combout & !\ALU|Mux24~1_combout )))) ) ) ) # ( !\rd[2]~237_combout & ( !\rd[2]~258_combout & ( (!\ALU|Mux29~3_combout & !\CONTROL_UNIT|M2R[0]~0_combout ) ) ) ) + + .dataa(!\ALU|Mux29~3_combout ), + .datab(!\ALU|Mux25~1_combout ), + .datac(!\ALU|Mux24~1_combout ), + .datad(!\CONTROL_UNIT|M2R[0]~0_combout ), + .datae(!\rd[2]~237_combout ), + .dataf(!\rd[2]~258_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[2]~259_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[2]~259 .extended_lut = "off"; +defparam \rd[2]~259 .lut_mask = 64'hAA00AA30AA03AA33; +defparam \rd[2]~259 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X54_Y10_N4 +dffeas \RAM|mem[206][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[206][0]~237_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[206][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[206][2] .is_wysiwyg = "true"; +defparam \RAM|mem[206][2] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X49_Y13_N33 +cyclonev_lcell_comb \RAM|mem[238][2]~feeder ( +// Equation(s): +// \RAM|mem[238][2]~feeder_combout = ( \RAM|mem~258_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~258_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[238][2]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[238][2]~feeder .extended_lut = "off"; +defparam \RAM|mem[238][2]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[238][2]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X49_Y13_N34 +dffeas \RAM|mem[238][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[238][2]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[238][1]~239_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[238][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[238][2] .is_wysiwyg = "true"; +defparam \RAM|mem[238][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X54_Y8_N14 +dffeas \RAM|mem[222][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[222][3]~238_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[222][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[222][2] .is_wysiwyg = "true"; +defparam \RAM|mem[222][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X48_Y12_N50 +dffeas \RAM|mem[254][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[254][4]~240_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[254][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[254][2] .is_wysiwyg = "true"; +defparam \RAM|mem[254][2] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X48_Y12_N48 +cyclonev_lcell_comb \rd[2]~192 ( +// Equation(s): +// \rd[2]~192_combout = ( \RAM|mem[254][2]~q & ( \ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout & ((\RAM|mem[238][2]~q ))) # (\ALU|Mux26~1_combout & (\RAM|mem[206][2]~q )) ) ) ) # ( !\RAM|mem[254][2]~q & ( \ALU|Mux27~1_combout & ( +// (!\ALU|Mux26~1_combout & ((\RAM|mem[238][2]~q ))) # (\ALU|Mux26~1_combout & (\RAM|mem[206][2]~q )) ) ) ) # ( \RAM|mem[254][2]~q & ( !\ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout ) # (\RAM|mem[222][2]~q ) ) ) ) # ( !\RAM|mem[254][2]~q & ( +// !\ALU|Mux27~1_combout & ( (\ALU|Mux26~1_combout & \RAM|mem[222][2]~q ) ) ) ) + + .dataa(!\RAM|mem[206][2]~q ), + .datab(!\ALU|Mux26~1_combout ), + .datac(!\RAM|mem[238][2]~q ), + .datad(!\RAM|mem[222][2]~q ), + .datae(!\RAM|mem[254][2]~q ), + .dataf(!\ALU|Mux27~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[2]~192_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[2]~192 .extended_lut = "off"; +defparam \rd[2]~192 .lut_mask = 64'h0033CCFF1D1D1D1D; +defparam \rd[2]~192 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X54_Y11_N12 +cyclonev_lcell_comb \RAM|mem[221][2]~feeder ( +// Equation(s): +// \RAM|mem[221][2]~feeder_combout = ( \RAM|mem~258_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~258_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[221][2]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[221][2]~feeder .extended_lut = "off"; +defparam \RAM|mem[221][2]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[221][2]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X54_Y11_N13 +dffeas \RAM|mem[221][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[221][2]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[221][3]~222_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[221][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[221][2] .is_wysiwyg = "true"; +defparam \RAM|mem[221][2] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X53_Y12_N24 +cyclonev_lcell_comb \RAM|mem[237][2]~feeder ( +// Equation(s): +// \RAM|mem[237][2]~feeder_combout = ( \RAM|mem~258_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~258_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[237][2]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[237][2]~feeder .extended_lut = "off"; +defparam \RAM|mem[237][2]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[237][2]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X53_Y12_N25 +dffeas \RAM|mem[237][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[237][2]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[237][2]~223_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[237][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[237][2] .is_wysiwyg = "true"; +defparam \RAM|mem[237][2] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X53_Y12_N54 +cyclonev_lcell_comb \RAM|mem[205][2]~feeder ( +// Equation(s): +// \RAM|mem[205][2]~feeder_combout = ( \RAM|mem~258_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~258_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[205][2]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[205][2]~feeder .extended_lut = "off"; +defparam \RAM|mem[205][2]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[205][2]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X53_Y12_N55 +dffeas \RAM|mem[205][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[205][2]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[205][3]~221_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[205][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[205][2] .is_wysiwyg = "true"; +defparam \RAM|mem[205][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X48_Y12_N14 +dffeas \RAM|mem[253][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[253][2]~224_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[253][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[253][2] .is_wysiwyg = "true"; +defparam \RAM|mem[253][2] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X48_Y12_N12 +cyclonev_lcell_comb \rd[2]~191 ( +// Equation(s): +// \rd[2]~191_combout = ( \RAM|mem[253][2]~q & ( \ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout & (\RAM|mem[237][2]~q )) # (\ALU|Mux26~1_combout & ((\RAM|mem[205][2]~q ))) ) ) ) # ( !\RAM|mem[253][2]~q & ( \ALU|Mux27~1_combout & ( +// (!\ALU|Mux26~1_combout & (\RAM|mem[237][2]~q )) # (\ALU|Mux26~1_combout & ((\RAM|mem[205][2]~q ))) ) ) ) # ( \RAM|mem[253][2]~q & ( !\ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout ) # (\RAM|mem[221][2]~q ) ) ) ) # ( !\RAM|mem[253][2]~q & ( +// !\ALU|Mux27~1_combout & ( (\RAM|mem[221][2]~q & \ALU|Mux26~1_combout ) ) ) ) + + .dataa(!\RAM|mem[221][2]~q ), + .datab(!\RAM|mem[237][2]~q ), + .datac(!\RAM|mem[205][2]~q ), + .datad(!\ALU|Mux26~1_combout ), + .datae(!\RAM|mem[253][2]~q ), + .dataf(!\ALU|Mux27~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[2]~191_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[2]~191 .extended_lut = "off"; +defparam \rd[2]~191 .lut_mask = 64'h0055FF55330F330F; +defparam \rd[2]~191 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X53_Y8_N17 +dffeas \RAM|mem[220][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[220][4]~206_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[220][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[220][2] .is_wysiwyg = "true"; +defparam \RAM|mem[220][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X53_Y8_N10 +dffeas \RAM|mem[204][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[204][1]~205_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[204][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[204][2] .is_wysiwyg = "true"; +defparam \RAM|mem[204][2] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X49_Y6_N54 +cyclonev_lcell_comb \RAM|mem[236][2]~feeder ( +// Equation(s): +// \RAM|mem[236][2]~feeder_combout = ( \RAM|mem~258_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~258_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[236][2]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[236][2]~feeder .extended_lut = "off"; +defparam \RAM|mem[236][2]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[236][2]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X49_Y6_N55 +dffeas \RAM|mem[236][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[236][2]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[236][3]~207_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[236][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[236][2] .is_wysiwyg = "true"; +defparam \RAM|mem[236][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X48_Y12_N20 +dffeas \RAM|mem[252][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[252][3]~208_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[252][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[252][2] .is_wysiwyg = "true"; +defparam \RAM|mem[252][2] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X48_Y12_N18 +cyclonev_lcell_comb \rd[2]~190 ( +// Equation(s): +// \rd[2]~190_combout = ( \RAM|mem[252][2]~q & ( \ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout & ((\RAM|mem[236][2]~q ))) # (\ALU|Mux26~1_combout & (\RAM|mem[204][2]~q )) ) ) ) # ( !\RAM|mem[252][2]~q & ( \ALU|Mux27~1_combout & ( +// (!\ALU|Mux26~1_combout & ((\RAM|mem[236][2]~q ))) # (\ALU|Mux26~1_combout & (\RAM|mem[204][2]~q )) ) ) ) # ( \RAM|mem[252][2]~q & ( !\ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout ) # (\RAM|mem[220][2]~q ) ) ) ) # ( !\RAM|mem[252][2]~q & ( +// !\ALU|Mux27~1_combout & ( (\RAM|mem[220][2]~q & \ALU|Mux26~1_combout ) ) ) ) + + .dataa(!\RAM|mem[220][2]~q ), + .datab(!\RAM|mem[204][2]~q ), + .datac(!\RAM|mem[236][2]~q ), + .datad(!\ALU|Mux26~1_combout ), + .datae(!\RAM|mem[252][2]~q ), + .dataf(!\ALU|Mux27~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[2]~190_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[2]~190 .extended_lut = "off"; +defparam \rd[2]~190 .lut_mask = 64'h0055FF550F330F33; +defparam \rd[2]~190 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X54_Y10_N58 +dffeas \RAM|mem[223][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[223][2]~248_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[223][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[223][2] .is_wysiwyg = "true"; +defparam \RAM|mem[223][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X43_Y9_N52 +dffeas \RAM|mem[239][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[239][1]~252_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[239][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[239][2] .is_wysiwyg = "true"; +defparam \RAM|mem[239][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X49_Y13_N4 +dffeas \RAM|mem[207][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[207][0]~244_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[207][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[207][2] .is_wysiwyg = "true"; +defparam \RAM|mem[207][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X49_Y12_N23 +dffeas \RAM|mem[255][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[255][3]~256_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[255][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[255][2] .is_wysiwyg = "true"; +defparam \RAM|mem[255][2] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X49_Y12_N21 +cyclonev_lcell_comb \rd[2]~193 ( +// Equation(s): +// \rd[2]~193_combout = ( \RAM|mem[255][2]~q & ( \ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout & (\RAM|mem[239][2]~q )) # (\ALU|Mux26~1_combout & ((\RAM|mem[207][2]~q ))) ) ) ) # ( !\RAM|mem[255][2]~q & ( \ALU|Mux27~1_combout & ( +// (!\ALU|Mux26~1_combout & (\RAM|mem[239][2]~q )) # (\ALU|Mux26~1_combout & ((\RAM|mem[207][2]~q ))) ) ) ) # ( \RAM|mem[255][2]~q & ( !\ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout ) # (\RAM|mem[223][2]~q ) ) ) ) # ( !\RAM|mem[255][2]~q & ( +// !\ALU|Mux27~1_combout & ( (\RAM|mem[223][2]~q & \ALU|Mux26~1_combout ) ) ) ) + + .dataa(!\RAM|mem[223][2]~q ), + .datab(!\RAM|mem[239][2]~q ), + .datac(!\RAM|mem[207][2]~q ), + .datad(!\ALU|Mux26~1_combout ), + .datae(!\RAM|mem[255][2]~q ), + .dataf(!\ALU|Mux27~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[2]~193_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[2]~193 .extended_lut = "off"; +defparam \rd[2]~193 .lut_mask = 64'h0055FF55330F330F; +defparam \rd[2]~193 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X48_Y12_N6 +cyclonev_lcell_comb \rd[2]~194 ( +// Equation(s): +// \rd[2]~194_combout = ( \rd[2]~193_combout & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & (\rd[2]~192_combout )) # (\ALU|Mux30~1_combout & ((\rd[2]~190_combout ))) ) ) ) # ( !\rd[2]~193_combout & ( \ALU|Mux31~3_combout & ( +// (!\ALU|Mux30~1_combout & (\rd[2]~192_combout )) # (\ALU|Mux30~1_combout & ((\rd[2]~190_combout ))) ) ) ) # ( \rd[2]~193_combout & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout ) # (\rd[2]~191_combout ) ) ) ) # ( !\rd[2]~193_combout & ( +// !\ALU|Mux31~3_combout & ( (\rd[2]~191_combout & \ALU|Mux30~1_combout ) ) ) ) + + .dataa(!\rd[2]~192_combout ), + .datab(!\rd[2]~191_combout ), + .datac(!\rd[2]~190_combout ), + .datad(!\ALU|Mux30~1_combout ), + .datae(!\rd[2]~193_combout ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[2]~194_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[2]~194 .extended_lut = "off"; +defparam \rd[2]~194 .lut_mask = 64'h0033FF33550F550F; +defparam \rd[2]~194 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X54_Y7_N30 +cyclonev_lcell_comb \RAM|mem[200][2]~feeder ( +// Equation(s): +// \RAM|mem[200][2]~feeder_combout = ( \RAM|mem~258_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~258_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[200][2]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[200][2]~feeder .extended_lut = "off"; +defparam \RAM|mem[200][2]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[200][2]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X54_Y7_N32 +dffeas \RAM|mem[200][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[200][2]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[200][2]~201_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[200][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[200][2] .is_wysiwyg = "true"; +defparam \RAM|mem[200][2] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X53_Y12_N15 +cyclonev_lcell_comb \RAM|mem[201][2]~feeder ( +// Equation(s): +// \RAM|mem[201][2]~feeder_combout = ( \RAM|mem~258_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~258_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[201][2]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[201][2]~feeder .extended_lut = "off"; +defparam \RAM|mem[201][2]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[201][2]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X53_Y12_N17 +dffeas \RAM|mem[201][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[201][2]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[201][4]~217_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[201][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[201][2] .is_wysiwyg = "true"; +defparam \RAM|mem[201][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X53_Y10_N7 +dffeas \RAM|mem[202][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[202][4]~233_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[202][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[202][2] .is_wysiwyg = "true"; +defparam \RAM|mem[202][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X41_Y12_N32 +dffeas \RAM|mem[203][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[203][4]~243_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[203][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[203][2] .is_wysiwyg = "true"; +defparam \RAM|mem[203][2] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X41_Y12_N30 +cyclonev_lcell_comb \rd[2]~185 ( +// Equation(s): +// \rd[2]~185_combout = ( \RAM|mem[203][2]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & ((\RAM|mem[202][2]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[200][2]~q )) ) ) ) # ( !\RAM|mem[203][2]~q & ( \ALU|Mux31~3_combout & ( +// (!\ALU|Mux30~1_combout & ((\RAM|mem[202][2]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[200][2]~q )) ) ) ) # ( \RAM|mem[203][2]~q & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout ) # (\RAM|mem[201][2]~q ) ) ) ) # ( !\RAM|mem[203][2]~q & ( +// !\ALU|Mux31~3_combout & ( (\ALU|Mux30~1_combout & \RAM|mem[201][2]~q ) ) ) ) + + .dataa(!\RAM|mem[200][2]~q ), + .datab(!\ALU|Mux30~1_combout ), + .datac(!\RAM|mem[201][2]~q ), + .datad(!\RAM|mem[202][2]~q ), + .datae(!\RAM|mem[203][2]~q ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[2]~185_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[2]~185 .extended_lut = "off"; +defparam \rd[2]~185 .lut_mask = 64'h0303CFCF11DD11DD; +defparam \rd[2]~185 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X48_Y8_N52 +dffeas \RAM|mem[249][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[249][1]~220_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[249][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[249][2] .is_wysiwyg = "true"; +defparam \RAM|mem[249][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X48_Y7_N58 +dffeas \RAM|mem[248][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[248][3]~204_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[248][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[248][2] .is_wysiwyg = "true"; +defparam \RAM|mem[248][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X49_Y8_N1 +dffeas \RAM|mem[250][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[250][4]~236_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[250][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[250][2] .is_wysiwyg = "true"; +defparam \RAM|mem[250][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X41_Y12_N14 +dffeas \RAM|mem[251][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[251][2]~255_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[251][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[251][2] .is_wysiwyg = "true"; +defparam \RAM|mem[251][2] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X41_Y12_N12 +cyclonev_lcell_comb \rd[2]~188 ( +// Equation(s): +// \rd[2]~188_combout = ( \RAM|mem[251][2]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & ((\RAM|mem[250][2]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[248][2]~q )) ) ) ) # ( !\RAM|mem[251][2]~q & ( \ALU|Mux31~3_combout & ( +// (!\ALU|Mux30~1_combout & ((\RAM|mem[250][2]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[248][2]~q )) ) ) ) # ( \RAM|mem[251][2]~q & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout ) # (\RAM|mem[249][2]~q ) ) ) ) # ( !\RAM|mem[251][2]~q & ( +// !\ALU|Mux31~3_combout & ( (\RAM|mem[249][2]~q & \ALU|Mux30~1_combout ) ) ) ) + + .dataa(!\RAM|mem[249][2]~q ), + .datab(!\RAM|mem[248][2]~q ), + .datac(!\RAM|mem[250][2]~q ), + .datad(!\ALU|Mux30~1_combout ), + .datae(!\RAM|mem[251][2]~q ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[2]~188_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[2]~188 .extended_lut = "off"; +defparam \rd[2]~188 .lut_mask = 64'h0055FF550F330F33; +defparam \rd[2]~188 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X53_Y10_N1 +dffeas \RAM|mem[218][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[218][2]~234_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[218][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[218][2] .is_wysiwyg = "true"; +defparam \RAM|mem[218][2] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X54_Y7_N12 +cyclonev_lcell_comb \RAM|mem[216][2]~feeder ( +// Equation(s): +// \RAM|mem[216][2]~feeder_combout = ( \RAM|mem~258_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~258_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[216][2]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[216][2]~feeder .extended_lut = "off"; +defparam \RAM|mem[216][2]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[216][2]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X54_Y7_N13 +dffeas \RAM|mem[216][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[216][2]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[216][3]~202_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[216][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[216][2] .is_wysiwyg = "true"; +defparam \RAM|mem[216][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X53_Y10_N49 +dffeas \RAM|mem[217][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[217][1]~218_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[217][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[217][2] .is_wysiwyg = "true"; +defparam \RAM|mem[217][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X43_Y13_N2 +dffeas \RAM|mem[219][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[219][0]~247_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[219][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[219][2] .is_wysiwyg = "true"; +defparam \RAM|mem[219][2] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X43_Y13_N0 +cyclonev_lcell_comb \rd[2]~186 ( +// Equation(s): +// \rd[2]~186_combout = ( \RAM|mem[219][2]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & (\RAM|mem[218][2]~q )) # (\ALU|Mux30~1_combout & ((\RAM|mem[216][2]~q ))) ) ) ) # ( !\RAM|mem[219][2]~q & ( \ALU|Mux31~3_combout & ( +// (!\ALU|Mux30~1_combout & (\RAM|mem[218][2]~q )) # (\ALU|Mux30~1_combout & ((\RAM|mem[216][2]~q ))) ) ) ) # ( \RAM|mem[219][2]~q & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout ) # (\RAM|mem[217][2]~q ) ) ) ) # ( !\RAM|mem[219][2]~q & ( +// !\ALU|Mux31~3_combout & ( (\RAM|mem[217][2]~q & \ALU|Mux30~1_combout ) ) ) ) + + .dataa(!\RAM|mem[218][2]~q ), + .datab(!\RAM|mem[216][2]~q ), + .datac(!\RAM|mem[217][2]~q ), + .datad(!\ALU|Mux30~1_combout ), + .datae(!\RAM|mem[219][2]~q ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[2]~186_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[2]~186 .extended_lut = "off"; +defparam \rd[2]~186 .lut_mask = 64'h000FFF0F55335533; +defparam \rd[2]~186 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X45_Y9_N38 +dffeas \RAM|mem[234][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[234][0]~235_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[234][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[234][2] .is_wysiwyg = "true"; +defparam \RAM|mem[234][2] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X54_Y7_N54 +cyclonev_lcell_comb \RAM|mem[232][2]~feeder ( +// Equation(s): +// \RAM|mem[232][2]~feeder_combout = ( \RAM|mem~258_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~258_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[232][2]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[232][2]~feeder .extended_lut = "off"; +defparam \RAM|mem[232][2]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[232][2]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X54_Y7_N55 +dffeas \RAM|mem[232][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[232][2]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[232][3]~203_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[232][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[232][2] .is_wysiwyg = "true"; +defparam \RAM|mem[232][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X45_Y9_N49 +dffeas \RAM|mem[233][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[233][0]~219_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[233][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[233][2] .is_wysiwyg = "true"; +defparam \RAM|mem[233][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X45_Y9_N14 +dffeas \RAM|mem[235][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[235][2]~251_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[235][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[235][2] .is_wysiwyg = "true"; +defparam \RAM|mem[235][2] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X45_Y9_N12 +cyclonev_lcell_comb \rd[2]~187 ( +// Equation(s): +// \rd[2]~187_combout = ( \RAM|mem[235][2]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & (\RAM|mem[234][2]~q )) # (\ALU|Mux30~1_combout & ((\RAM|mem[232][2]~q ))) ) ) ) # ( !\RAM|mem[235][2]~q & ( \ALU|Mux31~3_combout & ( +// (!\ALU|Mux30~1_combout & (\RAM|mem[234][2]~q )) # (\ALU|Mux30~1_combout & ((\RAM|mem[232][2]~q ))) ) ) ) # ( \RAM|mem[235][2]~q & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout ) # (\RAM|mem[233][2]~q ) ) ) ) # ( !\RAM|mem[235][2]~q & ( +// !\ALU|Mux31~3_combout & ( (\ALU|Mux30~1_combout & \RAM|mem[233][2]~q ) ) ) ) + + .dataa(!\RAM|mem[234][2]~q ), + .datab(!\RAM|mem[232][2]~q ), + .datac(!\ALU|Mux30~1_combout ), + .datad(!\RAM|mem[233][2]~q ), + .datae(!\RAM|mem[235][2]~q ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[2]~187_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[2]~187 .extended_lut = "off"; +defparam \rd[2]~187 .lut_mask = 64'h000FF0FF53535353; +defparam \rd[2]~187 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X41_Y12_N24 +cyclonev_lcell_comb \rd[2]~189 ( +// Equation(s): +// \rd[2]~189_combout = ( \rd[2]~186_combout & ( \rd[2]~187_combout & ( (!\ALU|Mux27~1_combout & (((\rd[2]~188_combout ) # (\ALU|Mux26~1_combout )))) # (\ALU|Mux27~1_combout & (((!\ALU|Mux26~1_combout )) # (\rd[2]~185_combout ))) ) ) ) # ( +// !\rd[2]~186_combout & ( \rd[2]~187_combout & ( (!\ALU|Mux27~1_combout & (((!\ALU|Mux26~1_combout & \rd[2]~188_combout )))) # (\ALU|Mux27~1_combout & (((!\ALU|Mux26~1_combout )) # (\rd[2]~185_combout ))) ) ) ) # ( \rd[2]~186_combout & ( +// !\rd[2]~187_combout & ( (!\ALU|Mux27~1_combout & (((\rd[2]~188_combout ) # (\ALU|Mux26~1_combout )))) # (\ALU|Mux27~1_combout & (\rd[2]~185_combout & (\ALU|Mux26~1_combout ))) ) ) ) # ( !\rd[2]~186_combout & ( !\rd[2]~187_combout & ( +// (!\ALU|Mux27~1_combout & (((!\ALU|Mux26~1_combout & \rd[2]~188_combout )))) # (\ALU|Mux27~1_combout & (\rd[2]~185_combout & (\ALU|Mux26~1_combout ))) ) ) ) + + .dataa(!\ALU|Mux27~1_combout ), + .datab(!\rd[2]~185_combout ), + .datac(!\ALU|Mux26~1_combout ), + .datad(!\rd[2]~188_combout ), + .datae(!\rd[2]~186_combout ), + .dataf(!\rd[2]~187_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[2]~189_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[2]~189 .extended_lut = "off"; +defparam \rd[2]~189 .lut_mask = 64'h01A10BAB51F15BFB; +defparam \rd[2]~189 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X43_Y12_N35 +dffeas \RAM|mem[210][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[210][3]~226_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[210][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[210][2] .is_wysiwyg = "true"; +defparam \RAM|mem[210][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X42_Y9_N25 +dffeas \RAM|mem[209][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[209][0]~210_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[209][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[209][2] .is_wysiwyg = "true"; +defparam \RAM|mem[209][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X48_Y7_N16 +dffeas \RAM|mem[208][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[208][4]~194_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[208][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[208][2] .is_wysiwyg = "true"; +defparam \RAM|mem[208][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X43_Y12_N38 +dffeas \RAM|mem[211][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[211][1]~245_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[211][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[211][2] .is_wysiwyg = "true"; +defparam \RAM|mem[211][2] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X43_Y12_N36 +cyclonev_lcell_comb \rd[2]~176 ( +// Equation(s): +// \rd[2]~176_combout = ( \RAM|mem[211][2]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & (\RAM|mem[210][2]~q )) # (\ALU|Mux30~1_combout & ((\RAM|mem[208][2]~q ))) ) ) ) # ( !\RAM|mem[211][2]~q & ( \ALU|Mux31~3_combout & ( +// (!\ALU|Mux30~1_combout & (\RAM|mem[210][2]~q )) # (\ALU|Mux30~1_combout & ((\RAM|mem[208][2]~q ))) ) ) ) # ( \RAM|mem[211][2]~q & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout ) # (\RAM|mem[209][2]~q ) ) ) ) # ( !\RAM|mem[211][2]~q & ( +// !\ALU|Mux31~3_combout & ( (\RAM|mem[209][2]~q & \ALU|Mux30~1_combout ) ) ) ) + + .dataa(!\RAM|mem[210][2]~q ), + .datab(!\RAM|mem[209][2]~q ), + .datac(!\RAM|mem[208][2]~q ), + .datad(!\ALU|Mux30~1_combout ), + .datae(!\RAM|mem[211][2]~q ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[2]~176_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[2]~176 .extended_lut = "off"; +defparam \rd[2]~176 .lut_mask = 64'h0033FF33550F550F; +defparam \rd[2]~176 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X49_Y9_N20 +dffeas \RAM|mem[192][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[192][3]~193_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[192][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[192][2] .is_wysiwyg = "true"; +defparam \RAM|mem[192][2] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X49_Y13_N15 +cyclonev_lcell_comb \RAM|mem[195][2]~feeder ( +// Equation(s): +// \RAM|mem[195][2]~feeder_combout = ( \RAM|mem~258_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~258_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[195][2]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[195][2]~feeder .extended_lut = "off"; +defparam \RAM|mem[195][2]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[195][2]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X49_Y13_N17 +dffeas \RAM|mem[195][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[195][2]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[195][0]~241_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[195][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[195][2] .is_wysiwyg = "true"; +defparam \RAM|mem[195][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X49_Y9_N26 +dffeas \RAM|mem[194][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[194][4]~225_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[194][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[194][2] .is_wysiwyg = "true"; +defparam \RAM|mem[194][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X49_Y9_N8 +dffeas \RAM|mem[193][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[193][1]~209_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[193][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[193][2] .is_wysiwyg = "true"; +defparam \RAM|mem[193][2] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X49_Y9_N6 +cyclonev_lcell_comb \rd[2]~175 ( +// Equation(s): +// \rd[2]~175_combout = ( \RAM|mem[193][2]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & ((\RAM|mem[194][2]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[192][2]~q )) ) ) ) # ( !\RAM|mem[193][2]~q & ( \ALU|Mux31~3_combout & ( +// (!\ALU|Mux30~1_combout & ((\RAM|mem[194][2]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[192][2]~q )) ) ) ) # ( \RAM|mem[193][2]~q & ( !\ALU|Mux31~3_combout & ( (\ALU|Mux30~1_combout ) # (\RAM|mem[195][2]~q ) ) ) ) # ( !\RAM|mem[193][2]~q & ( +// !\ALU|Mux31~3_combout & ( (\RAM|mem[195][2]~q & !\ALU|Mux30~1_combout ) ) ) ) + + .dataa(!\RAM|mem[192][2]~q ), + .datab(!\RAM|mem[195][2]~q ), + .datac(!\RAM|mem[194][2]~q ), + .datad(!\ALU|Mux30~1_combout ), + .datae(!\RAM|mem[193][2]~q ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[2]~175_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[2]~175 .extended_lut = "off"; +defparam \rd[2]~175 .lut_mask = 64'h330033FF0F550F55; +defparam \rd[2]~175 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X50_Y7_N21 +cyclonev_lcell_comb \RAM|mem[241][2]~feeder ( +// Equation(s): +// \RAM|mem[241][2]~feeder_combout = ( \RAM|mem~258_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~258_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[241][2]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[241][2]~feeder .extended_lut = "off"; +defparam \RAM|mem[241][2]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[241][2]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X50_Y7_N22 +dffeas \RAM|mem[241][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[241][2]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[241][4]~212_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[241][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[241][2] .is_wysiwyg = "true"; +defparam \RAM|mem[241][2] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X50_Y6_N24 +cyclonev_lcell_comb \RAM|mem[240][2]~feeder ( +// Equation(s): +// \RAM|mem[240][2]~feeder_combout = ( \RAM|mem~258_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~258_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[240][2]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[240][2]~feeder .extended_lut = "off"; +defparam \RAM|mem[240][2]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[240][2]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X50_Y6_N25 +dffeas \RAM|mem[240][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[240][2]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[240][1]~196_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[240][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[240][2] .is_wysiwyg = "true"; +defparam \RAM|mem[240][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X47_Y8_N35 +dffeas \RAM|mem[242][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[242][0]~228_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[242][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[242][2] .is_wysiwyg = "true"; +defparam \RAM|mem[242][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X47_Y8_N14 +dffeas \RAM|mem[243][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[243][2]~253_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[243][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[243][2] .is_wysiwyg = "true"; +defparam \RAM|mem[243][2] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X47_Y8_N12 +cyclonev_lcell_comb \rd[2]~178 ( +// Equation(s): +// \rd[2]~178_combout = ( \RAM|mem[243][2]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & ((\RAM|mem[242][2]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[240][2]~q )) ) ) ) # ( !\RAM|mem[243][2]~q & ( \ALU|Mux31~3_combout & ( +// (!\ALU|Mux30~1_combout & ((\RAM|mem[242][2]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[240][2]~q )) ) ) ) # ( \RAM|mem[243][2]~q & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout ) # (\RAM|mem[241][2]~q ) ) ) ) # ( !\RAM|mem[243][2]~q & ( +// !\ALU|Mux31~3_combout & ( (\RAM|mem[241][2]~q & \ALU|Mux30~1_combout ) ) ) ) + + .dataa(!\RAM|mem[241][2]~q ), + .datab(!\RAM|mem[240][2]~q ), + .datac(!\RAM|mem[242][2]~q ), + .datad(!\ALU|Mux30~1_combout ), + .datae(!\RAM|mem[243][2]~q ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[2]~178_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[2]~178 .extended_lut = "off"; +defparam \rd[2]~178 .lut_mask = 64'h0055FF550F330F33; +defparam \rd[2]~178 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X48_Y5_N3 +cyclonev_lcell_comb \RAM|mem[224][2]~feeder ( +// Equation(s): +// \RAM|mem[224][2]~feeder_combout = ( \RAM|mem~258_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~258_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[224][2]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[224][2]~feeder .extended_lut = "off"; +defparam \RAM|mem[224][2]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[224][2]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X48_Y5_N4 +dffeas \RAM|mem[224][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[224][2]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[224][1]~195_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[224][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[224][2] .is_wysiwyg = "true"; +defparam \RAM|mem[224][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X43_Y5_N4 +dffeas \RAM|mem[226][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[226][3]~227_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[226][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[226][2] .is_wysiwyg = "true"; +defparam \RAM|mem[226][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X43_Y5_N26 +dffeas \RAM|mem[225][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[225][3]~211_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[225][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[225][2] .is_wysiwyg = "true"; +defparam \RAM|mem[225][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X43_Y5_N14 +dffeas \RAM|mem[227][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[227][3]~249_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[227][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[227][2] .is_wysiwyg = "true"; +defparam \RAM|mem[227][2] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X43_Y5_N12 +cyclonev_lcell_comb \rd[2]~177 ( +// Equation(s): +// \rd[2]~177_combout = ( \RAM|mem[227][2]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & ((\RAM|mem[226][2]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[224][2]~q )) ) ) ) # ( !\RAM|mem[227][2]~q & ( \ALU|Mux31~3_combout & ( +// (!\ALU|Mux30~1_combout & ((\RAM|mem[226][2]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[224][2]~q )) ) ) ) # ( \RAM|mem[227][2]~q & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout ) # (\RAM|mem[225][2]~q ) ) ) ) # ( !\RAM|mem[227][2]~q & ( +// !\ALU|Mux31~3_combout & ( (\RAM|mem[225][2]~q & \ALU|Mux30~1_combout ) ) ) ) + + .dataa(!\RAM|mem[224][2]~q ), + .datab(!\RAM|mem[226][2]~q ), + .datac(!\RAM|mem[225][2]~q ), + .datad(!\ALU|Mux30~1_combout ), + .datae(!\RAM|mem[227][2]~q ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[2]~177_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[2]~177 .extended_lut = "off"; +defparam \rd[2]~177 .lut_mask = 64'h000FFF0F33553355; +defparam \rd[2]~177 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X41_Y12_N36 +cyclonev_lcell_comb \rd[2]~179 ( +// Equation(s): +// \rd[2]~179_combout = ( \rd[2]~178_combout & ( \rd[2]~177_combout & ( (!\ALU|Mux26~1_combout ) # ((!\ALU|Mux27~1_combout & (\rd[2]~176_combout )) # (\ALU|Mux27~1_combout & ((\rd[2]~175_combout )))) ) ) ) # ( !\rd[2]~178_combout & ( \rd[2]~177_combout +// & ( (!\ALU|Mux27~1_combout & (\ALU|Mux26~1_combout & (\rd[2]~176_combout ))) # (\ALU|Mux27~1_combout & ((!\ALU|Mux26~1_combout ) # ((\rd[2]~175_combout )))) ) ) ) # ( \rd[2]~178_combout & ( !\rd[2]~177_combout & ( (!\ALU|Mux27~1_combout & +// ((!\ALU|Mux26~1_combout ) # ((\rd[2]~176_combout )))) # (\ALU|Mux27~1_combout & (\ALU|Mux26~1_combout & ((\rd[2]~175_combout )))) ) ) ) # ( !\rd[2]~178_combout & ( !\rd[2]~177_combout & ( (\ALU|Mux26~1_combout & ((!\ALU|Mux27~1_combout & +// (\rd[2]~176_combout )) # (\ALU|Mux27~1_combout & ((\rd[2]~175_combout ))))) ) ) ) + + .dataa(!\ALU|Mux27~1_combout ), + .datab(!\ALU|Mux26~1_combout ), + .datac(!\rd[2]~176_combout ), + .datad(!\rd[2]~175_combout ), + .datae(!\rd[2]~178_combout ), + .dataf(!\rd[2]~177_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[2]~179_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[2]~179 .extended_lut = "off"; +defparam \rd[2]~179 .lut_mask = 64'h02138A9B4657CEDF; +defparam \rd[2]~179 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X48_Y11_N28 +dffeas \RAM|mem[213][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[213][2]~214_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[213][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[213][2] .is_wysiwyg = "true"; +defparam \RAM|mem[213][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X48_Y7_N4 +dffeas \RAM|mem[212][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[212][1]~198_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[212][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[212][2] .is_wysiwyg = "true"; +defparam \RAM|mem[212][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X51_Y10_N32 +dffeas \RAM|mem[214][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[214][2]~230_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[214][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[214][2] .is_wysiwyg = "true"; +defparam \RAM|mem[214][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X43_Y8_N32 +dffeas \RAM|mem[215][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[215][1]~246_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[215][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[215][2] .is_wysiwyg = "true"; +defparam \RAM|mem[215][2] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X43_Y8_N30 +cyclonev_lcell_comb \rd[2]~181 ( +// Equation(s): +// \rd[2]~181_combout = ( \RAM|mem[215][2]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & ((\RAM|mem[214][2]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[212][2]~q )) ) ) ) # ( !\RAM|mem[215][2]~q & ( \ALU|Mux31~3_combout & ( +// (!\ALU|Mux30~1_combout & ((\RAM|mem[214][2]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[212][2]~q )) ) ) ) # ( \RAM|mem[215][2]~q & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout ) # (\RAM|mem[213][2]~q ) ) ) ) # ( !\RAM|mem[215][2]~q & ( +// !\ALU|Mux31~3_combout & ( (\RAM|mem[213][2]~q & \ALU|Mux30~1_combout ) ) ) ) + + .dataa(!\RAM|mem[213][2]~q ), + .datab(!\RAM|mem[212][2]~q ), + .datac(!\ALU|Mux30~1_combout ), + .datad(!\RAM|mem[214][2]~q ), + .datae(!\RAM|mem[215][2]~q ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[2]~181_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[2]~181 .extended_lut = "off"; +defparam \rd[2]~181 .lut_mask = 64'h0505F5F503F303F3; +defparam \rd[2]~181 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X43_Y9_N46 +dffeas \RAM|mem[229][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[229][2]~215_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[229][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[229][2] .is_wysiwyg = "true"; +defparam \RAM|mem[229][2] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X53_Y7_N0 +cyclonev_lcell_comb \RAM|mem[228][2]~feeder ( +// Equation(s): +// \RAM|mem[228][2]~feeder_combout = ( \RAM|mem~258_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~258_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[228][2]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[228][2]~feeder .extended_lut = "off"; +defparam \RAM|mem[228][2]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[228][2]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X53_Y7_N1 +dffeas \RAM|mem[228][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[228][2]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[228][4]~199_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[228][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[228][2] .is_wysiwyg = "true"; +defparam \RAM|mem[228][2] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X48_Y5_N18 +cyclonev_lcell_comb \RAM|mem[230][2]~feeder ( +// Equation(s): +// \RAM|mem[230][2]~feeder_combout = ( \RAM|mem~258_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~258_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[230][2]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[230][2]~feeder .extended_lut = "off"; +defparam \RAM|mem[230][2]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[230][2]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X48_Y5_N19 +dffeas \RAM|mem[230][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[230][2]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[230][1]~231_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[230][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[230][2] .is_wysiwyg = "true"; +defparam \RAM|mem[230][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X43_Y9_N14 +dffeas \RAM|mem[231][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[231][2]~250_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[231][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[231][2] .is_wysiwyg = "true"; +defparam \RAM|mem[231][2] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X43_Y9_N12 +cyclonev_lcell_comb \rd[2]~182 ( +// Equation(s): +// \rd[2]~182_combout = ( \RAM|mem[231][2]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & ((\RAM|mem[230][2]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[228][2]~q )) ) ) ) # ( !\RAM|mem[231][2]~q & ( \ALU|Mux31~3_combout & ( +// (!\ALU|Mux30~1_combout & ((\RAM|mem[230][2]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[228][2]~q )) ) ) ) # ( \RAM|mem[231][2]~q & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout ) # (\RAM|mem[229][2]~q ) ) ) ) # ( !\RAM|mem[231][2]~q & ( +// !\ALU|Mux31~3_combout & ( (\RAM|mem[229][2]~q & \ALU|Mux30~1_combout ) ) ) ) + + .dataa(!\RAM|mem[229][2]~q ), + .datab(!\RAM|mem[228][2]~q ), + .datac(!\RAM|mem[230][2]~q ), + .datad(!\ALU|Mux30~1_combout ), + .datae(!\RAM|mem[231][2]~q ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[2]~182_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[2]~182 .extended_lut = "off"; +defparam \rd[2]~182 .lut_mask = 64'h0055FF550F330F33; +defparam \rd[2]~182 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X50_Y6_N45 +cyclonev_lcell_comb \RAM|mem[244][2]~feeder ( +// Equation(s): +// \RAM|mem[244][2]~feeder_combout = ( \RAM|mem~258_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~258_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[244][2]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[244][2]~feeder .extended_lut = "off"; +defparam \RAM|mem[244][2]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[244][2]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X50_Y6_N47 +dffeas \RAM|mem[244][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[244][2]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[244][2]~200_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[244][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[244][2] .is_wysiwyg = "true"; +defparam \RAM|mem[244][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X49_Y8_N34 +dffeas \RAM|mem[246][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[246][2]~232_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[246][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[246][2] .is_wysiwyg = "true"; +defparam \RAM|mem[246][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X48_Y11_N23 +dffeas \RAM|mem[245][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[245][0]~216_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[245][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[245][2] .is_wysiwyg = "true"; +defparam \RAM|mem[245][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X43_Y8_N14 +dffeas \RAM|mem[247][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[247][4]~254_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[247][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[247][2] .is_wysiwyg = "true"; +defparam \RAM|mem[247][2] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X43_Y8_N12 +cyclonev_lcell_comb \rd[2]~183 ( +// Equation(s): +// \rd[2]~183_combout = ( \RAM|mem[247][2]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & ((\RAM|mem[246][2]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[244][2]~q )) ) ) ) # ( !\RAM|mem[247][2]~q & ( \ALU|Mux31~3_combout & ( +// (!\ALU|Mux30~1_combout & ((\RAM|mem[246][2]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[244][2]~q )) ) ) ) # ( \RAM|mem[247][2]~q & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout ) # (\RAM|mem[245][2]~q ) ) ) ) # ( !\RAM|mem[247][2]~q & ( +// !\ALU|Mux31~3_combout & ( (\ALU|Mux30~1_combout & \RAM|mem[245][2]~q ) ) ) ) + + .dataa(!\ALU|Mux30~1_combout ), + .datab(!\RAM|mem[244][2]~q ), + .datac(!\RAM|mem[246][2]~q ), + .datad(!\RAM|mem[245][2]~q ), + .datae(!\RAM|mem[247][2]~q ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[2]~183_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[2]~183 .extended_lut = "off"; +defparam \rd[2]~183 .lut_mask = 64'h0055AAFF1B1B1B1B; +defparam \rd[2]~183 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X48_Y11_N43 +dffeas \RAM|mem[197][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[197][1]~213_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[197][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[197][2] .is_wysiwyg = "true"; +defparam \RAM|mem[197][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X49_Y10_N14 +dffeas \RAM|mem[198][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[198][3]~229_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[198][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[198][2] .is_wysiwyg = "true"; +defparam \RAM|mem[198][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X49_Y10_N37 +dffeas \RAM|mem[196][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[196][0]~197_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[196][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[196][2] .is_wysiwyg = "true"; +defparam \RAM|mem[196][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X49_Y10_N56 +dffeas \RAM|mem[199][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[199][3]~242_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[199][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[199][2] .is_wysiwyg = "true"; +defparam \RAM|mem[199][2] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X49_Y10_N54 +cyclonev_lcell_comb \rd[2]~180 ( +// Equation(s): +// \rd[2]~180_combout = ( \RAM|mem[199][2]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & (\RAM|mem[198][2]~q )) # (\ALU|Mux30~1_combout & ((\RAM|mem[196][2]~q ))) ) ) ) # ( !\RAM|mem[199][2]~q & ( \ALU|Mux31~3_combout & ( +// (!\ALU|Mux30~1_combout & (\RAM|mem[198][2]~q )) # (\ALU|Mux30~1_combout & ((\RAM|mem[196][2]~q ))) ) ) ) # ( \RAM|mem[199][2]~q & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout ) # (\RAM|mem[197][2]~q ) ) ) ) # ( !\RAM|mem[199][2]~q & ( +// !\ALU|Mux31~3_combout & ( (\RAM|mem[197][2]~q & \ALU|Mux30~1_combout ) ) ) ) + + .dataa(!\RAM|mem[197][2]~q ), + .datab(!\ALU|Mux30~1_combout ), + .datac(!\RAM|mem[198][2]~q ), + .datad(!\RAM|mem[196][2]~q ), + .datae(!\RAM|mem[199][2]~q ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[2]~180_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[2]~180 .extended_lut = "off"; +defparam \rd[2]~180 .lut_mask = 64'h1111DDDD0C3F0C3F; +defparam \rd[2]~180 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X41_Y12_N18 +cyclonev_lcell_comb \rd[2]~184 ( +// Equation(s): +// \rd[2]~184_combout = ( \rd[2]~183_combout & ( \rd[2]~180_combout & ( (!\ALU|Mux27~1_combout & ((!\ALU|Mux26~1_combout ) # ((\rd[2]~181_combout )))) # (\ALU|Mux27~1_combout & (((\rd[2]~182_combout )) # (\ALU|Mux26~1_combout ))) ) ) ) # ( +// !\rd[2]~183_combout & ( \rd[2]~180_combout & ( (!\ALU|Mux27~1_combout & (\ALU|Mux26~1_combout & (\rd[2]~181_combout ))) # (\ALU|Mux27~1_combout & (((\rd[2]~182_combout )) # (\ALU|Mux26~1_combout ))) ) ) ) # ( \rd[2]~183_combout & ( +// !\rd[2]~180_combout & ( (!\ALU|Mux27~1_combout & ((!\ALU|Mux26~1_combout ) # ((\rd[2]~181_combout )))) # (\ALU|Mux27~1_combout & (!\ALU|Mux26~1_combout & ((\rd[2]~182_combout )))) ) ) ) # ( !\rd[2]~183_combout & ( !\rd[2]~180_combout & ( +// (!\ALU|Mux27~1_combout & (\ALU|Mux26~1_combout & (\rd[2]~181_combout ))) # (\ALU|Mux27~1_combout & (!\ALU|Mux26~1_combout & ((\rd[2]~182_combout )))) ) ) ) + + .dataa(!\ALU|Mux27~1_combout ), + .datab(!\ALU|Mux26~1_combout ), + .datac(!\rd[2]~181_combout ), + .datad(!\rd[2]~182_combout ), + .datae(!\rd[2]~183_combout ), + .dataf(!\rd[2]~180_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[2]~184_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[2]~184 .extended_lut = "off"; +defparam \rd[2]~184 .lut_mask = 64'h02468ACE13579BDF; +defparam \rd[2]~184 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X41_Y12_N42 +cyclonev_lcell_comb \rd[2]~195 ( +// Equation(s): +// \rd[2]~195_combout = ( \rd[2]~179_combout & ( \rd[2]~184_combout & ( ((!\ALU|Mux29~3_combout & (\rd[2]~194_combout )) # (\ALU|Mux29~3_combout & ((\rd[2]~189_combout )))) # (\ALU|Mux28~1_combout ) ) ) ) # ( !\rd[2]~179_combout & ( \rd[2]~184_combout +// & ( (!\ALU|Mux29~3_combout & (((\ALU|Mux28~1_combout )) # (\rd[2]~194_combout ))) # (\ALU|Mux29~3_combout & (((\rd[2]~189_combout & !\ALU|Mux28~1_combout )))) ) ) ) # ( \rd[2]~179_combout & ( !\rd[2]~184_combout & ( (!\ALU|Mux29~3_combout & +// (\rd[2]~194_combout & ((!\ALU|Mux28~1_combout )))) # (\ALU|Mux29~3_combout & (((\ALU|Mux28~1_combout ) # (\rd[2]~189_combout )))) ) ) ) # ( !\rd[2]~179_combout & ( !\rd[2]~184_combout & ( (!\ALU|Mux28~1_combout & ((!\ALU|Mux29~3_combout & +// (\rd[2]~194_combout )) # (\ALU|Mux29~3_combout & ((\rd[2]~189_combout ))))) ) ) ) + + .dataa(!\rd[2]~194_combout ), + .datab(!\ALU|Mux29~3_combout ), + .datac(!\rd[2]~189_combout ), + .datad(!\ALU|Mux28~1_combout ), + .datae(!\rd[2]~179_combout ), + .dataf(!\rd[2]~184_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[2]~195_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[2]~195 .extended_lut = "off"; +defparam \rd[2]~195 .lut_mask = 64'h4700473347CC47FF; +defparam \rd[2]~195 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X53_Y13_N37 +dffeas \RAM|mem[117][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[117][2]~30_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[117][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[117][2] .is_wysiwyg = "true"; +defparam \RAM|mem[117][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X48_Y13_N16 +dffeas \RAM|mem[121][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[121][2]~46_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[121][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[121][2] .is_wysiwyg = "true"; +defparam \RAM|mem[121][2] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X47_Y5_N21 +cyclonev_lcell_comb \RAM|mem[113][2]~feeder ( +// Equation(s): +// \RAM|mem[113][2]~feeder_combout = ( \RAM|mem~258_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~258_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[113][2]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[113][2]~feeder .extended_lut = "off"; +defparam \RAM|mem[113][2]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[113][2]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X47_Y5_N22 +dffeas \RAM|mem[113][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[113][2]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[113][0]~14_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[113][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[113][2] .is_wysiwyg = "true"; +defparam \RAM|mem[113][2] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X54_Y11_N54 +cyclonev_lcell_comb \RAM|mem[125][2]~feeder ( +// Equation(s): +// \RAM|mem[125][2]~feeder_combout = ( \RAM|mem~258_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~258_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[125][2]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[125][2]~feeder .extended_lut = "off"; +defparam \RAM|mem[125][2]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[125][2]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X54_Y11_N55 +dffeas \RAM|mem[125][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[125][2]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[125][4]~56_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[125][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[125][2] .is_wysiwyg = "true"; +defparam \RAM|mem[125][2] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X48_Y11_N36 +cyclonev_lcell_comb \rd[2]~212 ( +// Equation(s): +// \rd[2]~212_combout = ( \ALU|Mux29~3_combout & ( \ALU|Mux28~1_combout & ( \RAM|mem[113][2]~q ) ) ) # ( !\ALU|Mux29~3_combout & ( \ALU|Mux28~1_combout & ( \RAM|mem[117][2]~q ) ) ) # ( \ALU|Mux29~3_combout & ( !\ALU|Mux28~1_combout & ( +// \RAM|mem[121][2]~q ) ) ) # ( !\ALU|Mux29~3_combout & ( !\ALU|Mux28~1_combout & ( \RAM|mem[125][2]~q ) ) ) + + .dataa(!\RAM|mem[117][2]~q ), + .datab(!\RAM|mem[121][2]~q ), + .datac(!\RAM|mem[113][2]~q ), + .datad(!\RAM|mem[125][2]~q ), + .datae(!\ALU|Mux29~3_combout ), + .dataf(!\ALU|Mux28~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[2]~212_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[2]~212 .extended_lut = "off"; +defparam \rd[2]~212 .lut_mask = 64'h00FF333355550F0F; +defparam \rd[2]~212 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X45_Y10_N16 +dffeas \RAM|mem[123][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[123][1]~48_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[123][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[123][2] .is_wysiwyg = "true"; +defparam \RAM|mem[123][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X46_Y8_N34 +dffeas \RAM|mem[119][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[119][4]~32_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[119][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[119][2] .is_wysiwyg = "true"; +defparam \RAM|mem[119][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X47_Y10_N58 +dffeas \RAM|mem[115][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[115][2]~16_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[115][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[115][2] .is_wysiwyg = "true"; +defparam \RAM|mem[115][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X46_Y8_N8 +dffeas \RAM|mem[127][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[127][1]~64_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[127][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[127][2] .is_wysiwyg = "true"; +defparam \RAM|mem[127][2] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X46_Y8_N6 +cyclonev_lcell_comb \rd[2]~214 ( +// Equation(s): +// \rd[2]~214_combout = ( \RAM|mem[127][2]~q & ( \ALU|Mux29~3_combout & ( (!\ALU|Mux28~1_combout & (\RAM|mem[123][2]~q )) # (\ALU|Mux28~1_combout & ((\RAM|mem[115][2]~q ))) ) ) ) # ( !\RAM|mem[127][2]~q & ( \ALU|Mux29~3_combout & ( +// (!\ALU|Mux28~1_combout & (\RAM|mem[123][2]~q )) # (\ALU|Mux28~1_combout & ((\RAM|mem[115][2]~q ))) ) ) ) # ( \RAM|mem[127][2]~q & ( !\ALU|Mux29~3_combout & ( (!\ALU|Mux28~1_combout ) # (\RAM|mem[119][2]~q ) ) ) ) # ( !\RAM|mem[127][2]~q & ( +// !\ALU|Mux29~3_combout & ( (\ALU|Mux28~1_combout & \RAM|mem[119][2]~q ) ) ) ) + + .dataa(!\ALU|Mux28~1_combout ), + .datab(!\RAM|mem[123][2]~q ), + .datac(!\RAM|mem[119][2]~q ), + .datad(!\RAM|mem[115][2]~q ), + .datae(!\RAM|mem[127][2]~q ), + .dataf(!\ALU|Mux29~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[2]~214_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[2]~214 .extended_lut = "off"; +defparam \rd[2]~214 .lut_mask = 64'h0505AFAF22772277; +defparam \rd[2]~214 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X50_Y9_N5 +dffeas \RAM|mem[118][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[118][4]~31_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[118][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[118][2] .is_wysiwyg = "true"; +defparam \RAM|mem[118][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X49_Y8_N14 +dffeas \RAM|mem[122][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[122][2]~47_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[122][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[122][2] .is_wysiwyg = "true"; +defparam \RAM|mem[122][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X50_Y9_N41 +dffeas \RAM|mem[114][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[114][0]~15_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[114][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[114][2] .is_wysiwyg = "true"; +defparam \RAM|mem[114][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X50_Y9_N56 +dffeas \RAM|mem[126][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[126][1]~60_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[126][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[126][2] .is_wysiwyg = "true"; +defparam \RAM|mem[126][2] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X50_Y9_N54 +cyclonev_lcell_comb \rd[2]~213 ( +// Equation(s): +// \rd[2]~213_combout = ( \RAM|mem[126][2]~q & ( \ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout & (\RAM|mem[118][2]~q )) # (\ALU|Mux29~3_combout & ((\RAM|mem[114][2]~q ))) ) ) ) # ( !\RAM|mem[126][2]~q & ( \ALU|Mux28~1_combout & ( +// (!\ALU|Mux29~3_combout & (\RAM|mem[118][2]~q )) # (\ALU|Mux29~3_combout & ((\RAM|mem[114][2]~q ))) ) ) ) # ( \RAM|mem[126][2]~q & ( !\ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout ) # (\RAM|mem[122][2]~q ) ) ) ) # ( !\RAM|mem[126][2]~q & ( +// !\ALU|Mux28~1_combout & ( (\RAM|mem[122][2]~q & \ALU|Mux29~3_combout ) ) ) ) + + .dataa(!\RAM|mem[118][2]~q ), + .datab(!\RAM|mem[122][2]~q ), + .datac(!\ALU|Mux29~3_combout ), + .datad(!\RAM|mem[114][2]~q ), + .datae(!\RAM|mem[126][2]~q ), + .dataf(!\ALU|Mux28~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[2]~213_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[2]~213 .extended_lut = "off"; +defparam \rd[2]~213 .lut_mask = 64'h0303F3F3505F505F; +defparam \rd[2]~213 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X50_Y11_N46 +dffeas \RAM|mem[116][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[116][0]~29_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[116][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[116][2] .is_wysiwyg = "true"; +defparam \RAM|mem[116][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X54_Y9_N40 +dffeas \RAM|mem[120][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[120][0]~45_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[120][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[120][2] .is_wysiwyg = "true"; +defparam \RAM|mem[120][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X55_Y9_N25 +dffeas \RAM|mem[112][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[112][1]~13_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[112][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[112][2] .is_wysiwyg = "true"; +defparam \RAM|mem[112][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X51_Y7_N32 +dffeas \RAM|mem[124][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[124][2]~52_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[124][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[124][2] .is_wysiwyg = "true"; +defparam \RAM|mem[124][2] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X51_Y7_N30 +cyclonev_lcell_comb \rd[2]~211 ( +// Equation(s): +// \rd[2]~211_combout = ( \RAM|mem[124][2]~q & ( \ALU|Mux29~3_combout & ( (!\ALU|Mux28~1_combout & (\RAM|mem[120][2]~q )) # (\ALU|Mux28~1_combout & ((\RAM|mem[112][2]~q ))) ) ) ) # ( !\RAM|mem[124][2]~q & ( \ALU|Mux29~3_combout & ( +// (!\ALU|Mux28~1_combout & (\RAM|mem[120][2]~q )) # (\ALU|Mux28~1_combout & ((\RAM|mem[112][2]~q ))) ) ) ) # ( \RAM|mem[124][2]~q & ( !\ALU|Mux29~3_combout & ( (!\ALU|Mux28~1_combout ) # (\RAM|mem[116][2]~q ) ) ) ) # ( !\RAM|mem[124][2]~q & ( +// !\ALU|Mux29~3_combout & ( (\RAM|mem[116][2]~q & \ALU|Mux28~1_combout ) ) ) ) + + .dataa(!\RAM|mem[116][2]~q ), + .datab(!\RAM|mem[120][2]~q ), + .datac(!\RAM|mem[112][2]~q ), + .datad(!\ALU|Mux28~1_combout ), + .datae(!\RAM|mem[124][2]~q ), + .dataf(!\ALU|Mux29~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[2]~211_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[2]~211 .extended_lut = "off"; +defparam \rd[2]~211 .lut_mask = 64'h0055FF55330F330F; +defparam \rd[2]~211 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X41_Y11_N21 +cyclonev_lcell_comb \rd[2]~215 ( +// Equation(s): +// \rd[2]~215_combout = ( \rd[2]~213_combout & ( \rd[2]~211_combout & ( ((!\ALU|Mux30~1_combout & ((\rd[2]~214_combout ))) # (\ALU|Mux30~1_combout & (\rd[2]~212_combout ))) # (\ALU|Mux31~3_combout ) ) ) ) # ( !\rd[2]~213_combout & ( \rd[2]~211_combout +// & ( (!\ALU|Mux31~3_combout & ((!\ALU|Mux30~1_combout & ((\rd[2]~214_combout ))) # (\ALU|Mux30~1_combout & (\rd[2]~212_combout )))) # (\ALU|Mux31~3_combout & (((\ALU|Mux30~1_combout )))) ) ) ) # ( \rd[2]~213_combout & ( !\rd[2]~211_combout & ( +// (!\ALU|Mux31~3_combout & ((!\ALU|Mux30~1_combout & ((\rd[2]~214_combout ))) # (\ALU|Mux30~1_combout & (\rd[2]~212_combout )))) # (\ALU|Mux31~3_combout & (((!\ALU|Mux30~1_combout )))) ) ) ) # ( !\rd[2]~213_combout & ( !\rd[2]~211_combout & ( +// (!\ALU|Mux31~3_combout & ((!\ALU|Mux30~1_combout & ((\rd[2]~214_combout ))) # (\ALU|Mux30~1_combout & (\rd[2]~212_combout )))) ) ) ) + + .dataa(!\ALU|Mux31~3_combout ), + .datab(!\rd[2]~212_combout ), + .datac(!\rd[2]~214_combout ), + .datad(!\ALU|Mux30~1_combout ), + .datae(!\rd[2]~213_combout ), + .dataf(!\rd[2]~211_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[2]~215_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[2]~215 .extended_lut = "off"; +defparam \rd[2]~215 .lut_mask = 64'h0A225F220A775F77; +defparam \rd[2]~215 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X49_Y7_N25 +dffeas \RAM|mem[83][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[83][0]~8_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[83][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[83][2] .is_wysiwyg = "true"; +defparam \RAM|mem[83][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X46_Y7_N10 +dffeas \RAM|mem[95][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[95][4]~62_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[95][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[95][2] .is_wysiwyg = "true"; +defparam \RAM|mem[95][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X42_Y7_N46 +dffeas \RAM|mem[87][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[87][4]~24_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[87][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[87][2] .is_wysiwyg = "true"; +defparam \RAM|mem[87][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X45_Y10_N31 +dffeas \RAM|mem[91][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[91][0]~40_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[91][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[91][2] .is_wysiwyg = "true"; +defparam \RAM|mem[91][2] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X49_Y10_N21 +cyclonev_lcell_comb \rd[2]~204 ( +// Equation(s): +// \rd[2]~204_combout = ( \RAM|mem[91][2]~q & ( \ALU|Mux29~3_combout & ( (!\ALU|Mux28~1_combout ) # (\RAM|mem[83][2]~q ) ) ) ) # ( !\RAM|mem[91][2]~q & ( \ALU|Mux29~3_combout & ( (\ALU|Mux28~1_combout & \RAM|mem[83][2]~q ) ) ) ) # ( \RAM|mem[91][2]~q +// & ( !\ALU|Mux29~3_combout & ( (!\ALU|Mux28~1_combout & (\RAM|mem[95][2]~q )) # (\ALU|Mux28~1_combout & ((\RAM|mem[87][2]~q ))) ) ) ) # ( !\RAM|mem[91][2]~q & ( !\ALU|Mux29~3_combout & ( (!\ALU|Mux28~1_combout & (\RAM|mem[95][2]~q )) # +// (\ALU|Mux28~1_combout & ((\RAM|mem[87][2]~q ))) ) ) ) + + .dataa(!\ALU|Mux28~1_combout ), + .datab(!\RAM|mem[83][2]~q ), + .datac(!\RAM|mem[95][2]~q ), + .datad(!\RAM|mem[87][2]~q ), + .datae(!\RAM|mem[91][2]~q ), + .dataf(!\ALU|Mux29~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[2]~204_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[2]~204 .extended_lut = "off"; +defparam \rd[2]~204 .lut_mask = 64'h0A5F0A5F1111BBBB; +defparam \rd[2]~204 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X51_Y7_N57 +cyclonev_lcell_comb \RAM|mem[86][2]~feeder ( +// Equation(s): +// \RAM|mem[86][2]~feeder_combout = ( \RAM|mem~258_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~258_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[86][2]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[86][2]~feeder .extended_lut = "off"; +defparam \RAM|mem[86][2]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[86][2]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X51_Y7_N59 +dffeas \RAM|mem[86][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[86][2]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[86][3]~23_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[86][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[86][2] .is_wysiwyg = "true"; +defparam \RAM|mem[86][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X47_Y7_N34 +dffeas \RAM|mem[82][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[82][1]~7_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[82][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[82][2] .is_wysiwyg = "true"; +defparam \RAM|mem[82][2] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X49_Y6_N15 +cyclonev_lcell_comb \RAM|mem[90][2]~feeder ( +// Equation(s): +// \RAM|mem[90][2]~feeder_combout = ( \RAM|mem~258_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~258_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[90][2]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[90][2]~feeder .extended_lut = "off"; +defparam \RAM|mem[90][2]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[90][2]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X49_Y6_N16 +dffeas \RAM|mem[90][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[90][2]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[90][0]~39_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[90][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[90][2] .is_wysiwyg = "true"; +defparam \RAM|mem[90][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X50_Y10_N14 +dffeas \RAM|mem[94][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[94][4]~58_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[94][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[94][2] .is_wysiwyg = "true"; +defparam \RAM|mem[94][2] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X50_Y10_N12 +cyclonev_lcell_comb \rd[2]~203 ( +// Equation(s): +// \rd[2]~203_combout = ( \RAM|mem[94][2]~q & ( \ALU|Mux29~3_combout & ( (!\ALU|Mux28~1_combout & ((\RAM|mem[90][2]~q ))) # (\ALU|Mux28~1_combout & (\RAM|mem[82][2]~q )) ) ) ) # ( !\RAM|mem[94][2]~q & ( \ALU|Mux29~3_combout & ( (!\ALU|Mux28~1_combout +// & ((\RAM|mem[90][2]~q ))) # (\ALU|Mux28~1_combout & (\RAM|mem[82][2]~q )) ) ) ) # ( \RAM|mem[94][2]~q & ( !\ALU|Mux29~3_combout & ( (!\ALU|Mux28~1_combout ) # (\RAM|mem[86][2]~q ) ) ) ) # ( !\RAM|mem[94][2]~q & ( !\ALU|Mux29~3_combout & ( +// (\RAM|mem[86][2]~q & \ALU|Mux28~1_combout ) ) ) ) + + .dataa(!\RAM|mem[86][2]~q ), + .datab(!\RAM|mem[82][2]~q ), + .datac(!\RAM|mem[90][2]~q ), + .datad(!\ALU|Mux28~1_combout ), + .datae(!\RAM|mem[94][2]~q ), + .dataf(!\ALU|Mux29~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[2]~203_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[2]~203 .extended_lut = "off"; +defparam \rd[2]~203 .lut_mask = 64'h0055FF550F330F33; +defparam \rd[2]~203 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X54_Y9_N12 +cyclonev_lcell_comb \RAM|mem[88][2]~feeder ( +// Equation(s): +// \RAM|mem[88][2]~feeder_combout = ( \RAM|mem~258_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~258_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[88][2]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[88][2]~feeder .extended_lut = "off"; +defparam \RAM|mem[88][2]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[88][2]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X54_Y9_N13 +dffeas \RAM|mem[88][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[88][2]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[88][4]~37_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[88][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[88][2] .is_wysiwyg = "true"; +defparam \RAM|mem[88][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X55_Y9_N10 +dffeas \RAM|mem[80][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[80][0]~5_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[80][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[80][2] .is_wysiwyg = "true"; +defparam \RAM|mem[80][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X55_Y10_N46 +dffeas \RAM|mem[92][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[92][2]~50_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[92][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[92][2] .is_wysiwyg = "true"; +defparam \RAM|mem[92][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X50_Y10_N20 +dffeas \RAM|mem[84][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[84][1]~21_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[84][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[84][2] .is_wysiwyg = "true"; +defparam \RAM|mem[84][2] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X50_Y10_N18 +cyclonev_lcell_comb \rd[2]~201 ( +// Equation(s): +// \rd[2]~201_combout = ( \RAM|mem[84][2]~q & ( \ALU|Mux29~3_combout & ( (!\ALU|Mux28~1_combout & (\RAM|mem[88][2]~q )) # (\ALU|Mux28~1_combout & ((\RAM|mem[80][2]~q ))) ) ) ) # ( !\RAM|mem[84][2]~q & ( \ALU|Mux29~3_combout & ( (!\ALU|Mux28~1_combout +// & (\RAM|mem[88][2]~q )) # (\ALU|Mux28~1_combout & ((\RAM|mem[80][2]~q ))) ) ) ) # ( \RAM|mem[84][2]~q & ( !\ALU|Mux29~3_combout & ( (\ALU|Mux28~1_combout ) # (\RAM|mem[92][2]~q ) ) ) ) # ( !\RAM|mem[84][2]~q & ( !\ALU|Mux29~3_combout & ( +// (\RAM|mem[92][2]~q & !\ALU|Mux28~1_combout ) ) ) ) + + .dataa(!\RAM|mem[88][2]~q ), + .datab(!\RAM|mem[80][2]~q ), + .datac(!\RAM|mem[92][2]~q ), + .datad(!\ALU|Mux28~1_combout ), + .datae(!\RAM|mem[84][2]~q ), + .dataf(!\ALU|Mux29~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[2]~201_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[2]~201 .extended_lut = "off"; +defparam \rd[2]~201 .lut_mask = 64'h0F000FFF55335533; +defparam \rd[2]~201 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X55_Y11_N46 +dffeas \RAM|mem[93][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[93][2]~54_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[93][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[93][2] .is_wysiwyg = "true"; +defparam \RAM|mem[93][2] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X51_Y13_N18 +cyclonev_lcell_comb \RAM|mem[89][2]~feeder ( +// Equation(s): +// \RAM|mem[89][2]~feeder_combout = ( \RAM|mem~258_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~258_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[89][2]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[89][2]~feeder .extended_lut = "off"; +defparam \RAM|mem[89][2]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[89][2]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X51_Y13_N19 +dffeas \RAM|mem[89][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[89][2]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[89][2]~38_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[89][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[89][2] .is_wysiwyg = "true"; +defparam \RAM|mem[89][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X47_Y13_N59 +dffeas \RAM|mem[81][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[81][0]~6_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[81][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[81][2] .is_wysiwyg = "true"; +defparam \RAM|mem[81][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X50_Y10_N56 +dffeas \RAM|mem[85][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[85][1]~22_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[85][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[85][2] .is_wysiwyg = "true"; +defparam \RAM|mem[85][2] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X50_Y10_N54 +cyclonev_lcell_comb \rd[2]~202 ( +// Equation(s): +// \rd[2]~202_combout = ( \RAM|mem[85][2]~q & ( \ALU|Mux29~3_combout & ( (!\ALU|Mux28~1_combout & (\RAM|mem[89][2]~q )) # (\ALU|Mux28~1_combout & ((\RAM|mem[81][2]~q ))) ) ) ) # ( !\RAM|mem[85][2]~q & ( \ALU|Mux29~3_combout & ( (!\ALU|Mux28~1_combout +// & (\RAM|mem[89][2]~q )) # (\ALU|Mux28~1_combout & ((\RAM|mem[81][2]~q ))) ) ) ) # ( \RAM|mem[85][2]~q & ( !\ALU|Mux29~3_combout & ( (\ALU|Mux28~1_combout ) # (\RAM|mem[93][2]~q ) ) ) ) # ( !\RAM|mem[85][2]~q & ( !\ALU|Mux29~3_combout & ( +// (\RAM|mem[93][2]~q & !\ALU|Mux28~1_combout ) ) ) ) + + .dataa(!\RAM|mem[93][2]~q ), + .datab(!\RAM|mem[89][2]~q ), + .datac(!\RAM|mem[81][2]~q ), + .datad(!\ALU|Mux28~1_combout ), + .datae(!\RAM|mem[85][2]~q ), + .dataf(!\ALU|Mux29~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[2]~202_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[2]~202 .extended_lut = "off"; +defparam \rd[2]~202 .lut_mask = 64'h550055FF330F330F; +defparam \rd[2]~202 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X49_Y10_N27 +cyclonev_lcell_comb \rd[2]~205 ( +// Equation(s): +// \rd[2]~205_combout = ( \rd[2]~202_combout & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & (\rd[2]~203_combout )) # (\ALU|Mux30~1_combout & ((\rd[2]~201_combout ))) ) ) ) # ( !\rd[2]~202_combout & ( \ALU|Mux31~3_combout & ( +// (!\ALU|Mux30~1_combout & (\rd[2]~203_combout )) # (\ALU|Mux30~1_combout & ((\rd[2]~201_combout ))) ) ) ) # ( \rd[2]~202_combout & ( !\ALU|Mux31~3_combout & ( (\ALU|Mux30~1_combout ) # (\rd[2]~204_combout ) ) ) ) # ( !\rd[2]~202_combout & ( +// !\ALU|Mux31~3_combout & ( (\rd[2]~204_combout & !\ALU|Mux30~1_combout ) ) ) ) + + .dataa(!\rd[2]~204_combout ), + .datab(!\rd[2]~203_combout ), + .datac(!\ALU|Mux30~1_combout ), + .datad(!\rd[2]~201_combout ), + .datae(!\rd[2]~202_combout ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[2]~205_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[2]~205 .extended_lut = "off"; +defparam \rd[2]~205 .lut_mask = 64'h50505F5F303F303F; +defparam \rd[2]~205 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y14_N48 +cyclonev_lcell_comb \RAM|mem[107][2]~feeder ( +// Equation(s): +// \RAM|mem[107][2]~feeder_combout = ( \RAM|mem~258_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~258_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[107][2]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[107][2]~feeder .extended_lut = "off"; +defparam \RAM|mem[107][2]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[107][2]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X42_Y14_N50 +dffeas \RAM|mem[107][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[107][2]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[107][2]~44_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[107][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[107][2] .is_wysiwyg = "true"; +defparam \RAM|mem[107][2] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X53_Y13_N27 +cyclonev_lcell_comb \RAM|mem[104][2]~feeder ( +// Equation(s): +// \RAM|mem[104][2]~feeder_combout = ( \RAM|mem~258_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~258_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[104][2]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[104][2]~feeder .extended_lut = "off"; +defparam \RAM|mem[104][2]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[104][2]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X53_Y13_N29 +dffeas \RAM|mem[104][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[104][2]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[104][0]~41_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[104][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[104][2] .is_wysiwyg = "true"; +defparam \RAM|mem[104][2] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y14_N30 +cyclonev_lcell_comb \RAM|mem[106][2]~feeder ( +// Equation(s): +// \RAM|mem[106][2]~feeder_combout = ( \RAM|mem~258_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~258_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[106][2]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[106][2]~feeder .extended_lut = "off"; +defparam \RAM|mem[106][2]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[106][2]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X42_Y14_N31 +dffeas \RAM|mem[106][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[106][2]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[106][0]~43_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[106][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[106][2] .is_wysiwyg = "true"; +defparam \RAM|mem[106][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X42_Y14_N37 +dffeas \RAM|mem[105][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[105][0]~42_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[105][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[105][2] .is_wysiwyg = "true"; +defparam \RAM|mem[105][2] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X41_Y13_N45 +cyclonev_lcell_comb \rd[2]~208 ( +// Equation(s): +// \rd[2]~208_combout = ( \ALU|Mux30~1_combout & ( \ALU|Mux31~3_combout & ( \RAM|mem[104][2]~q ) ) ) # ( !\ALU|Mux30~1_combout & ( \ALU|Mux31~3_combout & ( \RAM|mem[106][2]~q ) ) ) # ( \ALU|Mux30~1_combout & ( !\ALU|Mux31~3_combout & ( +// \RAM|mem[105][2]~q ) ) ) # ( !\ALU|Mux30~1_combout & ( !\ALU|Mux31~3_combout & ( \RAM|mem[107][2]~q ) ) ) + + .dataa(!\RAM|mem[107][2]~q ), + .datab(!\RAM|mem[104][2]~q ), + .datac(!\RAM|mem[106][2]~q ), + .datad(!\RAM|mem[105][2]~q ), + .datae(!\ALU|Mux30~1_combout ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[2]~208_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[2]~208 .extended_lut = "off"; +defparam \rd[2]~208 .lut_mask = 64'h555500FF0F0F3333; +defparam \rd[2]~208 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X50_Y13_N24 +cyclonev_lcell_comb \RAM|mem[97][2]~feeder ( +// Equation(s): +// \RAM|mem[97][2]~feeder_combout = ( \RAM|mem~258_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~258_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[97][2]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[97][2]~feeder .extended_lut = "off"; +defparam \RAM|mem[97][2]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[97][2]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X50_Y13_N25 +dffeas \RAM|mem[97][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[97][2]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[97][4]~10_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[97][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[97][2] .is_wysiwyg = "true"; +defparam \RAM|mem[97][2] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X54_Y13_N39 +cyclonev_lcell_comb \RAM|mem[96][2]~feeder ( +// Equation(s): +// \RAM|mem[96][2]~feeder_combout = ( \RAM|mem~258_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~258_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[96][2]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[96][2]~feeder .extended_lut = "off"; +defparam \RAM|mem[96][2]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[96][2]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X54_Y13_N40 +dffeas \RAM|mem[96][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[96][2]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[96][1]~9_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[96][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[96][2] .is_wysiwyg = "true"; +defparam \RAM|mem[96][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X47_Y7_N58 +dffeas \RAM|mem[98][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[98][3]~11_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[98][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[98][2] .is_wysiwyg = "true"; +defparam \RAM|mem[98][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X47_Y10_N43 +dffeas \RAM|mem[99][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[99][0]~12_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[99][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[99][2] .is_wysiwyg = "true"; +defparam \RAM|mem[99][2] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X45_Y11_N30 +cyclonev_lcell_comb \rd[2]~206 ( +// Equation(s): +// \rd[2]~206_combout = ( \RAM|mem[99][2]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & ((\RAM|mem[98][2]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[96][2]~q )) ) ) ) # ( !\RAM|mem[99][2]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout +// & ((\RAM|mem[98][2]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[96][2]~q )) ) ) ) # ( \RAM|mem[99][2]~q & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout ) # (\RAM|mem[97][2]~q ) ) ) ) # ( !\RAM|mem[99][2]~q & ( !\ALU|Mux31~3_combout & ( +// (\RAM|mem[97][2]~q & \ALU|Mux30~1_combout ) ) ) ) + + .dataa(!\RAM|mem[97][2]~q ), + .datab(!\RAM|mem[96][2]~q ), + .datac(!\ALU|Mux30~1_combout ), + .datad(!\RAM|mem[98][2]~q ), + .datae(!\RAM|mem[99][2]~q ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[2]~206_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[2]~206 .extended_lut = "off"; +defparam \rd[2]~206 .lut_mask = 64'h0505F5F503F303F3; +defparam \rd[2]~206 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X47_Y6_N4 +dffeas \RAM|mem[100][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[100][0]~25_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[100][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[100][2] .is_wysiwyg = "true"; +defparam \RAM|mem[100][2] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X54_Y13_N57 +cyclonev_lcell_comb \RAM|mem[102][2]~feeder ( +// Equation(s): +// \RAM|mem[102][2]~feeder_combout = ( \RAM|mem~258_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~258_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[102][2]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[102][2]~feeder .extended_lut = "off"; +defparam \RAM|mem[102][2]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[102][2]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X54_Y13_N58 +dffeas \RAM|mem[102][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[102][2]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[102][1]~27_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[102][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[102][2] .is_wysiwyg = "true"; +defparam \RAM|mem[102][2] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X49_Y12_N0 +cyclonev_lcell_comb \RAM|mem[101][2]~feeder ( +// Equation(s): +// \RAM|mem[101][2]~feeder_combout = ( \RAM|mem~258_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~258_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[101][2]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[101][2]~feeder .extended_lut = "off"; +defparam \RAM|mem[101][2]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[101][2]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X49_Y12_N1 +dffeas \RAM|mem[101][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[101][2]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[101][1]~26_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[101][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[101][2] .is_wysiwyg = "true"; +defparam \RAM|mem[101][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X42_Y7_N38 +dffeas \RAM|mem[103][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[103][1]~28_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[103][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[103][2] .is_wysiwyg = "true"; +defparam \RAM|mem[103][2] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y7_N36 +cyclonev_lcell_comb \rd[2]~207 ( +// Equation(s): +// \rd[2]~207_combout = ( \RAM|mem[103][2]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & ((\RAM|mem[102][2]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[100][2]~q )) ) ) ) # ( !\RAM|mem[103][2]~q & ( \ALU|Mux31~3_combout & ( +// (!\ALU|Mux30~1_combout & ((\RAM|mem[102][2]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[100][2]~q )) ) ) ) # ( \RAM|mem[103][2]~q & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout ) # (\RAM|mem[101][2]~q ) ) ) ) # ( !\RAM|mem[103][2]~q & ( +// !\ALU|Mux31~3_combout & ( (\ALU|Mux30~1_combout & \RAM|mem[101][2]~q ) ) ) ) + + .dataa(!\ALU|Mux30~1_combout ), + .datab(!\RAM|mem[100][2]~q ), + .datac(!\RAM|mem[102][2]~q ), + .datad(!\RAM|mem[101][2]~q ), + .datae(!\RAM|mem[103][2]~q ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[2]~207_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[2]~207 .extended_lut = "off"; +defparam \rd[2]~207 .lut_mask = 64'h0055AAFF1B1B1B1B; +defparam \rd[2]~207 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X48_Y9_N2 +dffeas \RAM|mem[108][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[108][3]~51_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[108][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[108][2] .is_wysiwyg = "true"; +defparam \RAM|mem[108][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X48_Y9_N55 +dffeas \RAM|mem[110][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[110][0]~59_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[110][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[110][2] .is_wysiwyg = "true"; +defparam \RAM|mem[110][2] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X53_Y7_N54 +cyclonev_lcell_comb \RAM|mem[109][2]~feeder ( +// Equation(s): +// \RAM|mem[109][2]~feeder_combout = ( \RAM|mem~258_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~258_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[109][2]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[109][2]~feeder .extended_lut = "off"; +defparam \RAM|mem[109][2]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[109][2]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X53_Y7_N55 +dffeas \RAM|mem[109][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[109][2]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[109][1]~55_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[109][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[109][2] .is_wysiwyg = "true"; +defparam \RAM|mem[109][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X48_Y9_N32 +dffeas \RAM|mem[111][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[111][2]~63_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[111][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[111][2] .is_wysiwyg = "true"; +defparam \RAM|mem[111][2] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X48_Y9_N30 +cyclonev_lcell_comb \rd[2]~209 ( +// Equation(s): +// \rd[2]~209_combout = ( \RAM|mem[111][2]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & ((\RAM|mem[110][2]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[108][2]~q )) ) ) ) # ( !\RAM|mem[111][2]~q & ( \ALU|Mux31~3_combout & ( +// (!\ALU|Mux30~1_combout & ((\RAM|mem[110][2]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[108][2]~q )) ) ) ) # ( \RAM|mem[111][2]~q & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout ) # (\RAM|mem[109][2]~q ) ) ) ) # ( !\RAM|mem[111][2]~q & ( +// !\ALU|Mux31~3_combout & ( (\RAM|mem[109][2]~q & \ALU|Mux30~1_combout ) ) ) ) + + .dataa(!\RAM|mem[108][2]~q ), + .datab(!\RAM|mem[110][2]~q ), + .datac(!\RAM|mem[109][2]~q ), + .datad(!\ALU|Mux30~1_combout ), + .datae(!\RAM|mem[111][2]~q ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[2]~209_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[2]~209 .extended_lut = "off"; +defparam \rd[2]~209 .lut_mask = 64'h000FFF0F33553355; +defparam \rd[2]~209 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X40_Y12_N54 +cyclonev_lcell_comb \rd[2]~210 ( +// Equation(s): +// \rd[2]~210_combout = ( \rd[2]~207_combout & ( \rd[2]~209_combout & ( (!\ALU|Mux29~3_combout ) # ((!\ALU|Mux28~1_combout & (\rd[2]~208_combout )) # (\ALU|Mux28~1_combout & ((\rd[2]~206_combout )))) ) ) ) # ( !\rd[2]~207_combout & ( \rd[2]~209_combout +// & ( (!\ALU|Mux29~3_combout & (!\ALU|Mux28~1_combout )) # (\ALU|Mux29~3_combout & ((!\ALU|Mux28~1_combout & (\rd[2]~208_combout )) # (\ALU|Mux28~1_combout & ((\rd[2]~206_combout ))))) ) ) ) # ( \rd[2]~207_combout & ( !\rd[2]~209_combout & ( +// (!\ALU|Mux29~3_combout & (\ALU|Mux28~1_combout )) # (\ALU|Mux29~3_combout & ((!\ALU|Mux28~1_combout & (\rd[2]~208_combout )) # (\ALU|Mux28~1_combout & ((\rd[2]~206_combout ))))) ) ) ) # ( !\rd[2]~207_combout & ( !\rd[2]~209_combout & ( +// (\ALU|Mux29~3_combout & ((!\ALU|Mux28~1_combout & (\rd[2]~208_combout )) # (\ALU|Mux28~1_combout & ((\rd[2]~206_combout ))))) ) ) ) + + .dataa(!\ALU|Mux29~3_combout ), + .datab(!\ALU|Mux28~1_combout ), + .datac(!\rd[2]~208_combout ), + .datad(!\rd[2]~206_combout ), + .datae(!\rd[2]~207_combout ), + .dataf(!\rd[2]~209_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[2]~210_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[2]~210 .extended_lut = "off"; +defparam \rd[2]~210 .lut_mask = 64'h041526378C9DAEBF; +defparam \rd[2]~210 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X51_Y9_N1 +dffeas \RAM|mem[65][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[65][3]~2_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[65][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[65][2] .is_wysiwyg = "true"; +defparam \RAM|mem[65][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X55_Y11_N56 +dffeas \RAM|mem[77][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[77][3]~53_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[77][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[77][2] .is_wysiwyg = "true"; +defparam \RAM|mem[77][2] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X51_Y13_N36 +cyclonev_lcell_comb \RAM|mem[73][2]~feeder ( +// Equation(s): +// \RAM|mem[73][2]~feeder_combout = ( \RAM|mem~258_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~258_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[73][2]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[73][2]~feeder .extended_lut = "off"; +defparam \RAM|mem[73][2]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[73][2]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X51_Y13_N37 +dffeas \RAM|mem[73][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[73][2]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[73][1]~34_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[73][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[73][2] .is_wysiwyg = "true"; +defparam \RAM|mem[73][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X55_Y8_N56 +dffeas \RAM|mem[69][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[69][1]~18_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[69][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[69][2] .is_wysiwyg = "true"; +defparam \RAM|mem[69][2] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X55_Y8_N54 +cyclonev_lcell_comb \rd[2]~197 ( +// Equation(s): +// \rd[2]~197_combout = ( \RAM|mem[69][2]~q & ( \ALU|Mux29~3_combout & ( (!\ALU|Mux28~1_combout & ((\RAM|mem[73][2]~q ))) # (\ALU|Mux28~1_combout & (\RAM|mem[65][2]~q )) ) ) ) # ( !\RAM|mem[69][2]~q & ( \ALU|Mux29~3_combout & ( (!\ALU|Mux28~1_combout +// & ((\RAM|mem[73][2]~q ))) # (\ALU|Mux28~1_combout & (\RAM|mem[65][2]~q )) ) ) ) # ( \RAM|mem[69][2]~q & ( !\ALU|Mux29~3_combout & ( (\ALU|Mux28~1_combout ) # (\RAM|mem[77][2]~q ) ) ) ) # ( !\RAM|mem[69][2]~q & ( !\ALU|Mux29~3_combout & ( +// (\RAM|mem[77][2]~q & !\ALU|Mux28~1_combout ) ) ) ) + + .dataa(!\RAM|mem[65][2]~q ), + .datab(!\RAM|mem[77][2]~q ), + .datac(!\ALU|Mux28~1_combout ), + .datad(!\RAM|mem[73][2]~q ), + .datae(!\RAM|mem[69][2]~q ), + .dataf(!\ALU|Mux29~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[2]~197_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[2]~197 .extended_lut = "off"; +defparam \rd[2]~197 .lut_mask = 64'h30303F3F05F505F5; +defparam \rd[2]~197 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X55_Y7_N39 +cyclonev_lcell_comb \RAM|mem[79][2]~feeder ( +// Equation(s): +// \RAM|mem[79][2]~feeder_combout = ( \RAM|mem~258_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~258_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[79][2]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[79][2]~feeder .extended_lut = "off"; +defparam \RAM|mem[79][2]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[79][2]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X55_Y7_N40 +dffeas \RAM|mem[79][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[79][2]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[79][0]~61_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[79][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[79][2] .is_wysiwyg = "true"; +defparam \RAM|mem[79][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X45_Y10_N58 +dffeas \RAM|mem[75][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[75][2]~36_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[75][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[75][2] .is_wysiwyg = "true"; +defparam \RAM|mem[75][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X51_Y9_N29 +dffeas \RAM|mem[67][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[67][3]~4_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[67][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[67][2] .is_wysiwyg = "true"; +defparam \RAM|mem[67][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X42_Y7_N49 +dffeas \RAM|mem[71][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[71][3]~20_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[71][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[71][2] .is_wysiwyg = "true"; +defparam \RAM|mem[71][2] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X55_Y8_N0 +cyclonev_lcell_comb \rd[2]~199 ( +// Equation(s): +// \rd[2]~199_combout = ( \ALU|Mux28~1_combout & ( \ALU|Mux29~3_combout & ( \RAM|mem[67][2]~q ) ) ) # ( !\ALU|Mux28~1_combout & ( \ALU|Mux29~3_combout & ( \RAM|mem[75][2]~q ) ) ) # ( \ALU|Mux28~1_combout & ( !\ALU|Mux29~3_combout & ( +// \RAM|mem[71][2]~q ) ) ) # ( !\ALU|Mux28~1_combout & ( !\ALU|Mux29~3_combout & ( \RAM|mem[79][2]~q ) ) ) + + .dataa(!\RAM|mem[79][2]~q ), + .datab(!\RAM|mem[75][2]~q ), + .datac(!\RAM|mem[67][2]~q ), + .datad(!\RAM|mem[71][2]~q ), + .datae(!\ALU|Mux28~1_combout ), + .dataf(!\ALU|Mux29~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[2]~199_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[2]~199 .extended_lut = "off"; +defparam \rd[2]~199 .lut_mask = 64'h555500FF33330F0F; +defparam \rd[2]~199 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X55_Y10_N13 +dffeas \RAM|mem[76][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[76][2]~49_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[76][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[76][2] .is_wysiwyg = "true"; +defparam \RAM|mem[76][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X55_Y9_N43 +dffeas \RAM|mem[64][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[64][1]~1_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[64][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[64][2] .is_wysiwyg = "true"; +defparam \RAM|mem[64][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X54_Y9_N25 +dffeas \RAM|mem[72][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[72][3]~33_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[72][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[72][2] .is_wysiwyg = "true"; +defparam \RAM|mem[72][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X55_Y8_N20 +dffeas \RAM|mem[68][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[68][0]~17_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[68][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[68][2] .is_wysiwyg = "true"; +defparam \RAM|mem[68][2] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X55_Y8_N18 +cyclonev_lcell_comb \rd[2]~196 ( +// Equation(s): +// \rd[2]~196_combout = ( \RAM|mem[68][2]~q & ( \ALU|Mux29~3_combout & ( (!\ALU|Mux28~1_combout & ((\RAM|mem[72][2]~q ))) # (\ALU|Mux28~1_combout & (\RAM|mem[64][2]~q )) ) ) ) # ( !\RAM|mem[68][2]~q & ( \ALU|Mux29~3_combout & ( (!\ALU|Mux28~1_combout +// & ((\RAM|mem[72][2]~q ))) # (\ALU|Mux28~1_combout & (\RAM|mem[64][2]~q )) ) ) ) # ( \RAM|mem[68][2]~q & ( !\ALU|Mux29~3_combout & ( (\ALU|Mux28~1_combout ) # (\RAM|mem[76][2]~q ) ) ) ) # ( !\RAM|mem[68][2]~q & ( !\ALU|Mux29~3_combout & ( +// (\RAM|mem[76][2]~q & !\ALU|Mux28~1_combout ) ) ) ) + + .dataa(!\RAM|mem[76][2]~q ), + .datab(!\RAM|mem[64][2]~q ), + .datac(!\ALU|Mux28~1_combout ), + .datad(!\RAM|mem[72][2]~q ), + .datae(!\RAM|mem[68][2]~q ), + .dataf(!\ALU|Mux29~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[2]~196_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[2]~196 .extended_lut = "off"; +defparam \rd[2]~196 .lut_mask = 64'h50505F5F03F303F3; +defparam \rd[2]~196 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X54_Y8_N29 +dffeas \RAM|mem[66][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[66][2]~3_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[66][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[66][2] .is_wysiwyg = "true"; +defparam \RAM|mem[66][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X51_Y7_N1 +dffeas \RAM|mem[70][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[70][4]~19_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[70][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[70][2] .is_wysiwyg = "true"; +defparam \RAM|mem[70][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X50_Y8_N52 +dffeas \RAM|mem[74][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[74][1]~35_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[74][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[74][2] .is_wysiwyg = "true"; +defparam \RAM|mem[74][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X54_Y8_N47 +dffeas \RAM|mem[78][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~258_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[78][0]~57_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[78][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[78][2] .is_wysiwyg = "true"; +defparam \RAM|mem[78][2] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X54_Y8_N45 +cyclonev_lcell_comb \rd[2]~198 ( +// Equation(s): +// \rd[2]~198_combout = ( \RAM|mem[78][2]~q & ( \ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout & ((\RAM|mem[70][2]~q ))) # (\ALU|Mux29~3_combout & (\RAM|mem[66][2]~q )) ) ) ) # ( !\RAM|mem[78][2]~q & ( \ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout +// & ((\RAM|mem[70][2]~q ))) # (\ALU|Mux29~3_combout & (\RAM|mem[66][2]~q )) ) ) ) # ( \RAM|mem[78][2]~q & ( !\ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout ) # (\RAM|mem[74][2]~q ) ) ) ) # ( !\RAM|mem[78][2]~q & ( !\ALU|Mux28~1_combout & ( +// (\ALU|Mux29~3_combout & \RAM|mem[74][2]~q ) ) ) ) + + .dataa(!\RAM|mem[66][2]~q ), + .datab(!\RAM|mem[70][2]~q ), + .datac(!\ALU|Mux29~3_combout ), + .datad(!\RAM|mem[74][2]~q ), + .datae(!\RAM|mem[78][2]~q ), + .dataf(!\ALU|Mux28~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[2]~198_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[2]~198 .extended_lut = "off"; +defparam \rd[2]~198 .lut_mask = 64'h000FF0FF35353535; +defparam \rd[2]~198 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X54_Y8_N54 +cyclonev_lcell_comb \rd[2]~200 ( +// Equation(s): +// \rd[2]~200_combout = ( \rd[2]~198_combout & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout ) # (\rd[2]~196_combout ) ) ) ) # ( !\rd[2]~198_combout & ( \ALU|Mux31~3_combout & ( (\ALU|Mux30~1_combout & \rd[2]~196_combout ) ) ) ) # ( +// \rd[2]~198_combout & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & ((\rd[2]~199_combout ))) # (\ALU|Mux30~1_combout & (\rd[2]~197_combout )) ) ) ) # ( !\rd[2]~198_combout & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & +// ((\rd[2]~199_combout ))) # (\ALU|Mux30~1_combout & (\rd[2]~197_combout )) ) ) ) + + .dataa(!\ALU|Mux30~1_combout ), + .datab(!\rd[2]~197_combout ), + .datac(!\rd[2]~199_combout ), + .datad(!\rd[2]~196_combout ), + .datae(!\rd[2]~198_combout ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[2]~200_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[2]~200 .extended_lut = "off"; +defparam \rd[2]~200 .lut_mask = 64'h1B1B1B1B0055AAFF; +defparam \rd[2]~200 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X40_Y12_N12 +cyclonev_lcell_comb \rd[2]~216 ( +// Equation(s): +// \rd[2]~216_combout = ( \rd[2]~210_combout & ( \rd[2]~200_combout & ( ((!\ALU|Mux26~1_combout & (\rd[2]~215_combout )) # (\ALU|Mux26~1_combout & ((\rd[2]~205_combout )))) # (\ALU|Mux27~1_combout ) ) ) ) # ( !\rd[2]~210_combout & ( \rd[2]~200_combout +// & ( (!\ALU|Mux26~1_combout & (!\ALU|Mux27~1_combout & (\rd[2]~215_combout ))) # (\ALU|Mux26~1_combout & (((\rd[2]~205_combout )) # (\ALU|Mux27~1_combout ))) ) ) ) # ( \rd[2]~210_combout & ( !\rd[2]~200_combout & ( (!\ALU|Mux26~1_combout & +// (((\rd[2]~215_combout )) # (\ALU|Mux27~1_combout ))) # (\ALU|Mux26~1_combout & (!\ALU|Mux27~1_combout & ((\rd[2]~205_combout )))) ) ) ) # ( !\rd[2]~210_combout & ( !\rd[2]~200_combout & ( (!\ALU|Mux27~1_combout & ((!\ALU|Mux26~1_combout & +// (\rd[2]~215_combout )) # (\ALU|Mux26~1_combout & ((\rd[2]~205_combout ))))) ) ) ) + + .dataa(!\ALU|Mux26~1_combout ), + .datab(!\ALU|Mux27~1_combout ), + .datac(!\rd[2]~215_combout ), + .datad(!\rd[2]~205_combout ), + .datae(!\rd[2]~210_combout ), + .dataf(!\rd[2]~200_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[2]~216_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[2]~216 .extended_lut = "off"; +defparam \rd[2]~216 .lut_mask = 64'h084C2A6E195D3B7F; +defparam \rd[2]~216 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X40_Y12_N24 +cyclonev_lcell_comb \rd[2]~260 ( +// Equation(s): +// \rd[2]~260_combout = ( \rd[2]~195_combout & ( \rd[2]~216_combout & ( ((\CONTROL_UNIT|M2R[0]~0_combout & !\ALU|Mux25~1_combout )) # (\rd[2]~259_combout ) ) ) ) # ( !\rd[2]~195_combout & ( \rd[2]~216_combout & ( ((\ALU|Mux24~1_combout & +// (\CONTROL_UNIT|M2R[0]~0_combout & !\ALU|Mux25~1_combout ))) # (\rd[2]~259_combout ) ) ) ) # ( \rd[2]~195_combout & ( !\rd[2]~216_combout & ( ((!\ALU|Mux24~1_combout & (\CONTROL_UNIT|M2R[0]~0_combout & !\ALU|Mux25~1_combout ))) # (\rd[2]~259_combout ) +// ) ) ) # ( !\rd[2]~195_combout & ( !\rd[2]~216_combout & ( \rd[2]~259_combout ) ) ) + + .dataa(!\ALU|Mux24~1_combout ), + .datab(!\CONTROL_UNIT|M2R[0]~0_combout ), + .datac(!\rd[2]~259_combout ), + .datad(!\ALU|Mux25~1_combout ), + .datae(!\rd[2]~195_combout ), + .dataf(!\rd[2]~216_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[2]~260_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[2]~260 .extended_lut = "off"; +defparam \rd[2]~260 .lut_mask = 64'h0F0F2F0F1F0F3F0F; +defparam \rd[2]~260 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X40_Y11_N59 +dffeas \REGS|regs[25][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[2]~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~13_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[25][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[25][2] .is_wysiwyg = "true"; +defparam \REGS|regs[25][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X38_Y9_N19 +dffeas \REGS|regs[24][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[2]~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~4_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[24][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[24][2] .is_wysiwyg = "true"; +defparam \REGS|regs[24][2] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y14_N24 +cyclonev_lcell_comb \REGS|regs[16][2]~feeder ( +// Equation(s): +// \REGS|regs[16][2]~feeder_combout = ( \rd[2]~260_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[2]~260_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[16][2]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[16][2]~feeder .extended_lut = "off"; +defparam \REGS|regs[16][2]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[16][2]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X37_Y14_N25 +dffeas \REGS|regs[16][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[16][2]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~2_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[16][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[16][2] .is_wysiwyg = "true"; +defparam \REGS|regs[16][2] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X40_Y11_N39 +cyclonev_lcell_comb \REGS|Mux61~6 ( +// Equation(s): +// \REGS|Mux61~6_combout = ( \REGS|regs[16][2]~q & ( \ROM|mem~10_combout & ( (!\ROM|mem~0_combout ) # (\REGS|regs[24][2]~q ) ) ) ) # ( !\REGS|regs[16][2]~q & ( \ROM|mem~10_combout & ( (\REGS|regs[24][2]~q & \ROM|mem~0_combout ) ) ) ) # ( +// \REGS|regs[16][2]~q & ( !\ROM|mem~10_combout & ( (!\ROM|mem~0_combout ) # (\REGS|regs[25][2]~q ) ) ) ) # ( !\REGS|regs[16][2]~q & ( !\ROM|mem~10_combout & ( (\REGS|regs[25][2]~q & \ROM|mem~0_combout ) ) ) ) + + .dataa(gnd), + .datab(!\REGS|regs[25][2]~q ), + .datac(!\REGS|regs[24][2]~q ), + .datad(!\ROM|mem~0_combout ), + .datae(!\REGS|regs[16][2]~q ), + .dataf(!\ROM|mem~10_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux61~6_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux61~6 .extended_lut = "off"; +defparam \REGS|Mux61~6 .lut_mask = 64'h0033FF33000FFF0F; +defparam \REGS|Mux61~6 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y15_N36 +cyclonev_lcell_comb \REGS|regs[27][2]~feeder ( +// Equation(s): +// \REGS|regs[27][2]~feeder_combout = ( \rd[2]~260_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[2]~260_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[27][2]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[27][2]~feeder .extended_lut = "off"; +defparam \REGS|regs[27][2]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[27][2]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X37_Y15_N38 +dffeas \REGS|regs[27][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[27][2]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~15_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[27][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[27][2] .is_wysiwyg = "true"; +defparam \REGS|regs[27][2] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X40_Y13_N21 +cyclonev_lcell_comb \REGS|regs[19][2]~feeder ( +// Equation(s): +// \REGS|regs[19][2]~feeder_combout = ( \rd[2]~260_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[2]~260_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[19][2]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[19][2]~feeder .extended_lut = "off"; +defparam \REGS|regs[19][2]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[19][2]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X40_Y13_N23 +dffeas \REGS|regs[19][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[19][2]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~14_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[19][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[19][2] .is_wysiwyg = "true"; +defparam \REGS|regs[19][2] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y15_N57 +cyclonev_lcell_comb \REGS|Mux61~1 ( +// Equation(s): +// \REGS|Mux61~1_combout = ( \PC|pc [7] & ( \PC|pc [9] & ( \REGS|regs[19][2]~q ) ) ) # ( !\PC|pc [7] & ( \PC|pc [9] & ( \REGS|regs[19][2]~q ) ) ) # ( \PC|pc [7] & ( !\PC|pc [9] & ( \REGS|regs[19][2]~q ) ) ) # ( !\PC|pc [7] & ( !\PC|pc [9] & ( +// (!\PC|pc[8]~DUPLICATE_q & ((!\PC|pc [6] & (\REGS|regs[27][2]~q )) # (\PC|pc [6] & ((\REGS|regs[19][2]~q ))))) # (\PC|pc[8]~DUPLICATE_q & (((\REGS|regs[19][2]~q )))) ) ) ) + + .dataa(!\REGS|regs[27][2]~q ), + .datab(!\PC|pc[8]~DUPLICATE_q ), + .datac(!\REGS|regs[19][2]~q ), + .datad(!\PC|pc [6]), + .datae(!\PC|pc [7]), + .dataf(!\PC|pc [9]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux61~1_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux61~1 .extended_lut = "off"; +defparam \REGS|Mux61~1 .lut_mask = 64'h470F0F0F0F0F0F0F; +defparam \REGS|Mux61~1 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X40_Y11_N5 +dffeas \REGS|regs[28][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[2]~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~8_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[28][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[28][2] .is_wysiwyg = "true"; +defparam \REGS|regs[28][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X40_Y11_N14 +dffeas \REGS|regs[29][2]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[2]~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~17_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[29][2]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[29][2]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[29][2]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X40_Y6_N36 +cyclonev_lcell_comb \REGS|regs[20][2]~feeder ( +// Equation(s): +// \REGS|regs[20][2]~feeder_combout = ( \rd[2]~260_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[2]~260_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[20][2]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[20][2]~feeder .extended_lut = "off"; +defparam \REGS|regs[20][2]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[20][2]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X40_Y6_N37 +dffeas \REGS|regs[20][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[20][2]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~7_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[20][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[20][2] .is_wysiwyg = "true"; +defparam \REGS|regs[20][2] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X40_Y11_N15 +cyclonev_lcell_comb \REGS|Mux61~2 ( +// Equation(s): +// \REGS|Mux61~2_combout = ( \ROM|mem~0_combout & ( \ROM|mem~10_combout & ( \REGS|regs[28][2]~q ) ) ) # ( !\ROM|mem~0_combout & ( \ROM|mem~10_combout & ( \REGS|regs[20][2]~q ) ) ) # ( \ROM|mem~0_combout & ( !\ROM|mem~10_combout & ( +// \REGS|regs[29][2]~DUPLICATE_q ) ) ) # ( !\ROM|mem~0_combout & ( !\ROM|mem~10_combout & ( \REGS|regs[20][2]~q ) ) ) + + .dataa(!\REGS|regs[28][2]~q ), + .datab(gnd), + .datac(!\REGS|regs[29][2]~DUPLICATE_q ), + .datad(!\REGS|regs[20][2]~q ), + .datae(!\ROM|mem~0_combout ), + .dataf(!\ROM|mem~10_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux61~2_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux61~2 .extended_lut = "off"; +defparam \REGS|Mux61~2 .lut_mask = 64'h00FF0F0F00FF5555; +defparam \REGS|Mux61~2 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X40_Y11_N21 +cyclonev_lcell_comb \REGS|Mux61~5 ( +// Equation(s): +// \REGS|Mux61~5_combout = ( \ROM|mem~12_combout & ( \REGS|Mux61~4_combout & ( (!\ROM|mem~13_combout ) # (\REGS|Mux61~3_combout ) ) ) ) # ( !\ROM|mem~12_combout & ( \REGS|Mux61~4_combout & ( \REGS|Mux61~2_combout ) ) ) # ( \ROM|mem~12_combout & ( +// !\REGS|Mux61~4_combout & ( (\REGS|Mux61~3_combout & \ROM|mem~13_combout ) ) ) ) # ( !\ROM|mem~12_combout & ( !\REGS|Mux61~4_combout & ( \REGS|Mux61~2_combout ) ) ) + + .dataa(gnd), + .datab(!\REGS|Mux61~2_combout ), + .datac(!\REGS|Mux61~3_combout ), + .datad(!\ROM|mem~13_combout ), + .datae(!\ROM|mem~12_combout ), + .dataf(!\REGS|Mux61~4_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux61~5_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux61~5 .extended_lut = "off"; +defparam \REGS|Mux61~5 .lut_mask = 64'h3333000F3333FF0F; +defparam \REGS|Mux61~5 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X40_Y11_N45 +cyclonev_lcell_comb \REGS|Mux61~7 ( +// Equation(s): +// \REGS|Mux61~7_combout = ( \REGS|Mux61~5_combout & ( \REGS|Mux61~0_combout & ( ((!\rt_alu[17]~5_combout & (\REGS|Mux61~6_combout )) # (\rt_alu[17]~5_combout & ((\REGS|Mux61~1_combout )))) # (\rt_alu[17]~4_combout ) ) ) ) # ( !\REGS|Mux61~5_combout & +// ( \REGS|Mux61~0_combout & ( (!\rt_alu[17]~5_combout & (\REGS|Mux61~6_combout & ((!\rt_alu[17]~4_combout )))) # (\rt_alu[17]~5_combout & (((\rt_alu[17]~4_combout ) # (\REGS|Mux61~1_combout )))) ) ) ) # ( \REGS|Mux61~5_combout & ( +// !\REGS|Mux61~0_combout & ( (!\rt_alu[17]~5_combout & (((\rt_alu[17]~4_combout )) # (\REGS|Mux61~6_combout ))) # (\rt_alu[17]~5_combout & (((\REGS|Mux61~1_combout & !\rt_alu[17]~4_combout )))) ) ) ) # ( !\REGS|Mux61~5_combout & ( +// !\REGS|Mux61~0_combout & ( (!\rt_alu[17]~4_combout & ((!\rt_alu[17]~5_combout & (\REGS|Mux61~6_combout )) # (\rt_alu[17]~5_combout & ((\REGS|Mux61~1_combout ))))) ) ) ) + + .dataa(!\rt_alu[17]~5_combout ), + .datab(!\REGS|Mux61~6_combout ), + .datac(!\REGS|Mux61~1_combout ), + .datad(!\rt_alu[17]~4_combout ), + .datae(!\REGS|Mux61~5_combout ), + .dataf(!\REGS|Mux61~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux61~7_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux61~7 .extended_lut = "off"; +defparam \REGS|Mux61~7 .lut_mask = 64'h270027AA275527FF; +defparam \REGS|Mux61~7 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y11_N48 +cyclonev_lcell_comb \rt_alu[2]~59 ( +// Equation(s): +// \rt_alu[2]~59_combout = ( \REGS|Mux61~7_combout & ( \REGS|Mux61~14_combout & ( (!\ROM|mem~25_combout & (\ROM|mem~9_combout & (!\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout ))) # (\ROM|mem~25_combout & (((\ROM|mem~9_combout & +// !\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout )) # (\rt_alu[5]~32_combout ))) ) ) ) # ( !\REGS|Mux61~7_combout & ( \REGS|Mux61~14_combout & ( (\ROM|mem~25_combout & \rt_alu[5]~32_combout ) ) ) ) # ( \REGS|Mux61~7_combout & ( !\REGS|Mux61~14_combout & ( +// (!\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout ) # ((\ROM|mem~25_combout & \rt_alu[5]~32_combout )) ) ) ) # ( !\REGS|Mux61~7_combout & ( !\REGS|Mux61~14_combout & ( (!\ROM|mem~25_combout & (!\ROM|mem~9_combout & +// (!\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout ))) # (\ROM|mem~25_combout & (((!\ROM|mem~9_combout & !\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout )) # (\rt_alu[5]~32_combout ))) ) ) ) + + .dataa(!\ROM|mem~25_combout ), + .datab(!\ROM|mem~9_combout ), + .datac(!\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout ), + .datad(!\rt_alu[5]~32_combout ), + .datae(!\REGS|Mux61~7_combout ), + .dataf(!\REGS|Mux61~14_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[2]~59_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[2]~59 .extended_lut = "off"; +defparam \rt_alu[2]~59 .lut_mask = 64'hC0D5F0F500553075; +defparam \rt_alu[2]~59 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X43_Y11_N27 +cyclonev_lcell_comb \ALU|Mux28~1 ( +// Equation(s): +// \ALU|Mux28~1_combout = ( \ALU|adder_unit|OUT_1 [3] & ( (\ALU|Mux29~0_combout & !\ALU|Mux28~0_combout ) ) ) # ( !\ALU|adder_unit|OUT_1 [3] & ( !\ALU|Mux28~0_combout ) ) + + .dataa(!\ALU|Mux29~0_combout ), + .datab(gnd), + .datac(gnd), + .datad(!\ALU|Mux28~0_combout ), + .datae(gnd), + .dataf(!\ALU|adder_unit|OUT_1 [3]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\ALU|Mux28~1_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \ALU|Mux28~1 .extended_lut = "off"; +defparam \ALU|Mux28~1 .lut_mask = 64'hFF00FF0055005500; +defparam \ALU|Mux28~1 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X45_Y6_N12 +cyclonev_lcell_comb \RAM|mem~259 ( +// Equation(s): +// \RAM|mem~259_combout = ( \ROM|mem~9_combout & ( \REGS|Mux60~14_combout & ( (\REGS|Mux60~9_combout & !\rst[0]~input_o ) ) ) ) # ( \ROM|mem~9_combout & ( !\REGS|Mux60~14_combout & ( (\REGS|Mux60~9_combout & !\rst[0]~input_o ) ) ) ) # ( +// !\ROM|mem~9_combout & ( !\REGS|Mux60~14_combout & ( !\rst[0]~input_o ) ) ) + + .dataa(gnd), + .datab(gnd), + .datac(!\REGS|Mux60~9_combout ), + .datad(!\rst[0]~input_o ), + .datae(!\ROM|mem~9_combout ), + .dataf(!\REGS|Mux60~14_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem~259_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem~259 .extended_lut = "off"; +defparam \RAM|mem~259 .lut_mask = 64'hFF000F0000000F00; +defparam \RAM|mem~259 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X43_Y12_N46 +dffeas \RAM|mem[211][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[211][1]~245_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[211][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[211][3] .is_wysiwyg = "true"; +defparam \RAM|mem[211][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X49_Y13_N13 +dffeas \RAM|mem[195][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[195][0]~241_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[195][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[195][3] .is_wysiwyg = "true"; +defparam \RAM|mem[195][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X43_Y5_N52 +dffeas \RAM|mem[227][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[227][3]~249_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[227][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[227][3] .is_wysiwyg = "true"; +defparam \RAM|mem[227][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X47_Y8_N8 +dffeas \RAM|mem[243][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[243][2]~253_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[243][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[243][3] .is_wysiwyg = "true"; +defparam \RAM|mem[243][3] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X47_Y8_N6 +cyclonev_lcell_comb \rd[3]~340 ( +// Equation(s): +// \rd[3]~340_combout = ( \RAM|mem[243][3]~q & ( \ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout & ((\RAM|mem[227][3]~q ))) # (\ALU|Mux26~1_combout & (\RAM|mem[195][3]~q )) ) ) ) # ( !\RAM|mem[243][3]~q & ( \ALU|Mux27~1_combout & ( +// (!\ALU|Mux26~1_combout & ((\RAM|mem[227][3]~q ))) # (\ALU|Mux26~1_combout & (\RAM|mem[195][3]~q )) ) ) ) # ( \RAM|mem[243][3]~q & ( !\ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout ) # (\RAM|mem[211][3]~q ) ) ) ) # ( !\RAM|mem[243][3]~q & ( +// !\ALU|Mux27~1_combout & ( (\RAM|mem[211][3]~q & \ALU|Mux26~1_combout ) ) ) ) + + .dataa(!\RAM|mem[211][3]~q ), + .datab(!\RAM|mem[195][3]~q ), + .datac(!\RAM|mem[227][3]~q ), + .datad(!\ALU|Mux26~1_combout ), + .datae(!\RAM|mem[243][3]~q ), + .dataf(!\ALU|Mux27~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[3]~340_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[3]~340 .extended_lut = "off"; +defparam \rd[3]~340 .lut_mask = 64'h0055FF550F330F33; +defparam \rd[3]~340 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X43_Y8_N47 +dffeas \RAM|mem[215][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[215][1]~246_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[215][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[215][3] .is_wysiwyg = "true"; +defparam \RAM|mem[215][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X43_Y9_N16 +dffeas \RAM|mem[231][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[231][2]~250_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[231][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[231][3] .is_wysiwyg = "true"; +defparam \RAM|mem[231][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X43_Y8_N56 +dffeas \RAM|mem[247][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[247][4]~254_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[247][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[247][3] .is_wysiwyg = "true"; +defparam \RAM|mem[247][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X43_Y8_N53 +dffeas \RAM|mem[199][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[199][3]~242_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[199][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[199][3] .is_wysiwyg = "true"; +defparam \RAM|mem[199][3] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X43_Y8_N54 +cyclonev_lcell_comb \rd[3]~341 ( +// Equation(s): +// \rd[3]~341_combout = ( \RAM|mem[247][3]~q & ( \RAM|mem[199][3]~q & ( (!\ALU|Mux27~1_combout & (((!\ALU|Mux26~1_combout )) # (\RAM|mem[215][3]~q ))) # (\ALU|Mux27~1_combout & (((\ALU|Mux26~1_combout ) # (\RAM|mem[231][3]~q )))) ) ) ) # ( +// !\RAM|mem[247][3]~q & ( \RAM|mem[199][3]~q & ( (!\ALU|Mux27~1_combout & (\RAM|mem[215][3]~q & ((\ALU|Mux26~1_combout )))) # (\ALU|Mux27~1_combout & (((\ALU|Mux26~1_combout ) # (\RAM|mem[231][3]~q )))) ) ) ) # ( \RAM|mem[247][3]~q & ( +// !\RAM|mem[199][3]~q & ( (!\ALU|Mux27~1_combout & (((!\ALU|Mux26~1_combout )) # (\RAM|mem[215][3]~q ))) # (\ALU|Mux27~1_combout & (((\RAM|mem[231][3]~q & !\ALU|Mux26~1_combout )))) ) ) ) # ( !\RAM|mem[247][3]~q & ( !\RAM|mem[199][3]~q & ( +// (!\ALU|Mux27~1_combout & (\RAM|mem[215][3]~q & ((\ALU|Mux26~1_combout )))) # (\ALU|Mux27~1_combout & (((\RAM|mem[231][3]~q & !\ALU|Mux26~1_combout )))) ) ) ) + + .dataa(!\RAM|mem[215][3]~q ), + .datab(!\RAM|mem[231][3]~q ), + .datac(!\ALU|Mux27~1_combout ), + .datad(!\ALU|Mux26~1_combout ), + .datae(!\RAM|mem[247][3]~q ), + .dataf(!\RAM|mem[199][3]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[3]~341_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[3]~341 .extended_lut = "off"; +defparam \rd[3]~341 .lut_mask = 64'h0350F350035FF35F; +defparam \rd[3]~341 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X54_Y10_N19 +dffeas \RAM|mem[223][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[223][2]~248_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[223][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[223][3] .is_wysiwyg = "true"; +defparam \RAM|mem[223][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X54_Y10_N40 +dffeas \RAM|mem[255][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[255][3]~256_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[255][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[255][3] .is_wysiwyg = "true"; +defparam \RAM|mem[255][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X49_Y13_N28 +dffeas \RAM|mem[207][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[207][0]~244_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[207][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[207][3] .is_wysiwyg = "true"; +defparam \RAM|mem[207][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X48_Y10_N50 +dffeas \RAM|mem[239][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[239][1]~252_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[239][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[239][3] .is_wysiwyg = "true"; +defparam \RAM|mem[239][3] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X48_Y10_N48 +cyclonev_lcell_comb \rd[3]~343 ( +// Equation(s): +// \rd[3]~343_combout = ( \RAM|mem[239][3]~q & ( \ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout ) # (\RAM|mem[207][3]~q ) ) ) ) # ( !\RAM|mem[239][3]~q & ( \ALU|Mux27~1_combout & ( (\RAM|mem[207][3]~q & \ALU|Mux26~1_combout ) ) ) ) # ( +// \RAM|mem[239][3]~q & ( !\ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout & ((\RAM|mem[255][3]~q ))) # (\ALU|Mux26~1_combout & (\RAM|mem[223][3]~q )) ) ) ) # ( !\RAM|mem[239][3]~q & ( !\ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout & +// ((\RAM|mem[255][3]~q ))) # (\ALU|Mux26~1_combout & (\RAM|mem[223][3]~q )) ) ) ) + + .dataa(!\RAM|mem[223][3]~q ), + .datab(!\RAM|mem[255][3]~q ), + .datac(!\RAM|mem[207][3]~q ), + .datad(!\ALU|Mux26~1_combout ), + .datae(!\RAM|mem[239][3]~q ), + .dataf(!\ALU|Mux27~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[3]~343_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[3]~343 .extended_lut = "off"; +defparam \rd[3]~343 .lut_mask = 64'h33553355000FFF0F; +defparam \rd[3]~343 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X48_Y10_N56 +dffeas \RAM|mem[219][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[219][0]~247_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[219][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[219][3] .is_wysiwyg = "true"; +defparam \RAM|mem[219][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X45_Y9_N10 +dffeas \RAM|mem[235][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[235][2]~251_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[235][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[235][3] .is_wysiwyg = "true"; +defparam \RAM|mem[235][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X48_Y13_N55 +dffeas \RAM|mem[203][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[203][4]~243_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[203][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[203][3] .is_wysiwyg = "true"; +defparam \RAM|mem[203][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X48_Y10_N26 +dffeas \RAM|mem[251][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[251][2]~255_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[251][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[251][3] .is_wysiwyg = "true"; +defparam \RAM|mem[251][3] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X48_Y10_N24 +cyclonev_lcell_comb \rd[3]~342 ( +// Equation(s): +// \rd[3]~342_combout = ( \RAM|mem[251][3]~q & ( \ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout & (\RAM|mem[235][3]~q )) # (\ALU|Mux26~1_combout & ((\RAM|mem[203][3]~q ))) ) ) ) # ( !\RAM|mem[251][3]~q & ( \ALU|Mux27~1_combout & ( +// (!\ALU|Mux26~1_combout & (\RAM|mem[235][3]~q )) # (\ALU|Mux26~1_combout & ((\RAM|mem[203][3]~q ))) ) ) ) # ( \RAM|mem[251][3]~q & ( !\ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout ) # (\RAM|mem[219][3]~q ) ) ) ) # ( !\RAM|mem[251][3]~q & ( +// !\ALU|Mux27~1_combout & ( (\RAM|mem[219][3]~q & \ALU|Mux26~1_combout ) ) ) ) + + .dataa(!\RAM|mem[219][3]~q ), + .datab(!\RAM|mem[235][3]~q ), + .datac(!\RAM|mem[203][3]~q ), + .datad(!\ALU|Mux26~1_combout ), + .datae(!\RAM|mem[251][3]~q ), + .dataf(!\ALU|Mux27~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[3]~342_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[3]~342 .extended_lut = "off"; +defparam \rd[3]~342 .lut_mask = 64'h0055FF55330F330F; +defparam \rd[3]~342 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X43_Y7_N57 +cyclonev_lcell_comb \rd[3]~344 ( +// Equation(s): +// \rd[3]~344_combout = ( \rd[3]~343_combout & ( \rd[3]~342_combout & ( (!\ALU|Mux28~1_combout ) # ((!\ALU|Mux29~3_combout & ((\rd[3]~341_combout ))) # (\ALU|Mux29~3_combout & (\rd[3]~340_combout ))) ) ) ) # ( !\rd[3]~343_combout & ( \rd[3]~342_combout +// & ( (!\ALU|Mux29~3_combout & (((\rd[3]~341_combout & \ALU|Mux28~1_combout )))) # (\ALU|Mux29~3_combout & (((!\ALU|Mux28~1_combout )) # (\rd[3]~340_combout ))) ) ) ) # ( \rd[3]~343_combout & ( !\rd[3]~342_combout & ( (!\ALU|Mux29~3_combout & +// (((!\ALU|Mux28~1_combout ) # (\rd[3]~341_combout )))) # (\ALU|Mux29~3_combout & (\rd[3]~340_combout & ((\ALU|Mux28~1_combout )))) ) ) ) # ( !\rd[3]~343_combout & ( !\rd[3]~342_combout & ( (\ALU|Mux28~1_combout & ((!\ALU|Mux29~3_combout & +// ((\rd[3]~341_combout ))) # (\ALU|Mux29~3_combout & (\rd[3]~340_combout )))) ) ) ) + + .dataa(!\rd[3]~340_combout ), + .datab(!\ALU|Mux29~3_combout ), + .datac(!\rd[3]~341_combout ), + .datad(!\ALU|Mux28~1_combout ), + .datae(!\rd[3]~343_combout ), + .dataf(!\rd[3]~342_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[3]~344_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[3]~344 .extended_lut = "off"; +defparam \rd[3]~344 .lut_mask = 64'h001DCC1D331DFF1D; +defparam \rd[3]~344 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X49_Y8_N25 +dffeas \RAM|mem[250][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[250][4]~236_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[250][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[250][3] .is_wysiwyg = "true"; +defparam \RAM|mem[250][3] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X53_Y10_N18 +cyclonev_lcell_comb \RAM|mem[218][3]~feeder ( +// Equation(s): +// \RAM|mem[218][3]~feeder_combout = ( \RAM|mem~259_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~259_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[218][3]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[218][3]~feeder .extended_lut = "off"; +defparam \RAM|mem[218][3]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[218][3]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X53_Y10_N20 +dffeas \RAM|mem[218][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[218][3]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[218][2]~234_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[218][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[218][3] .is_wysiwyg = "true"; +defparam \RAM|mem[218][3] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X53_Y10_N54 +cyclonev_lcell_comb \RAM|mem[202][3]~feeder ( +// Equation(s): +// \RAM|mem[202][3]~feeder_combout = ( \RAM|mem~259_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~259_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[202][3]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[202][3]~feeder .extended_lut = "off"; +defparam \RAM|mem[202][3]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[202][3]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X53_Y10_N56 +dffeas \RAM|mem[202][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[202][3]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[202][4]~233_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[202][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[202][3] .is_wysiwyg = "true"; +defparam \RAM|mem[202][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X45_Y9_N58 +dffeas \RAM|mem[234][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[234][0]~235_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[234][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[234][3] .is_wysiwyg = "true"; +defparam \RAM|mem[234][3] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X47_Y8_N39 +cyclonev_lcell_comb \rd[3]~337 ( +// Equation(s): +// \rd[3]~337_combout = ( \ALU|Mux26~1_combout & ( \ALU|Mux27~1_combout & ( \RAM|mem[202][3]~q ) ) ) # ( !\ALU|Mux26~1_combout & ( \ALU|Mux27~1_combout & ( \RAM|mem[234][3]~q ) ) ) # ( \ALU|Mux26~1_combout & ( !\ALU|Mux27~1_combout & ( +// \RAM|mem[218][3]~q ) ) ) # ( !\ALU|Mux26~1_combout & ( !\ALU|Mux27~1_combout & ( \RAM|mem[250][3]~q ) ) ) + + .dataa(!\RAM|mem[250][3]~q ), + .datab(!\RAM|mem[218][3]~q ), + .datac(!\RAM|mem[202][3]~q ), + .datad(!\RAM|mem[234][3]~q ), + .datae(!\ALU|Mux26~1_combout ), + .dataf(!\ALU|Mux27~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[3]~337_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[3]~337 .extended_lut = "off"; +defparam \rd[3]~337 .lut_mask = 64'h5555333300FF0F0F; +defparam \rd[3]~337 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X54_Y11_N11 +dffeas \RAM|mem[222][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[222][3]~238_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[222][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[222][3] .is_wysiwyg = "true"; +defparam \RAM|mem[222][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X54_Y10_N49 +dffeas \RAM|mem[206][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[206][0]~237_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[206][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[206][3] .is_wysiwyg = "true"; +defparam \RAM|mem[206][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X49_Y13_N52 +dffeas \RAM|mem[238][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[238][1]~239_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[238][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[238][3] .is_wysiwyg = "true"; +defparam \RAM|mem[238][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X47_Y8_N56 +dffeas \RAM|mem[254][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[254][4]~240_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[254][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[254][3] .is_wysiwyg = "true"; +defparam \RAM|mem[254][3] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X47_Y8_N54 +cyclonev_lcell_comb \rd[3]~338 ( +// Equation(s): +// \rd[3]~338_combout = ( \RAM|mem[254][3]~q & ( \ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout & ((\RAM|mem[238][3]~q ))) # (\ALU|Mux26~1_combout & (\RAM|mem[206][3]~q )) ) ) ) # ( !\RAM|mem[254][3]~q & ( \ALU|Mux27~1_combout & ( +// (!\ALU|Mux26~1_combout & ((\RAM|mem[238][3]~q ))) # (\ALU|Mux26~1_combout & (\RAM|mem[206][3]~q )) ) ) ) # ( \RAM|mem[254][3]~q & ( !\ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout ) # (\RAM|mem[222][3]~q ) ) ) ) # ( !\RAM|mem[254][3]~q & ( +// !\ALU|Mux27~1_combout & ( (\RAM|mem[222][3]~q & \ALU|Mux26~1_combout ) ) ) ) + + .dataa(!\RAM|mem[222][3]~q ), + .datab(!\RAM|mem[206][3]~q ), + .datac(!\RAM|mem[238][3]~q ), + .datad(!\ALU|Mux26~1_combout ), + .datae(!\RAM|mem[254][3]~q ), + .dataf(!\ALU|Mux27~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[3]~338_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[3]~338 .extended_lut = "off"; +defparam \rd[3]~338 .lut_mask = 64'h0055FF550F330F33; +defparam \rd[3]~338 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X49_Y9_N27 +cyclonev_lcell_comb \RAM|mem[194][3]~feeder ( +// Equation(s): +// \RAM|mem[194][3]~feeder_combout = ( \RAM|mem~259_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~259_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[194][3]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[194][3]~feeder .extended_lut = "off"; +defparam \RAM|mem[194][3]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[194][3]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X49_Y9_N28 +dffeas \RAM|mem[194][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[194][3]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[194][4]~225_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[194][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[194][3] .is_wysiwyg = "true"; +defparam \RAM|mem[194][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X43_Y12_N22 +dffeas \RAM|mem[210][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[210][3]~226_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[210][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[210][3] .is_wysiwyg = "true"; +defparam \RAM|mem[210][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X43_Y5_N43 +dffeas \RAM|mem[226][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[226][3]~227_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[226][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[226][3] .is_wysiwyg = "true"; +defparam \RAM|mem[226][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X47_Y8_N50 +dffeas \RAM|mem[242][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[242][0]~228_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[242][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[242][3] .is_wysiwyg = "true"; +defparam \RAM|mem[242][3] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X47_Y8_N48 +cyclonev_lcell_comb \rd[3]~335 ( +// Equation(s): +// \rd[3]~335_combout = ( \RAM|mem[242][3]~q & ( \ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout & ((\RAM|mem[226][3]~q ))) # (\ALU|Mux26~1_combout & (\RAM|mem[194][3]~q )) ) ) ) # ( !\RAM|mem[242][3]~q & ( \ALU|Mux27~1_combout & ( +// (!\ALU|Mux26~1_combout & ((\RAM|mem[226][3]~q ))) # (\ALU|Mux26~1_combout & (\RAM|mem[194][3]~q )) ) ) ) # ( \RAM|mem[242][3]~q & ( !\ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout ) # (\RAM|mem[210][3]~q ) ) ) ) # ( !\RAM|mem[242][3]~q & ( +// !\ALU|Mux27~1_combout & ( (\RAM|mem[210][3]~q & \ALU|Mux26~1_combout ) ) ) ) + + .dataa(!\RAM|mem[194][3]~q ), + .datab(!\RAM|mem[210][3]~q ), + .datac(!\RAM|mem[226][3]~q ), + .datad(!\ALU|Mux26~1_combout ), + .datae(!\RAM|mem[242][3]~q ), + .dataf(!\ALU|Mux27~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[3]~335_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[3]~335 .extended_lut = "off"; +defparam \rd[3]~335 .lut_mask = 64'h0033FF330F550F55; +defparam \rd[3]~335 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X48_Y5_N21 +cyclonev_lcell_comb \RAM|mem[230][3]~feeder ( +// Equation(s): +// \RAM|mem[230][3]~feeder_combout = ( \RAM|mem~259_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~259_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[230][3]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[230][3]~feeder .extended_lut = "off"; +defparam \RAM|mem[230][3]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[230][3]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X48_Y5_N22 +dffeas \RAM|mem[230][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[230][3]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[230][1]~231_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[230][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[230][3] .is_wysiwyg = "true"; +defparam \RAM|mem[230][3] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X49_Y10_N6 +cyclonev_lcell_comb \RAM|mem[198][3]~feeder ( +// Equation(s): +// \RAM|mem[198][3]~feeder_combout = ( \RAM|mem~259_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~259_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[198][3]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[198][3]~feeder .extended_lut = "off"; +defparam \RAM|mem[198][3]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[198][3]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X49_Y10_N7 +dffeas \RAM|mem[198][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[198][3]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[198][3]~229_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[198][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[198][3] .is_wysiwyg = "true"; +defparam \RAM|mem[198][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X51_Y10_N10 +dffeas \RAM|mem[214][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[214][2]~230_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[214][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[214][3] .is_wysiwyg = "true"; +defparam \RAM|mem[214][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X49_Y8_N50 +dffeas \RAM|mem[246][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[246][2]~232_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[246][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[246][3] .is_wysiwyg = "true"; +defparam \RAM|mem[246][3] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X49_Y8_N48 +cyclonev_lcell_comb \rd[3]~336 ( +// Equation(s): +// \rd[3]~336_combout = ( \RAM|mem[246][3]~q & ( \ALU|Mux26~1_combout & ( (!\ALU|Mux27~1_combout & ((\RAM|mem[214][3]~q ))) # (\ALU|Mux27~1_combout & (\RAM|mem[198][3]~q )) ) ) ) # ( !\RAM|mem[246][3]~q & ( \ALU|Mux26~1_combout & ( +// (!\ALU|Mux27~1_combout & ((\RAM|mem[214][3]~q ))) # (\ALU|Mux27~1_combout & (\RAM|mem[198][3]~q )) ) ) ) # ( \RAM|mem[246][3]~q & ( !\ALU|Mux26~1_combout & ( (!\ALU|Mux27~1_combout ) # (\RAM|mem[230][3]~q ) ) ) ) # ( !\RAM|mem[246][3]~q & ( +// !\ALU|Mux26~1_combout & ( (\RAM|mem[230][3]~q & \ALU|Mux27~1_combout ) ) ) ) + + .dataa(!\RAM|mem[230][3]~q ), + .datab(!\RAM|mem[198][3]~q ), + .datac(!\RAM|mem[214][3]~q ), + .datad(!\ALU|Mux27~1_combout ), + .datae(!\RAM|mem[246][3]~q ), + .dataf(!\ALU|Mux26~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[3]~336_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[3]~336 .extended_lut = "off"; +defparam \rd[3]~336 .lut_mask = 64'h0055FF550F330F33; +defparam \rd[3]~336 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X46_Y8_N42 +cyclonev_lcell_comb \rd[3]~339 ( +// Equation(s): +// \rd[3]~339_combout = ( \rd[3]~335_combout & ( \rd[3]~336_combout & ( ((!\ALU|Mux29~3_combout & ((\rd[3]~338_combout ))) # (\ALU|Mux29~3_combout & (\rd[3]~337_combout ))) # (\ALU|Mux28~1_combout ) ) ) ) # ( !\rd[3]~335_combout & ( \rd[3]~336_combout +// & ( (!\ALU|Mux28~1_combout & ((!\ALU|Mux29~3_combout & ((\rd[3]~338_combout ))) # (\ALU|Mux29~3_combout & (\rd[3]~337_combout )))) # (\ALU|Mux28~1_combout & (!\ALU|Mux29~3_combout )) ) ) ) # ( \rd[3]~335_combout & ( !\rd[3]~336_combout & ( +// (!\ALU|Mux28~1_combout & ((!\ALU|Mux29~3_combout & ((\rd[3]~338_combout ))) # (\ALU|Mux29~3_combout & (\rd[3]~337_combout )))) # (\ALU|Mux28~1_combout & (\ALU|Mux29~3_combout )) ) ) ) # ( !\rd[3]~335_combout & ( !\rd[3]~336_combout & ( +// (!\ALU|Mux28~1_combout & ((!\ALU|Mux29~3_combout & ((\rd[3]~338_combout ))) # (\ALU|Mux29~3_combout & (\rd[3]~337_combout )))) ) ) ) + + .dataa(!\ALU|Mux28~1_combout ), + .datab(!\ALU|Mux29~3_combout ), + .datac(!\rd[3]~337_combout ), + .datad(!\rd[3]~338_combout ), + .datae(!\rd[3]~335_combout ), + .dataf(!\rd[3]~336_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[3]~339_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[3]~339 .extended_lut = "off"; +defparam \rd[3]~339 .lut_mask = 64'h028A139B46CE57DF; +defparam \rd[3]~339 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X49_Y10_N48 +cyclonev_lcell_comb \RAM|mem[196][3]~feeder ( +// Equation(s): +// \RAM|mem[196][3]~feeder_combout = ( \RAM|mem~259_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~259_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[196][3]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[196][3]~feeder .extended_lut = "off"; +defparam \RAM|mem[196][3]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[196][3]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X49_Y10_N49 +dffeas \RAM|mem[196][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[196][3]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[196][0]~197_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[196][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[196][3] .is_wysiwyg = "true"; +defparam \RAM|mem[196][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X50_Y6_N52 +dffeas \RAM|mem[244][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[244][2]~200_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[244][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[244][3] .is_wysiwyg = "true"; +defparam \RAM|mem[244][3] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X50_Y7_N36 +cyclonev_lcell_comb \RAM|mem[228][3]~feeder ( +// Equation(s): +// \RAM|mem[228][3]~feeder_combout = ( \RAM|mem~259_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~259_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[228][3]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[228][3]~feeder .extended_lut = "off"; +defparam \RAM|mem[228][3]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[228][3]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X50_Y7_N37 +dffeas \RAM|mem[228][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[228][3]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[228][4]~199_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[228][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[228][3] .is_wysiwyg = "true"; +defparam \RAM|mem[228][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X48_Y7_N26 +dffeas \RAM|mem[212][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[212][1]~198_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[212][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[212][3] .is_wysiwyg = "true"; +defparam \RAM|mem[212][3] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X48_Y7_N24 +cyclonev_lcell_comb \rd[3]~326 ( +// Equation(s): +// \rd[3]~326_combout = ( \RAM|mem[212][3]~q & ( \ALU|Mux26~1_combout & ( (!\ALU|Mux27~1_combout ) # (\RAM|mem[196][3]~q ) ) ) ) # ( !\RAM|mem[212][3]~q & ( \ALU|Mux26~1_combout & ( (\RAM|mem[196][3]~q & \ALU|Mux27~1_combout ) ) ) ) # ( +// \RAM|mem[212][3]~q & ( !\ALU|Mux26~1_combout & ( (!\ALU|Mux27~1_combout & (\RAM|mem[244][3]~q )) # (\ALU|Mux27~1_combout & ((\RAM|mem[228][3]~q ))) ) ) ) # ( !\RAM|mem[212][3]~q & ( !\ALU|Mux26~1_combout & ( (!\ALU|Mux27~1_combout & +// (\RAM|mem[244][3]~q )) # (\ALU|Mux27~1_combout & ((\RAM|mem[228][3]~q ))) ) ) ) + + .dataa(!\RAM|mem[196][3]~q ), + .datab(!\RAM|mem[244][3]~q ), + .datac(!\RAM|mem[228][3]~q ), + .datad(!\ALU|Mux27~1_combout ), + .datae(!\RAM|mem[212][3]~q ), + .dataf(!\ALU|Mux26~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[3]~326_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[3]~326 .extended_lut = "off"; +defparam \rd[3]~326 .lut_mask = 64'h330F330F0055FF55; +defparam \rd[3]~326 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X50_Y8_N23 +dffeas \RAM|mem[240][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[240][1]~196_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[240][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[240][3] .is_wysiwyg = "true"; +defparam \RAM|mem[240][3] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X49_Y9_N45 +cyclonev_lcell_comb \RAM|mem[192][3]~feeder ( +// Equation(s): +// \RAM|mem[192][3]~feeder_combout = ( \RAM|mem~259_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~259_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[192][3]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[192][3]~feeder .extended_lut = "off"; +defparam \RAM|mem[192][3]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[192][3]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X49_Y9_N46 +dffeas \RAM|mem[192][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[192][3]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[192][3]~193_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[192][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[192][3] .is_wysiwyg = "true"; +defparam \RAM|mem[192][3] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X48_Y5_N54 +cyclonev_lcell_comb \RAM|mem[224][3]~feeder ( +// Equation(s): +// \RAM|mem[224][3]~feeder_combout = ( \RAM|mem~259_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~259_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[224][3]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[224][3]~feeder .extended_lut = "off"; +defparam \RAM|mem[224][3]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[224][3]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X48_Y5_N55 +dffeas \RAM|mem[224][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[224][3]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[224][1]~195_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[224][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[224][3] .is_wysiwyg = "true"; +defparam \RAM|mem[224][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X48_Y7_N20 +dffeas \RAM|mem[208][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[208][4]~194_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[208][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[208][3] .is_wysiwyg = "true"; +defparam \RAM|mem[208][3] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X48_Y7_N18 +cyclonev_lcell_comb \rd[3]~325 ( +// Equation(s): +// \rd[3]~325_combout = ( \RAM|mem[208][3]~q & ( \ALU|Mux26~1_combout & ( (!\ALU|Mux27~1_combout ) # (\RAM|mem[192][3]~q ) ) ) ) # ( !\RAM|mem[208][3]~q & ( \ALU|Mux26~1_combout & ( (\RAM|mem[192][3]~q & \ALU|Mux27~1_combout ) ) ) ) # ( +// \RAM|mem[208][3]~q & ( !\ALU|Mux26~1_combout & ( (!\ALU|Mux27~1_combout & (\RAM|mem[240][3]~q )) # (\ALU|Mux27~1_combout & ((\RAM|mem[224][3]~q ))) ) ) ) # ( !\RAM|mem[208][3]~q & ( !\ALU|Mux26~1_combout & ( (!\ALU|Mux27~1_combout & +// (\RAM|mem[240][3]~q )) # (\ALU|Mux27~1_combout & ((\RAM|mem[224][3]~q ))) ) ) ) + + .dataa(!\RAM|mem[240][3]~q ), + .datab(!\RAM|mem[192][3]~q ), + .datac(!\RAM|mem[224][3]~q ), + .datad(!\ALU|Mux27~1_combout ), + .datae(!\RAM|mem[208][3]~q ), + .dataf(!\ALU|Mux26~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[3]~325_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[3]~325 .extended_lut = "off"; +defparam \rd[3]~325 .lut_mask = 64'h550F550F0033FF33; +defparam \rd[3]~325 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X54_Y7_N41 +dffeas \RAM|mem[232][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[232][3]~203_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[232][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[232][3] .is_wysiwyg = "true"; +defparam \RAM|mem[232][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X54_Y7_N47 +dffeas \RAM|mem[216][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[216][3]~202_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[216][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[216][3] .is_wysiwyg = "true"; +defparam \RAM|mem[216][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X54_Y7_N23 +dffeas \RAM|mem[200][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[200][2]~201_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[200][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[200][3] .is_wysiwyg = "true"; +defparam \RAM|mem[200][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X48_Y7_N56 +dffeas \RAM|mem[248][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[248][3]~204_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[248][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[248][3] .is_wysiwyg = "true"; +defparam \RAM|mem[248][3] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X48_Y7_N54 +cyclonev_lcell_comb \rd[3]~327 ( +// Equation(s): +// \rd[3]~327_combout = ( \RAM|mem[248][3]~q & ( \ALU|Mux26~1_combout & ( (!\ALU|Mux27~1_combout & (\RAM|mem[216][3]~q )) # (\ALU|Mux27~1_combout & ((\RAM|mem[200][3]~q ))) ) ) ) # ( !\RAM|mem[248][3]~q & ( \ALU|Mux26~1_combout & ( +// (!\ALU|Mux27~1_combout & (\RAM|mem[216][3]~q )) # (\ALU|Mux27~1_combout & ((\RAM|mem[200][3]~q ))) ) ) ) # ( \RAM|mem[248][3]~q & ( !\ALU|Mux26~1_combout & ( (!\ALU|Mux27~1_combout ) # (\RAM|mem[232][3]~q ) ) ) ) # ( !\RAM|mem[248][3]~q & ( +// !\ALU|Mux26~1_combout & ( (\RAM|mem[232][3]~q & \ALU|Mux27~1_combout ) ) ) ) + + .dataa(!\RAM|mem[232][3]~q ), + .datab(!\RAM|mem[216][3]~q ), + .datac(!\RAM|mem[200][3]~q ), + .datad(!\ALU|Mux27~1_combout ), + .datae(!\RAM|mem[248][3]~q ), + .dataf(!\ALU|Mux26~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[3]~327_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[3]~327 .extended_lut = "off"; +defparam \rd[3]~327 .lut_mask = 64'h0055FF55330F330F; +defparam \rd[3]~327 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X49_Y6_N4 +dffeas \RAM|mem[236][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[236][3]~207_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[236][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[236][3] .is_wysiwyg = "true"; +defparam \RAM|mem[236][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X53_Y8_N37 +dffeas \RAM|mem[204][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[204][1]~205_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[204][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[204][3] .is_wysiwyg = "true"; +defparam \RAM|mem[204][3] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X53_Y8_N18 +cyclonev_lcell_comb \RAM|mem[220][3]~feeder ( +// Equation(s): +// \RAM|mem[220][3]~feeder_combout = ( \RAM|mem~259_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~259_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[220][3]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[220][3]~feeder .extended_lut = "off"; +defparam \RAM|mem[220][3]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[220][3]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X53_Y8_N20 +dffeas \RAM|mem[220][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[220][3]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[220][4]~206_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[220][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[220][3] .is_wysiwyg = "true"; +defparam \RAM|mem[220][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X51_Y10_N2 +dffeas \RAM|mem[252][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[252][3]~208_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[252][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[252][3] .is_wysiwyg = "true"; +defparam \RAM|mem[252][3] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X51_Y10_N0 +cyclonev_lcell_comb \rd[3]~328 ( +// Equation(s): +// \rd[3]~328_combout = ( \RAM|mem[252][3]~q & ( \ALU|Mux26~1_combout & ( (!\ALU|Mux27~1_combout & ((\RAM|mem[220][3]~q ))) # (\ALU|Mux27~1_combout & (\RAM|mem[204][3]~q )) ) ) ) # ( !\RAM|mem[252][3]~q & ( \ALU|Mux26~1_combout & ( +// (!\ALU|Mux27~1_combout & ((\RAM|mem[220][3]~q ))) # (\ALU|Mux27~1_combout & (\RAM|mem[204][3]~q )) ) ) ) # ( \RAM|mem[252][3]~q & ( !\ALU|Mux26~1_combout & ( (!\ALU|Mux27~1_combout ) # (\RAM|mem[236][3]~q ) ) ) ) # ( !\RAM|mem[252][3]~q & ( +// !\ALU|Mux26~1_combout & ( (\RAM|mem[236][3]~q & \ALU|Mux27~1_combout ) ) ) ) + + .dataa(!\RAM|mem[236][3]~q ), + .datab(!\RAM|mem[204][3]~q ), + .datac(!\ALU|Mux27~1_combout ), + .datad(!\RAM|mem[220][3]~q ), + .datae(!\RAM|mem[252][3]~q ), + .dataf(!\ALU|Mux26~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[3]~328_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[3]~328 .extended_lut = "off"; +defparam \rd[3]~328 .lut_mask = 64'h0505F5F503F303F3; +defparam \rd[3]~328 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X48_Y7_N42 +cyclonev_lcell_comb \rd[3]~329 ( +// Equation(s): +// \rd[3]~329_combout = ( \rd[3]~327_combout & ( \rd[3]~328_combout & ( (!\ALU|Mux28~1_combout ) # ((!\ALU|Mux29~3_combout & (\rd[3]~326_combout )) # (\ALU|Mux29~3_combout & ((\rd[3]~325_combout )))) ) ) ) # ( !\rd[3]~327_combout & ( \rd[3]~328_combout +// & ( (!\ALU|Mux29~3_combout & (((!\ALU|Mux28~1_combout )) # (\rd[3]~326_combout ))) # (\ALU|Mux29~3_combout & (((\rd[3]~325_combout & \ALU|Mux28~1_combout )))) ) ) ) # ( \rd[3]~327_combout & ( !\rd[3]~328_combout & ( (!\ALU|Mux29~3_combout & +// (\rd[3]~326_combout & ((\ALU|Mux28~1_combout )))) # (\ALU|Mux29~3_combout & (((!\ALU|Mux28~1_combout ) # (\rd[3]~325_combout )))) ) ) ) # ( !\rd[3]~327_combout & ( !\rd[3]~328_combout & ( (\ALU|Mux28~1_combout & ((!\ALU|Mux29~3_combout & +// (\rd[3]~326_combout )) # (\ALU|Mux29~3_combout & ((\rd[3]~325_combout ))))) ) ) ) + + .dataa(!\rd[3]~326_combout ), + .datab(!\ALU|Mux29~3_combout ), + .datac(!\rd[3]~325_combout ), + .datad(!\ALU|Mux28~1_combout ), + .datae(!\rd[3]~327_combout ), + .dataf(!\rd[3]~328_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[3]~329_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[3]~329 .extended_lut = "off"; +defparam \rd[3]~329 .lut_mask = 64'h00473347CC47FF47; +defparam \rd[3]~329 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X54_Y11_N25 +dffeas \RAM|mem[221][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[221][3]~222_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[221][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[221][3] .is_wysiwyg = "true"; +defparam \RAM|mem[221][3] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X48_Y8_N0 +cyclonev_lcell_comb \RAM|mem[253][3]~feeder ( +// Equation(s): +// \RAM|mem[253][3]~feeder_combout = ( \RAM|mem~259_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~259_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[253][3]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[253][3]~feeder .extended_lut = "off"; +defparam \RAM|mem[253][3]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[253][3]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X48_Y8_N1 +dffeas \RAM|mem[253][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[253][3]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[253][2]~224_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[253][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[253][3] .is_wysiwyg = "true"; +defparam \RAM|mem[253][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X53_Y12_N58 +dffeas \RAM|mem[205][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[205][3]~221_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[205][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[205][3] .is_wysiwyg = "true"; +defparam \RAM|mem[205][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X53_Y12_N22 +dffeas \RAM|mem[237][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[237][2]~223_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[237][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[237][3] .is_wysiwyg = "true"; +defparam \RAM|mem[237][3] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X49_Y8_N18 +cyclonev_lcell_comb \rd[3]~333 ( +// Equation(s): +// \rd[3]~333_combout = ( \ALU|Mux26~1_combout & ( \ALU|Mux27~1_combout & ( \RAM|mem[205][3]~q ) ) ) # ( !\ALU|Mux26~1_combout & ( \ALU|Mux27~1_combout & ( \RAM|mem[237][3]~q ) ) ) # ( \ALU|Mux26~1_combout & ( !\ALU|Mux27~1_combout & ( +// \RAM|mem[221][3]~q ) ) ) # ( !\ALU|Mux26~1_combout & ( !\ALU|Mux27~1_combout & ( \RAM|mem[253][3]~q ) ) ) + + .dataa(!\RAM|mem[221][3]~q ), + .datab(!\RAM|mem[253][3]~q ), + .datac(!\RAM|mem[205][3]~q ), + .datad(!\RAM|mem[237][3]~q ), + .datae(!\ALU|Mux26~1_combout ), + .dataf(!\ALU|Mux27~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[3]~333_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[3]~333 .extended_lut = "off"; +defparam \rd[3]~333 .lut_mask = 64'h3333555500FF0F0F; +defparam \rd[3]~333 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X53_Y10_N33 +cyclonev_lcell_comb \RAM|mem[217][3]~feeder ( +// Equation(s): +// \RAM|mem[217][3]~feeder_combout = ( \RAM|mem~259_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~259_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[217][3]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[217][3]~feeder .extended_lut = "off"; +defparam \RAM|mem[217][3]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[217][3]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X53_Y10_N34 +dffeas \RAM|mem[217][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[217][3]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[217][1]~218_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[217][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[217][3] .is_wysiwyg = "true"; +defparam \RAM|mem[217][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X45_Y9_N19 +dffeas \RAM|mem[233][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[233][0]~219_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[233][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[233][3] .is_wysiwyg = "true"; +defparam \RAM|mem[233][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X53_Y12_N14 +dffeas \RAM|mem[201][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[201][4]~217_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[201][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[201][3] .is_wysiwyg = "true"; +defparam \RAM|mem[201][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X48_Y8_N50 +dffeas \RAM|mem[249][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[249][1]~220_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[249][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[249][3] .is_wysiwyg = "true"; +defparam \RAM|mem[249][3] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X48_Y8_N48 +cyclonev_lcell_comb \rd[3]~332 ( +// Equation(s): +// \rd[3]~332_combout = ( \RAM|mem[249][3]~q & ( \ALU|Mux26~1_combout & ( (!\ALU|Mux27~1_combout & (\RAM|mem[217][3]~q )) # (\ALU|Mux27~1_combout & ((\RAM|mem[201][3]~q ))) ) ) ) # ( !\RAM|mem[249][3]~q & ( \ALU|Mux26~1_combout & ( +// (!\ALU|Mux27~1_combout & (\RAM|mem[217][3]~q )) # (\ALU|Mux27~1_combout & ((\RAM|mem[201][3]~q ))) ) ) ) # ( \RAM|mem[249][3]~q & ( !\ALU|Mux26~1_combout & ( (!\ALU|Mux27~1_combout ) # (\RAM|mem[233][3]~q ) ) ) ) # ( !\RAM|mem[249][3]~q & ( +// !\ALU|Mux26~1_combout & ( (\RAM|mem[233][3]~q & \ALU|Mux27~1_combout ) ) ) ) + + .dataa(!\RAM|mem[217][3]~q ), + .datab(!\RAM|mem[233][3]~q ), + .datac(!\RAM|mem[201][3]~q ), + .datad(!\ALU|Mux27~1_combout ), + .datae(!\RAM|mem[249][3]~q ), + .dataf(!\ALU|Mux26~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[3]~332_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[3]~332 .extended_lut = "off"; +defparam \rd[3]~332 .lut_mask = 64'h0033FF33550F550F; +defparam \rd[3]~332 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X43_Y9_N58 +dffeas \RAM|mem[229][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[229][2]~215_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[229][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[229][3] .is_wysiwyg = "true"; +defparam \RAM|mem[229][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X48_Y11_N17 +dffeas \RAM|mem[245][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[245][0]~216_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[245][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[245][3] .is_wysiwyg = "true"; +defparam \RAM|mem[245][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X48_Y11_N4 +dffeas \RAM|mem[197][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[197][1]~213_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[197][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[197][3] .is_wysiwyg = "true"; +defparam \RAM|mem[197][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X48_Y11_N26 +dffeas \RAM|mem[213][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[213][2]~214_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[213][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[213][3] .is_wysiwyg = "true"; +defparam \RAM|mem[213][3] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X48_Y11_N24 +cyclonev_lcell_comb \rd[3]~331 ( +// Equation(s): +// \rd[3]~331_combout = ( \RAM|mem[213][3]~q & ( \ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout & (\RAM|mem[229][3]~q )) # (\ALU|Mux26~1_combout & ((\RAM|mem[197][3]~q ))) ) ) ) # ( !\RAM|mem[213][3]~q & ( \ALU|Mux27~1_combout & ( +// (!\ALU|Mux26~1_combout & (\RAM|mem[229][3]~q )) # (\ALU|Mux26~1_combout & ((\RAM|mem[197][3]~q ))) ) ) ) # ( \RAM|mem[213][3]~q & ( !\ALU|Mux27~1_combout & ( (\ALU|Mux26~1_combout ) # (\RAM|mem[245][3]~q ) ) ) ) # ( !\RAM|mem[213][3]~q & ( +// !\ALU|Mux27~1_combout & ( (\RAM|mem[245][3]~q & !\ALU|Mux26~1_combout ) ) ) ) + + .dataa(!\RAM|mem[229][3]~q ), + .datab(!\RAM|mem[245][3]~q ), + .datac(!\ALU|Mux26~1_combout ), + .datad(!\RAM|mem[197][3]~q ), + .datae(!\RAM|mem[213][3]~q ), + .dataf(!\ALU|Mux27~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[3]~331_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[3]~331 .extended_lut = "off"; +defparam \rd[3]~331 .lut_mask = 64'h30303F3F505F505F; +defparam \rd[3]~331 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X50_Y7_N54 +cyclonev_lcell_comb \RAM|mem[241][3]~feeder ( +// Equation(s): +// \RAM|mem[241][3]~feeder_combout = ( \RAM|mem~259_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~259_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[241][3]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[241][3]~feeder .extended_lut = "off"; +defparam \RAM|mem[241][3]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[241][3]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X50_Y7_N55 +dffeas \RAM|mem[241][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[241][3]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[241][4]~212_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[241][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[241][3] .is_wysiwyg = "true"; +defparam \RAM|mem[241][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X42_Y9_N50 +dffeas \RAM|mem[193][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[193][1]~209_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[193][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[193][3] .is_wysiwyg = "true"; +defparam \RAM|mem[193][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X43_Y5_N8 +dffeas \RAM|mem[225][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[225][3]~211_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[225][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[225][3] .is_wysiwyg = "true"; +defparam \RAM|mem[225][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X48_Y8_N56 +dffeas \RAM|mem[209][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[209][0]~210_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[209][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[209][3] .is_wysiwyg = "true"; +defparam \RAM|mem[209][3] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X48_Y8_N54 +cyclonev_lcell_comb \rd[3]~330 ( +// Equation(s): +// \rd[3]~330_combout = ( \RAM|mem[209][3]~q & ( \ALU|Mux26~1_combout & ( (!\ALU|Mux27~1_combout ) # (\RAM|mem[193][3]~q ) ) ) ) # ( !\RAM|mem[209][3]~q & ( \ALU|Mux26~1_combout & ( (\RAM|mem[193][3]~q & \ALU|Mux27~1_combout ) ) ) ) # ( +// \RAM|mem[209][3]~q & ( !\ALU|Mux26~1_combout & ( (!\ALU|Mux27~1_combout & (\RAM|mem[241][3]~q )) # (\ALU|Mux27~1_combout & ((\RAM|mem[225][3]~q ))) ) ) ) # ( !\RAM|mem[209][3]~q & ( !\ALU|Mux26~1_combout & ( (!\ALU|Mux27~1_combout & +// (\RAM|mem[241][3]~q )) # (\ALU|Mux27~1_combout & ((\RAM|mem[225][3]~q ))) ) ) ) + + .dataa(!\RAM|mem[241][3]~q ), + .datab(!\RAM|mem[193][3]~q ), + .datac(!\RAM|mem[225][3]~q ), + .datad(!\ALU|Mux27~1_combout ), + .datae(!\RAM|mem[209][3]~q ), + .dataf(!\ALU|Mux26~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[3]~330_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[3]~330 .extended_lut = "off"; +defparam \rd[3]~330 .lut_mask = 64'h550F550F0033FF33; +defparam \rd[3]~330 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X49_Y8_N9 +cyclonev_lcell_comb \rd[3]~334 ( +// Equation(s): +// \rd[3]~334_combout = ( \rd[3]~331_combout & ( \rd[3]~330_combout & ( ((!\ALU|Mux29~3_combout & (\rd[3]~333_combout )) # (\ALU|Mux29~3_combout & ((\rd[3]~332_combout )))) # (\ALU|Mux28~1_combout ) ) ) ) # ( !\rd[3]~331_combout & ( \rd[3]~330_combout +// & ( (!\ALU|Mux28~1_combout & ((!\ALU|Mux29~3_combout & (\rd[3]~333_combout )) # (\ALU|Mux29~3_combout & ((\rd[3]~332_combout ))))) # (\ALU|Mux28~1_combout & (((\ALU|Mux29~3_combout )))) ) ) ) # ( \rd[3]~331_combout & ( !\rd[3]~330_combout & ( +// (!\ALU|Mux28~1_combout & ((!\ALU|Mux29~3_combout & (\rd[3]~333_combout )) # (\ALU|Mux29~3_combout & ((\rd[3]~332_combout ))))) # (\ALU|Mux28~1_combout & (((!\ALU|Mux29~3_combout )))) ) ) ) # ( !\rd[3]~331_combout & ( !\rd[3]~330_combout & ( +// (!\ALU|Mux28~1_combout & ((!\ALU|Mux29~3_combout & (\rd[3]~333_combout )) # (\ALU|Mux29~3_combout & ((\rd[3]~332_combout ))))) ) ) ) + + .dataa(!\rd[3]~333_combout ), + .datab(!\ALU|Mux28~1_combout ), + .datac(!\rd[3]~332_combout ), + .datad(!\ALU|Mux29~3_combout ), + .datae(!\rd[3]~331_combout ), + .dataf(!\rd[3]~330_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[3]~334_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[3]~334 .extended_lut = "off"; +defparam \rd[3]~334 .lut_mask = 64'h440C770C443F773F; +defparam \rd[3]~334 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X43_Y7_N36 +cyclonev_lcell_comb \rd[3]~345 ( +// Equation(s): +// \rd[3]~345_combout = ( \rd[3]~329_combout & ( \rd[3]~334_combout & ( ((!\ALU|Mux31~3_combout & (\rd[3]~344_combout )) # (\ALU|Mux31~3_combout & ((\rd[3]~339_combout )))) # (\ALU|Mux30~1_combout ) ) ) ) # ( !\rd[3]~329_combout & ( \rd[3]~334_combout +// & ( (!\ALU|Mux31~3_combout & (((\ALU|Mux30~1_combout )) # (\rd[3]~344_combout ))) # (\ALU|Mux31~3_combout & (((\rd[3]~339_combout & !\ALU|Mux30~1_combout )))) ) ) ) # ( \rd[3]~329_combout & ( !\rd[3]~334_combout & ( (!\ALU|Mux31~3_combout & +// (\rd[3]~344_combout & ((!\ALU|Mux30~1_combout )))) # (\ALU|Mux31~3_combout & (((\ALU|Mux30~1_combout ) # (\rd[3]~339_combout )))) ) ) ) # ( !\rd[3]~329_combout & ( !\rd[3]~334_combout & ( (!\ALU|Mux30~1_combout & ((!\ALU|Mux31~3_combout & +// (\rd[3]~344_combout )) # (\ALU|Mux31~3_combout & ((\rd[3]~339_combout ))))) ) ) ) + + .dataa(!\ALU|Mux31~3_combout ), + .datab(!\rd[3]~344_combout ), + .datac(!\rd[3]~339_combout ), + .datad(!\ALU|Mux30~1_combout ), + .datae(!\rd[3]~329_combout ), + .dataf(!\rd[3]~334_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[3]~345_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[3]~345 .extended_lut = "off"; +defparam \rd[3]~345 .lut_mask = 64'h2700275527AA27FF; +defparam \rd[3]~345 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X45_Y4_N32 +dffeas \RAM|mem[186][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[186][0]~187_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[186][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[186][3] .is_wysiwyg = "true"; +defparam \RAM|mem[186][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X45_Y8_N20 +dffeas \RAM|mem[182][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[182][0]~186_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[182][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[182][3] .is_wysiwyg = "true"; +defparam \RAM|mem[182][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X45_Y6_N29 +dffeas \RAM|mem[178][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[178][3]~185_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[178][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[178][3] .is_wysiwyg = "true"; +defparam \RAM|mem[178][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X45_Y7_N38 +dffeas \RAM|mem[190][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[190][2]~188_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[190][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[190][3] .is_wysiwyg = "true"; +defparam \RAM|mem[190][3] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X45_Y7_N36 +cyclonev_lcell_comb \rd[3]~321 ( +// Equation(s): +// \rd[3]~321_combout = ( \RAM|mem[190][3]~q & ( \ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout & (\RAM|mem[182][3]~q )) # (\ALU|Mux29~3_combout & ((\RAM|mem[178][3]~q ))) ) ) ) # ( !\RAM|mem[190][3]~q & ( \ALU|Mux28~1_combout & ( +// (!\ALU|Mux29~3_combout & (\RAM|mem[182][3]~q )) # (\ALU|Mux29~3_combout & ((\RAM|mem[178][3]~q ))) ) ) ) # ( \RAM|mem[190][3]~q & ( !\ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout ) # (\RAM|mem[186][3]~q ) ) ) ) # ( !\RAM|mem[190][3]~q & ( +// !\ALU|Mux28~1_combout & ( (\RAM|mem[186][3]~q & \ALU|Mux29~3_combout ) ) ) ) + + .dataa(!\RAM|mem[186][3]~q ), + .datab(!\RAM|mem[182][3]~q ), + .datac(!\RAM|mem[178][3]~q ), + .datad(!\ALU|Mux29~3_combout ), + .datae(!\RAM|mem[190][3]~q ), + .dataf(!\ALU|Mux28~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[3]~321_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[3]~321 .extended_lut = "off"; +defparam \rd[3]~321 .lut_mask = 64'h0055FF55330F330F; +defparam \rd[3]~321 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X51_Y12_N16 +dffeas \RAM|mem[185][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[185][4]~183_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[185][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[185][3] .is_wysiwyg = "true"; +defparam \RAM|mem[185][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X49_Y11_N58 +dffeas \RAM|mem[181][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[181][4]~182_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[181][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[181][3] .is_wysiwyg = "true"; +defparam \RAM|mem[181][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X49_Y6_N52 +dffeas \RAM|mem[177][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[177][3]~181_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[177][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[177][3] .is_wysiwyg = "true"; +defparam \RAM|mem[177][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X45_Y7_N32 +dffeas \RAM|mem[189][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[189][3]~184_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[189][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[189][3] .is_wysiwyg = "true"; +defparam \RAM|mem[189][3] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X45_Y7_N30 +cyclonev_lcell_comb \rd[3]~320 ( +// Equation(s): +// \rd[3]~320_combout = ( \RAM|mem[189][3]~q & ( \ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout & (\RAM|mem[181][3]~q )) # (\ALU|Mux29~3_combout & ((\RAM|mem[177][3]~q ))) ) ) ) # ( !\RAM|mem[189][3]~q & ( \ALU|Mux28~1_combout & ( +// (!\ALU|Mux29~3_combout & (\RAM|mem[181][3]~q )) # (\ALU|Mux29~3_combout & ((\RAM|mem[177][3]~q ))) ) ) ) # ( \RAM|mem[189][3]~q & ( !\ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout ) # (\RAM|mem[185][3]~q ) ) ) ) # ( !\RAM|mem[189][3]~q & ( +// !\ALU|Mux28~1_combout & ( (\RAM|mem[185][3]~q & \ALU|Mux29~3_combout ) ) ) ) + + .dataa(!\RAM|mem[185][3]~q ), + .datab(!\RAM|mem[181][3]~q ), + .datac(!\RAM|mem[177][3]~q ), + .datad(!\ALU|Mux29~3_combout ), + .datae(!\RAM|mem[189][3]~q ), + .dataf(!\ALU|Mux28~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[3]~320_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[3]~320 .extended_lut = "off"; +defparam \rd[3]~320 .lut_mask = 64'h0055FF55330F330F; +defparam \rd[3]~320 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y4_N24 +cyclonev_lcell_comb \RAM|mem[183][3]~feeder ( +// Equation(s): +// \RAM|mem[183][3]~feeder_combout = ( \RAM|mem~259_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~259_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[183][3]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[183][3]~feeder .extended_lut = "off"; +defparam \RAM|mem[183][3]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[183][3]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X42_Y4_N25 +dffeas \RAM|mem[183][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[183][3]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[183][4]~190_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[183][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[183][3] .is_wysiwyg = "true"; +defparam \RAM|mem[183][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X43_Y6_N47 +dffeas \RAM|mem[187][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[187][0]~191_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[187][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[187][3] .is_wysiwyg = "true"; +defparam \RAM|mem[187][3] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y5_N21 +cyclonev_lcell_comb \RAM|mem[179][3]~feeder ( +// Equation(s): +// \RAM|mem[179][3]~feeder_combout = ( \RAM|mem~259_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~259_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[179][3]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[179][3]~feeder .extended_lut = "off"; +defparam \RAM|mem[179][3]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[179][3]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X42_Y5_N22 +dffeas \RAM|mem[179][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[179][3]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[179][4]~189_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[179][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[179][3] .is_wysiwyg = "true"; +defparam \RAM|mem[179][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X43_Y6_N20 +dffeas \RAM|mem[191][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[191][2]~192_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[191][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[191][3] .is_wysiwyg = "true"; +defparam \RAM|mem[191][3] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X43_Y6_N18 +cyclonev_lcell_comb \rd[3]~322 ( +// Equation(s): +// \rd[3]~322_combout = ( \RAM|mem[191][3]~q & ( \ALU|Mux29~3_combout & ( (!\ALU|Mux28~1_combout & (\RAM|mem[187][3]~q )) # (\ALU|Mux28~1_combout & ((\RAM|mem[179][3]~q ))) ) ) ) # ( !\RAM|mem[191][3]~q & ( \ALU|Mux29~3_combout & ( +// (!\ALU|Mux28~1_combout & (\RAM|mem[187][3]~q )) # (\ALU|Mux28~1_combout & ((\RAM|mem[179][3]~q ))) ) ) ) # ( \RAM|mem[191][3]~q & ( !\ALU|Mux29~3_combout & ( (!\ALU|Mux28~1_combout ) # (\RAM|mem[183][3]~q ) ) ) ) # ( !\RAM|mem[191][3]~q & ( +// !\ALU|Mux29~3_combout & ( (\RAM|mem[183][3]~q & \ALU|Mux28~1_combout ) ) ) ) + + .dataa(!\RAM|mem[183][3]~q ), + .datab(!\RAM|mem[187][3]~q ), + .datac(!\ALU|Mux28~1_combout ), + .datad(!\RAM|mem[179][3]~q ), + .datae(!\RAM|mem[191][3]~q ), + .dataf(!\ALU|Mux29~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[3]~322_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[3]~322 .extended_lut = "off"; +defparam \rd[3]~322 .lut_mask = 64'h0505F5F5303F303F; +defparam \rd[3]~322 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X51_Y11_N12 +cyclonev_lcell_comb \RAM|mem[184][3]~feeder ( +// Equation(s): +// \RAM|mem[184][3]~feeder_combout = ( \RAM|mem~259_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~259_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[184][3]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[184][3]~feeder .extended_lut = "off"; +defparam \RAM|mem[184][3]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[184][3]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X51_Y11_N13 +dffeas \RAM|mem[184][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[184][3]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[184][4]~179_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[184][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[184][3] .is_wysiwyg = "true"; +defparam \RAM|mem[184][3] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X51_Y8_N15 +cyclonev_lcell_comb \RAM|mem[176][3]~feeder ( +// Equation(s): +// \RAM|mem[176][3]~feeder_combout = ( \RAM|mem~259_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~259_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[176][3]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[176][3]~feeder .extended_lut = "off"; +defparam \RAM|mem[176][3]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[176][3]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X51_Y8_N17 +dffeas \RAM|mem[176][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[176][3]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[176][1]~177_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[176][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[176][3] .is_wysiwyg = "true"; +defparam \RAM|mem[176][3] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X45_Y6_N21 +cyclonev_lcell_comb \RAM|mem[180][3]~feeder ( +// Equation(s): +// \RAM|mem[180][3]~feeder_combout = ( \RAM|mem~259_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~259_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[180][3]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[180][3]~feeder .extended_lut = "off"; +defparam \RAM|mem[180][3]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[180][3]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X45_Y6_N22 +dffeas \RAM|mem[180][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[180][3]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[180][4]~178_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[180][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[180][3] .is_wysiwyg = "true"; +defparam \RAM|mem[180][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X45_Y7_N26 +dffeas \RAM|mem[188][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[188][2]~180_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[188][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[188][3] .is_wysiwyg = "true"; +defparam \RAM|mem[188][3] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X45_Y7_N24 +cyclonev_lcell_comb \rd[3]~319 ( +// Equation(s): +// \rd[3]~319_combout = ( \RAM|mem[188][3]~q & ( \ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout & ((\RAM|mem[180][3]~q ))) # (\ALU|Mux29~3_combout & (\RAM|mem[176][3]~q )) ) ) ) # ( !\RAM|mem[188][3]~q & ( \ALU|Mux28~1_combout & ( +// (!\ALU|Mux29~3_combout & ((\RAM|mem[180][3]~q ))) # (\ALU|Mux29~3_combout & (\RAM|mem[176][3]~q )) ) ) ) # ( \RAM|mem[188][3]~q & ( !\ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout ) # (\RAM|mem[184][3]~q ) ) ) ) # ( !\RAM|mem[188][3]~q & ( +// !\ALU|Mux28~1_combout & ( (\RAM|mem[184][3]~q & \ALU|Mux29~3_combout ) ) ) ) + + .dataa(!\RAM|mem[184][3]~q ), + .datab(!\RAM|mem[176][3]~q ), + .datac(!\RAM|mem[180][3]~q ), + .datad(!\ALU|Mux29~3_combout ), + .datae(!\RAM|mem[188][3]~q ), + .dataf(!\ALU|Mux28~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[3]~319_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[3]~319 .extended_lut = "off"; +defparam \rd[3]~319 .lut_mask = 64'h0055FF550F330F33; +defparam \rd[3]~319 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X43_Y7_N51 +cyclonev_lcell_comb \rd[3]~323 ( +// Equation(s): +// \rd[3]~323_combout = ( \rd[3]~319_combout & ( \ALU|Mux31~3_combout & ( (\ALU|Mux30~1_combout ) # (\rd[3]~321_combout ) ) ) ) # ( !\rd[3]~319_combout & ( \ALU|Mux31~3_combout & ( (\rd[3]~321_combout & !\ALU|Mux30~1_combout ) ) ) ) # ( +// \rd[3]~319_combout & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & ((\rd[3]~322_combout ))) # (\ALU|Mux30~1_combout & (\rd[3]~320_combout )) ) ) ) # ( !\rd[3]~319_combout & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & +// ((\rd[3]~322_combout ))) # (\ALU|Mux30~1_combout & (\rd[3]~320_combout )) ) ) ) + + .dataa(!\rd[3]~321_combout ), + .datab(!\ALU|Mux30~1_combout ), + .datac(!\rd[3]~320_combout ), + .datad(!\rd[3]~322_combout ), + .datae(!\rd[3]~319_combout ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[3]~323_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[3]~323 .extended_lut = "off"; +defparam \rd[3]~323 .lut_mask = 64'h03CF03CF44447777; +defparam \rd[3]~323 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X48_Y6_N55 +dffeas \RAM|mem[169][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[169][2]~170_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[169][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[169][3] .is_wysiwyg = "true"; +defparam \RAM|mem[169][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X47_Y9_N23 +dffeas \RAM|mem[165][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[165][2]~166_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[165][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[165][3] .is_wysiwyg = "true"; +defparam \RAM|mem[165][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X48_Y6_N16 +dffeas \RAM|mem[161][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[161][0]~162_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[161][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[161][3] .is_wysiwyg = "true"; +defparam \RAM|mem[161][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X46_Y10_N50 +dffeas \RAM|mem[173][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[173][1]~174_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[173][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[173][3] .is_wysiwyg = "true"; +defparam \RAM|mem[173][3] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X43_Y10_N21 +cyclonev_lcell_comb \rd[3]~315 ( +// Equation(s): +// \rd[3]~315_combout = ( \RAM|mem[173][3]~q & ( \ALU|Mux29~3_combout & ( (!\ALU|Mux28~1_combout & (\RAM|mem[169][3]~q )) # (\ALU|Mux28~1_combout & ((\RAM|mem[161][3]~q ))) ) ) ) # ( !\RAM|mem[173][3]~q & ( \ALU|Mux29~3_combout & ( +// (!\ALU|Mux28~1_combout & (\RAM|mem[169][3]~q )) # (\ALU|Mux28~1_combout & ((\RAM|mem[161][3]~q ))) ) ) ) # ( \RAM|mem[173][3]~q & ( !\ALU|Mux29~3_combout & ( (!\ALU|Mux28~1_combout ) # (\RAM|mem[165][3]~q ) ) ) ) # ( !\RAM|mem[173][3]~q & ( +// !\ALU|Mux29~3_combout & ( (\RAM|mem[165][3]~q & \ALU|Mux28~1_combout ) ) ) ) + + .dataa(!\RAM|mem[169][3]~q ), + .datab(!\RAM|mem[165][3]~q ), + .datac(!\ALU|Mux28~1_combout ), + .datad(!\RAM|mem[161][3]~q ), + .datae(!\RAM|mem[173][3]~q ), + .dataf(!\ALU|Mux29~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[3]~315_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[3]~315 .extended_lut = "off"; +defparam \rd[3]~315 .lut_mask = 64'h0303F3F3505F505F; +defparam \rd[3]~315 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X47_Y9_N31 +dffeas \RAM|mem[164][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[164][4]~165_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[164][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[164][3] .is_wysiwyg = "true"; +defparam \RAM|mem[164][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X46_Y5_N34 +dffeas \RAM|mem[172][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[172][2]~173_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[172][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[172][3] .is_wysiwyg = "true"; +defparam \RAM|mem[172][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X45_Y11_N55 +dffeas \RAM|mem[160][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[160][3]~161_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[160][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[160][3] .is_wysiwyg = "true"; +defparam \RAM|mem[160][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X51_Y11_N7 +dffeas \RAM|mem[168][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[168][2]~169_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[168][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[168][3] .is_wysiwyg = "true"; +defparam \RAM|mem[168][3] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X43_Y10_N15 +cyclonev_lcell_comb \rd[3]~314 ( +// Equation(s): +// \rd[3]~314_combout = ( \RAM|mem[168][3]~q & ( \ALU|Mux29~3_combout & ( (!\ALU|Mux28~1_combout ) # (\RAM|mem[160][3]~q ) ) ) ) # ( !\RAM|mem[168][3]~q & ( \ALU|Mux29~3_combout & ( (\ALU|Mux28~1_combout & \RAM|mem[160][3]~q ) ) ) ) # ( +// \RAM|mem[168][3]~q & ( !\ALU|Mux29~3_combout & ( (!\ALU|Mux28~1_combout & ((\RAM|mem[172][3]~q ))) # (\ALU|Mux28~1_combout & (\RAM|mem[164][3]~q )) ) ) ) # ( !\RAM|mem[168][3]~q & ( !\ALU|Mux29~3_combout & ( (!\ALU|Mux28~1_combout & +// ((\RAM|mem[172][3]~q ))) # (\ALU|Mux28~1_combout & (\RAM|mem[164][3]~q )) ) ) ) + + .dataa(!\RAM|mem[164][3]~q ), + .datab(!\ALU|Mux28~1_combout ), + .datac(!\RAM|mem[172][3]~q ), + .datad(!\RAM|mem[160][3]~q ), + .datae(!\RAM|mem[168][3]~q ), + .dataf(!\ALU|Mux29~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[3]~314_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[3]~314 .extended_lut = "off"; +defparam \rd[3]~314 .lut_mask = 64'h1D1D1D1D0033CCFF; +defparam \rd[3]~314 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X45_Y11_N13 +dffeas \RAM|mem[163][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[163][3]~164_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[163][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[163][3] .is_wysiwyg = "true"; +defparam \RAM|mem[163][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X47_Y9_N52 +dffeas \RAM|mem[167][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[167][1]~168_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[167][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[167][3] .is_wysiwyg = "true"; +defparam \RAM|mem[167][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X43_Y6_N11 +dffeas \RAM|mem[171][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[171][2]~172_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[171][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[171][3] .is_wysiwyg = "true"; +defparam \RAM|mem[171][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X46_Y10_N38 +dffeas \RAM|mem[175][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[175][0]~176_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[175][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[175][3] .is_wysiwyg = "true"; +defparam \RAM|mem[175][3] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X46_Y10_N36 +cyclonev_lcell_comb \rd[3]~317 ( +// Equation(s): +// \rd[3]~317_combout = ( \RAM|mem[175][3]~q & ( \ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout & ((\RAM|mem[167][3]~q ))) # (\ALU|Mux29~3_combout & (\RAM|mem[163][3]~q )) ) ) ) # ( !\RAM|mem[175][3]~q & ( \ALU|Mux28~1_combout & ( +// (!\ALU|Mux29~3_combout & ((\RAM|mem[167][3]~q ))) # (\ALU|Mux29~3_combout & (\RAM|mem[163][3]~q )) ) ) ) # ( \RAM|mem[175][3]~q & ( !\ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout ) # (\RAM|mem[171][3]~q ) ) ) ) # ( !\RAM|mem[175][3]~q & ( +// !\ALU|Mux28~1_combout & ( (\ALU|Mux29~3_combout & \RAM|mem[171][3]~q ) ) ) ) + + .dataa(!\RAM|mem[163][3]~q ), + .datab(!\RAM|mem[167][3]~q ), + .datac(!\ALU|Mux29~3_combout ), + .datad(!\RAM|mem[171][3]~q ), + .datae(!\RAM|mem[175][3]~q ), + .dataf(!\ALU|Mux28~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[3]~317_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[3]~317 .extended_lut = "off"; +defparam \rd[3]~317 .lut_mask = 64'h000FF0FF35353535; +defparam \rd[3]~317 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X45_Y11_N49 +dffeas \RAM|mem[162][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[162][0]~163_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[162][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[162][3] .is_wysiwyg = "true"; +defparam \RAM|mem[162][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X45_Y5_N34 +dffeas \RAM|mem[166][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[166][2]~167_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[166][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[166][3] .is_wysiwyg = "true"; +defparam \RAM|mem[166][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X45_Y4_N37 +dffeas \RAM|mem[170][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[170][4]~171_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[170][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[170][3] .is_wysiwyg = "true"; +defparam \RAM|mem[170][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X46_Y10_N8 +dffeas \RAM|mem[174][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[174][4]~175_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[174][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[174][3] .is_wysiwyg = "true"; +defparam \RAM|mem[174][3] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X46_Y10_N6 +cyclonev_lcell_comb \rd[3]~316 ( +// Equation(s): +// \rd[3]~316_combout = ( \RAM|mem[174][3]~q & ( \ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout & ((\RAM|mem[166][3]~q ))) # (\ALU|Mux29~3_combout & (\RAM|mem[162][3]~q )) ) ) ) # ( !\RAM|mem[174][3]~q & ( \ALU|Mux28~1_combout & ( +// (!\ALU|Mux29~3_combout & ((\RAM|mem[166][3]~q ))) # (\ALU|Mux29~3_combout & (\RAM|mem[162][3]~q )) ) ) ) # ( \RAM|mem[174][3]~q & ( !\ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout ) # (\RAM|mem[170][3]~q ) ) ) ) # ( !\RAM|mem[174][3]~q & ( +// !\ALU|Mux28~1_combout & ( (\RAM|mem[170][3]~q & \ALU|Mux29~3_combout ) ) ) ) + + .dataa(!\RAM|mem[162][3]~q ), + .datab(!\RAM|mem[166][3]~q ), + .datac(!\RAM|mem[170][3]~q ), + .datad(!\ALU|Mux29~3_combout ), + .datae(!\RAM|mem[174][3]~q ), + .dataf(!\ALU|Mux28~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[3]~316_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[3]~316 .extended_lut = "off"; +defparam \rd[3]~316 .lut_mask = 64'h000FFF0F33553355; +defparam \rd[3]~316 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X43_Y10_N3 +cyclonev_lcell_comb \rd[3]~318 ( +// Equation(s): +// \rd[3]~318_combout = ( \rd[3]~316_combout & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout ) # (\rd[3]~314_combout ) ) ) ) # ( !\rd[3]~316_combout & ( \ALU|Mux31~3_combout & ( (\rd[3]~314_combout & \ALU|Mux30~1_combout ) ) ) ) # ( +// \rd[3]~316_combout & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & ((\rd[3]~317_combout ))) # (\ALU|Mux30~1_combout & (\rd[3]~315_combout )) ) ) ) # ( !\rd[3]~316_combout & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & +// ((\rd[3]~317_combout ))) # (\ALU|Mux30~1_combout & (\rd[3]~315_combout )) ) ) ) + + .dataa(!\rd[3]~315_combout ), + .datab(!\rd[3]~314_combout ), + .datac(!\rd[3]~317_combout ), + .datad(!\ALU|Mux30~1_combout ), + .datae(!\rd[3]~316_combout ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[3]~318_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[3]~318 .extended_lut = "off"; +defparam \rd[3]~318 .lut_mask = 64'h0F550F550033FF33; +defparam \rd[3]~318 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X51_Y12_N29 +dffeas \RAM|mem[153][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[153][0]~151_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[153][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[153][3] .is_wysiwyg = "true"; +defparam \RAM|mem[153][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X48_Y14_N22 +dffeas \RAM|mem[157][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[157][3]~152_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[157][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[157][3] .is_wysiwyg = "true"; +defparam \RAM|mem[157][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X42_Y12_N52 +dffeas \RAM|mem[145][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[145][3]~149_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[145][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[145][3] .is_wysiwyg = "true"; +defparam \RAM|mem[145][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X43_Y7_N11 +dffeas \RAM|mem[149][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[149][4]~150_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[149][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[149][3] .is_wysiwyg = "true"; +defparam \RAM|mem[149][3] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X43_Y7_N9 +cyclonev_lcell_comb \rd[3]~310 ( +// Equation(s): +// \rd[3]~310_combout = ( \RAM|mem[149][3]~q & ( \ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout ) # (\RAM|mem[145][3]~q ) ) ) ) # ( !\RAM|mem[149][3]~q & ( \ALU|Mux28~1_combout & ( (\ALU|Mux29~3_combout & \RAM|mem[145][3]~q ) ) ) ) # ( +// \RAM|mem[149][3]~q & ( !\ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout & ((\RAM|mem[157][3]~q ))) # (\ALU|Mux29~3_combout & (\RAM|mem[153][3]~q )) ) ) ) # ( !\RAM|mem[149][3]~q & ( !\ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout & +// ((\RAM|mem[157][3]~q ))) # (\ALU|Mux29~3_combout & (\RAM|mem[153][3]~q )) ) ) ) + + .dataa(!\RAM|mem[153][3]~q ), + .datab(!\ALU|Mux29~3_combout ), + .datac(!\RAM|mem[157][3]~q ), + .datad(!\RAM|mem[145][3]~q ), + .datae(!\RAM|mem[149][3]~q ), + .dataf(!\ALU|Mux28~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[3]~310_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[3]~310 .extended_lut = "off"; +defparam \rd[3]~310 .lut_mask = 64'h1D1D1D1D0033CCFF; +defparam \rd[3]~310 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X42_Y13_N38 +dffeas \RAM|mem[155][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[155][0]~159_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[155][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[155][3] .is_wysiwyg = "true"; +defparam \RAM|mem[155][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X43_Y11_N11 +dffeas \RAM|mem[151][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[151][3]~158_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[151][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[151][3] .is_wysiwyg = "true"; +defparam \RAM|mem[151][3] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X45_Y15_N18 +cyclonev_lcell_comb \RAM|mem[147][3]~feeder ( +// Equation(s): +// \RAM|mem[147][3]~feeder_combout = ( \RAM|mem~259_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~259_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[147][3]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[147][3]~feeder .extended_lut = "off"; +defparam \RAM|mem[147][3]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[147][3]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X45_Y15_N19 +dffeas \RAM|mem[147][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[147][3]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[147][1]~157_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[147][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[147][3] .is_wysiwyg = "true"; +defparam \RAM|mem[147][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X43_Y11_N38 +dffeas \RAM|mem[159][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[159][3]~160_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[159][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[159][3] .is_wysiwyg = "true"; +defparam \RAM|mem[159][3] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X43_Y11_N36 +cyclonev_lcell_comb \rd[3]~312 ( +// Equation(s): +// \rd[3]~312_combout = ( \RAM|mem[159][3]~q & ( \ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout & (\RAM|mem[151][3]~q )) # (\ALU|Mux29~3_combout & ((\RAM|mem[147][3]~q ))) ) ) ) # ( !\RAM|mem[159][3]~q & ( \ALU|Mux28~1_combout & ( +// (!\ALU|Mux29~3_combout & (\RAM|mem[151][3]~q )) # (\ALU|Mux29~3_combout & ((\RAM|mem[147][3]~q ))) ) ) ) # ( \RAM|mem[159][3]~q & ( !\ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout ) # (\RAM|mem[155][3]~q ) ) ) ) # ( !\RAM|mem[159][3]~q & ( +// !\ALU|Mux28~1_combout & ( (\RAM|mem[155][3]~q & \ALU|Mux29~3_combout ) ) ) ) + + .dataa(!\RAM|mem[155][3]~q ), + .datab(!\RAM|mem[151][3]~q ), + .datac(!\ALU|Mux29~3_combout ), + .datad(!\RAM|mem[147][3]~q ), + .datae(!\RAM|mem[159][3]~q ), + .dataf(!\ALU|Mux28~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[3]~312_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[3]~312 .extended_lut = "off"; +defparam \rd[3]~312 .lut_mask = 64'h0505F5F5303F303F; +defparam \rd[3]~312 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X51_Y11_N36 +cyclonev_lcell_comb \RAM|mem[152][3]~feeder ( +// Equation(s): +// \RAM|mem[152][3]~feeder_combout = ( \RAM|mem~259_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~259_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[152][3]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[152][3]~feeder .extended_lut = "off"; +defparam \RAM|mem[152][3]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[152][3]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X51_Y11_N37 +dffeas \RAM|mem[152][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[152][3]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[152][3]~147_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[152][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[152][3] .is_wysiwyg = "true"; +defparam \RAM|mem[152][3] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X51_Y8_N21 +cyclonev_lcell_comb \RAM|mem[144][3]~feeder ( +// Equation(s): +// \RAM|mem[144][3]~feeder_combout = ( \RAM|mem~259_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~259_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[144][3]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[144][3]~feeder .extended_lut = "off"; +defparam \RAM|mem[144][3]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[144][3]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X51_Y8_N22 +dffeas \RAM|mem[144][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[144][3]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[144][3]~145_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[144][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[144][3] .is_wysiwyg = "true"; +defparam \RAM|mem[144][3] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y4_N42 +cyclonev_lcell_comb \RAM|mem[156][3]~feeder ( +// Equation(s): +// \RAM|mem[156][3]~feeder_combout = ( \RAM|mem~259_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~259_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[156][3]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[156][3]~feeder .extended_lut = "off"; +defparam \RAM|mem[156][3]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[156][3]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X42_Y4_N44 +dffeas \RAM|mem[156][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[156][3]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[156][1]~148_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[156][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[156][3] .is_wysiwyg = "true"; +defparam \RAM|mem[156][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X43_Y7_N26 +dffeas \RAM|mem[148][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[148][1]~146_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[148][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[148][3] .is_wysiwyg = "true"; +defparam \RAM|mem[148][3] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X43_Y7_N24 +cyclonev_lcell_comb \rd[3]~309 ( +// Equation(s): +// \rd[3]~309_combout = ( \RAM|mem[148][3]~q & ( \ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout ) # (\RAM|mem[144][3]~q ) ) ) ) # ( !\RAM|mem[148][3]~q & ( \ALU|Mux28~1_combout & ( (\RAM|mem[144][3]~q & \ALU|Mux29~3_combout ) ) ) ) # ( +// \RAM|mem[148][3]~q & ( !\ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout & ((\RAM|mem[156][3]~q ))) # (\ALU|Mux29~3_combout & (\RAM|mem[152][3]~q )) ) ) ) # ( !\RAM|mem[148][3]~q & ( !\ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout & +// ((\RAM|mem[156][3]~q ))) # (\ALU|Mux29~3_combout & (\RAM|mem[152][3]~q )) ) ) ) + + .dataa(!\RAM|mem[152][3]~q ), + .datab(!\RAM|mem[144][3]~q ), + .datac(!\RAM|mem[156][3]~q ), + .datad(!\ALU|Mux29~3_combout ), + .datae(!\RAM|mem[148][3]~q ), + .dataf(!\ALU|Mux28~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[3]~309_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[3]~309 .extended_lut = "off"; +defparam \rd[3]~309 .lut_mask = 64'h0F550F550033FF33; +defparam \rd[3]~309 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X45_Y4_N22 +dffeas \RAM|mem[154][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[154][2]~155_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[154][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[154][3] .is_wysiwyg = "true"; +defparam \RAM|mem[154][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X46_Y6_N37 +dffeas \RAM|mem[158][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[158][4]~156_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[158][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[158][3] .is_wysiwyg = "true"; +defparam \RAM|mem[158][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X48_Y6_N52 +dffeas \RAM|mem[146][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[146][4]~153_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[146][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[146][3] .is_wysiwyg = "true"; +defparam \RAM|mem[146][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X43_Y7_N41 +dffeas \RAM|mem[150][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[150][3]~154_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[150][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[150][3] .is_wysiwyg = "true"; +defparam \RAM|mem[150][3] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y6_N24 +cyclonev_lcell_comb \rd[3]~311 ( +// Equation(s): +// \rd[3]~311_combout = ( \ALU|Mux28~1_combout & ( \ALU|Mux29~3_combout & ( \RAM|mem[146][3]~q ) ) ) # ( !\ALU|Mux28~1_combout & ( \ALU|Mux29~3_combout & ( \RAM|mem[154][3]~q ) ) ) # ( \ALU|Mux28~1_combout & ( !\ALU|Mux29~3_combout & ( +// \RAM|mem[150][3]~q ) ) ) # ( !\ALU|Mux28~1_combout & ( !\ALU|Mux29~3_combout & ( \RAM|mem[158][3]~q ) ) ) + + .dataa(!\RAM|mem[154][3]~q ), + .datab(!\RAM|mem[158][3]~q ), + .datac(!\RAM|mem[146][3]~q ), + .datad(!\RAM|mem[150][3]~q ), + .datae(!\ALU|Mux28~1_combout ), + .dataf(!\ALU|Mux29~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[3]~311_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[3]~311 .extended_lut = "off"; +defparam \rd[3]~311 .lut_mask = 64'h333300FF55550F0F; +defparam \rd[3]~311 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X43_Y7_N0 +cyclonev_lcell_comb \rd[3]~313 ( +// Equation(s): +// \rd[3]~313_combout = ( \rd[3]~311_combout & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout ) # (\rd[3]~309_combout ) ) ) ) # ( !\rd[3]~311_combout & ( \ALU|Mux31~3_combout & ( (\ALU|Mux30~1_combout & \rd[3]~309_combout ) ) ) ) # ( +// \rd[3]~311_combout & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & ((\rd[3]~312_combout ))) # (\ALU|Mux30~1_combout & (\rd[3]~310_combout )) ) ) ) # ( !\rd[3]~311_combout & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & +// ((\rd[3]~312_combout ))) # (\ALU|Mux30~1_combout & (\rd[3]~310_combout )) ) ) ) + + .dataa(!\ALU|Mux30~1_combout ), + .datab(!\rd[3]~310_combout ), + .datac(!\rd[3]~312_combout ), + .datad(!\rd[3]~309_combout ), + .datae(!\rd[3]~311_combout ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[3]~313_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[3]~313 .extended_lut = "off"; +defparam \rd[3]~313 .lut_mask = 64'h1B1B1B1B0055AAFF; +defparam \rd[3]~313 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X45_Y5_N13 +dffeas \RAM|mem[134][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[134][4]~138_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[134][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[134][3] .is_wysiwyg = "true"; +defparam \RAM|mem[134][3] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y5_N27 +cyclonev_lcell_comb \RAM|mem[130][3]~feeder ( +// Equation(s): +// \RAM|mem[130][3]~feeder_combout = ( \RAM|mem~259_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~259_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[130][3]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[130][3]~feeder .extended_lut = "off"; +defparam \RAM|mem[130][3]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[130][3]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X42_Y5_N28 +dffeas \RAM|mem[130][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[130][3]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[130][1]~137_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[130][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[130][3] .is_wysiwyg = "true"; +defparam \RAM|mem[130][3] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X53_Y9_N33 +cyclonev_lcell_comb \RAM|mem[138][3]~feeder ( +// Equation(s): +// \RAM|mem[138][3]~feeder_combout = ( \RAM|mem~259_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~259_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[138][3]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[138][3]~feeder .extended_lut = "off"; +defparam \RAM|mem[138][3]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[138][3]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X53_Y9_N34 +dffeas \RAM|mem[138][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[138][3]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[138][3]~139_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[138][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[138][3] .is_wysiwyg = "true"; +defparam \RAM|mem[138][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X46_Y11_N50 +dffeas \RAM|mem[142][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[142][1]~140_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[142][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[142][3] .is_wysiwyg = "true"; +defparam \RAM|mem[142][3] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X46_Y11_N48 +cyclonev_lcell_comb \rd[3]~306 ( +// Equation(s): +// \rd[3]~306_combout = ( \RAM|mem[142][3]~q & ( \ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout & (\RAM|mem[134][3]~q )) # (\ALU|Mux29~3_combout & ((\RAM|mem[130][3]~q ))) ) ) ) # ( !\RAM|mem[142][3]~q & ( \ALU|Mux28~1_combout & ( +// (!\ALU|Mux29~3_combout & (\RAM|mem[134][3]~q )) # (\ALU|Mux29~3_combout & ((\RAM|mem[130][3]~q ))) ) ) ) # ( \RAM|mem[142][3]~q & ( !\ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout ) # (\RAM|mem[138][3]~q ) ) ) ) # ( !\RAM|mem[142][3]~q & ( +// !\ALU|Mux28~1_combout & ( (\ALU|Mux29~3_combout & \RAM|mem[138][3]~q ) ) ) ) + + .dataa(!\RAM|mem[134][3]~q ), + .datab(!\RAM|mem[130][3]~q ), + .datac(!\ALU|Mux29~3_combout ), + .datad(!\RAM|mem[138][3]~q ), + .datae(!\RAM|mem[142][3]~q ), + .dataf(!\ALU|Mux28~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[3]~306_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[3]~306 .extended_lut = "off"; +defparam \rd[3]~306 .lut_mask = 64'h000FF0FF53535353; +defparam \rd[3]~306 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X53_Y9_N57 +cyclonev_lcell_comb \RAM|mem[136][3]~feeder ( +// Equation(s): +// \RAM|mem[136][3]~feeder_combout = ( \RAM|mem~259_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~259_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[136][3]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[136][3]~feeder .extended_lut = "off"; +defparam \RAM|mem[136][3]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[136][3]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X53_Y9_N59 +dffeas \RAM|mem[136][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[136][3]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[136][1]~131_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[136][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[136][3] .is_wysiwyg = "true"; +defparam \RAM|mem[136][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X46_Y5_N58 +dffeas \RAM|mem[140][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[140][4]~132_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[140][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[140][3] .is_wysiwyg = "true"; +defparam \RAM|mem[140][3] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X51_Y8_N9 +cyclonev_lcell_comb \RAM|mem[128][3]~feeder ( +// Equation(s): +// \RAM|mem[128][3]~feeder_combout = ( \RAM|mem~259_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~259_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[128][3]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[128][3]~feeder .extended_lut = "off"; +defparam \RAM|mem[128][3]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[128][3]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X51_Y8_N11 +dffeas \RAM|mem[128][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[128][3]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[128][4]~129_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[128][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[128][3] .is_wysiwyg = "true"; +defparam \RAM|mem[128][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X46_Y11_N32 +dffeas \RAM|mem[132][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[132][0]~130_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[132][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[132][3] .is_wysiwyg = "true"; +defparam \RAM|mem[132][3] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X46_Y11_N30 +cyclonev_lcell_comb \rd[3]~304 ( +// Equation(s): +// \rd[3]~304_combout = ( \RAM|mem[132][3]~q & ( \ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout ) # (\RAM|mem[128][3]~q ) ) ) ) # ( !\RAM|mem[132][3]~q & ( \ALU|Mux28~1_combout & ( (\RAM|mem[128][3]~q & \ALU|Mux29~3_combout ) ) ) ) # ( +// \RAM|mem[132][3]~q & ( !\ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout & ((\RAM|mem[140][3]~q ))) # (\ALU|Mux29~3_combout & (\RAM|mem[136][3]~q )) ) ) ) # ( !\RAM|mem[132][3]~q & ( !\ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout & +// ((\RAM|mem[140][3]~q ))) # (\ALU|Mux29~3_combout & (\RAM|mem[136][3]~q )) ) ) ) + + .dataa(!\RAM|mem[136][3]~q ), + .datab(!\RAM|mem[140][3]~q ), + .datac(!\RAM|mem[128][3]~q ), + .datad(!\ALU|Mux29~3_combout ), + .datae(!\RAM|mem[132][3]~q ), + .dataf(!\ALU|Mux28~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[3]~304_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[3]~304 .extended_lut = "off"; +defparam \rd[3]~304 .lut_mask = 64'h33553355000FFF0F; +defparam \rd[3]~304 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y5_N54 +cyclonev_lcell_comb \RAM|mem[129][3]~feeder ( +// Equation(s): +// \RAM|mem[129][3]~feeder_combout = ( \RAM|mem~259_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~259_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[129][3]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[129][3]~feeder .extended_lut = "off"; +defparam \RAM|mem[129][3]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[129][3]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X42_Y5_N55 +dffeas \RAM|mem[129][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[129][3]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[129][0]~133_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[129][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[129][3] .is_wysiwyg = "true"; +defparam \RAM|mem[129][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X48_Y14_N49 +dffeas \RAM|mem[141][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[141][4]~136_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[141][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[141][3] .is_wysiwyg = "true"; +defparam \RAM|mem[141][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X51_Y12_N32 +dffeas \RAM|mem[137][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[137][1]~135_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[137][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[137][3] .is_wysiwyg = "true"; +defparam \RAM|mem[137][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X46_Y11_N23 +dffeas \RAM|mem[133][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[133][1]~134_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[133][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[133][3] .is_wysiwyg = "true"; +defparam \RAM|mem[133][3] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X46_Y11_N21 +cyclonev_lcell_comb \rd[3]~305 ( +// Equation(s): +// \rd[3]~305_combout = ( \RAM|mem[133][3]~q & ( \ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout ) # (\RAM|mem[129][3]~q ) ) ) ) # ( !\RAM|mem[133][3]~q & ( \ALU|Mux28~1_combout & ( (\RAM|mem[129][3]~q & \ALU|Mux29~3_combout ) ) ) ) # ( +// \RAM|mem[133][3]~q & ( !\ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout & (\RAM|mem[141][3]~q )) # (\ALU|Mux29~3_combout & ((\RAM|mem[137][3]~q ))) ) ) ) # ( !\RAM|mem[133][3]~q & ( !\ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout & +// (\RAM|mem[141][3]~q )) # (\ALU|Mux29~3_combout & ((\RAM|mem[137][3]~q ))) ) ) ) + + .dataa(!\RAM|mem[129][3]~q ), + .datab(!\RAM|mem[141][3]~q ), + .datac(!\ALU|Mux29~3_combout ), + .datad(!\RAM|mem[137][3]~q ), + .datae(!\RAM|mem[133][3]~q ), + .dataf(!\ALU|Mux28~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[3]~305_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[3]~305 .extended_lut = "off"; +defparam \rd[3]~305 .lut_mask = 64'h303F303F0505F5F5; +defparam \rd[3]~305 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X43_Y13_N55 +dffeas \RAM|mem[135][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[135][3]~142_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[135][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[135][3] .is_wysiwyg = "true"; +defparam \RAM|mem[135][3] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X45_Y13_N12 +cyclonev_lcell_comb \RAM|mem[139][3]~feeder ( +// Equation(s): +// \RAM|mem[139][3]~feeder_combout = ( \RAM|mem~259_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~259_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[139][3]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[139][3]~feeder .extended_lut = "off"; +defparam \RAM|mem[139][3]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[139][3]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X45_Y13_N14 +dffeas \RAM|mem[139][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[139][3]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[139][3]~143_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[139][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[139][3] .is_wysiwyg = "true"; +defparam \RAM|mem[139][3] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X45_Y13_N30 +cyclonev_lcell_comb \RAM|mem[131][3]~feeder ( +// Equation(s): +// \RAM|mem[131][3]~feeder_combout = ( \RAM|mem~259_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~259_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[131][3]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[131][3]~feeder .extended_lut = "off"; +defparam \RAM|mem[131][3]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[131][3]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X45_Y13_N32 +dffeas \RAM|mem[131][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[131][3]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[131][0]~141_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[131][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[131][3] .is_wysiwyg = "true"; +defparam \RAM|mem[131][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X45_Y13_N44 +dffeas \RAM|mem[143][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[143][3]~144_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[143][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[143][3] .is_wysiwyg = "true"; +defparam \RAM|mem[143][3] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X45_Y13_N42 +cyclonev_lcell_comb \rd[3]~307 ( +// Equation(s): +// \rd[3]~307_combout = ( \RAM|mem[143][3]~q & ( \ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout & (\RAM|mem[135][3]~q )) # (\ALU|Mux29~3_combout & ((\RAM|mem[131][3]~q ))) ) ) ) # ( !\RAM|mem[143][3]~q & ( \ALU|Mux28~1_combout & ( +// (!\ALU|Mux29~3_combout & (\RAM|mem[135][3]~q )) # (\ALU|Mux29~3_combout & ((\RAM|mem[131][3]~q ))) ) ) ) # ( \RAM|mem[143][3]~q & ( !\ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout ) # (\RAM|mem[139][3]~q ) ) ) ) # ( !\RAM|mem[143][3]~q & ( +// !\ALU|Mux28~1_combout & ( (\RAM|mem[139][3]~q & \ALU|Mux29~3_combout ) ) ) ) + + .dataa(!\RAM|mem[135][3]~q ), + .datab(!\RAM|mem[139][3]~q ), + .datac(!\ALU|Mux29~3_combout ), + .datad(!\RAM|mem[131][3]~q ), + .datae(!\RAM|mem[143][3]~q ), + .dataf(!\ALU|Mux28~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[3]~307_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[3]~307 .extended_lut = "off"; +defparam \rd[3]~307 .lut_mask = 64'h0303F3F3505F505F; +defparam \rd[3]~307 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X46_Y11_N54 +cyclonev_lcell_comb \rd[3]~308 ( +// Equation(s): +// \rd[3]~308_combout = ( \rd[3]~307_combout & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & (\rd[3]~306_combout )) # (\ALU|Mux30~1_combout & ((\rd[3]~304_combout ))) ) ) ) # ( !\rd[3]~307_combout & ( \ALU|Mux31~3_combout & ( +// (!\ALU|Mux30~1_combout & (\rd[3]~306_combout )) # (\ALU|Mux30~1_combout & ((\rd[3]~304_combout ))) ) ) ) # ( \rd[3]~307_combout & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout ) # (\rd[3]~305_combout ) ) ) ) # ( !\rd[3]~307_combout & ( +// !\ALU|Mux31~3_combout & ( (\rd[3]~305_combout & \ALU|Mux30~1_combout ) ) ) ) + + .dataa(!\rd[3]~306_combout ), + .datab(!\rd[3]~304_combout ), + .datac(!\rd[3]~305_combout ), + .datad(!\ALU|Mux30~1_combout ), + .datae(!\rd[3]~307_combout ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[3]~308_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[3]~308 .extended_lut = "off"; +defparam \rd[3]~308 .lut_mask = 64'h000FFF0F55335533; +defparam \rd[3]~308 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X43_Y7_N30 +cyclonev_lcell_comb \rd[3]~324 ( +// Equation(s): +// \rd[3]~324_combout = ( \rd[3]~313_combout & ( \rd[3]~308_combout & ( ((!\ALU|Mux27~1_combout & (\rd[3]~323_combout )) # (\ALU|Mux27~1_combout & ((\rd[3]~318_combout )))) # (\ALU|Mux26~1_combout ) ) ) ) # ( !\rd[3]~313_combout & ( \rd[3]~308_combout +// & ( (!\ALU|Mux26~1_combout & ((!\ALU|Mux27~1_combout & (\rd[3]~323_combout )) # (\ALU|Mux27~1_combout & ((\rd[3]~318_combout ))))) # (\ALU|Mux26~1_combout & (\ALU|Mux27~1_combout )) ) ) ) # ( \rd[3]~313_combout & ( !\rd[3]~308_combout & ( +// (!\ALU|Mux26~1_combout & ((!\ALU|Mux27~1_combout & (\rd[3]~323_combout )) # (\ALU|Mux27~1_combout & ((\rd[3]~318_combout ))))) # (\ALU|Mux26~1_combout & (!\ALU|Mux27~1_combout )) ) ) ) # ( !\rd[3]~313_combout & ( !\rd[3]~308_combout & ( +// (!\ALU|Mux26~1_combout & ((!\ALU|Mux27~1_combout & (\rd[3]~323_combout )) # (\ALU|Mux27~1_combout & ((\rd[3]~318_combout ))))) ) ) ) + + .dataa(!\ALU|Mux26~1_combout ), + .datab(!\ALU|Mux27~1_combout ), + .datac(!\rd[3]~323_combout ), + .datad(!\rd[3]~318_combout ), + .datae(!\rd[3]~313_combout ), + .dataf(!\rd[3]~308_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[3]~324_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[3]~324 .extended_lut = "off"; +defparam \rd[3]~324 .lut_mask = 64'h082A4C6E193B5D7F; +defparam \rd[3]~324 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X43_Y7_N42 +cyclonev_lcell_comb \rd[3]~346 ( +// Equation(s): +// \rd[3]~346_combout = ( \rd[3]~345_combout & ( \rd[3]~324_combout & ( (!\CONTROL_UNIT|M2R[0]~0_combout & ((!\ALU|Mux28~1_combout ))) # (\CONTROL_UNIT|M2R[0]~0_combout & (!\ALU|Mux24~1_combout )) ) ) ) # ( !\rd[3]~345_combout & ( \rd[3]~324_combout & +// ( (!\CONTROL_UNIT|M2R[0]~0_combout & (((!\ALU|Mux28~1_combout )))) # (\CONTROL_UNIT|M2R[0]~0_combout & (!\ALU|Mux24~1_combout & ((\ALU|Mux25~1_combout )))) ) ) ) # ( \rd[3]~345_combout & ( !\rd[3]~324_combout & ( (!\CONTROL_UNIT|M2R[0]~0_combout & +// (((!\ALU|Mux28~1_combout )))) # (\CONTROL_UNIT|M2R[0]~0_combout & (!\ALU|Mux24~1_combout & ((!\ALU|Mux25~1_combout )))) ) ) ) # ( !\rd[3]~345_combout & ( !\rd[3]~324_combout & ( (!\CONTROL_UNIT|M2R[0]~0_combout & !\ALU|Mux28~1_combout ) ) ) ) + + .dataa(!\CONTROL_UNIT|M2R[0]~0_combout ), + .datab(!\ALU|Mux24~1_combout ), + .datac(!\ALU|Mux28~1_combout ), + .datad(!\ALU|Mux25~1_combout ), + .datae(!\rd[3]~345_combout ), + .dataf(!\rd[3]~324_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[3]~346_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[3]~346 .extended_lut = "off"; +defparam \rd[3]~346 .lut_mask = 64'hA0A0E4A0A0E4E4E4; +defparam \rd[3]~346 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X43_Y13_N16 +dffeas \RAM|mem[107][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[107][2]~44_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[107][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[107][3] .is_wysiwyg = "true"; +defparam \RAM|mem[107][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X45_Y10_N47 +dffeas \RAM|mem[75][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[75][2]~36_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[75][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[75][3] .is_wysiwyg = "true"; +defparam \RAM|mem[75][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X45_Y10_N8 +dffeas \RAM|mem[123][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[123][1]~48_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[123][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[123][3] .is_wysiwyg = "true"; +defparam \RAM|mem[123][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X45_Y10_N41 +dffeas \RAM|mem[91][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[91][0]~40_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[91][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[91][3] .is_wysiwyg = "true"; +defparam \RAM|mem[91][3] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X45_Y10_N6 +cyclonev_lcell_comb \rd[3]~275 ( +// Equation(s): +// \rd[3]~275_combout = ( \RAM|mem[123][3]~q & ( \RAM|mem[91][3]~q & ( (!\ALU|Mux27~1_combout ) # ((!\ALU|Mux26~1_combout & (\RAM|mem[107][3]~q )) # (\ALU|Mux26~1_combout & ((\RAM|mem[75][3]~q )))) ) ) ) # ( !\RAM|mem[123][3]~q & ( \RAM|mem[91][3]~q & +// ( (!\ALU|Mux27~1_combout & (((\ALU|Mux26~1_combout )))) # (\ALU|Mux27~1_combout & ((!\ALU|Mux26~1_combout & (\RAM|mem[107][3]~q )) # (\ALU|Mux26~1_combout & ((\RAM|mem[75][3]~q ))))) ) ) ) # ( \RAM|mem[123][3]~q & ( !\RAM|mem[91][3]~q & ( +// (!\ALU|Mux27~1_combout & (((!\ALU|Mux26~1_combout )))) # (\ALU|Mux27~1_combout & ((!\ALU|Mux26~1_combout & (\RAM|mem[107][3]~q )) # (\ALU|Mux26~1_combout & ((\RAM|mem[75][3]~q ))))) ) ) ) # ( !\RAM|mem[123][3]~q & ( !\RAM|mem[91][3]~q & ( +// (\ALU|Mux27~1_combout & ((!\ALU|Mux26~1_combout & (\RAM|mem[107][3]~q )) # (\ALU|Mux26~1_combout & ((\RAM|mem[75][3]~q ))))) ) ) ) + + .dataa(!\RAM|mem[107][3]~q ), + .datab(!\RAM|mem[75][3]~q ), + .datac(!\ALU|Mux27~1_combout ), + .datad(!\ALU|Mux26~1_combout ), + .datae(!\RAM|mem[123][3]~q ), + .dataf(!\RAM|mem[91][3]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[3]~275_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[3]~275 .extended_lut = "off"; +defparam \rd[3]~275 .lut_mask = 64'h0503F50305F3F5F3; +defparam \rd[3]~275 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y14_N57 +cyclonev_lcell_comb \RAM|mem[105][3]~feeder ( +// Equation(s): +// \RAM|mem[105][3]~feeder_combout = ( \RAM|mem~259_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~259_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[105][3]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[105][3]~feeder .extended_lut = "off"; +defparam \RAM|mem[105][3]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[105][3]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X42_Y14_N58 +dffeas \RAM|mem[105][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[105][3]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[105][0]~42_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[105][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[105][3] .is_wysiwyg = "true"; +defparam \RAM|mem[105][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X51_Y13_N17 +dffeas \RAM|mem[73][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[73][1]~34_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[73][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[73][3] .is_wysiwyg = "true"; +defparam \RAM|mem[73][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X48_Y13_N43 +dffeas \RAM|mem[121][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[121][2]~46_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[121][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[121][3] .is_wysiwyg = "true"; +defparam \RAM|mem[121][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X51_Y13_N58 +dffeas \RAM|mem[89][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[89][2]~38_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[89][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[89][3] .is_wysiwyg = "true"; +defparam \RAM|mem[89][3] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X45_Y7_N45 +cyclonev_lcell_comb \rd[3]~273 ( +// Equation(s): +// \rd[3]~273_combout = ( \RAM|mem[89][3]~q & ( \ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout & (\RAM|mem[105][3]~q )) # (\ALU|Mux26~1_combout & ((\RAM|mem[73][3]~q ))) ) ) ) # ( !\RAM|mem[89][3]~q & ( \ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout +// & (\RAM|mem[105][3]~q )) # (\ALU|Mux26~1_combout & ((\RAM|mem[73][3]~q ))) ) ) ) # ( \RAM|mem[89][3]~q & ( !\ALU|Mux27~1_combout & ( (\RAM|mem[121][3]~q ) # (\ALU|Mux26~1_combout ) ) ) ) # ( !\RAM|mem[89][3]~q & ( !\ALU|Mux27~1_combout & ( +// (!\ALU|Mux26~1_combout & \RAM|mem[121][3]~q ) ) ) ) + + .dataa(!\RAM|mem[105][3]~q ), + .datab(!\RAM|mem[73][3]~q ), + .datac(!\ALU|Mux26~1_combout ), + .datad(!\RAM|mem[121][3]~q ), + .datae(!\RAM|mem[89][3]~q ), + .dataf(!\ALU|Mux27~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[3]~273_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[3]~273 .extended_lut = "off"; +defparam \rd[3]~273 .lut_mask = 64'h00F00FFF53535353; +defparam \rd[3]~273 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y14_N3 +cyclonev_lcell_comb \RAM|mem[106][3]~feeder ( +// Equation(s): +// \RAM|mem[106][3]~feeder_combout = ( \RAM|mem~259_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~259_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[106][3]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[106][3]~feeder .extended_lut = "off"; +defparam \RAM|mem[106][3]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[106][3]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X42_Y14_N4 +dffeas \RAM|mem[106][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[106][3]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[106][0]~43_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[106][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[106][3] .is_wysiwyg = "true"; +defparam \RAM|mem[106][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X49_Y8_N17 +dffeas \RAM|mem[122][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[122][2]~47_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[122][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[122][3] .is_wysiwyg = "true"; +defparam \RAM|mem[122][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X50_Y8_N4 +dffeas \RAM|mem[74][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[74][1]~35_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[74][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[74][3] .is_wysiwyg = "true"; +defparam \RAM|mem[74][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X49_Y6_N25 +dffeas \RAM|mem[90][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[90][0]~39_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[90][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[90][3] .is_wysiwyg = "true"; +defparam \RAM|mem[90][3] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X48_Y7_N48 +cyclonev_lcell_comb \rd[3]~274 ( +// Equation(s): +// \rd[3]~274_combout = ( \ALU|Mux27~1_combout & ( \ALU|Mux26~1_combout & ( \RAM|mem[74][3]~q ) ) ) # ( !\ALU|Mux27~1_combout & ( \ALU|Mux26~1_combout & ( \RAM|mem[90][3]~q ) ) ) # ( \ALU|Mux27~1_combout & ( !\ALU|Mux26~1_combout & ( +// \RAM|mem[106][3]~q ) ) ) # ( !\ALU|Mux27~1_combout & ( !\ALU|Mux26~1_combout & ( \RAM|mem[122][3]~q ) ) ) + + .dataa(!\RAM|mem[106][3]~q ), + .datab(!\RAM|mem[122][3]~q ), + .datac(!\RAM|mem[74][3]~q ), + .datad(!\RAM|mem[90][3]~q ), + .datae(!\ALU|Mux27~1_combout ), + .dataf(!\ALU|Mux26~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[3]~274_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[3]~274 .extended_lut = "off"; +defparam \rd[3]~274 .lut_mask = 64'h3333555500FF0F0F; +defparam \rd[3]~274 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X53_Y13_N56 +dffeas \RAM|mem[104][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[104][0]~41_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[104][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[104][3] .is_wysiwyg = "true"; +defparam \RAM|mem[104][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X54_Y9_N59 +dffeas \RAM|mem[88][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[88][4]~37_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[88][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[88][3] .is_wysiwyg = "true"; +defparam \RAM|mem[88][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X54_Y9_N47 +dffeas \RAM|mem[72][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[72][3]~33_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[72][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[72][3] .is_wysiwyg = "true"; +defparam \RAM|mem[72][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X54_Y9_N50 +dffeas \RAM|mem[120][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[120][0]~45_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[120][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[120][3] .is_wysiwyg = "true"; +defparam \RAM|mem[120][3] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X54_Y9_N48 +cyclonev_lcell_comb \rd[3]~272 ( +// Equation(s): +// \rd[3]~272_combout = ( \RAM|mem[120][3]~q & ( \ALU|Mux26~1_combout & ( (!\ALU|Mux27~1_combout & (\RAM|mem[88][3]~q )) # (\ALU|Mux27~1_combout & ((\RAM|mem[72][3]~q ))) ) ) ) # ( !\RAM|mem[120][3]~q & ( \ALU|Mux26~1_combout & ( +// (!\ALU|Mux27~1_combout & (\RAM|mem[88][3]~q )) # (\ALU|Mux27~1_combout & ((\RAM|mem[72][3]~q ))) ) ) ) # ( \RAM|mem[120][3]~q & ( !\ALU|Mux26~1_combout & ( (!\ALU|Mux27~1_combout ) # (\RAM|mem[104][3]~q ) ) ) ) # ( !\RAM|mem[120][3]~q & ( +// !\ALU|Mux26~1_combout & ( (\RAM|mem[104][3]~q & \ALU|Mux27~1_combout ) ) ) ) + + .dataa(!\RAM|mem[104][3]~q ), + .datab(!\RAM|mem[88][3]~q ), + .datac(!\ALU|Mux27~1_combout ), + .datad(!\RAM|mem[72][3]~q ), + .datae(!\RAM|mem[120][3]~q ), + .dataf(!\ALU|Mux26~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[3]~272_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[3]~272 .extended_lut = "off"; +defparam \rd[3]~272 .lut_mask = 64'h0505F5F5303F303F; +defparam \rd[3]~272 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X46_Y7_N48 +cyclonev_lcell_comb \rd[3]~276 ( +// Equation(s): +// \rd[3]~276_combout = ( \rd[3]~272_combout & ( \ALU|Mux31~3_combout & ( (\rd[3]~274_combout ) # (\ALU|Mux30~1_combout ) ) ) ) # ( !\rd[3]~272_combout & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & \rd[3]~274_combout ) ) ) ) # ( +// \rd[3]~272_combout & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & (\rd[3]~275_combout )) # (\ALU|Mux30~1_combout & ((\rd[3]~273_combout ))) ) ) ) # ( !\rd[3]~272_combout & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & +// (\rd[3]~275_combout )) # (\ALU|Mux30~1_combout & ((\rd[3]~273_combout ))) ) ) ) + + .dataa(!\rd[3]~275_combout ), + .datab(!\ALU|Mux30~1_combout ), + .datac(!\rd[3]~273_combout ), + .datad(!\rd[3]~274_combout ), + .datae(!\rd[3]~272_combout ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[3]~276_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[3]~276 .extended_lut = "off"; +defparam \rd[3]~276 .lut_mask = 64'h4747474700CC33FF; +defparam \rd[3]~276 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X53_Y13_N49 +dffeas \RAM|mem[117][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[117][2]~30_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[117][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[117][3] .is_wysiwyg = "true"; +defparam \RAM|mem[117][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X50_Y9_N16 +dffeas \RAM|mem[118][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[118][4]~31_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[118][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[118][3] .is_wysiwyg = "true"; +defparam \RAM|mem[118][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X50_Y11_N26 +dffeas \RAM|mem[116][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[116][0]~29_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[116][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[116][3] .is_wysiwyg = "true"; +defparam \RAM|mem[116][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X46_Y8_N50 +dffeas \RAM|mem[119][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[119][4]~32_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[119][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[119][3] .is_wysiwyg = "true"; +defparam \RAM|mem[119][3] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X46_Y8_N48 +cyclonev_lcell_comb \rd[3]~270 ( +// Equation(s): +// \rd[3]~270_combout = ( \RAM|mem[119][3]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & (\RAM|mem[118][3]~q )) # (\ALU|Mux30~1_combout & ((\RAM|mem[116][3]~q ))) ) ) ) # ( !\RAM|mem[119][3]~q & ( \ALU|Mux31~3_combout & ( +// (!\ALU|Mux30~1_combout & (\RAM|mem[118][3]~q )) # (\ALU|Mux30~1_combout & ((\RAM|mem[116][3]~q ))) ) ) ) # ( \RAM|mem[119][3]~q & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout ) # (\RAM|mem[117][3]~q ) ) ) ) # ( !\RAM|mem[119][3]~q & ( +// !\ALU|Mux31~3_combout & ( (\ALU|Mux30~1_combout & \RAM|mem[117][3]~q ) ) ) ) + + .dataa(!\ALU|Mux30~1_combout ), + .datab(!\RAM|mem[117][3]~q ), + .datac(!\RAM|mem[118][3]~q ), + .datad(!\RAM|mem[116][3]~q ), + .datae(!\RAM|mem[119][3]~q ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[3]~270_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[3]~270 .extended_lut = "off"; +defparam \rd[3]~270 .lut_mask = 64'h1111BBBB0A5F0A5F; +defparam \rd[3]~270 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X50_Y10_N58 +dffeas \RAM|mem[85][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[85][1]~22_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[85][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[85][3] .is_wysiwyg = "true"; +defparam \RAM|mem[85][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X51_Y7_N46 +dffeas \RAM|mem[86][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[86][3]~23_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[86][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[86][3] .is_wysiwyg = "true"; +defparam \RAM|mem[86][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X50_Y10_N52 +dffeas \RAM|mem[84][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[84][1]~21_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[84][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[84][3] .is_wysiwyg = "true"; +defparam \RAM|mem[84][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X42_Y7_N44 +dffeas \RAM|mem[87][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[87][4]~24_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[87][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[87][3] .is_wysiwyg = "true"; +defparam \RAM|mem[87][3] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y7_N42 +cyclonev_lcell_comb \rd[3]~268 ( +// Equation(s): +// \rd[3]~268_combout = ( \RAM|mem[87][3]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & (\RAM|mem[86][3]~q )) # (\ALU|Mux30~1_combout & ((\RAM|mem[84][3]~q ))) ) ) ) # ( !\RAM|mem[87][3]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout +// & (\RAM|mem[86][3]~q )) # (\ALU|Mux30~1_combout & ((\RAM|mem[84][3]~q ))) ) ) ) # ( \RAM|mem[87][3]~q & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout ) # (\RAM|mem[85][3]~q ) ) ) ) # ( !\RAM|mem[87][3]~q & ( !\ALU|Mux31~3_combout & ( +// (\ALU|Mux30~1_combout & \RAM|mem[85][3]~q ) ) ) ) + + .dataa(!\ALU|Mux30~1_combout ), + .datab(!\RAM|mem[85][3]~q ), + .datac(!\RAM|mem[86][3]~q ), + .datad(!\RAM|mem[84][3]~q ), + .datae(!\RAM|mem[87][3]~q ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[3]~268_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[3]~268 .extended_lut = "off"; +defparam \rd[3]~268 .lut_mask = 64'h1111BBBB0A5F0A5F; +defparam \rd[3]~268 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X55_Y8_N12 +cyclonev_lcell_comb \RAM|mem[69][3]~feeder ( +// Equation(s): +// \RAM|mem[69][3]~feeder_combout = ( \RAM|mem~259_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~259_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[69][3]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[69][3]~feeder .extended_lut = "off"; +defparam \RAM|mem[69][3]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[69][3]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X55_Y8_N13 +dffeas \RAM|mem[69][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[69][3]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[69][1]~18_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[69][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[69][3] .is_wysiwyg = "true"; +defparam \RAM|mem[69][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X50_Y11_N7 +dffeas \RAM|mem[68][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[68][0]~17_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[68][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[68][3] .is_wysiwyg = "true"; +defparam \RAM|mem[68][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X51_Y7_N37 +dffeas \RAM|mem[70][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[70][4]~19_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[70][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[70][3] .is_wysiwyg = "true"; +defparam \RAM|mem[70][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X42_Y7_N2 +dffeas \RAM|mem[71][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[71][3]~20_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[71][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[71][3] .is_wysiwyg = "true"; +defparam \RAM|mem[71][3] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y7_N0 +cyclonev_lcell_comb \rd[3]~267 ( +// Equation(s): +// \rd[3]~267_combout = ( \RAM|mem[71][3]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & ((\RAM|mem[70][3]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[68][3]~q )) ) ) ) # ( !\RAM|mem[71][3]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout +// & ((\RAM|mem[70][3]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[68][3]~q )) ) ) ) # ( \RAM|mem[71][3]~q & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout ) # (\RAM|mem[69][3]~q ) ) ) ) # ( !\RAM|mem[71][3]~q & ( !\ALU|Mux31~3_combout & ( +// (\RAM|mem[69][3]~q & \ALU|Mux30~1_combout ) ) ) ) + + .dataa(!\RAM|mem[69][3]~q ), + .datab(!\RAM|mem[68][3]~q ), + .datac(!\ALU|Mux30~1_combout ), + .datad(!\RAM|mem[70][3]~q ), + .datae(!\RAM|mem[71][3]~q ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[3]~267_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[3]~267 .extended_lut = "off"; +defparam \rd[3]~267 .lut_mask = 64'h0505F5F503F303F3; +defparam \rd[3]~267 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X47_Y6_N35 +dffeas \RAM|mem[100][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[100][0]~25_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[100][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[100][3] .is_wysiwyg = "true"; +defparam \RAM|mem[100][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X54_Y13_N44 +dffeas \RAM|mem[102][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[102][1]~27_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[102][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[102][3] .is_wysiwyg = "true"; +defparam \RAM|mem[102][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X49_Y12_N49 +dffeas \RAM|mem[101][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[101][1]~26_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[101][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[101][3] .is_wysiwyg = "true"; +defparam \RAM|mem[101][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X42_Y7_N14 +dffeas \RAM|mem[103][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[103][1]~28_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[103][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[103][3] .is_wysiwyg = "true"; +defparam \RAM|mem[103][3] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y7_N12 +cyclonev_lcell_comb \rd[3]~269 ( +// Equation(s): +// \rd[3]~269_combout = ( \RAM|mem[103][3]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & ((\RAM|mem[102][3]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[100][3]~q )) ) ) ) # ( !\RAM|mem[103][3]~q & ( \ALU|Mux31~3_combout & ( +// (!\ALU|Mux30~1_combout & ((\RAM|mem[102][3]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[100][3]~q )) ) ) ) # ( \RAM|mem[103][3]~q & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout ) # (\RAM|mem[101][3]~q ) ) ) ) # ( !\RAM|mem[103][3]~q & ( +// !\ALU|Mux31~3_combout & ( (\ALU|Mux30~1_combout & \RAM|mem[101][3]~q ) ) ) ) + + .dataa(!\RAM|mem[100][3]~q ), + .datab(!\RAM|mem[102][3]~q ), + .datac(!\ALU|Mux30~1_combout ), + .datad(!\RAM|mem[101][3]~q ), + .datae(!\RAM|mem[103][3]~q ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[3]~269_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[3]~269 .extended_lut = "off"; +defparam \rd[3]~269 .lut_mask = 64'h000FF0FF35353535; +defparam \rd[3]~269 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X46_Y7_N54 +cyclonev_lcell_comb \rd[3]~271 ( +// Equation(s): +// \rd[3]~271_combout = ( \rd[3]~267_combout & ( \rd[3]~269_combout & ( ((!\ALU|Mux26~1_combout & (\rd[3]~270_combout )) # (\ALU|Mux26~1_combout & ((\rd[3]~268_combout )))) # (\ALU|Mux27~1_combout ) ) ) ) # ( !\rd[3]~267_combout & ( \rd[3]~269_combout +// & ( (!\ALU|Mux27~1_combout & ((!\ALU|Mux26~1_combout & (\rd[3]~270_combout )) # (\ALU|Mux26~1_combout & ((\rd[3]~268_combout ))))) # (\ALU|Mux27~1_combout & (!\ALU|Mux26~1_combout )) ) ) ) # ( \rd[3]~267_combout & ( !\rd[3]~269_combout & ( +// (!\ALU|Mux27~1_combout & ((!\ALU|Mux26~1_combout & (\rd[3]~270_combout )) # (\ALU|Mux26~1_combout & ((\rd[3]~268_combout ))))) # (\ALU|Mux27~1_combout & (\ALU|Mux26~1_combout )) ) ) ) # ( !\rd[3]~267_combout & ( !\rd[3]~269_combout & ( +// (!\ALU|Mux27~1_combout & ((!\ALU|Mux26~1_combout & (\rd[3]~270_combout )) # (\ALU|Mux26~1_combout & ((\rd[3]~268_combout ))))) ) ) ) + + .dataa(!\ALU|Mux27~1_combout ), + .datab(!\ALU|Mux26~1_combout ), + .datac(!\rd[3]~270_combout ), + .datad(!\rd[3]~268_combout ), + .datae(!\rd[3]~267_combout ), + .dataf(!\rd[3]~269_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[3]~271_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[3]~271 .extended_lut = "off"; +defparam \rd[3]~271 .lut_mask = 64'h082A193B4C6E5D7F; +defparam \rd[3]~271 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X55_Y11_N48 +cyclonev_lcell_comb \RAM|mem[93][3]~feeder ( +// Equation(s): +// \RAM|mem[93][3]~feeder_combout = ( \RAM|mem~259_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~259_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[93][3]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[93][3]~feeder .extended_lut = "off"; +defparam \RAM|mem[93][3]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[93][3]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X55_Y11_N49 +dffeas \RAM|mem[93][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[93][3]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[93][2]~54_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[93][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[93][3] .is_wysiwyg = "true"; +defparam \RAM|mem[93][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X50_Y10_N40 +dffeas \RAM|mem[94][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[94][4]~58_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[94][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[94][3] .is_wysiwyg = "true"; +defparam \RAM|mem[94][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X55_Y10_N10 +dffeas \RAM|mem[92][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[92][2]~50_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[92][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[92][3] .is_wysiwyg = "true"; +defparam \RAM|mem[92][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X46_Y7_N44 +dffeas \RAM|mem[95][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[95][4]~62_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[95][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[95][3] .is_wysiwyg = "true"; +defparam \RAM|mem[95][3] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X46_Y7_N42 +cyclonev_lcell_comb \rd[3]~278 ( +// Equation(s): +// \rd[3]~278_combout = ( \RAM|mem[95][3]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & (\RAM|mem[94][3]~q )) # (\ALU|Mux30~1_combout & ((\RAM|mem[92][3]~q ))) ) ) ) # ( !\RAM|mem[95][3]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout +// & (\RAM|mem[94][3]~q )) # (\ALU|Mux30~1_combout & ((\RAM|mem[92][3]~q ))) ) ) ) # ( \RAM|mem[95][3]~q & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout ) # (\RAM|mem[93][3]~q ) ) ) ) # ( !\RAM|mem[95][3]~q & ( !\ALU|Mux31~3_combout & ( +// (\RAM|mem[93][3]~q & \ALU|Mux30~1_combout ) ) ) ) + + .dataa(!\RAM|mem[93][3]~q ), + .datab(!\RAM|mem[94][3]~q ), + .datac(!\RAM|mem[92][3]~q ), + .datad(!\ALU|Mux30~1_combout ), + .datae(!\RAM|mem[95][3]~q ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[3]~278_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[3]~278 .extended_lut = "off"; +defparam \rd[3]~278 .lut_mask = 64'h0055FF55330F330F; +defparam \rd[3]~278 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X54_Y8_N52 +dffeas \RAM|mem[78][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[78][0]~57_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[78][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[78][3] .is_wysiwyg = "true"; +defparam \RAM|mem[78][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X55_Y10_N22 +dffeas \RAM|mem[76][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[76][2]~49_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[76][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[76][3] .is_wysiwyg = "true"; +defparam \RAM|mem[76][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X55_Y11_N59 +dffeas \RAM|mem[77][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[77][3]~53_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[77][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[77][3] .is_wysiwyg = "true"; +defparam \RAM|mem[77][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X46_Y7_N14 +dffeas \RAM|mem[79][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[79][0]~61_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[79][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[79][3] .is_wysiwyg = "true"; +defparam \RAM|mem[79][3] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X46_Y7_N12 +cyclonev_lcell_comb \rd[3]~277 ( +// Equation(s): +// \rd[3]~277_combout = ( \RAM|mem[79][3]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & (\RAM|mem[78][3]~q )) # (\ALU|Mux30~1_combout & ((\RAM|mem[76][3]~q ))) ) ) ) # ( !\RAM|mem[79][3]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout +// & (\RAM|mem[78][3]~q )) # (\ALU|Mux30~1_combout & ((\RAM|mem[76][3]~q ))) ) ) ) # ( \RAM|mem[79][3]~q & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout ) # (\RAM|mem[77][3]~q ) ) ) ) # ( !\RAM|mem[79][3]~q & ( !\ALU|Mux31~3_combout & ( +// (\RAM|mem[77][3]~q & \ALU|Mux30~1_combout ) ) ) ) + + .dataa(!\RAM|mem[78][3]~q ), + .datab(!\RAM|mem[76][3]~q ), + .datac(!\RAM|mem[77][3]~q ), + .datad(!\ALU|Mux30~1_combout ), + .datae(!\RAM|mem[79][3]~q ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[3]~277_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[3]~277 .extended_lut = "off"; +defparam \rd[3]~277 .lut_mask = 64'h000FFF0F55335533; +defparam \rd[3]~277 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X55_Y10_N28 +dffeas \RAM|mem[124][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[124][2]~52_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[124][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[124][3] .is_wysiwyg = "true"; +defparam \RAM|mem[124][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X50_Y9_N52 +dffeas \RAM|mem[126][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[126][1]~60_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[126][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[126][3] .is_wysiwyg = "true"; +defparam \RAM|mem[126][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X47_Y13_N28 +dffeas \RAM|mem[125][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[125][4]~56_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[125][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[125][3] .is_wysiwyg = "true"; +defparam \RAM|mem[125][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X46_Y7_N38 +dffeas \RAM|mem[127][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[127][1]~64_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[127][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[127][3] .is_wysiwyg = "true"; +defparam \RAM|mem[127][3] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X46_Y7_N36 +cyclonev_lcell_comb \rd[3]~280 ( +// Equation(s): +// \rd[3]~280_combout = ( \RAM|mem[127][3]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & ((\RAM|mem[126][3]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[124][3]~q )) ) ) ) # ( !\RAM|mem[127][3]~q & ( \ALU|Mux31~3_combout & ( +// (!\ALU|Mux30~1_combout & ((\RAM|mem[126][3]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[124][3]~q )) ) ) ) # ( \RAM|mem[127][3]~q & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout ) # (\RAM|mem[125][3]~q ) ) ) ) # ( !\RAM|mem[127][3]~q & ( +// !\ALU|Mux31~3_combout & ( (\RAM|mem[125][3]~q & \ALU|Mux30~1_combout ) ) ) ) + + .dataa(!\RAM|mem[124][3]~q ), + .datab(!\RAM|mem[126][3]~q ), + .datac(!\RAM|mem[125][3]~q ), + .datad(!\ALU|Mux30~1_combout ), + .datae(!\RAM|mem[127][3]~q ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[3]~280_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[3]~280 .extended_lut = "off"; +defparam \rd[3]~280 .lut_mask = 64'h000FFF0F33553355; +defparam \rd[3]~280 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X48_Y9_N58 +dffeas \RAM|mem[110][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[110][0]~59_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[110][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[110][3] .is_wysiwyg = "true"; +defparam \RAM|mem[110][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X53_Y7_N22 +dffeas \RAM|mem[109][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[109][1]~55_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[109][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[109][3] .is_wysiwyg = "true"; +defparam \RAM|mem[109][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X48_Y9_N49 +dffeas \RAM|mem[111][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[111][2]~63_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[111][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[111][3] .is_wysiwyg = "true"; +defparam \RAM|mem[111][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X48_Y9_N4 +dffeas \RAM|mem[108][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[108][3]~51_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[108][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[108][3] .is_wysiwyg = "true"; +defparam \RAM|mem[108][3] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X47_Y6_N18 +cyclonev_lcell_comb \rd[3]~279 ( +// Equation(s): +// \rd[3]~279_combout = ( \ALU|Mux30~1_combout & ( \ALU|Mux31~3_combout & ( \RAM|mem[108][3]~q ) ) ) # ( !\ALU|Mux30~1_combout & ( \ALU|Mux31~3_combout & ( \RAM|mem[110][3]~q ) ) ) # ( \ALU|Mux30~1_combout & ( !\ALU|Mux31~3_combout & ( +// \RAM|mem[109][3]~q ) ) ) # ( !\ALU|Mux30~1_combout & ( !\ALU|Mux31~3_combout & ( \RAM|mem[111][3]~q ) ) ) + + .dataa(!\RAM|mem[110][3]~q ), + .datab(!\RAM|mem[109][3]~q ), + .datac(!\RAM|mem[111][3]~q ), + .datad(!\RAM|mem[108][3]~q ), + .datae(!\ALU|Mux30~1_combout ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[3]~279_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[3]~279 .extended_lut = "off"; +defparam \rd[3]~279 .lut_mask = 64'h0F0F3333555500FF; +defparam \rd[3]~279 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X46_Y7_N0 +cyclonev_lcell_comb \rd[3]~281 ( +// Equation(s): +// \rd[3]~281_combout = ( \rd[3]~280_combout & ( \rd[3]~279_combout & ( (!\ALU|Mux26~1_combout ) # ((!\ALU|Mux27~1_combout & (\rd[3]~278_combout )) # (\ALU|Mux27~1_combout & ((\rd[3]~277_combout )))) ) ) ) # ( !\rd[3]~280_combout & ( \rd[3]~279_combout +// & ( (!\ALU|Mux27~1_combout & (\rd[3]~278_combout & (\ALU|Mux26~1_combout ))) # (\ALU|Mux27~1_combout & (((!\ALU|Mux26~1_combout ) # (\rd[3]~277_combout )))) ) ) ) # ( \rd[3]~280_combout & ( !\rd[3]~279_combout & ( (!\ALU|Mux27~1_combout & +// (((!\ALU|Mux26~1_combout )) # (\rd[3]~278_combout ))) # (\ALU|Mux27~1_combout & (((\ALU|Mux26~1_combout & \rd[3]~277_combout )))) ) ) ) # ( !\rd[3]~280_combout & ( !\rd[3]~279_combout & ( (\ALU|Mux26~1_combout & ((!\ALU|Mux27~1_combout & +// (\rd[3]~278_combout )) # (\ALU|Mux27~1_combout & ((\rd[3]~277_combout ))))) ) ) ) + + .dataa(!\ALU|Mux27~1_combout ), + .datab(!\rd[3]~278_combout ), + .datac(!\ALU|Mux26~1_combout ), + .datad(!\rd[3]~277_combout ), + .datae(!\rd[3]~280_combout ), + .dataf(!\rd[3]~279_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[3]~281_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[3]~281 .extended_lut = "off"; +defparam \rd[3]~281 .lut_mask = 64'h0207A2A75257F2F7; +defparam \rd[3]~281 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X47_Y13_N55 +dffeas \RAM|mem[81][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[81][0]~6_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[81][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[81][3] .is_wysiwyg = "true"; +defparam \RAM|mem[81][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X47_Y7_N38 +dffeas \RAM|mem[82][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[82][1]~7_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[82][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[82][3] .is_wysiwyg = "true"; +defparam \RAM|mem[82][3] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X55_Y9_N18 +cyclonev_lcell_comb \RAM|mem[80][3]~feeder ( +// Equation(s): +// \RAM|mem[80][3]~feeder_combout = ( \RAM|mem~259_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~259_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[80][3]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[80][3]~feeder .extended_lut = "off"; +defparam \RAM|mem[80][3]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[80][3]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X55_Y9_N19 +dffeas \RAM|mem[80][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[80][3]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[80][0]~5_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[80][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[80][3] .is_wysiwyg = "true"; +defparam \RAM|mem[80][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X47_Y7_N8 +dffeas \RAM|mem[83][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[83][0]~8_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[83][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[83][3] .is_wysiwyg = "true"; +defparam \RAM|mem[83][3] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X47_Y7_N6 +cyclonev_lcell_comb \rd[3]~263 ( +// Equation(s): +// \rd[3]~263_combout = ( \RAM|mem[83][3]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & (\RAM|mem[82][3]~q )) # (\ALU|Mux30~1_combout & ((\RAM|mem[80][3]~q ))) ) ) ) # ( !\RAM|mem[83][3]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout +// & (\RAM|mem[82][3]~q )) # (\ALU|Mux30~1_combout & ((\RAM|mem[80][3]~q ))) ) ) ) # ( \RAM|mem[83][3]~q & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout ) # (\RAM|mem[81][3]~q ) ) ) ) # ( !\RAM|mem[83][3]~q & ( !\ALU|Mux31~3_combout & ( +// (\ALU|Mux30~1_combout & \RAM|mem[81][3]~q ) ) ) ) + + .dataa(!\ALU|Mux30~1_combout ), + .datab(!\RAM|mem[81][3]~q ), + .datac(!\RAM|mem[82][3]~q ), + .datad(!\RAM|mem[80][3]~q ), + .datae(!\RAM|mem[83][3]~q ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[3]~263_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[3]~263 .extended_lut = "off"; +defparam \rd[3]~263 .lut_mask = 64'h1111BBBB0A5F0A5F; +defparam \rd[3]~263 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X54_Y13_N1 +dffeas \RAM|mem[97][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[97][4]~10_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[97][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[97][3] .is_wysiwyg = "true"; +defparam \RAM|mem[97][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X54_Y13_N25 +dffeas \RAM|mem[96][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[96][1]~9_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[96][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[96][3] .is_wysiwyg = "true"; +defparam \RAM|mem[96][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X47_Y7_N56 +dffeas \RAM|mem[98][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[98][3]~11_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[98][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[98][3] .is_wysiwyg = "true"; +defparam \RAM|mem[98][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X46_Y8_N2 +dffeas \RAM|mem[99][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[99][0]~12_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[99][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[99][3] .is_wysiwyg = "true"; +defparam \RAM|mem[99][3] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X46_Y8_N0 +cyclonev_lcell_comb \rd[3]~264 ( +// Equation(s): +// \rd[3]~264_combout = ( \RAM|mem[99][3]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & ((\RAM|mem[98][3]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[96][3]~q )) ) ) ) # ( !\RAM|mem[99][3]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout +// & ((\RAM|mem[98][3]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[96][3]~q )) ) ) ) # ( \RAM|mem[99][3]~q & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout ) # (\RAM|mem[97][3]~q ) ) ) ) # ( !\RAM|mem[99][3]~q & ( !\ALU|Mux31~3_combout & ( +// (\ALU|Mux30~1_combout & \RAM|mem[97][3]~q ) ) ) ) + + .dataa(!\ALU|Mux30~1_combout ), + .datab(!\RAM|mem[97][3]~q ), + .datac(!\RAM|mem[96][3]~q ), + .datad(!\RAM|mem[98][3]~q ), + .datae(!\RAM|mem[99][3]~q ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[3]~264_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[3]~264 .extended_lut = "off"; +defparam \rd[3]~264 .lut_mask = 64'h1111BBBB05AF05AF; +defparam \rd[3]~264 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X55_Y9_N45 +cyclonev_lcell_comb \RAM|mem[64][3]~feeder ( +// Equation(s): +// \RAM|mem[64][3]~feeder_combout = ( \RAM|mem~259_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~259_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[64][3]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[64][3]~feeder .extended_lut = "off"; +defparam \RAM|mem[64][3]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[64][3]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X55_Y9_N46 +dffeas \RAM|mem[64][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[64][3]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[64][1]~1_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[64][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[64][3] .is_wysiwyg = "true"; +defparam \RAM|mem[64][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X54_Y8_N58 +dffeas \RAM|mem[66][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[66][2]~3_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[66][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[66][3] .is_wysiwyg = "true"; +defparam \RAM|mem[66][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X51_Y9_N44 +dffeas \RAM|mem[67][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[67][3]~4_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[67][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[67][3] .is_wysiwyg = "true"; +defparam \RAM|mem[67][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X51_Y9_N50 +dffeas \RAM|mem[65][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[65][3]~2_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[65][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[65][3] .is_wysiwyg = "true"; +defparam \RAM|mem[65][3] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X51_Y9_N48 +cyclonev_lcell_comb \rd[3]~262 ( +// Equation(s): +// \rd[3]~262_combout = ( \RAM|mem[65][3]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & ((\RAM|mem[66][3]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[64][3]~q )) ) ) ) # ( !\RAM|mem[65][3]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout +// & ((\RAM|mem[66][3]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[64][3]~q )) ) ) ) # ( \RAM|mem[65][3]~q & ( !\ALU|Mux31~3_combout & ( (\RAM|mem[67][3]~q ) # (\ALU|Mux30~1_combout ) ) ) ) # ( !\RAM|mem[65][3]~q & ( !\ALU|Mux31~3_combout & ( +// (!\ALU|Mux30~1_combout & \RAM|mem[67][3]~q ) ) ) ) + + .dataa(!\RAM|mem[64][3]~q ), + .datab(!\RAM|mem[66][3]~q ), + .datac(!\ALU|Mux30~1_combout ), + .datad(!\RAM|mem[67][3]~q ), + .datae(!\RAM|mem[65][3]~q ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[3]~262_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[3]~262 .extended_lut = "off"; +defparam \rd[3]~262 .lut_mask = 64'h00F00FFF35353535; +defparam \rd[3]~262 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X47_Y5_N30 +cyclonev_lcell_comb \RAM|mem[114][3]~feeder ( +// Equation(s): +// \RAM|mem[114][3]~feeder_combout = ( \RAM|mem~259_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~259_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[114][3]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[114][3]~feeder .extended_lut = "off"; +defparam \RAM|mem[114][3]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[114][3]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X47_Y5_N31 +dffeas \RAM|mem[114][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[114][3]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[114][0]~15_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[114][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[114][3] .is_wysiwyg = "true"; +defparam \RAM|mem[114][3] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X55_Y9_N27 +cyclonev_lcell_comb \RAM|mem[112][3]~feeder ( +// Equation(s): +// \RAM|mem[112][3]~feeder_combout = ( \RAM|mem~259_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~259_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[112][3]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[112][3]~feeder .extended_lut = "off"; +defparam \RAM|mem[112][3]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[112][3]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X55_Y9_N28 +dffeas \RAM|mem[112][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[112][3]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[112][1]~13_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[112][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[112][3] .is_wysiwyg = "true"; +defparam \RAM|mem[112][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X47_Y5_N37 +dffeas \RAM|mem[113][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[113][0]~14_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[113][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[113][3] .is_wysiwyg = "true"; +defparam \RAM|mem[113][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X47_Y5_N14 +dffeas \RAM|mem[115][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[115][2]~16_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[115][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[115][3] .is_wysiwyg = "true"; +defparam \RAM|mem[115][3] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X47_Y5_N12 +cyclonev_lcell_comb \rd[3]~265 ( +// Equation(s): +// \rd[3]~265_combout = ( \RAM|mem[115][3]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & (\RAM|mem[114][3]~q )) # (\ALU|Mux30~1_combout & ((\RAM|mem[112][3]~q ))) ) ) ) # ( !\RAM|mem[115][3]~q & ( \ALU|Mux31~3_combout & ( +// (!\ALU|Mux30~1_combout & (\RAM|mem[114][3]~q )) # (\ALU|Mux30~1_combout & ((\RAM|mem[112][3]~q ))) ) ) ) # ( \RAM|mem[115][3]~q & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout ) # (\RAM|mem[113][3]~q ) ) ) ) # ( !\RAM|mem[115][3]~q & ( +// !\ALU|Mux31~3_combout & ( (\ALU|Mux30~1_combout & \RAM|mem[113][3]~q ) ) ) ) + + .dataa(!\RAM|mem[114][3]~q ), + .datab(!\ALU|Mux30~1_combout ), + .datac(!\RAM|mem[112][3]~q ), + .datad(!\RAM|mem[113][3]~q ), + .datae(!\RAM|mem[115][3]~q ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[3]~265_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[3]~265 .extended_lut = "off"; +defparam \rd[3]~265 .lut_mask = 64'h0033CCFF47474747; +defparam \rd[3]~265 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X46_Y7_N6 +cyclonev_lcell_comb \rd[3]~266 ( +// Equation(s): +// \rd[3]~266_combout = ( \rd[3]~262_combout & ( \rd[3]~265_combout & ( (!\ALU|Mux26~1_combout & (((!\ALU|Mux27~1_combout ) # (\rd[3]~264_combout )))) # (\ALU|Mux26~1_combout & (((\ALU|Mux27~1_combout )) # (\rd[3]~263_combout ))) ) ) ) # ( +// !\rd[3]~262_combout & ( \rd[3]~265_combout & ( (!\ALU|Mux26~1_combout & (((!\ALU|Mux27~1_combout ) # (\rd[3]~264_combout )))) # (\ALU|Mux26~1_combout & (\rd[3]~263_combout & ((!\ALU|Mux27~1_combout )))) ) ) ) # ( \rd[3]~262_combout & ( +// !\rd[3]~265_combout & ( (!\ALU|Mux26~1_combout & (((\rd[3]~264_combout & \ALU|Mux27~1_combout )))) # (\ALU|Mux26~1_combout & (((\ALU|Mux27~1_combout )) # (\rd[3]~263_combout ))) ) ) ) # ( !\rd[3]~262_combout & ( !\rd[3]~265_combout & ( +// (!\ALU|Mux26~1_combout & (((\rd[3]~264_combout & \ALU|Mux27~1_combout )))) # (\ALU|Mux26~1_combout & (\rd[3]~263_combout & ((!\ALU|Mux27~1_combout )))) ) ) ) + + .dataa(!\rd[3]~263_combout ), + .datab(!\ALU|Mux26~1_combout ), + .datac(!\rd[3]~264_combout ), + .datad(!\ALU|Mux27~1_combout ), + .datae(!\rd[3]~262_combout ), + .dataf(!\rd[3]~265_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[3]~266_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[3]~266 .extended_lut = "off"; +defparam \rd[3]~266 .lut_mask = 64'h110C113FDD0CDD3F; +defparam \rd[3]~266 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X46_Y7_N30 +cyclonev_lcell_comb \rd[3]~282 ( +// Equation(s): +// \rd[3]~282_combout = ( \rd[3]~281_combout & ( \rd[3]~266_combout & ( (!\ALU|Mux29~3_combout & (((!\ALU|Mux28~1_combout ) # (\rd[3]~271_combout )))) # (\ALU|Mux29~3_combout & (((\ALU|Mux28~1_combout )) # (\rd[3]~276_combout ))) ) ) ) # ( +// !\rd[3]~281_combout & ( \rd[3]~266_combout & ( (!\ALU|Mux29~3_combout & (((\rd[3]~271_combout & \ALU|Mux28~1_combout )))) # (\ALU|Mux29~3_combout & (((\ALU|Mux28~1_combout )) # (\rd[3]~276_combout ))) ) ) ) # ( \rd[3]~281_combout & ( +// !\rd[3]~266_combout & ( (!\ALU|Mux29~3_combout & (((!\ALU|Mux28~1_combout ) # (\rd[3]~271_combout )))) # (\ALU|Mux29~3_combout & (\rd[3]~276_combout & ((!\ALU|Mux28~1_combout )))) ) ) ) # ( !\rd[3]~281_combout & ( !\rd[3]~266_combout & ( +// (!\ALU|Mux29~3_combout & (((\rd[3]~271_combout & \ALU|Mux28~1_combout )))) # (\ALU|Mux29~3_combout & (\rd[3]~276_combout & ((!\ALU|Mux28~1_combout )))) ) ) ) + + .dataa(!\rd[3]~276_combout ), + .datab(!\ALU|Mux29~3_combout ), + .datac(!\rd[3]~271_combout ), + .datad(!\ALU|Mux28~1_combout ), + .datae(!\rd[3]~281_combout ), + .dataf(!\rd[3]~266_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[3]~282_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[3]~282 .extended_lut = "off"; +defparam \rd[3]~282 .lut_mask = 64'h110CDD0C113FDD3F; +defparam \rd[3]~282 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X45_Y12_N31 +dffeas \RAM|mem[40][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[40][4]~105_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[40][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[40][3] .is_wysiwyg = "true"; +defparam \RAM|mem[40][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X42_Y11_N22 +dffeas \RAM|mem[32][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[32][1]~97_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[32][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[32][3] .is_wysiwyg = "true"; +defparam \RAM|mem[32][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X49_Y12_N58 +dffeas \RAM|mem[36][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[36][2]~101_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[36][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[36][3] .is_wysiwyg = "true"; +defparam \RAM|mem[36][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X47_Y11_N56 +dffeas \RAM|mem[44][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[44][1]~109_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[44][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[44][3] .is_wysiwyg = "true"; +defparam \RAM|mem[44][3] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X45_Y11_N45 +cyclonev_lcell_comb \rd[3]~293 ( +// Equation(s): +// \rd[3]~293_combout = ( \ALU|Mux28~1_combout & ( \ALU|Mux29~3_combout & ( \RAM|mem[32][3]~q ) ) ) # ( !\ALU|Mux28~1_combout & ( \ALU|Mux29~3_combout & ( \RAM|mem[40][3]~q ) ) ) # ( \ALU|Mux28~1_combout & ( !\ALU|Mux29~3_combout & ( +// \RAM|mem[36][3]~q ) ) ) # ( !\ALU|Mux28~1_combout & ( !\ALU|Mux29~3_combout & ( \RAM|mem[44][3]~q ) ) ) + + .dataa(!\RAM|mem[40][3]~q ), + .datab(!\RAM|mem[32][3]~q ), + .datac(!\RAM|mem[36][3]~q ), + .datad(!\RAM|mem[44][3]~q ), + .datae(!\ALU|Mux28~1_combout ), + .dataf(!\ALU|Mux29~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[3]~293_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[3]~293 .extended_lut = "off"; +defparam \rd[3]~293 .lut_mask = 64'h00FF0F0F55553333; +defparam \rd[3]~293 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X49_Y14_N46 +dffeas \RAM|mem[37][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[37][0]~102_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[37][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[37][3] .is_wysiwyg = "true"; +defparam \RAM|mem[37][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X41_Y16_N31 +dffeas \RAM|mem[41][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[41][1]~106_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[41][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[41][3] .is_wysiwyg = "true"; +defparam \RAM|mem[41][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X43_Y15_N1 +dffeas \RAM|mem[33][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[33][3]~98_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[33][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[33][3] .is_wysiwyg = "true"; +defparam \RAM|mem[33][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X46_Y14_N56 +dffeas \RAM|mem[45][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[45][4]~110_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[45][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[45][3] .is_wysiwyg = "true"; +defparam \RAM|mem[45][3] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X46_Y14_N54 +cyclonev_lcell_comb \rd[3]~294 ( +// Equation(s): +// \rd[3]~294_combout = ( \RAM|mem[45][3]~q & ( \ALU|Mux29~3_combout & ( (!\ALU|Mux28~1_combout & (\RAM|mem[41][3]~q )) # (\ALU|Mux28~1_combout & ((\RAM|mem[33][3]~q ))) ) ) ) # ( !\RAM|mem[45][3]~q & ( \ALU|Mux29~3_combout & ( (!\ALU|Mux28~1_combout +// & (\RAM|mem[41][3]~q )) # (\ALU|Mux28~1_combout & ((\RAM|mem[33][3]~q ))) ) ) ) # ( \RAM|mem[45][3]~q & ( !\ALU|Mux29~3_combout & ( (!\ALU|Mux28~1_combout ) # (\RAM|mem[37][3]~q ) ) ) ) # ( !\RAM|mem[45][3]~q & ( !\ALU|Mux29~3_combout & ( +// (\RAM|mem[37][3]~q & \ALU|Mux28~1_combout ) ) ) ) + + .dataa(!\RAM|mem[37][3]~q ), + .datab(!\RAM|mem[41][3]~q ), + .datac(!\ALU|Mux28~1_combout ), + .datad(!\RAM|mem[33][3]~q ), + .datae(!\RAM|mem[45][3]~q ), + .dataf(!\ALU|Mux29~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[3]~294_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[3]~294 .extended_lut = "off"; +defparam \rd[3]~294 .lut_mask = 64'h0505F5F5303F303F; +defparam \rd[3]~294 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X41_Y16_N1 +dffeas \RAM|mem[42][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[42][4]~107_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[42][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[42][3] .is_wysiwyg = "true"; +defparam \RAM|mem[42][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X41_Y11_N43 +dffeas \RAM|mem[34][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[34][3]~99_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[34][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[34][3] .is_wysiwyg = "true"; +defparam \RAM|mem[34][3] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X51_Y14_N6 +cyclonev_lcell_comb \RAM|mem[38][3]~feeder ( +// Equation(s): +// \RAM|mem[38][3]~feeder_combout = ( \RAM|mem~259_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~259_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[38][3]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[38][3]~feeder .extended_lut = "off"; +defparam \RAM|mem[38][3]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[38][3]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X51_Y14_N7 +dffeas \RAM|mem[38][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[38][3]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[38][0]~103_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[38][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[38][3] .is_wysiwyg = "true"; +defparam \RAM|mem[38][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X47_Y11_N19 +dffeas \RAM|mem[46][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[46][2]~111_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[46][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[46][3] .is_wysiwyg = "true"; +defparam \RAM|mem[46][3] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X46_Y11_N6 +cyclonev_lcell_comb \rd[3]~295 ( +// Equation(s): +// \rd[3]~295_combout = ( \ALU|Mux29~3_combout & ( \ALU|Mux28~1_combout & ( \RAM|mem[34][3]~q ) ) ) # ( !\ALU|Mux29~3_combout & ( \ALU|Mux28~1_combout & ( \RAM|mem[38][3]~q ) ) ) # ( \ALU|Mux29~3_combout & ( !\ALU|Mux28~1_combout & ( +// \RAM|mem[42][3]~q ) ) ) # ( !\ALU|Mux29~3_combout & ( !\ALU|Mux28~1_combout & ( \RAM|mem[46][3]~q ) ) ) + + .dataa(!\RAM|mem[42][3]~q ), + .datab(!\RAM|mem[34][3]~q ), + .datac(!\RAM|mem[38][3]~q ), + .datad(!\RAM|mem[46][3]~q ), + .datae(!\ALU|Mux29~3_combout ), + .dataf(!\ALU|Mux28~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[3]~295_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[3]~295 .extended_lut = "off"; +defparam \rd[3]~295 .lut_mask = 64'h00FF55550F0F3333; +defparam \rd[3]~295 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X43_Y10_N46 +dffeas \RAM|mem[39][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[39][4]~104_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[39][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[39][3] .is_wysiwyg = "true"; +defparam \RAM|mem[39][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X41_Y11_N4 +dffeas \RAM|mem[35][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[35][2]~100_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[35][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[35][3] .is_wysiwyg = "true"; +defparam \RAM|mem[35][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X47_Y11_N1 +dffeas \RAM|mem[47][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[47][0]~112_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[47][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[47][3] .is_wysiwyg = "true"; +defparam \RAM|mem[47][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X41_Y16_N10 +dffeas \RAM|mem[43][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[43][0]~108_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[43][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[43][3] .is_wysiwyg = "true"; +defparam \RAM|mem[43][3] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X47_Y11_N48 +cyclonev_lcell_comb \rd[3]~296 ( +// Equation(s): +// \rd[3]~296_combout = ( \ALU|Mux29~3_combout & ( \ALU|Mux28~1_combout & ( \RAM|mem[35][3]~q ) ) ) # ( !\ALU|Mux29~3_combout & ( \ALU|Mux28~1_combout & ( \RAM|mem[39][3]~q ) ) ) # ( \ALU|Mux29~3_combout & ( !\ALU|Mux28~1_combout & ( +// \RAM|mem[43][3]~q ) ) ) # ( !\ALU|Mux29~3_combout & ( !\ALU|Mux28~1_combout & ( \RAM|mem[47][3]~q ) ) ) + + .dataa(!\RAM|mem[39][3]~q ), + .datab(!\RAM|mem[35][3]~q ), + .datac(!\RAM|mem[47][3]~q ), + .datad(!\RAM|mem[43][3]~q ), + .datae(!\ALU|Mux29~3_combout ), + .dataf(!\ALU|Mux28~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[3]~296_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[3]~296 .extended_lut = "off"; +defparam \rd[3]~296 .lut_mask = 64'h0F0F00FF55553333; +defparam \rd[3]~296 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X46_Y11_N3 +cyclonev_lcell_comb \rd[3]~297 ( +// Equation(s): +// \rd[3]~297_combout = ( \rd[3]~296_combout & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & ((\rd[3]~295_combout ))) # (\ALU|Mux30~1_combout & (\rd[3]~293_combout )) ) ) ) # ( !\rd[3]~296_combout & ( \ALU|Mux31~3_combout & ( +// (!\ALU|Mux30~1_combout & ((\rd[3]~295_combout ))) # (\ALU|Mux30~1_combout & (\rd[3]~293_combout )) ) ) ) # ( \rd[3]~296_combout & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout ) # (\rd[3]~294_combout ) ) ) ) # ( !\rd[3]~296_combout & ( +// !\ALU|Mux31~3_combout & ( (\rd[3]~294_combout & \ALU|Mux30~1_combout ) ) ) ) + + .dataa(!\rd[3]~293_combout ), + .datab(!\rd[3]~294_combout ), + .datac(!\rd[3]~295_combout ), + .datad(!\ALU|Mux30~1_combout ), + .datae(!\rd[3]~296_combout ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[3]~297_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[3]~297 .extended_lut = "off"; +defparam \rd[3]~297 .lut_mask = 64'h0033FF330F550F55; +defparam \rd[3]~297 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X47_Y12_N43 +dffeas \RAM|mem[4][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[4][0]~66_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[4][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[4][3] .is_wysiwyg = "true"; +defparam \RAM|mem[4][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X42_Y15_N26 +dffeas \RAM|mem[7][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[7][0]~78_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[7][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[7][3] .is_wysiwyg = "true"; +defparam \RAM|mem[7][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X50_Y12_N19 +dffeas \RAM|mem[6][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[6][2]~74_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[6][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[6][3] .is_wysiwyg = "true"; +defparam \RAM|mem[6][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X41_Y15_N20 +dffeas \RAM|mem[5][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[5][0]~70_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[5][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[5][3] .is_wysiwyg = "true"; +defparam \RAM|mem[5][3] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X41_Y15_N18 +cyclonev_lcell_comb \rd[3]~284 ( +// Equation(s): +// \rd[3]~284_combout = ( \RAM|mem[5][3]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & ((\RAM|mem[6][3]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[4][3]~q )) ) ) ) # ( !\RAM|mem[5][3]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & +// ((\RAM|mem[6][3]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[4][3]~q )) ) ) ) # ( \RAM|mem[5][3]~q & ( !\ALU|Mux31~3_combout & ( (\ALU|Mux30~1_combout ) # (\RAM|mem[7][3]~q ) ) ) ) # ( !\RAM|mem[5][3]~q & ( !\ALU|Mux31~3_combout & ( (\RAM|mem[7][3]~q +// & !\ALU|Mux30~1_combout ) ) ) ) + + .dataa(!\RAM|mem[4][3]~q ), + .datab(!\RAM|mem[7][3]~q ), + .datac(!\RAM|mem[6][3]~q ), + .datad(!\ALU|Mux30~1_combout ), + .datae(!\RAM|mem[5][3]~q ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[3]~284_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[3]~284 .extended_lut = "off"; +defparam \rd[3]~284 .lut_mask = 64'h330033FF0F550F55; +defparam \rd[3]~284 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X46_Y14_N52 +dffeas \RAM|mem[13][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[13][1]~72_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[13][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[13][3] .is_wysiwyg = "true"; +defparam \RAM|mem[13][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X53_Y11_N10 +dffeas \RAM|mem[14][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[14][1]~76_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[14][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[14][3] .is_wysiwyg = "true"; +defparam \RAM|mem[14][3] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X53_Y6_N12 +cyclonev_lcell_comb \RAM|mem[12][3]~feeder ( +// Equation(s): +// \RAM|mem[12][3]~feeder_combout = ( \RAM|mem~259_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~259_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[12][3]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[12][3]~feeder .extended_lut = "off"; +defparam \RAM|mem[12][3]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[12][3]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X53_Y6_N13 +dffeas \RAM|mem[12][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[12][3]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[12][3]~68_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[12][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[12][3] .is_wysiwyg = "true"; +defparam \RAM|mem[12][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X41_Y15_N38 +dffeas \RAM|mem[15][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[15][4]~80_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[15][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[15][3] .is_wysiwyg = "true"; +defparam \RAM|mem[15][3] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X41_Y15_N36 +cyclonev_lcell_comb \rd[3]~286 ( +// Equation(s): +// \rd[3]~286_combout = ( \RAM|mem[15][3]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & (\RAM|mem[14][3]~q )) # (\ALU|Mux30~1_combout & ((\RAM|mem[12][3]~q ))) ) ) ) # ( !\RAM|mem[15][3]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout +// & (\RAM|mem[14][3]~q )) # (\ALU|Mux30~1_combout & ((\RAM|mem[12][3]~q ))) ) ) ) # ( \RAM|mem[15][3]~q & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout ) # (\RAM|mem[13][3]~q ) ) ) ) # ( !\RAM|mem[15][3]~q & ( !\ALU|Mux31~3_combout & ( +// (\RAM|mem[13][3]~q & \ALU|Mux30~1_combout ) ) ) ) + + .dataa(!\RAM|mem[13][3]~q ), + .datab(!\RAM|mem[14][3]~q ), + .datac(!\RAM|mem[12][3]~q ), + .datad(!\ALU|Mux30~1_combout ), + .datae(!\RAM|mem[15][3]~q ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[3]~286_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[3]~286 .extended_lut = "off"; +defparam \rd[3]~286 .lut_mask = 64'h0055FF55330F330F; +defparam \rd[3]~286 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X40_Y15_N17 +dffeas \RAM|mem[3][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[3][2]~77_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[3][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[3][3] .is_wysiwyg = "true"; +defparam \RAM|mem[3][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X40_Y15_N31 +dffeas \RAM|mem[2][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[2][0]~73_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[2][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[2][3] .is_wysiwyg = "true"; +defparam \RAM|mem[2][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X42_Y11_N29 +dffeas \RAM|mem[0][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[0][3]~65_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[0][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[0][3] .is_wysiwyg = "true"; +defparam \RAM|mem[0][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X40_Y15_N8 +dffeas \RAM|mem[1][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[1][0]~69_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[1][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[1][3] .is_wysiwyg = "true"; +defparam \RAM|mem[1][3] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X40_Y15_N6 +cyclonev_lcell_comb \rd[3]~283 ( +// Equation(s): +// \rd[3]~283_combout = ( \RAM|mem[1][3]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & (\RAM|mem[2][3]~q )) # (\ALU|Mux30~1_combout & ((\RAM|mem[0][3]~q ))) ) ) ) # ( !\RAM|mem[1][3]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & +// (\RAM|mem[2][3]~q )) # (\ALU|Mux30~1_combout & ((\RAM|mem[0][3]~q ))) ) ) ) # ( \RAM|mem[1][3]~q & ( !\ALU|Mux31~3_combout & ( (\RAM|mem[3][3]~q ) # (\ALU|Mux30~1_combout ) ) ) ) # ( !\RAM|mem[1][3]~q & ( !\ALU|Mux31~3_combout & ( +// (!\ALU|Mux30~1_combout & \RAM|mem[3][3]~q ) ) ) ) + + .dataa(!\ALU|Mux30~1_combout ), + .datab(!\RAM|mem[3][3]~q ), + .datac(!\RAM|mem[2][3]~q ), + .datad(!\RAM|mem[0][3]~q ), + .datae(!\RAM|mem[1][3]~q ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[3]~283_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[3]~283 .extended_lut = "off"; +defparam \rd[3]~283 .lut_mask = 64'h222277770A5F0A5F; +defparam \rd[3]~283 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X53_Y11_N22 +dffeas \RAM|mem[10][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[10][4]~75_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[10][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[10][3] .is_wysiwyg = "true"; +defparam \RAM|mem[10][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X43_Y16_N19 +dffeas \RAM|mem[9][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[9][2]~71_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[9][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[9][3] .is_wysiwyg = "true"; +defparam \RAM|mem[9][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X46_Y14_N31 +dffeas \RAM|mem[8][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[8][2]~67_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[8][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[8][3] .is_wysiwyg = "true"; +defparam \RAM|mem[8][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X41_Y15_N14 +dffeas \RAM|mem[11][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[11][3]~79_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[11][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[11][3] .is_wysiwyg = "true"; +defparam \RAM|mem[11][3] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X41_Y15_N12 +cyclonev_lcell_comb \rd[3]~285 ( +// Equation(s): +// \rd[3]~285_combout = ( \RAM|mem[11][3]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & (\RAM|mem[10][3]~q )) # (\ALU|Mux30~1_combout & ((\RAM|mem[8][3]~q ))) ) ) ) # ( !\RAM|mem[11][3]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout +// & (\RAM|mem[10][3]~q )) # (\ALU|Mux30~1_combout & ((\RAM|mem[8][3]~q ))) ) ) ) # ( \RAM|mem[11][3]~q & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout ) # (\RAM|mem[9][3]~q ) ) ) ) # ( !\RAM|mem[11][3]~q & ( !\ALU|Mux31~3_combout & ( +// (\ALU|Mux30~1_combout & \RAM|mem[9][3]~q ) ) ) ) + + .dataa(!\RAM|mem[10][3]~q ), + .datab(!\ALU|Mux30~1_combout ), + .datac(!\RAM|mem[9][3]~q ), + .datad(!\RAM|mem[8][3]~q ), + .datae(!\RAM|mem[11][3]~q ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[3]~285_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[3]~285 .extended_lut = "off"; +defparam \rd[3]~285 .lut_mask = 64'h0303CFCF44774477; +defparam \rd[3]~285 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X41_Y15_N30 +cyclonev_lcell_comb \rd[3]~287 ( +// Equation(s): +// \rd[3]~287_combout = ( \rd[3]~283_combout & ( \rd[3]~285_combout & ( ((!\ALU|Mux28~1_combout & ((\rd[3]~286_combout ))) # (\ALU|Mux28~1_combout & (\rd[3]~284_combout ))) # (\ALU|Mux29~3_combout ) ) ) ) # ( !\rd[3]~283_combout & ( \rd[3]~285_combout +// & ( (!\ALU|Mux28~1_combout & (((\ALU|Mux29~3_combout ) # (\rd[3]~286_combout )))) # (\ALU|Mux28~1_combout & (\rd[3]~284_combout & ((!\ALU|Mux29~3_combout )))) ) ) ) # ( \rd[3]~283_combout & ( !\rd[3]~285_combout & ( (!\ALU|Mux28~1_combout & +// (((\rd[3]~286_combout & !\ALU|Mux29~3_combout )))) # (\ALU|Mux28~1_combout & (((\ALU|Mux29~3_combout )) # (\rd[3]~284_combout ))) ) ) ) # ( !\rd[3]~283_combout & ( !\rd[3]~285_combout & ( (!\ALU|Mux29~3_combout & ((!\ALU|Mux28~1_combout & +// ((\rd[3]~286_combout ))) # (\ALU|Mux28~1_combout & (\rd[3]~284_combout )))) ) ) ) + + .dataa(!\rd[3]~284_combout ), + .datab(!\ALU|Mux28~1_combout ), + .datac(!\rd[3]~286_combout ), + .datad(!\ALU|Mux29~3_combout ), + .datae(!\rd[3]~283_combout ), + .dataf(!\rd[3]~285_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[3]~287_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[3]~287 .extended_lut = "off"; +defparam \rd[3]~287 .lut_mask = 64'h1D001D331DCC1DFF; +defparam \rd[3]~287 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X42_Y16_N52 +dffeas \RAM|mem[19][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[19][3]~93_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[19][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[19][3] .is_wysiwyg = "true"; +defparam \RAM|mem[19][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X42_Y16_N55 +dffeas \RAM|mem[18][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[18][0]~89_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[18][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[18][3] .is_wysiwyg = "true"; +defparam \RAM|mem[18][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X42_Y11_N49 +dffeas \RAM|mem[16][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[16][4]~81_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[16][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[16][3] .is_wysiwyg = "true"; +defparam \RAM|mem[16][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X41_Y13_N50 +dffeas \RAM|mem[17][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[17][0]~85_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[17][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[17][3] .is_wysiwyg = "true"; +defparam \RAM|mem[17][3] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X41_Y13_N48 +cyclonev_lcell_comb \rd[3]~288 ( +// Equation(s): +// \rd[3]~288_combout = ( \RAM|mem[17][3]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & (\RAM|mem[18][3]~q )) # (\ALU|Mux30~1_combout & ((\RAM|mem[16][3]~q ))) ) ) ) # ( !\RAM|mem[17][3]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout +// & (\RAM|mem[18][3]~q )) # (\ALU|Mux30~1_combout & ((\RAM|mem[16][3]~q ))) ) ) ) # ( \RAM|mem[17][3]~q & ( !\ALU|Mux31~3_combout & ( (\ALU|Mux30~1_combout ) # (\RAM|mem[19][3]~q ) ) ) ) # ( !\RAM|mem[17][3]~q & ( !\ALU|Mux31~3_combout & ( +// (\RAM|mem[19][3]~q & !\ALU|Mux30~1_combout ) ) ) ) + + .dataa(!\RAM|mem[19][3]~q ), + .datab(!\ALU|Mux30~1_combout ), + .datac(!\RAM|mem[18][3]~q ), + .datad(!\RAM|mem[16][3]~q ), + .datae(!\RAM|mem[17][3]~q ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[3]~288_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[3]~288 .extended_lut = "off"; +defparam \rd[3]~288 .lut_mask = 64'h444477770C3F0C3F; +defparam \rd[3]~288 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X43_Y16_N28 +dffeas \RAM|mem[25][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[25][2]~87_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[25][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[25][3] .is_wysiwyg = "true"; +defparam \RAM|mem[25][3] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X47_Y15_N27 +cyclonev_lcell_comb \RAM|mem[26][3]~feeder ( +// Equation(s): +// \RAM|mem[26][3]~feeder_combout = ( \RAM|mem~259_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~259_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[26][3]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[26][3]~feeder .extended_lut = "off"; +defparam \RAM|mem[26][3]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[26][3]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X47_Y15_N28 +dffeas \RAM|mem[26][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[26][3]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[26][4]~91_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[26][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[26][3] .is_wysiwyg = "true"; +defparam \RAM|mem[26][3] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X56_Y8_N45 +cyclonev_lcell_comb \RAM|mem[24][3]~feeder ( +// Equation(s): +// \RAM|mem[24][3]~feeder_combout = ( \RAM|mem~259_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~259_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[24][3]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[24][3]~feeder .extended_lut = "off"; +defparam \RAM|mem[24][3]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[24][3]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X56_Y8_N46 +dffeas \RAM|mem[24][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[24][3]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[24][3]~83_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[24][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[24][3] .is_wysiwyg = "true"; +defparam \RAM|mem[24][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X41_Y13_N2 +dffeas \RAM|mem[27][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[27][1]~95_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[27][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[27][3] .is_wysiwyg = "true"; +defparam \RAM|mem[27][3] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X41_Y13_N0 +cyclonev_lcell_comb \rd[3]~290 ( +// Equation(s): +// \rd[3]~290_combout = ( \RAM|mem[27][3]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & (\RAM|mem[26][3]~q )) # (\ALU|Mux30~1_combout & ((\RAM|mem[24][3]~q ))) ) ) ) # ( !\RAM|mem[27][3]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout +// & (\RAM|mem[26][3]~q )) # (\ALU|Mux30~1_combout & ((\RAM|mem[24][3]~q ))) ) ) ) # ( \RAM|mem[27][3]~q & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout ) # (\RAM|mem[25][3]~q ) ) ) ) # ( !\RAM|mem[27][3]~q & ( !\ALU|Mux31~3_combout & ( +// (\RAM|mem[25][3]~q & \ALU|Mux30~1_combout ) ) ) ) + + .dataa(!\RAM|mem[25][3]~q ), + .datab(!\ALU|Mux30~1_combout ), + .datac(!\RAM|mem[26][3]~q ), + .datad(!\RAM|mem[24][3]~q ), + .datae(!\RAM|mem[27][3]~q ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[3]~290_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[3]~290 .extended_lut = "off"; +defparam \rd[3]~290 .lut_mask = 64'h1111DDDD0C3F0C3F; +defparam \rd[3]~290 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X45_Y16_N48 +cyclonev_lcell_comb \RAM|mem[29][3]~feeder ( +// Equation(s): +// \RAM|mem[29][3]~feeder_combout = ( \RAM|mem~259_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~259_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[29][3]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[29][3]~feeder .extended_lut = "off"; +defparam \RAM|mem[29][3]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[29][3]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X45_Y16_N49 +dffeas \RAM|mem[29][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[29][3]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[29][2]~88_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[29][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[29][3] .is_wysiwyg = "true"; +defparam \RAM|mem[29][3] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X46_Y15_N42 +cyclonev_lcell_comb \RAM|mem[28][3]~feeder ( +// Equation(s): +// \RAM|mem[28][3]~feeder_combout = ( \RAM|mem~259_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~259_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[28][3]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[28][3]~feeder .extended_lut = "off"; +defparam \RAM|mem[28][3]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[28][3]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X46_Y15_N43 +dffeas \RAM|mem[28][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[28][3]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[28][0]~84_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[28][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[28][3] .is_wysiwyg = "true"; +defparam \RAM|mem[28][3] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X48_Y15_N42 +cyclonev_lcell_comb \RAM|mem[30][3]~feeder ( +// Equation(s): +// \RAM|mem[30][3]~feeder_combout = ( \RAM|mem~259_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~259_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[30][3]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[30][3]~feeder .extended_lut = "off"; +defparam \RAM|mem[30][3]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[30][3]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X48_Y15_N43 +dffeas \RAM|mem[30][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[30][3]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[30][3]~92_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[30][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[30][3] .is_wysiwyg = "true"; +defparam \RAM|mem[30][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X41_Y13_N38 +dffeas \RAM|mem[31][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[31][2]~96_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[31][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[31][3] .is_wysiwyg = "true"; +defparam \RAM|mem[31][3] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X41_Y13_N36 +cyclonev_lcell_comb \rd[3]~291 ( +// Equation(s): +// \rd[3]~291_combout = ( \RAM|mem[31][3]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & ((\RAM|mem[30][3]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[28][3]~q )) ) ) ) # ( !\RAM|mem[31][3]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout +// & ((\RAM|mem[30][3]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[28][3]~q )) ) ) ) # ( \RAM|mem[31][3]~q & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout ) # (\RAM|mem[29][3]~q ) ) ) ) # ( !\RAM|mem[31][3]~q & ( !\ALU|Mux31~3_combout & ( +// (\RAM|mem[29][3]~q & \ALU|Mux30~1_combout ) ) ) ) + + .dataa(!\RAM|mem[29][3]~q ), + .datab(!\RAM|mem[28][3]~q ), + .datac(!\RAM|mem[30][3]~q ), + .datad(!\ALU|Mux30~1_combout ), + .datae(!\RAM|mem[31][3]~q ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[3]~291_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[3]~291 .extended_lut = "off"; +defparam \rd[3]~291 .lut_mask = 64'h0055FF550F330F33; +defparam \rd[3]~291 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X47_Y12_N16 +dffeas \RAM|mem[20][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[20][4]~82_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[20][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[20][3] .is_wysiwyg = "true"; +defparam \RAM|mem[20][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X49_Y14_N40 +dffeas \RAM|mem[22][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[22][2]~90_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[22][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[22][3] .is_wysiwyg = "true"; +defparam \RAM|mem[22][3] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X43_Y14_N39 +cyclonev_lcell_comb \RAM|mem[23][3]~feeder ( +// Equation(s): +// \RAM|mem[23][3]~feeder_combout = ( \RAM|mem~259_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~259_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[23][3]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[23][3]~feeder .extended_lut = "off"; +defparam \RAM|mem[23][3]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[23][3]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X43_Y14_N40 +dffeas \RAM|mem[23][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[23][3]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[23][0]~94_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[23][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[23][3] .is_wysiwyg = "true"; +defparam \RAM|mem[23][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X42_Y15_N20 +dffeas \RAM|mem[21][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[21][3]~86_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[21][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[21][3] .is_wysiwyg = "true"; +defparam \RAM|mem[21][3] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y15_N18 +cyclonev_lcell_comb \rd[3]~289 ( +// Equation(s): +// \rd[3]~289_combout = ( \RAM|mem[21][3]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & ((\RAM|mem[22][3]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[20][3]~q )) ) ) ) # ( !\RAM|mem[21][3]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout +// & ((\RAM|mem[22][3]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[20][3]~q )) ) ) ) # ( \RAM|mem[21][3]~q & ( !\ALU|Mux31~3_combout & ( (\RAM|mem[23][3]~q ) # (\ALU|Mux30~1_combout ) ) ) ) # ( !\RAM|mem[21][3]~q & ( !\ALU|Mux31~3_combout & ( +// (!\ALU|Mux30~1_combout & \RAM|mem[23][3]~q ) ) ) ) + + .dataa(!\RAM|mem[20][3]~q ), + .datab(!\RAM|mem[22][3]~q ), + .datac(!\ALU|Mux30~1_combout ), + .datad(!\RAM|mem[23][3]~q ), + .datae(!\RAM|mem[21][3]~q ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[3]~289_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[3]~289 .extended_lut = "off"; +defparam \rd[3]~289 .lut_mask = 64'h00F00FFF35353535; +defparam \rd[3]~289 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X41_Y13_N30 +cyclonev_lcell_comb \rd[3]~292 ( +// Equation(s): +// \rd[3]~292_combout = ( \rd[3]~291_combout & ( \rd[3]~289_combout & ( (!\ALU|Mux29~3_combout ) # ((!\ALU|Mux28~1_combout & ((\rd[3]~290_combout ))) # (\ALU|Mux28~1_combout & (\rd[3]~288_combout ))) ) ) ) # ( !\rd[3]~291_combout & ( \rd[3]~289_combout +// & ( (!\ALU|Mux29~3_combout & (((\ALU|Mux28~1_combout )))) # (\ALU|Mux29~3_combout & ((!\ALU|Mux28~1_combout & ((\rd[3]~290_combout ))) # (\ALU|Mux28~1_combout & (\rd[3]~288_combout )))) ) ) ) # ( \rd[3]~291_combout & ( !\rd[3]~289_combout & ( +// (!\ALU|Mux29~3_combout & (((!\ALU|Mux28~1_combout )))) # (\ALU|Mux29~3_combout & ((!\ALU|Mux28~1_combout & ((\rd[3]~290_combout ))) # (\ALU|Mux28~1_combout & (\rd[3]~288_combout )))) ) ) ) # ( !\rd[3]~291_combout & ( !\rd[3]~289_combout & ( +// (\ALU|Mux29~3_combout & ((!\ALU|Mux28~1_combout & ((\rd[3]~290_combout ))) # (\ALU|Mux28~1_combout & (\rd[3]~288_combout )))) ) ) ) + + .dataa(!\rd[3]~288_combout ), + .datab(!\ALU|Mux29~3_combout ), + .datac(!\rd[3]~290_combout ), + .datad(!\ALU|Mux28~1_combout ), + .datae(!\rd[3]~291_combout ), + .dataf(!\rd[3]~289_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[3]~292_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[3]~292 .extended_lut = "off"; +defparam \rd[3]~292 .lut_mask = 64'h0311CF1103DDCFDD; +defparam \rd[3]~292 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X46_Y12_N52 +dffeas \RAM|mem[58][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[58][2]~123_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[58][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[58][3] .is_wysiwyg = "true"; +defparam \RAM|mem[58][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X43_Y16_N58 +dffeas \RAM|mem[57][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[57][2]~119_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[57][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[57][3] .is_wysiwyg = "true"; +defparam \RAM|mem[57][3] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X45_Y12_N45 +cyclonev_lcell_comb \RAM|mem[56][3]~feeder ( +// Equation(s): +// \RAM|mem[56][3]~feeder_combout = ( \RAM|mem~259_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~259_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[56][3]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[56][3]~feeder .extended_lut = "off"; +defparam \RAM|mem[56][3]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[56][3]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X45_Y12_N46 +dffeas \RAM|mem[56][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[56][3]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[56][4]~115_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[56][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[56][3] .is_wysiwyg = "true"; +defparam \RAM|mem[56][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X46_Y9_N2 +dffeas \RAM|mem[59][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[59][2]~127_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[59][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[59][3] .is_wysiwyg = "true"; +defparam \RAM|mem[59][3] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X46_Y9_N0 +cyclonev_lcell_comb \rd[3]~300 ( +// Equation(s): +// \rd[3]~300_combout = ( \RAM|mem[59][3]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & (\RAM|mem[58][3]~q )) # (\ALU|Mux30~1_combout & ((\RAM|mem[56][3]~q ))) ) ) ) # ( !\RAM|mem[59][3]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout +// & (\RAM|mem[58][3]~q )) # (\ALU|Mux30~1_combout & ((\RAM|mem[56][3]~q ))) ) ) ) # ( \RAM|mem[59][3]~q & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout ) # (\RAM|mem[57][3]~q ) ) ) ) # ( !\RAM|mem[59][3]~q & ( !\ALU|Mux31~3_combout & ( +// (\RAM|mem[57][3]~q & \ALU|Mux30~1_combout ) ) ) ) + + .dataa(!\RAM|mem[58][3]~q ), + .datab(!\RAM|mem[57][3]~q ), + .datac(!\RAM|mem[56][3]~q ), + .datad(!\ALU|Mux30~1_combout ), + .datae(!\RAM|mem[59][3]~q ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[3]~300_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[3]~300 .extended_lut = "off"; +defparam \rd[3]~300 .lut_mask = 64'h0033FF33550F550F; +defparam \rd[3]~300 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X46_Y12_N28 +dffeas \RAM|mem[50][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[50][2]~121_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[50][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[50][3] .is_wysiwyg = "true"; +defparam \RAM|mem[50][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X50_Y14_N56 +dffeas \RAM|mem[48][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[48][2]~113_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[48][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[48][3] .is_wysiwyg = "true"; +defparam \RAM|mem[48][3] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X43_Y15_N21 +cyclonev_lcell_comb \RAM|mem[49][3]~feeder ( +// Equation(s): +// \RAM|mem[49][3]~feeder_combout = ( \RAM|mem~259_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~259_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[49][3]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[49][3]~feeder .extended_lut = "off"; +defparam \RAM|mem[49][3]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[49][3]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X43_Y15_N22 +dffeas \RAM|mem[49][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[49][3]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[49][0]~117_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[49][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[49][3] .is_wysiwyg = "true"; +defparam \RAM|mem[49][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X46_Y9_N26 +dffeas \RAM|mem[51][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[51][0]~125_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[51][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[51][3] .is_wysiwyg = "true"; +defparam \RAM|mem[51][3] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X46_Y9_N24 +cyclonev_lcell_comb \rd[3]~298 ( +// Equation(s): +// \rd[3]~298_combout = ( \RAM|mem[51][3]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & (\RAM|mem[50][3]~q )) # (\ALU|Mux30~1_combout & ((\RAM|mem[48][3]~q ))) ) ) ) # ( !\RAM|mem[51][3]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout +// & (\RAM|mem[50][3]~q )) # (\ALU|Mux30~1_combout & ((\RAM|mem[48][3]~q ))) ) ) ) # ( \RAM|mem[51][3]~q & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout ) # (\RAM|mem[49][3]~q ) ) ) ) # ( !\RAM|mem[51][3]~q & ( !\ALU|Mux31~3_combout & ( +// (\ALU|Mux30~1_combout & \RAM|mem[49][3]~q ) ) ) ) + + .dataa(!\RAM|mem[50][3]~q ), + .datab(!\ALU|Mux30~1_combout ), + .datac(!\RAM|mem[48][3]~q ), + .datad(!\RAM|mem[49][3]~q ), + .datae(!\RAM|mem[51][3]~q ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[3]~298_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[3]~298 .extended_lut = "off"; +defparam \rd[3]~298 .lut_mask = 64'h0033CCFF47474747; +defparam \rd[3]~298 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X50_Y12_N55 +dffeas \RAM|mem[54][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[54][1]~122_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[54][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[54][3] .is_wysiwyg = "true"; +defparam \RAM|mem[54][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X46_Y13_N46 +dffeas \RAM|mem[53][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[53][2]~118_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[53][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[53][3] .is_wysiwyg = "true"; +defparam \RAM|mem[53][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X47_Y12_N55 +dffeas \RAM|mem[52][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[52][0]~114_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[52][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[52][3] .is_wysiwyg = "true"; +defparam \RAM|mem[52][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X46_Y9_N38 +dffeas \RAM|mem[55][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[55][2]~126_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[55][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[55][3] .is_wysiwyg = "true"; +defparam \RAM|mem[55][3] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X46_Y9_N36 +cyclonev_lcell_comb \rd[3]~299 ( +// Equation(s): +// \rd[3]~299_combout = ( \RAM|mem[55][3]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & (\RAM|mem[54][3]~q )) # (\ALU|Mux30~1_combout & ((\RAM|mem[52][3]~q ))) ) ) ) # ( !\RAM|mem[55][3]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout +// & (\RAM|mem[54][3]~q )) # (\ALU|Mux30~1_combout & ((\RAM|mem[52][3]~q ))) ) ) ) # ( \RAM|mem[55][3]~q & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout ) # (\RAM|mem[53][3]~q ) ) ) ) # ( !\RAM|mem[55][3]~q & ( !\ALU|Mux31~3_combout & ( +// (\ALU|Mux30~1_combout & \RAM|mem[53][3]~q ) ) ) ) + + .dataa(!\RAM|mem[54][3]~q ), + .datab(!\ALU|Mux30~1_combout ), + .datac(!\RAM|mem[53][3]~q ), + .datad(!\RAM|mem[52][3]~q ), + .datae(!\RAM|mem[55][3]~q ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[3]~299_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[3]~299 .extended_lut = "off"; +defparam \rd[3]~299 .lut_mask = 64'h0303CFCF44774477; +defparam \rd[3]~299 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X45_Y14_N28 +dffeas \RAM|mem[61][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[61][0]~120_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[61][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[61][3] .is_wysiwyg = "true"; +defparam \RAM|mem[61][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X46_Y15_N4 +dffeas \RAM|mem[60][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[60][4]~116_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[60][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[60][3] .is_wysiwyg = "true"; +defparam \RAM|mem[60][3] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X56_Y9_N24 +cyclonev_lcell_comb \RAM|mem[62][3]~feeder ( +// Equation(s): +// \RAM|mem[62][3]~feeder_combout = ( \RAM|mem~259_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~259_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[62][3]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[62][3]~feeder .extended_lut = "off"; +defparam \RAM|mem[62][3]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[62][3]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X56_Y9_N25 +dffeas \RAM|mem[62][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[62][3]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[62][2]~124_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[62][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[62][3] .is_wysiwyg = "true"; +defparam \RAM|mem[62][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X56_Y9_N56 +dffeas \RAM|mem[63][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~259_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[63][2]~128_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[63][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[63][3] .is_wysiwyg = "true"; +defparam \RAM|mem[63][3] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X56_Y9_N54 +cyclonev_lcell_comb \rd[3]~301 ( +// Equation(s): +// \rd[3]~301_combout = ( \RAM|mem[63][3]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & ((\RAM|mem[62][3]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[60][3]~q )) ) ) ) # ( !\RAM|mem[63][3]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout +// & ((\RAM|mem[62][3]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[60][3]~q )) ) ) ) # ( \RAM|mem[63][3]~q & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout ) # (\RAM|mem[61][3]~q ) ) ) ) # ( !\RAM|mem[63][3]~q & ( !\ALU|Mux31~3_combout & ( +// (\RAM|mem[61][3]~q & \ALU|Mux30~1_combout ) ) ) ) + + .dataa(!\RAM|mem[61][3]~q ), + .datab(!\RAM|mem[60][3]~q ), + .datac(!\ALU|Mux30~1_combout ), + .datad(!\RAM|mem[62][3]~q ), + .datae(!\RAM|mem[63][3]~q ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[3]~301_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[3]~301 .extended_lut = "off"; +defparam \rd[3]~301 .lut_mask = 64'h0505F5F503F303F3; +defparam \rd[3]~301 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X46_Y9_N30 +cyclonev_lcell_comb \rd[3]~302 ( +// Equation(s): +// \rd[3]~302_combout = ( \rd[3]~299_combout & ( \rd[3]~301_combout & ( (!\ALU|Mux29~3_combout ) # ((!\ALU|Mux28~1_combout & (\rd[3]~300_combout )) # (\ALU|Mux28~1_combout & ((\rd[3]~298_combout )))) ) ) ) # ( !\rd[3]~299_combout & ( \rd[3]~301_combout +// & ( (!\ALU|Mux29~3_combout & (!\ALU|Mux28~1_combout )) # (\ALU|Mux29~3_combout & ((!\ALU|Mux28~1_combout & (\rd[3]~300_combout )) # (\ALU|Mux28~1_combout & ((\rd[3]~298_combout ))))) ) ) ) # ( \rd[3]~299_combout & ( !\rd[3]~301_combout & ( +// (!\ALU|Mux29~3_combout & (\ALU|Mux28~1_combout )) # (\ALU|Mux29~3_combout & ((!\ALU|Mux28~1_combout & (\rd[3]~300_combout )) # (\ALU|Mux28~1_combout & ((\rd[3]~298_combout ))))) ) ) ) # ( !\rd[3]~299_combout & ( !\rd[3]~301_combout & ( +// (\ALU|Mux29~3_combout & ((!\ALU|Mux28~1_combout & (\rd[3]~300_combout )) # (\ALU|Mux28~1_combout & ((\rd[3]~298_combout ))))) ) ) ) + + .dataa(!\ALU|Mux29~3_combout ), + .datab(!\ALU|Mux28~1_combout ), + .datac(!\rd[3]~300_combout ), + .datad(!\rd[3]~298_combout ), + .datae(!\rd[3]~299_combout ), + .dataf(!\rd[3]~301_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[3]~302_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[3]~302 .extended_lut = "off"; +defparam \rd[3]~302 .lut_mask = 64'h041526378C9DAEBF; +defparam \rd[3]~302 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X40_Y7_N42 +cyclonev_lcell_comb \rd[3]~303 ( +// Equation(s): +// \rd[3]~303_combout = ( \rd[3]~292_combout & ( \rd[3]~302_combout & ( (!\ALU|Mux27~1_combout ) # ((!\ALU|Mux26~1_combout & (\rd[3]~297_combout )) # (\ALU|Mux26~1_combout & ((\rd[3]~287_combout )))) ) ) ) # ( !\rd[3]~292_combout & ( \rd[3]~302_combout +// & ( (!\ALU|Mux26~1_combout & (((!\ALU|Mux27~1_combout )) # (\rd[3]~297_combout ))) # (\ALU|Mux26~1_combout & (((\rd[3]~287_combout & \ALU|Mux27~1_combout )))) ) ) ) # ( \rd[3]~292_combout & ( !\rd[3]~302_combout & ( (!\ALU|Mux26~1_combout & +// (\rd[3]~297_combout & ((\ALU|Mux27~1_combout )))) # (\ALU|Mux26~1_combout & (((!\ALU|Mux27~1_combout ) # (\rd[3]~287_combout )))) ) ) ) # ( !\rd[3]~292_combout & ( !\rd[3]~302_combout & ( (\ALU|Mux27~1_combout & ((!\ALU|Mux26~1_combout & +// (\rd[3]~297_combout )) # (\ALU|Mux26~1_combout & ((\rd[3]~287_combout ))))) ) ) ) + + .dataa(!\rd[3]~297_combout ), + .datab(!\ALU|Mux26~1_combout ), + .datac(!\rd[3]~287_combout ), + .datad(!\ALU|Mux27~1_combout ), + .datae(!\rd[3]~292_combout ), + .dataf(!\rd[3]~302_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[3]~303_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[3]~303 .extended_lut = "off"; +defparam \rd[3]~303 .lut_mask = 64'h00473347CC47FF47; +defparam \rd[3]~303 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X40_Y7_N9 +cyclonev_lcell_comb \rd[3]~347 ( +// Equation(s): +// \rd[3]~347_combout = ( \rd[3]~282_combout & ( \rd[3]~303_combout & ( ((\CONTROL_UNIT|M2R[0]~0_combout & \ALU|Mux24~1_combout )) # (\rd[3]~346_combout ) ) ) ) # ( !\rd[3]~282_combout & ( \rd[3]~303_combout & ( ((\CONTROL_UNIT|M2R[0]~0_combout & +// (\ALU|Mux24~1_combout & \ALU|Mux25~1_combout ))) # (\rd[3]~346_combout ) ) ) ) # ( \rd[3]~282_combout & ( !\rd[3]~303_combout & ( ((\CONTROL_UNIT|M2R[0]~0_combout & (\ALU|Mux24~1_combout & !\ALU|Mux25~1_combout ))) # (\rd[3]~346_combout ) ) ) ) # ( +// !\rd[3]~282_combout & ( !\rd[3]~303_combout & ( \rd[3]~346_combout ) ) ) + + .dataa(!\CONTROL_UNIT|M2R[0]~0_combout ), + .datab(!\ALU|Mux24~1_combout ), + .datac(!\ALU|Mux25~1_combout ), + .datad(!\rd[3]~346_combout ), + .datae(!\rd[3]~282_combout ), + .dataf(!\rd[3]~303_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[3]~347_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[3]~347 .extended_lut = "off"; +defparam \rd[3]~347 .lut_mask = 64'h00FF10FF01FF11FF; +defparam \rd[3]~347 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X35_Y9_N23 +dffeas \REGS|regs[8][3]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[3]~347_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~24_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[8][3]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[8][3]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[8][3]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: FF_X40_Y7_N1 +dffeas \REGS|regs[9][3]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[3]~347_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~29_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[9][3]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[9][3]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[9][3]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X35_Y9_N24 +cyclonev_lcell_comb \REGS|Mux28~1 ( +// Equation(s): +// \REGS|Mux28~1_combout = ( \REGS|regs[9][3]~DUPLICATE_q & ( (\ROM|mem~0_combout & ((\ROM|mem~15_combout ) # (\REGS|regs[8][3]~DUPLICATE_q ))) ) ) # ( !\REGS|regs[9][3]~DUPLICATE_q & ( (\ROM|mem~0_combout & (\REGS|regs[8][3]~DUPLICATE_q & +// !\ROM|mem~15_combout )) ) ) + + .dataa(gnd), + .datab(!\ROM|mem~0_combout ), + .datac(!\REGS|regs[8][3]~DUPLICATE_q ), + .datad(!\ROM|mem~15_combout ), + .datae(gnd), + .dataf(!\REGS|regs[9][3]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux28~1_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux28~1 .extended_lut = "off"; +defparam \REGS|Mux28~1 .lut_mask = 64'h0300030003330333; +defparam \REGS|Mux28~1 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X35_Y9_N9 +cyclonev_lcell_comb \REGS|Mux28~0 ( +// Equation(s): +// \REGS|Mux28~0_combout = ( \REGS|Mux60~1_combout & ( \ROM|mem~16_combout & ( (!\ROM|mem~9_combout ) # (\REGS|Mux60~3_combout ) ) ) ) # ( !\REGS|Mux60~1_combout & ( \ROM|mem~16_combout & ( (\ROM|mem~9_combout & \REGS|Mux60~3_combout ) ) ) ) # ( +// \REGS|Mux60~1_combout & ( !\ROM|mem~16_combout & ( (!\ROM|mem~9_combout & (\REGS|Mux60~0_combout )) # (\ROM|mem~9_combout & ((\REGS|Mux60~2_combout ))) ) ) ) # ( !\REGS|Mux60~1_combout & ( !\ROM|mem~16_combout & ( (!\ROM|mem~9_combout & +// (\REGS|Mux60~0_combout )) # (\ROM|mem~9_combout & ((\REGS|Mux60~2_combout ))) ) ) ) + + .dataa(!\ROM|mem~9_combout ), + .datab(!\REGS|Mux60~0_combout ), + .datac(!\REGS|Mux60~3_combout ), + .datad(!\REGS|Mux60~2_combout ), + .datae(!\REGS|Mux60~1_combout ), + .dataf(!\ROM|mem~16_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux28~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux28~0 .extended_lut = "off"; +defparam \REGS|Mux28~0 .lut_mask = 64'h227722770505AFAF; +defparam \REGS|Mux28~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X35_Y9_N39 +cyclonev_lcell_comb \REGS|Mux28~2 ( +// Equation(s): +// \REGS|Mux28~2_combout = ( \REGS|Mux28~0_combout & ( (((\ROM|mem~9_combout & \REGS|Mux60~4_combout )) # (\REGS|Mux28~1_combout )) # (\ROM|mem~17_combout ) ) ) # ( !\REGS|Mux28~0_combout & ( (!\ROM|mem~17_combout & (((\ROM|mem~9_combout & +// \REGS|Mux60~4_combout )) # (\REGS|Mux28~1_combout ))) ) ) + + .dataa(!\ROM|mem~9_combout ), + .datab(!\ROM|mem~17_combout ), + .datac(!\REGS|Mux28~1_combout ), + .datad(!\REGS|Mux60~4_combout ), + .datae(gnd), + .dataf(!\REGS|Mux28~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux28~2_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux28~2 .extended_lut = "off"; +defparam \REGS|Mux28~2 .lut_mask = 64'h0C4C0C4C3F7F3F7F; +defparam \REGS|Mux28~2 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y9_N27 +cyclonev_lcell_comb \ALU|Mux27~1 ( +// Equation(s): +// \ALU|Mux27~1_combout = ( \ALU|adder_unit|OUT_1 [4] & ( (!\ALU|Mux27~0_combout & \ALU|Mux29~0_combout ) ) ) # ( !\ALU|adder_unit|OUT_1 [4] & ( !\ALU|Mux27~0_combout ) ) + + .dataa(gnd), + .datab(gnd), + .datac(!\ALU|Mux27~0_combout ), + .datad(!\ALU|Mux29~0_combout ), + .datae(gnd), + .dataf(!\ALU|adder_unit|OUT_1 [4]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\ALU|Mux27~1_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \ALU|Mux27~1 .extended_lut = "off"; +defparam \ALU|Mux27~1 .lut_mask = 64'hF0F0F0F000F000F0; +defparam \ALU|Mux27~1 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X46_Y9_N54 +cyclonev_lcell_comb \RAM|mem~260 ( +// Equation(s): +// \RAM|mem~260_combout = ( !\rst[0]~input_o & ( \REGS|Mux59~15_combout ) ) # ( !\rst[0]~input_o & ( !\REGS|Mux59~15_combout & ( ((\ROM|mem~9_combout & \REGS|Mux59~7_combout )) # (\REGS|Mux59~14_combout ) ) ) ) + + .dataa(!\ROM|mem~9_combout ), + .datab(!\REGS|Mux59~14_combout ), + .datac(!\REGS|Mux59~7_combout ), + .datad(gnd), + .datae(!\rst[0]~input_o ), + .dataf(!\REGS|Mux59~15_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem~260_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem~260 .extended_lut = "off"; +defparam \RAM|mem~260 .lut_mask = 64'h37370000FFFF0000; +defparam \RAM|mem~260 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X47_Y10_N25 +dffeas \RAM|mem[115][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[115][2]~16_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[115][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[115][4] .is_wysiwyg = "true"; +defparam \RAM|mem[115][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X46_Y8_N19 +dffeas \RAM|mem[119][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[119][4]~32_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[119][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[119][4] .is_wysiwyg = "true"; +defparam \RAM|mem[119][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X45_Y10_N10 +dffeas \RAM|mem[123][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[123][1]~48_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[123][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[123][4] .is_wysiwyg = "true"; +defparam \RAM|mem[123][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X46_Y8_N38 +dffeas \RAM|mem[127][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[127][1]~64_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[127][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[127][4] .is_wysiwyg = "true"; +defparam \RAM|mem[127][4] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X46_Y8_N36 +cyclonev_lcell_comb \rd[4]~388 ( +// Equation(s): +// \rd[4]~388_combout = ( \RAM|mem[127][4]~q & ( \ALU|Mux29~3_combout & ( (!\ALU|Mux28~1_combout & ((\RAM|mem[123][4]~q ))) # (\ALU|Mux28~1_combout & (\RAM|mem[115][4]~q )) ) ) ) # ( !\RAM|mem[127][4]~q & ( \ALU|Mux29~3_combout & ( +// (!\ALU|Mux28~1_combout & ((\RAM|mem[123][4]~q ))) # (\ALU|Mux28~1_combout & (\RAM|mem[115][4]~q )) ) ) ) # ( \RAM|mem[127][4]~q & ( !\ALU|Mux29~3_combout & ( (!\ALU|Mux28~1_combout ) # (\RAM|mem[119][4]~q ) ) ) ) # ( !\RAM|mem[127][4]~q & ( +// !\ALU|Mux29~3_combout & ( (\RAM|mem[119][4]~q & \ALU|Mux28~1_combout ) ) ) ) + + .dataa(!\RAM|mem[115][4]~q ), + .datab(!\RAM|mem[119][4]~q ), + .datac(!\ALU|Mux28~1_combout ), + .datad(!\RAM|mem[123][4]~q ), + .datae(!\RAM|mem[127][4]~q ), + .dataf(!\ALU|Mux29~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[4]~388_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[4]~388 .extended_lut = "off"; +defparam \rd[4]~388 .lut_mask = 64'h0303F3F305F505F5; +defparam \rd[4]~388 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X47_Y5_N40 +dffeas \RAM|mem[113][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[113][0]~14_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[113][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[113][4] .is_wysiwyg = "true"; +defparam \RAM|mem[113][4] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X48_Y13_N45 +cyclonev_lcell_comb \RAM|mem[121][4]~feeder ( +// Equation(s): +// \RAM|mem[121][4]~feeder_combout = ( \RAM|mem~260_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~260_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[121][4]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[121][4]~feeder .extended_lut = "off"; +defparam \RAM|mem[121][4]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[121][4]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X48_Y13_N46 +dffeas \RAM|mem[121][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[121][4]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[121][2]~46_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[121][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[121][4] .is_wysiwyg = "true"; +defparam \RAM|mem[121][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X53_Y13_N1 +dffeas \RAM|mem[117][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[117][2]~30_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[117][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[117][4] .is_wysiwyg = "true"; +defparam \RAM|mem[117][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X55_Y11_N2 +dffeas \RAM|mem[125][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[125][4]~56_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[125][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[125][4] .is_wysiwyg = "true"; +defparam \RAM|mem[125][4] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X55_Y11_N0 +cyclonev_lcell_comb \rd[4]~386 ( +// Equation(s): +// \rd[4]~386_combout = ( \RAM|mem[125][4]~q & ( \ALU|Mux29~3_combout & ( (!\ALU|Mux28~1_combout & ((\RAM|mem[121][4]~q ))) # (\ALU|Mux28~1_combout & (\RAM|mem[113][4]~q )) ) ) ) # ( !\RAM|mem[125][4]~q & ( \ALU|Mux29~3_combout & ( +// (!\ALU|Mux28~1_combout & ((\RAM|mem[121][4]~q ))) # (\ALU|Mux28~1_combout & (\RAM|mem[113][4]~q )) ) ) ) # ( \RAM|mem[125][4]~q & ( !\ALU|Mux29~3_combout & ( (!\ALU|Mux28~1_combout ) # (\RAM|mem[117][4]~q ) ) ) ) # ( !\RAM|mem[125][4]~q & ( +// !\ALU|Mux29~3_combout & ( (\ALU|Mux28~1_combout & \RAM|mem[117][4]~q ) ) ) ) + + .dataa(!\RAM|mem[113][4]~q ), + .datab(!\RAM|mem[121][4]~q ), + .datac(!\ALU|Mux28~1_combout ), + .datad(!\RAM|mem[117][4]~q ), + .datae(!\RAM|mem[125][4]~q ), + .dataf(!\ALU|Mux29~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[4]~386_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[4]~386 .extended_lut = "off"; +defparam \rd[4]~386 .lut_mask = 64'h000FF0FF35353535; +defparam \rd[4]~386 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X51_Y7_N13 +dffeas \RAM|mem[124][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[124][2]~52_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[124][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[124][4] .is_wysiwyg = "true"; +defparam \RAM|mem[124][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X54_Y9_N22 +dffeas \RAM|mem[120][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[120][0]~45_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[120][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[120][4] .is_wysiwyg = "true"; +defparam \RAM|mem[120][4] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X55_Y9_N15 +cyclonev_lcell_comb \RAM|mem[112][4]~feeder ( +// Equation(s): +// \RAM|mem[112][4]~feeder_combout = ( \RAM|mem~260_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~260_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[112][4]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[112][4]~feeder .extended_lut = "off"; +defparam \RAM|mem[112][4]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[112][4]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X55_Y9_N16 +dffeas \RAM|mem[112][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[112][4]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[112][1]~13_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[112][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[112][4] .is_wysiwyg = "true"; +defparam \RAM|mem[112][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X50_Y11_N37 +dffeas \RAM|mem[116][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[116][0]~29_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[116][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[116][4] .is_wysiwyg = "true"; +defparam \RAM|mem[116][4] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X49_Y11_N54 +cyclonev_lcell_comb \rd[4]~385 ( +// Equation(s): +// \rd[4]~385_combout = ( \ALU|Mux29~3_combout & ( \ALU|Mux28~1_combout & ( \RAM|mem[112][4]~q ) ) ) # ( !\ALU|Mux29~3_combout & ( \ALU|Mux28~1_combout & ( \RAM|mem[116][4]~q ) ) ) # ( \ALU|Mux29~3_combout & ( !\ALU|Mux28~1_combout & ( +// \RAM|mem[120][4]~q ) ) ) # ( !\ALU|Mux29~3_combout & ( !\ALU|Mux28~1_combout & ( \RAM|mem[124][4]~q ) ) ) + + .dataa(!\RAM|mem[124][4]~q ), + .datab(!\RAM|mem[120][4]~q ), + .datac(!\RAM|mem[112][4]~q ), + .datad(!\RAM|mem[116][4]~q ), + .datae(!\ALU|Mux29~3_combout ), + .dataf(!\ALU|Mux28~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[4]~385_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[4]~385 .extended_lut = "off"; +defparam \rd[4]~385 .lut_mask = 64'h5555333300FF0F0F; +defparam \rd[4]~385 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X50_Y8_N37 +dffeas \RAM|mem[122][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[122][2]~47_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[122][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[122][4] .is_wysiwyg = "true"; +defparam \RAM|mem[122][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X50_Y9_N37 +dffeas \RAM|mem[114][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[114][0]~15_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[114][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[114][4] .is_wysiwyg = "true"; +defparam \RAM|mem[114][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X50_Y9_N11 +dffeas \RAM|mem[118][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[118][4]~31_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[118][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[118][4] .is_wysiwyg = "true"; +defparam \RAM|mem[118][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X50_Y9_N26 +dffeas \RAM|mem[126][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[126][1]~60_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[126][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[126][4] .is_wysiwyg = "true"; +defparam \RAM|mem[126][4] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X50_Y9_N24 +cyclonev_lcell_comb \rd[4]~387 ( +// Equation(s): +// \rd[4]~387_combout = ( \RAM|mem[126][4]~q & ( \ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout & ((\RAM|mem[118][4]~q ))) # (\ALU|Mux29~3_combout & (\RAM|mem[114][4]~q )) ) ) ) # ( !\RAM|mem[126][4]~q & ( \ALU|Mux28~1_combout & ( +// (!\ALU|Mux29~3_combout & ((\RAM|mem[118][4]~q ))) # (\ALU|Mux29~3_combout & (\RAM|mem[114][4]~q )) ) ) ) # ( \RAM|mem[126][4]~q & ( !\ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout ) # (\RAM|mem[122][4]~q ) ) ) ) # ( !\RAM|mem[126][4]~q & ( +// !\ALU|Mux28~1_combout & ( (\RAM|mem[122][4]~q & \ALU|Mux29~3_combout ) ) ) ) + + .dataa(!\RAM|mem[122][4]~q ), + .datab(!\RAM|mem[114][4]~q ), + .datac(!\ALU|Mux29~3_combout ), + .datad(!\RAM|mem[118][4]~q ), + .datae(!\RAM|mem[126][4]~q ), + .dataf(!\ALU|Mux28~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[4]~387_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[4]~387 .extended_lut = "off"; +defparam \rd[4]~387 .lut_mask = 64'h0505F5F503F303F3; +defparam \rd[4]~387 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X46_Y8_N21 +cyclonev_lcell_comb \rd[4]~389 ( +// Equation(s): +// \rd[4]~389_combout = ( \rd[4]~387_combout & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout ) # (\rd[4]~385_combout ) ) ) ) # ( !\rd[4]~387_combout & ( \ALU|Mux31~3_combout & ( (\ALU|Mux30~1_combout & \rd[4]~385_combout ) ) ) ) # ( +// \rd[4]~387_combout & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & (\rd[4]~388_combout )) # (\ALU|Mux30~1_combout & ((\rd[4]~386_combout ))) ) ) ) # ( !\rd[4]~387_combout & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & +// (\rd[4]~388_combout )) # (\ALU|Mux30~1_combout & ((\rd[4]~386_combout ))) ) ) ) + + .dataa(!\rd[4]~388_combout ), + .datab(!\ALU|Mux30~1_combout ), + .datac(!\rd[4]~386_combout ), + .datad(!\rd[4]~385_combout ), + .datae(!\rd[4]~387_combout ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[4]~389_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[4]~389 .extended_lut = "off"; +defparam \rd[4]~389 .lut_mask = 64'h474747470033CCFF; +defparam \rd[4]~389 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X54_Y9_N10 +dffeas \RAM|mem[72][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[72][3]~33_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[72][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[72][4] .is_wysiwyg = "true"; +defparam \RAM|mem[72][4] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X55_Y9_N3 +cyclonev_lcell_comb \RAM|mem[64][4]~feeder ( +// Equation(s): +// \RAM|mem[64][4]~feeder_combout = ( \RAM|mem~260_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~260_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[64][4]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[64][4]~feeder .extended_lut = "off"; +defparam \RAM|mem[64][4]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[64][4]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X55_Y9_N4 +dffeas \RAM|mem[64][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[64][4]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[64][1]~1_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[64][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[64][4] .is_wysiwyg = "true"; +defparam \RAM|mem[64][4] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X55_Y10_N30 +cyclonev_lcell_comb \RAM|mem[76][4]~feeder ( +// Equation(s): +// \RAM|mem[76][4]~feeder_combout = ( \RAM|mem~260_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~260_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[76][4]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[76][4]~feeder .extended_lut = "off"; +defparam \RAM|mem[76][4]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[76][4]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X55_Y10_N31 +dffeas \RAM|mem[76][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[76][4]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[76][2]~49_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[76][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[76][4] .is_wysiwyg = "true"; +defparam \RAM|mem[76][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X55_Y8_N26 +dffeas \RAM|mem[68][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[68][0]~17_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[68][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[68][4] .is_wysiwyg = "true"; +defparam \RAM|mem[68][4] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X55_Y8_N24 +cyclonev_lcell_comb \rd[4]~370 ( +// Equation(s): +// \rd[4]~370_combout = ( \RAM|mem[68][4]~q & ( \ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout ) # (\RAM|mem[64][4]~q ) ) ) ) # ( !\RAM|mem[68][4]~q & ( \ALU|Mux28~1_combout & ( (\RAM|mem[64][4]~q & \ALU|Mux29~3_combout ) ) ) ) # ( \RAM|mem[68][4]~q +// & ( !\ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout & ((\RAM|mem[76][4]~q ))) # (\ALU|Mux29~3_combout & (\RAM|mem[72][4]~q )) ) ) ) # ( !\RAM|mem[68][4]~q & ( !\ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout & ((\RAM|mem[76][4]~q ))) # +// (\ALU|Mux29~3_combout & (\RAM|mem[72][4]~q )) ) ) ) + + .dataa(!\RAM|mem[72][4]~q ), + .datab(!\RAM|mem[64][4]~q ), + .datac(!\RAM|mem[76][4]~q ), + .datad(!\ALU|Mux29~3_combout ), + .datae(!\RAM|mem[68][4]~q ), + .dataf(!\ALU|Mux28~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[4]~370_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[4]~370 .extended_lut = "off"; +defparam \rd[4]~370 .lut_mask = 64'h0F550F550033FF33; +defparam \rd[4]~370 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X55_Y11_N10 +dffeas \RAM|mem[77][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[77][3]~53_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[77][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[77][4] .is_wysiwyg = "true"; +defparam \RAM|mem[77][4] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X51_Y13_N39 +cyclonev_lcell_comb \RAM|mem[73][4]~feeder ( +// Equation(s): +// \RAM|mem[73][4]~feeder_combout = ( \RAM|mem~260_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~260_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[73][4]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[73][4]~feeder .extended_lut = "off"; +defparam \RAM|mem[73][4]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[73][4]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X51_Y13_N41 +dffeas \RAM|mem[73][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[73][4]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[73][1]~34_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[73][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[73][4] .is_wysiwyg = "true"; +defparam \RAM|mem[73][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X51_Y9_N59 +dffeas \RAM|mem[65][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[65][3]~2_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[65][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[65][4] .is_wysiwyg = "true"; +defparam \RAM|mem[65][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X55_Y8_N44 +dffeas \RAM|mem[69][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[69][1]~18_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[69][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[69][4] .is_wysiwyg = "true"; +defparam \RAM|mem[69][4] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X55_Y8_N42 +cyclonev_lcell_comb \rd[4]~371 ( +// Equation(s): +// \rd[4]~371_combout = ( \RAM|mem[69][4]~q & ( \ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout ) # (\RAM|mem[65][4]~q ) ) ) ) # ( !\RAM|mem[69][4]~q & ( \ALU|Mux28~1_combout & ( (\RAM|mem[65][4]~q & \ALU|Mux29~3_combout ) ) ) ) # ( \RAM|mem[69][4]~q +// & ( !\ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout & (\RAM|mem[77][4]~q )) # (\ALU|Mux29~3_combout & ((\RAM|mem[73][4]~q ))) ) ) ) # ( !\RAM|mem[69][4]~q & ( !\ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout & (\RAM|mem[77][4]~q )) # +// (\ALU|Mux29~3_combout & ((\RAM|mem[73][4]~q ))) ) ) ) + + .dataa(!\RAM|mem[77][4]~q ), + .datab(!\RAM|mem[73][4]~q ), + .datac(!\RAM|mem[65][4]~q ), + .datad(!\ALU|Mux29~3_combout ), + .datae(!\RAM|mem[69][4]~q ), + .dataf(!\ALU|Mux28~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[4]~371_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[4]~371 .extended_lut = "off"; +defparam \rd[4]~371 .lut_mask = 64'h55335533000FFF0F; +defparam \rd[4]~371 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X46_Y7_N52 +dffeas \RAM|mem[79][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[79][0]~61_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[79][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[79][4] .is_wysiwyg = "true"; +defparam \RAM|mem[79][4] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X45_Y10_N57 +cyclonev_lcell_comb \RAM|mem[75][4]~feeder ( +// Equation(s): +// \RAM|mem[75][4]~feeder_combout = \RAM|mem~260_combout + + .dataa(gnd), + .datab(gnd), + .datac(!\RAM|mem~260_combout ), + .datad(gnd), + .datae(gnd), + .dataf(gnd), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[75][4]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[75][4]~feeder .extended_lut = "off"; +defparam \RAM|mem[75][4]~feeder .lut_mask = 64'h0F0F0F0F0F0F0F0F; +defparam \RAM|mem[75][4]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X45_Y10_N59 +dffeas \RAM|mem[75][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[75][4]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[75][2]~36_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[75][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[75][4] .is_wysiwyg = "true"; +defparam \RAM|mem[75][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X42_Y7_N34 +dffeas \RAM|mem[71][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[71][3]~20_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[71][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[71][4] .is_wysiwyg = "true"; +defparam \RAM|mem[71][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X51_Y9_N37 +dffeas \RAM|mem[67][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[67][3]~4_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[67][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[67][4] .is_wysiwyg = "true"; +defparam \RAM|mem[67][4] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X55_Y8_N30 +cyclonev_lcell_comb \rd[4]~373 ( +// Equation(s): +// \rd[4]~373_combout = ( \ALU|Mux28~1_combout & ( \ALU|Mux29~3_combout & ( \RAM|mem[67][4]~q ) ) ) # ( !\ALU|Mux28~1_combout & ( \ALU|Mux29~3_combout & ( \RAM|mem[75][4]~q ) ) ) # ( \ALU|Mux28~1_combout & ( !\ALU|Mux29~3_combout & ( +// \RAM|mem[71][4]~q ) ) ) # ( !\ALU|Mux28~1_combout & ( !\ALU|Mux29~3_combout & ( \RAM|mem[79][4]~q ) ) ) + + .dataa(!\RAM|mem[79][4]~q ), + .datab(!\RAM|mem[75][4]~q ), + .datac(!\RAM|mem[71][4]~q ), + .datad(!\RAM|mem[67][4]~q ), + .datae(!\ALU|Mux28~1_combout ), + .dataf(!\ALU|Mux29~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[4]~373_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[4]~373 .extended_lut = "off"; +defparam \rd[4]~373 .lut_mask = 64'h55550F0F333300FF; +defparam \rd[4]~373 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X51_Y7_N5 +dffeas \RAM|mem[70][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[70][4]~19_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[70][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[70][4] .is_wysiwyg = "true"; +defparam \RAM|mem[70][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X54_Y8_N25 +dffeas \RAM|mem[66][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[66][2]~3_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[66][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[66][4] .is_wysiwyg = "true"; +defparam \RAM|mem[66][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X50_Y8_N25 +dffeas \RAM|mem[74][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[74][1]~35_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[74][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[74][4] .is_wysiwyg = "true"; +defparam \RAM|mem[74][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X54_Y8_N8 +dffeas \RAM|mem[78][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[78][0]~57_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[78][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[78][4] .is_wysiwyg = "true"; +defparam \RAM|mem[78][4] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X54_Y8_N6 +cyclonev_lcell_comb \rd[4]~372 ( +// Equation(s): +// \rd[4]~372_combout = ( \RAM|mem[78][4]~q & ( \ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout & (\RAM|mem[70][4]~q )) # (\ALU|Mux29~3_combout & ((\RAM|mem[66][4]~q ))) ) ) ) # ( !\RAM|mem[78][4]~q & ( \ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout +// & (\RAM|mem[70][4]~q )) # (\ALU|Mux29~3_combout & ((\RAM|mem[66][4]~q ))) ) ) ) # ( \RAM|mem[78][4]~q & ( !\ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout ) # (\RAM|mem[74][4]~q ) ) ) ) # ( !\RAM|mem[78][4]~q & ( !\ALU|Mux28~1_combout & ( +// (\RAM|mem[74][4]~q & \ALU|Mux29~3_combout ) ) ) ) + + .dataa(!\RAM|mem[70][4]~q ), + .datab(!\RAM|mem[66][4]~q ), + .datac(!\RAM|mem[74][4]~q ), + .datad(!\ALU|Mux29~3_combout ), + .datae(!\RAM|mem[78][4]~q ), + .dataf(!\ALU|Mux28~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[4]~372_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[4]~372 .extended_lut = "off"; +defparam \rd[4]~372 .lut_mask = 64'h000FFF0F55335533; +defparam \rd[4]~372 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X55_Y8_N51 +cyclonev_lcell_comb \rd[4]~374 ( +// Equation(s): +// \rd[4]~374_combout = ( \rd[4]~372_combout & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout ) # (\rd[4]~370_combout ) ) ) ) # ( !\rd[4]~372_combout & ( \ALU|Mux31~3_combout & ( (\rd[4]~370_combout & \ALU|Mux30~1_combout ) ) ) ) # ( +// \rd[4]~372_combout & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & ((\rd[4]~373_combout ))) # (\ALU|Mux30~1_combout & (\rd[4]~371_combout )) ) ) ) # ( !\rd[4]~372_combout & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & +// ((\rd[4]~373_combout ))) # (\ALU|Mux30~1_combout & (\rd[4]~371_combout )) ) ) ) + + .dataa(!\rd[4]~370_combout ), + .datab(!\rd[4]~371_combout ), + .datac(!\rd[4]~373_combout ), + .datad(!\ALU|Mux30~1_combout ), + .datae(!\rd[4]~372_combout ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[4]~374_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[4]~374 .extended_lut = "off"; +defparam \rd[4]~374 .lut_mask = 64'h0F330F330055FF55; +defparam \rd[4]~374 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X47_Y10_N40 +dffeas \RAM|mem[99][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[99][0]~12_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[99][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[99][4] .is_wysiwyg = "true"; +defparam \RAM|mem[99][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X47_Y7_N23 +dffeas \RAM|mem[98][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[98][3]~11_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[98][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[98][4] .is_wysiwyg = "true"; +defparam \RAM|mem[98][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X50_Y13_N55 +dffeas \RAM|mem[97][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[97][4]~10_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[97][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[97][4] .is_wysiwyg = "true"; +defparam \RAM|mem[97][4] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X54_Y13_N18 +cyclonev_lcell_comb \RAM|mem[96][4]~feeder ( +// Equation(s): +// \RAM|mem[96][4]~feeder_combout = ( \RAM|mem~260_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~260_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[96][4]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[96][4]~feeder .extended_lut = "off"; +defparam \RAM|mem[96][4]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[96][4]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X54_Y13_N19 +dffeas \RAM|mem[96][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[96][4]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[96][1]~9_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[96][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[96][4] .is_wysiwyg = "true"; +defparam \RAM|mem[96][4] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X46_Y8_N15 +cyclonev_lcell_comb \rd[4]~380 ( +// Equation(s): +// \rd[4]~380_combout = ( \RAM|mem[96][4]~q & ( \ALU|Mux31~3_combout & ( (\ALU|Mux30~1_combout ) # (\RAM|mem[98][4]~q ) ) ) ) # ( !\RAM|mem[96][4]~q & ( \ALU|Mux31~3_combout & ( (\RAM|mem[98][4]~q & !\ALU|Mux30~1_combout ) ) ) ) # ( \RAM|mem[96][4]~q +// & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & (\RAM|mem[99][4]~q )) # (\ALU|Mux30~1_combout & ((\RAM|mem[97][4]~q ))) ) ) ) # ( !\RAM|mem[96][4]~q & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & (\RAM|mem[99][4]~q )) # +// (\ALU|Mux30~1_combout & ((\RAM|mem[97][4]~q ))) ) ) ) + + .dataa(!\RAM|mem[99][4]~q ), + .datab(!\RAM|mem[98][4]~q ), + .datac(!\RAM|mem[97][4]~q ), + .datad(!\ALU|Mux30~1_combout ), + .datae(!\RAM|mem[96][4]~q ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[4]~380_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[4]~380 .extended_lut = "off"; +defparam \rd[4]~380 .lut_mask = 64'h550F550F330033FF; +defparam \rd[4]~380 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X42_Y14_N41 +dffeas \RAM|mem[105][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[105][0]~42_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[105][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[105][4] .is_wysiwyg = "true"; +defparam \RAM|mem[105][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X53_Y13_N43 +dffeas \RAM|mem[104][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[104][0]~41_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[104][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[104][4] .is_wysiwyg = "true"; +defparam \RAM|mem[104][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X42_Y14_N34 +dffeas \RAM|mem[106][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[106][0]~43_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[106][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[106][4] .is_wysiwyg = "true"; +defparam \RAM|mem[106][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X43_Y13_N26 +dffeas \RAM|mem[107][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[107][2]~44_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[107][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[107][4] .is_wysiwyg = "true"; +defparam \RAM|mem[107][4] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X43_Y13_N24 +cyclonev_lcell_comb \rd[4]~382 ( +// Equation(s): +// \rd[4]~382_combout = ( \RAM|mem[107][4]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & ((\RAM|mem[106][4]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[104][4]~q )) ) ) ) # ( !\RAM|mem[107][4]~q & ( \ALU|Mux31~3_combout & ( +// (!\ALU|Mux30~1_combout & ((\RAM|mem[106][4]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[104][4]~q )) ) ) ) # ( \RAM|mem[107][4]~q & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout ) # (\RAM|mem[105][4]~q ) ) ) ) # ( !\RAM|mem[107][4]~q & ( +// !\ALU|Mux31~3_combout & ( (\RAM|mem[105][4]~q & \ALU|Mux30~1_combout ) ) ) ) + + .dataa(!\RAM|mem[105][4]~q ), + .datab(!\RAM|mem[104][4]~q ), + .datac(!\RAM|mem[106][4]~q ), + .datad(!\ALU|Mux30~1_combout ), + .datae(!\RAM|mem[107][4]~q ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[4]~382_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[4]~382 .extended_lut = "off"; +defparam \rd[4]~382 .lut_mask = 64'h0055FF550F330F33; +defparam \rd[4]~382 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X53_Y7_N57 +cyclonev_lcell_comb \RAM|mem[109][4]~feeder ( +// Equation(s): +// \RAM|mem[109][4]~feeder_combout = ( \RAM|mem~260_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~260_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[109][4]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[109][4]~feeder .extended_lut = "off"; +defparam \RAM|mem[109][4]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[109][4]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X53_Y7_N59 +dffeas \RAM|mem[109][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[109][4]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[109][1]~55_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[109][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[109][4] .is_wysiwyg = "true"; +defparam \RAM|mem[109][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X48_Y9_N17 +dffeas \RAM|mem[110][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[110][0]~59_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[110][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[110][4] .is_wysiwyg = "true"; +defparam \RAM|mem[110][4] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X50_Y14_N27 +cyclonev_lcell_comb \RAM|mem[108][4]~feeder ( +// Equation(s): +// \RAM|mem[108][4]~feeder_combout = ( \RAM|mem~260_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~260_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[108][4]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[108][4]~feeder .extended_lut = "off"; +defparam \RAM|mem[108][4]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[108][4]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X50_Y14_N29 +dffeas \RAM|mem[108][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[108][4]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[108][3]~51_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[108][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[108][4] .is_wysiwyg = "true"; +defparam \RAM|mem[108][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X48_Y9_N20 +dffeas \RAM|mem[111][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[111][2]~63_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[111][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[111][4] .is_wysiwyg = "true"; +defparam \RAM|mem[111][4] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X48_Y9_N18 +cyclonev_lcell_comb \rd[4]~383 ( +// Equation(s): +// \rd[4]~383_combout = ( \RAM|mem[111][4]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & (\RAM|mem[110][4]~q )) # (\ALU|Mux30~1_combout & ((\RAM|mem[108][4]~q ))) ) ) ) # ( !\RAM|mem[111][4]~q & ( \ALU|Mux31~3_combout & ( +// (!\ALU|Mux30~1_combout & (\RAM|mem[110][4]~q )) # (\ALU|Mux30~1_combout & ((\RAM|mem[108][4]~q ))) ) ) ) # ( \RAM|mem[111][4]~q & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout ) # (\RAM|mem[109][4]~q ) ) ) ) # ( !\RAM|mem[111][4]~q & ( +// !\ALU|Mux31~3_combout & ( (\RAM|mem[109][4]~q & \ALU|Mux30~1_combout ) ) ) ) + + .dataa(!\RAM|mem[109][4]~q ), + .datab(!\RAM|mem[110][4]~q ), + .datac(!\RAM|mem[108][4]~q ), + .datad(!\ALU|Mux30~1_combout ), + .datae(!\RAM|mem[111][4]~q ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[4]~383_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[4]~383 .extended_lut = "off"; +defparam \rd[4]~383 .lut_mask = 64'h0055FF55330F330F; +defparam \rd[4]~383 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X47_Y6_N2 +dffeas \RAM|mem[100][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[100][0]~25_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[100][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[100][4] .is_wysiwyg = "true"; +defparam \RAM|mem[100][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X47_Y6_N44 +dffeas \RAM|mem[101][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[101][1]~26_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[101][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[101][4] .is_wysiwyg = "true"; +defparam \RAM|mem[101][4] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X54_Y13_N48 +cyclonev_lcell_comb \RAM|mem[102][4]~feeder ( +// Equation(s): +// \RAM|mem[102][4]~feeder_combout = ( \RAM|mem~260_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~260_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[102][4]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[102][4]~feeder .extended_lut = "off"; +defparam \RAM|mem[102][4]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[102][4]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X54_Y13_N49 +dffeas \RAM|mem[102][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[102][4]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[102][1]~27_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[102][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[102][4] .is_wysiwyg = "true"; +defparam \RAM|mem[102][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X47_Y6_N38 +dffeas \RAM|mem[103][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[103][1]~28_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[103][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[103][4] .is_wysiwyg = "true"; +defparam \RAM|mem[103][4] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X47_Y6_N36 +cyclonev_lcell_comb \rd[4]~381 ( +// Equation(s): +// \rd[4]~381_combout = ( \RAM|mem[103][4]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & ((\RAM|mem[102][4]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[100][4]~q )) ) ) ) # ( !\RAM|mem[103][4]~q & ( \ALU|Mux31~3_combout & ( +// (!\ALU|Mux30~1_combout & ((\RAM|mem[102][4]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[100][4]~q )) ) ) ) # ( \RAM|mem[103][4]~q & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout ) # (\RAM|mem[101][4]~q ) ) ) ) # ( !\RAM|mem[103][4]~q & ( +// !\ALU|Mux31~3_combout & ( (\RAM|mem[101][4]~q & \ALU|Mux30~1_combout ) ) ) ) + + .dataa(!\RAM|mem[100][4]~q ), + .datab(!\RAM|mem[101][4]~q ), + .datac(!\RAM|mem[102][4]~q ), + .datad(!\ALU|Mux30~1_combout ), + .datae(!\RAM|mem[103][4]~q ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[4]~381_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[4]~381 .extended_lut = "off"; +defparam \rd[4]~381 .lut_mask = 64'h0033FF330F550F55; +defparam \rd[4]~381 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y8_N54 +cyclonev_lcell_comb \rd[4]~384 ( +// Equation(s): +// \rd[4]~384_combout = ( \rd[4]~383_combout & ( \rd[4]~381_combout & ( (!\ALU|Mux29~3_combout ) # ((!\ALU|Mux28~1_combout & ((\rd[4]~382_combout ))) # (\ALU|Mux28~1_combout & (\rd[4]~380_combout ))) ) ) ) # ( !\rd[4]~383_combout & ( \rd[4]~381_combout +// & ( (!\ALU|Mux29~3_combout & (((\ALU|Mux28~1_combout )))) # (\ALU|Mux29~3_combout & ((!\ALU|Mux28~1_combout & ((\rd[4]~382_combout ))) # (\ALU|Mux28~1_combout & (\rd[4]~380_combout )))) ) ) ) # ( \rd[4]~383_combout & ( !\rd[4]~381_combout & ( +// (!\ALU|Mux29~3_combout & (((!\ALU|Mux28~1_combout )))) # (\ALU|Mux29~3_combout & ((!\ALU|Mux28~1_combout & ((\rd[4]~382_combout ))) # (\ALU|Mux28~1_combout & (\rd[4]~380_combout )))) ) ) ) # ( !\rd[4]~383_combout & ( !\rd[4]~381_combout & ( +// (\ALU|Mux29~3_combout & ((!\ALU|Mux28~1_combout & ((\rd[4]~382_combout ))) # (\ALU|Mux28~1_combout & (\rd[4]~380_combout )))) ) ) ) + + .dataa(!\rd[4]~380_combout ), + .datab(!\ALU|Mux29~3_combout ), + .datac(!\ALU|Mux28~1_combout ), + .datad(!\rd[4]~382_combout ), + .datae(!\rd[4]~383_combout ), + .dataf(!\rd[4]~381_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[4]~384_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[4]~384 .extended_lut = "off"; +defparam \rd[4]~384 .lut_mask = 64'h0131C1F10D3DCDFD; +defparam \rd[4]~384 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X47_Y7_N4 +dffeas \RAM|mem[82][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[82][1]~7_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[82][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[82][4] .is_wysiwyg = "true"; +defparam \RAM|mem[82][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X51_Y7_N43 +dffeas \RAM|mem[86][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[86][3]~23_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[86][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[86][4] .is_wysiwyg = "true"; +defparam \RAM|mem[86][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X49_Y6_N31 +dffeas \RAM|mem[90][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[90][0]~39_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[90][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[90][4] .is_wysiwyg = "true"; +defparam \RAM|mem[90][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X50_Y10_N26 +dffeas \RAM|mem[94][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[94][4]~58_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[94][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[94][4] .is_wysiwyg = "true"; +defparam \RAM|mem[94][4] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X50_Y10_N24 +cyclonev_lcell_comb \rd[4]~377 ( +// Equation(s): +// \rd[4]~377_combout = ( \RAM|mem[94][4]~q & ( \ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout & ((\RAM|mem[86][4]~q ))) # (\ALU|Mux29~3_combout & (\RAM|mem[82][4]~q )) ) ) ) # ( !\RAM|mem[94][4]~q & ( \ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout +// & ((\RAM|mem[86][4]~q ))) # (\ALU|Mux29~3_combout & (\RAM|mem[82][4]~q )) ) ) ) # ( \RAM|mem[94][4]~q & ( !\ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout ) # (\RAM|mem[90][4]~q ) ) ) ) # ( !\RAM|mem[94][4]~q & ( !\ALU|Mux28~1_combout & ( +// (\RAM|mem[90][4]~q & \ALU|Mux29~3_combout ) ) ) ) + + .dataa(!\RAM|mem[82][4]~q ), + .datab(!\RAM|mem[86][4]~q ), + .datac(!\RAM|mem[90][4]~q ), + .datad(!\ALU|Mux29~3_combout ), + .datae(!\RAM|mem[94][4]~q ), + .dataf(!\ALU|Mux28~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[4]~377_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[4]~377 .extended_lut = "off"; +defparam \rd[4]~377 .lut_mask = 64'h000FFF0F33553355; +defparam \rd[4]~377 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X55_Y10_N39 +cyclonev_lcell_comb \RAM|mem[92][4]~feeder ( +// Equation(s): +// \RAM|mem[92][4]~feeder_combout = ( \RAM|mem~260_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~260_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[92][4]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[92][4]~feeder .extended_lut = "off"; +defparam \RAM|mem[92][4]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[92][4]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X55_Y10_N40 +dffeas \RAM|mem[92][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[92][4]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[92][2]~50_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[92][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[92][4] .is_wysiwyg = "true"; +defparam \RAM|mem[92][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X54_Y9_N16 +dffeas \RAM|mem[88][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[88][4]~37_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[88][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[88][4] .is_wysiwyg = "true"; +defparam \RAM|mem[88][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X55_Y9_N31 +dffeas \RAM|mem[80][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[80][0]~5_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[80][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[80][4] .is_wysiwyg = "true"; +defparam \RAM|mem[80][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X50_Y10_N2 +dffeas \RAM|mem[84][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[84][1]~21_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[84][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[84][4] .is_wysiwyg = "true"; +defparam \RAM|mem[84][4] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X50_Y10_N0 +cyclonev_lcell_comb \rd[4]~375 ( +// Equation(s): +// \rd[4]~375_combout = ( \RAM|mem[84][4]~q & ( \ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout ) # (\RAM|mem[80][4]~q ) ) ) ) # ( !\RAM|mem[84][4]~q & ( \ALU|Mux28~1_combout & ( (\ALU|Mux29~3_combout & \RAM|mem[80][4]~q ) ) ) ) # ( \RAM|mem[84][4]~q +// & ( !\ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout & (\RAM|mem[92][4]~q )) # (\ALU|Mux29~3_combout & ((\RAM|mem[88][4]~q ))) ) ) ) # ( !\RAM|mem[84][4]~q & ( !\ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout & (\RAM|mem[92][4]~q )) # +// (\ALU|Mux29~3_combout & ((\RAM|mem[88][4]~q ))) ) ) ) + + .dataa(!\RAM|mem[92][4]~q ), + .datab(!\RAM|mem[88][4]~q ), + .datac(!\ALU|Mux29~3_combout ), + .datad(!\RAM|mem[80][4]~q ), + .datae(!\RAM|mem[84][4]~q ), + .dataf(!\ALU|Mux28~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[4]~375_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[4]~375 .extended_lut = "off"; +defparam \rd[4]~375 .lut_mask = 64'h53535353000FF0FF; +defparam \rd[4]~375 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X51_Y13_N21 +cyclonev_lcell_comb \RAM|mem[89][4]~feeder ( +// Equation(s): +// \RAM|mem[89][4]~feeder_combout = ( \RAM|mem~260_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~260_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[89][4]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[89][4]~feeder .extended_lut = "off"; +defparam \RAM|mem[89][4]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[89][4]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X51_Y13_N22 +dffeas \RAM|mem[89][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[89][4]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[89][2]~38_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[89][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[89][4] .is_wysiwyg = "true"; +defparam \RAM|mem[89][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X55_Y11_N25 +dffeas \RAM|mem[93][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[93][2]~54_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[93][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[93][4] .is_wysiwyg = "true"; +defparam \RAM|mem[93][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X47_Y13_N49 +dffeas \RAM|mem[81][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[81][0]~6_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[81][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[81][4] .is_wysiwyg = "true"; +defparam \RAM|mem[81][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X50_Y10_N32 +dffeas \RAM|mem[85][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[85][1]~22_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[85][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[85][4] .is_wysiwyg = "true"; +defparam \RAM|mem[85][4] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X50_Y10_N30 +cyclonev_lcell_comb \rd[4]~376 ( +// Equation(s): +// \rd[4]~376_combout = ( \RAM|mem[85][4]~q & ( \ALU|Mux29~3_combout & ( (!\ALU|Mux28~1_combout & (\RAM|mem[89][4]~q )) # (\ALU|Mux28~1_combout & ((\RAM|mem[81][4]~q ))) ) ) ) # ( !\RAM|mem[85][4]~q & ( \ALU|Mux29~3_combout & ( (!\ALU|Mux28~1_combout +// & (\RAM|mem[89][4]~q )) # (\ALU|Mux28~1_combout & ((\RAM|mem[81][4]~q ))) ) ) ) # ( \RAM|mem[85][4]~q & ( !\ALU|Mux29~3_combout & ( (\ALU|Mux28~1_combout ) # (\RAM|mem[93][4]~q ) ) ) ) # ( !\RAM|mem[85][4]~q & ( !\ALU|Mux29~3_combout & ( +// (\RAM|mem[93][4]~q & !\ALU|Mux28~1_combout ) ) ) ) + + .dataa(!\RAM|mem[89][4]~q ), + .datab(!\RAM|mem[93][4]~q ), + .datac(!\RAM|mem[81][4]~q ), + .datad(!\ALU|Mux28~1_combout ), + .datae(!\RAM|mem[85][4]~q ), + .dataf(!\ALU|Mux29~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[4]~376_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[4]~376 .extended_lut = "off"; +defparam \rd[4]~376 .lut_mask = 64'h330033FF550F550F; +defparam \rd[4]~376 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X49_Y7_N2 +dffeas \RAM|mem[95][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[95][4]~62_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[95][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[95][4] .is_wysiwyg = "true"; +defparam \RAM|mem[95][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X45_Y10_N22 +dffeas \RAM|mem[91][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[91][0]~40_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[91][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[91][4] .is_wysiwyg = "true"; +defparam \RAM|mem[91][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X42_Y7_N58 +dffeas \RAM|mem[87][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[87][4]~24_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[87][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[87][4] .is_wysiwyg = "true"; +defparam \RAM|mem[87][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X49_Y7_N47 +dffeas \RAM|mem[83][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[83][0]~8_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[83][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[83][4] .is_wysiwyg = "true"; +defparam \RAM|mem[83][4] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X49_Y7_N30 +cyclonev_lcell_comb \rd[4]~378 ( +// Equation(s): +// \rd[4]~378_combout = ( \ALU|Mux28~1_combout & ( \ALU|Mux29~3_combout & ( \RAM|mem[83][4]~q ) ) ) # ( !\ALU|Mux28~1_combout & ( \ALU|Mux29~3_combout & ( \RAM|mem[91][4]~q ) ) ) # ( \ALU|Mux28~1_combout & ( !\ALU|Mux29~3_combout & ( +// \RAM|mem[87][4]~q ) ) ) # ( !\ALU|Mux28~1_combout & ( !\ALU|Mux29~3_combout & ( \RAM|mem[95][4]~q ) ) ) + + .dataa(!\RAM|mem[95][4]~q ), + .datab(!\RAM|mem[91][4]~q ), + .datac(!\RAM|mem[87][4]~q ), + .datad(!\RAM|mem[83][4]~q ), + .datae(!\ALU|Mux28~1_combout ), + .dataf(!\ALU|Mux29~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[4]~378_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[4]~378 .extended_lut = "off"; +defparam \rd[4]~378 .lut_mask = 64'h55550F0F333300FF; +defparam \rd[4]~378 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X50_Y10_N36 +cyclonev_lcell_comb \rd[4]~379 ( +// Equation(s): +// \rd[4]~379_combout = ( \rd[4]~378_combout & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & (\rd[4]~377_combout )) # (\ALU|Mux30~1_combout & ((\rd[4]~375_combout ))) ) ) ) # ( !\rd[4]~378_combout & ( \ALU|Mux31~3_combout & ( +// (!\ALU|Mux30~1_combout & (\rd[4]~377_combout )) # (\ALU|Mux30~1_combout & ((\rd[4]~375_combout ))) ) ) ) # ( \rd[4]~378_combout & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout ) # (\rd[4]~376_combout ) ) ) ) # ( !\rd[4]~378_combout & ( +// !\ALU|Mux31~3_combout & ( (\ALU|Mux30~1_combout & \rd[4]~376_combout ) ) ) ) + + .dataa(!\rd[4]~377_combout ), + .datab(!\ALU|Mux30~1_combout ), + .datac(!\rd[4]~375_combout ), + .datad(!\rd[4]~376_combout ), + .datae(!\rd[4]~378_combout ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[4]~379_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[4]~379 .extended_lut = "off"; +defparam \rd[4]~379 .lut_mask = 64'h0033CCFF47474747; +defparam \rd[4]~379 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y8_N42 +cyclonev_lcell_comb \rd[4]~390 ( +// Equation(s): +// \rd[4]~390_combout = ( \rd[4]~384_combout & ( \rd[4]~379_combout & ( (!\ALU|Mux26~1_combout & (((\rd[4]~389_combout )) # (\ALU|Mux27~1_combout ))) # (\ALU|Mux26~1_combout & ((!\ALU|Mux27~1_combout ) # ((\rd[4]~374_combout )))) ) ) ) # ( +// !\rd[4]~384_combout & ( \rd[4]~379_combout & ( (!\ALU|Mux26~1_combout & (!\ALU|Mux27~1_combout & (\rd[4]~389_combout ))) # (\ALU|Mux26~1_combout & ((!\ALU|Mux27~1_combout ) # ((\rd[4]~374_combout )))) ) ) ) # ( \rd[4]~384_combout & ( +// !\rd[4]~379_combout & ( (!\ALU|Mux26~1_combout & (((\rd[4]~389_combout )) # (\ALU|Mux27~1_combout ))) # (\ALU|Mux26~1_combout & (\ALU|Mux27~1_combout & ((\rd[4]~374_combout )))) ) ) ) # ( !\rd[4]~384_combout & ( !\rd[4]~379_combout & ( +// (!\ALU|Mux26~1_combout & (!\ALU|Mux27~1_combout & (\rd[4]~389_combout ))) # (\ALU|Mux26~1_combout & (\ALU|Mux27~1_combout & ((\rd[4]~374_combout )))) ) ) ) + + .dataa(!\ALU|Mux26~1_combout ), + .datab(!\ALU|Mux27~1_combout ), + .datac(!\rd[4]~389_combout ), + .datad(!\rd[4]~374_combout ), + .datae(!\rd[4]~384_combout ), + .dataf(!\rd[4]~379_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[4]~390_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[4]~390 .extended_lut = "off"; +defparam \rd[4]~390 .lut_mask = 64'h08192A3B4C5D6E7F; +defparam \rd[4]~390 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X42_Y10_N52 +dffeas \RAM|mem[171][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[171][2]~172_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[171][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[171][4] .is_wysiwyg = "true"; +defparam \RAM|mem[171][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X45_Y11_N16 +dffeas \RAM|mem[163][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[163][3]~164_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[163][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[163][4] .is_wysiwyg = "true"; +defparam \RAM|mem[163][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X47_Y9_N13 +dffeas \RAM|mem[167][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[167][1]~168_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[167][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[167][4] .is_wysiwyg = "true"; +defparam \RAM|mem[167][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X46_Y10_N5 +dffeas \RAM|mem[175][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[175][0]~176_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[175][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[175][4] .is_wysiwyg = "true"; +defparam \RAM|mem[175][4] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X46_Y10_N3 +cyclonev_lcell_comb \rd[4]~408 ( +// Equation(s): +// \rd[4]~408_combout = ( \RAM|mem[175][4]~q & ( \ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout & ((\RAM|mem[167][4]~q ))) # (\ALU|Mux29~3_combout & (\RAM|mem[163][4]~q )) ) ) ) # ( !\RAM|mem[175][4]~q & ( \ALU|Mux28~1_combout & ( +// (!\ALU|Mux29~3_combout & ((\RAM|mem[167][4]~q ))) # (\ALU|Mux29~3_combout & (\RAM|mem[163][4]~q )) ) ) ) # ( \RAM|mem[175][4]~q & ( !\ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout ) # (\RAM|mem[171][4]~q ) ) ) ) # ( !\RAM|mem[175][4]~q & ( +// !\ALU|Mux28~1_combout & ( (\RAM|mem[171][4]~q & \ALU|Mux29~3_combout ) ) ) ) + + .dataa(!\RAM|mem[171][4]~q ), + .datab(!\RAM|mem[163][4]~q ), + .datac(!\ALU|Mux29~3_combout ), + .datad(!\RAM|mem[167][4]~q ), + .datae(!\RAM|mem[175][4]~q ), + .dataf(!\ALU|Mux28~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[4]~408_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[4]~408 .extended_lut = "off"; +defparam \rd[4]~408 .lut_mask = 64'h0505F5F503F303F3; +defparam \rd[4]~408 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X42_Y13_N8 +dffeas \RAM|mem[155][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[155][0]~159_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[155][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[155][4] .is_wysiwyg = "true"; +defparam \RAM|mem[155][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X45_Y15_N52 +dffeas \RAM|mem[147][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[147][1]~157_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[147][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[147][4] .is_wysiwyg = "true"; +defparam \RAM|mem[147][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X43_Y11_N59 +dffeas \RAM|mem[151][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[151][3]~158_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[151][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[151][4] .is_wysiwyg = "true"; +defparam \RAM|mem[151][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X43_Y11_N50 +dffeas \RAM|mem[159][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[159][3]~160_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[159][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[159][4] .is_wysiwyg = "true"; +defparam \RAM|mem[159][4] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X43_Y11_N48 +cyclonev_lcell_comb \rd[4]~407 ( +// Equation(s): +// \rd[4]~407_combout = ( \RAM|mem[159][4]~q & ( \ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout & ((\RAM|mem[151][4]~q ))) # (\ALU|Mux29~3_combout & (\RAM|mem[147][4]~q )) ) ) ) # ( !\RAM|mem[159][4]~q & ( \ALU|Mux28~1_combout & ( +// (!\ALU|Mux29~3_combout & ((\RAM|mem[151][4]~q ))) # (\ALU|Mux29~3_combout & (\RAM|mem[147][4]~q )) ) ) ) # ( \RAM|mem[159][4]~q & ( !\ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout ) # (\RAM|mem[155][4]~q ) ) ) ) # ( !\RAM|mem[159][4]~q & ( +// !\ALU|Mux28~1_combout & ( (\RAM|mem[155][4]~q & \ALU|Mux29~3_combout ) ) ) ) + + .dataa(!\RAM|mem[155][4]~q ), + .datab(!\RAM|mem[147][4]~q ), + .datac(!\ALU|Mux29~3_combout ), + .datad(!\RAM|mem[151][4]~q ), + .datae(!\RAM|mem[159][4]~q ), + .dataf(!\ALU|Mux28~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[4]~407_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[4]~407 .extended_lut = "off"; +defparam \rd[4]~407 .lut_mask = 64'h0505F5F503F303F3; +defparam \rd[4]~407 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X43_Y6_N3 +cyclonev_lcell_comb \RAM|mem[187][4]~feeder ( +// Equation(s): +// \RAM|mem[187][4]~feeder_combout = ( \RAM|mem~260_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~260_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[187][4]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[187][4]~feeder .extended_lut = "off"; +defparam \RAM|mem[187][4]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[187][4]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X43_Y6_N5 +dffeas \RAM|mem[187][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[187][4]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[187][0]~191_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[187][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[187][4] .is_wysiwyg = "true"; +defparam \RAM|mem[187][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X42_Y5_N19 +dffeas \RAM|mem[179][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[179][4]~189_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[179][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[179][4] .is_wysiwyg = "true"; +defparam \RAM|mem[179][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X42_Y4_N13 +dffeas \RAM|mem[183][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[183][4]~190_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[183][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[183][4] .is_wysiwyg = "true"; +defparam \RAM|mem[183][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X43_Y6_N26 +dffeas \RAM|mem[191][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[191][2]~192_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[191][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[191][4] .is_wysiwyg = "true"; +defparam \RAM|mem[191][4] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X43_Y6_N24 +cyclonev_lcell_comb \rd[4]~409 ( +// Equation(s): +// \rd[4]~409_combout = ( \RAM|mem[191][4]~q & ( \ALU|Mux29~3_combout & ( (!\ALU|Mux28~1_combout & (\RAM|mem[187][4]~q )) # (\ALU|Mux28~1_combout & ((\RAM|mem[179][4]~q ))) ) ) ) # ( !\RAM|mem[191][4]~q & ( \ALU|Mux29~3_combout & ( +// (!\ALU|Mux28~1_combout & (\RAM|mem[187][4]~q )) # (\ALU|Mux28~1_combout & ((\RAM|mem[179][4]~q ))) ) ) ) # ( \RAM|mem[191][4]~q & ( !\ALU|Mux29~3_combout & ( (!\ALU|Mux28~1_combout ) # (\RAM|mem[183][4]~q ) ) ) ) # ( !\RAM|mem[191][4]~q & ( +// !\ALU|Mux29~3_combout & ( (\ALU|Mux28~1_combout & \RAM|mem[183][4]~q ) ) ) ) + + .dataa(!\RAM|mem[187][4]~q ), + .datab(!\RAM|mem[179][4]~q ), + .datac(!\ALU|Mux28~1_combout ), + .datad(!\RAM|mem[183][4]~q ), + .datae(!\RAM|mem[191][4]~q ), + .dataf(!\ALU|Mux29~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[4]~409_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[4]~409 .extended_lut = "off"; +defparam \rd[4]~409 .lut_mask = 64'h000FF0FF53535353; +defparam \rd[4]~409 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X45_Y13_N33 +cyclonev_lcell_comb \RAM|mem[131][4]~feeder ( +// Equation(s): +// \RAM|mem[131][4]~feeder_combout = ( \RAM|mem~260_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~260_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[131][4]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[131][4]~feeder .extended_lut = "off"; +defparam \RAM|mem[131][4]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[131][4]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X45_Y13_N35 +dffeas \RAM|mem[131][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[131][4]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[131][0]~141_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[131][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[131][4] .is_wysiwyg = "true"; +defparam \RAM|mem[131][4] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X48_Y5_N27 +cyclonev_lcell_comb \RAM|mem[135][4]~feeder ( +// Equation(s): +// \RAM|mem[135][4]~feeder_combout = ( \RAM|mem~260_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~260_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[135][4]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[135][4]~feeder .extended_lut = "off"; +defparam \RAM|mem[135][4]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[135][4]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X48_Y5_N28 +dffeas \RAM|mem[135][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[135][4]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[135][3]~142_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[135][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[135][4] .is_wysiwyg = "true"; +defparam \RAM|mem[135][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X42_Y9_N58 +dffeas \RAM|mem[139][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[139][3]~143_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[139][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[139][4] .is_wysiwyg = "true"; +defparam \RAM|mem[139][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X45_Y13_N26 +dffeas \RAM|mem[143][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[143][3]~144_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[143][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[143][4] .is_wysiwyg = "true"; +defparam \RAM|mem[143][4] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X45_Y13_N24 +cyclonev_lcell_comb \rd[4]~406 ( +// Equation(s): +// \rd[4]~406_combout = ( \RAM|mem[143][4]~q & ( \ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout & ((\RAM|mem[135][4]~q ))) # (\ALU|Mux29~3_combout & (\RAM|mem[131][4]~q )) ) ) ) # ( !\RAM|mem[143][4]~q & ( \ALU|Mux28~1_combout & ( +// (!\ALU|Mux29~3_combout & ((\RAM|mem[135][4]~q ))) # (\ALU|Mux29~3_combout & (\RAM|mem[131][4]~q )) ) ) ) # ( \RAM|mem[143][4]~q & ( !\ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout ) # (\RAM|mem[139][4]~q ) ) ) ) # ( !\RAM|mem[143][4]~q & ( +// !\ALU|Mux28~1_combout & ( (\RAM|mem[139][4]~q & \ALU|Mux29~3_combout ) ) ) ) + + .dataa(!\RAM|mem[131][4]~q ), + .datab(!\RAM|mem[135][4]~q ), + .datac(!\RAM|mem[139][4]~q ), + .datad(!\ALU|Mux29~3_combout ), + .datae(!\RAM|mem[143][4]~q ), + .dataf(!\ALU|Mux28~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[4]~406_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[4]~406 .extended_lut = "off"; +defparam \rd[4]~406 .lut_mask = 64'h000FFF0F33553355; +defparam \rd[4]~406 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X45_Y8_N12 +cyclonev_lcell_comb \rd[4]~410 ( +// Equation(s): +// \rd[4]~410_combout = ( \rd[4]~409_combout & ( \rd[4]~406_combout & ( (!\ALU|Mux26~1_combout & ((!\ALU|Mux27~1_combout ) # ((\rd[4]~408_combout )))) # (\ALU|Mux26~1_combout & (((\rd[4]~407_combout )) # (\ALU|Mux27~1_combout ))) ) ) ) # ( +// !\rd[4]~409_combout & ( \rd[4]~406_combout & ( (!\ALU|Mux26~1_combout & (\ALU|Mux27~1_combout & (\rd[4]~408_combout ))) # (\ALU|Mux26~1_combout & (((\rd[4]~407_combout )) # (\ALU|Mux27~1_combout ))) ) ) ) # ( \rd[4]~409_combout & ( +// !\rd[4]~406_combout & ( (!\ALU|Mux26~1_combout & ((!\ALU|Mux27~1_combout ) # ((\rd[4]~408_combout )))) # (\ALU|Mux26~1_combout & (!\ALU|Mux27~1_combout & ((\rd[4]~407_combout )))) ) ) ) # ( !\rd[4]~409_combout & ( !\rd[4]~406_combout & ( +// (!\ALU|Mux26~1_combout & (\ALU|Mux27~1_combout & (\rd[4]~408_combout ))) # (\ALU|Mux26~1_combout & (!\ALU|Mux27~1_combout & ((\rd[4]~407_combout )))) ) ) ) + + .dataa(!\ALU|Mux26~1_combout ), + .datab(!\ALU|Mux27~1_combout ), + .datac(!\rd[4]~408_combout ), + .datad(!\rd[4]~407_combout ), + .datae(!\rd[4]~409_combout ), + .dataf(!\rd[4]~406_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[4]~410_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[4]~410 .extended_lut = "off"; +defparam \rd[4]~410 .lut_mask = 64'h02468ACE13579BDF; +defparam \rd[4]~410 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X42_Y5_N40 +dffeas \RAM|mem[129][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[129][0]~133_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[129][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[129][4] .is_wysiwyg = "true"; +defparam \RAM|mem[129][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X49_Y6_N10 +dffeas \RAM|mem[177][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[177][3]~181_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[177][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[177][4] .is_wysiwyg = "true"; +defparam \RAM|mem[177][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X42_Y12_N28 +dffeas \RAM|mem[145][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[145][3]~149_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[145][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[145][4] .is_wysiwyg = "true"; +defparam \RAM|mem[145][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X48_Y6_N25 +dffeas \RAM|mem[161][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[161][0]~162_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[161][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[161][4] .is_wysiwyg = "true"; +defparam \RAM|mem[161][4] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X45_Y8_N30 +cyclonev_lcell_comb \rd[4]~396 ( +// Equation(s): +// \rd[4]~396_combout = ( \ALU|Mux26~1_combout & ( \ALU|Mux27~1_combout & ( \RAM|mem[129][4]~q ) ) ) # ( !\ALU|Mux26~1_combout & ( \ALU|Mux27~1_combout & ( \RAM|mem[161][4]~q ) ) ) # ( \ALU|Mux26~1_combout & ( !\ALU|Mux27~1_combout & ( +// \RAM|mem[145][4]~q ) ) ) # ( !\ALU|Mux26~1_combout & ( !\ALU|Mux27~1_combout & ( \RAM|mem[177][4]~q ) ) ) + + .dataa(!\RAM|mem[129][4]~q ), + .datab(!\RAM|mem[177][4]~q ), + .datac(!\RAM|mem[145][4]~q ), + .datad(!\RAM|mem[161][4]~q ), + .datae(!\ALU|Mux26~1_combout ), + .dataf(!\ALU|Mux27~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[4]~396_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[4]~396 .extended_lut = "off"; +defparam \rd[4]~396 .lut_mask = 64'h33330F0F00FF5555; +defparam \rd[4]~396 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X46_Y10_N29 +dffeas \RAM|mem[173][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[173][1]~174_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[173][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[173][4] .is_wysiwyg = "true"; +defparam \RAM|mem[173][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X48_Y14_N1 +dffeas \RAM|mem[141][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[141][4]~136_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[141][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[141][4] .is_wysiwyg = "true"; +defparam \RAM|mem[141][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X48_Y14_N7 +dffeas \RAM|mem[157][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[157][3]~152_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[157][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[157][4] .is_wysiwyg = "true"; +defparam \RAM|mem[157][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X45_Y8_N2 +dffeas \RAM|mem[189][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[189][3]~184_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[189][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[189][4] .is_wysiwyg = "true"; +defparam \RAM|mem[189][4] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X45_Y8_N0 +cyclonev_lcell_comb \rd[4]~399 ( +// Equation(s): +// \rd[4]~399_combout = ( \RAM|mem[189][4]~q & ( \ALU|Mux26~1_combout & ( (!\ALU|Mux27~1_combout & ((\RAM|mem[157][4]~q ))) # (\ALU|Mux27~1_combout & (\RAM|mem[141][4]~q )) ) ) ) # ( !\RAM|mem[189][4]~q & ( \ALU|Mux26~1_combout & ( +// (!\ALU|Mux27~1_combout & ((\RAM|mem[157][4]~q ))) # (\ALU|Mux27~1_combout & (\RAM|mem[141][4]~q )) ) ) ) # ( \RAM|mem[189][4]~q & ( !\ALU|Mux26~1_combout & ( (!\ALU|Mux27~1_combout ) # (\RAM|mem[173][4]~q ) ) ) ) # ( !\RAM|mem[189][4]~q & ( +// !\ALU|Mux26~1_combout & ( (\RAM|mem[173][4]~q & \ALU|Mux27~1_combout ) ) ) ) + + .dataa(!\RAM|mem[173][4]~q ), + .datab(!\ALU|Mux27~1_combout ), + .datac(!\RAM|mem[141][4]~q ), + .datad(!\RAM|mem[157][4]~q ), + .datae(!\RAM|mem[189][4]~q ), + .dataf(!\ALU|Mux26~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[4]~399_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[4]~399 .extended_lut = "off"; +defparam \rd[4]~399 .lut_mask = 64'h1111DDDD03CF03CF; +defparam \rd[4]~399 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X49_Y11_N22 +dffeas \RAM|mem[149][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[149][4]~150_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[149][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[149][4] .is_wysiwyg = "true"; +defparam \RAM|mem[149][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X49_Y11_N1 +dffeas \RAM|mem[181][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[181][4]~182_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[181][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[181][4] .is_wysiwyg = "true"; +defparam \RAM|mem[181][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X47_Y9_N7 +dffeas \RAM|mem[165][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[165][2]~166_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[165][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[165][4] .is_wysiwyg = "true"; +defparam \RAM|mem[165][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X49_Y11_N49 +dffeas \RAM|mem[133][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[133][1]~134_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[133][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[133][4] .is_wysiwyg = "true"; +defparam \RAM|mem[133][4] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X47_Y10_N12 +cyclonev_lcell_comb \rd[4]~397 ( +// Equation(s): +// \rd[4]~397_combout = ( \ALU|Mux26~1_combout & ( \ALU|Mux27~1_combout & ( \RAM|mem[133][4]~q ) ) ) # ( !\ALU|Mux26~1_combout & ( \ALU|Mux27~1_combout & ( \RAM|mem[165][4]~q ) ) ) # ( \ALU|Mux26~1_combout & ( !\ALU|Mux27~1_combout & ( +// \RAM|mem[149][4]~q ) ) ) # ( !\ALU|Mux26~1_combout & ( !\ALU|Mux27~1_combout & ( \RAM|mem[181][4]~q ) ) ) + + .dataa(!\RAM|mem[149][4]~q ), + .datab(!\RAM|mem[181][4]~q ), + .datac(!\RAM|mem[165][4]~q ), + .datad(!\RAM|mem[133][4]~q ), + .datae(!\ALU|Mux26~1_combout ), + .dataf(!\ALU|Mux27~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[4]~397_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[4]~397 .extended_lut = "off"; +defparam \rd[4]~397 .lut_mask = 64'h333355550F0F00FF; +defparam \rd[4]~397 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X42_Y13_N25 +dffeas \RAM|mem[169][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[169][2]~170_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[169][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[169][4] .is_wysiwyg = "true"; +defparam \RAM|mem[169][4] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X51_Y12_N39 +cyclonev_lcell_comb \RAM|mem[137][4]~feeder ( +// Equation(s): +// \RAM|mem[137][4]~feeder_combout = ( \RAM|mem~260_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~260_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[137][4]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[137][4]~feeder .extended_lut = "off"; +defparam \RAM|mem[137][4]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[137][4]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X51_Y12_N41 +dffeas \RAM|mem[137][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[137][4]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[137][1]~135_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[137][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[137][4] .is_wysiwyg = "true"; +defparam \RAM|mem[137][4] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X51_Y12_N45 +cyclonev_lcell_comb \RAM|mem[153][4]~feeder ( +// Equation(s): +// \RAM|mem[153][4]~feeder_combout = ( \RAM|mem~260_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~260_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[153][4]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[153][4]~feeder .extended_lut = "off"; +defparam \RAM|mem[153][4]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[153][4]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X51_Y12_N46 +dffeas \RAM|mem[153][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[153][4]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[153][0]~151_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[153][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[153][4] .is_wysiwyg = "true"; +defparam \RAM|mem[153][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X51_Y12_N23 +dffeas \RAM|mem[185][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[185][4]~183_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[185][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[185][4] .is_wysiwyg = "true"; +defparam \RAM|mem[185][4] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X51_Y12_N21 +cyclonev_lcell_comb \rd[4]~398 ( +// Equation(s): +// \rd[4]~398_combout = ( \RAM|mem[185][4]~q & ( \ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout & (\RAM|mem[169][4]~q )) # (\ALU|Mux26~1_combout & ((\RAM|mem[137][4]~q ))) ) ) ) # ( !\RAM|mem[185][4]~q & ( \ALU|Mux27~1_combout & ( +// (!\ALU|Mux26~1_combout & (\RAM|mem[169][4]~q )) # (\ALU|Mux26~1_combout & ((\RAM|mem[137][4]~q ))) ) ) ) # ( \RAM|mem[185][4]~q & ( !\ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout ) # (\RAM|mem[153][4]~q ) ) ) ) # ( !\RAM|mem[185][4]~q & ( +// !\ALU|Mux27~1_combout & ( (\RAM|mem[153][4]~q & \ALU|Mux26~1_combout ) ) ) ) + + .dataa(!\RAM|mem[169][4]~q ), + .datab(!\RAM|mem[137][4]~q ), + .datac(!\RAM|mem[153][4]~q ), + .datad(!\ALU|Mux26~1_combout ), + .datae(!\RAM|mem[185][4]~q ), + .dataf(!\ALU|Mux27~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[4]~398_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[4]~398 .extended_lut = "off"; +defparam \rd[4]~398 .lut_mask = 64'h000FFF0F55335533; +defparam \rd[4]~398 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X45_Y8_N42 +cyclonev_lcell_comb \rd[4]~400 ( +// Equation(s): +// \rd[4]~400_combout = ( \rd[4]~397_combout & ( \rd[4]~398_combout & ( (!\ALU|Mux29~3_combout & (((\ALU|Mux28~1_combout ) # (\rd[4]~399_combout )))) # (\ALU|Mux29~3_combout & (((!\ALU|Mux28~1_combout )) # (\rd[4]~396_combout ))) ) ) ) # ( +// !\rd[4]~397_combout & ( \rd[4]~398_combout & ( (!\ALU|Mux29~3_combout & (((\rd[4]~399_combout & !\ALU|Mux28~1_combout )))) # (\ALU|Mux29~3_combout & (((!\ALU|Mux28~1_combout )) # (\rd[4]~396_combout ))) ) ) ) # ( \rd[4]~397_combout & ( +// !\rd[4]~398_combout & ( (!\ALU|Mux29~3_combout & (((\ALU|Mux28~1_combout ) # (\rd[4]~399_combout )))) # (\ALU|Mux29~3_combout & (\rd[4]~396_combout & ((\ALU|Mux28~1_combout )))) ) ) ) # ( !\rd[4]~397_combout & ( !\rd[4]~398_combout & ( +// (!\ALU|Mux29~3_combout & (((\rd[4]~399_combout & !\ALU|Mux28~1_combout )))) # (\ALU|Mux29~3_combout & (\rd[4]~396_combout & ((\ALU|Mux28~1_combout )))) ) ) ) + + .dataa(!\ALU|Mux29~3_combout ), + .datab(!\rd[4]~396_combout ), + .datac(!\rd[4]~399_combout ), + .datad(!\ALU|Mux28~1_combout ), + .datae(!\rd[4]~397_combout ), + .dataf(!\rd[4]~398_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[4]~400_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[4]~400 .extended_lut = "off"; +defparam \rd[4]~400 .lut_mask = 64'h0A110ABB5F115FBB; +defparam \rd[4]~400 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X47_Y9_N1 +dffeas \RAM|mem[164][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[164][4]~165_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[164][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[164][4] .is_wysiwyg = "true"; +defparam \RAM|mem[164][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X42_Y10_N58 +dffeas \RAM|mem[132][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[132][0]~130_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[132][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[132][4] .is_wysiwyg = "true"; +defparam \RAM|mem[132][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X45_Y6_N37 +dffeas \RAM|mem[180][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[180][4]~178_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[180][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[180][4] .is_wysiwyg = "true"; +defparam \RAM|mem[180][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X45_Y6_N8 +dffeas \RAM|mem[148][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[148][1]~146_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[148][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[148][4] .is_wysiwyg = "true"; +defparam \RAM|mem[148][4] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X45_Y6_N6 +cyclonev_lcell_comb \rd[4]~392 ( +// Equation(s): +// \rd[4]~392_combout = ( \RAM|mem[148][4]~q & ( \ALU|Mux26~1_combout & ( (!\ALU|Mux27~1_combout ) # (\RAM|mem[132][4]~q ) ) ) ) # ( !\RAM|mem[148][4]~q & ( \ALU|Mux26~1_combout & ( (\ALU|Mux27~1_combout & \RAM|mem[132][4]~q ) ) ) ) # ( +// \RAM|mem[148][4]~q & ( !\ALU|Mux26~1_combout & ( (!\ALU|Mux27~1_combout & ((\RAM|mem[180][4]~q ))) # (\ALU|Mux27~1_combout & (\RAM|mem[164][4]~q )) ) ) ) # ( !\RAM|mem[148][4]~q & ( !\ALU|Mux26~1_combout & ( (!\ALU|Mux27~1_combout & +// ((\RAM|mem[180][4]~q ))) # (\ALU|Mux27~1_combout & (\RAM|mem[164][4]~q )) ) ) ) + + .dataa(!\RAM|mem[164][4]~q ), + .datab(!\ALU|Mux27~1_combout ), + .datac(!\RAM|mem[132][4]~q ), + .datad(!\RAM|mem[180][4]~q ), + .datae(!\RAM|mem[148][4]~q ), + .dataf(!\ALU|Mux26~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[4]~392_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[4]~392 .extended_lut = "off"; +defparam \rd[4]~392 .lut_mask = 64'h11DD11DD0303CFCF; +defparam \rd[4]~392 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X51_Y11_N30 +cyclonev_lcell_comb \RAM|mem[168][4]~feeder ( +// Equation(s): +// \RAM|mem[168][4]~feeder_combout = ( \RAM|mem~260_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~260_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[168][4]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[168][4]~feeder .extended_lut = "off"; +defparam \RAM|mem[168][4]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[168][4]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X51_Y11_N31 +dffeas \RAM|mem[168][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[168][4]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[168][2]~169_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[168][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[168][4] .is_wysiwyg = "true"; +defparam \RAM|mem[168][4] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X53_Y9_N15 +cyclonev_lcell_comb \RAM|mem[136][4]~feeder ( +// Equation(s): +// \RAM|mem[136][4]~feeder_combout = ( \RAM|mem~260_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~260_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[136][4]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[136][4]~feeder .extended_lut = "off"; +defparam \RAM|mem[136][4]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[136][4]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X53_Y9_N17 +dffeas \RAM|mem[136][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[136][4]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[136][1]~131_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[136][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[136][4] .is_wysiwyg = "true"; +defparam \RAM|mem[136][4] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X51_Y11_N0 +cyclonev_lcell_comb \RAM|mem[152][4]~feeder ( +// Equation(s): +// \RAM|mem[152][4]~feeder_combout = ( \RAM|mem~260_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~260_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[152][4]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[152][4]~feeder .extended_lut = "off"; +defparam \RAM|mem[152][4]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[152][4]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X51_Y11_N1 +dffeas \RAM|mem[152][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[152][4]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[152][3]~147_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[152][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[152][4] .is_wysiwyg = "true"; +defparam \RAM|mem[152][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X51_Y9_N8 +dffeas \RAM|mem[184][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[184][4]~179_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[184][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[184][4] .is_wysiwyg = "true"; +defparam \RAM|mem[184][4] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X51_Y9_N6 +cyclonev_lcell_comb \rd[4]~393 ( +// Equation(s): +// \rd[4]~393_combout = ( \RAM|mem[184][4]~q & ( \ALU|Mux26~1_combout & ( (!\ALU|Mux27~1_combout & ((\RAM|mem[152][4]~q ))) # (\ALU|Mux27~1_combout & (\RAM|mem[136][4]~q )) ) ) ) # ( !\RAM|mem[184][4]~q & ( \ALU|Mux26~1_combout & ( +// (!\ALU|Mux27~1_combout & ((\RAM|mem[152][4]~q ))) # (\ALU|Mux27~1_combout & (\RAM|mem[136][4]~q )) ) ) ) # ( \RAM|mem[184][4]~q & ( !\ALU|Mux26~1_combout & ( (!\ALU|Mux27~1_combout ) # (\RAM|mem[168][4]~q ) ) ) ) # ( !\RAM|mem[184][4]~q & ( +// !\ALU|Mux26~1_combout & ( (\RAM|mem[168][4]~q & \ALU|Mux27~1_combout ) ) ) ) + + .dataa(!\RAM|mem[168][4]~q ), + .datab(!\RAM|mem[136][4]~q ), + .datac(!\ALU|Mux27~1_combout ), + .datad(!\RAM|mem[152][4]~q ), + .datae(!\RAM|mem[184][4]~q ), + .dataf(!\ALU|Mux26~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[4]~393_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[4]~393 .extended_lut = "off"; +defparam \rd[4]~393 .lut_mask = 64'h0505F5F503F303F3; +defparam \rd[4]~393 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X46_Y5_N18 +cyclonev_lcell_comb \RAM|mem[188][4]~feeder ( +// Equation(s): +// \RAM|mem[188][4]~feeder_combout = ( \RAM|mem~260_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~260_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[188][4]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[188][4]~feeder .extended_lut = "off"; +defparam \RAM|mem[188][4]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[188][4]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X46_Y5_N19 +dffeas \RAM|mem[188][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[188][4]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[188][2]~180_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[188][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[188][4] .is_wysiwyg = "true"; +defparam \RAM|mem[188][4] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X46_Y5_N24 +cyclonev_lcell_comb \RAM|mem[172][4]~feeder ( +// Equation(s): +// \RAM|mem[172][4]~feeder_combout = ( \RAM|mem~260_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~260_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[172][4]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[172][4]~feeder .extended_lut = "off"; +defparam \RAM|mem[172][4]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[172][4]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X46_Y5_N26 +dffeas \RAM|mem[172][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[172][4]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[172][2]~173_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[172][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[172][4] .is_wysiwyg = "true"; +defparam \RAM|mem[172][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X42_Y4_N49 +dffeas \RAM|mem[156][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[156][1]~148_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[156][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[156][4] .is_wysiwyg = "true"; +defparam \RAM|mem[156][4] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X46_Y5_N42 +cyclonev_lcell_comb \RAM|mem[140][4]~feeder ( +// Equation(s): +// \RAM|mem[140][4]~feeder_combout = ( \RAM|mem~260_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~260_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[140][4]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[140][4]~feeder .extended_lut = "off"; +defparam \RAM|mem[140][4]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[140][4]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X46_Y5_N43 +dffeas \RAM|mem[140][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[140][4]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[140][4]~132_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[140][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[140][4] .is_wysiwyg = "true"; +defparam \RAM|mem[140][4] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X45_Y5_N3 +cyclonev_lcell_comb \rd[4]~394 ( +// Equation(s): +// \rd[4]~394_combout = ( \ALU|Mux27~1_combout & ( \ALU|Mux26~1_combout & ( \RAM|mem[140][4]~q ) ) ) # ( !\ALU|Mux27~1_combout & ( \ALU|Mux26~1_combout & ( \RAM|mem[156][4]~q ) ) ) # ( \ALU|Mux27~1_combout & ( !\ALU|Mux26~1_combout & ( +// \RAM|mem[172][4]~q ) ) ) # ( !\ALU|Mux27~1_combout & ( !\ALU|Mux26~1_combout & ( \RAM|mem[188][4]~q ) ) ) + + .dataa(!\RAM|mem[188][4]~q ), + .datab(!\RAM|mem[172][4]~q ), + .datac(!\RAM|mem[156][4]~q ), + .datad(!\RAM|mem[140][4]~q ), + .datae(!\ALU|Mux27~1_combout ), + .dataf(!\ALU|Mux26~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[4]~394_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[4]~394 .extended_lut = "off"; +defparam \rd[4]~394 .lut_mask = 64'h555533330F0F00FF; +defparam \rd[4]~394 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X51_Y8_N27 +cyclonev_lcell_comb \RAM|mem[176][4]~feeder ( +// Equation(s): +// \RAM|mem[176][4]~feeder_combout = ( \RAM|mem~260_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~260_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[176][4]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[176][4]~feeder .extended_lut = "off"; +defparam \RAM|mem[176][4]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[176][4]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X51_Y8_N29 +dffeas \RAM|mem[176][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[176][4]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[176][1]~177_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[176][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[176][4] .is_wysiwyg = "true"; +defparam \RAM|mem[176][4] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X51_Y8_N57 +cyclonev_lcell_comb \RAM|mem[128][4]~feeder ( +// Equation(s): +// \RAM|mem[128][4]~feeder_combout = ( \RAM|mem~260_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~260_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[128][4]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[128][4]~feeder .extended_lut = "off"; +defparam \RAM|mem[128][4]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[128][4]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X51_Y8_N59 +dffeas \RAM|mem[128][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[128][4]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[128][4]~129_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[128][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[128][4] .is_wysiwyg = "true"; +defparam \RAM|mem[128][4] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X51_Y8_N18 +cyclonev_lcell_comb \RAM|mem[144][4]~feeder ( +// Equation(s): +// \RAM|mem[144][4]~feeder_combout = ( \RAM|mem~260_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~260_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[144][4]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[144][4]~feeder .extended_lut = "off"; +defparam \RAM|mem[144][4]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[144][4]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X51_Y8_N19 +dffeas \RAM|mem[144][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[144][4]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[144][3]~145_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[144][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[144][4] .is_wysiwyg = "true"; +defparam \RAM|mem[144][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X45_Y11_N43 +dffeas \RAM|mem[160][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[160][3]~161_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[160][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[160][4] .is_wysiwyg = "true"; +defparam \RAM|mem[160][4] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X50_Y8_N9 +cyclonev_lcell_comb \rd[4]~391 ( +// Equation(s): +// \rd[4]~391_combout = ( \ALU|Mux26~1_combout & ( \ALU|Mux27~1_combout & ( \RAM|mem[128][4]~q ) ) ) # ( !\ALU|Mux26~1_combout & ( \ALU|Mux27~1_combout & ( \RAM|mem[160][4]~q ) ) ) # ( \ALU|Mux26~1_combout & ( !\ALU|Mux27~1_combout & ( +// \RAM|mem[144][4]~q ) ) ) # ( !\ALU|Mux26~1_combout & ( !\ALU|Mux27~1_combout & ( \RAM|mem[176][4]~q ) ) ) + + .dataa(!\RAM|mem[176][4]~q ), + .datab(!\RAM|mem[128][4]~q ), + .datac(!\RAM|mem[144][4]~q ), + .datad(!\RAM|mem[160][4]~q ), + .datae(!\ALU|Mux26~1_combout ), + .dataf(!\ALU|Mux27~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[4]~391_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[4]~391 .extended_lut = "off"; +defparam \rd[4]~391 .lut_mask = 64'h55550F0F00FF3333; +defparam \rd[4]~391 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X45_Y8_N36 +cyclonev_lcell_comb \rd[4]~395 ( +// Equation(s): +// \rd[4]~395_combout = ( \rd[4]~394_combout & ( \rd[4]~391_combout & ( (!\ALU|Mux29~3_combout & (((!\ALU|Mux28~1_combout )) # (\rd[4]~392_combout ))) # (\ALU|Mux29~3_combout & (((\ALU|Mux28~1_combout ) # (\rd[4]~393_combout )))) ) ) ) # ( +// !\rd[4]~394_combout & ( \rd[4]~391_combout & ( (!\ALU|Mux29~3_combout & (\rd[4]~392_combout & ((\ALU|Mux28~1_combout )))) # (\ALU|Mux29~3_combout & (((\ALU|Mux28~1_combout ) # (\rd[4]~393_combout )))) ) ) ) # ( \rd[4]~394_combout & ( +// !\rd[4]~391_combout & ( (!\ALU|Mux29~3_combout & (((!\ALU|Mux28~1_combout )) # (\rd[4]~392_combout ))) # (\ALU|Mux29~3_combout & (((\rd[4]~393_combout & !\ALU|Mux28~1_combout )))) ) ) ) # ( !\rd[4]~394_combout & ( !\rd[4]~391_combout & ( +// (!\ALU|Mux29~3_combout & (\rd[4]~392_combout & ((\ALU|Mux28~1_combout )))) # (\ALU|Mux29~3_combout & (((\rd[4]~393_combout & !\ALU|Mux28~1_combout )))) ) ) ) + + .dataa(!\rd[4]~392_combout ), + .datab(!\ALU|Mux29~3_combout ), + .datac(!\rd[4]~393_combout ), + .datad(!\ALU|Mux28~1_combout ), + .datae(!\rd[4]~394_combout ), + .dataf(!\rd[4]~391_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[4]~395_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[4]~395 .extended_lut = "off"; +defparam \rd[4]~395 .lut_mask = 64'h0344CF440377CF77; +defparam \rd[4]~395 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X53_Y9_N27 +cyclonev_lcell_comb \RAM|mem[138][4]~feeder ( +// Equation(s): +// \RAM|mem[138][4]~feeder_combout = ( \RAM|mem~260_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~260_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[138][4]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[138][4]~feeder .extended_lut = "off"; +defparam \RAM|mem[138][4]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[138][4]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X53_Y9_N29 +dffeas \RAM|mem[138][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[138][4]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[138][3]~139_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[138][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[138][4] .is_wysiwyg = "true"; +defparam \RAM|mem[138][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X45_Y4_N59 +dffeas \RAM|mem[154][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[154][2]~155_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[154][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[154][4] .is_wysiwyg = "true"; +defparam \RAM|mem[154][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X45_Y4_N52 +dffeas \RAM|mem[170][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[170][4]~171_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[170][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[170][4] .is_wysiwyg = "true"; +defparam \RAM|mem[170][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X45_Y4_N35 +dffeas \RAM|mem[186][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[186][0]~187_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[186][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[186][4] .is_wysiwyg = "true"; +defparam \RAM|mem[186][4] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X45_Y4_N33 +cyclonev_lcell_comb \rd[4]~403 ( +// Equation(s): +// \rd[4]~403_combout = ( \RAM|mem[186][4]~q & ( \ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout & ((\RAM|mem[170][4]~q ))) # (\ALU|Mux26~1_combout & (\RAM|mem[138][4]~q )) ) ) ) # ( !\RAM|mem[186][4]~q & ( \ALU|Mux27~1_combout & ( +// (!\ALU|Mux26~1_combout & ((\RAM|mem[170][4]~q ))) # (\ALU|Mux26~1_combout & (\RAM|mem[138][4]~q )) ) ) ) # ( \RAM|mem[186][4]~q & ( !\ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout ) # (\RAM|mem[154][4]~q ) ) ) ) # ( !\RAM|mem[186][4]~q & ( +// !\ALU|Mux27~1_combout & ( (\RAM|mem[154][4]~q & \ALU|Mux26~1_combout ) ) ) ) + + .dataa(!\RAM|mem[138][4]~q ), + .datab(!\RAM|mem[154][4]~q ), + .datac(!\RAM|mem[170][4]~q ), + .datad(!\ALU|Mux26~1_combout ), + .datae(!\RAM|mem[186][4]~q ), + .dataf(!\ALU|Mux27~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[4]~403_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[4]~403 .extended_lut = "off"; +defparam \rd[4]~403 .lut_mask = 64'h0033FF330F550F55; +defparam \rd[4]~403 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X46_Y6_N23 +dffeas \RAM|mem[158][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[158][4]~156_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[158][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[158][4] .is_wysiwyg = "true"; +defparam \RAM|mem[158][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X46_Y11_N52 +dffeas \RAM|mem[142][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[142][1]~140_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[142][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[142][4] .is_wysiwyg = "true"; +defparam \RAM|mem[142][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X46_Y6_N26 +dffeas \RAM|mem[174][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[174][4]~175_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[174][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[174][4] .is_wysiwyg = "true"; +defparam \RAM|mem[174][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X46_Y6_N32 +dffeas \RAM|mem[190][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[190][2]~188_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[190][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[190][4] .is_wysiwyg = "true"; +defparam \RAM|mem[190][4] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X46_Y6_N30 +cyclonev_lcell_comb \rd[4]~404 ( +// Equation(s): +// \rd[4]~404_combout = ( \RAM|mem[190][4]~q & ( \ALU|Mux26~1_combout & ( (!\ALU|Mux27~1_combout & (\RAM|mem[158][4]~q )) # (\ALU|Mux27~1_combout & ((\RAM|mem[142][4]~q ))) ) ) ) # ( !\RAM|mem[190][4]~q & ( \ALU|Mux26~1_combout & ( +// (!\ALU|Mux27~1_combout & (\RAM|mem[158][4]~q )) # (\ALU|Mux27~1_combout & ((\RAM|mem[142][4]~q ))) ) ) ) # ( \RAM|mem[190][4]~q & ( !\ALU|Mux26~1_combout & ( (!\ALU|Mux27~1_combout ) # (\RAM|mem[174][4]~q ) ) ) ) # ( !\RAM|mem[190][4]~q & ( +// !\ALU|Mux26~1_combout & ( (\RAM|mem[174][4]~q & \ALU|Mux27~1_combout ) ) ) ) + + .dataa(!\RAM|mem[158][4]~q ), + .datab(!\RAM|mem[142][4]~q ), + .datac(!\RAM|mem[174][4]~q ), + .datad(!\ALU|Mux27~1_combout ), + .datae(!\RAM|mem[190][4]~q ), + .dataf(!\ALU|Mux26~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[4]~404_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[4]~404 .extended_lut = "off"; +defparam \rd[4]~404 .lut_mask = 64'h000FFF0F55335533; +defparam \rd[4]~404 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X45_Y5_N58 +dffeas \RAM|mem[166][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[166][2]~167_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[166][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[166][4] .is_wysiwyg = "true"; +defparam \RAM|mem[166][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X45_Y5_N41 +dffeas \RAM|mem[134][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[134][4]~138_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[134][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[134][4] .is_wysiwyg = "true"; +defparam \RAM|mem[134][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X43_Y7_N16 +dffeas \RAM|mem[150][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[150][3]~154_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[150][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[150][4] .is_wysiwyg = "true"; +defparam \RAM|mem[150][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X45_Y5_N50 +dffeas \RAM|mem[182][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[182][0]~186_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[182][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[182][4] .is_wysiwyg = "true"; +defparam \RAM|mem[182][4] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X45_Y5_N48 +cyclonev_lcell_comb \rd[4]~402 ( +// Equation(s): +// \rd[4]~402_combout = ( \RAM|mem[182][4]~q & ( \ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout & (\RAM|mem[166][4]~q )) # (\ALU|Mux26~1_combout & ((\RAM|mem[134][4]~q ))) ) ) ) # ( !\RAM|mem[182][4]~q & ( \ALU|Mux27~1_combout & ( +// (!\ALU|Mux26~1_combout & (\RAM|mem[166][4]~q )) # (\ALU|Mux26~1_combout & ((\RAM|mem[134][4]~q ))) ) ) ) # ( \RAM|mem[182][4]~q & ( !\ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout ) # (\RAM|mem[150][4]~q ) ) ) ) # ( !\RAM|mem[182][4]~q & ( +// !\ALU|Mux27~1_combout & ( (\RAM|mem[150][4]~q & \ALU|Mux26~1_combout ) ) ) ) + + .dataa(!\RAM|mem[166][4]~q ), + .datab(!\RAM|mem[134][4]~q ), + .datac(!\RAM|mem[150][4]~q ), + .datad(!\ALU|Mux26~1_combout ), + .datae(!\RAM|mem[182][4]~q ), + .dataf(!\ALU|Mux27~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[4]~402_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[4]~402 .extended_lut = "off"; +defparam \rd[4]~402 .lut_mask = 64'h000FFF0F55335533; +defparam \rd[4]~402 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X45_Y11_N32 +dffeas \RAM|mem[162][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[162][0]~163_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[162][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[162][4] .is_wysiwyg = "true"; +defparam \RAM|mem[162][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X42_Y5_N52 +dffeas \RAM|mem[130][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[130][1]~137_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[130][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[130][4] .is_wysiwyg = "true"; +defparam \RAM|mem[130][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X48_Y6_N7 +dffeas \RAM|mem[146][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[146][4]~153_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[146][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[146][4] .is_wysiwyg = "true"; +defparam \RAM|mem[146][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X45_Y6_N26 +dffeas \RAM|mem[178][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[178][3]~185_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[178][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[178][4] .is_wysiwyg = "true"; +defparam \RAM|mem[178][4] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X45_Y6_N24 +cyclonev_lcell_comb \rd[4]~401 ( +// Equation(s): +// \rd[4]~401_combout = ( \RAM|mem[178][4]~q & ( \ALU|Mux26~1_combout & ( (!\ALU|Mux27~1_combout & ((\RAM|mem[146][4]~q ))) # (\ALU|Mux27~1_combout & (\RAM|mem[130][4]~q )) ) ) ) # ( !\RAM|mem[178][4]~q & ( \ALU|Mux26~1_combout & ( +// (!\ALU|Mux27~1_combout & ((\RAM|mem[146][4]~q ))) # (\ALU|Mux27~1_combout & (\RAM|mem[130][4]~q )) ) ) ) # ( \RAM|mem[178][4]~q & ( !\ALU|Mux26~1_combout & ( (!\ALU|Mux27~1_combout ) # (\RAM|mem[162][4]~q ) ) ) ) # ( !\RAM|mem[178][4]~q & ( +// !\ALU|Mux26~1_combout & ( (\RAM|mem[162][4]~q & \ALU|Mux27~1_combout ) ) ) ) + + .dataa(!\RAM|mem[162][4]~q ), + .datab(!\RAM|mem[130][4]~q ), + .datac(!\RAM|mem[146][4]~q ), + .datad(!\ALU|Mux27~1_combout ), + .datae(!\RAM|mem[178][4]~q ), + .dataf(!\ALU|Mux26~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[4]~401_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[4]~401 .extended_lut = "off"; +defparam \rd[4]~401 .lut_mask = 64'h0055FF550F330F33; +defparam \rd[4]~401 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X46_Y6_N48 +cyclonev_lcell_comb \rd[4]~405 ( +// Equation(s): +// \rd[4]~405_combout = ( \rd[4]~402_combout & ( \rd[4]~401_combout & ( ((!\ALU|Mux29~3_combout & ((\rd[4]~404_combout ))) # (\ALU|Mux29~3_combout & (\rd[4]~403_combout ))) # (\ALU|Mux28~1_combout ) ) ) ) # ( !\rd[4]~402_combout & ( \rd[4]~401_combout +// & ( (!\ALU|Mux28~1_combout & ((!\ALU|Mux29~3_combout & ((\rd[4]~404_combout ))) # (\ALU|Mux29~3_combout & (\rd[4]~403_combout )))) # (\ALU|Mux28~1_combout & (\ALU|Mux29~3_combout )) ) ) ) # ( \rd[4]~402_combout & ( !\rd[4]~401_combout & ( +// (!\ALU|Mux28~1_combout & ((!\ALU|Mux29~3_combout & ((\rd[4]~404_combout ))) # (\ALU|Mux29~3_combout & (\rd[4]~403_combout )))) # (\ALU|Mux28~1_combout & (!\ALU|Mux29~3_combout )) ) ) ) # ( !\rd[4]~402_combout & ( !\rd[4]~401_combout & ( +// (!\ALU|Mux28~1_combout & ((!\ALU|Mux29~3_combout & ((\rd[4]~404_combout ))) # (\ALU|Mux29~3_combout & (\rd[4]~403_combout )))) ) ) ) + + .dataa(!\ALU|Mux28~1_combout ), + .datab(!\ALU|Mux29~3_combout ), + .datac(!\rd[4]~403_combout ), + .datad(!\rd[4]~404_combout ), + .datae(!\rd[4]~402_combout ), + .dataf(!\rd[4]~401_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[4]~405_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[4]~405 .extended_lut = "off"; +defparam \rd[4]~405 .lut_mask = 64'h028A46CE139B57DF; +defparam \rd[4]~405 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X45_Y8_N57 +cyclonev_lcell_comb \rd[4]~411 ( +// Equation(s): +// \rd[4]~411_combout = ( \rd[4]~395_combout & ( \rd[4]~405_combout & ( ((!\ALU|Mux30~1_combout & (\rd[4]~410_combout )) # (\ALU|Mux30~1_combout & ((\rd[4]~400_combout )))) # (\ALU|Mux31~3_combout ) ) ) ) # ( !\rd[4]~395_combout & ( \rd[4]~405_combout +// & ( (!\ALU|Mux30~1_combout & (((\ALU|Mux31~3_combout )) # (\rd[4]~410_combout ))) # (\ALU|Mux30~1_combout & (((\rd[4]~400_combout & !\ALU|Mux31~3_combout )))) ) ) ) # ( \rd[4]~395_combout & ( !\rd[4]~405_combout & ( (!\ALU|Mux30~1_combout & +// (\rd[4]~410_combout & ((!\ALU|Mux31~3_combout )))) # (\ALU|Mux30~1_combout & (((\ALU|Mux31~3_combout ) # (\rd[4]~400_combout )))) ) ) ) # ( !\rd[4]~395_combout & ( !\rd[4]~405_combout & ( (!\ALU|Mux31~3_combout & ((!\ALU|Mux30~1_combout & +// (\rd[4]~410_combout )) # (\ALU|Mux30~1_combout & ((\rd[4]~400_combout ))))) ) ) ) + + .dataa(!\ALU|Mux30~1_combout ), + .datab(!\rd[4]~410_combout ), + .datac(!\rd[4]~400_combout ), + .datad(!\ALU|Mux31~3_combout ), + .datae(!\rd[4]~395_combout ), + .dataf(!\rd[4]~405_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[4]~411_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[4]~411 .extended_lut = "off"; +defparam \rd[4]~411 .lut_mask = 64'h2700275527AA27FF; +defparam \rd[4]~411 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X43_Y15_N36 +cyclonev_lcell_comb \RAM|mem[17][4]~feeder ( +// Equation(s): +// \RAM|mem[17][4]~feeder_combout = ( \RAM|mem~260_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~260_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[17][4]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[17][4]~feeder .extended_lut = "off"; +defparam \RAM|mem[17][4]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[17][4]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X43_Y15_N38 +dffeas \RAM|mem[17][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[17][4]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[17][0]~85_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[17][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[17][4] .is_wysiwyg = "true"; +defparam \RAM|mem[17][4] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X43_Y15_N30 +cyclonev_lcell_comb \RAM|mem[33][4]~feeder ( +// Equation(s): +// \RAM|mem[33][4]~feeder_combout = ( \RAM|mem~260_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~260_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[33][4]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[33][4]~feeder .extended_lut = "off"; +defparam \RAM|mem[33][4]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[33][4]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X43_Y15_N32 +dffeas \RAM|mem[33][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[33][4]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[33][3]~98_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[33][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[33][4] .is_wysiwyg = "true"; +defparam \RAM|mem[33][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X43_Y15_N13 +dffeas \RAM|mem[49][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[49][0]~117_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[49][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[49][4] .is_wysiwyg = "true"; +defparam \RAM|mem[49][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X40_Y15_N49 +dffeas \RAM|mem[1][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[1][0]~69_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[1][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[1][4] .is_wysiwyg = "true"; +defparam \RAM|mem[1][4] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X43_Y15_N51 +cyclonev_lcell_comb \rd[4]~417 ( +// Equation(s): +// \rd[4]~417_combout = ( \ALU|Mux26~1_combout & ( \ALU|Mux27~1_combout & ( \RAM|mem[1][4]~q ) ) ) # ( !\ALU|Mux26~1_combout & ( \ALU|Mux27~1_combout & ( \RAM|mem[33][4]~q ) ) ) # ( \ALU|Mux26~1_combout & ( !\ALU|Mux27~1_combout & ( +// \RAM|mem[17][4]~q ) ) ) # ( !\ALU|Mux26~1_combout & ( !\ALU|Mux27~1_combout & ( \RAM|mem[49][4]~q ) ) ) + + .dataa(!\RAM|mem[17][4]~q ), + .datab(!\RAM|mem[33][4]~q ), + .datac(!\RAM|mem[49][4]~q ), + .datad(!\RAM|mem[1][4]~q ), + .datae(!\ALU|Mux26~1_combout ), + .dataf(!\ALU|Mux27~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[4]~417_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[4]~417 .extended_lut = "off"; +defparam \rd[4]~417 .lut_mask = 64'h0F0F5555333300FF; +defparam \rd[4]~417 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X42_Y15_N44 +dffeas \RAM|mem[21][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[21][3]~86_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[21][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[21][4] .is_wysiwyg = "true"; +defparam \RAM|mem[21][4] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X49_Y14_N57 +cyclonev_lcell_comb \RAM|mem[37][4]~feeder ( +// Equation(s): +// \RAM|mem[37][4]~feeder_combout = ( \RAM|mem~260_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~260_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[37][4]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[37][4]~feeder .extended_lut = "off"; +defparam \RAM|mem[37][4]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[37][4]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X49_Y14_N58 +dffeas \RAM|mem[37][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[37][4]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[37][0]~102_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[37][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[37][4] .is_wysiwyg = "true"; +defparam \RAM|mem[37][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X42_Y15_N34 +dffeas \RAM|mem[5][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[5][0]~70_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[5][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[5][4] .is_wysiwyg = "true"; +defparam \RAM|mem[5][4] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X46_Y13_N42 +cyclonev_lcell_comb \RAM|mem[53][4]~feeder ( +// Equation(s): +// \RAM|mem[53][4]~feeder_combout = ( \RAM|mem~260_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~260_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[53][4]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[53][4]~feeder .extended_lut = "off"; +defparam \RAM|mem[53][4]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[53][4]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X46_Y13_N44 +dffeas \RAM|mem[53][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[53][4]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[53][2]~118_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[53][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[53][4] .is_wysiwyg = "true"; +defparam \RAM|mem[53][4] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y14_N15 +cyclonev_lcell_comb \rd[4]~418 ( +// Equation(s): +// \rd[4]~418_combout = ( \ALU|Mux26~1_combout & ( \ALU|Mux27~1_combout & ( \RAM|mem[5][4]~q ) ) ) # ( !\ALU|Mux26~1_combout & ( \ALU|Mux27~1_combout & ( \RAM|mem[37][4]~q ) ) ) # ( \ALU|Mux26~1_combout & ( !\ALU|Mux27~1_combout & ( +// \RAM|mem[21][4]~q ) ) ) # ( !\ALU|Mux26~1_combout & ( !\ALU|Mux27~1_combout & ( \RAM|mem[53][4]~q ) ) ) + + .dataa(!\RAM|mem[21][4]~q ), + .datab(!\RAM|mem[37][4]~q ), + .datac(!\RAM|mem[5][4]~q ), + .datad(!\RAM|mem[53][4]~q ), + .datae(!\ALU|Mux26~1_combout ), + .dataf(!\ALU|Mux27~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[4]~418_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[4]~418 .extended_lut = "off"; +defparam \rd[4]~418 .lut_mask = 64'h00FF555533330F0F; +defparam \rd[4]~418 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X45_Y14_N25 +dffeas \RAM|mem[61][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[61][0]~120_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[61][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[61][4] .is_wysiwyg = "true"; +defparam \RAM|mem[61][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X46_Y14_N22 +dffeas \RAM|mem[13][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[13][1]~72_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[13][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[13][4] .is_wysiwyg = "true"; +defparam \RAM|mem[13][4] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X48_Y15_N6 +cyclonev_lcell_comb \RAM|mem[29][4]~feeder ( +// Equation(s): +// \RAM|mem[29][4]~feeder_combout = ( \RAM|mem~260_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~260_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[29][4]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[29][4]~feeder .extended_lut = "off"; +defparam \RAM|mem[29][4]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[29][4]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X48_Y15_N7 +dffeas \RAM|mem[29][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[29][4]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[29][2]~88_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[29][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[29][4] .is_wysiwyg = "true"; +defparam \RAM|mem[29][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X46_Y14_N26 +dffeas \RAM|mem[45][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[45][4]~110_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[45][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[45][4] .is_wysiwyg = "true"; +defparam \RAM|mem[45][4] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X43_Y14_N42 +cyclonev_lcell_comb \rd[4]~420 ( +// Equation(s): +// \rd[4]~420_combout = ( \ALU|Mux26~1_combout & ( \ALU|Mux27~1_combout & ( \RAM|mem[13][4]~q ) ) ) # ( !\ALU|Mux26~1_combout & ( \ALU|Mux27~1_combout & ( \RAM|mem[45][4]~q ) ) ) # ( \ALU|Mux26~1_combout & ( !\ALU|Mux27~1_combout & ( +// \RAM|mem[29][4]~q ) ) ) # ( !\ALU|Mux26~1_combout & ( !\ALU|Mux27~1_combout & ( \RAM|mem[61][4]~q ) ) ) + + .dataa(!\RAM|mem[61][4]~q ), + .datab(!\RAM|mem[13][4]~q ), + .datac(!\RAM|mem[29][4]~q ), + .datad(!\RAM|mem[45][4]~q ), + .datae(!\ALU|Mux26~1_combout ), + .dataf(!\ALU|Mux27~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[4]~420_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[4]~420 .extended_lut = "off"; +defparam \rd[4]~420 .lut_mask = 64'h55550F0F00FF3333; +defparam \rd[4]~420 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X43_Y16_N33 +cyclonev_lcell_comb \RAM|mem[25][4]~feeder ( +// Equation(s): +// \RAM|mem[25][4]~feeder_combout = ( \RAM|mem~260_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~260_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[25][4]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[25][4]~feeder .extended_lut = "off"; +defparam \RAM|mem[25][4]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[25][4]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X43_Y16_N35 +dffeas \RAM|mem[25][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[25][4]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[25][2]~87_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[25][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[25][4] .is_wysiwyg = "true"; +defparam \RAM|mem[25][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X41_Y16_N40 +dffeas \RAM|mem[41][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[41][1]~106_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[41][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[41][4] .is_wysiwyg = "true"; +defparam \RAM|mem[41][4] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X43_Y16_N39 +cyclonev_lcell_comb \RAM|mem[9][4]~feeder ( +// Equation(s): +// \RAM|mem[9][4]~feeder_combout = ( \RAM|mem~260_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~260_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[9][4]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[9][4]~feeder .extended_lut = "off"; +defparam \RAM|mem[9][4]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[9][4]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X43_Y16_N41 +dffeas \RAM|mem[9][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[9][4]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[9][2]~71_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[9][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[9][4] .is_wysiwyg = "true"; +defparam \RAM|mem[9][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X43_Y16_N56 +dffeas \RAM|mem[57][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[57][2]~119_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[57][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[57][4] .is_wysiwyg = "true"; +defparam \RAM|mem[57][4] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X43_Y16_N54 +cyclonev_lcell_comb \rd[4]~419 ( +// Equation(s): +// \rd[4]~419_combout = ( \RAM|mem[57][4]~q & ( \ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout & (\RAM|mem[41][4]~q )) # (\ALU|Mux26~1_combout & ((\RAM|mem[9][4]~q ))) ) ) ) # ( !\RAM|mem[57][4]~q & ( \ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout +// & (\RAM|mem[41][4]~q )) # (\ALU|Mux26~1_combout & ((\RAM|mem[9][4]~q ))) ) ) ) # ( \RAM|mem[57][4]~q & ( !\ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout ) # (\RAM|mem[25][4]~q ) ) ) ) # ( !\RAM|mem[57][4]~q & ( !\ALU|Mux27~1_combout & ( +// (\RAM|mem[25][4]~q & \ALU|Mux26~1_combout ) ) ) ) + + .dataa(!\RAM|mem[25][4]~q ), + .datab(!\RAM|mem[41][4]~q ), + .datac(!\ALU|Mux26~1_combout ), + .datad(!\RAM|mem[9][4]~q ), + .datae(!\RAM|mem[57][4]~q ), + .dataf(!\ALU|Mux27~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[4]~419_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[4]~419 .extended_lut = "off"; +defparam \rd[4]~419 .lut_mask = 64'h0505F5F5303F303F; +defparam \rd[4]~419 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X43_Y12_N57 +cyclonev_lcell_comb \rd[4]~421 ( +// Equation(s): +// \rd[4]~421_combout = ( \rd[4]~420_combout & ( \rd[4]~419_combout & ( (!\ALU|Mux28~1_combout ) # ((!\ALU|Mux29~3_combout & ((\rd[4]~418_combout ))) # (\ALU|Mux29~3_combout & (\rd[4]~417_combout ))) ) ) ) # ( !\rd[4]~420_combout & ( \rd[4]~419_combout +// & ( (!\ALU|Mux29~3_combout & (\ALU|Mux28~1_combout & ((\rd[4]~418_combout )))) # (\ALU|Mux29~3_combout & ((!\ALU|Mux28~1_combout ) # ((\rd[4]~417_combout )))) ) ) ) # ( \rd[4]~420_combout & ( !\rd[4]~419_combout & ( (!\ALU|Mux29~3_combout & +// ((!\ALU|Mux28~1_combout ) # ((\rd[4]~418_combout )))) # (\ALU|Mux29~3_combout & (\ALU|Mux28~1_combout & (\rd[4]~417_combout ))) ) ) ) # ( !\rd[4]~420_combout & ( !\rd[4]~419_combout & ( (\ALU|Mux28~1_combout & ((!\ALU|Mux29~3_combout & +// ((\rd[4]~418_combout ))) # (\ALU|Mux29~3_combout & (\rd[4]~417_combout )))) ) ) ) + + .dataa(!\ALU|Mux29~3_combout ), + .datab(!\ALU|Mux28~1_combout ), + .datac(!\rd[4]~417_combout ), + .datad(!\rd[4]~418_combout ), + .datae(!\rd[4]~420_combout ), + .dataf(!\rd[4]~419_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[4]~421_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[4]~421 .extended_lut = "off"; +defparam \rd[4]~421 .lut_mask = 64'h012389AB4567CDEF; +defparam \rd[4]~421 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X47_Y14_N5 +dffeas \RAM|mem[26][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[26][4]~91_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[26][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[26][4] .is_wysiwyg = "true"; +defparam \RAM|mem[26][4] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X41_Y16_N3 +cyclonev_lcell_comb \RAM|mem[42][4]~feeder ( +// Equation(s): +// \RAM|mem[42][4]~feeder_combout = ( \RAM|mem~260_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~260_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[42][4]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[42][4]~feeder .extended_lut = "off"; +defparam \RAM|mem[42][4]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[42][4]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X41_Y16_N4 +dffeas \RAM|mem[42][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[42][4]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[42][4]~107_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[42][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[42][4] .is_wysiwyg = "true"; +defparam \RAM|mem[42][4] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X53_Y11_N3 +cyclonev_lcell_comb \RAM|mem[10][4]~feeder ( +// Equation(s): +// \RAM|mem[10][4]~feeder_combout = ( \RAM|mem~260_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~260_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[10][4]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[10][4]~feeder .extended_lut = "off"; +defparam \RAM|mem[10][4]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[10][4]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X53_Y11_N4 +dffeas \RAM|mem[10][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[10][4]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[10][4]~75_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[10][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[10][4] .is_wysiwyg = "true"; +defparam \RAM|mem[10][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X46_Y12_N50 +dffeas \RAM|mem[58][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[58][2]~123_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[58][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[58][4] .is_wysiwyg = "true"; +defparam \RAM|mem[58][4] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X46_Y12_N48 +cyclonev_lcell_comb \rd[4]~424 ( +// Equation(s): +// \rd[4]~424_combout = ( \RAM|mem[58][4]~q & ( \ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout & (\RAM|mem[42][4]~q )) # (\ALU|Mux26~1_combout & ((\RAM|mem[10][4]~q ))) ) ) ) # ( !\RAM|mem[58][4]~q & ( \ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout +// & (\RAM|mem[42][4]~q )) # (\ALU|Mux26~1_combout & ((\RAM|mem[10][4]~q ))) ) ) ) # ( \RAM|mem[58][4]~q & ( !\ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout ) # (\RAM|mem[26][4]~q ) ) ) ) # ( !\RAM|mem[58][4]~q & ( !\ALU|Mux27~1_combout & ( +// (\RAM|mem[26][4]~q & \ALU|Mux26~1_combout ) ) ) ) + + .dataa(!\RAM|mem[26][4]~q ), + .datab(!\RAM|mem[42][4]~q ), + .datac(!\RAM|mem[10][4]~q ), + .datad(!\ALU|Mux26~1_combout ), + .datae(!\RAM|mem[58][4]~q ), + .dataf(!\ALU|Mux27~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[4]~424_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[4]~424 .extended_lut = "off"; +defparam \rd[4]~424 .lut_mask = 64'h0055FF55330F330F; +defparam \rd[4]~424 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X53_Y11_N52 +dffeas \RAM|mem[14][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[14][1]~76_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[14][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[14][4] .is_wysiwyg = "true"; +defparam \RAM|mem[14][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X47_Y14_N46 +dffeas \RAM|mem[30][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[30][3]~92_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[30][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[30][4] .is_wysiwyg = "true"; +defparam \RAM|mem[30][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X47_Y11_N16 +dffeas \RAM|mem[46][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[46][2]~111_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[46][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[46][4] .is_wysiwyg = "true"; +defparam \RAM|mem[46][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X46_Y12_N44 +dffeas \RAM|mem[62][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[62][2]~124_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[62][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[62][4] .is_wysiwyg = "true"; +defparam \RAM|mem[62][4] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X46_Y12_N42 +cyclonev_lcell_comb \rd[4]~425 ( +// Equation(s): +// \rd[4]~425_combout = ( \RAM|mem[62][4]~q & ( \ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout & ((\RAM|mem[46][4]~q ))) # (\ALU|Mux26~1_combout & (\RAM|mem[14][4]~q )) ) ) ) # ( !\RAM|mem[62][4]~q & ( \ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout +// & ((\RAM|mem[46][4]~q ))) # (\ALU|Mux26~1_combout & (\RAM|mem[14][4]~q )) ) ) ) # ( \RAM|mem[62][4]~q & ( !\ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout ) # (\RAM|mem[30][4]~q ) ) ) ) # ( !\RAM|mem[62][4]~q & ( !\ALU|Mux27~1_combout & ( +// (\ALU|Mux26~1_combout & \RAM|mem[30][4]~q ) ) ) ) + + .dataa(!\RAM|mem[14][4]~q ), + .datab(!\ALU|Mux26~1_combout ), + .datac(!\RAM|mem[30][4]~q ), + .datad(!\RAM|mem[46][4]~q ), + .datae(!\RAM|mem[62][4]~q ), + .dataf(!\ALU|Mux27~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[4]~425_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[4]~425 .extended_lut = "off"; +defparam \rd[4]~425 .lut_mask = 64'h0303CFCF11DD11DD; +defparam \rd[4]~425 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X41_Y11_N37 +dffeas \RAM|mem[34][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[34][3]~99_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[34][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[34][4] .is_wysiwyg = "true"; +defparam \RAM|mem[34][4] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y16_N21 +cyclonev_lcell_comb \RAM|mem[18][4]~feeder ( +// Equation(s): +// \RAM|mem[18][4]~feeder_combout = ( \RAM|mem~260_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~260_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[18][4]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[18][4]~feeder .extended_lut = "off"; +defparam \RAM|mem[18][4]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[18][4]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X42_Y16_N22 +dffeas \RAM|mem[18][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[18][4]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[18][0]~89_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[18][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[18][4] .is_wysiwyg = "true"; +defparam \RAM|mem[18][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X40_Y15_N1 +dffeas \RAM|mem[2][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[2][0]~73_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[2][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[2][4] .is_wysiwyg = "true"; +defparam \RAM|mem[2][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X46_Y12_N56 +dffeas \RAM|mem[50][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[50][2]~121_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[50][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[50][4] .is_wysiwyg = "true"; +defparam \RAM|mem[50][4] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X46_Y12_N54 +cyclonev_lcell_comb \rd[4]~422 ( +// Equation(s): +// \rd[4]~422_combout = ( \RAM|mem[50][4]~q & ( \ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout & (\RAM|mem[34][4]~q )) # (\ALU|Mux26~1_combout & ((\RAM|mem[2][4]~q ))) ) ) ) # ( !\RAM|mem[50][4]~q & ( \ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout +// & (\RAM|mem[34][4]~q )) # (\ALU|Mux26~1_combout & ((\RAM|mem[2][4]~q ))) ) ) ) # ( \RAM|mem[50][4]~q & ( !\ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout ) # (\RAM|mem[18][4]~q ) ) ) ) # ( !\RAM|mem[50][4]~q & ( !\ALU|Mux27~1_combout & ( +// (\RAM|mem[18][4]~q & \ALU|Mux26~1_combout ) ) ) ) + + .dataa(!\RAM|mem[34][4]~q ), + .datab(!\RAM|mem[18][4]~q ), + .datac(!\RAM|mem[2][4]~q ), + .datad(!\ALU|Mux26~1_combout ), + .datae(!\RAM|mem[50][4]~q ), + .dataf(!\ALU|Mux27~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[4]~422_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[4]~422 .extended_lut = "off"; +defparam \rd[4]~422 .lut_mask = 64'h0033FF33550F550F; +defparam \rd[4]~422 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X50_Y12_N48 +cyclonev_lcell_comb \RAM|mem[6][4]~feeder ( +// Equation(s): +// \RAM|mem[6][4]~feeder_combout = ( \RAM|mem~260_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~260_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[6][4]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[6][4]~feeder .extended_lut = "off"; +defparam \RAM|mem[6][4]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[6][4]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X50_Y12_N50 +dffeas \RAM|mem[6][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[6][4]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[6][2]~74_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[6][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[6][4] .is_wysiwyg = "true"; +defparam \RAM|mem[6][4] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X50_Y12_N30 +cyclonev_lcell_comb \RAM|mem[22][4]~feeder ( +// Equation(s): +// \RAM|mem[22][4]~feeder_combout = ( \RAM|mem~260_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~260_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[22][4]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[22][4]~feeder .extended_lut = "off"; +defparam \RAM|mem[22][4]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[22][4]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X50_Y12_N32 +dffeas \RAM|mem[22][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[22][4]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[22][2]~90_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[22][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[22][4] .is_wysiwyg = "true"; +defparam \RAM|mem[22][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X50_Y14_N20 +dffeas \RAM|mem[38][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[38][0]~103_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[38][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[38][4] .is_wysiwyg = "true"; +defparam \RAM|mem[38][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X50_Y12_N44 +dffeas \RAM|mem[54][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[54][1]~122_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[54][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[54][4] .is_wysiwyg = "true"; +defparam \RAM|mem[54][4] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X50_Y12_N42 +cyclonev_lcell_comb \rd[4]~423 ( +// Equation(s): +// \rd[4]~423_combout = ( \RAM|mem[54][4]~q & ( \ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout & ((\RAM|mem[38][4]~q ))) # (\ALU|Mux26~1_combout & (\RAM|mem[6][4]~q )) ) ) ) # ( !\RAM|mem[54][4]~q & ( \ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout +// & ((\RAM|mem[38][4]~q ))) # (\ALU|Mux26~1_combout & (\RAM|mem[6][4]~q )) ) ) ) # ( \RAM|mem[54][4]~q & ( !\ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout ) # (\RAM|mem[22][4]~q ) ) ) ) # ( !\RAM|mem[54][4]~q & ( !\ALU|Mux27~1_combout & ( +// (\RAM|mem[22][4]~q & \ALU|Mux26~1_combout ) ) ) ) + + .dataa(!\RAM|mem[6][4]~q ), + .datab(!\RAM|mem[22][4]~q ), + .datac(!\RAM|mem[38][4]~q ), + .datad(!\ALU|Mux26~1_combout ), + .datae(!\RAM|mem[54][4]~q ), + .dataf(!\ALU|Mux27~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[4]~423_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[4]~423 .extended_lut = "off"; +defparam \rd[4]~423 .lut_mask = 64'h0033FF330F550F55; +defparam \rd[4]~423 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X46_Y12_N0 +cyclonev_lcell_comb \rd[4]~426 ( +// Equation(s): +// \rd[4]~426_combout = ( \rd[4]~422_combout & ( \rd[4]~423_combout & ( ((!\ALU|Mux29~3_combout & ((\rd[4]~425_combout ))) # (\ALU|Mux29~3_combout & (\rd[4]~424_combout ))) # (\ALU|Mux28~1_combout ) ) ) ) # ( !\rd[4]~422_combout & ( \rd[4]~423_combout +// & ( (!\ALU|Mux29~3_combout & (((\ALU|Mux28~1_combout ) # (\rd[4]~425_combout )))) # (\ALU|Mux29~3_combout & (\rd[4]~424_combout & ((!\ALU|Mux28~1_combout )))) ) ) ) # ( \rd[4]~422_combout & ( !\rd[4]~423_combout & ( (!\ALU|Mux29~3_combout & +// (((\rd[4]~425_combout & !\ALU|Mux28~1_combout )))) # (\ALU|Mux29~3_combout & (((\ALU|Mux28~1_combout )) # (\rd[4]~424_combout ))) ) ) ) # ( !\rd[4]~422_combout & ( !\rd[4]~423_combout & ( (!\ALU|Mux28~1_combout & ((!\ALU|Mux29~3_combout & +// ((\rd[4]~425_combout ))) # (\ALU|Mux29~3_combout & (\rd[4]~424_combout )))) ) ) ) + + .dataa(!\rd[4]~424_combout ), + .datab(!\rd[4]~425_combout ), + .datac(!\ALU|Mux29~3_combout ), + .datad(!\ALU|Mux28~1_combout ), + .datae(!\rd[4]~422_combout ), + .dataf(!\rd[4]~423_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[4]~426_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[4]~426 .extended_lut = "off"; +defparam \rd[4]~426 .lut_mask = 64'h3500350F35F035FF; +defparam \rd[4]~426 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X42_Y11_N34 +dffeas \RAM|mem[0][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[0][3]~65_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[0][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[0][4] .is_wysiwyg = "true"; +defparam \RAM|mem[0][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X50_Y14_N58 +dffeas \RAM|mem[48][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[48][2]~113_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[48][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[48][4] .is_wysiwyg = "true"; +defparam \RAM|mem[48][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X42_Y11_N20 +dffeas \RAM|mem[32][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[32][1]~97_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[32][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[32][4] .is_wysiwyg = "true"; +defparam \RAM|mem[32][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X42_Y11_N53 +dffeas \RAM|mem[16][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[16][4]~81_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[16][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[16][4] .is_wysiwyg = "true"; +defparam \RAM|mem[16][4] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y11_N51 +cyclonev_lcell_comb \rd[4]~412 ( +// Equation(s): +// \rd[4]~412_combout = ( \RAM|mem[16][4]~q & ( \ALU|Mux26~1_combout & ( (!\ALU|Mux27~1_combout ) # (\RAM|mem[0][4]~q ) ) ) ) # ( !\RAM|mem[16][4]~q & ( \ALU|Mux26~1_combout & ( (\RAM|mem[0][4]~q & \ALU|Mux27~1_combout ) ) ) ) # ( \RAM|mem[16][4]~q & +// ( !\ALU|Mux26~1_combout & ( (!\ALU|Mux27~1_combout & (\RAM|mem[48][4]~q )) # (\ALU|Mux27~1_combout & ((\RAM|mem[32][4]~q ))) ) ) ) # ( !\RAM|mem[16][4]~q & ( !\ALU|Mux26~1_combout & ( (!\ALU|Mux27~1_combout & (\RAM|mem[48][4]~q )) # +// (\ALU|Mux27~1_combout & ((\RAM|mem[32][4]~q ))) ) ) ) + + .dataa(!\RAM|mem[0][4]~q ), + .datab(!\ALU|Mux27~1_combout ), + .datac(!\RAM|mem[48][4]~q ), + .datad(!\RAM|mem[32][4]~q ), + .datae(!\RAM|mem[16][4]~q ), + .dataf(!\ALU|Mux26~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[4]~412_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[4]~412 .extended_lut = "off"; +defparam \rd[4]~412 .lut_mask = 64'h0C3F0C3F1111DDDD; +defparam \rd[4]~412 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X47_Y12_N29 +dffeas \RAM|mem[4][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[4][0]~66_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[4][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[4][4] .is_wysiwyg = "true"; +defparam \RAM|mem[4][4] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X49_Y12_N36 +cyclonev_lcell_comb \RAM|mem[36][4]~feeder ( +// Equation(s): +// \RAM|mem[36][4]~feeder_combout = ( \RAM|mem~260_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~260_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[36][4]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[36][4]~feeder .extended_lut = "off"; +defparam \RAM|mem[36][4]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[36][4]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X49_Y12_N37 +dffeas \RAM|mem[36][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[36][4]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[36][2]~101_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[36][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[36][4] .is_wysiwyg = "true"; +defparam \RAM|mem[36][4] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X47_Y12_N51 +cyclonev_lcell_comb \RAM|mem[52][4]~feeder ( +// Equation(s): +// \RAM|mem[52][4]~feeder_combout = ( \RAM|mem~260_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~260_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[52][4]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[52][4]~feeder .extended_lut = "off"; +defparam \RAM|mem[52][4]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[52][4]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X47_Y12_N53 +dffeas \RAM|mem[52][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[52][4]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[52][0]~114_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[52][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[52][4] .is_wysiwyg = "true"; +defparam \RAM|mem[52][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X47_Y12_N14 +dffeas \RAM|mem[20][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[20][4]~82_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[20][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[20][4] .is_wysiwyg = "true"; +defparam \RAM|mem[20][4] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X47_Y12_N12 +cyclonev_lcell_comb \rd[4]~413 ( +// Equation(s): +// \rd[4]~413_combout = ( \RAM|mem[20][4]~q & ( \ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout & ((\RAM|mem[36][4]~q ))) # (\ALU|Mux26~1_combout & (\RAM|mem[4][4]~q )) ) ) ) # ( !\RAM|mem[20][4]~q & ( \ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout +// & ((\RAM|mem[36][4]~q ))) # (\ALU|Mux26~1_combout & (\RAM|mem[4][4]~q )) ) ) ) # ( \RAM|mem[20][4]~q & ( !\ALU|Mux27~1_combout & ( (\ALU|Mux26~1_combout ) # (\RAM|mem[52][4]~q ) ) ) ) # ( !\RAM|mem[20][4]~q & ( !\ALU|Mux27~1_combout & ( +// (\RAM|mem[52][4]~q & !\ALU|Mux26~1_combout ) ) ) ) + + .dataa(!\RAM|mem[4][4]~q ), + .datab(!\RAM|mem[36][4]~q ), + .datac(!\RAM|mem[52][4]~q ), + .datad(!\ALU|Mux26~1_combout ), + .datae(!\RAM|mem[20][4]~q ), + .dataf(!\ALU|Mux27~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[4]~413_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[4]~413 .extended_lut = "off"; +defparam \rd[4]~413 .lut_mask = 64'h0F000FFF33553355; +defparam \rd[4]~413 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X56_Y8_N13 +dffeas \RAM|mem[24][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[24][3]~83_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[24][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[24][4] .is_wysiwyg = "true"; +defparam \RAM|mem[24][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X46_Y14_N37 +dffeas \RAM|mem[8][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[8][2]~67_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[8][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[8][4] .is_wysiwyg = "true"; +defparam \RAM|mem[8][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X45_Y12_N2 +dffeas \RAM|mem[40][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[40][4]~105_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[40][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[40][4] .is_wysiwyg = "true"; +defparam \RAM|mem[40][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X45_Y12_N14 +dffeas \RAM|mem[56][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[56][4]~115_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[56][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[56][4] .is_wysiwyg = "true"; +defparam \RAM|mem[56][4] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X45_Y12_N12 +cyclonev_lcell_comb \rd[4]~414 ( +// Equation(s): +// \rd[4]~414_combout = ( \RAM|mem[56][4]~q & ( \ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout & ((\RAM|mem[40][4]~q ))) # (\ALU|Mux26~1_combout & (\RAM|mem[8][4]~q )) ) ) ) # ( !\RAM|mem[56][4]~q & ( \ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout +// & ((\RAM|mem[40][4]~q ))) # (\ALU|Mux26~1_combout & (\RAM|mem[8][4]~q )) ) ) ) # ( \RAM|mem[56][4]~q & ( !\ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout ) # (\RAM|mem[24][4]~q ) ) ) ) # ( !\RAM|mem[56][4]~q & ( !\ALU|Mux27~1_combout & ( +// (\RAM|mem[24][4]~q & \ALU|Mux26~1_combout ) ) ) ) + + .dataa(!\RAM|mem[24][4]~q ), + .datab(!\RAM|mem[8][4]~q ), + .datac(!\ALU|Mux26~1_combout ), + .datad(!\RAM|mem[40][4]~q ), + .datae(!\RAM|mem[56][4]~q ), + .dataf(!\ALU|Mux27~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[4]~414_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[4]~414 .extended_lut = "off"; +defparam \rd[4]~414 .lut_mask = 64'h0505F5F503F303F3; +defparam \rd[4]~414 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X47_Y11_N34 +dffeas \RAM|mem[44][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[44][1]~109_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[44][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[44][4] .is_wysiwyg = "true"; +defparam \RAM|mem[44][4] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X53_Y6_N57 +cyclonev_lcell_comb \RAM|mem[12][4]~feeder ( +// Equation(s): +// \RAM|mem[12][4]~feeder_combout = ( \RAM|mem~260_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~260_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[12][4]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[12][4]~feeder .extended_lut = "off"; +defparam \RAM|mem[12][4]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[12][4]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X53_Y6_N58 +dffeas \RAM|mem[12][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[12][4]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[12][3]~68_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[12][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[12][4] .is_wysiwyg = "true"; +defparam \RAM|mem[12][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X46_Y15_N38 +dffeas \RAM|mem[28][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[28][0]~84_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[28][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[28][4] .is_wysiwyg = "true"; +defparam \RAM|mem[28][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X46_Y15_N56 +dffeas \RAM|mem[60][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[60][4]~116_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[60][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[60][4] .is_wysiwyg = "true"; +defparam \RAM|mem[60][4] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X46_Y15_N54 +cyclonev_lcell_comb \rd[4]~415 ( +// Equation(s): +// \rd[4]~415_combout = ( \RAM|mem[60][4]~q & ( \ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout & (\RAM|mem[44][4]~q )) # (\ALU|Mux26~1_combout & ((\RAM|mem[12][4]~q ))) ) ) ) # ( !\RAM|mem[60][4]~q & ( \ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout +// & (\RAM|mem[44][4]~q )) # (\ALU|Mux26~1_combout & ((\RAM|mem[12][4]~q ))) ) ) ) # ( \RAM|mem[60][4]~q & ( !\ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout ) # (\RAM|mem[28][4]~q ) ) ) ) # ( !\RAM|mem[60][4]~q & ( !\ALU|Mux27~1_combout & ( +// (\RAM|mem[28][4]~q & \ALU|Mux26~1_combout ) ) ) ) + + .dataa(!\RAM|mem[44][4]~q ), + .datab(!\RAM|mem[12][4]~q ), + .datac(!\RAM|mem[28][4]~q ), + .datad(!\ALU|Mux26~1_combout ), + .datae(!\RAM|mem[60][4]~q ), + .dataf(!\ALU|Mux27~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[4]~415_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[4]~415 .extended_lut = "off"; +defparam \rd[4]~415 .lut_mask = 64'h000FFF0F55335533; +defparam \rd[4]~415 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X43_Y12_N3 +cyclonev_lcell_comb \rd[4]~416 ( +// Equation(s): +// \rd[4]~416_combout = ( \rd[4]~414_combout & ( \rd[4]~415_combout & ( (!\ALU|Mux28~1_combout ) # ((!\ALU|Mux29~3_combout & ((\rd[4]~413_combout ))) # (\ALU|Mux29~3_combout & (\rd[4]~412_combout ))) ) ) ) # ( !\rd[4]~414_combout & ( \rd[4]~415_combout +// & ( (!\ALU|Mux29~3_combout & ((!\ALU|Mux28~1_combout ) # ((\rd[4]~413_combout )))) # (\ALU|Mux29~3_combout & (\ALU|Mux28~1_combout & (\rd[4]~412_combout ))) ) ) ) # ( \rd[4]~414_combout & ( !\rd[4]~415_combout & ( (!\ALU|Mux29~3_combout & +// (\ALU|Mux28~1_combout & ((\rd[4]~413_combout )))) # (\ALU|Mux29~3_combout & ((!\ALU|Mux28~1_combout ) # ((\rd[4]~412_combout )))) ) ) ) # ( !\rd[4]~414_combout & ( !\rd[4]~415_combout & ( (\ALU|Mux28~1_combout & ((!\ALU|Mux29~3_combout & +// ((\rd[4]~413_combout ))) # (\ALU|Mux29~3_combout & (\rd[4]~412_combout )))) ) ) ) + + .dataa(!\ALU|Mux29~3_combout ), + .datab(!\ALU|Mux28~1_combout ), + .datac(!\rd[4]~412_combout ), + .datad(!\rd[4]~413_combout ), + .datae(!\rd[4]~414_combout ), + .dataf(!\rd[4]~415_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[4]~416_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[4]~416 .extended_lut = "off"; +defparam \rd[4]~416 .lut_mask = 64'h0123456789ABCDEF; +defparam \rd[4]~416 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X40_Y15_N46 +dffeas \RAM|mem[3][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[3][2]~77_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[3][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[3][4] .is_wysiwyg = "true"; +defparam \RAM|mem[3][4] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y15_N6 +cyclonev_lcell_comb \RAM|mem[7][4]~feeder ( +// Equation(s): +// \RAM|mem[7][4]~feeder_combout = ( \RAM|mem~260_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~260_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[7][4]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[7][4]~feeder .extended_lut = "off"; +defparam \RAM|mem[7][4]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[7][4]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X42_Y15_N7 +dffeas \RAM|mem[7][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[7][4]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[7][0]~78_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[7][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[7][4] .is_wysiwyg = "true"; +defparam \RAM|mem[7][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X41_Y15_N34 +dffeas \RAM|mem[11][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[11][3]~79_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[11][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[11][4] .is_wysiwyg = "true"; +defparam \RAM|mem[11][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X43_Y14_N2 +dffeas \RAM|mem[15][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[15][4]~80_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[15][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[15][4] .is_wysiwyg = "true"; +defparam \RAM|mem[15][4] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X43_Y14_N0 +cyclonev_lcell_comb \rd[4]~427 ( +// Equation(s): +// \rd[4]~427_combout = ( \RAM|mem[15][4]~q & ( \ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout & ((\RAM|mem[7][4]~q ))) # (\ALU|Mux29~3_combout & (\RAM|mem[3][4]~q )) ) ) ) # ( !\RAM|mem[15][4]~q & ( \ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout & +// ((\RAM|mem[7][4]~q ))) # (\ALU|Mux29~3_combout & (\RAM|mem[3][4]~q )) ) ) ) # ( \RAM|mem[15][4]~q & ( !\ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout ) # (\RAM|mem[11][4]~q ) ) ) ) # ( !\RAM|mem[15][4]~q & ( !\ALU|Mux28~1_combout & ( +// (\ALU|Mux29~3_combout & \RAM|mem[11][4]~q ) ) ) ) + + .dataa(!\RAM|mem[3][4]~q ), + .datab(!\RAM|mem[7][4]~q ), + .datac(!\ALU|Mux29~3_combout ), + .datad(!\RAM|mem[11][4]~q ), + .datae(!\RAM|mem[15][4]~q ), + .dataf(!\ALU|Mux28~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[4]~427_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[4]~427 .extended_lut = "off"; +defparam \rd[4]~427 .lut_mask = 64'h000FF0FF35353535; +defparam \rd[4]~427 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X43_Y14_N27 +cyclonev_lcell_comb \RAM|mem[23][4]~feeder ( +// Equation(s): +// \RAM|mem[23][4]~feeder_combout = ( \RAM|mem~260_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~260_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[23][4]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[23][4]~feeder .extended_lut = "off"; +defparam \RAM|mem[23][4]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[23][4]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X43_Y14_N29 +dffeas \RAM|mem[23][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[23][4]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[23][0]~94_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[23][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[23][4] .is_wysiwyg = "true"; +defparam \RAM|mem[23][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X41_Y13_N16 +dffeas \RAM|mem[27][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[27][1]~95_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[27][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[27][4] .is_wysiwyg = "true"; +defparam \RAM|mem[27][4] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y16_N36 +cyclonev_lcell_comb \RAM|mem[19][4]~feeder ( +// Equation(s): +// \RAM|mem[19][4]~feeder_combout = ( \RAM|mem~260_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~260_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[19][4]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[19][4]~feeder .extended_lut = "off"; +defparam \RAM|mem[19][4]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[19][4]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X42_Y16_N37 +dffeas \RAM|mem[19][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[19][4]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[19][3]~93_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[19][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[19][4] .is_wysiwyg = "true"; +defparam \RAM|mem[19][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X43_Y14_N8 +dffeas \RAM|mem[31][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[31][2]~96_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[31][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[31][4] .is_wysiwyg = "true"; +defparam \RAM|mem[31][4] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X43_Y14_N6 +cyclonev_lcell_comb \rd[4]~428 ( +// Equation(s): +// \rd[4]~428_combout = ( \RAM|mem[31][4]~q & ( \ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout & (\RAM|mem[23][4]~q )) # (\ALU|Mux29~3_combout & ((\RAM|mem[19][4]~q ))) ) ) ) # ( !\RAM|mem[31][4]~q & ( \ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout +// & (\RAM|mem[23][4]~q )) # (\ALU|Mux29~3_combout & ((\RAM|mem[19][4]~q ))) ) ) ) # ( \RAM|mem[31][4]~q & ( !\ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout ) # (\RAM|mem[27][4]~q ) ) ) ) # ( !\RAM|mem[31][4]~q & ( !\ALU|Mux28~1_combout & ( +// (\RAM|mem[27][4]~q & \ALU|Mux29~3_combout ) ) ) ) + + .dataa(!\RAM|mem[23][4]~q ), + .datab(!\RAM|mem[27][4]~q ), + .datac(!\RAM|mem[19][4]~q ), + .datad(!\ALU|Mux29~3_combout ), + .datae(!\RAM|mem[31][4]~q ), + .dataf(!\ALU|Mux28~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[4]~428_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[4]~428 .extended_lut = "off"; +defparam \rd[4]~428 .lut_mask = 64'h0033FF33550F550F; +defparam \rd[4]~428 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X46_Y9_N23 +dffeas \RAM|mem[51][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[51][0]~125_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[51][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[51][4] .is_wysiwyg = "true"; +defparam \RAM|mem[51][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X46_Y9_N55 +dffeas \RAM|mem[59][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem~260_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[59][2]~127_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[59][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[59][4] .is_wysiwyg = "true"; +defparam \RAM|mem[59][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X46_Y13_N59 +dffeas \RAM|mem[55][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[55][2]~126_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[55][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[55][4] .is_wysiwyg = "true"; +defparam \RAM|mem[55][4] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X46_Y13_N48 +cyclonev_lcell_comb \RAM|mem[63][4]~feeder ( +// Equation(s): +// \RAM|mem[63][4]~feeder_combout = ( \RAM|mem~260_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~260_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[63][4]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[63][4]~feeder .extended_lut = "off"; +defparam \RAM|mem[63][4]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[63][4]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X46_Y13_N49 +dffeas \RAM|mem[63][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[63][4]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[63][2]~128_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[63][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[63][4] .is_wysiwyg = "true"; +defparam \RAM|mem[63][4] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X46_Y10_N12 +cyclonev_lcell_comb \rd[4]~430 ( +// Equation(s): +// \rd[4]~430_combout = ( \ALU|Mux29~3_combout & ( \ALU|Mux28~1_combout & ( \RAM|mem[51][4]~q ) ) ) # ( !\ALU|Mux29~3_combout & ( \ALU|Mux28~1_combout & ( \RAM|mem[55][4]~q ) ) ) # ( \ALU|Mux29~3_combout & ( !\ALU|Mux28~1_combout & ( +// \RAM|mem[59][4]~q ) ) ) # ( !\ALU|Mux29~3_combout & ( !\ALU|Mux28~1_combout & ( \RAM|mem[63][4]~q ) ) ) + + .dataa(!\RAM|mem[51][4]~q ), + .datab(!\RAM|mem[59][4]~q ), + .datac(!\RAM|mem[55][4]~q ), + .datad(!\RAM|mem[63][4]~q ), + .datae(!\ALU|Mux29~3_combout ), + .dataf(!\ALU|Mux28~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[4]~430_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[4]~430 .extended_lut = "off"; +defparam \rd[4]~430 .lut_mask = 64'h00FF33330F0F5555; +defparam \rd[4]~430 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X41_Y16_N22 +dffeas \RAM|mem[43][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[43][0]~108_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[43][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[43][4] .is_wysiwyg = "true"; +defparam \RAM|mem[43][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X41_Y11_N52 +dffeas \RAM|mem[35][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[35][2]~100_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[35][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[35][4] .is_wysiwyg = "true"; +defparam \RAM|mem[35][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X43_Y10_N37 +dffeas \RAM|mem[39][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[39][4]~104_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[39][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[39][4] .is_wysiwyg = "true"; +defparam \RAM|mem[39][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X47_Y14_N50 +dffeas \RAM|mem[47][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[47][0]~112_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[47][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[47][4] .is_wysiwyg = "true"; +defparam \RAM|mem[47][4] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X47_Y14_N48 +cyclonev_lcell_comb \rd[4]~429 ( +// Equation(s): +// \rd[4]~429_combout = ( \RAM|mem[47][4]~q & ( \ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout & ((\RAM|mem[39][4]~q ))) # (\ALU|Mux29~3_combout & (\RAM|mem[35][4]~q )) ) ) ) # ( !\RAM|mem[47][4]~q & ( \ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout +// & ((\RAM|mem[39][4]~q ))) # (\ALU|Mux29~3_combout & (\RAM|mem[35][4]~q )) ) ) ) # ( \RAM|mem[47][4]~q & ( !\ALU|Mux28~1_combout & ( (!\ALU|Mux29~3_combout ) # (\RAM|mem[43][4]~q ) ) ) ) # ( !\RAM|mem[47][4]~q & ( !\ALU|Mux28~1_combout & ( +// (\RAM|mem[43][4]~q & \ALU|Mux29~3_combout ) ) ) ) + + .dataa(!\RAM|mem[43][4]~q ), + .datab(!\RAM|mem[35][4]~q ), + .datac(!\ALU|Mux29~3_combout ), + .datad(!\RAM|mem[39][4]~q ), + .datae(!\RAM|mem[47][4]~q ), + .dataf(!\ALU|Mux28~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[4]~429_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[4]~429 .extended_lut = "off"; +defparam \rd[4]~429 .lut_mask = 64'h0505F5F503F303F3; +defparam \rd[4]~429 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X43_Y14_N12 +cyclonev_lcell_comb \rd[4]~431 ( +// Equation(s): +// \rd[4]~431_combout = ( \rd[4]~430_combout & ( \rd[4]~429_combout & ( (!\ALU|Mux26~1_combout ) # ((!\ALU|Mux27~1_combout & ((\rd[4]~428_combout ))) # (\ALU|Mux27~1_combout & (\rd[4]~427_combout ))) ) ) ) # ( !\rd[4]~430_combout & ( \rd[4]~429_combout +// & ( (!\ALU|Mux27~1_combout & (((\rd[4]~428_combout & \ALU|Mux26~1_combout )))) # (\ALU|Mux27~1_combout & (((!\ALU|Mux26~1_combout )) # (\rd[4]~427_combout ))) ) ) ) # ( \rd[4]~430_combout & ( !\rd[4]~429_combout & ( (!\ALU|Mux27~1_combout & +// (((!\ALU|Mux26~1_combout ) # (\rd[4]~428_combout )))) # (\ALU|Mux27~1_combout & (\rd[4]~427_combout & ((\ALU|Mux26~1_combout )))) ) ) ) # ( !\rd[4]~430_combout & ( !\rd[4]~429_combout & ( (\ALU|Mux26~1_combout & ((!\ALU|Mux27~1_combout & +// ((\rd[4]~428_combout ))) # (\ALU|Mux27~1_combout & (\rd[4]~427_combout )))) ) ) ) + + .dataa(!\rd[4]~427_combout ), + .datab(!\rd[4]~428_combout ), + .datac(!\ALU|Mux27~1_combout ), + .datad(!\ALU|Mux26~1_combout ), + .datae(!\rd[4]~430_combout ), + .dataf(!\rd[4]~429_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[4]~431_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[4]~431 .extended_lut = "off"; +defparam \rd[4]~431 .lut_mask = 64'h0035F0350F35FF35; +defparam \rd[4]~431 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y8_N48 +cyclonev_lcell_comb \rd[4]~432 ( +// Equation(s): +// \rd[4]~432_combout = ( \rd[4]~416_combout & ( \rd[4]~431_combout & ( (!\ALU|Mux30~1_combout & ((!\ALU|Mux31~3_combout ) # ((\rd[4]~426_combout )))) # (\ALU|Mux30~1_combout & (((\rd[4]~421_combout )) # (\ALU|Mux31~3_combout ))) ) ) ) # ( +// !\rd[4]~416_combout & ( \rd[4]~431_combout & ( (!\ALU|Mux30~1_combout & ((!\ALU|Mux31~3_combout ) # ((\rd[4]~426_combout )))) # (\ALU|Mux30~1_combout & (!\ALU|Mux31~3_combout & (\rd[4]~421_combout ))) ) ) ) # ( \rd[4]~416_combout & ( +// !\rd[4]~431_combout & ( (!\ALU|Mux30~1_combout & (\ALU|Mux31~3_combout & ((\rd[4]~426_combout )))) # (\ALU|Mux30~1_combout & (((\rd[4]~421_combout )) # (\ALU|Mux31~3_combout ))) ) ) ) # ( !\rd[4]~416_combout & ( !\rd[4]~431_combout & ( +// (!\ALU|Mux30~1_combout & (\ALU|Mux31~3_combout & ((\rd[4]~426_combout )))) # (\ALU|Mux30~1_combout & (!\ALU|Mux31~3_combout & (\rd[4]~421_combout ))) ) ) ) + + .dataa(!\ALU|Mux30~1_combout ), + .datab(!\ALU|Mux31~3_combout ), + .datac(!\rd[4]~421_combout ), + .datad(!\rd[4]~426_combout ), + .datae(!\rd[4]~416_combout ), + .dataf(!\rd[4]~431_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[4]~432_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[4]~432 .extended_lut = "off"; +defparam \rd[4]~432 .lut_mask = 64'h042615378CAE9DBF; +defparam \rd[4]~432 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y8_N0 +cyclonev_lcell_comb \rd[4]~433 ( +// Equation(s): +// \rd[4]~433_combout = ( \rd[4]~411_combout & ( \rd[4]~432_combout & ( (!\CONTROL_UNIT|M2R[0]~0_combout & (!\ALU|Mux27~1_combout )) # (\CONTROL_UNIT|M2R[0]~0_combout & ((\ALU|Mux25~1_combout ))) ) ) ) # ( !\rd[4]~411_combout & ( \rd[4]~432_combout & +// ( (!\CONTROL_UNIT|M2R[0]~0_combout & (((!\ALU|Mux27~1_combout )))) # (\CONTROL_UNIT|M2R[0]~0_combout & (\ALU|Mux24~1_combout & ((\ALU|Mux25~1_combout )))) ) ) ) # ( \rd[4]~411_combout & ( !\rd[4]~432_combout & ( (!\CONTROL_UNIT|M2R[0]~0_combout & +// (((!\ALU|Mux27~1_combout )))) # (\CONTROL_UNIT|M2R[0]~0_combout & (!\ALU|Mux24~1_combout & ((\ALU|Mux25~1_combout )))) ) ) ) # ( !\rd[4]~411_combout & ( !\rd[4]~432_combout & ( (!\ALU|Mux27~1_combout & !\CONTROL_UNIT|M2R[0]~0_combout ) ) ) ) + + .dataa(!\ALU|Mux24~1_combout ), + .datab(!\ALU|Mux27~1_combout ), + .datac(!\CONTROL_UNIT|M2R[0]~0_combout ), + .datad(!\ALU|Mux25~1_combout ), + .datae(!\rd[4]~411_combout ), + .dataf(!\rd[4]~432_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[4]~433_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[4]~433 .extended_lut = "off"; +defparam \rd[4]~433 .lut_mask = 64'hC0C0C0CAC0C5C0CF; +defparam \rd[4]~433 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X49_Y13_N1 +dffeas \RAM|mem[207][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[207][0]~244_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[207][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[207][4] .is_wysiwyg = "true"; +defparam \RAM|mem[207][4] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X54_Y10_N21 +cyclonev_lcell_comb \RAM|mem[223][4]~feeder ( +// Equation(s): +// \RAM|mem[223][4]~feeder_combout = ( \RAM|mem~260_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~260_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[223][4]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[223][4]~feeder .extended_lut = "off"; +defparam \RAM|mem[223][4]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[223][4]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X54_Y10_N22 +dffeas \RAM|mem[223][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[223][4]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[223][2]~248_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[223][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[223][4] .is_wysiwyg = "true"; +defparam \RAM|mem[223][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X43_Y9_N4 +dffeas \RAM|mem[239][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[239][1]~252_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[239][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[239][4] .is_wysiwyg = "true"; +defparam \RAM|mem[239][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X49_Y12_N32 +dffeas \RAM|mem[255][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[255][3]~256_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[255][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[255][4] .is_wysiwyg = "true"; +defparam \RAM|mem[255][4] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X49_Y12_N30 +cyclonev_lcell_comb \rd[4]~367 ( +// Equation(s): +// \rd[4]~367_combout = ( \RAM|mem[255][4]~q & ( \ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout & ((\RAM|mem[239][4]~q ))) # (\ALU|Mux26~1_combout & (\RAM|mem[207][4]~q )) ) ) ) # ( !\RAM|mem[255][4]~q & ( \ALU|Mux27~1_combout & ( +// (!\ALU|Mux26~1_combout & ((\RAM|mem[239][4]~q ))) # (\ALU|Mux26~1_combout & (\RAM|mem[207][4]~q )) ) ) ) # ( \RAM|mem[255][4]~q & ( !\ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout ) # (\RAM|mem[223][4]~q ) ) ) ) # ( !\RAM|mem[255][4]~q & ( +// !\ALU|Mux27~1_combout & ( (\RAM|mem[223][4]~q & \ALU|Mux26~1_combout ) ) ) ) + + .dataa(!\RAM|mem[207][4]~q ), + .datab(!\RAM|mem[223][4]~q ), + .datac(!\ALU|Mux26~1_combout ), + .datad(!\RAM|mem[239][4]~q ), + .datae(!\RAM|mem[255][4]~q ), + .dataf(!\ALU|Mux27~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[4]~367_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[4]~367 .extended_lut = "off"; +defparam \rd[4]~367 .lut_mask = 64'h0303F3F305F505F5; +defparam \rd[4]~367 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X53_Y8_N6 +cyclonev_lcell_comb \RAM|mem[204][4]~feeder ( +// Equation(s): +// \RAM|mem[204][4]~feeder_combout = ( \RAM|mem~260_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~260_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[204][4]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[204][4]~feeder .extended_lut = "off"; +defparam \RAM|mem[204][4]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[204][4]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X53_Y8_N8 +dffeas \RAM|mem[204][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[204][4]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[204][1]~205_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[204][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[204][4] .is_wysiwyg = "true"; +defparam \RAM|mem[204][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X53_Y8_N55 +dffeas \RAM|mem[220][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[220][4]~206_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[220][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[220][4] .is_wysiwyg = "true"; +defparam \RAM|mem[220][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X49_Y6_N58 +dffeas \RAM|mem[236][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[236][3]~207_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[236][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[236][4] .is_wysiwyg = "true"; +defparam \RAM|mem[236][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X48_Y12_N44 +dffeas \RAM|mem[252][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[252][3]~208_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[252][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[252][4] .is_wysiwyg = "true"; +defparam \RAM|mem[252][4] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X48_Y12_N42 +cyclonev_lcell_comb \rd[4]~364 ( +// Equation(s): +// \rd[4]~364_combout = ( \RAM|mem[252][4]~q & ( \ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout & ((\RAM|mem[236][4]~q ))) # (\ALU|Mux26~1_combout & (\RAM|mem[204][4]~q )) ) ) ) # ( !\RAM|mem[252][4]~q & ( \ALU|Mux27~1_combout & ( +// (!\ALU|Mux26~1_combout & ((\RAM|mem[236][4]~q ))) # (\ALU|Mux26~1_combout & (\RAM|mem[204][4]~q )) ) ) ) # ( \RAM|mem[252][4]~q & ( !\ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout ) # (\RAM|mem[220][4]~q ) ) ) ) # ( !\RAM|mem[252][4]~q & ( +// !\ALU|Mux27~1_combout & ( (\ALU|Mux26~1_combout & \RAM|mem[220][4]~q ) ) ) ) + + .dataa(!\ALU|Mux26~1_combout ), + .datab(!\RAM|mem[204][4]~q ), + .datac(!\RAM|mem[220][4]~q ), + .datad(!\RAM|mem[236][4]~q ), + .datae(!\RAM|mem[252][4]~q ), + .dataf(!\ALU|Mux27~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[4]~364_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[4]~364 .extended_lut = "off"; +defparam \rd[4]~364 .lut_mask = 64'h0505AFAF11BB11BB; +defparam \rd[4]~364 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X53_Y12_N44 +dffeas \RAM|mem[205][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[205][3]~221_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[205][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[205][4] .is_wysiwyg = "true"; +defparam \RAM|mem[205][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X53_Y12_N19 +dffeas \RAM|mem[237][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[237][2]~223_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[237][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[237][4] .is_wysiwyg = "true"; +defparam \RAM|mem[237][4] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X54_Y11_N15 +cyclonev_lcell_comb \RAM|mem[221][4]~feeder ( +// Equation(s): +// \RAM|mem[221][4]~feeder_combout = ( \RAM|mem~260_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~260_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[221][4]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[221][4]~feeder .extended_lut = "off"; +defparam \RAM|mem[221][4]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[221][4]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X54_Y11_N16 +dffeas \RAM|mem[221][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[221][4]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[221][3]~222_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[221][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[221][4] .is_wysiwyg = "true"; +defparam \RAM|mem[221][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X48_Y12_N32 +dffeas \RAM|mem[253][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[253][2]~224_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[253][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[253][4] .is_wysiwyg = "true"; +defparam \RAM|mem[253][4] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X48_Y12_N30 +cyclonev_lcell_comb \rd[4]~365 ( +// Equation(s): +// \rd[4]~365_combout = ( \RAM|mem[253][4]~q & ( \ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout & ((\RAM|mem[237][4]~q ))) # (\ALU|Mux26~1_combout & (\RAM|mem[205][4]~q )) ) ) ) # ( !\RAM|mem[253][4]~q & ( \ALU|Mux27~1_combout & ( +// (!\ALU|Mux26~1_combout & ((\RAM|mem[237][4]~q ))) # (\ALU|Mux26~1_combout & (\RAM|mem[205][4]~q )) ) ) ) # ( \RAM|mem[253][4]~q & ( !\ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout ) # (\RAM|mem[221][4]~q ) ) ) ) # ( !\RAM|mem[253][4]~q & ( +// !\ALU|Mux27~1_combout & ( (\RAM|mem[221][4]~q & \ALU|Mux26~1_combout ) ) ) ) + + .dataa(!\RAM|mem[205][4]~q ), + .datab(!\RAM|mem[237][4]~q ), + .datac(!\RAM|mem[221][4]~q ), + .datad(!\ALU|Mux26~1_combout ), + .datae(!\RAM|mem[253][4]~q ), + .dataf(!\ALU|Mux27~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[4]~365_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[4]~365 .extended_lut = "off"; +defparam \rd[4]~365 .lut_mask = 64'h000FFF0F33553355; +defparam \rd[4]~365 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X54_Y10_N24 +cyclonev_lcell_comb \RAM|mem[206][4]~feeder ( +// Equation(s): +// \RAM|mem[206][4]~feeder_combout = ( \RAM|mem~260_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~260_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[206][4]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[206][4]~feeder .extended_lut = "off"; +defparam \RAM|mem[206][4]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[206][4]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X54_Y10_N25 +dffeas \RAM|mem[206][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[206][4]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[206][0]~237_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[206][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[206][4] .is_wysiwyg = "true"; +defparam \RAM|mem[206][4] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X54_Y11_N36 +cyclonev_lcell_comb \RAM|mem[222][4]~feeder ( +// Equation(s): +// \RAM|mem[222][4]~feeder_combout = ( \RAM|mem~260_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~260_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[222][4]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[222][4]~feeder .extended_lut = "off"; +defparam \RAM|mem[222][4]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[222][4]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X54_Y11_N37 +dffeas \RAM|mem[222][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[222][4]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[222][3]~238_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[222][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[222][4] .is_wysiwyg = "true"; +defparam \RAM|mem[222][4] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X49_Y13_N30 +cyclonev_lcell_comb \RAM|mem[238][4]~feeder ( +// Equation(s): +// \RAM|mem[238][4]~feeder_combout = ( \RAM|mem~260_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~260_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[238][4]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[238][4]~feeder .extended_lut = "off"; +defparam \RAM|mem[238][4]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[238][4]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X49_Y13_N32 +dffeas \RAM|mem[238][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[238][4]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[238][1]~239_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[238][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[238][4] .is_wysiwyg = "true"; +defparam \RAM|mem[238][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X48_Y12_N38 +dffeas \RAM|mem[254][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[254][4]~240_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[254][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[254][4] .is_wysiwyg = "true"; +defparam \RAM|mem[254][4] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X48_Y12_N36 +cyclonev_lcell_comb \rd[4]~366 ( +// Equation(s): +// \rd[4]~366_combout = ( \RAM|mem[254][4]~q & ( \ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout & ((\RAM|mem[238][4]~q ))) # (\ALU|Mux26~1_combout & (\RAM|mem[206][4]~q )) ) ) ) # ( !\RAM|mem[254][4]~q & ( \ALU|Mux27~1_combout & ( +// (!\ALU|Mux26~1_combout & ((\RAM|mem[238][4]~q ))) # (\ALU|Mux26~1_combout & (\RAM|mem[206][4]~q )) ) ) ) # ( \RAM|mem[254][4]~q & ( !\ALU|Mux27~1_combout & ( (!\ALU|Mux26~1_combout ) # (\RAM|mem[222][4]~q ) ) ) ) # ( !\RAM|mem[254][4]~q & ( +// !\ALU|Mux27~1_combout & ( (\RAM|mem[222][4]~q & \ALU|Mux26~1_combout ) ) ) ) + + .dataa(!\RAM|mem[206][4]~q ), + .datab(!\RAM|mem[222][4]~q ), + .datac(!\RAM|mem[238][4]~q ), + .datad(!\ALU|Mux26~1_combout ), + .datae(!\RAM|mem[254][4]~q ), + .dataf(!\ALU|Mux27~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[4]~366_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[4]~366 .extended_lut = "off"; +defparam \rd[4]~366 .lut_mask = 64'h0033FF330F550F55; +defparam \rd[4]~366 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X48_Y12_N24 +cyclonev_lcell_comb \rd[4]~368 ( +// Equation(s): +// \rd[4]~368_combout = ( \rd[4]~366_combout & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout ) # (\rd[4]~364_combout ) ) ) ) # ( !\rd[4]~366_combout & ( \ALU|Mux31~3_combout & ( (\rd[4]~364_combout & \ALU|Mux30~1_combout ) ) ) ) # ( +// \rd[4]~366_combout & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & (\rd[4]~367_combout )) # (\ALU|Mux30~1_combout & ((\rd[4]~365_combout ))) ) ) ) # ( !\rd[4]~366_combout & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & +// (\rd[4]~367_combout )) # (\ALU|Mux30~1_combout & ((\rd[4]~365_combout ))) ) ) ) + + .dataa(!\rd[4]~367_combout ), + .datab(!\rd[4]~364_combout ), + .datac(!\ALU|Mux30~1_combout ), + .datad(!\rd[4]~365_combout ), + .datae(!\rd[4]~366_combout ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[4]~368_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[4]~368 .extended_lut = "off"; +defparam \rd[4]~368 .lut_mask = 64'h505F505F0303F3F3; +defparam \rd[4]~368 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X48_Y7_N29 +dffeas \RAM|mem[212][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[212][1]~198_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[212][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[212][4] .is_wysiwyg = "true"; +defparam \RAM|mem[212][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X51_Y10_N56 +dffeas \RAM|mem[214][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[214][2]~230_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[214][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[214][4] .is_wysiwyg = "true"; +defparam \RAM|mem[214][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X48_Y11_N32 +dffeas \RAM|mem[213][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[213][2]~214_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[213][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[213][4] .is_wysiwyg = "true"; +defparam \RAM|mem[213][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X43_Y8_N20 +dffeas \RAM|mem[215][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[215][1]~246_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[215][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[215][4] .is_wysiwyg = "true"; +defparam \RAM|mem[215][4] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X43_Y8_N18 +cyclonev_lcell_comb \rd[4]~355 ( +// Equation(s): +// \rd[4]~355_combout = ( \RAM|mem[215][4]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & ((\RAM|mem[214][4]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[212][4]~q )) ) ) ) # ( !\RAM|mem[215][4]~q & ( \ALU|Mux31~3_combout & ( +// (!\ALU|Mux30~1_combout & ((\RAM|mem[214][4]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[212][4]~q )) ) ) ) # ( \RAM|mem[215][4]~q & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout ) # (\RAM|mem[213][4]~q ) ) ) ) # ( !\RAM|mem[215][4]~q & ( +// !\ALU|Mux31~3_combout & ( (\ALU|Mux30~1_combout & \RAM|mem[213][4]~q ) ) ) ) + + .dataa(!\RAM|mem[212][4]~q ), + .datab(!\RAM|mem[214][4]~q ), + .datac(!\ALU|Mux30~1_combout ), + .datad(!\RAM|mem[213][4]~q ), + .datae(!\RAM|mem[215][4]~q ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[4]~355_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[4]~355 .extended_lut = "off"; +defparam \rd[4]~355 .lut_mask = 64'h000FF0FF35353535; +defparam \rd[4]~355 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X53_Y7_N39 +cyclonev_lcell_comb \RAM|mem[228][4]~feeder ( +// Equation(s): +// \RAM|mem[228][4]~feeder_combout = ( \RAM|mem~260_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~260_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[228][4]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[228][4]~feeder .extended_lut = "off"; +defparam \RAM|mem[228][4]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[228][4]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X53_Y7_N40 +dffeas \RAM|mem[228][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[228][4]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[228][4]~199_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[228][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[228][4] .is_wysiwyg = "true"; +defparam \RAM|mem[228][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X43_Y9_N11 +dffeas \RAM|mem[229][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[229][2]~215_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[229][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[229][4] .is_wysiwyg = "true"; +defparam \RAM|mem[229][4] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X48_Y5_N33 +cyclonev_lcell_comb \RAM|mem[230][4]~feeder ( +// Equation(s): +// \RAM|mem[230][4]~feeder_combout = ( \RAM|mem~260_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~260_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[230][4]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[230][4]~feeder .extended_lut = "off"; +defparam \RAM|mem[230][4]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[230][4]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X48_Y5_N35 +dffeas \RAM|mem[230][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[230][4]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[230][1]~231_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[230][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[230][4] .is_wysiwyg = "true"; +defparam \RAM|mem[230][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X43_Y9_N32 +dffeas \RAM|mem[231][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[231][2]~250_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[231][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[231][4] .is_wysiwyg = "true"; +defparam \RAM|mem[231][4] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X43_Y9_N30 +cyclonev_lcell_comb \rd[4]~356 ( +// Equation(s): +// \rd[4]~356_combout = ( \RAM|mem[231][4]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & ((\RAM|mem[230][4]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[228][4]~q )) ) ) ) # ( !\RAM|mem[231][4]~q & ( \ALU|Mux31~3_combout & ( +// (!\ALU|Mux30~1_combout & ((\RAM|mem[230][4]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[228][4]~q )) ) ) ) # ( \RAM|mem[231][4]~q & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout ) # (\RAM|mem[229][4]~q ) ) ) ) # ( !\RAM|mem[231][4]~q & ( +// !\ALU|Mux31~3_combout & ( (\RAM|mem[229][4]~q & \ALU|Mux30~1_combout ) ) ) ) + + .dataa(!\RAM|mem[228][4]~q ), + .datab(!\RAM|mem[229][4]~q ), + .datac(!\RAM|mem[230][4]~q ), + .datad(!\ALU|Mux30~1_combout ), + .datae(!\RAM|mem[231][4]~q ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[4]~356_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[4]~356 .extended_lut = "off"; +defparam \rd[4]~356 .lut_mask = 64'h0033FF330F550F55; +defparam \rd[4]~356 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X49_Y8_N52 +dffeas \RAM|mem[246][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[246][2]~232_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[246][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[246][4] .is_wysiwyg = "true"; +defparam \RAM|mem[246][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X48_Y11_N59 +dffeas \RAM|mem[245][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[245][0]~216_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[245][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[245][4] .is_wysiwyg = "true"; +defparam \RAM|mem[245][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X50_Y6_N55 +dffeas \RAM|mem[244][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[244][2]~200_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[244][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[244][4] .is_wysiwyg = "true"; +defparam \RAM|mem[244][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X43_Y8_N2 +dffeas \RAM|mem[247][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[247][4]~254_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[247][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[247][4] .is_wysiwyg = "true"; +defparam \RAM|mem[247][4] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X43_Y8_N0 +cyclonev_lcell_comb \rd[4]~357 ( +// Equation(s): +// \rd[4]~357_combout = ( \RAM|mem[247][4]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & (\RAM|mem[246][4]~q )) # (\ALU|Mux30~1_combout & ((\RAM|mem[244][4]~q ))) ) ) ) # ( !\RAM|mem[247][4]~q & ( \ALU|Mux31~3_combout & ( +// (!\ALU|Mux30~1_combout & (\RAM|mem[246][4]~q )) # (\ALU|Mux30~1_combout & ((\RAM|mem[244][4]~q ))) ) ) ) # ( \RAM|mem[247][4]~q & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout ) # (\RAM|mem[245][4]~q ) ) ) ) # ( !\RAM|mem[247][4]~q & ( +// !\ALU|Mux31~3_combout & ( (\ALU|Mux30~1_combout & \RAM|mem[245][4]~q ) ) ) ) + + .dataa(!\ALU|Mux30~1_combout ), + .datab(!\RAM|mem[246][4]~q ), + .datac(!\RAM|mem[245][4]~q ), + .datad(!\RAM|mem[244][4]~q ), + .datae(!\RAM|mem[247][4]~q ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[4]~357_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[4]~357 .extended_lut = "off"; +defparam \rd[4]~357 .lut_mask = 64'h0505AFAF22772277; +defparam \rd[4]~357 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X49_Y10_N40 +dffeas \RAM|mem[196][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[196][0]~197_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[196][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[196][4] .is_wysiwyg = "true"; +defparam \RAM|mem[196][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X49_Y10_N31 +dffeas \RAM|mem[198][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[198][3]~229_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[198][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[198][4] .is_wysiwyg = "true"; +defparam \RAM|mem[198][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X48_Y11_N41 +dffeas \RAM|mem[197][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[197][1]~213_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[197][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[197][4] .is_wysiwyg = "true"; +defparam \RAM|mem[197][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X43_Y8_N50 +dffeas \RAM|mem[199][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[199][3]~242_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[199][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[199][4] .is_wysiwyg = "true"; +defparam \RAM|mem[199][4] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X43_Y8_N48 +cyclonev_lcell_comb \rd[4]~354 ( +// Equation(s): +// \rd[4]~354_combout = ( \RAM|mem[199][4]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & ((\RAM|mem[198][4]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[196][4]~q )) ) ) ) # ( !\RAM|mem[199][4]~q & ( \ALU|Mux31~3_combout & ( +// (!\ALU|Mux30~1_combout & ((\RAM|mem[198][4]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[196][4]~q )) ) ) ) # ( \RAM|mem[199][4]~q & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout ) # (\RAM|mem[197][4]~q ) ) ) ) # ( !\RAM|mem[199][4]~q & ( +// !\ALU|Mux31~3_combout & ( (\RAM|mem[197][4]~q & \ALU|Mux30~1_combout ) ) ) ) + + .dataa(!\RAM|mem[196][4]~q ), + .datab(!\RAM|mem[198][4]~q ), + .datac(!\RAM|mem[197][4]~q ), + .datad(!\ALU|Mux30~1_combout ), + .datae(!\RAM|mem[199][4]~q ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[4]~354_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[4]~354 .extended_lut = "off"; +defparam \rd[4]~354 .lut_mask = 64'h000FFF0F33553355; +defparam \rd[4]~354 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X43_Y8_N42 +cyclonev_lcell_comb \rd[4]~358 ( +// Equation(s): +// \rd[4]~358_combout = ( \rd[4]~357_combout & ( \rd[4]~354_combout & ( (!\ALU|Mux27~1_combout & ((!\ALU|Mux26~1_combout ) # ((\rd[4]~355_combout )))) # (\ALU|Mux27~1_combout & (((\rd[4]~356_combout )) # (\ALU|Mux26~1_combout ))) ) ) ) # ( +// !\rd[4]~357_combout & ( \rd[4]~354_combout & ( (!\ALU|Mux27~1_combout & (\ALU|Mux26~1_combout & (\rd[4]~355_combout ))) # (\ALU|Mux27~1_combout & (((\rd[4]~356_combout )) # (\ALU|Mux26~1_combout ))) ) ) ) # ( \rd[4]~357_combout & ( +// !\rd[4]~354_combout & ( (!\ALU|Mux27~1_combout & ((!\ALU|Mux26~1_combout ) # ((\rd[4]~355_combout )))) # (\ALU|Mux27~1_combout & (!\ALU|Mux26~1_combout & ((\rd[4]~356_combout )))) ) ) ) # ( !\rd[4]~357_combout & ( !\rd[4]~354_combout & ( +// (!\ALU|Mux27~1_combout & (\ALU|Mux26~1_combout & (\rd[4]~355_combout ))) # (\ALU|Mux27~1_combout & (!\ALU|Mux26~1_combout & ((\rd[4]~356_combout )))) ) ) ) + + .dataa(!\ALU|Mux27~1_combout ), + .datab(!\ALU|Mux26~1_combout ), + .datac(!\rd[4]~355_combout ), + .datad(!\rd[4]~356_combout ), + .datae(!\rd[4]~357_combout ), + .dataf(!\rd[4]~354_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[4]~358_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[4]~358 .extended_lut = "off"; +defparam \rd[4]~358 .lut_mask = 64'h02468ACE13579BDF; +defparam \rd[4]~358 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X50_Y8_N19 +dffeas \RAM|mem[240][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[240][1]~196_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[240][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[240][4] .is_wysiwyg = "true"; +defparam \RAM|mem[240][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X50_Y7_N28 +dffeas \RAM|mem[241][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[241][4]~212_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[241][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[241][4] .is_wysiwyg = "true"; +defparam \RAM|mem[241][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X47_Y8_N52 +dffeas \RAM|mem[242][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[242][0]~228_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[242][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[242][4] .is_wysiwyg = "true"; +defparam \RAM|mem[242][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X47_Y8_N20 +dffeas \RAM|mem[243][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[243][2]~253_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[243][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[243][4] .is_wysiwyg = "true"; +defparam \RAM|mem[243][4] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X47_Y8_N18 +cyclonev_lcell_comb \rd[4]~352 ( +// Equation(s): +// \rd[4]~352_combout = ( \RAM|mem[243][4]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & ((\RAM|mem[242][4]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[240][4]~q )) ) ) ) # ( !\RAM|mem[243][4]~q & ( \ALU|Mux31~3_combout & ( +// (!\ALU|Mux30~1_combout & ((\RAM|mem[242][4]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[240][4]~q )) ) ) ) # ( \RAM|mem[243][4]~q & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout ) # (\RAM|mem[241][4]~q ) ) ) ) # ( !\RAM|mem[243][4]~q & ( +// !\ALU|Mux31~3_combout & ( (\ALU|Mux30~1_combout & \RAM|mem[241][4]~q ) ) ) ) + + .dataa(!\RAM|mem[240][4]~q ), + .datab(!\ALU|Mux30~1_combout ), + .datac(!\RAM|mem[241][4]~q ), + .datad(!\RAM|mem[242][4]~q ), + .datae(!\RAM|mem[243][4]~q ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[4]~352_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[4]~352 .extended_lut = "off"; +defparam \rd[4]~352 .lut_mask = 64'h0303CFCF11DD11DD; +defparam \rd[4]~352 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X43_Y12_N56 +dffeas \RAM|mem[209][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[209][0]~210_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[209][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[209][4] .is_wysiwyg = "true"; +defparam \RAM|mem[209][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X48_Y7_N11 +dffeas \RAM|mem[208][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[208][4]~194_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[208][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[208][4] .is_wysiwyg = "true"; +defparam \RAM|mem[208][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X43_Y12_N31 +dffeas \RAM|mem[210][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[210][3]~226_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[210][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[210][4] .is_wysiwyg = "true"; +defparam \RAM|mem[210][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X43_Y12_N26 +dffeas \RAM|mem[211][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[211][1]~245_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[211][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[211][4] .is_wysiwyg = "true"; +defparam \RAM|mem[211][4] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X43_Y12_N24 +cyclonev_lcell_comb \rd[4]~350 ( +// Equation(s): +// \rd[4]~350_combout = ( \RAM|mem[211][4]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & ((\RAM|mem[210][4]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[208][4]~q )) ) ) ) # ( !\RAM|mem[211][4]~q & ( \ALU|Mux31~3_combout & ( +// (!\ALU|Mux30~1_combout & ((\RAM|mem[210][4]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[208][4]~q )) ) ) ) # ( \RAM|mem[211][4]~q & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout ) # (\RAM|mem[209][4]~q ) ) ) ) # ( !\RAM|mem[211][4]~q & ( +// !\ALU|Mux31~3_combout & ( (\RAM|mem[209][4]~q & \ALU|Mux30~1_combout ) ) ) ) + + .dataa(!\RAM|mem[209][4]~q ), + .datab(!\RAM|mem[208][4]~q ), + .datac(!\RAM|mem[210][4]~q ), + .datad(!\ALU|Mux30~1_combout ), + .datae(!\RAM|mem[211][4]~q ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[4]~350_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[4]~350 .extended_lut = "off"; +defparam \rd[4]~350 .lut_mask = 64'h0055FF550F330F33; +defparam \rd[4]~350 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X48_Y5_N37 +dffeas \RAM|mem[224][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[224][1]~195_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[224][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[224][4] .is_wysiwyg = "true"; +defparam \RAM|mem[224][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X43_Y5_N29 +dffeas \RAM|mem[225][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[225][3]~211_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[225][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[225][4] .is_wysiwyg = "true"; +defparam \RAM|mem[225][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X43_Y5_N41 +dffeas \RAM|mem[226][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[226][3]~227_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[226][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[226][4] .is_wysiwyg = "true"; +defparam \RAM|mem[226][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X43_Y5_N50 +dffeas \RAM|mem[227][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[227][3]~249_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[227][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[227][4] .is_wysiwyg = "true"; +defparam \RAM|mem[227][4] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X43_Y5_N48 +cyclonev_lcell_comb \rd[4]~351 ( +// Equation(s): +// \rd[4]~351_combout = ( \RAM|mem[227][4]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & ((\RAM|mem[226][4]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[224][4]~q )) ) ) ) # ( !\RAM|mem[227][4]~q & ( \ALU|Mux31~3_combout & ( +// (!\ALU|Mux30~1_combout & ((\RAM|mem[226][4]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[224][4]~q )) ) ) ) # ( \RAM|mem[227][4]~q & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout ) # (\RAM|mem[225][4]~q ) ) ) ) # ( !\RAM|mem[227][4]~q & ( +// !\ALU|Mux31~3_combout & ( (\ALU|Mux30~1_combout & \RAM|mem[225][4]~q ) ) ) ) + + .dataa(!\RAM|mem[224][4]~q ), + .datab(!\ALU|Mux30~1_combout ), + .datac(!\RAM|mem[225][4]~q ), + .datad(!\RAM|mem[226][4]~q ), + .datae(!\RAM|mem[227][4]~q ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[4]~351_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[4]~351 .extended_lut = "off"; +defparam \rd[4]~351 .lut_mask = 64'h0303CFCF11DD11DD; +defparam \rd[4]~351 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X49_Y13_N54 +cyclonev_lcell_comb \RAM|mem[195][4]~feeder ( +// Equation(s): +// \RAM|mem[195][4]~feeder_combout = ( \RAM|mem~260_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\RAM|mem~260_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\RAM|mem[195][4]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \RAM|mem[195][4]~feeder .extended_lut = "off"; +defparam \RAM|mem[195][4]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \RAM|mem[195][4]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X49_Y13_N55 +dffeas \RAM|mem[195][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\RAM|mem[195][4]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\RAM|mem[195][0]~241_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[195][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[195][4] .is_wysiwyg = "true"; +defparam \RAM|mem[195][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X49_Y9_N34 +dffeas \RAM|mem[194][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[194][4]~225_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[194][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[194][4] .is_wysiwyg = "true"; +defparam \RAM|mem[194][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X49_Y9_N38 +dffeas \RAM|mem[192][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[192][3]~193_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[192][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[192][4] .is_wysiwyg = "true"; +defparam \RAM|mem[192][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X49_Y9_N50 +dffeas \RAM|mem[193][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[193][1]~209_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[193][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[193][4] .is_wysiwyg = "true"; +defparam \RAM|mem[193][4] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X49_Y9_N48 +cyclonev_lcell_comb \rd[4]~349 ( +// Equation(s): +// \rd[4]~349_combout = ( \RAM|mem[193][4]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & (\RAM|mem[194][4]~q )) # (\ALU|Mux30~1_combout & ((\RAM|mem[192][4]~q ))) ) ) ) # ( !\RAM|mem[193][4]~q & ( \ALU|Mux31~3_combout & ( +// (!\ALU|Mux30~1_combout & (\RAM|mem[194][4]~q )) # (\ALU|Mux30~1_combout & ((\RAM|mem[192][4]~q ))) ) ) ) # ( \RAM|mem[193][4]~q & ( !\ALU|Mux31~3_combout & ( (\ALU|Mux30~1_combout ) # (\RAM|mem[195][4]~q ) ) ) ) # ( !\RAM|mem[193][4]~q & ( +// !\ALU|Mux31~3_combout & ( (\RAM|mem[195][4]~q & !\ALU|Mux30~1_combout ) ) ) ) + + .dataa(!\RAM|mem[195][4]~q ), + .datab(!\RAM|mem[194][4]~q ), + .datac(!\RAM|mem[192][4]~q ), + .datad(!\ALU|Mux30~1_combout ), + .datae(!\RAM|mem[193][4]~q ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[4]~349_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[4]~349 .extended_lut = "off"; +defparam \rd[4]~349 .lut_mask = 64'h550055FF330F330F; +defparam \rd[4]~349 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y8_N36 +cyclonev_lcell_comb \rd[4]~353 ( +// Equation(s): +// \rd[4]~353_combout = ( \rd[4]~351_combout & ( \rd[4]~349_combout & ( ((!\ALU|Mux26~1_combout & (\rd[4]~352_combout )) # (\ALU|Mux26~1_combout & ((\rd[4]~350_combout )))) # (\ALU|Mux27~1_combout ) ) ) ) # ( !\rd[4]~351_combout & ( \rd[4]~349_combout +// & ( (!\ALU|Mux26~1_combout & (!\ALU|Mux27~1_combout & (\rd[4]~352_combout ))) # (\ALU|Mux26~1_combout & (((\rd[4]~350_combout )) # (\ALU|Mux27~1_combout ))) ) ) ) # ( \rd[4]~351_combout & ( !\rd[4]~349_combout & ( (!\ALU|Mux26~1_combout & +// (((\rd[4]~352_combout )) # (\ALU|Mux27~1_combout ))) # (\ALU|Mux26~1_combout & (!\ALU|Mux27~1_combout & ((\rd[4]~350_combout )))) ) ) ) # ( !\rd[4]~351_combout & ( !\rd[4]~349_combout & ( (!\ALU|Mux27~1_combout & ((!\ALU|Mux26~1_combout & +// (\rd[4]~352_combout )) # (\ALU|Mux26~1_combout & ((\rd[4]~350_combout ))))) ) ) ) + + .dataa(!\ALU|Mux26~1_combout ), + .datab(!\ALU|Mux27~1_combout ), + .datac(!\rd[4]~352_combout ), + .datad(!\rd[4]~350_combout ), + .datae(!\rd[4]~351_combout ), + .dataf(!\rd[4]~349_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[4]~353_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[4]~353 .extended_lut = "off"; +defparam \rd[4]~353 .lut_mask = 64'h084C2A6E195D3B7F; +defparam \rd[4]~353 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X49_Y8_N4 +dffeas \RAM|mem[250][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[250][4]~236_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[250][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[250][4] .is_wysiwyg = "true"; +defparam \RAM|mem[250][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X48_Y7_N52 +dffeas \RAM|mem[248][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[248][3]~204_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[248][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[248][4] .is_wysiwyg = "true"; +defparam \RAM|mem[248][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X48_Y8_N16 +dffeas \RAM|mem[249][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[249][1]~220_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[249][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[249][4] .is_wysiwyg = "true"; +defparam \RAM|mem[249][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X41_Y12_N50 +dffeas \RAM|mem[251][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[251][2]~255_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[251][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[251][4] .is_wysiwyg = "true"; +defparam \RAM|mem[251][4] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X41_Y12_N48 +cyclonev_lcell_comb \rd[4]~362 ( +// Equation(s): +// \rd[4]~362_combout = ( \RAM|mem[251][4]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & (\RAM|mem[250][4]~q )) # (\ALU|Mux30~1_combout & ((\RAM|mem[248][4]~q ))) ) ) ) # ( !\RAM|mem[251][4]~q & ( \ALU|Mux31~3_combout & ( +// (!\ALU|Mux30~1_combout & (\RAM|mem[250][4]~q )) # (\ALU|Mux30~1_combout & ((\RAM|mem[248][4]~q ))) ) ) ) # ( \RAM|mem[251][4]~q & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout ) # (\RAM|mem[249][4]~q ) ) ) ) # ( !\RAM|mem[251][4]~q & ( +// !\ALU|Mux31~3_combout & ( (\ALU|Mux30~1_combout & \RAM|mem[249][4]~q ) ) ) ) + + .dataa(!\ALU|Mux30~1_combout ), + .datab(!\RAM|mem[250][4]~q ), + .datac(!\RAM|mem[248][4]~q ), + .datad(!\RAM|mem[249][4]~q ), + .datae(!\RAM|mem[251][4]~q ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[4]~362_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[4]~362 .extended_lut = "off"; +defparam \rd[4]~362 .lut_mask = 64'h0055AAFF27272727; +defparam \rd[4]~362 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X53_Y10_N17 +dffeas \RAM|mem[202][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[202][4]~233_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[202][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[202][4] .is_wysiwyg = "true"; +defparam \RAM|mem[202][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X53_Y12_N40 +dffeas \RAM|mem[201][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[201][4]~217_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[201][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[201][4] .is_wysiwyg = "true"; +defparam \RAM|mem[201][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X54_Y7_N19 +dffeas \RAM|mem[200][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[200][2]~201_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[200][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[200][4] .is_wysiwyg = "true"; +defparam \RAM|mem[200][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X41_Y12_N8 +dffeas \RAM|mem[203][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[203][4]~243_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[203][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[203][4] .is_wysiwyg = "true"; +defparam \RAM|mem[203][4] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X41_Y12_N6 +cyclonev_lcell_comb \rd[4]~359 ( +// Equation(s): +// \rd[4]~359_combout = ( \RAM|mem[203][4]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & (\RAM|mem[202][4]~q )) # (\ALU|Mux30~1_combout & ((\RAM|mem[200][4]~q ))) ) ) ) # ( !\RAM|mem[203][4]~q & ( \ALU|Mux31~3_combout & ( +// (!\ALU|Mux30~1_combout & (\RAM|mem[202][4]~q )) # (\ALU|Mux30~1_combout & ((\RAM|mem[200][4]~q ))) ) ) ) # ( \RAM|mem[203][4]~q & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout ) # (\RAM|mem[201][4]~q ) ) ) ) # ( !\RAM|mem[203][4]~q & ( +// !\ALU|Mux31~3_combout & ( (\ALU|Mux30~1_combout & \RAM|mem[201][4]~q ) ) ) ) + + .dataa(!\RAM|mem[202][4]~q ), + .datab(!\ALU|Mux30~1_combout ), + .datac(!\RAM|mem[201][4]~q ), + .datad(!\RAM|mem[200][4]~q ), + .datae(!\RAM|mem[203][4]~q ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[4]~359_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[4]~359 .extended_lut = "off"; +defparam \rd[4]~359 .lut_mask = 64'h0303CFCF44774477; +defparam \rd[4]~359 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X54_Y7_N17 +dffeas \RAM|mem[216][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[216][3]~202_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[216][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[216][4] .is_wysiwyg = "true"; +defparam \RAM|mem[216][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X53_Y10_N4 +dffeas \RAM|mem[218][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[218][2]~234_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[218][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[218][4] .is_wysiwyg = "true"; +defparam \RAM|mem[218][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X53_Y10_N26 +dffeas \RAM|mem[217][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[217][1]~218_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[217][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[217][4] .is_wysiwyg = "true"; +defparam \RAM|mem[217][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X41_Y12_N56 +dffeas \RAM|mem[219][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[219][0]~247_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[219][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[219][4] .is_wysiwyg = "true"; +defparam \RAM|mem[219][4] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X41_Y12_N54 +cyclonev_lcell_comb \rd[4]~360 ( +// Equation(s): +// \rd[4]~360_combout = ( \RAM|mem[219][4]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & ((\RAM|mem[218][4]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[216][4]~q )) ) ) ) # ( !\RAM|mem[219][4]~q & ( \ALU|Mux31~3_combout & ( +// (!\ALU|Mux30~1_combout & ((\RAM|mem[218][4]~q ))) # (\ALU|Mux30~1_combout & (\RAM|mem[216][4]~q )) ) ) ) # ( \RAM|mem[219][4]~q & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout ) # (\RAM|mem[217][4]~q ) ) ) ) # ( !\RAM|mem[219][4]~q & ( +// !\ALU|Mux31~3_combout & ( (\ALU|Mux30~1_combout & \RAM|mem[217][4]~q ) ) ) ) + + .dataa(!\RAM|mem[216][4]~q ), + .datab(!\ALU|Mux30~1_combout ), + .datac(!\RAM|mem[218][4]~q ), + .datad(!\RAM|mem[217][4]~q ), + .datae(!\RAM|mem[219][4]~q ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[4]~360_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[4]~360 .extended_lut = "off"; +defparam \rd[4]~360 .lut_mask = 64'h0033CCFF1D1D1D1D; +defparam \rd[4]~360 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X45_Y9_N2 +dffeas \RAM|mem[234][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[234][0]~235_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[234][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[234][4] .is_wysiwyg = "true"; +defparam \RAM|mem[234][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X54_Y7_N1 +dffeas \RAM|mem[232][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[232][3]~203_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[232][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[232][4] .is_wysiwyg = "true"; +defparam \RAM|mem[232][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X45_Y9_N26 +dffeas \RAM|mem[233][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[233][0]~219_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[233][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[233][4] .is_wysiwyg = "true"; +defparam \RAM|mem[233][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X45_Y9_N32 +dffeas \RAM|mem[235][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\RAM|mem~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\RAM|mem[235][2]~251_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\RAM|mem[235][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \RAM|mem[235][4] .is_wysiwyg = "true"; +defparam \RAM|mem[235][4] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X45_Y9_N30 +cyclonev_lcell_comb \rd[4]~361 ( +// Equation(s): +// \rd[4]~361_combout = ( \RAM|mem[235][4]~q & ( \ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout & (\RAM|mem[234][4]~q )) # (\ALU|Mux30~1_combout & ((\RAM|mem[232][4]~q ))) ) ) ) # ( !\RAM|mem[235][4]~q & ( \ALU|Mux31~3_combout & ( +// (!\ALU|Mux30~1_combout & (\RAM|mem[234][4]~q )) # (\ALU|Mux30~1_combout & ((\RAM|mem[232][4]~q ))) ) ) ) # ( \RAM|mem[235][4]~q & ( !\ALU|Mux31~3_combout & ( (!\ALU|Mux30~1_combout ) # (\RAM|mem[233][4]~q ) ) ) ) # ( !\RAM|mem[235][4]~q & ( +// !\ALU|Mux31~3_combout & ( (\RAM|mem[233][4]~q & \ALU|Mux30~1_combout ) ) ) ) + + .dataa(!\RAM|mem[234][4]~q ), + .datab(!\RAM|mem[232][4]~q ), + .datac(!\RAM|mem[233][4]~q ), + .datad(!\ALU|Mux30~1_combout ), + .datae(!\RAM|mem[235][4]~q ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[4]~361_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[4]~361 .extended_lut = "off"; +defparam \rd[4]~361 .lut_mask = 64'h000FFF0F55335533; +defparam \rd[4]~361 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X41_Y12_N0 +cyclonev_lcell_comb \rd[4]~363 ( +// Equation(s): +// \rd[4]~363_combout = ( \rd[4]~360_combout & ( \rd[4]~361_combout & ( (!\ALU|Mux27~1_combout & (((\rd[4]~362_combout )) # (\ALU|Mux26~1_combout ))) # (\ALU|Mux27~1_combout & ((!\ALU|Mux26~1_combout ) # ((\rd[4]~359_combout )))) ) ) ) # ( +// !\rd[4]~360_combout & ( \rd[4]~361_combout & ( (!\ALU|Mux27~1_combout & (!\ALU|Mux26~1_combout & (\rd[4]~362_combout ))) # (\ALU|Mux27~1_combout & ((!\ALU|Mux26~1_combout ) # ((\rd[4]~359_combout )))) ) ) ) # ( \rd[4]~360_combout & ( +// !\rd[4]~361_combout & ( (!\ALU|Mux27~1_combout & (((\rd[4]~362_combout )) # (\ALU|Mux26~1_combout ))) # (\ALU|Mux27~1_combout & (\ALU|Mux26~1_combout & ((\rd[4]~359_combout )))) ) ) ) # ( !\rd[4]~360_combout & ( !\rd[4]~361_combout & ( +// (!\ALU|Mux27~1_combout & (!\ALU|Mux26~1_combout & (\rd[4]~362_combout ))) # (\ALU|Mux27~1_combout & (\ALU|Mux26~1_combout & ((\rd[4]~359_combout )))) ) ) ) + + .dataa(!\ALU|Mux27~1_combout ), + .datab(!\ALU|Mux26~1_combout ), + .datac(!\rd[4]~362_combout ), + .datad(!\rd[4]~359_combout ), + .datae(!\rd[4]~360_combout ), + .dataf(!\rd[4]~361_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[4]~363_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[4]~363 .extended_lut = "off"; +defparam \rd[4]~363 .lut_mask = 64'h08192A3B4C5D6E7F; +defparam \rd[4]~363 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y8_N18 +cyclonev_lcell_comb \rd[4]~369 ( +// Equation(s): +// \rd[4]~369_combout = ( \rd[4]~353_combout & ( \rd[4]~363_combout & ( ((!\ALU|Mux28~1_combout & (\rd[4]~368_combout )) # (\ALU|Mux28~1_combout & ((\rd[4]~358_combout )))) # (\ALU|Mux29~3_combout ) ) ) ) # ( !\rd[4]~353_combout & ( \rd[4]~363_combout +// & ( (!\ALU|Mux29~3_combout & ((!\ALU|Mux28~1_combout & (\rd[4]~368_combout )) # (\ALU|Mux28~1_combout & ((\rd[4]~358_combout ))))) # (\ALU|Mux29~3_combout & (!\ALU|Mux28~1_combout )) ) ) ) # ( \rd[4]~353_combout & ( !\rd[4]~363_combout & ( +// (!\ALU|Mux29~3_combout & ((!\ALU|Mux28~1_combout & (\rd[4]~368_combout )) # (\ALU|Mux28~1_combout & ((\rd[4]~358_combout ))))) # (\ALU|Mux29~3_combout & (\ALU|Mux28~1_combout )) ) ) ) # ( !\rd[4]~353_combout & ( !\rd[4]~363_combout & ( +// (!\ALU|Mux29~3_combout & ((!\ALU|Mux28~1_combout & (\rd[4]~368_combout )) # (\ALU|Mux28~1_combout & ((\rd[4]~358_combout ))))) ) ) ) + + .dataa(!\ALU|Mux29~3_combout ), + .datab(!\ALU|Mux28~1_combout ), + .datac(!\rd[4]~368_combout ), + .datad(!\rd[4]~358_combout ), + .datae(!\rd[4]~353_combout ), + .dataf(!\rd[4]~363_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[4]~369_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[4]~369 .extended_lut = "off"; +defparam \rd[4]~369 .lut_mask = 64'h082A193B4C6E5D7F; +defparam \rd[4]~369 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y8_N15 +cyclonev_lcell_comb \rd[4]~434 ( +// Equation(s): +// \rd[4]~434_combout = ( \rd[4]~433_combout & ( \rd[4]~369_combout ) ) # ( !\rd[4]~433_combout & ( \rd[4]~369_combout & ( (!\ALU|Mux25~1_combout & (\CONTROL_UNIT|M2R[0]~0_combout & ((!\ALU|Mux24~1_combout ) # (\rd[4]~390_combout )))) ) ) ) # ( +// \rd[4]~433_combout & ( !\rd[4]~369_combout ) ) # ( !\rd[4]~433_combout & ( !\rd[4]~369_combout & ( (\ALU|Mux24~1_combout & (!\ALU|Mux25~1_combout & (\rd[4]~390_combout & \CONTROL_UNIT|M2R[0]~0_combout ))) ) ) ) + + .dataa(!\ALU|Mux24~1_combout ), + .datab(!\ALU|Mux25~1_combout ), + .datac(!\rd[4]~390_combout ), + .datad(!\CONTROL_UNIT|M2R[0]~0_combout ), + .datae(!\rd[4]~433_combout ), + .dataf(!\rd[4]~369_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[4]~434_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[4]~434 .extended_lut = "off"; +defparam \rd[4]~434 .lut_mask = 64'h0004FFFF008CFFFF; +defparam \rd[4]~434 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X40_Y8_N7 +dffeas \REGS|regs[26][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[4]~434_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~6_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[26][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[26][4] .is_wysiwyg = "true"; +defparam \REGS|regs[26][4] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y6_N48 +cyclonev_lcell_comb \REGS|regs[18][4]~feeder ( +// Equation(s): +// \REGS|regs[18][4]~feeder_combout = ( \rd[4]~434_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[4]~434_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[18][4]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[18][4]~feeder .extended_lut = "off"; +defparam \REGS|regs[18][4]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[18][4]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X42_Y6_N49 +dffeas \REGS|regs[18][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[18][4]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~5_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[18][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[18][4] .is_wysiwyg = "true"; +defparam \REGS|regs[18][4] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X40_Y8_N6 +cyclonev_lcell_comb \REGS|Mux59~0 ( +// Equation(s): +// \REGS|Mux59~0_combout = ( \REGS|regs[26][4]~q & ( \REGS|regs[18][4]~q ) ) # ( !\REGS|regs[26][4]~q & ( \REGS|regs[18][4]~q & ( (((\PC|pc [6]) # (\PC|pc [9])) # (\PC|pc[8]~DUPLICATE_q )) # (\PC|pc [7]) ) ) ) # ( \REGS|regs[26][4]~q & ( +// !\REGS|regs[18][4]~q & ( (!\PC|pc [7] & (!\PC|pc[8]~DUPLICATE_q & (!\PC|pc [9] & !\PC|pc [6]))) ) ) ) + + .dataa(!\PC|pc [7]), + .datab(!\PC|pc[8]~DUPLICATE_q ), + .datac(!\PC|pc [9]), + .datad(!\PC|pc [6]), + .datae(!\REGS|regs[26][4]~q ), + .dataf(!\REGS|regs[18][4]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux59~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux59~0 .extended_lut = "off"; +defparam \REGS|Mux59~0 .lut_mask = 64'h000080007FFFFFFF; +defparam \REGS|Mux59~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X40_Y12_N28 +dffeas \REGS|regs[8][4]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[4]~434_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~24_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[8][4]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[8][4]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[8][4]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X35_Y9_N27 +cyclonev_lcell_comb \REGS|Mux27~1 ( +// Equation(s): +// \REGS|Mux27~1_combout = ( \REGS|regs[8][4]~DUPLICATE_q & ( (\ROM|mem~0_combout & ((!\ROM|mem~15_combout ) # (\REGS|regs[9][4]~q ))) ) ) # ( !\REGS|regs[8][4]~DUPLICATE_q & ( (\REGS|regs[9][4]~q & (\ROM|mem~0_combout & \ROM|mem~15_combout )) ) ) + + .dataa(!\REGS|regs[9][4]~q ), + .datab(!\ROM|mem~0_combout ), + .datac(gnd), + .datad(!\ROM|mem~15_combout ), + .datae(gnd), + .dataf(!\REGS|regs[8][4]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux27~1_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux27~1 .extended_lut = "off"; +defparam \REGS|Mux27~1 .lut_mask = 64'h0011001133113311; +defparam \REGS|Mux27~1 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y7_N24 +cyclonev_lcell_comb \REGS|Mux27~0 ( +// Equation(s): +// \REGS|Mux27~0_combout = ( \REGS|Mux59~4_combout & ( \ROM|mem~16_combout & ( (!\ROM|mem~9_combout & ((\REGS|Mux59~9_combout ))) # (\ROM|mem~9_combout & (\REGS|Mux59~3_combout )) ) ) ) # ( !\REGS|Mux59~4_combout & ( \ROM|mem~16_combout & ( +// (!\ROM|mem~9_combout & ((\REGS|Mux59~9_combout ))) # (\ROM|mem~9_combout & (\REGS|Mux59~3_combout )) ) ) ) # ( \REGS|Mux59~4_combout & ( !\ROM|mem~16_combout & ( (\REGS|Mux59~10_combout ) # (\ROM|mem~9_combout ) ) ) ) # ( !\REGS|Mux59~4_combout & ( +// !\ROM|mem~16_combout & ( (!\ROM|mem~9_combout & \REGS|Mux59~10_combout ) ) ) ) + + .dataa(!\ROM|mem~9_combout ), + .datab(!\REGS|Mux59~3_combout ), + .datac(!\REGS|Mux59~9_combout ), + .datad(!\REGS|Mux59~10_combout ), + .datae(!\REGS|Mux59~4_combout ), + .dataf(!\ROM|mem~16_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux27~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux27~0 .extended_lut = "off"; +defparam \REGS|Mux27~0 .lut_mask = 64'h00AA55FF1B1B1B1B; +defparam \REGS|Mux27~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X36_Y9_N33 +cyclonev_lcell_comb \REGS|Mux27~2 ( +// Equation(s): +// \REGS|Mux27~2_combout = ( \REGS|Mux27~0_combout & ( (((\ROM|mem~9_combout & \REGS|Mux59~0_combout )) # (\REGS|Mux27~1_combout )) # (\ROM|mem~17_combout ) ) ) # ( !\REGS|Mux27~0_combout & ( (!\ROM|mem~17_combout & (((\ROM|mem~9_combout & +// \REGS|Mux59~0_combout )) # (\REGS|Mux27~1_combout ))) ) ) + + .dataa(!\ROM|mem~17_combout ), + .datab(!\ROM|mem~9_combout ), + .datac(!\REGS|Mux59~0_combout ), + .datad(!\REGS|Mux27~1_combout ), + .datae(gnd), + .dataf(!\REGS|Mux27~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux27~2_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux27~2 .extended_lut = "off"; +defparam \REGS|Mux27~2 .lut_mask = 64'h02AA02AA57FF57FF; +defparam \REGS|Mux27~2 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X43_Y11_N24 +cyclonev_lcell_comb \ALU|Mux26~1 ( +// Equation(s): +// \ALU|Mux26~1_combout = ( \ALU|adder_unit|OUT_1 [5] & ( (\ALU|Mux29~0_combout & !\ALU|Mux26~0_combout ) ) ) # ( !\ALU|adder_unit|OUT_1 [5] & ( !\ALU|Mux26~0_combout ) ) + + .dataa(!\ALU|Mux29~0_combout ), + .datab(gnd), + .datac(!\ALU|Mux26~0_combout ), + .datad(gnd), + .datae(gnd), + .dataf(!\ALU|adder_unit|OUT_1 [5]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\ALU|Mux26~1_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \ALU|Mux26~1 .extended_lut = "off"; +defparam \ALU|Mux26~1 .lut_mask = 64'hF0F0F0F050505050; +defparam \ALU|Mux26~1 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X40_Y7_N24 +cyclonev_lcell_comb \rd[5]~436 ( +// Equation(s): +// \rd[5]~436_combout = ( !\ALU|Mux26~1_combout & ( !\CONTROL_UNIT|M2R[0]~0_combout ) ) + + .dataa(gnd), + .datab(gnd), + .datac(!\CONTROL_UNIT|M2R[0]~0_combout ), + .datad(gnd), + .datae(gnd), + .dataf(!\ALU|Mux26~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[5]~436_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[5]~436 .extended_lut = "off"; +defparam \rd[5]~436 .lut_mask = 64'hF0F0F0F000000000; +defparam \rd[5]~436 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X35_Y14_N45 +cyclonev_lcell_comb \REGS|regs[9][5]~feeder ( +// Equation(s): +// \REGS|regs[9][5]~feeder_combout = ( \rd[5]~436_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[5]~436_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[9][5]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[9][5]~feeder .extended_lut = "off"; +defparam \REGS|regs[9][5]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[9][5]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X35_Y14_N47 +dffeas \REGS|regs[9][5] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[9][5]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~29_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[9][5]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[9][5] .is_wysiwyg = "true"; +defparam \REGS|regs[9][5] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X31_Y14_N31 +dffeas \REGS|regs[1][5] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[5]~436_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~28_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[1][5]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[1][5] .is_wysiwyg = "true"; +defparam \REGS|regs[1][5] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X35_Y14_N6 +cyclonev_lcell_comb \REGS|Mux58~5 ( +// Equation(s): +// \REGS|Mux58~5_combout = ( \PC|pc[7]~DUPLICATE_q & ( \PC|pc[6]~DUPLICATE_q & ( \REGS|regs[1][5]~q ) ) ) # ( !\PC|pc[7]~DUPLICATE_q & ( \PC|pc[6]~DUPLICATE_q & ( \REGS|regs[1][5]~q ) ) ) # ( \PC|pc[7]~DUPLICATE_q & ( !\PC|pc[6]~DUPLICATE_q & ( +// \REGS|regs[1][5]~q ) ) ) # ( !\PC|pc[7]~DUPLICATE_q & ( !\PC|pc[6]~DUPLICATE_q & ( (!\PC|pc[8]~DUPLICATE_q & ((!\PC|pc [9] & (\REGS|regs[9][5]~q )) # (\PC|pc [9] & ((\REGS|regs[1][5]~q ))))) # (\PC|pc[8]~DUPLICATE_q & (((\REGS|regs[1][5]~q )))) ) ) ) + + .dataa(!\PC|pc[8]~DUPLICATE_q ), + .datab(!\REGS|regs[9][5]~q ), + .datac(!\REGS|regs[1][5]~q ), + .datad(!\PC|pc [9]), + .datae(!\PC|pc[7]~DUPLICATE_q ), + .dataf(!\PC|pc[6]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux58~5_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux58~5 .extended_lut = "off"; +defparam \REGS|Mux58~5 .lut_mask = 64'h270F0F0F0F0F0F0F; +defparam \REGS|Mux58~5 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X36_Y14_N35 +dffeas \REGS|regs[8][5] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[5]~436_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~24_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[8][5]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[8][5] .is_wysiwyg = "true"; +defparam \REGS|regs[8][5] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X36_Y14_N42 +cyclonev_lcell_comb \REGS|Mux58~6 ( +// Equation(s): +// \REGS|Mux58~6_combout = ( !\PC|pc[8]~DUPLICATE_q & ( !\PC|pc [9] & ( (\REGS|regs[8][5]~q & (!\PC|pc [7] & !\PC|pc[6]~DUPLICATE_q )) ) ) ) + + .dataa(!\REGS|regs[8][5]~q ), + .datab(!\PC|pc [7]), + .datac(gnd), + .datad(!\PC|pc[6]~DUPLICATE_q ), + .datae(!\PC|pc[8]~DUPLICATE_q ), + .dataf(!\PC|pc [9]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux58~6_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux58~6 .extended_lut = "off"; +defparam \REGS|Mux58~6 .lut_mask = 64'h4400000000000000; +defparam \REGS|Mux58~6 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X36_Y16_N27 +cyclonev_lcell_comb \REGS|regs[2][5]~feeder ( +// Equation(s): +// \REGS|regs[2][5]~feeder_combout = ( \rd[5]~436_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[5]~436_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[2][5]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[2][5]~feeder .extended_lut = "off"; +defparam \REGS|regs[2][5]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[2][5]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X36_Y16_N28 +dffeas \REGS|regs[2][5] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[2][5]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~32_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[2][5]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[2][5] .is_wysiwyg = "true"; +defparam \REGS|regs[2][5] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X36_Y16_N6 +cyclonev_lcell_comb \REGS|regs[10][5]~feeder ( +// Equation(s): +// \REGS|regs[10][5]~feeder_combout = ( \rd[5]~436_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[5]~436_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[10][5]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[10][5]~feeder .extended_lut = "off"; +defparam \REGS|regs[10][5]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[10][5]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X36_Y16_N7 +dffeas \REGS|regs[10][5] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[10][5]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~33_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[10][5]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[10][5] .is_wysiwyg = "true"; +defparam \REGS|regs[10][5] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X36_Y13_N47 +dffeas \REGS|regs[11][5] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[5]~436_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~37_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[11][5]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[11][5] .is_wysiwyg = "true"; +defparam \REGS|regs[11][5] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X36_Y13_N30 +cyclonev_lcell_comb \rt_alu[5]~49 ( +// Equation(s): +// \rt_alu[5]~49_combout = ( \ROM|mem~10_combout & ( (!\ROM|mem~0_combout & (\REGS|regs[2][5]~q )) # (\ROM|mem~0_combout & ((\REGS|regs[10][5]~q ))) ) ) # ( !\ROM|mem~10_combout & ( (!\ROM|mem~0_combout & (\REGS|regs[2][5]~q )) # (\ROM|mem~0_combout & +// ((\REGS|regs[11][5]~q ))) ) ) + + .dataa(!\REGS|regs[2][5]~q ), + .datab(!\ROM|mem~0_combout ), + .datac(!\REGS|regs[10][5]~q ), + .datad(!\REGS|regs[11][5]~q ), + .datae(gnd), + .dataf(!\ROM|mem~10_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[5]~49_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[5]~49 .extended_lut = "off"; +defparam \rt_alu[5]~49 .lut_mask = 64'h4477447747474747; +defparam \rt_alu[5]~49 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X36_Y13_N2 +dffeas \REGS|regs[15][5] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[5]~436_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~39_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[15][5]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[15][5] .is_wysiwyg = "true"; +defparam \REGS|regs[15][5] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y13_N30 +cyclonev_lcell_comb \REGS|regs[6][5]~feeder ( +// Equation(s): +// \REGS|regs[6][5]~feeder_combout = ( \rd[5]~436_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[5]~436_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[6][5]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[6][5]~feeder .extended_lut = "off"; +defparam \REGS|regs[6][5]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[6][5]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X32_Y13_N31 +dffeas \REGS|regs[6][5] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[6][5]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~34_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[6][5]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[6][5] .is_wysiwyg = "true"; +defparam \REGS|regs[6][5] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X31_Y14_N2 +dffeas \REGS|regs[14][5] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[5]~436_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~35_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[14][5]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[14][5] .is_wysiwyg = "true"; +defparam \REGS|regs[14][5] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X36_Y13_N3 +cyclonev_lcell_comb \rt_alu[5]~50 ( +// Equation(s): +// \rt_alu[5]~50_combout = ( \ROM|mem~0_combout & ( \ROM|mem~10_combout & ( \REGS|regs[14][5]~q ) ) ) # ( !\ROM|mem~0_combout & ( \ROM|mem~10_combout & ( \REGS|regs[6][5]~q ) ) ) # ( \ROM|mem~0_combout & ( !\ROM|mem~10_combout & ( +// \REGS|regs[15][5]~q ) ) ) # ( !\ROM|mem~0_combout & ( !\ROM|mem~10_combout & ( \REGS|regs[6][5]~q ) ) ) + + .dataa(!\REGS|regs[15][5]~q ), + .datab(gnd), + .datac(!\REGS|regs[6][5]~q ), + .datad(!\REGS|regs[14][5]~q ), + .datae(!\ROM|mem~0_combout ), + .dataf(!\ROM|mem~10_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[5]~50_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[5]~50 .extended_lut = "off"; +defparam \rt_alu[5]~50 .lut_mask = 64'h0F0F55550F0F00FF; +defparam \rt_alu[5]~50 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X36_Y13_N24 +cyclonev_lcell_comb \rt_alu[5]~51 ( +// Equation(s): +// \rt_alu[5]~51_combout = ( \REGS|Mux58~1_combout & ( \ROM|mem~13_combout & ( (!\ROM|mem~12_combout ) # (\rt_alu[5]~50_combout ) ) ) ) # ( !\REGS|Mux58~1_combout & ( \ROM|mem~13_combout & ( (\rt_alu[5]~50_combout & \ROM|mem~12_combout ) ) ) ) # ( +// \REGS|Mux58~1_combout & ( !\ROM|mem~13_combout & ( (!\ROM|mem~12_combout & ((\REGS|Mux58~0_combout ))) # (\ROM|mem~12_combout & (\rt_alu[5]~50_combout )) ) ) ) # ( !\REGS|Mux58~1_combout & ( !\ROM|mem~13_combout & ( (!\ROM|mem~12_combout & +// ((\REGS|Mux58~0_combout ))) # (\ROM|mem~12_combout & (\rt_alu[5]~50_combout )) ) ) ) + + .dataa(!\rt_alu[5]~50_combout ), + .datab(!\REGS|Mux58~0_combout ), + .datac(!\ROM|mem~12_combout ), + .datad(gnd), + .datae(!\REGS|Mux58~1_combout ), + .dataf(!\ROM|mem~13_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[5]~51_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[5]~51 .extended_lut = "off"; +defparam \rt_alu[5]~51 .lut_mask = 64'h353535350505F5F5; +defparam \rt_alu[5]~51 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X36_Y13_N6 +cyclonev_lcell_comb \rt_alu[5]~52 ( +// Equation(s): +// \rt_alu[5]~52_combout = ( \rt_alu[17]~10_combout & ( \rt_alu[5]~51_combout & ( (!\rt_alu[17]~11_combout & (\REGS|Mux58~5_combout )) # (\rt_alu[17]~11_combout & ((\rt_alu[5]~49_combout ))) ) ) ) # ( !\rt_alu[17]~10_combout & ( \rt_alu[5]~51_combout +// & ( (\REGS|Mux58~6_combout ) # (\rt_alu[17]~11_combout ) ) ) ) # ( \rt_alu[17]~10_combout & ( !\rt_alu[5]~51_combout & ( (!\rt_alu[17]~11_combout & (\REGS|Mux58~5_combout )) # (\rt_alu[17]~11_combout & ((\rt_alu[5]~49_combout ))) ) ) ) # ( +// !\rt_alu[17]~10_combout & ( !\rt_alu[5]~51_combout & ( (!\rt_alu[17]~11_combout & \REGS|Mux58~6_combout ) ) ) ) + + .dataa(!\REGS|Mux58~5_combout ), + .datab(!\rt_alu[17]~11_combout ), + .datac(!\REGS|Mux58~6_combout ), + .datad(!\rt_alu[5]~49_combout ), + .datae(!\rt_alu[17]~10_combout ), + .dataf(!\rt_alu[5]~51_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[5]~52_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[5]~52 .extended_lut = "off"; +defparam \rt_alu[5]~52 .lut_mask = 64'h0C0C44773F3F4477; +defparam \rt_alu[5]~52 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y11_N42 +cyclonev_lcell_comb \ALU|adder_unit|operand[5]~3 ( +// Equation(s): +// \ALU|adder_unit|operand[5]~3_combout = ( \rt_alu[5]~52_combout & ( \rt_alu[5]~57_combout & ( !\CONTROL_UNIT|ALU_FN [1] $ (((!\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout ) # (\rt_alu[5]~53_combout ))) ) ) ) # ( !\rt_alu[5]~52_combout & ( +// \rt_alu[5]~57_combout & ( !\CONTROL_UNIT|ALU_FN [1] $ ((((!\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout & \ROM|mem~9_combout )) # (\rt_alu[5]~53_combout ))) ) ) ) # ( \rt_alu[5]~52_combout & ( !\rt_alu[5]~57_combout & ( !\CONTROL_UNIT|ALU_FN [1] $ +// ((((!\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout & !\ROM|mem~9_combout )) # (\rt_alu[5]~53_combout ))) ) ) ) # ( !\rt_alu[5]~52_combout & ( !\rt_alu[5]~57_combout & ( !\rt_alu[5]~53_combout $ (\CONTROL_UNIT|ALU_FN [1]) ) ) ) + + .dataa(!\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout ), + .datab(!\ROM|mem~9_combout ), + .datac(!\rt_alu[5]~53_combout ), + .datad(!\CONTROL_UNIT|ALU_FN [1]), + .datae(!\rt_alu[5]~52_combout ), + .dataf(!\rt_alu[5]~57_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\ALU|adder_unit|operand[5]~3_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \ALU|adder_unit|operand[5]~3 .extended_lut = "off"; +defparam \ALU|adder_unit|operand[5]~3 .lut_mask = 64'hF00F708FD02F50AF; +defparam \ALU|adder_unit|operand[5]~3 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y11_N27 +cyclonev_lcell_comb \ALU|Mux25~1 ( +// Equation(s): +// \ALU|Mux25~1_combout = ( \ALU|adder_unit|OUT_1 [6] & ( !\ALU|Mux25~0_combout & ( \ALU|Mux29~0_combout ) ) ) # ( !\ALU|adder_unit|OUT_1 [6] & ( !\ALU|Mux25~0_combout ) ) + + .dataa(!\ALU|Mux29~0_combout ), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(!\ALU|adder_unit|OUT_1 [6]), + .dataf(!\ALU|Mux25~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\ALU|Mux25~1_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \ALU|Mux25~1 .extended_lut = "off"; +defparam \ALU|Mux25~1 .lut_mask = 64'hFFFF555500000000; +defparam \ALU|Mux25~1 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X40_Y12_N9 +cyclonev_lcell_comb \rd[6]~438 ( +// Equation(s): +// \rd[6]~438_combout = ( !\ALU|Mux25~1_combout & ( !\CONTROL_UNIT|M2R[0]~0_combout ) ) + + .dataa(gnd), + .datab(gnd), + .datac(!\CONTROL_UNIT|M2R[0]~0_combout ), + .datad(gnd), + .datae(gnd), + .dataf(!\ALU|Mux25~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[6]~438_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[6]~438 .extended_lut = "off"; +defparam \rd[6]~438 .lut_mask = 64'hF0F0F0F000000000; +defparam \rd[6]~438 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y14_N48 +cyclonev_lcell_comb \REGS|regs[16][6]~feeder ( +// Equation(s): +// \REGS|regs[16][6]~feeder_combout = ( \rd[6]~438_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[6]~438_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[16][6]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[16][6]~feeder .extended_lut = "off"; +defparam \REGS|regs[16][6]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[16][6]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X37_Y14_N49 +dffeas \REGS|regs[16][6] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[16][6]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~2_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[16][6]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[16][6] .is_wysiwyg = "true"; +defparam \REGS|regs[16][6] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X38_Y11_N47 +dffeas \REGS|regs[17][6]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[6]~438_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~11_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[17][6]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[17][6]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[17][6]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X38_Y11_N30 +cyclonev_lcell_comb \rt_alu[6]~29 ( +// Equation(s): +// \rt_alu[6]~29_combout = ( \ROM|mem~10_combout & ( \REGS|regs[16][6]~q ) ) # ( !\ROM|mem~10_combout & ( (!\ROM|mem~0_combout & (\REGS|regs[16][6]~q )) # (\ROM|mem~0_combout & ((\REGS|regs[17][6]~DUPLICATE_q ))) ) ) + + .dataa(!\ROM|mem~0_combout ), + .datab(gnd), + .datac(!\REGS|regs[16][6]~q ), + .datad(!\REGS|regs[17][6]~DUPLICATE_q ), + .datae(gnd), + .dataf(!\ROM|mem~10_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[6]~29_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[6]~29 .extended_lut = "off"; +defparam \rt_alu[6]~29 .lut_mask = 64'h0A5F0A5F0F0F0F0F; +defparam \rt_alu[6]~29 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X38_Y15_N42 +cyclonev_lcell_comb \REGS|regs[27][6]~feeder ( +// Equation(s): +// \REGS|regs[27][6]~feeder_combout = ( \rd[6]~438_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[6]~438_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[27][6]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[27][6]~feeder .extended_lut = "off"; +defparam \REGS|regs[27][6]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[27][6]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X38_Y15_N44 +dffeas \REGS|regs[27][6] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[27][6]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~15_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[27][6]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[27][6] .is_wysiwyg = "true"; +defparam \REGS|regs[27][6] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X37_Y16_N25 +dffeas \REGS|regs[19][6] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[6]~438_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~14_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[19][6]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[19][6] .is_wysiwyg = "true"; +defparam \REGS|regs[19][6] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X38_Y15_N24 +cyclonev_lcell_comb \REGS|Mux57~5 ( +// Equation(s): +// \REGS|Mux57~5_combout = ( \PC|pc [9] & ( \PC|pc[8]~DUPLICATE_q & ( \REGS|regs[19][6]~q ) ) ) # ( !\PC|pc [9] & ( \PC|pc[8]~DUPLICATE_q & ( \REGS|regs[19][6]~q ) ) ) # ( \PC|pc [9] & ( !\PC|pc[8]~DUPLICATE_q & ( \REGS|regs[19][6]~q ) ) ) # ( !\PC|pc +// [9] & ( !\PC|pc[8]~DUPLICATE_q & ( (!\PC|pc [6] & ((!\PC|pc [7] & (\REGS|regs[27][6]~q )) # (\PC|pc [7] & ((\REGS|regs[19][6]~q ))))) # (\PC|pc [6] & (((\REGS|regs[19][6]~q )))) ) ) ) + + .dataa(!\PC|pc [6]), + .datab(!\REGS|regs[27][6]~q ), + .datac(!\PC|pc [7]), + .datad(!\REGS|regs[19][6]~q ), + .datae(!\PC|pc [9]), + .dataf(!\PC|pc[8]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux57~5_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux57~5 .extended_lut = "off"; +defparam \REGS|Mux57~5 .lut_mask = 64'h207F00FF00FF00FF; +defparam \REGS|Mux57~5 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X37_Y13_N40 +dffeas \REGS|regs[28][6] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[6]~438_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~8_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[28][6]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[28][6] .is_wysiwyg = "true"; +defparam \REGS|regs[28][6] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X38_Y11_N11 +dffeas \REGS|regs[29][6] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[6]~438_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~17_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[29][6]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[29][6] .is_wysiwyg = "true"; +defparam \REGS|regs[29][6] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X37_Y13_N22 +dffeas \REGS|regs[20][6] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[6]~438_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~7_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[20][6]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[20][6] .is_wysiwyg = "true"; +defparam \REGS|regs[20][6] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X38_Y11_N12 +cyclonev_lcell_comb \rt_alu[6]~27 ( +// Equation(s): +// \rt_alu[6]~27_combout = ( \REGS|regs[20][6]~q & ( \ROM|mem~10_combout & ( (!\ROM|mem~0_combout ) # (\REGS|regs[28][6]~q ) ) ) ) # ( !\REGS|regs[20][6]~q & ( \ROM|mem~10_combout & ( (\REGS|regs[28][6]~q & \ROM|mem~0_combout ) ) ) ) # ( +// \REGS|regs[20][6]~q & ( !\ROM|mem~10_combout & ( (!\ROM|mem~0_combout ) # (\REGS|regs[29][6]~q ) ) ) ) # ( !\REGS|regs[20][6]~q & ( !\ROM|mem~10_combout & ( (\ROM|mem~0_combout & \REGS|regs[29][6]~q ) ) ) ) + + .dataa(!\REGS|regs[28][6]~q ), + .datab(gnd), + .datac(!\ROM|mem~0_combout ), + .datad(!\REGS|regs[29][6]~q ), + .datae(!\REGS|regs[20][6]~q ), + .dataf(!\ROM|mem~10_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[6]~27_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[6]~27 .extended_lut = "off"; +defparam \rt_alu[6]~27 .lut_mask = 64'h000FF0FF0505F5F5; +defparam \rt_alu[6]~27 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X38_Y11_N6 +cyclonev_lcell_comb \rt_alu[6]~28 ( +// Equation(s): +// \rt_alu[6]~28_combout = ( \ROM|mem~13_combout & ( \REGS|Mux57~6_combout & ( (\ROM|mem~12_combout ) # (\rt_alu[6]~27_combout ) ) ) ) # ( !\ROM|mem~13_combout & ( \REGS|Mux57~6_combout & ( (!\ROM|mem~12_combout & ((\rt_alu[6]~27_combout ))) # +// (\ROM|mem~12_combout & (\REGS|Mux57~7_combout )) ) ) ) # ( \ROM|mem~13_combout & ( !\REGS|Mux57~6_combout & ( (\rt_alu[6]~27_combout & !\ROM|mem~12_combout ) ) ) ) # ( !\ROM|mem~13_combout & ( !\REGS|Mux57~6_combout & ( (!\ROM|mem~12_combout & +// ((\rt_alu[6]~27_combout ))) # (\ROM|mem~12_combout & (\REGS|Mux57~7_combout )) ) ) ) + + .dataa(!\REGS|Mux57~7_combout ), + .datab(!\rt_alu[6]~27_combout ), + .datac(gnd), + .datad(!\ROM|mem~12_combout ), + .datae(!\ROM|mem~13_combout ), + .dataf(!\REGS|Mux57~6_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[6]~28_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[6]~28 .extended_lut = "off"; +defparam \rt_alu[6]~28 .lut_mask = 64'h33553300335533FF; +defparam \rt_alu[6]~28 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X38_Y11_N54 +cyclonev_lcell_comb \rt_alu[6]~30 ( +// Equation(s): +// \rt_alu[6]~30_combout = ( \rt_alu[17]~4_combout & ( \rt_alu[6]~28_combout & ( (!\rt_alu[17]~5_combout ) # (\REGS|Mux57~4_combout ) ) ) ) # ( !\rt_alu[17]~4_combout & ( \rt_alu[6]~28_combout & ( (!\rt_alu[17]~5_combout & (\rt_alu[6]~29_combout )) # +// (\rt_alu[17]~5_combout & ((\REGS|Mux57~5_combout ))) ) ) ) # ( \rt_alu[17]~4_combout & ( !\rt_alu[6]~28_combout & ( (\rt_alu[17]~5_combout & \REGS|Mux57~4_combout ) ) ) ) # ( !\rt_alu[17]~4_combout & ( !\rt_alu[6]~28_combout & ( +// (!\rt_alu[17]~5_combout & (\rt_alu[6]~29_combout )) # (\rt_alu[17]~5_combout & ((\REGS|Mux57~5_combout ))) ) ) ) + + .dataa(!\rt_alu[17]~5_combout ), + .datab(!\rt_alu[6]~29_combout ), + .datac(!\REGS|Mux57~4_combout ), + .datad(!\REGS|Mux57~5_combout ), + .datae(!\rt_alu[17]~4_combout ), + .dataf(!\rt_alu[6]~28_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[6]~30_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[6]~30 .extended_lut = "off"; +defparam \rt_alu[6]~30 .lut_mask = 64'h227705052277AFAF; +defparam \rt_alu[6]~30 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X36_Y14_N41 +dffeas \REGS|regs[8][6] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[8][6]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~24_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[8][6]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[8][6] .is_wysiwyg = "true"; +defparam \REGS|regs[8][6] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X36_Y14_N0 +cyclonev_lcell_comb \REGS|Mux57~1 ( +// Equation(s): +// \REGS|Mux57~1_combout = ( !\PC|pc[8]~DUPLICATE_q & ( !\PC|pc [9] & ( (!\PC|pc[6]~DUPLICATE_q & (!\PC|pc [7] & \REGS|regs[8][6]~q )) ) ) ) + + .dataa(gnd), + .datab(!\PC|pc[6]~DUPLICATE_q ), + .datac(!\PC|pc [7]), + .datad(!\REGS|regs[8][6]~q ), + .datae(!\PC|pc[8]~DUPLICATE_q ), + .dataf(!\PC|pc [9]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux57~1_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux57~1 .extended_lut = "off"; +defparam \REGS|Mux57~1 .lut_mask = 64'h00C0000000000000; +defparam \REGS|Mux57~1 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X37_Y5_N2 +dffeas \REGS|regs[11][6] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[6]~438_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~37_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[11][6]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[11][6] .is_wysiwyg = "true"; +defparam \REGS|regs[11][6] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X37_Y5_N35 +dffeas \REGS|regs[10][6]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[6]~438_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~33_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[10][6]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[10][6]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[10][6]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: FF_X37_Y5_N41 +dffeas \REGS|regs[2][6]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[6]~438_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~32_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[2][6]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[2][6]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[2][6]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y5_N24 +cyclonev_lcell_comb \rt_alu[6]~23 ( +// Equation(s): +// \rt_alu[6]~23_combout = ( \ROM|mem~10_combout & ( \ROM|mem~0_combout & ( \REGS|regs[10][6]~DUPLICATE_q ) ) ) # ( !\ROM|mem~10_combout & ( \ROM|mem~0_combout & ( \REGS|regs[11][6]~q ) ) ) # ( \ROM|mem~10_combout & ( !\ROM|mem~0_combout & ( +// \REGS|regs[2][6]~DUPLICATE_q ) ) ) # ( !\ROM|mem~10_combout & ( !\ROM|mem~0_combout & ( \REGS|regs[2][6]~DUPLICATE_q ) ) ) + + .dataa(!\REGS|regs[11][6]~q ), + .datab(gnd), + .datac(!\REGS|regs[10][6]~DUPLICATE_q ), + .datad(!\REGS|regs[2][6]~DUPLICATE_q ), + .datae(!\ROM|mem~10_combout ), + .dataf(!\ROM|mem~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[6]~23_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[6]~23 .extended_lut = "off"; +defparam \rt_alu[6]~23 .lut_mask = 64'h00FF00FF55550F0F; +defparam \rt_alu[6]~23 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X35_Y14_N35 +dffeas \REGS|regs[9][6] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[9][6]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~29_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[9][6]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[9][6] .is_wysiwyg = "true"; +defparam \REGS|regs[9][6] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X31_Y13_N44 +dffeas \REGS|regs[1][6] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[6]~438_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~28_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[1][6]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[1][6] .is_wysiwyg = "true"; +defparam \REGS|regs[1][6] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X35_Y14_N48 +cyclonev_lcell_comb \REGS|Mux57~0 ( +// Equation(s): +// \REGS|Mux57~0_combout = ( \PC|pc[7]~DUPLICATE_q & ( \REGS|regs[1][6]~q ) ) # ( !\PC|pc[7]~DUPLICATE_q & ( \REGS|regs[1][6]~q & ( (((\PC|pc [9]) # (\PC|pc[8]~DUPLICATE_q )) # (\PC|pc[6]~DUPLICATE_q )) # (\REGS|regs[9][6]~q ) ) ) ) # ( +// !\PC|pc[7]~DUPLICATE_q & ( !\REGS|regs[1][6]~q & ( (\REGS|regs[9][6]~q & (!\PC|pc[6]~DUPLICATE_q & (!\PC|pc[8]~DUPLICATE_q & !\PC|pc [9]))) ) ) ) + + .dataa(!\REGS|regs[9][6]~q ), + .datab(!\PC|pc[6]~DUPLICATE_q ), + .datac(!\PC|pc[8]~DUPLICATE_q ), + .datad(!\PC|pc [9]), + .datae(!\PC|pc[7]~DUPLICATE_q ), + .dataf(!\REGS|regs[1][6]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux57~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux57~0 .extended_lut = "off"; +defparam \REGS|Mux57~0 .lut_mask = 64'h400000007FFFFFFF; +defparam \REGS|Mux57~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X32_Y13_N38 +dffeas \REGS|regs[6][6] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[6]~438_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~34_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[6][6]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[6][6] .is_wysiwyg = "true"; +defparam \REGS|regs[6][6] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X32_Y13_N56 +dffeas \REGS|regs[14][6] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[6]~438_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~35_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[14][6]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[14][6] .is_wysiwyg = "true"; +defparam \REGS|regs[14][6] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y13_N48 +cyclonev_lcell_comb \REGS|regs[15][6]~feeder ( +// Equation(s): +// \REGS|regs[15][6]~feeder_combout = ( \rd[6]~438_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[6]~438_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[15][6]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[15][6]~feeder .extended_lut = "off"; +defparam \REGS|regs[15][6]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[15][6]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X32_Y13_N49 +dffeas \REGS|regs[15][6] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[15][6]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~39_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[15][6]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[15][6] .is_wysiwyg = "true"; +defparam \REGS|regs[15][6] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y13_N42 +cyclonev_lcell_comb \rt_alu[6]~24 ( +// Equation(s): +// \rt_alu[6]~24_combout = ( \ROM|mem~10_combout & ( \ROM|mem~0_combout & ( \REGS|regs[14][6]~q ) ) ) # ( !\ROM|mem~10_combout & ( \ROM|mem~0_combout & ( \REGS|regs[15][6]~q ) ) ) # ( \ROM|mem~10_combout & ( !\ROM|mem~0_combout & ( +// \REGS|regs[6][6]~q ) ) ) # ( !\ROM|mem~10_combout & ( !\ROM|mem~0_combout & ( \REGS|regs[6][6]~q ) ) ) + + .dataa(!\REGS|regs[6][6]~q ), + .datab(gnd), + .datac(!\REGS|regs[14][6]~q ), + .datad(!\REGS|regs[15][6]~q ), + .datae(!\ROM|mem~10_combout ), + .dataf(!\ROM|mem~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[6]~24_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[6]~24 .extended_lut = "off"; +defparam \rt_alu[6]~24 .lut_mask = 64'h5555555500FF0F0F; +defparam \rt_alu[6]~24 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X38_Y11_N51 +cyclonev_lcell_comb \rt_alu[6]~25 ( +// Equation(s): +// \rt_alu[6]~25_combout = ( \rt_alu[6]~24_combout & ( ((!\ROM|mem~13_combout & ((\REGS|Mux57~3_combout ))) # (\ROM|mem~13_combout & (\REGS|Mux57~2_combout ))) # (\ROM|mem~12_combout ) ) ) # ( !\rt_alu[6]~24_combout & ( (!\ROM|mem~12_combout & +// ((!\ROM|mem~13_combout & ((\REGS|Mux57~3_combout ))) # (\ROM|mem~13_combout & (\REGS|Mux57~2_combout )))) ) ) + + .dataa(!\ROM|mem~13_combout ), + .datab(!\ROM|mem~12_combout ), + .datac(!\REGS|Mux57~2_combout ), + .datad(!\REGS|Mux57~3_combout ), + .datae(gnd), + .dataf(!\rt_alu[6]~24_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[6]~25_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[6]~25 .extended_lut = "off"; +defparam \rt_alu[6]~25 .lut_mask = 64'h048C048C37BF37BF; +defparam \rt_alu[6]~25 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X38_Y11_N24 +cyclonev_lcell_comb \rt_alu[6]~26 ( +// Equation(s): +// \rt_alu[6]~26_combout = ( \REGS|Mux57~0_combout & ( \rt_alu[6]~25_combout & ( (!\rt_alu[17]~11_combout & (((\rt_alu[17]~10_combout )) # (\REGS|Mux57~1_combout ))) # (\rt_alu[17]~11_combout & (((!\rt_alu[17]~10_combout ) # (\rt_alu[6]~23_combout )))) +// ) ) ) # ( !\REGS|Mux57~0_combout & ( \rt_alu[6]~25_combout & ( (!\rt_alu[17]~11_combout & (\REGS|Mux57~1_combout & ((!\rt_alu[17]~10_combout )))) # (\rt_alu[17]~11_combout & (((!\rt_alu[17]~10_combout ) # (\rt_alu[6]~23_combout )))) ) ) ) # ( +// \REGS|Mux57~0_combout & ( !\rt_alu[6]~25_combout & ( (!\rt_alu[17]~11_combout & (((\rt_alu[17]~10_combout )) # (\REGS|Mux57~1_combout ))) # (\rt_alu[17]~11_combout & (((\rt_alu[6]~23_combout & \rt_alu[17]~10_combout )))) ) ) ) # ( +// !\REGS|Mux57~0_combout & ( !\rt_alu[6]~25_combout & ( (!\rt_alu[17]~11_combout & (\REGS|Mux57~1_combout & ((!\rt_alu[17]~10_combout )))) # (\rt_alu[17]~11_combout & (((\rt_alu[6]~23_combout & \rt_alu[17]~10_combout )))) ) ) ) + + .dataa(!\rt_alu[17]~11_combout ), + .datab(!\REGS|Mux57~1_combout ), + .datac(!\rt_alu[6]~23_combout ), + .datad(!\rt_alu[17]~10_combout ), + .datae(!\REGS|Mux57~0_combout ), + .dataf(!\rt_alu[6]~25_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[6]~26_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[6]~26 .extended_lut = "off"; +defparam \rt_alu[6]~26 .lut_mask = 64'h220522AF770577AF; +defparam \rt_alu[6]~26 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y11_N30 +cyclonev_lcell_comb \rt_alu[6]~31 ( +// Equation(s): +// \rt_alu[6]~31_combout = ( \rt_alu[6]~26_combout & ( (!\ROM|mem~9_combout & (!\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout )) # (\ROM|mem~9_combout & ((\rt_alu[6]~30_combout ) # (\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout ))) ) ) # ( !\rt_alu[6]~26_combout +// & ( (\ROM|mem~9_combout & ((\rt_alu[6]~30_combout ) # (\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout ))) ) ) + + .dataa(gnd), + .datab(!\ROM|mem~9_combout ), + .datac(!\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout ), + .datad(!\rt_alu[6]~30_combout ), + .datae(gnd), + .dataf(!\rt_alu[6]~26_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[6]~31_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[6]~31 .extended_lut = "off"; +defparam \rt_alu[6]~31 .lut_mask = 64'h03330333C3F3C3F3; +defparam \rt_alu[6]~31 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X43_Y11_N42 +cyclonev_lcell_comb \ALU|Mux24~1 ( +// Equation(s): +// \ALU|Mux24~1_combout = ( \ALU|adder_unit|OUT_1 [7] & ( (!\ALU|Mux24~0_combout & \ALU|Mux29~0_combout ) ) ) # ( !\ALU|adder_unit|OUT_1 [7] & ( !\ALU|Mux24~0_combout ) ) + + .dataa(gnd), + .datab(gnd), + .datac(!\ALU|Mux24~0_combout ), + .datad(!\ALU|Mux29~0_combout ), + .datae(gnd), + .dataf(!\ALU|adder_unit|OUT_1 [7]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\ALU|Mux24~1_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \ALU|Mux24~1 .extended_lut = "off"; +defparam \ALU|Mux24~1 .lut_mask = 64'hF0F0F0F000F000F0; +defparam \ALU|Mux24~1 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X40_Y12_N33 +cyclonev_lcell_comb \rd[7]~440 ( +// Equation(s): +// \rd[7]~440_combout = ( !\ALU|Mux24~1_combout & ( !\CONTROL_UNIT|M2R[0]~0_combout ) ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(!\CONTROL_UNIT|M2R[0]~0_combout ), + .datae(gnd), + .dataf(!\ALU|Mux24~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[7]~440_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[7]~440 .extended_lut = "off"; +defparam \rd[7]~440 .lut_mask = 64'hFF00FF0000000000; +defparam \rd[7]~440 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X36_Y11_N31 +dffeas \REGS|regs[19][7] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[7]~440_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~14_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[19][7]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[19][7] .is_wysiwyg = "true"; +defparam \REGS|regs[19][7] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X33_Y13_N39 +cyclonev_lcell_comb \REGS|regs[27][7]~feeder ( +// Equation(s): +// \REGS|regs[27][7]~feeder_combout = ( \rd[7]~440_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[7]~440_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[27][7]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[27][7]~feeder .extended_lut = "off"; +defparam \REGS|regs[27][7]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[27][7]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X33_Y13_N40 +dffeas \REGS|regs[27][7] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[27][7]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~15_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[27][7]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[27][7] .is_wysiwyg = "true"; +defparam \REGS|regs[27][7] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X36_Y11_N33 +cyclonev_lcell_comb \REGS|Mux56~7 ( +// Equation(s): +// \REGS|Mux56~7_combout = ( \PC|pc[8]~DUPLICATE_q & ( \REGS|regs[27][7]~q & ( \REGS|regs[19][7]~q ) ) ) # ( !\PC|pc[8]~DUPLICATE_q & ( \REGS|regs[27][7]~q & ( ((!\PC|pc [7] & (!\PC|pc [9] & !\PC|pc [6]))) # (\REGS|regs[19][7]~q ) ) ) ) # ( +// \PC|pc[8]~DUPLICATE_q & ( !\REGS|regs[27][7]~q & ( \REGS|regs[19][7]~q ) ) ) # ( !\PC|pc[8]~DUPLICATE_q & ( !\REGS|regs[27][7]~q & ( (\REGS|regs[19][7]~q & (((\PC|pc [6]) # (\PC|pc [9])) # (\PC|pc [7]))) ) ) ) + + .dataa(!\REGS|regs[19][7]~q ), + .datab(!\PC|pc [7]), + .datac(!\PC|pc [9]), + .datad(!\PC|pc [6]), + .datae(!\PC|pc[8]~DUPLICATE_q ), + .dataf(!\REGS|regs[27][7]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux56~7_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux56~7 .extended_lut = "off"; +defparam \REGS|Mux56~7 .lut_mask = 64'h15555555D5555555; +defparam \REGS|Mux56~7 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X35_Y12_N9 +cyclonev_lcell_comb \REGS|regs[16][7]~feeder ( +// Equation(s): +// \REGS|regs[16][7]~feeder_combout = ( \rd[7]~440_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[7]~440_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[16][7]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[16][7]~feeder .extended_lut = "off"; +defparam \REGS|regs[16][7]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[16][7]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X35_Y12_N11 +dffeas \REGS|regs[16][7]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[16][7]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~2_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[16][7]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[16][7]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[16][7]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X35_Y12_N15 +cyclonev_lcell_comb \REGS|regs[17][7]~feeder ( +// Equation(s): +// \REGS|regs[17][7]~feeder_combout = ( \rd[7]~440_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[7]~440_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[17][7]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[17][7]~feeder .extended_lut = "off"; +defparam \REGS|regs[17][7]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[17][7]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X35_Y12_N17 +dffeas \REGS|regs[17][7] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[17][7]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~11_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[17][7]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[17][7] .is_wysiwyg = "true"; +defparam \REGS|regs[17][7] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X35_Y12_N45 +cyclonev_lcell_comb \rt_alu[7]~20 ( +// Equation(s): +// \rt_alu[7]~20_combout = ( \ROM|mem~10_combout & ( \ROM|mem~0_combout & ( \REGS|regs[16][7]~DUPLICATE_q ) ) ) # ( !\ROM|mem~10_combout & ( \ROM|mem~0_combout & ( \REGS|regs[17][7]~q ) ) ) # ( \ROM|mem~10_combout & ( !\ROM|mem~0_combout & ( +// \REGS|regs[16][7]~DUPLICATE_q ) ) ) # ( !\ROM|mem~10_combout & ( !\ROM|mem~0_combout & ( \REGS|regs[16][7]~DUPLICATE_q ) ) ) + + .dataa(gnd), + .datab(!\REGS|regs[16][7]~DUPLICATE_q ), + .datac(!\REGS|regs[17][7]~q ), + .datad(gnd), + .datae(!\ROM|mem~10_combout ), + .dataf(!\ROM|mem~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[7]~20_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[7]~20 .extended_lut = "off"; +defparam \rt_alu[7]~20 .lut_mask = 64'h333333330F0F3333; +defparam \rt_alu[7]~20 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X36_Y11_N29 +dffeas \REGS|regs[29][7] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[7]~440_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~17_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[29][7]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[29][7] .is_wysiwyg = "true"; +defparam \REGS|regs[29][7] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X35_Y6_N34 +dffeas \REGS|regs[28][7] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[7]~440_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~8_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[28][7]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[28][7] .is_wysiwyg = "true"; +defparam \REGS|regs[28][7] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X37_Y12_N49 +dffeas \REGS|regs[20][7] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[7]~440_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~7_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[20][7]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[20][7] .is_wysiwyg = "true"; +defparam \REGS|regs[20][7] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X36_Y11_N0 +cyclonev_lcell_comb \rt_alu[7]~18 ( +// Equation(s): +// \rt_alu[7]~18_combout = ( \REGS|regs[20][7]~q & ( (!\ROM|mem~0_combout ) # ((!\ROM|mem~10_combout & (\REGS|regs[29][7]~q )) # (\ROM|mem~10_combout & ((\REGS|regs[28][7]~q )))) ) ) # ( !\REGS|regs[20][7]~q & ( (\ROM|mem~0_combout & +// ((!\ROM|mem~10_combout & (\REGS|regs[29][7]~q )) # (\ROM|mem~10_combout & ((\REGS|regs[28][7]~q ))))) ) ) + + .dataa(!\ROM|mem~0_combout ), + .datab(!\ROM|mem~10_combout ), + .datac(!\REGS|regs[29][7]~q ), + .datad(!\REGS|regs[28][7]~q ), + .datae(gnd), + .dataf(!\REGS|regs[20][7]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[7]~18_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[7]~18 .extended_lut = "off"; +defparam \rt_alu[7]~18 .lut_mask = 64'h04150415AEBFAEBF; +defparam \rt_alu[7]~18 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X36_Y11_N12 +cyclonev_lcell_comb \rt_alu[7]~19 ( +// Equation(s): +// \rt_alu[7]~19_combout = ( \rt_alu[7]~18_combout & ( \REGS|Mux56~2_combout & ( (!\ROM|mem~12_combout ) # ((!\ROM|mem~13_combout ) # (\REGS|Mux56~3_combout )) ) ) ) # ( !\rt_alu[7]~18_combout & ( \REGS|Mux56~2_combout & ( (\ROM|mem~12_combout & +// ((!\ROM|mem~13_combout ) # (\REGS|Mux56~3_combout ))) ) ) ) # ( \rt_alu[7]~18_combout & ( !\REGS|Mux56~2_combout & ( (!\ROM|mem~12_combout ) # ((\ROM|mem~13_combout & \REGS|Mux56~3_combout )) ) ) ) # ( !\rt_alu[7]~18_combout & ( !\REGS|Mux56~2_combout +// & ( (\ROM|mem~12_combout & (\ROM|mem~13_combout & \REGS|Mux56~3_combout )) ) ) ) + + .dataa(!\ROM|mem~12_combout ), + .datab(gnd), + .datac(!\ROM|mem~13_combout ), + .datad(!\REGS|Mux56~3_combout ), + .datae(!\rt_alu[7]~18_combout ), + .dataf(!\REGS|Mux56~2_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[7]~19_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[7]~19 .extended_lut = "off"; +defparam \rt_alu[7]~19 .lut_mask = 64'h0005AAAF5055FAFF; +defparam \rt_alu[7]~19 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X36_Y11_N42 +cyclonev_lcell_comb \rt_alu[7]~21 ( +// Equation(s): +// \rt_alu[7]~21_combout = ( \REGS|Mux56~4_combout & ( \rt_alu[7]~19_combout & ( ((!\rt_alu[17]~5_combout & ((\rt_alu[7]~20_combout ))) # (\rt_alu[17]~5_combout & (\REGS|Mux56~7_combout ))) # (\rt_alu[17]~4_combout ) ) ) ) # ( !\REGS|Mux56~4_combout & +// ( \rt_alu[7]~19_combout & ( (!\rt_alu[17]~5_combout & (((\rt_alu[17]~4_combout ) # (\rt_alu[7]~20_combout )))) # (\rt_alu[17]~5_combout & (\REGS|Mux56~7_combout & ((!\rt_alu[17]~4_combout )))) ) ) ) # ( \REGS|Mux56~4_combout & ( +// !\rt_alu[7]~19_combout & ( (!\rt_alu[17]~5_combout & (((\rt_alu[7]~20_combout & !\rt_alu[17]~4_combout )))) # (\rt_alu[17]~5_combout & (((\rt_alu[17]~4_combout )) # (\REGS|Mux56~7_combout ))) ) ) ) # ( !\REGS|Mux56~4_combout & ( +// !\rt_alu[7]~19_combout & ( (!\rt_alu[17]~4_combout & ((!\rt_alu[17]~5_combout & ((\rt_alu[7]~20_combout ))) # (\rt_alu[17]~5_combout & (\REGS|Mux56~7_combout )))) ) ) ) + + .dataa(!\REGS|Mux56~7_combout ), + .datab(!\rt_alu[17]~5_combout ), + .datac(!\rt_alu[7]~20_combout ), + .datad(!\rt_alu[17]~4_combout ), + .datae(!\REGS|Mux56~4_combout ), + .dataf(!\rt_alu[7]~19_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[7]~21_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[7]~21 .extended_lut = "off"; +defparam \rt_alu[7]~21 .lut_mask = 64'h1D001D331DCC1DFF; +defparam \rt_alu[7]~21 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y11_N57 +cyclonev_lcell_comb \ALU|adder_unit|operand[7]~1 ( +// Equation(s): +// \ALU|adder_unit|operand[7]~1_combout = ( \rt_alu[7]~17_combout & ( !\CONTROL_UNIT|ALU_FN [1] $ (((!\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout & ((!\ROM|mem~9_combout ) # (\rt_alu[7]~21_combout ))) # (\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout & +// (\ROM|mem~9_combout )))) ) ) # ( !\rt_alu[7]~17_combout & ( !\CONTROL_UNIT|ALU_FN [1] $ (((\ROM|mem~9_combout & ((\rt_alu[7]~21_combout ) # (\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout ))))) ) ) + + .dataa(!\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout ), + .datab(!\ROM|mem~9_combout ), + .datac(!\CONTROL_UNIT|ALU_FN [1]), + .datad(!\rt_alu[7]~21_combout ), + .datae(gnd), + .dataf(!\rt_alu[7]~17_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\ALU|adder_unit|operand[7]~1_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \ALU|adder_unit|operand[7]~1 .extended_lut = "off"; +defparam \ALU|adder_unit|operand[7]~1 .lut_mask = 64'hE1C3E1C3694B694B; +defparam \ALU|adder_unit|operand[7]~1 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X33_Y5_N24 +cyclonev_lcell_comb \rd[8]~442 ( +// Equation(s): +// \rd[8]~442_combout = ( \ALU|Mux23~0_combout & ( \ALU|adder_unit|OUT_1 [8] & ( !\CONTROL_UNIT|M2R[0]~0_combout ) ) ) # ( !\ALU|Mux23~0_combout & ( \ALU|adder_unit|OUT_1 [8] & ( (!\CONTROL_UNIT|M2R[0]~0_combout & !\ALU|Mux29~0_combout ) ) ) ) # ( +// \ALU|Mux23~0_combout & ( !\ALU|adder_unit|OUT_1 [8] & ( !\CONTROL_UNIT|M2R[0]~0_combout ) ) ) + + .dataa(!\CONTROL_UNIT|M2R[0]~0_combout ), + .datab(gnd), + .datac(!\ALU|Mux29~0_combout ), + .datad(gnd), + .datae(!\ALU|Mux23~0_combout ), + .dataf(!\ALU|adder_unit|OUT_1 [8]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[8]~442_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[8]~442 .extended_lut = "off"; +defparam \rd[8]~442 .lut_mask = 64'h0000AAAAA0A0AAAA; +defparam \rd[8]~442 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X35_Y11_N2 +dffeas \REGS|regs[9][8]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[8]~442_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~29_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[9][8]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[9][8]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[9][8]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: FF_X31_Y13_N1 +dffeas \REGS|regs[1][8] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[8]~442_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~28_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[1][8]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[1][8] .is_wysiwyg = "true"; +defparam \REGS|regs[1][8] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X35_Y11_N3 +cyclonev_lcell_comb \REGS|Mux55~0 ( +// Equation(s): +// \REGS|Mux55~0_combout = ( \REGS|regs[9][8]~DUPLICATE_q & ( \REGS|regs[1][8]~q ) ) # ( !\REGS|regs[9][8]~DUPLICATE_q & ( \REGS|regs[1][8]~q & ( (((\PC|pc [8]) # (\PC|pc [9])) # (\PC|pc [7])) # (\PC|pc[6]~DUPLICATE_q ) ) ) ) # ( +// \REGS|regs[9][8]~DUPLICATE_q & ( !\REGS|regs[1][8]~q & ( (!\PC|pc[6]~DUPLICATE_q & (!\PC|pc [7] & (!\PC|pc [9] & !\PC|pc [8]))) ) ) ) + + .dataa(!\PC|pc[6]~DUPLICATE_q ), + .datab(!\PC|pc [7]), + .datac(!\PC|pc [9]), + .datad(!\PC|pc [8]), + .datae(!\REGS|regs[9][8]~DUPLICATE_q ), + .dataf(!\REGS|regs[1][8]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux55~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux55~0 .extended_lut = "off"; +defparam \REGS|Mux55~0 .lut_mask = 64'h000080007FFFFFFF; +defparam \REGS|Mux55~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X36_Y14_N21 +cyclonev_lcell_comb \REGS|Mux55~1 ( +// Equation(s): +// \REGS|Mux55~1_combout = ( \REGS|regs[8][8]~q & ( !\PC|pc [9] & ( (!\PC|pc[6]~DUPLICATE_q & (!\PC|pc[8]~DUPLICATE_q & !\PC|pc [7])) ) ) ) + + .dataa(gnd), + .datab(!\PC|pc[6]~DUPLICATE_q ), + .datac(!\PC|pc[8]~DUPLICATE_q ), + .datad(!\PC|pc [7]), + .datae(!\REGS|regs[8][8]~q ), + .dataf(!\PC|pc [9]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux55~1_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux55~1 .extended_lut = "off"; +defparam \REGS|Mux55~1 .lut_mask = 64'h0000C00000000000; +defparam \REGS|Mux55~1 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X35_Y11_N38 +dffeas \REGS|regs[11][8] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[8]~442_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~37_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[11][8]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[11][8] .is_wysiwyg = "true"; +defparam \REGS|regs[11][8] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X30_Y9_N54 +cyclonev_lcell_comb \REGS|regs[2][8]~feeder ( +// Equation(s): +// \REGS|regs[2][8]~feeder_combout = ( \rd[8]~442_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[8]~442_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[2][8]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[2][8]~feeder .extended_lut = "off"; +defparam \REGS|regs[2][8]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[2][8]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X30_Y9_N55 +dffeas \REGS|regs[2][8] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[2][8]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~32_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[2][8]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[2][8] .is_wysiwyg = "true"; +defparam \REGS|regs[2][8] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X35_Y7_N37 +dffeas \REGS|regs[10][8] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[8]~442_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~33_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[10][8]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[10][8] .is_wysiwyg = "true"; +defparam \REGS|regs[10][8] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X35_Y11_N18 +cyclonev_lcell_comb \rt_alu[8]~143 ( +// Equation(s): +// \rt_alu[8]~143_combout = ( \ROM|mem~10_combout & ( (!\ROM|mem~0_combout & (\REGS|regs[2][8]~q )) # (\ROM|mem~0_combout & ((\REGS|regs[10][8]~q ))) ) ) # ( !\ROM|mem~10_combout & ( (!\ROM|mem~0_combout & ((\REGS|regs[2][8]~q ))) # (\ROM|mem~0_combout +// & (\REGS|regs[11][8]~q )) ) ) + + .dataa(!\REGS|regs[11][8]~q ), + .datab(!\ROM|mem~0_combout ), + .datac(!\REGS|regs[2][8]~q ), + .datad(!\REGS|regs[10][8]~q ), + .datae(gnd), + .dataf(!\ROM|mem~10_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[8]~143_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[8]~143 .extended_lut = "off"; +defparam \rt_alu[8]~143 .lut_mask = 64'h1D1D1D1D0C3F0C3F; +defparam \rt_alu[8]~143 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X32_Y6_N28 +dffeas \REGS|regs[14][8] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[8]~442_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~35_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[14][8]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[14][8] .is_wysiwyg = "true"; +defparam \REGS|regs[14][8] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X35_Y11_N13 +dffeas \REGS|regs[15][8] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[8]~442_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~39_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[15][8]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[15][8] .is_wysiwyg = "true"; +defparam \REGS|regs[15][8] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X28_Y11_N51 +cyclonev_lcell_comb \REGS|regs[6][8]~feeder ( +// Equation(s): +// \REGS|regs[6][8]~feeder_combout = ( \rd[8]~442_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[8]~442_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[6][8]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[6][8]~feeder .extended_lut = "off"; +defparam \REGS|regs[6][8]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[6][8]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X28_Y11_N52 +dffeas \REGS|regs[6][8] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[6][8]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~34_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[6][8]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[6][8] .is_wysiwyg = "true"; +defparam \REGS|regs[6][8] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X35_Y11_N15 +cyclonev_lcell_comb \rt_alu[8]~144 ( +// Equation(s): +// \rt_alu[8]~144_combout = ( \REGS|regs[6][8]~q & ( \ROM|mem~10_combout & ( (!\ROM|mem~0_combout ) # (\REGS|regs[14][8]~q ) ) ) ) # ( !\REGS|regs[6][8]~q & ( \ROM|mem~10_combout & ( (\ROM|mem~0_combout & \REGS|regs[14][8]~q ) ) ) ) # ( +// \REGS|regs[6][8]~q & ( !\ROM|mem~10_combout & ( (!\ROM|mem~0_combout ) # (\REGS|regs[15][8]~q ) ) ) ) # ( !\REGS|regs[6][8]~q & ( !\ROM|mem~10_combout & ( (\ROM|mem~0_combout & \REGS|regs[15][8]~q ) ) ) ) + + .dataa(gnd), + .datab(!\ROM|mem~0_combout ), + .datac(!\REGS|regs[14][8]~q ), + .datad(!\REGS|regs[15][8]~q ), + .datae(!\REGS|regs[6][8]~q ), + .dataf(!\ROM|mem~10_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[8]~144_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[8]~144 .extended_lut = "off"; +defparam \rt_alu[8]~144 .lut_mask = 64'h0033CCFF0303CFCF; +defparam \rt_alu[8]~144 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X35_Y11_N24 +cyclonev_lcell_comb \rt_alu[8]~145 ( +// Equation(s): +// \rt_alu[8]~145_combout = ( \REGS|Mux55~3_combout & ( \REGS|Mux55~2_combout & ( (!\ROM|mem~12_combout ) # (\rt_alu[8]~144_combout ) ) ) ) # ( !\REGS|Mux55~3_combout & ( \REGS|Mux55~2_combout & ( (!\ROM|mem~12_combout & (\ROM|mem~13_combout )) # +// (\ROM|mem~12_combout & ((\rt_alu[8]~144_combout ))) ) ) ) # ( \REGS|Mux55~3_combout & ( !\REGS|Mux55~2_combout & ( (!\ROM|mem~12_combout & (!\ROM|mem~13_combout )) # (\ROM|mem~12_combout & ((\rt_alu[8]~144_combout ))) ) ) ) # ( !\REGS|Mux55~3_combout +// & ( !\REGS|Mux55~2_combout & ( (\ROM|mem~12_combout & \rt_alu[8]~144_combout ) ) ) ) + + .dataa(!\ROM|mem~12_combout ), + .datab(gnd), + .datac(!\ROM|mem~13_combout ), + .datad(!\rt_alu[8]~144_combout ), + .datae(!\REGS|Mux55~3_combout ), + .dataf(!\REGS|Mux55~2_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[8]~145_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[8]~145 .extended_lut = "off"; +defparam \rt_alu[8]~145 .lut_mask = 64'h0055A0F50A5FAAFF; +defparam \rt_alu[8]~145 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X35_Y11_N6 +cyclonev_lcell_comb \rt_alu[8]~146 ( +// Equation(s): +// \rt_alu[8]~146_combout = ( \rt_alu[17]~10_combout & ( \rt_alu[8]~145_combout & ( (!\rt_alu[17]~11_combout & (\REGS|Mux55~0_combout )) # (\rt_alu[17]~11_combout & ((\rt_alu[8]~143_combout ))) ) ) ) # ( !\rt_alu[17]~10_combout & ( +// \rt_alu[8]~145_combout & ( (\rt_alu[17]~11_combout ) # (\REGS|Mux55~1_combout ) ) ) ) # ( \rt_alu[17]~10_combout & ( !\rt_alu[8]~145_combout & ( (!\rt_alu[17]~11_combout & (\REGS|Mux55~0_combout )) # (\rt_alu[17]~11_combout & ((\rt_alu[8]~143_combout +// ))) ) ) ) # ( !\rt_alu[17]~10_combout & ( !\rt_alu[8]~145_combout & ( (\REGS|Mux55~1_combout & !\rt_alu[17]~11_combout ) ) ) ) + + .dataa(!\REGS|Mux55~0_combout ), + .datab(!\REGS|Mux55~1_combout ), + .datac(!\rt_alu[17]~11_combout ), + .datad(!\rt_alu[8]~143_combout ), + .datae(!\rt_alu[17]~10_combout ), + .dataf(!\rt_alu[8]~145_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[8]~146_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[8]~146 .extended_lut = "off"; +defparam \rt_alu[8]~146 .lut_mask = 64'h3030505F3F3F505F; +defparam \rt_alu[8]~146 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X23_Y8_N51 +cyclonev_lcell_comb \REGS|regs[19][8]~feeder ( +// Equation(s): +// \REGS|regs[19][8]~feeder_combout = ( \rd[8]~442_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[8]~442_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[19][8]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[19][8]~feeder .extended_lut = "off"; +defparam \REGS|regs[19][8]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[19][8]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X23_Y8_N53 +dffeas \REGS|regs[19][8] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[19][8]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~14_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[19][8]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[19][8] .is_wysiwyg = "true"; +defparam \REGS|regs[19][8] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X23_Y8_N21 +cyclonev_lcell_comb \REGS|regs[27][8]~feeder ( +// Equation(s): +// \REGS|regs[27][8]~feeder_combout = ( \rd[8]~442_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[8]~442_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[27][8]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[27][8]~feeder .extended_lut = "off"; +defparam \REGS|regs[27][8]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[27][8]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X23_Y8_N22 +dffeas \REGS|regs[27][8] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[27][8]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~15_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[27][8]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[27][8] .is_wysiwyg = "true"; +defparam \REGS|regs[27][8] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X23_Y8_N36 +cyclonev_lcell_comb \REGS|Mux55~5 ( +// Equation(s): +// \REGS|Mux55~5_combout = ( \PC|pc[9]~DUPLICATE_q & ( \PC|pc [6] & ( \REGS|regs[19][8]~q ) ) ) # ( !\PC|pc[9]~DUPLICATE_q & ( \PC|pc [6] & ( \REGS|regs[19][8]~q ) ) ) # ( \PC|pc[9]~DUPLICATE_q & ( !\PC|pc [6] & ( \REGS|regs[19][8]~q ) ) ) # ( +// !\PC|pc[9]~DUPLICATE_q & ( !\PC|pc [6] & ( (!\PC|pc [7] & ((!\PC|pc[8]~DUPLICATE_q & ((\REGS|regs[27][8]~q ))) # (\PC|pc[8]~DUPLICATE_q & (\REGS|regs[19][8]~q )))) # (\PC|pc [7] & (\REGS|regs[19][8]~q )) ) ) ) + + .dataa(!\REGS|regs[19][8]~q ), + .datab(!\REGS|regs[27][8]~q ), + .datac(!\PC|pc [7]), + .datad(!\PC|pc[8]~DUPLICATE_q ), + .datae(!\PC|pc[9]~DUPLICATE_q ), + .dataf(!\PC|pc [6]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux55~5_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux55~5 .extended_lut = "off"; +defparam \REGS|Mux55~5 .lut_mask = 64'h3555555555555555; +defparam \REGS|Mux55~5 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X33_Y7_N17 +dffeas \REGS|regs[17][8] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[8]~442_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~11_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[17][8]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[17][8] .is_wysiwyg = "true"; +defparam \REGS|regs[17][8] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X33_Y7_N50 +dffeas \REGS|regs[16][8] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[8]~442_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~2_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[16][8]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[16][8] .is_wysiwyg = "true"; +defparam \REGS|regs[16][8] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X33_Y7_N33 +cyclonev_lcell_comb \rt_alu[8]~149 ( +// Equation(s): +// \rt_alu[8]~149_combout = ( \ROM|mem~0_combout & ( \ROM|mem~10_combout & ( \REGS|regs[16][8]~q ) ) ) # ( !\ROM|mem~0_combout & ( \ROM|mem~10_combout & ( \REGS|regs[16][8]~q ) ) ) # ( \ROM|mem~0_combout & ( !\ROM|mem~10_combout & ( +// \REGS|regs[17][8]~q ) ) ) # ( !\ROM|mem~0_combout & ( !\ROM|mem~10_combout & ( \REGS|regs[16][8]~q ) ) ) + + .dataa(gnd), + .datab(gnd), + .datac(!\REGS|regs[17][8]~q ), + .datad(!\REGS|regs[16][8]~q ), + .datae(!\ROM|mem~0_combout ), + .dataf(!\ROM|mem~10_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[8]~149_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[8]~149 .extended_lut = "off"; +defparam \rt_alu[8]~149 .lut_mask = 64'h00FF0F0F00FF00FF; +defparam \rt_alu[8]~149 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X32_Y11_N5 +dffeas \REGS|regs[28][8] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[8]~442_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~8_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[28][8]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[28][8] .is_wysiwyg = "true"; +defparam \REGS|regs[28][8] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X31_Y11_N25 +dffeas \REGS|regs[20][8] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[8]~442_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~7_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[20][8]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[20][8] .is_wysiwyg = "true"; +defparam \REGS|regs[20][8] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X32_Y11_N29 +dffeas \REGS|regs[29][8] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[8]~442_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~17_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[29][8]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[29][8] .is_wysiwyg = "true"; +defparam \REGS|regs[29][8] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y11_N51 +cyclonev_lcell_comb \rt_alu[8]~147 ( +// Equation(s): +// \rt_alu[8]~147_combout = ( \ROM|mem~0_combout & ( \ROM|mem~10_combout & ( \REGS|regs[28][8]~q ) ) ) # ( !\ROM|mem~0_combout & ( \ROM|mem~10_combout & ( \REGS|regs[20][8]~q ) ) ) # ( \ROM|mem~0_combout & ( !\ROM|mem~10_combout & ( +// \REGS|regs[29][8]~q ) ) ) # ( !\ROM|mem~0_combout & ( !\ROM|mem~10_combout & ( \REGS|regs[20][8]~q ) ) ) + + .dataa(!\REGS|regs[28][8]~q ), + .datab(gnd), + .datac(!\REGS|regs[20][8]~q ), + .datad(!\REGS|regs[29][8]~q ), + .datae(!\ROM|mem~0_combout ), + .dataf(!\ROM|mem~10_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[8]~147_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[8]~147 .extended_lut = "off"; +defparam \rt_alu[8]~147 .lut_mask = 64'h0F0F00FF0F0F5555; +defparam \rt_alu[8]~147 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X35_Y11_N39 +cyclonev_lcell_comb \rt_alu[8]~148 ( +// Equation(s): +// \rt_alu[8]~148_combout = ( \rt_alu[8]~147_combout & ( \REGS|Mux55~6_combout & ( (!\ROM|mem~12_combout ) # ((\ROM|mem~13_combout ) # (\REGS|Mux55~7_combout )) ) ) ) # ( !\rt_alu[8]~147_combout & ( \REGS|Mux55~6_combout & ( (\ROM|mem~12_combout & +// ((\ROM|mem~13_combout ) # (\REGS|Mux55~7_combout ))) ) ) ) # ( \rt_alu[8]~147_combout & ( !\REGS|Mux55~6_combout & ( (!\ROM|mem~12_combout ) # ((\REGS|Mux55~7_combout & !\ROM|mem~13_combout )) ) ) ) # ( !\rt_alu[8]~147_combout & ( +// !\REGS|Mux55~6_combout & ( (\ROM|mem~12_combout & (\REGS|Mux55~7_combout & !\ROM|mem~13_combout )) ) ) ) + + .dataa(!\ROM|mem~12_combout ), + .datab(gnd), + .datac(!\REGS|Mux55~7_combout ), + .datad(!\ROM|mem~13_combout ), + .datae(!\rt_alu[8]~147_combout ), + .dataf(!\REGS|Mux55~6_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[8]~148_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[8]~148 .extended_lut = "off"; +defparam \rt_alu[8]~148 .lut_mask = 64'h0500AFAA0555AFFF; +defparam \rt_alu[8]~148 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X35_Y11_N48 +cyclonev_lcell_comb \rt_alu[8]~150 ( +// Equation(s): +// \rt_alu[8]~150_combout = ( \rt_alu[8]~149_combout & ( \rt_alu[8]~148_combout & ( (!\rt_alu[17]~5_combout ) # ((!\rt_alu[17]~4_combout & ((\REGS|Mux55~5_combout ))) # (\rt_alu[17]~4_combout & (\REGS|Mux55~4_combout ))) ) ) ) # ( +// !\rt_alu[8]~149_combout & ( \rt_alu[8]~148_combout & ( (!\rt_alu[17]~5_combout & (((\rt_alu[17]~4_combout )))) # (\rt_alu[17]~5_combout & ((!\rt_alu[17]~4_combout & ((\REGS|Mux55~5_combout ))) # (\rt_alu[17]~4_combout & (\REGS|Mux55~4_combout )))) ) +// ) ) # ( \rt_alu[8]~149_combout & ( !\rt_alu[8]~148_combout & ( (!\rt_alu[17]~5_combout & (((!\rt_alu[17]~4_combout )))) # (\rt_alu[17]~5_combout & ((!\rt_alu[17]~4_combout & ((\REGS|Mux55~5_combout ))) # (\rt_alu[17]~4_combout & +// (\REGS|Mux55~4_combout )))) ) ) ) # ( !\rt_alu[8]~149_combout & ( !\rt_alu[8]~148_combout & ( (\rt_alu[17]~5_combout & ((!\rt_alu[17]~4_combout & ((\REGS|Mux55~5_combout ))) # (\rt_alu[17]~4_combout & (\REGS|Mux55~4_combout )))) ) ) ) + + .dataa(!\rt_alu[17]~5_combout ), + .datab(!\REGS|Mux55~4_combout ), + .datac(!\rt_alu[17]~4_combout ), + .datad(!\REGS|Mux55~5_combout ), + .datae(!\rt_alu[8]~149_combout ), + .dataf(!\rt_alu[8]~148_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[8]~150_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[8]~150 .extended_lut = "off"; +defparam \rt_alu[8]~150 .lut_mask = 64'h0151A1F10B5BABFB; +defparam \rt_alu[8]~150 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y11_N33 +cyclonev_lcell_comb \rt_alu[8]~151 ( +// Equation(s): +// \rt_alu[8]~151_combout = ( \rt_alu[8]~150_combout & ( ((!\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout & \rt_alu[8]~146_combout )) # (\ROM|mem~9_combout ) ) ) # ( !\rt_alu[8]~150_combout & ( (!\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout & +// (!\ROM|mem~9_combout & \rt_alu[8]~146_combout )) # (\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout & (\ROM|mem~9_combout )) ) ) + + .dataa(!\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout ), + .datab(gnd), + .datac(!\ROM|mem~9_combout ), + .datad(!\rt_alu[8]~146_combout ), + .datae(gnd), + .dataf(!\rt_alu[8]~150_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[8]~151_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[8]~151 .extended_lut = "off"; +defparam \rt_alu[8]~151 .lut_mask = 64'h05A505A50FAF0FAF; +defparam \rt_alu[8]~151 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y6_N9 +cyclonev_lcell_comb \ALU|Mux22~1 ( +// Equation(s): +// \ALU|Mux22~1_combout = ( \ALU|adder_unit|OUT_1 [9] & ( (!\ALU|Mux22~0_combout & \ALU|Mux29~0_combout ) ) ) # ( !\ALU|adder_unit|OUT_1 [9] & ( !\ALU|Mux22~0_combout ) ) + + .dataa(gnd), + .datab(gnd), + .datac(!\ALU|Mux22~0_combout ), + .datad(!\ALU|Mux29~0_combout ), + .datae(gnd), + .dataf(!\ALU|adder_unit|OUT_1 [9]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\ALU|Mux22~1_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \ALU|Mux22~1 .extended_lut = "off"; +defparam \ALU|Mux22~1 .lut_mask = 64'hF0F0F0F000F000F0; +defparam \ALU|Mux22~1 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X36_Y12_N39 +cyclonev_lcell_comb \rd[9]~444 ( +// Equation(s): +// \rd[9]~444_combout = ( !\ALU|Mux22~1_combout & ( !\CONTROL_UNIT|M2R[0]~0_combout ) ) + + .dataa(gnd), + .datab(gnd), + .datac(!\CONTROL_UNIT|M2R[0]~0_combout ), + .datad(gnd), + .datae(gnd), + .dataf(!\ALU|Mux22~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[9]~444_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[9]~444 .extended_lut = "off"; +defparam \rd[9]~444 .lut_mask = 64'hF0F0F0F000000000; +defparam \rd[9]~444 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X33_Y12_N8 +dffeas \REGS|regs[18][9] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[9]~444_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~5_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[18][9]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[18][9] .is_wysiwyg = "true"; +defparam \REGS|regs[18][9] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X33_Y12_N41 +dffeas \REGS|regs[26][9] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[9]~444_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~6_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[26][9]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[26][9] .is_wysiwyg = "true"; +defparam \REGS|regs[26][9] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X33_Y12_N9 +cyclonev_lcell_comb \REGS|Mux54~4 ( +// Equation(s): +// \REGS|Mux54~4_combout = ( \PC|pc [7] & ( \PC|pc [9] & ( \REGS|regs[18][9]~q ) ) ) # ( !\PC|pc [7] & ( \PC|pc [9] & ( \REGS|regs[18][9]~q ) ) ) # ( \PC|pc [7] & ( !\PC|pc [9] & ( \REGS|regs[18][9]~q ) ) ) # ( !\PC|pc [7] & ( !\PC|pc [9] & ( (!\PC|pc +// [6] & ((!\PC|pc[8]~DUPLICATE_q & ((\REGS|regs[26][9]~q ))) # (\PC|pc[8]~DUPLICATE_q & (\REGS|regs[18][9]~q )))) # (\PC|pc [6] & (\REGS|regs[18][9]~q )) ) ) ) + + .dataa(!\PC|pc [6]), + .datab(!\REGS|regs[18][9]~q ), + .datac(!\REGS|regs[26][9]~q ), + .datad(!\PC|pc[8]~DUPLICATE_q ), + .datae(!\PC|pc [7]), + .dataf(!\PC|pc [9]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux54~4_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux54~4 .extended_lut = "off"; +defparam \REGS|Mux54~4 .lut_mask = 64'h1B33333333333333; +defparam \REGS|Mux54~4 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X33_Y12_N35 +dffeas \REGS|regs[19][9] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[9]~444_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~14_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[19][9]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[19][9] .is_wysiwyg = "true"; +defparam \REGS|regs[19][9] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X33_Y13_N8 +dffeas \REGS|regs[27][9] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[9]~444_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~15_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[27][9]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[27][9] .is_wysiwyg = "true"; +defparam \REGS|regs[27][9] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X33_Y12_N21 +cyclonev_lcell_comb \REGS|Mux54~7 ( +// Equation(s): +// \REGS|Mux54~7_combout = ( \PC|pc [7] & ( \REGS|regs[27][9]~q & ( \REGS|regs[19][9]~q ) ) ) # ( !\PC|pc [7] & ( \REGS|regs[27][9]~q & ( ((!\PC|pc [6] & (!\PC|pc [9] & !\PC|pc [8]))) # (\REGS|regs[19][9]~q ) ) ) ) # ( \PC|pc [7] & ( !\REGS|regs[27][9]~q +// & ( \REGS|regs[19][9]~q ) ) ) # ( !\PC|pc [7] & ( !\REGS|regs[27][9]~q & ( (\REGS|regs[19][9]~q & (((\PC|pc [8]) # (\PC|pc [9])) # (\PC|pc [6]))) ) ) ) + + .dataa(!\PC|pc [6]), + .datab(!\PC|pc [9]), + .datac(!\PC|pc [8]), + .datad(!\REGS|regs[19][9]~q ), + .datae(!\PC|pc [7]), + .dataf(!\REGS|regs[27][9]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux54~7_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux54~7 .extended_lut = "off"; +defparam \REGS|Mux54~7 .lut_mask = 64'h007F00FF80FF00FF; +defparam \REGS|Mux54~7 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X32_Y11_N38 +dffeas \REGS|regs[29][9] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[9]~444_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~17_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[29][9]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[29][9] .is_wysiwyg = "true"; +defparam \REGS|regs[29][9] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X30_Y10_N15 +cyclonev_lcell_comb \REGS|regs[28][9]~feeder ( +// Equation(s): +// \REGS|regs[28][9]~feeder_combout = ( \rd[9]~444_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[9]~444_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[28][9]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[28][9]~feeder .extended_lut = "off"; +defparam \REGS|regs[28][9]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[28][9]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X30_Y10_N16 +dffeas \REGS|regs[28][9] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[28][9]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~8_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[28][9]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[28][9] .is_wysiwyg = "true"; +defparam \REGS|regs[28][9] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X31_Y11_N58 +dffeas \REGS|regs[20][9] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[9]~444_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~7_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[20][9]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[20][9] .is_wysiwyg = "true"; +defparam \REGS|regs[20][9] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y11_N57 +cyclonev_lcell_comb \rt_alu[9]~167 ( +// Equation(s): +// \rt_alu[9]~167_combout = ( \ROM|mem~0_combout & ( \ROM|mem~10_combout & ( \REGS|regs[28][9]~q ) ) ) # ( !\ROM|mem~0_combout & ( \ROM|mem~10_combout & ( \REGS|regs[20][9]~q ) ) ) # ( \ROM|mem~0_combout & ( !\ROM|mem~10_combout & ( +// \REGS|regs[29][9]~q ) ) ) # ( !\ROM|mem~0_combout & ( !\ROM|mem~10_combout & ( \REGS|regs[20][9]~q ) ) ) + + .dataa(!\REGS|regs[29][9]~q ), + .datab(!\REGS|regs[28][9]~q ), + .datac(!\REGS|regs[20][9]~q ), + .datad(gnd), + .datae(!\ROM|mem~0_combout ), + .dataf(!\ROM|mem~10_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[9]~167_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[9]~167 .extended_lut = "off"; +defparam \rt_alu[9]~167 .lut_mask = 64'h0F0F55550F0F3333; +defparam \rt_alu[9]~167 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X33_Y11_N27 +cyclonev_lcell_comb \rt_alu[9]~168 ( +// Equation(s): +// \rt_alu[9]~168_combout = ( \ROM|mem~13_combout & ( \ROM|mem~12_combout & ( \REGS|Mux54~3_combout ) ) ) # ( !\ROM|mem~13_combout & ( \ROM|mem~12_combout & ( \REGS|Mux54~2_combout ) ) ) # ( \ROM|mem~13_combout & ( !\ROM|mem~12_combout & ( +// \rt_alu[9]~167_combout ) ) ) # ( !\ROM|mem~13_combout & ( !\ROM|mem~12_combout & ( \rt_alu[9]~167_combout ) ) ) + + .dataa(gnd), + .datab(!\REGS|Mux54~3_combout ), + .datac(!\rt_alu[9]~167_combout ), + .datad(!\REGS|Mux54~2_combout ), + .datae(!\ROM|mem~13_combout ), + .dataf(!\ROM|mem~12_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[9]~168_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[9]~168 .extended_lut = "off"; +defparam \rt_alu[9]~168 .lut_mask = 64'h0F0F0F0F00FF3333; +defparam \rt_alu[9]~168 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X32_Y14_N38 +dffeas \REGS|regs[17][9] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[9]~444_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~11_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[17][9]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[17][9] .is_wysiwyg = "true"; +defparam \REGS|regs[17][9] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X28_Y9_N39 +cyclonev_lcell_comb \REGS|regs[16][9]~feeder ( +// Equation(s): +// \REGS|regs[16][9]~feeder_combout = ( \rd[9]~444_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[9]~444_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[16][9]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[16][9]~feeder .extended_lut = "off"; +defparam \REGS|regs[16][9]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[16][9]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X28_Y9_N40 +dffeas \REGS|regs[16][9]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[16][9]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~2_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[16][9]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[16][9]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[16][9]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y14_N24 +cyclonev_lcell_comb \rt_alu[9]~169 ( +// Equation(s): +// \rt_alu[9]~169_combout = ( \ROM|mem~0_combout & ( \ROM|mem~10_combout & ( \REGS|regs[16][9]~DUPLICATE_q ) ) ) # ( !\ROM|mem~0_combout & ( \ROM|mem~10_combout & ( \REGS|regs[16][9]~DUPLICATE_q ) ) ) # ( \ROM|mem~0_combout & ( !\ROM|mem~10_combout +// & ( \REGS|regs[17][9]~q ) ) ) # ( !\ROM|mem~0_combout & ( !\ROM|mem~10_combout & ( \REGS|regs[16][9]~DUPLICATE_q ) ) ) + + .dataa(gnd), + .datab(gnd), + .datac(!\REGS|regs[17][9]~q ), + .datad(!\REGS|regs[16][9]~DUPLICATE_q ), + .datae(!\ROM|mem~0_combout ), + .dataf(!\ROM|mem~10_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[9]~169_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[9]~169 .extended_lut = "off"; +defparam \rt_alu[9]~169 .lut_mask = 64'h00FF0F0F00FF00FF; +defparam \rt_alu[9]~169 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X33_Y11_N0 +cyclonev_lcell_comb \rt_alu[9]~170 ( +// Equation(s): +// \rt_alu[9]~170_combout = ( \rt_alu[9]~168_combout & ( \rt_alu[9]~169_combout & ( (!\rt_alu[17]~5_combout ) # ((!\rt_alu[17]~4_combout & ((\REGS|Mux54~7_combout ))) # (\rt_alu[17]~4_combout & (\REGS|Mux54~4_combout ))) ) ) ) # ( +// !\rt_alu[9]~168_combout & ( \rt_alu[9]~169_combout & ( (!\rt_alu[17]~5_combout & (((!\rt_alu[17]~4_combout )))) # (\rt_alu[17]~5_combout & ((!\rt_alu[17]~4_combout & ((\REGS|Mux54~7_combout ))) # (\rt_alu[17]~4_combout & (\REGS|Mux54~4_combout )))) +// ) ) ) # ( \rt_alu[9]~168_combout & ( !\rt_alu[9]~169_combout & ( (!\rt_alu[17]~5_combout & (((\rt_alu[17]~4_combout )))) # (\rt_alu[17]~5_combout & ((!\rt_alu[17]~4_combout & ((\REGS|Mux54~7_combout ))) # (\rt_alu[17]~4_combout & +// (\REGS|Mux54~4_combout )))) ) ) ) # ( !\rt_alu[9]~168_combout & ( !\rt_alu[9]~169_combout & ( (\rt_alu[17]~5_combout & ((!\rt_alu[17]~4_combout & ((\REGS|Mux54~7_combout ))) # (\rt_alu[17]~4_combout & (\REGS|Mux54~4_combout )))) ) ) ) + + .dataa(!\REGS|Mux54~4_combout ), + .datab(!\rt_alu[17]~5_combout ), + .datac(!\rt_alu[17]~4_combout ), + .datad(!\REGS|Mux54~7_combout ), + .datae(!\rt_alu[9]~168_combout ), + .dataf(!\rt_alu[9]~169_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[9]~170_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[9]~170 .extended_lut = "off"; +defparam \rt_alu[9]~170 .lut_mask = 64'h01310D3DC1F1CDFD; +defparam \rt_alu[9]~170 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X33_Y11_N12 +cyclonev_lcell_comb \ALU|adder_unit|operand[9]~10 ( +// Equation(s): +// \ALU|adder_unit|operand[9]~10_combout = ( \rt_alu[9]~170_combout & ( \rt_alu[9]~166_combout & ( !\CONTROL_UNIT|ALU_FN [1] $ (((!\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout ) # (\ROM|mem~9_combout ))) ) ) ) # ( !\rt_alu[9]~170_combout & ( +// \rt_alu[9]~166_combout & ( !\ROM|mem~9_combout $ (!\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout $ (\CONTROL_UNIT|ALU_FN [1])) ) ) ) # ( \rt_alu[9]~170_combout & ( !\rt_alu[9]~166_combout & ( !\ROM|mem~9_combout $ (\CONTROL_UNIT|ALU_FN [1]) ) ) ) # ( +// !\rt_alu[9]~170_combout & ( !\rt_alu[9]~166_combout & ( !\CONTROL_UNIT|ALU_FN [1] $ (((\ROM|mem~9_combout & \CONTROL_UNIT|CLASSIFIER|Equal0~1_combout ))) ) ) ) + + .dataa(!\ROM|mem~9_combout ), + .datab(gnd), + .datac(!\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout ), + .datad(!\CONTROL_UNIT|ALU_FN [1]), + .datae(!\rt_alu[9]~170_combout ), + .dataf(!\rt_alu[9]~166_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\ALU|adder_unit|operand[9]~10_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \ALU|adder_unit|operand[9]~10 .extended_lut = "off"; +defparam \ALU|adder_unit|operand[9]~10 .lut_mask = 64'hFA05AA555AA50AF5; +defparam \ALU|adder_unit|operand[9]~10 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X33_Y5_N42 +cyclonev_lcell_comb \rd[10]~446 ( +// Equation(s): +// \rd[10]~446_combout = ( \ALU|Mux21~0_combout & ( \ALU|adder_unit|OUT_1 [10] & ( !\CONTROL_UNIT|M2R[0]~0_combout ) ) ) # ( !\ALU|Mux21~0_combout & ( \ALU|adder_unit|OUT_1 [10] & ( (!\ALU|Mux29~0_combout & !\CONTROL_UNIT|M2R[0]~0_combout ) ) ) ) # ( +// \ALU|Mux21~0_combout & ( !\ALU|adder_unit|OUT_1 [10] & ( !\CONTROL_UNIT|M2R[0]~0_combout ) ) ) + + .dataa(!\ALU|Mux29~0_combout ), + .datab(gnd), + .datac(!\CONTROL_UNIT|M2R[0]~0_combout ), + .datad(gnd), + .datae(!\ALU|Mux21~0_combout ), + .dataf(!\ALU|adder_unit|OUT_1 [10]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[10]~446_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[10]~446 .extended_lut = "off"; +defparam \rd[10]~446 .lut_mask = 64'h0000F0F0A0A0F0F0; +defparam \rd[10]~446 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X31_Y13_N35 +dffeas \REGS|regs[18][10] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[10]~446_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~5_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[18][10]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[18][10] .is_wysiwyg = "true"; +defparam \REGS|regs[18][10] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X31_Y13_N12 +cyclonev_lcell_comb \REGS|regs[26][10]~feeder ( +// Equation(s): +// \REGS|regs[26][10]~feeder_combout = ( \rd[10]~446_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[10]~446_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[26][10]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[26][10]~feeder .extended_lut = "off"; +defparam \REGS|regs[26][10]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[26][10]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X31_Y13_N13 +dffeas \REGS|regs[26][10] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[26][10]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~6_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[26][10]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[26][10] .is_wysiwyg = "true"; +defparam \REGS|regs[26][10] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y12_N45 +cyclonev_lcell_comb \REGS|Mux53~4 ( +// Equation(s): +// \REGS|Mux53~4_combout = ( \PC|pc[7]~DUPLICATE_q & ( \PC|pc[8]~DUPLICATE_q & ( \REGS|regs[18][10]~q ) ) ) # ( !\PC|pc[7]~DUPLICATE_q & ( \PC|pc[8]~DUPLICATE_q & ( \REGS|regs[18][10]~q ) ) ) # ( \PC|pc[7]~DUPLICATE_q & ( !\PC|pc[8]~DUPLICATE_q & ( +// \REGS|regs[18][10]~q ) ) ) # ( !\PC|pc[7]~DUPLICATE_q & ( !\PC|pc[8]~DUPLICATE_q & ( (!\PC|pc [9] & ((!\PC|pc[6]~DUPLICATE_q & ((\REGS|regs[26][10]~q ))) # (\PC|pc[6]~DUPLICATE_q & (\REGS|regs[18][10]~q )))) # (\PC|pc [9] & (\REGS|regs[18][10]~q )) ) +// ) ) + + .dataa(!\REGS|regs[18][10]~q ), + .datab(!\PC|pc [9]), + .datac(!\REGS|regs[26][10]~q ), + .datad(!\PC|pc[6]~DUPLICATE_q ), + .datae(!\PC|pc[7]~DUPLICATE_q ), + .dataf(!\PC|pc[8]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux53~4_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux53~4 .extended_lut = "off"; +defparam \REGS|Mux53~4 .lut_mask = 64'h1D55555555555555; +defparam \REGS|Mux53~4 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X35_Y4_N31 +dffeas \REGS|regs[8][10] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[8][10]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~24_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[8][10]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[8][10] .is_wysiwyg = "true"; +defparam \REGS|regs[8][10] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X35_Y10_N39 +cyclonev_lcell_comb \REGS|Mux21~1 ( +// Equation(s): +// \REGS|Mux21~1_combout = ( \ROM|mem~0_combout & ( \REGS|regs[8][10]~q & ( (!\ROM|mem~15_combout ) # (\REGS|regs[9][10]~q ) ) ) ) # ( \ROM|mem~0_combout & ( !\REGS|regs[8][10]~q & ( (\ROM|mem~15_combout & \REGS|regs[9][10]~q ) ) ) ) + + .dataa(gnd), + .datab(gnd), + .datac(!\ROM|mem~15_combout ), + .datad(!\REGS|regs[9][10]~q ), + .datae(!\ROM|mem~0_combout ), + .dataf(!\REGS|regs[8][10]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux21~1_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux21~1 .extended_lut = "off"; +defparam \REGS|Mux21~1 .lut_mask = 64'h0000000F0000F0FF; +defparam \REGS|Mux21~1 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X35_Y10_N42 +cyclonev_lcell_comb \REGS|Mux21~0 ( +// Equation(s): +// \REGS|Mux21~0_combout = ( \REGS|Mux53~7_combout & ( \REGS|Mux53~6_combout & ( ((!\ROM|mem~16_combout & (\REGS|Mux53~3_combout )) # (\ROM|mem~16_combout & ((\REGS|Mux53~2_combout )))) # (\ROM|mem~9_combout ) ) ) ) # ( !\REGS|Mux53~7_combout & ( +// \REGS|Mux53~6_combout & ( (!\ROM|mem~16_combout & (\REGS|Mux53~3_combout & (!\ROM|mem~9_combout ))) # (\ROM|mem~16_combout & (((\REGS|Mux53~2_combout ) # (\ROM|mem~9_combout )))) ) ) ) # ( \REGS|Mux53~7_combout & ( !\REGS|Mux53~6_combout & ( +// (!\ROM|mem~16_combout & (((\ROM|mem~9_combout )) # (\REGS|Mux53~3_combout ))) # (\ROM|mem~16_combout & (((!\ROM|mem~9_combout & \REGS|Mux53~2_combout )))) ) ) ) # ( !\REGS|Mux53~7_combout & ( !\REGS|Mux53~6_combout & ( (!\ROM|mem~9_combout & +// ((!\ROM|mem~16_combout & (\REGS|Mux53~3_combout )) # (\ROM|mem~16_combout & ((\REGS|Mux53~2_combout ))))) ) ) ) + + .dataa(!\REGS|Mux53~3_combout ), + .datab(!\ROM|mem~16_combout ), + .datac(!\ROM|mem~9_combout ), + .datad(!\REGS|Mux53~2_combout ), + .datae(!\REGS|Mux53~7_combout ), + .dataf(!\REGS|Mux53~6_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux21~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux21~0 .extended_lut = "off"; +defparam \REGS|Mux21~0 .lut_mask = 64'h40704C7C43734F7F; +defparam \REGS|Mux21~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X35_Y10_N54 +cyclonev_lcell_comb \REGS|Mux21~2 ( +// Equation(s): +// \REGS|Mux21~2_combout = ( \ROM|mem~9_combout & ( \REGS|Mux21~0_combout & ( ((\REGS|Mux21~1_combout ) # (\REGS|Mux53~4_combout )) # (\ROM|mem~17_combout ) ) ) ) # ( !\ROM|mem~9_combout & ( \REGS|Mux21~0_combout & ( (\REGS|Mux21~1_combout ) # +// (\ROM|mem~17_combout ) ) ) ) # ( \ROM|mem~9_combout & ( !\REGS|Mux21~0_combout & ( (!\ROM|mem~17_combout & ((\REGS|Mux21~1_combout ) # (\REGS|Mux53~4_combout ))) ) ) ) # ( !\ROM|mem~9_combout & ( !\REGS|Mux21~0_combout & ( (!\ROM|mem~17_combout & +// \REGS|Mux21~1_combout ) ) ) ) + + .dataa(!\ROM|mem~17_combout ), + .datab(gnd), + .datac(!\REGS|Mux53~4_combout ), + .datad(!\REGS|Mux21~1_combout ), + .datae(!\ROM|mem~9_combout ), + .dataf(!\REGS|Mux21~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux21~2_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux21~2 .extended_lut = "off"; +defparam \REGS|Mux21~2 .lut_mask = 64'h00AA0AAA55FF5FFF; +defparam \REGS|Mux21~2 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X33_Y5_N6 +cyclonev_lcell_comb \rd[11]~448 ( +// Equation(s): +// \rd[11]~448_combout = ( \ALU|Mux29~0_combout & ( \ALU|adder_unit|OUT_1 [11] & ( (\ALU|Mux20~0_combout & !\CONTROL_UNIT|M2R[0]~0_combout ) ) ) ) # ( !\ALU|Mux29~0_combout & ( \ALU|adder_unit|OUT_1 [11] & ( !\CONTROL_UNIT|M2R[0]~0_combout ) ) ) # ( +// \ALU|Mux29~0_combout & ( !\ALU|adder_unit|OUT_1 [11] & ( (\ALU|Mux20~0_combout & !\CONTROL_UNIT|M2R[0]~0_combout ) ) ) ) # ( !\ALU|Mux29~0_combout & ( !\ALU|adder_unit|OUT_1 [11] & ( (\ALU|Mux20~0_combout & !\CONTROL_UNIT|M2R[0]~0_combout ) ) ) ) + + .dataa(!\ALU|Mux20~0_combout ), + .datab(gnd), + .datac(!\CONTROL_UNIT|M2R[0]~0_combout ), + .datad(gnd), + .datae(!\ALU|Mux29~0_combout ), + .dataf(!\ALU|adder_unit|OUT_1 [11]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[11]~448_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[11]~448 .extended_lut = "off"; +defparam \rd[11]~448 .lut_mask = 64'h50505050F0F05050; +defparam \rd[11]~448 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X35_Y4_N56 +dffeas \REGS|regs[26][11] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[11]~448_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~6_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[26][11]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[26][11] .is_wysiwyg = "true"; +defparam \REGS|regs[26][11] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X33_Y7_N55 +dffeas \REGS|regs[18][11]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[11]~448_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~5_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[18][11]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[18][11]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[18][11]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X35_Y4_N39 +cyclonev_lcell_comb \REGS|Mux52~4 ( +// Equation(s): +// \REGS|Mux52~4_combout = ( \PC|pc [9] & ( \REGS|regs[18][11]~DUPLICATE_q ) ) # ( !\PC|pc [9] & ( \REGS|regs[18][11]~DUPLICATE_q & ( (((\PC|pc[6]~DUPLICATE_q ) # (\PC|pc[8]~DUPLICATE_q )) # (\PC|pc [7])) # (\REGS|regs[26][11]~q ) ) ) ) # ( !\PC|pc [9] & +// ( !\REGS|regs[18][11]~DUPLICATE_q & ( (\REGS|regs[26][11]~q & (!\PC|pc [7] & (!\PC|pc[8]~DUPLICATE_q & !\PC|pc[6]~DUPLICATE_q ))) ) ) ) + + .dataa(!\REGS|regs[26][11]~q ), + .datab(!\PC|pc [7]), + .datac(!\PC|pc[8]~DUPLICATE_q ), + .datad(!\PC|pc[6]~DUPLICATE_q ), + .datae(!\PC|pc [9]), + .dataf(!\REGS|regs[18][11]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux52~4_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux52~4 .extended_lut = "off"; +defparam \REGS|Mux52~4 .lut_mask = 64'h400000007FFFFFFF; +defparam \REGS|Mux52~4 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X35_Y4_N25 +dffeas \REGS|regs[8][11]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[11]~448_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~24_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[8][11]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[8][11]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[8][11]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X33_Y4_N9 +cyclonev_lcell_comb \REGS|Mux20~1 ( +// Equation(s): +// \REGS|Mux20~1_combout = ( \ROM|mem~0_combout & ( \ROM|mem~15_combout & ( \REGS|regs[9][11]~q ) ) ) # ( \ROM|mem~0_combout & ( !\ROM|mem~15_combout & ( \REGS|regs[8][11]~DUPLICATE_q ) ) ) + + .dataa(gnd), + .datab(gnd), + .datac(!\REGS|regs[9][11]~q ), + .datad(!\REGS|regs[8][11]~DUPLICATE_q ), + .datae(!\ROM|mem~0_combout ), + .dataf(!\ROM|mem~15_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux20~1_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux20~1 .extended_lut = "off"; +defparam \REGS|Mux20~1 .lut_mask = 64'h000000FF00000F0F; +defparam \REGS|Mux20~1 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X33_Y8_N6 +cyclonev_lcell_comb \REGS|Mux20~0 ( +// Equation(s): +// \REGS|Mux20~0_combout = ( \REGS|Mux52~3_combout & ( \REGS|Mux52~2_combout & ( ((!\ROM|mem~16_combout & (\REGS|Mux52~0_combout )) # (\ROM|mem~16_combout & ((\REGS|Mux52~1_combout )))) # (\ROM|mem~9_combout ) ) ) ) # ( !\REGS|Mux52~3_combout & ( +// \REGS|Mux52~2_combout & ( (!\ROM|mem~9_combout & ((!\ROM|mem~16_combout & (\REGS|Mux52~0_combout )) # (\ROM|mem~16_combout & ((\REGS|Mux52~1_combout ))))) # (\ROM|mem~9_combout & (((!\ROM|mem~16_combout )))) ) ) ) # ( \REGS|Mux52~3_combout & ( +// !\REGS|Mux52~2_combout & ( (!\ROM|mem~9_combout & ((!\ROM|mem~16_combout & (\REGS|Mux52~0_combout )) # (\ROM|mem~16_combout & ((\REGS|Mux52~1_combout ))))) # (\ROM|mem~9_combout & (((\ROM|mem~16_combout )))) ) ) ) # ( !\REGS|Mux52~3_combout & ( +// !\REGS|Mux52~2_combout & ( (!\ROM|mem~9_combout & ((!\ROM|mem~16_combout & (\REGS|Mux52~0_combout )) # (\ROM|mem~16_combout & ((\REGS|Mux52~1_combout ))))) ) ) ) + + .dataa(!\ROM|mem~9_combout ), + .datab(!\REGS|Mux52~0_combout ), + .datac(!\ROM|mem~16_combout ), + .datad(!\REGS|Mux52~1_combout ), + .datae(!\REGS|Mux52~3_combout ), + .dataf(!\REGS|Mux52~2_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux20~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux20~0 .extended_lut = "off"; +defparam \REGS|Mux20~0 .lut_mask = 64'h202A252F707A757F; +defparam \REGS|Mux20~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X33_Y8_N24 +cyclonev_lcell_comb \REGS|Mux20~2 ( +// Equation(s): +// \REGS|Mux20~2_combout = ( \REGS|Mux20~1_combout & ( \REGS|Mux20~0_combout ) ) # ( !\REGS|Mux20~1_combout & ( \REGS|Mux20~0_combout & ( ((\ROM|mem~9_combout & \REGS|Mux52~4_combout )) # (\ROM|mem~17_combout ) ) ) ) # ( \REGS|Mux20~1_combout & ( +// !\REGS|Mux20~0_combout & ( !\ROM|mem~17_combout ) ) ) # ( !\REGS|Mux20~1_combout & ( !\REGS|Mux20~0_combout & ( (!\ROM|mem~17_combout & (\ROM|mem~9_combout & \REGS|Mux52~4_combout )) ) ) ) + + .dataa(!\ROM|mem~17_combout ), + .datab(gnd), + .datac(!\ROM|mem~9_combout ), + .datad(!\REGS|Mux52~4_combout ), + .datae(!\REGS|Mux20~1_combout ), + .dataf(!\REGS|Mux20~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux20~2_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux20~2 .extended_lut = "off"; +defparam \REGS|Mux20~2 .lut_mask = 64'h000AAAAA555FFFFF; +defparam \REGS|Mux20~2 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y12_N12 +cyclonev_lcell_comb \rd[12]~450 ( +// Equation(s): +// \rd[12]~450_combout = ( \ALU|adder_unit|OUT_1 [12] & ( (!\CONTROL_UNIT|M2R[0]~0_combout & ((!\ALU|Mux29~0_combout ) # (\ALU|Mux19~0_combout ))) ) ) # ( !\ALU|adder_unit|OUT_1 [12] & ( (!\CONTROL_UNIT|M2R[0]~0_combout & \ALU|Mux19~0_combout ) ) ) + + .dataa(!\ALU|Mux29~0_combout ), + .datab(!\CONTROL_UNIT|M2R[0]~0_combout ), + .datac(!\ALU|Mux19~0_combout ), + .datad(gnd), + .datae(!\ALU|adder_unit|OUT_1 [12]), + .dataf(gnd), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[12]~450_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[12]~450 .extended_lut = "off"; +defparam \rd[12]~450 .lut_mask = 64'h0C0C8C8C0C0C8C8C; +defparam \rd[12]~450 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X32_Y7_N38 +dffeas \REGS|regs[8][12]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[12]~450_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~24_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[8][12]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[8][12]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[8][12]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y7_N39 +cyclonev_lcell_comb \REGS|Mux51~1 ( +// Equation(s): +// \REGS|Mux51~1_combout = ( !\PC|pc[9]~DUPLICATE_q & ( !\PC|pc[8]~DUPLICATE_q & ( (\REGS|regs[8][12]~DUPLICATE_q & (!\PC|pc[6]~DUPLICATE_q & !\PC|pc [7])) ) ) ) + + .dataa(!\REGS|regs[8][12]~DUPLICATE_q ), + .datab(gnd), + .datac(!\PC|pc[6]~DUPLICATE_q ), + .datad(!\PC|pc [7]), + .datae(!\PC|pc[9]~DUPLICATE_q ), + .dataf(!\PC|pc[8]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux51~1_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux51~1 .extended_lut = "off"; +defparam \REGS|Mux51~1 .lut_mask = 64'h5000000000000000; +defparam \REGS|Mux51~1 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X31_Y10_N4 +dffeas \REGS|regs[2][12]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[12]~450_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~32_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[2][12]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[2][12]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[2][12]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: FF_X28_Y6_N32 +dffeas \REGS|regs[10][12] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[12]~450_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~33_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[10][12]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[10][12] .is_wysiwyg = "true"; +defparam \REGS|regs[10][12] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X33_Y10_N38 +dffeas \REGS|regs[11][12]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[12]~450_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~37_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[11][12]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[11][12]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[11][12]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X33_Y10_N39 +cyclonev_lcell_comb \rt_alu[12]~222 ( +// Equation(s): +// \rt_alu[12]~222_combout = ( \ROM|mem~0_combout & ( \ROM|mem~10_combout & ( \REGS|regs[10][12]~q ) ) ) # ( !\ROM|mem~0_combout & ( \ROM|mem~10_combout & ( \REGS|regs[2][12]~DUPLICATE_q ) ) ) # ( \ROM|mem~0_combout & ( !\ROM|mem~10_combout & ( +// \REGS|regs[11][12]~DUPLICATE_q ) ) ) # ( !\ROM|mem~0_combout & ( !\ROM|mem~10_combout & ( \REGS|regs[2][12]~DUPLICATE_q ) ) ) + + .dataa(gnd), + .datab(!\REGS|regs[2][12]~DUPLICATE_q ), + .datac(!\REGS|regs[10][12]~q ), + .datad(!\REGS|regs[11][12]~DUPLICATE_q ), + .datae(!\ROM|mem~0_combout ), + .dataf(!\ROM|mem~10_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[12]~222_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[12]~222 .extended_lut = "off"; +defparam \rt_alu[12]~222 .lut_mask = 64'h333300FF33330F0F; +defparam \rt_alu[12]~222 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X30_Y7_N56 +dffeas \REGS|regs[1][12] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[12]~450_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~28_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[1][12]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[1][12] .is_wysiwyg = "true"; +defparam \REGS|regs[1][12] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X30_Y7_N33 +cyclonev_lcell_comb \REGS|Mux51~0 ( +// Equation(s): +// \REGS|Mux51~0_combout = ( \PC|pc[6]~DUPLICATE_q & ( \PC|pc [7] & ( \REGS|regs[1][12]~q ) ) ) # ( !\PC|pc[6]~DUPLICATE_q & ( \PC|pc [7] & ( \REGS|regs[1][12]~q ) ) ) # ( \PC|pc[6]~DUPLICATE_q & ( !\PC|pc [7] & ( \REGS|regs[1][12]~q ) ) ) # ( +// !\PC|pc[6]~DUPLICATE_q & ( !\PC|pc [7] & ( (!\PC|pc [9] & ((!\PC|pc[8]~DUPLICATE_q & ((\REGS|regs[9][12]~q ))) # (\PC|pc[8]~DUPLICATE_q & (\REGS|regs[1][12]~q )))) # (\PC|pc [9] & (\REGS|regs[1][12]~q )) ) ) ) + + .dataa(!\REGS|regs[1][12]~q ), + .datab(!\PC|pc [9]), + .datac(!\REGS|regs[9][12]~q ), + .datad(!\PC|pc[8]~DUPLICATE_q ), + .datae(!\PC|pc[6]~DUPLICATE_q ), + .dataf(!\PC|pc [7]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux51~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux51~0 .extended_lut = "off"; +defparam \REGS|Mux51~0 .lut_mask = 64'h1D55555555555555; +defparam \REGS|Mux51~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X32_Y13_N5 +dffeas \REGS|regs[6][12] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[12]~450_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~34_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[6][12]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[6][12] .is_wysiwyg = "true"; +defparam \REGS|regs[6][12] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X33_Y10_N17 +dffeas \REGS|regs[15][12] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[12]~450_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~39_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[15][12]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[15][12] .is_wysiwyg = "true"; +defparam \REGS|regs[15][12] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X32_Y6_N23 +dffeas \REGS|regs[14][12] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[12]~450_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~35_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[14][12]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[14][12] .is_wysiwyg = "true"; +defparam \REGS|regs[14][12] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X33_Y10_N54 +cyclonev_lcell_comb \rt_alu[12]~223 ( +// Equation(s): +// \rt_alu[12]~223_combout = ( \ROM|mem~10_combout & ( (!\ROM|mem~0_combout & (\REGS|regs[6][12]~q )) # (\ROM|mem~0_combout & ((\REGS|regs[14][12]~q ))) ) ) # ( !\ROM|mem~10_combout & ( (!\ROM|mem~0_combout & (\REGS|regs[6][12]~q )) # +// (\ROM|mem~0_combout & ((\REGS|regs[15][12]~q ))) ) ) + + .dataa(!\REGS|regs[6][12]~q ), + .datab(!\REGS|regs[15][12]~q ), + .datac(!\REGS|regs[14][12]~q ), + .datad(!\ROM|mem~0_combout ), + .datae(gnd), + .dataf(!\ROM|mem~10_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[12]~223_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[12]~223 .extended_lut = "off"; +defparam \rt_alu[12]~223 .lut_mask = 64'h55335533550F550F; +defparam \rt_alu[12]~223 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X33_Y10_N18 +cyclonev_lcell_comb \rt_alu[12]~224 ( +// Equation(s): +// \rt_alu[12]~224_combout = ( \REGS|Mux51~2_combout & ( (!\ROM|mem~12_combout & (((\REGS|Mux51~3_combout )) # (\ROM|mem~13_combout ))) # (\ROM|mem~12_combout & (((\rt_alu[12]~223_combout )))) ) ) # ( !\REGS|Mux51~2_combout & ( (!\ROM|mem~12_combout & +// (!\ROM|mem~13_combout & ((\REGS|Mux51~3_combout )))) # (\ROM|mem~12_combout & (((\rt_alu[12]~223_combout )))) ) ) + + .dataa(!\ROM|mem~12_combout ), + .datab(!\ROM|mem~13_combout ), + .datac(!\rt_alu[12]~223_combout ), + .datad(!\REGS|Mux51~3_combout ), + .datae(gnd), + .dataf(!\REGS|Mux51~2_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[12]~224_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[12]~224 .extended_lut = "off"; +defparam \rt_alu[12]~224 .lut_mask = 64'h058D058D27AF27AF; +defparam \rt_alu[12]~224 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X33_Y10_N12 +cyclonev_lcell_comb \rt_alu[12]~225 ( +// Equation(s): +// \rt_alu[12]~225_combout = ( \REGS|Mux51~0_combout & ( \rt_alu[12]~224_combout & ( (!\rt_alu[17]~11_combout & (((\rt_alu[17]~10_combout )) # (\REGS|Mux51~1_combout ))) # (\rt_alu[17]~11_combout & (((!\rt_alu[17]~10_combout ) # (\rt_alu[12]~222_combout +// )))) ) ) ) # ( !\REGS|Mux51~0_combout & ( \rt_alu[12]~224_combout & ( (!\rt_alu[17]~11_combout & (\REGS|Mux51~1_combout & (!\rt_alu[17]~10_combout ))) # (\rt_alu[17]~11_combout & (((!\rt_alu[17]~10_combout ) # (\rt_alu[12]~222_combout )))) ) ) ) # ( +// \REGS|Mux51~0_combout & ( !\rt_alu[12]~224_combout & ( (!\rt_alu[17]~11_combout & (((\rt_alu[17]~10_combout )) # (\REGS|Mux51~1_combout ))) # (\rt_alu[17]~11_combout & (((\rt_alu[17]~10_combout & \rt_alu[12]~222_combout )))) ) ) ) # ( +// !\REGS|Mux51~0_combout & ( !\rt_alu[12]~224_combout & ( (!\rt_alu[17]~11_combout & (\REGS|Mux51~1_combout & (!\rt_alu[17]~10_combout ))) # (\rt_alu[17]~11_combout & (((\rt_alu[17]~10_combout & \rt_alu[12]~222_combout )))) ) ) ) + + .dataa(!\REGS|Mux51~1_combout ), + .datab(!\rt_alu[17]~11_combout ), + .datac(!\rt_alu[17]~10_combout ), + .datad(!\rt_alu[12]~222_combout ), + .datae(!\REGS|Mux51~0_combout ), + .dataf(!\rt_alu[12]~224_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[12]~225_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[12]~225 .extended_lut = "off"; +defparam \rt_alu[12]~225 .lut_mask = 64'h40434C4F70737C7F; +defparam \rt_alu[12]~225 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X33_Y10_N57 +cyclonev_lcell_comb \ROM|mem~22 ( +// Equation(s): +// \ROM|mem~22_combout = ( \ROM|mem~19_combout & ( !\PC|pc [7] ) ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(!\PC|pc [7]), + .datae(gnd), + .dataf(!\ROM|mem~19_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\ROM|mem~22_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \ROM|mem~22 .extended_lut = "off"; +defparam \ROM|mem~22 .lut_mask = 64'h00000000FF00FF00; +defparam \ROM|mem~22 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X33_Y7_N35 +dffeas \REGS|regs[17][12] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[12]~450_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~11_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[17][12]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[17][12] .is_wysiwyg = "true"; +defparam \REGS|regs[17][12] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X33_Y7_N20 +dffeas \REGS|regs[16][12] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[12]~450_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~2_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[16][12]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[16][12] .is_wysiwyg = "true"; +defparam \REGS|regs[16][12] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X33_Y7_N42 +cyclonev_lcell_comb \rt_alu[12]~228 ( +// Equation(s): +// \rt_alu[12]~228_combout = ( \ROM|mem~0_combout & ( \ROM|mem~10_combout & ( \REGS|regs[16][12]~q ) ) ) # ( !\ROM|mem~0_combout & ( \ROM|mem~10_combout & ( \REGS|regs[16][12]~q ) ) ) # ( \ROM|mem~0_combout & ( !\ROM|mem~10_combout & ( +// \REGS|regs[17][12]~q ) ) ) # ( !\ROM|mem~0_combout & ( !\ROM|mem~10_combout & ( \REGS|regs[16][12]~q ) ) ) + + .dataa(!\REGS|regs[17][12]~q ), + .datab(gnd), + .datac(!\REGS|regs[16][12]~q ), + .datad(gnd), + .datae(!\ROM|mem~0_combout ), + .dataf(!\ROM|mem~10_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[12]~228_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[12]~228 .extended_lut = "off"; +defparam \rt_alu[12]~228 .lut_mask = 64'h0F0F55550F0F0F0F; +defparam \rt_alu[12]~228 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X33_Y13_N2 +dffeas \REGS|regs[27][12]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[12]~450_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~15_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[27][12]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[27][12]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[27][12]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: FF_X33_Y12_N23 +dffeas \REGS|regs[19][12] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[12]~450_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~14_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[19][12]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[19][12] .is_wysiwyg = "true"; +defparam \REGS|regs[19][12] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X33_Y13_N48 +cyclonev_lcell_comb \REGS|Mux51~5 ( +// Equation(s): +// \REGS|Mux51~5_combout = ( \PC|pc[8]~DUPLICATE_q & ( \PC|pc [9] & ( \REGS|regs[19][12]~q ) ) ) # ( !\PC|pc[8]~DUPLICATE_q & ( \PC|pc [9] & ( \REGS|regs[19][12]~q ) ) ) # ( \PC|pc[8]~DUPLICATE_q & ( !\PC|pc [9] & ( \REGS|regs[19][12]~q ) ) ) # ( +// !\PC|pc[8]~DUPLICATE_q & ( !\PC|pc [9] & ( (!\PC|pc [7] & ((!\PC|pc [6] & (\REGS|regs[27][12]~DUPLICATE_q )) # (\PC|pc [6] & ((\REGS|regs[19][12]~q ))))) # (\PC|pc [7] & (((\REGS|regs[19][12]~q )))) ) ) ) + + .dataa(!\REGS|regs[27][12]~DUPLICATE_q ), + .datab(!\PC|pc [7]), + .datac(!\PC|pc [6]), + .datad(!\REGS|regs[19][12]~q ), + .datae(!\PC|pc[8]~DUPLICATE_q ), + .dataf(!\PC|pc [9]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux51~5_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux51~5 .extended_lut = "off"; +defparam \REGS|Mux51~5 .lut_mask = 64'h407F00FF00FF00FF; +defparam \REGS|Mux51~5 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X28_Y7_N10 +dffeas \REGS|regs[28][12]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[12]~450_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~8_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[28][12]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[28][12]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[28][12]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: FF_X33_Y10_N44 +dffeas \REGS|regs[29][12] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[12]~450_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~17_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[29][12]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[29][12] .is_wysiwyg = "true"; +defparam \REGS|regs[29][12] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X28_Y12_N36 +cyclonev_lcell_comb \REGS|regs[20][12]~feeder ( +// Equation(s): +// \REGS|regs[20][12]~feeder_combout = ( \rd[12]~450_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[12]~450_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[20][12]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[20][12]~feeder .extended_lut = "off"; +defparam \REGS|regs[20][12]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[20][12]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X28_Y12_N38 +dffeas \REGS|regs[20][12] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[20][12]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~7_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[20][12]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[20][12] .is_wysiwyg = "true"; +defparam \REGS|regs[20][12] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X33_Y10_N45 +cyclonev_lcell_comb \rt_alu[12]~226 ( +// Equation(s): +// \rt_alu[12]~226_combout = ( \ROM|mem~0_combout & ( \ROM|mem~10_combout & ( \REGS|regs[28][12]~DUPLICATE_q ) ) ) # ( !\ROM|mem~0_combout & ( \ROM|mem~10_combout & ( \REGS|regs[20][12]~q ) ) ) # ( \ROM|mem~0_combout & ( !\ROM|mem~10_combout & ( +// \REGS|regs[29][12]~q ) ) ) # ( !\ROM|mem~0_combout & ( !\ROM|mem~10_combout & ( \REGS|regs[20][12]~q ) ) ) + + .dataa(gnd), + .datab(!\REGS|regs[28][12]~DUPLICATE_q ), + .datac(!\REGS|regs[29][12]~q ), + .datad(!\REGS|regs[20][12]~q ), + .datae(!\ROM|mem~0_combout ), + .dataf(!\ROM|mem~10_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[12]~226_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[12]~226 .extended_lut = "off"; +defparam \rt_alu[12]~226 .lut_mask = 64'h00FF0F0F00FF3333; +defparam \rt_alu[12]~226 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X33_Y10_N21 +cyclonev_lcell_comb \rt_alu[12]~227 ( +// Equation(s): +// \rt_alu[12]~227_combout = ( \REGS|Mux51~7_combout & ( (!\ROM|mem~12_combout & (((\rt_alu[12]~226_combout )))) # (\ROM|mem~12_combout & ((!\ROM|mem~13_combout ) # ((\REGS|Mux51~6_combout )))) ) ) # ( !\REGS|Mux51~7_combout & ( (!\ROM|mem~12_combout & +// (((\rt_alu[12]~226_combout )))) # (\ROM|mem~12_combout & (\ROM|mem~13_combout & (\REGS|Mux51~6_combout ))) ) ) + + .dataa(!\ROM|mem~12_combout ), + .datab(!\ROM|mem~13_combout ), + .datac(!\REGS|Mux51~6_combout ), + .datad(!\rt_alu[12]~226_combout ), + .datae(gnd), + .dataf(!\REGS|Mux51~7_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[12]~227_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[12]~227 .extended_lut = "off"; +defparam \rt_alu[12]~227 .lut_mask = 64'h01AB01AB45EF45EF; +defparam \rt_alu[12]~227 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X33_Y10_N6 +cyclonev_lcell_comb \rt_alu[12]~229 ( +// Equation(s): +// \rt_alu[12]~229_combout = ( \REGS|Mux51~5_combout & ( \rt_alu[12]~227_combout & ( (!\rt_alu[17]~5_combout & (((\rt_alu[12]~228_combout )) # (\rt_alu[17]~4_combout ))) # (\rt_alu[17]~5_combout & ((!\rt_alu[17]~4_combout ) # ((\REGS|Mux51~4_combout +// )))) ) ) ) # ( !\REGS|Mux51~5_combout & ( \rt_alu[12]~227_combout & ( (!\rt_alu[17]~5_combout & (((\rt_alu[12]~228_combout )) # (\rt_alu[17]~4_combout ))) # (\rt_alu[17]~5_combout & (\rt_alu[17]~4_combout & (\REGS|Mux51~4_combout ))) ) ) ) # ( +// \REGS|Mux51~5_combout & ( !\rt_alu[12]~227_combout & ( (!\rt_alu[17]~5_combout & (!\rt_alu[17]~4_combout & ((\rt_alu[12]~228_combout )))) # (\rt_alu[17]~5_combout & ((!\rt_alu[17]~4_combout ) # ((\REGS|Mux51~4_combout )))) ) ) ) # ( +// !\REGS|Mux51~5_combout & ( !\rt_alu[12]~227_combout & ( (!\rt_alu[17]~5_combout & (!\rt_alu[17]~4_combout & ((\rt_alu[12]~228_combout )))) # (\rt_alu[17]~5_combout & (\rt_alu[17]~4_combout & (\REGS|Mux51~4_combout ))) ) ) ) + + .dataa(!\rt_alu[17]~5_combout ), + .datab(!\rt_alu[17]~4_combout ), + .datac(!\REGS|Mux51~4_combout ), + .datad(!\rt_alu[12]~228_combout ), + .datae(!\REGS|Mux51~5_combout ), + .dataf(!\rt_alu[12]~227_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[12]~229_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[12]~229 .extended_lut = "off"; +defparam \rt_alu[12]~229 .lut_mask = 64'h018945CD23AB67EF; +defparam \rt_alu[12]~229 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X33_Y10_N30 +cyclonev_lcell_comb \rt_alu[12]~230 ( +// Equation(s): +// \rt_alu[12]~230_combout = ( \ROM|mem~22_combout & ( \rt_alu[12]~229_combout & ( ((!\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout & ((\rt_alu[12]~225_combout ) # (\ROM|mem~9_combout )))) # (\rt_alu[5]~32_combout ) ) ) ) # ( !\ROM|mem~22_combout & ( +// \rt_alu[12]~229_combout & ( (!\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout & ((\rt_alu[12]~225_combout ) # (\ROM|mem~9_combout ))) ) ) ) # ( \ROM|mem~22_combout & ( !\rt_alu[12]~229_combout & ( ((!\ROM|mem~9_combout & +// (!\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout & \rt_alu[12]~225_combout ))) # (\rt_alu[5]~32_combout ) ) ) ) # ( !\ROM|mem~22_combout & ( !\rt_alu[12]~229_combout & ( (!\ROM|mem~9_combout & (!\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout & +// \rt_alu[12]~225_combout )) ) ) ) + + .dataa(!\ROM|mem~9_combout ), + .datab(!\rt_alu[5]~32_combout ), + .datac(!\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout ), + .datad(!\rt_alu[12]~225_combout ), + .datae(!\ROM|mem~22_combout ), + .dataf(!\rt_alu[12]~229_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[12]~230_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[12]~230 .extended_lut = "off"; +defparam \rt_alu[12]~230 .lut_mask = 64'h00A033B350F073F3; +defparam \rt_alu[12]~230 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y12_N18 +cyclonev_lcell_comb \rd[13]~452 ( +// Equation(s): +// \rd[13]~452_combout = ( \ALU|adder_unit|OUT_1 [13] & ( (!\CONTROL_UNIT|M2R[0]~0_combout & ((!\ALU|Mux29~0_combout ) # (\ALU|Mux18~0_combout ))) ) ) # ( !\ALU|adder_unit|OUT_1 [13] & ( (!\CONTROL_UNIT|M2R[0]~0_combout & \ALU|Mux18~0_combout ) ) ) + + .dataa(!\ALU|Mux29~0_combout ), + .datab(!\CONTROL_UNIT|M2R[0]~0_combout ), + .datac(!\ALU|Mux18~0_combout ), + .datad(gnd), + .datae(!\ALU|adder_unit|OUT_1 [13]), + .dataf(gnd), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[13]~452_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[13]~452 .extended_lut = "off"; +defparam \rd[13]~452 .lut_mask = 64'h0C0C8C8C0C0C8C8C; +defparam \rd[13]~452 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X31_Y12_N10 +dffeas \REGS|regs[8][13] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[13]~452_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~24_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[8][13]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[8][13] .is_wysiwyg = "true"; +defparam \REGS|regs[8][13] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X36_Y12_N18 +cyclonev_lcell_comb \REGS|Mux50~6 ( +// Equation(s): +// \REGS|Mux50~6_combout = ( \REGS|regs[8][13]~q & ( !\PC|pc [8] & ( (!\PC|pc [9] & (!\PC|pc [7] & !\PC|pc[6]~DUPLICATE_q )) ) ) ) + + .dataa(!\PC|pc [9]), + .datab(gnd), + .datac(!\PC|pc [7]), + .datad(!\PC|pc[6]~DUPLICATE_q ), + .datae(!\REGS|regs[8][13]~q ), + .dataf(!\PC|pc [8]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux50~6_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux50~6 .extended_lut = "off"; +defparam \REGS|Mux50~6 .lut_mask = 64'h0000A00000000000; +defparam \REGS|Mux50~6 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X30_Y7_N53 +dffeas \REGS|regs[1][13] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[13]~452_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~28_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[1][13]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[1][13] .is_wysiwyg = "true"; +defparam \REGS|regs[1][13] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X30_Y8_N42 +cyclonev_lcell_comb \REGS|Mux50~5 ( +// Equation(s): +// \REGS|Mux50~5_combout = ( \PC|pc[8]~DUPLICATE_q & ( \REGS|regs[9][13]~q & ( \REGS|regs[1][13]~q ) ) ) # ( !\PC|pc[8]~DUPLICATE_q & ( \REGS|regs[9][13]~q & ( ((!\PC|pc [6] & (!\PC|pc[7]~DUPLICATE_q & !\PC|pc[9]~DUPLICATE_q ))) # (\REGS|regs[1][13]~q +// ) ) ) ) # ( \PC|pc[8]~DUPLICATE_q & ( !\REGS|regs[9][13]~q & ( \REGS|regs[1][13]~q ) ) ) # ( !\PC|pc[8]~DUPLICATE_q & ( !\REGS|regs[9][13]~q & ( (\REGS|regs[1][13]~q & (((\PC|pc[9]~DUPLICATE_q ) # (\PC|pc[7]~DUPLICATE_q )) # (\PC|pc [6]))) ) ) ) + + .dataa(!\PC|pc [6]), + .datab(!\PC|pc[7]~DUPLICATE_q ), + .datac(!\REGS|regs[1][13]~q ), + .datad(!\PC|pc[9]~DUPLICATE_q ), + .datae(!\PC|pc[8]~DUPLICATE_q ), + .dataf(!\REGS|regs[9][13]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux50~5_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux50~5 .extended_lut = "off"; +defparam \REGS|Mux50~5 .lut_mask = 64'h070F0F0F8F0F0F0F; +defparam \REGS|Mux50~5 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X30_Y9_N20 +dffeas \REGS|regs[11][13] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[13]~452_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~37_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[11][13]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[11][13] .is_wysiwyg = "true"; +defparam \REGS|regs[11][13] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X30_Y9_N50 +dffeas \REGS|regs[2][13] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[13]~452_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~32_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[2][13]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[2][13] .is_wysiwyg = "true"; +defparam \REGS|regs[2][13] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X30_Y9_N41 +dffeas \REGS|regs[10][13] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[13]~452_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~33_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[10][13]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[10][13] .is_wysiwyg = "true"; +defparam \REGS|regs[10][13] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X30_Y9_N12 +cyclonev_lcell_comb \rt_alu[13]~242 ( +// Equation(s): +// \rt_alu[13]~242_combout = ( \ROM|mem~10_combout & ( \ROM|mem~0_combout & ( \REGS|regs[10][13]~q ) ) ) # ( !\ROM|mem~10_combout & ( \ROM|mem~0_combout & ( \REGS|regs[11][13]~q ) ) ) # ( \ROM|mem~10_combout & ( !\ROM|mem~0_combout & ( +// \REGS|regs[2][13]~q ) ) ) # ( !\ROM|mem~10_combout & ( !\ROM|mem~0_combout & ( \REGS|regs[2][13]~q ) ) ) + + .dataa(!\REGS|regs[11][13]~q ), + .datab(gnd), + .datac(!\REGS|regs[2][13]~q ), + .datad(!\REGS|regs[10][13]~q ), + .datae(!\ROM|mem~10_combout ), + .dataf(!\ROM|mem~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[13]~242_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[13]~242 .extended_lut = "off"; +defparam \rt_alu[13]~242 .lut_mask = 64'h0F0F0F0F555500FF; +defparam \rt_alu[13]~242 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X30_Y6_N25 +dffeas \REGS|regs[14][13] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[13]~452_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~35_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[14][13]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[14][13] .is_wysiwyg = "true"; +defparam \REGS|regs[14][13] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X30_Y6_N41 +dffeas \REGS|regs[6][13] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[13]~452_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~34_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[6][13]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[6][13] .is_wysiwyg = "true"; +defparam \REGS|regs[6][13] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X30_Y12_N36 +cyclonev_lcell_comb \REGS|regs[15][13]~feeder ( +// Equation(s): +// \REGS|regs[15][13]~feeder_combout = ( \rd[13]~452_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[13]~452_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[15][13]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[15][13]~feeder .extended_lut = "off"; +defparam \REGS|regs[15][13]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[15][13]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X30_Y12_N38 +dffeas \REGS|regs[15][13] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[15][13]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~39_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[15][13]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[15][13] .is_wysiwyg = "true"; +defparam \REGS|regs[15][13] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X30_Y12_N3 +cyclonev_lcell_comb \rt_alu[13]~243 ( +// Equation(s): +// \rt_alu[13]~243_combout = ( \ROM|mem~0_combout & ( \ROM|mem~10_combout & ( \REGS|regs[14][13]~q ) ) ) # ( !\ROM|mem~0_combout & ( \ROM|mem~10_combout & ( \REGS|regs[6][13]~q ) ) ) # ( \ROM|mem~0_combout & ( !\ROM|mem~10_combout & ( +// \REGS|regs[15][13]~q ) ) ) # ( !\ROM|mem~0_combout & ( !\ROM|mem~10_combout & ( \REGS|regs[6][13]~q ) ) ) + + .dataa(!\REGS|regs[14][13]~q ), + .datab(gnd), + .datac(!\REGS|regs[6][13]~q ), + .datad(!\REGS|regs[15][13]~q ), + .datae(!\ROM|mem~0_combout ), + .dataf(!\ROM|mem~10_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[13]~243_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[13]~243 .extended_lut = "off"; +defparam \rt_alu[13]~243 .lut_mask = 64'h0F0F00FF0F0F5555; +defparam \rt_alu[13]~243 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X30_Y12_N42 +cyclonev_lcell_comb \rt_alu[13]~244 ( +// Equation(s): +// \rt_alu[13]~244_combout = ( \rt_alu[13]~243_combout & ( \ROM|mem~12_combout ) ) # ( \rt_alu[13]~243_combout & ( !\ROM|mem~12_combout & ( (!\ROM|mem~13_combout & ((\REGS|Mux50~0_combout ))) # (\ROM|mem~13_combout & (\REGS|Mux50~1_combout )) ) ) ) # +// ( !\rt_alu[13]~243_combout & ( !\ROM|mem~12_combout & ( (!\ROM|mem~13_combout & ((\REGS|Mux50~0_combout ))) # (\ROM|mem~13_combout & (\REGS|Mux50~1_combout )) ) ) ) + + .dataa(!\REGS|Mux50~1_combout ), + .datab(gnd), + .datac(!\ROM|mem~13_combout ), + .datad(!\REGS|Mux50~0_combout ), + .datae(!\rt_alu[13]~243_combout ), + .dataf(!\ROM|mem~12_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[13]~244_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[13]~244 .extended_lut = "off"; +defparam \rt_alu[13]~244 .lut_mask = 64'h05F505F50000FFFF; +defparam \rt_alu[13]~244 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X36_Y12_N54 +cyclonev_lcell_comb \rt_alu[13]~245 ( +// Equation(s): +// \rt_alu[13]~245_combout = ( \rt_alu[13]~242_combout & ( \rt_alu[13]~244_combout & ( ((!\rt_alu[17]~10_combout & (\REGS|Mux50~6_combout )) # (\rt_alu[17]~10_combout & ((\REGS|Mux50~5_combout )))) # (\rt_alu[17]~11_combout ) ) ) ) # ( +// !\rt_alu[13]~242_combout & ( \rt_alu[13]~244_combout & ( (!\rt_alu[17]~11_combout & ((!\rt_alu[17]~10_combout & (\REGS|Mux50~6_combout )) # (\rt_alu[17]~10_combout & ((\REGS|Mux50~5_combout ))))) # (\rt_alu[17]~11_combout & +// (((!\rt_alu[17]~10_combout )))) ) ) ) # ( \rt_alu[13]~242_combout & ( !\rt_alu[13]~244_combout & ( (!\rt_alu[17]~11_combout & ((!\rt_alu[17]~10_combout & (\REGS|Mux50~6_combout )) # (\rt_alu[17]~10_combout & ((\REGS|Mux50~5_combout ))))) # +// (\rt_alu[17]~11_combout & (((\rt_alu[17]~10_combout )))) ) ) ) # ( !\rt_alu[13]~242_combout & ( !\rt_alu[13]~244_combout & ( (!\rt_alu[17]~11_combout & ((!\rt_alu[17]~10_combout & (\REGS|Mux50~6_combout )) # (\rt_alu[17]~10_combout & +// ((\REGS|Mux50~5_combout ))))) ) ) ) + + .dataa(!\REGS|Mux50~6_combout ), + .datab(!\rt_alu[17]~11_combout ), + .datac(!\rt_alu[17]~10_combout ), + .datad(!\REGS|Mux50~5_combout ), + .datae(!\rt_alu[13]~242_combout ), + .dataf(!\rt_alu[13]~244_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[13]~245_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[13]~245 .extended_lut = "off"; +defparam \rt_alu[13]~245 .lut_mask = 64'h404C434F707C737F; +defparam \rt_alu[13]~245 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X36_Y12_N48 +cyclonev_lcell_comb \ALU|adder_unit|operand[13]~14 ( +// Equation(s): +// \ALU|adder_unit|operand[13]~14_combout = ( \rt_alu[13]~245_combout & ( \rt_alu[13]~250_combout & ( !\CONTROL_UNIT|ALU_FN [1] $ (((!\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout ) # (\rt_alu[13]~246_combout ))) ) ) ) # ( !\rt_alu[13]~245_combout & ( +// \rt_alu[13]~250_combout & ( !\CONTROL_UNIT|ALU_FN [1] $ ((((\ROM|mem~9_combout & !\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout )) # (\rt_alu[13]~246_combout ))) ) ) ) # ( \rt_alu[13]~245_combout & ( !\rt_alu[13]~250_combout & ( !\CONTROL_UNIT|ALU_FN [1] +// $ ((((!\ROM|mem~9_combout & !\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout )) # (\rt_alu[13]~246_combout ))) ) ) ) # ( !\rt_alu[13]~245_combout & ( !\rt_alu[13]~250_combout & ( !\CONTROL_UNIT|ALU_FN [1] $ (\rt_alu[13]~246_combout ) ) ) ) + + .dataa(!\ROM|mem~9_combout ), + .datab(!\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout ), + .datac(!\CONTROL_UNIT|ALU_FN [1]), + .datad(!\rt_alu[13]~246_combout ), + .datae(!\rt_alu[13]~245_combout ), + .dataf(!\rt_alu[13]~250_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\ALU|adder_unit|operand[13]~14_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \ALU|adder_unit|operand[13]~14 .extended_lut = "off"; +defparam \ALU|adder_unit|operand[13]~14 .lut_mask = 64'hF00F780FB40F3C0F; +defparam \ALU|adder_unit|operand[13]~14 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y12_N54 +cyclonev_lcell_comb \ALU|Mux17~0 ( +// Equation(s): +// \ALU|Mux17~0_combout = ( \ALU|Mux15~0_combout & ( \rt_alu[14]~270_combout & ( (!\REGS|Mux17~2_combout & (((\CONTROL_UNIT|ALU_FN [1] & !\CONTROL_UNIT|ALU_FN [0])) # (\ALU|Mux29~1_combout ))) # (\REGS|Mux17~2_combout & (\CONTROL_UNIT|ALU_FN [1])) ) ) ) +// # ( !\ALU|Mux15~0_combout & ( \rt_alu[14]~270_combout & ( (\ALU|Mux29~1_combout & !\REGS|Mux17~2_combout ) ) ) ) # ( \ALU|Mux15~0_combout & ( !\rt_alu[14]~270_combout & ( (!\REGS|Mux17~2_combout & (!\CONTROL_UNIT|ALU_FN [1])) # +// (\REGS|Mux17~2_combout & (((\CONTROL_UNIT|ALU_FN [1] & !\CONTROL_UNIT|ALU_FN [0])) # (\ALU|Mux29~1_combout ))) ) ) ) # ( !\ALU|Mux15~0_combout & ( !\rt_alu[14]~270_combout & ( (\ALU|Mux29~1_combout & \REGS|Mux17~2_combout ) ) ) ) + + .dataa(!\CONTROL_UNIT|ALU_FN [1]), + .datab(!\ALU|Mux29~1_combout ), + .datac(!\REGS|Mux17~2_combout ), + .datad(!\CONTROL_UNIT|ALU_FN [0]), + .datae(!\ALU|Mux15~0_combout ), + .dataf(!\rt_alu[14]~270_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\ALU|Mux17~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \ALU|Mux17~0 .extended_lut = "off"; +defparam \ALU|Mux17~0 .lut_mask = 64'h0303A7A330307535; +defparam \ALU|Mux17~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y12_N30 +cyclonev_lcell_comb \rd[14]~454 ( +// Equation(s): +// \rd[14]~454_combout = ( \ALU|Mux17~0_combout & ( !\CONTROL_UNIT|M2R[0]~0_combout ) ) # ( !\ALU|Mux17~0_combout & ( (!\CONTROL_UNIT|M2R[0]~0_combout & (!\ALU|Mux29~0_combout & \ALU|adder_unit|OUT_1 [14])) ) ) + + .dataa(gnd), + .datab(!\CONTROL_UNIT|M2R[0]~0_combout ), + .datac(!\ALU|Mux29~0_combout ), + .datad(!\ALU|adder_unit|OUT_1 [14]), + .datae(!\ALU|Mux17~0_combout ), + .dataf(gnd), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[14]~454_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[14]~454 .extended_lut = "off"; +defparam \rd[14]~454 .lut_mask = 64'h00C0CCCC00C0CCCC; +defparam \rd[14]~454 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X32_Y14_N8 +dffeas \REGS|regs[17][14] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[14]~454_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~11_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[17][14]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[17][14] .is_wysiwyg = "true"; +defparam \REGS|regs[17][14] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X30_Y14_N57 +cyclonev_lcell_comb \REGS|regs[16][14]~feeder ( +// Equation(s): +// \REGS|regs[16][14]~feeder_combout = ( \rd[14]~454_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[14]~454_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[16][14]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[16][14]~feeder .extended_lut = "off"; +defparam \REGS|regs[16][14]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[16][14]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X30_Y14_N58 +dffeas \REGS|regs[16][14] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[16][14]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~2_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[16][14]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[16][14] .is_wysiwyg = "true"; +defparam \REGS|regs[16][14] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y14_N54 +cyclonev_lcell_comb \rt_alu[14]~264 ( +// Equation(s): +// \rt_alu[14]~264_combout = ( \ROM|mem~0_combout & ( \ROM|mem~10_combout & ( \REGS|regs[16][14]~q ) ) ) # ( !\ROM|mem~0_combout & ( \ROM|mem~10_combout & ( \REGS|regs[16][14]~q ) ) ) # ( \ROM|mem~0_combout & ( !\ROM|mem~10_combout & ( +// \REGS|regs[17][14]~q ) ) ) # ( !\ROM|mem~0_combout & ( !\ROM|mem~10_combout & ( \REGS|regs[16][14]~q ) ) ) + + .dataa(gnd), + .datab(!\REGS|regs[17][14]~q ), + .datac(gnd), + .datad(!\REGS|regs[16][14]~q ), + .datae(!\ROM|mem~0_combout ), + .dataf(!\ROM|mem~10_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[14]~264_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[14]~264 .extended_lut = "off"; +defparam \rt_alu[14]~264 .lut_mask = 64'h00FF333300FF00FF; +defparam \rt_alu[14]~264 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X30_Y10_N47 +dffeas \REGS|regs[27][14] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[14]~454_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~15_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[27][14]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[27][14] .is_wysiwyg = "true"; +defparam \REGS|regs[27][14] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y5_N24 +cyclonev_lcell_comb \REGS|regs[19][14]~feeder ( +// Equation(s): +// \REGS|regs[19][14]~feeder_combout = ( \rd[14]~454_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[14]~454_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[19][14]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[19][14]~feeder .extended_lut = "off"; +defparam \REGS|regs[19][14]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[19][14]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X32_Y5_N26 +dffeas \REGS|regs[19][14] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[19][14]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~14_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[19][14]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[19][14] .is_wysiwyg = "true"; +defparam \REGS|regs[19][14] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X30_Y10_N42 +cyclonev_lcell_comb \REGS|Mux49~1 ( +// Equation(s): +// \REGS|Mux49~1_combout = ( \PC|pc [8] & ( \REGS|regs[19][14]~q ) ) # ( !\PC|pc [8] & ( \REGS|regs[19][14]~q & ( (((\PC|pc[6]~DUPLICATE_q ) # (\PC|pc [9])) # (\REGS|regs[27][14]~q )) # (\PC|pc [7]) ) ) ) # ( !\PC|pc [8] & ( !\REGS|regs[19][14]~q & ( +// (!\PC|pc [7] & (\REGS|regs[27][14]~q & (!\PC|pc [9] & !\PC|pc[6]~DUPLICATE_q ))) ) ) ) + + .dataa(!\PC|pc [7]), + .datab(!\REGS|regs[27][14]~q ), + .datac(!\PC|pc [9]), + .datad(!\PC|pc[6]~DUPLICATE_q ), + .datae(!\PC|pc [8]), + .dataf(!\REGS|regs[19][14]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux49~1_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux49~1 .extended_lut = "off"; +defparam \REGS|Mux49~1 .lut_mask = 64'h200000007FFFFFFF; +defparam \REGS|Mux49~1 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X32_Y10_N38 +dffeas \REGS|regs[29][14] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[14]~454_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~17_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[29][14]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[29][14] .is_wysiwyg = "true"; +defparam \REGS|regs[29][14] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X23_Y10_N28 +dffeas \REGS|regs[28][14] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[14]~454_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~8_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[28][14]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[28][14] .is_wysiwyg = "true"; +defparam \REGS|regs[28][14] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X31_Y10_N52 +dffeas \REGS|regs[20][14] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[14]~454_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~7_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[20][14]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[20][14] .is_wysiwyg = "true"; +defparam \REGS|regs[20][14] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y10_N39 +cyclonev_lcell_comb \rt_alu[14]~262 ( +// Equation(s): +// \rt_alu[14]~262_combout = ( \REGS|regs[20][14]~q & ( \ROM|mem~10_combout & ( (!\ROM|mem~0_combout ) # (\REGS|regs[28][14]~q ) ) ) ) # ( !\REGS|regs[20][14]~q & ( \ROM|mem~10_combout & ( (\REGS|regs[28][14]~q & \ROM|mem~0_combout ) ) ) ) # ( +// \REGS|regs[20][14]~q & ( !\ROM|mem~10_combout & ( (!\ROM|mem~0_combout ) # (\REGS|regs[29][14]~q ) ) ) ) # ( !\REGS|regs[20][14]~q & ( !\ROM|mem~10_combout & ( (\REGS|regs[29][14]~q & \ROM|mem~0_combout ) ) ) ) + + .dataa(!\REGS|regs[29][14]~q ), + .datab(gnd), + .datac(!\REGS|regs[28][14]~q ), + .datad(!\ROM|mem~0_combout ), + .datae(!\REGS|regs[20][14]~q ), + .dataf(!\ROM|mem~10_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[14]~262_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[14]~262 .extended_lut = "off"; +defparam \rt_alu[14]~262 .lut_mask = 64'h0055FF55000FFF0F; +defparam \rt_alu[14]~262 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y10_N51 +cyclonev_lcell_comb \rt_alu[14]~263 ( +// Equation(s): +// \rt_alu[14]~263_combout = ( \rt_alu[14]~262_combout & ( (!\ROM|mem~12_combout ) # ((!\ROM|mem~13_combout & ((\REGS|Mux49~3_combout ))) # (\ROM|mem~13_combout & (\REGS|Mux49~2_combout ))) ) ) # ( !\rt_alu[14]~262_combout & ( (\ROM|mem~12_combout & +// ((!\ROM|mem~13_combout & ((\REGS|Mux49~3_combout ))) # (\ROM|mem~13_combout & (\REGS|Mux49~2_combout )))) ) ) + + .dataa(!\ROM|mem~12_combout ), + .datab(!\ROM|mem~13_combout ), + .datac(!\REGS|Mux49~2_combout ), + .datad(!\REGS|Mux49~3_combout ), + .datae(gnd), + .dataf(!\rt_alu[14]~262_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[14]~263_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[14]~263 .extended_lut = "off"; +defparam \rt_alu[14]~263 .lut_mask = 64'h01450145ABEFABEF; +defparam \rt_alu[14]~263 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y10_N0 +cyclonev_lcell_comb \rt_alu[14]~265 ( +// Equation(s): +// \rt_alu[14]~265_combout = ( \REGS|Mux49~0_combout & ( \rt_alu[14]~263_combout & ( ((!\rt_alu[17]~5_combout & (\rt_alu[14]~264_combout )) # (\rt_alu[17]~5_combout & ((\REGS|Mux49~1_combout )))) # (\rt_alu[17]~4_combout ) ) ) ) # ( +// !\REGS|Mux49~0_combout & ( \rt_alu[14]~263_combout & ( (!\rt_alu[17]~4_combout & ((!\rt_alu[17]~5_combout & (\rt_alu[14]~264_combout )) # (\rt_alu[17]~5_combout & ((\REGS|Mux49~1_combout ))))) # (\rt_alu[17]~4_combout & (!\rt_alu[17]~5_combout )) ) +// ) ) # ( \REGS|Mux49~0_combout & ( !\rt_alu[14]~263_combout & ( (!\rt_alu[17]~4_combout & ((!\rt_alu[17]~5_combout & (\rt_alu[14]~264_combout )) # (\rt_alu[17]~5_combout & ((\REGS|Mux49~1_combout ))))) # (\rt_alu[17]~4_combout & +// (\rt_alu[17]~5_combout )) ) ) ) # ( !\REGS|Mux49~0_combout & ( !\rt_alu[14]~263_combout & ( (!\rt_alu[17]~4_combout & ((!\rt_alu[17]~5_combout & (\rt_alu[14]~264_combout )) # (\rt_alu[17]~5_combout & ((\REGS|Mux49~1_combout ))))) ) ) ) + + .dataa(!\rt_alu[17]~4_combout ), + .datab(!\rt_alu[17]~5_combout ), + .datac(!\rt_alu[14]~264_combout ), + .datad(!\REGS|Mux49~1_combout ), + .datae(!\REGS|Mux49~0_combout ), + .dataf(!\rt_alu[14]~263_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[14]~265_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[14]~265 .extended_lut = "off"; +defparam \rt_alu[14]~265 .lut_mask = 64'h082A193B4C6E5D7F; +defparam \rt_alu[14]~265 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X30_Y7_N32 +dffeas \REGS|regs[1][14] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[14]~454_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~28_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[1][14]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[1][14] .is_wysiwyg = "true"; +defparam \REGS|regs[1][14] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X30_Y7_N15 +cyclonev_lcell_comb \REGS|Mux49~4 ( +// Equation(s): +// \REGS|Mux49~4_combout = ( \PC|pc[8]~DUPLICATE_q & ( \PC|pc [7] & ( \REGS|regs[1][14]~q ) ) ) # ( !\PC|pc[8]~DUPLICATE_q & ( \PC|pc [7] & ( \REGS|regs[1][14]~q ) ) ) # ( \PC|pc[8]~DUPLICATE_q & ( !\PC|pc [7] & ( \REGS|regs[1][14]~q ) ) ) # ( +// !\PC|pc[8]~DUPLICATE_q & ( !\PC|pc [7] & ( (!\PC|pc [9] & ((!\PC|pc[6]~DUPLICATE_q & (\REGS|regs[9][14]~q )) # (\PC|pc[6]~DUPLICATE_q & ((\REGS|regs[1][14]~q ))))) # (\PC|pc [9] & (((\REGS|regs[1][14]~q )))) ) ) ) + + .dataa(!\REGS|regs[9][14]~q ), + .datab(!\PC|pc [9]), + .datac(!\REGS|regs[1][14]~q ), + .datad(!\PC|pc[6]~DUPLICATE_q ), + .datae(!\PC|pc[8]~DUPLICATE_q ), + .dataf(!\PC|pc [7]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux49~4_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux49~4 .extended_lut = "off"; +defparam \REGS|Mux49~4 .lut_mask = 64'h470F0F0F0F0F0F0F; +defparam \REGS|Mux49~4 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X25_Y10_N8 +dffeas \REGS|regs[8][14] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[8][14]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~24_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[8][14]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[8][14] .is_wysiwyg = "true"; +defparam \REGS|regs[8][14] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X25_Y10_N15 +cyclonev_lcell_comb \REGS|Mux49~5 ( +// Equation(s): +// \REGS|Mux49~5_combout = ( !\PC|pc[6]~DUPLICATE_q & ( !\PC|pc[9]~DUPLICATE_q & ( (!\PC|pc [8] & (\REGS|regs[8][14]~q & !\PC|pc [7])) ) ) ) + + .dataa(gnd), + .datab(!\PC|pc [8]), + .datac(!\REGS|regs[8][14]~q ), + .datad(!\PC|pc [7]), + .datae(!\PC|pc[6]~DUPLICATE_q ), + .dataf(!\PC|pc[9]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux49~5_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux49~5 .extended_lut = "off"; +defparam \REGS|Mux49~5 .lut_mask = 64'h0C00000000000000; +defparam \REGS|Mux49~5 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X32_Y10_N22 +dffeas \REGS|regs[11][14] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[14]~454_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~37_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[11][14]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[11][14] .is_wysiwyg = "true"; +defparam \REGS|regs[11][14] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X30_Y9_N4 +dffeas \REGS|regs[10][14]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[14]~454_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~33_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[10][14]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[10][14]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[10][14]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: FF_X31_Y10_N22 +dffeas \REGS|regs[2][14] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[14]~454_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~32_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[2][14]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[2][14] .is_wysiwyg = "true"; +defparam \REGS|regs[2][14] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y10_N54 +cyclonev_lcell_comb \rt_alu[14]~266 ( +// Equation(s): +// \rt_alu[14]~266_combout = ( \ROM|mem~10_combout & ( (!\ROM|mem~0_combout & ((\REGS|regs[2][14]~q ))) # (\ROM|mem~0_combout & (\REGS|regs[10][14]~DUPLICATE_q )) ) ) # ( !\ROM|mem~10_combout & ( (!\ROM|mem~0_combout & ((\REGS|regs[2][14]~q ))) # +// (\ROM|mem~0_combout & (\REGS|regs[11][14]~q )) ) ) + + .dataa(!\ROM|mem~0_combout ), + .datab(!\REGS|regs[11][14]~q ), + .datac(!\REGS|regs[10][14]~DUPLICATE_q ), + .datad(!\REGS|regs[2][14]~q ), + .datae(gnd), + .dataf(!\ROM|mem~10_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[14]~266_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[14]~266 .extended_lut = "off"; +defparam \rt_alu[14]~266 .lut_mask = 64'h11BB11BB05AF05AF; +defparam \rt_alu[14]~266 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y6_N42 +cyclonev_lcell_comb \REGS|regs[6][14]~feeder ( +// Equation(s): +// \REGS|regs[6][14]~feeder_combout = ( \rd[14]~454_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[14]~454_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[6][14]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[6][14]~feeder .extended_lut = "off"; +defparam \REGS|regs[6][14]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[6][14]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X32_Y6_N43 +dffeas \REGS|regs[6][14] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[6][14]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~34_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[6][14]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[6][14] .is_wysiwyg = "true"; +defparam \REGS|regs[6][14] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X32_Y10_N14 +dffeas \REGS|regs[15][14] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[14]~454_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~39_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[15][14]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[15][14] .is_wysiwyg = "true"; +defparam \REGS|regs[15][14] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y10_N22 +dffeas \REGS|regs[14][14] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[14]~454_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~35_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[14][14]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[14][14] .is_wysiwyg = "true"; +defparam \REGS|regs[14][14] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y10_N15 +cyclonev_lcell_comb \rt_alu[14]~267 ( +// Equation(s): +// \rt_alu[14]~267_combout = ( \REGS|regs[14][14]~q & ( \ROM|mem~10_combout & ( (\ROM|mem~0_combout ) # (\REGS|regs[6][14]~q ) ) ) ) # ( !\REGS|regs[14][14]~q & ( \ROM|mem~10_combout & ( (\REGS|regs[6][14]~q & !\ROM|mem~0_combout ) ) ) ) # ( +// \REGS|regs[14][14]~q & ( !\ROM|mem~10_combout & ( (!\ROM|mem~0_combout & (\REGS|regs[6][14]~q )) # (\ROM|mem~0_combout & ((\REGS|regs[15][14]~q ))) ) ) ) # ( !\REGS|regs[14][14]~q & ( !\ROM|mem~10_combout & ( (!\ROM|mem~0_combout & +// (\REGS|regs[6][14]~q )) # (\ROM|mem~0_combout & ((\REGS|regs[15][14]~q ))) ) ) ) + + .dataa(!\REGS|regs[6][14]~q ), + .datab(gnd), + .datac(!\REGS|regs[15][14]~q ), + .datad(!\ROM|mem~0_combout ), + .datae(!\REGS|regs[14][14]~q ), + .dataf(!\ROM|mem~10_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[14]~267_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[14]~267 .extended_lut = "off"; +defparam \rt_alu[14]~267 .lut_mask = 64'h550F550F550055FF; +defparam \rt_alu[14]~267 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y10_N48 +cyclonev_lcell_comb \rt_alu[14]~268 ( +// Equation(s): +// \rt_alu[14]~268_combout = ( \rt_alu[14]~267_combout & ( ((!\ROM|mem~13_combout & ((\REGS|Mux49~7_combout ))) # (\ROM|mem~13_combout & (\REGS|Mux49~6_combout ))) # (\ROM|mem~12_combout ) ) ) # ( !\rt_alu[14]~267_combout & ( (!\ROM|mem~12_combout & +// ((!\ROM|mem~13_combout & ((\REGS|Mux49~7_combout ))) # (\ROM|mem~13_combout & (\REGS|Mux49~6_combout )))) ) ) + + .dataa(!\ROM|mem~12_combout ), + .datab(!\ROM|mem~13_combout ), + .datac(!\REGS|Mux49~6_combout ), + .datad(!\REGS|Mux49~7_combout ), + .datae(gnd), + .dataf(!\rt_alu[14]~267_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[14]~268_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[14]~268 .extended_lut = "off"; +defparam \rt_alu[14]~268 .lut_mask = 64'h028A028A57DF57DF; +defparam \rt_alu[14]~268 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y10_N24 +cyclonev_lcell_comb \rt_alu[14]~269 ( +// Equation(s): +// \rt_alu[14]~269_combout = ( \rt_alu[14]~266_combout & ( \rt_alu[14]~268_combout & ( ((!\rt_alu[17]~10_combout & ((\REGS|Mux49~5_combout ))) # (\rt_alu[17]~10_combout & (\REGS|Mux49~4_combout ))) # (\rt_alu[17]~11_combout ) ) ) ) # ( +// !\rt_alu[14]~266_combout & ( \rt_alu[14]~268_combout & ( (!\rt_alu[17]~11_combout & ((!\rt_alu[17]~10_combout & ((\REGS|Mux49~5_combout ))) # (\rt_alu[17]~10_combout & (\REGS|Mux49~4_combout )))) # (\rt_alu[17]~11_combout & +// (((!\rt_alu[17]~10_combout )))) ) ) ) # ( \rt_alu[14]~266_combout & ( !\rt_alu[14]~268_combout & ( (!\rt_alu[17]~11_combout & ((!\rt_alu[17]~10_combout & ((\REGS|Mux49~5_combout ))) # (\rt_alu[17]~10_combout & (\REGS|Mux49~4_combout )))) # +// (\rt_alu[17]~11_combout & (((\rt_alu[17]~10_combout )))) ) ) ) # ( !\rt_alu[14]~266_combout & ( !\rt_alu[14]~268_combout & ( (!\rt_alu[17]~11_combout & ((!\rt_alu[17]~10_combout & ((\REGS|Mux49~5_combout ))) # (\rt_alu[17]~10_combout & +// (\REGS|Mux49~4_combout )))) ) ) ) + + .dataa(!\rt_alu[17]~11_combout ), + .datab(!\REGS|Mux49~4_combout ), + .datac(!\rt_alu[17]~10_combout ), + .datad(!\REGS|Mux49~5_combout ), + .datae(!\rt_alu[14]~266_combout ), + .dataf(!\rt_alu[14]~268_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[14]~269_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[14]~269 .extended_lut = "off"; +defparam \rt_alu[14]~269 .lut_mask = 64'h02A207A752F257F7; +defparam \rt_alu[14]~269 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y10_N42 +cyclonev_lcell_comb \rt_alu[14]~270 ( +// Equation(s): +// \rt_alu[14]~270_combout = ( \rt_alu[14]~265_combout & ( \rt_alu[14]~269_combout & ( (!\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout ) # ((!\ROM|mem~24_combout & \rt_alu[5]~32_combout )) ) ) ) # ( !\rt_alu[14]~265_combout & ( \rt_alu[14]~269_combout & ( +// (!\ROM|mem~24_combout & (((!\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout & !\ROM|mem~9_combout )) # (\rt_alu[5]~32_combout ))) # (\ROM|mem~24_combout & (!\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout & ((!\ROM|mem~9_combout )))) ) ) ) # ( +// \rt_alu[14]~265_combout & ( !\rt_alu[14]~269_combout & ( (!\ROM|mem~24_combout & (((!\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout & \ROM|mem~9_combout )) # (\rt_alu[5]~32_combout ))) # (\ROM|mem~24_combout & (!\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout +// & ((\ROM|mem~9_combout )))) ) ) ) # ( !\rt_alu[14]~265_combout & ( !\rt_alu[14]~269_combout & ( (!\ROM|mem~24_combout & \rt_alu[5]~32_combout ) ) ) ) + + .dataa(!\ROM|mem~24_combout ), + .datab(!\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout ), + .datac(!\rt_alu[5]~32_combout ), + .datad(!\ROM|mem~9_combout ), + .datae(!\rt_alu[14]~265_combout ), + .dataf(!\rt_alu[14]~269_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[14]~270_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[14]~270 .extended_lut = "off"; +defparam \rt_alu[14]~270 .lut_mask = 64'h0A0A0ACECE0ACECE; +defparam \rt_alu[14]~270 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X33_Y7_N6 +cyclonev_lcell_comb \rd[15]~456 ( +// Equation(s): +// \rd[15]~456_combout = ( \ALU|adder_unit|OUT_1 [15] & ( (!\CONTROL_UNIT|M2R[0]~0_combout & ((!\ALU|Mux29~0_combout ) # (\ALU|Mux16~0_combout ))) ) ) # ( !\ALU|adder_unit|OUT_1 [15] & ( (!\CONTROL_UNIT|M2R[0]~0_combout & \ALU|Mux16~0_combout ) ) ) + + .dataa(!\ALU|Mux29~0_combout ), + .datab(gnd), + .datac(!\CONTROL_UNIT|M2R[0]~0_combout ), + .datad(!\ALU|Mux16~0_combout ), + .datae(gnd), + .dataf(!\ALU|adder_unit|OUT_1 [15]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[15]~456_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[15]~456 .extended_lut = "off"; +defparam \rd[15]~456 .lut_mask = 64'h00F000F0A0F0A0F0; +defparam \rd[15]~456 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X31_Y12_N4 +dffeas \REGS|regs[19][15] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[15]~456_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~14_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[19][15]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[19][15] .is_wysiwyg = "true"; +defparam \REGS|regs[19][15] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X30_Y10_N9 +cyclonev_lcell_comb \REGS|regs[27][15]~feeder ( +// Equation(s): +// \REGS|regs[27][15]~feeder_combout = ( \rd[15]~456_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[15]~456_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[27][15]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[27][15]~feeder .extended_lut = "off"; +defparam \REGS|regs[27][15]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[27][15]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X30_Y10_N11 +dffeas \REGS|regs[27][15]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[27][15]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~15_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[27][15]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[27][15]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[27][15]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X30_Y10_N18 +cyclonev_lcell_comb \REGS|Mux48~7 ( +// Equation(s): +// \REGS|Mux48~7_combout = ( \PC|pc [7] & ( \PC|pc[6]~DUPLICATE_q & ( \REGS|regs[19][15]~q ) ) ) # ( !\PC|pc [7] & ( \PC|pc[6]~DUPLICATE_q & ( \REGS|regs[19][15]~q ) ) ) # ( \PC|pc [7] & ( !\PC|pc[6]~DUPLICATE_q & ( \REGS|regs[19][15]~q ) ) ) # ( +// !\PC|pc [7] & ( !\PC|pc[6]~DUPLICATE_q & ( (!\PC|pc [9] & ((!\PC|pc [8] & ((\REGS|regs[27][15]~DUPLICATE_q ))) # (\PC|pc [8] & (\REGS|regs[19][15]~q )))) # (\PC|pc [9] & (\REGS|regs[19][15]~q )) ) ) ) + + .dataa(!\REGS|regs[19][15]~q ), + .datab(!\REGS|regs[27][15]~DUPLICATE_q ), + .datac(!\PC|pc [9]), + .datad(!\PC|pc [8]), + .datae(!\PC|pc [7]), + .dataf(!\PC|pc[6]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux48~7_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux48~7 .extended_lut = "off"; +defparam \REGS|Mux48~7 .lut_mask = 64'h3555555555555555; +defparam \REGS|Mux48~7 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X28_Y9_N36 +cyclonev_lcell_comb \REGS|regs[16][15]~feeder ( +// Equation(s): +// \REGS|regs[16][15]~feeder_combout = ( \rd[15]~456_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[15]~456_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[16][15]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[16][15]~feeder .extended_lut = "off"; +defparam \REGS|regs[16][15]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[16][15]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X28_Y9_N37 +dffeas \REGS|regs[16][15] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[16][15]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~2_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[16][15]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[16][15] .is_wysiwyg = "true"; +defparam \REGS|regs[16][15] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X31_Y10_N29 +dffeas \REGS|regs[17][15] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[15]~456_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~11_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[17][15]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[17][15] .is_wysiwyg = "true"; +defparam \REGS|regs[17][15] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X31_Y10_N24 +cyclonev_lcell_comb \rt_alu[15]~278 ( +// Equation(s): +// \rt_alu[15]~278_combout = ( \ROM|mem~0_combout & ( (!\ROM|mem~10_combout & ((\REGS|regs[17][15]~q ))) # (\ROM|mem~10_combout & (\REGS|regs[16][15]~q )) ) ) # ( !\ROM|mem~0_combout & ( \REGS|regs[16][15]~q ) ) + + .dataa(!\REGS|regs[16][15]~q ), + .datab(gnd), + .datac(!\REGS|regs[17][15]~q ), + .datad(!\ROM|mem~10_combout ), + .datae(gnd), + .dataf(!\ROM|mem~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[15]~278_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[15]~278 .extended_lut = "off"; +defparam \rt_alu[15]~278 .lut_mask = 64'h555555550F550F55; +defparam \rt_alu[15]~278 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X30_Y8_N59 +dffeas \REGS|regs[29][15] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[15]~456_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~17_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[29][15]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[29][15] .is_wysiwyg = "true"; +defparam \REGS|regs[29][15] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X30_Y5_N51 +cyclonev_lcell_comb \REGS|regs[20][15]~feeder ( +// Equation(s): +// \REGS|regs[20][15]~feeder_combout = ( \rd[15]~456_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[15]~456_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[20][15]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[20][15]~feeder .extended_lut = "off"; +defparam \REGS|regs[20][15]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[20][15]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X30_Y5_N53 +dffeas \REGS|regs[20][15] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[20][15]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~7_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[20][15]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[20][15] .is_wysiwyg = "true"; +defparam \REGS|regs[20][15] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X31_Y6_N38 +dffeas \REGS|regs[28][15] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[15]~456_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~8_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[28][15]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[28][15] .is_wysiwyg = "true"; +defparam \REGS|regs[28][15] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X30_Y8_N54 +cyclonev_lcell_comb \rt_alu[15]~276 ( +// Equation(s): +// \rt_alu[15]~276_combout = ( \ROM|mem~0_combout & ( \ROM|mem~10_combout & ( \REGS|regs[28][15]~q ) ) ) # ( !\ROM|mem~0_combout & ( \ROM|mem~10_combout & ( \REGS|regs[20][15]~q ) ) ) # ( \ROM|mem~0_combout & ( !\ROM|mem~10_combout & ( +// \REGS|regs[29][15]~q ) ) ) # ( !\ROM|mem~0_combout & ( !\ROM|mem~10_combout & ( \REGS|regs[20][15]~q ) ) ) + + .dataa(gnd), + .datab(!\REGS|regs[29][15]~q ), + .datac(!\REGS|regs[20][15]~q ), + .datad(!\REGS|regs[28][15]~q ), + .datae(!\ROM|mem~0_combout ), + .dataf(!\ROM|mem~10_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[15]~276_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[15]~276 .extended_lut = "off"; +defparam \rt_alu[15]~276 .lut_mask = 64'h0F0F33330F0F00FF; +defparam \rt_alu[15]~276 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X30_Y8_N3 +cyclonev_lcell_comb \rt_alu[15]~277 ( +// Equation(s): +// \rt_alu[15]~277_combout = ( \rt_alu[15]~276_combout & ( \ROM|mem~12_combout & ( (!\ROM|mem~13_combout & (\REGS|Mux48~2_combout )) # (\ROM|mem~13_combout & ((\REGS|Mux48~3_combout ))) ) ) ) # ( !\rt_alu[15]~276_combout & ( \ROM|mem~12_combout & ( +// (!\ROM|mem~13_combout & (\REGS|Mux48~2_combout )) # (\ROM|mem~13_combout & ((\REGS|Mux48~3_combout ))) ) ) ) # ( \rt_alu[15]~276_combout & ( !\ROM|mem~12_combout ) ) + + .dataa(!\REGS|Mux48~2_combout ), + .datab(gnd), + .datac(!\REGS|Mux48~3_combout ), + .datad(!\ROM|mem~13_combout ), + .datae(!\rt_alu[15]~276_combout ), + .dataf(!\ROM|mem~12_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[15]~277_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[15]~277 .extended_lut = "off"; +defparam \rt_alu[15]~277 .lut_mask = 64'h0000FFFF550F550F; +defparam \rt_alu[15]~277 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X31_Y10_N6 +cyclonev_lcell_comb \rt_alu[15]~279 ( +// Equation(s): +// \rt_alu[15]~279_combout = ( \REGS|Mux48~4_combout & ( \rt_alu[15]~277_combout & ( ((!\rt_alu[17]~5_combout & ((\rt_alu[15]~278_combout ))) # (\rt_alu[17]~5_combout & (\REGS|Mux48~7_combout ))) # (\rt_alu[17]~4_combout ) ) ) ) # ( +// !\REGS|Mux48~4_combout & ( \rt_alu[15]~277_combout & ( (!\rt_alu[17]~5_combout & (((\rt_alu[17]~4_combout ) # (\rt_alu[15]~278_combout )))) # (\rt_alu[17]~5_combout & (\REGS|Mux48~7_combout & ((!\rt_alu[17]~4_combout )))) ) ) ) # ( +// \REGS|Mux48~4_combout & ( !\rt_alu[15]~277_combout & ( (!\rt_alu[17]~5_combout & (((\rt_alu[15]~278_combout & !\rt_alu[17]~4_combout )))) # (\rt_alu[17]~5_combout & (((\rt_alu[17]~4_combout )) # (\REGS|Mux48~7_combout ))) ) ) ) # ( +// !\REGS|Mux48~4_combout & ( !\rt_alu[15]~277_combout & ( (!\rt_alu[17]~4_combout & ((!\rt_alu[17]~5_combout & ((\rt_alu[15]~278_combout ))) # (\rt_alu[17]~5_combout & (\REGS|Mux48~7_combout )))) ) ) ) + + .dataa(!\rt_alu[17]~5_combout ), + .datab(!\REGS|Mux48~7_combout ), + .datac(!\rt_alu[15]~278_combout ), + .datad(!\rt_alu[17]~4_combout ), + .datae(!\REGS|Mux48~4_combout ), + .dataf(!\rt_alu[15]~277_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[15]~279_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[15]~279 .extended_lut = "off"; +defparam \rt_alu[15]~279 .lut_mask = 64'h1B001B551BAA1BFF; +defparam \rt_alu[15]~279 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X31_Y10_N57 +cyclonev_lcell_comb \ALU|adder_unit|operand[15]~15 ( +// Equation(s): +// \ALU|adder_unit|operand[15]~15_combout = ( \CONTROL_UNIT|CLASSIFIER|Equal0~1_combout & ( \rt_alu[15]~275_combout & ( !\rt_alu[15]~280_combout $ (\CONTROL_UNIT|ALU_FN [1]) ) ) ) # ( !\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout & ( +// \rt_alu[15]~275_combout & ( !\CONTROL_UNIT|ALU_FN [1] $ ((((!\ROM|mem~9_combout ) # (\rt_alu[15]~279_combout )) # (\rt_alu[15]~280_combout ))) ) ) ) # ( \CONTROL_UNIT|CLASSIFIER|Equal0~1_combout & ( !\rt_alu[15]~275_combout & ( !\rt_alu[15]~280_combout +// $ (\CONTROL_UNIT|ALU_FN [1]) ) ) ) # ( !\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout & ( !\rt_alu[15]~275_combout & ( !\CONTROL_UNIT|ALU_FN [1] $ ((((\ROM|mem~9_combout & \rt_alu[15]~279_combout )) # (\rt_alu[15]~280_combout ))) ) ) ) + + .dataa(!\rt_alu[15]~280_combout ), + .datab(!\ROM|mem~9_combout ), + .datac(!\rt_alu[15]~279_combout ), + .datad(!\CONTROL_UNIT|ALU_FN [1]), + .datae(!\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout ), + .dataf(!\rt_alu[15]~275_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\ALU|adder_unit|operand[15]~15_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \ALU|adder_unit|operand[15]~15 .extended_lut = "off"; +defparam \ALU|adder_unit|operand[15]~15 .lut_mask = 64'hA857AA5520DFAA55; +defparam \ALU|adder_unit|operand[15]~15 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y10_N48 +cyclonev_lcell_comb \ALU|Mux14~1 ( +// Equation(s): +// \ALU|Mux14~1_combout = ( \ALU|adder_unit|OUT_1 [17] & ( (!\ALU|Mux14~0_combout & \ALU|Mux29~0_combout ) ) ) # ( !\ALU|adder_unit|OUT_1 [17] & ( !\ALU|Mux14~0_combout ) ) + + .dataa(gnd), + .datab(gnd), + .datac(!\ALU|Mux14~0_combout ), + .datad(!\ALU|Mux29~0_combout ), + .datae(gnd), + .dataf(!\ALU|adder_unit|OUT_1 [17]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\ALU|Mux14~1_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \ALU|Mux14~1 .extended_lut = "off"; +defparam \ALU|Mux14~1 .lut_mask = 64'hF0F0F0F000F000F0; +defparam \ALU|Mux14~1 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X38_Y13_N6 +cyclonev_lcell_comb \rd[17]~87 ( +// Equation(s): +// \rd[17]~87_combout = ( !\ALU|Mux14~1_combout & ( !\CONTROL_UNIT|M2R[0]~0_combout ) ) + + .dataa(gnd), + .datab(!\CONTROL_UNIT|M2R[0]~0_combout ), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\ALU|Mux14~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[17]~87_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[17]~87 .extended_lut = "off"; +defparam \rd[17]~87 .lut_mask = 64'hCCCCCCCC00000000; +defparam \rd[17]~87 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X35_Y12_N59 +dffeas \REGS|regs[27][17]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[17]~87_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~15_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[27][17]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[27][17]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[27][17]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: FF_X36_Y11_N11 +dffeas \REGS|regs[19][17] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[17]~87_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~14_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[19][17]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[19][17] .is_wysiwyg = "true"; +defparam \REGS|regs[19][17] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X35_Y12_N54 +cyclonev_lcell_comb \REGS|Mux46~5 ( +// Equation(s): +// \REGS|Mux46~5_combout = ( \PC|pc [8] & ( \REGS|regs[19][17]~q ) ) # ( !\PC|pc [8] & ( \REGS|regs[19][17]~q & ( (((\PC|pc [9]) # (\PC|pc[7]~DUPLICATE_q )) # (\REGS|regs[27][17]~DUPLICATE_q )) # (\PC|pc [6]) ) ) ) # ( !\PC|pc [8] & ( +// !\REGS|regs[19][17]~q & ( (!\PC|pc [6] & (\REGS|regs[27][17]~DUPLICATE_q & (!\PC|pc[7]~DUPLICATE_q & !\PC|pc [9]))) ) ) ) + + .dataa(!\PC|pc [6]), + .datab(!\REGS|regs[27][17]~DUPLICATE_q ), + .datac(!\PC|pc[7]~DUPLICATE_q ), + .datad(!\PC|pc [9]), + .datae(!\PC|pc [8]), + .dataf(!\REGS|regs[19][17]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux46~5_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux46~5 .extended_lut = "off"; +defparam \REGS|Mux46~5 .lut_mask = 64'h200000007FFFFFFF; +defparam \REGS|Mux46~5 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X35_Y12_N32 +dffeas \REGS|regs[17][17]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[17]~87_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~11_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[17][17]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[17][17]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[17][17]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: FF_X35_Y12_N26 +dffeas \REGS|regs[16][17]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[17]~87_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~2_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[16][17]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[16][17]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[16][17]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X35_Y12_N33 +cyclonev_lcell_comb \rt_alu[17]~63 ( +// Equation(s): +// \rt_alu[17]~63_combout = ( \ROM|mem~10_combout & ( \ROM|mem~0_combout & ( \REGS|regs[16][17]~DUPLICATE_q ) ) ) # ( !\ROM|mem~10_combout & ( \ROM|mem~0_combout & ( \REGS|regs[17][17]~DUPLICATE_q ) ) ) # ( \ROM|mem~10_combout & ( !\ROM|mem~0_combout +// & ( \REGS|regs[16][17]~DUPLICATE_q ) ) ) # ( !\ROM|mem~10_combout & ( !\ROM|mem~0_combout & ( \REGS|regs[16][17]~DUPLICATE_q ) ) ) + + .dataa(gnd), + .datab(gnd), + .datac(!\REGS|regs[17][17]~DUPLICATE_q ), + .datad(!\REGS|regs[16][17]~DUPLICATE_q ), + .datae(!\ROM|mem~10_combout ), + .dataf(!\ROM|mem~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[17]~63_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[17]~63 .extended_lut = "off"; +defparam \rt_alu[17]~63 .lut_mask = 64'h00FF00FF0F0F00FF; +defparam \rt_alu[17]~63 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X36_Y11_N59 +dffeas \REGS|regs[29][17] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[17]~87_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~17_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[29][17]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[29][17] .is_wysiwyg = "true"; +defparam \REGS|regs[29][17] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y3_N12 +cyclonev_lcell_comb \REGS|regs[20][17]~feeder ( +// Equation(s): +// \REGS|regs[20][17]~feeder_combout = ( \rd[17]~87_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[17]~87_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[20][17]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[20][17]~feeder .extended_lut = "off"; +defparam \REGS|regs[20][17]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[20][17]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X37_Y3_N13 +dffeas \REGS|regs[20][17] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[20][17]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~7_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[20][17]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[20][17] .is_wysiwyg = "true"; +defparam \REGS|regs[20][17] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X36_Y14_N52 +dffeas \REGS|regs[28][17] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[17]~87_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~8_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[28][17]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[28][17] .is_wysiwyg = "true"; +defparam \REGS|regs[28][17] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X36_Y11_N3 +cyclonev_lcell_comb \rt_alu[17]~61 ( +// Equation(s): +// \rt_alu[17]~61_combout = ( \REGS|regs[28][17]~q & ( (!\ROM|mem~0_combout & (((\REGS|regs[20][17]~q )))) # (\ROM|mem~0_combout & (((\REGS|regs[29][17]~q )) # (\ROM|mem~10_combout ))) ) ) # ( !\REGS|regs[28][17]~q & ( (!\ROM|mem~0_combout & +// (((\REGS|regs[20][17]~q )))) # (\ROM|mem~0_combout & (!\ROM|mem~10_combout & (\REGS|regs[29][17]~q ))) ) ) + + .dataa(!\ROM|mem~0_combout ), + .datab(!\ROM|mem~10_combout ), + .datac(!\REGS|regs[29][17]~q ), + .datad(!\REGS|regs[20][17]~q ), + .datae(gnd), + .dataf(!\REGS|regs[28][17]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[17]~61_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[17]~61 .extended_lut = "off"; +defparam \rt_alu[17]~61 .lut_mask = 64'h04AE04AE15BF15BF; +defparam \rt_alu[17]~61 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X35_Y12_N39 +cyclonev_lcell_comb \rt_alu[17]~62 ( +// Equation(s): +// \rt_alu[17]~62_combout = ( \ROM|mem~13_combout & ( \rt_alu[17]~61_combout & ( (!\ROM|mem~12_combout ) # (\REGS|Mux46~3_combout ) ) ) ) # ( !\ROM|mem~13_combout & ( \rt_alu[17]~61_combout & ( (!\ROM|mem~12_combout ) # (\REGS|Mux46~2_combout ) ) ) ) # +// ( \ROM|mem~13_combout & ( !\rt_alu[17]~61_combout & ( (\ROM|mem~12_combout & \REGS|Mux46~3_combout ) ) ) ) # ( !\ROM|mem~13_combout & ( !\rt_alu[17]~61_combout & ( (\ROM|mem~12_combout & \REGS|Mux46~2_combout ) ) ) ) + + .dataa(!\ROM|mem~12_combout ), + .datab(!\REGS|Mux46~2_combout ), + .datac(gnd), + .datad(!\REGS|Mux46~3_combout ), + .datae(!\ROM|mem~13_combout ), + .dataf(!\rt_alu[17]~61_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[17]~62_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[17]~62 .extended_lut = "off"; +defparam \rt_alu[17]~62 .lut_mask = 64'h11110055BBBBAAFF; +defparam \rt_alu[17]~62 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X35_Y12_N27 +cyclonev_lcell_comb \rt_alu[17]~64 ( +// Equation(s): +// \rt_alu[17]~64_combout = ( \REGS|Mux46~4_combout & ( \rt_alu[17]~62_combout & ( ((!\rt_alu[17]~5_combout & ((\rt_alu[17]~63_combout ))) # (\rt_alu[17]~5_combout & (\REGS|Mux46~5_combout ))) # (\rt_alu[17]~4_combout ) ) ) ) # ( !\REGS|Mux46~4_combout +// & ( \rt_alu[17]~62_combout & ( (!\rt_alu[17]~4_combout & ((!\rt_alu[17]~5_combout & ((\rt_alu[17]~63_combout ))) # (\rt_alu[17]~5_combout & (\REGS|Mux46~5_combout )))) # (\rt_alu[17]~4_combout & (((!\rt_alu[17]~5_combout )))) ) ) ) # ( +// \REGS|Mux46~4_combout & ( !\rt_alu[17]~62_combout & ( (!\rt_alu[17]~4_combout & ((!\rt_alu[17]~5_combout & ((\rt_alu[17]~63_combout ))) # (\rt_alu[17]~5_combout & (\REGS|Mux46~5_combout )))) # (\rt_alu[17]~4_combout & (((\rt_alu[17]~5_combout )))) ) +// ) ) # ( !\REGS|Mux46~4_combout & ( !\rt_alu[17]~62_combout & ( (!\rt_alu[17]~4_combout & ((!\rt_alu[17]~5_combout & ((\rt_alu[17]~63_combout ))) # (\rt_alu[17]~5_combout & (\REGS|Mux46~5_combout )))) ) ) ) + + .dataa(!\REGS|Mux46~5_combout ), + .datab(!\rt_alu[17]~4_combout ), + .datac(!\rt_alu[17]~5_combout ), + .datad(!\rt_alu[17]~63_combout ), + .datae(!\REGS|Mux46~4_combout ), + .dataf(!\rt_alu[17]~62_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[17]~64_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[17]~64 .extended_lut = "off"; +defparam \rt_alu[17]~64 .lut_mask = 64'h04C407C734F437F7; +defparam \rt_alu[17]~64 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X38_Y12_N12 +cyclonev_lcell_comb \ALU|adder_unit|operand[17]~5 ( +// Equation(s): +// \ALU|adder_unit|operand[17]~5_combout = ( \rt_alu[17]~64_combout & ( \rt_alu[17]~68_combout & ( !\CONTROL_UNIT|ALU_FN [1] $ (((!\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout ) # (\rt_alu[3]~0_combout ))) ) ) ) # ( !\rt_alu[17]~64_combout & ( +// \rt_alu[17]~68_combout & ( !\CONTROL_UNIT|ALU_FN [1] $ ((((!\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout & !\ROM|mem~9_combout )) # (\rt_alu[3]~0_combout ))) ) ) ) # ( \rt_alu[17]~64_combout & ( !\rt_alu[17]~68_combout & ( !\CONTROL_UNIT|ALU_FN [1] $ +// ((((!\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout & \ROM|mem~9_combout )) # (\rt_alu[3]~0_combout ))) ) ) ) # ( !\rt_alu[17]~64_combout & ( !\rt_alu[17]~68_combout & ( !\rt_alu[3]~0_combout $ (\CONTROL_UNIT|ALU_FN [1]) ) ) ) + + .dataa(!\rt_alu[3]~0_combout ), + .datab(!\CONTROL_UNIT|ALU_FN [1]), + .datac(!\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout ), + .datad(!\ROM|mem~9_combout ), + .datae(!\rt_alu[17]~64_combout ), + .dataf(!\rt_alu[17]~68_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\ALU|adder_unit|operand[17]~5_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \ALU|adder_unit|operand[17]~5 .extended_lut = "off"; +defparam \ALU|adder_unit|operand[17]~5 .lut_mask = 64'h9999993939993939; +defparam \ALU|adder_unit|operand[17]~5 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X41_Y10_N6 +cyclonev_lcell_comb \rd[18]~174 ( +// Equation(s): +// \rd[18]~174_combout = ( \ALU|Mux29~0_combout & ( (!\CONTROL_UNIT|M2R[0]~0_combout & \ALU|Mux13~0_combout ) ) ) # ( !\ALU|Mux29~0_combout & ( (!\CONTROL_UNIT|M2R[0]~0_combout & ((\ALU|adder_unit|OUT_1 [18]) # (\ALU|Mux13~0_combout ))) ) ) + + .dataa(!\CONTROL_UNIT|M2R[0]~0_combout ), + .datab(gnd), + .datac(!\ALU|Mux13~0_combout ), + .datad(!\ALU|adder_unit|OUT_1 [18]), + .datae(!\ALU|Mux29~0_combout ), + .dataf(gnd), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[18]~174_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[18]~174 .extended_lut = "off"; +defparam \rd[18]~174 .lut_mask = 64'h0AAA0A0A0AAA0A0A; +defparam \rd[18]~174 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X36_Y12_N17 +dffeas \REGS|regs[8][18]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[18]~174_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~24_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[8][18]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[8][18]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[8][18]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: FF_X40_Y13_N59 +dffeas \REGS|regs[19][18] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[18]~174_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~14_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[19][18]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[19][18] .is_wysiwyg = "true"; +defparam \REGS|regs[19][18] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X36_Y10_N41 +dffeas \REGS|regs[27][18] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[18]~174_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~15_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[27][18]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[27][18] .is_wysiwyg = "true"; +defparam \REGS|regs[27][18] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X36_Y10_N51 +cyclonev_lcell_comb \REGS|Mux45~3 ( +// Equation(s): +// \REGS|Mux45~3_combout = ( \REGS|regs[19][18]~q & ( \REGS|regs[27][18]~q ) ) # ( !\REGS|regs[19][18]~q & ( \REGS|regs[27][18]~q & ( (!\PC|pc[8]~DUPLICATE_q & (!\PC|pc [9] & (!\PC|pc[7]~DUPLICATE_q & !\PC|pc [6]))) ) ) ) # ( \REGS|regs[19][18]~q & ( +// !\REGS|regs[27][18]~q & ( (((\PC|pc [6]) # (\PC|pc[7]~DUPLICATE_q )) # (\PC|pc [9])) # (\PC|pc[8]~DUPLICATE_q ) ) ) ) + + .dataa(!\PC|pc[8]~DUPLICATE_q ), + .datab(!\PC|pc [9]), + .datac(!\PC|pc[7]~DUPLICATE_q ), + .datad(!\PC|pc [6]), + .datae(!\REGS|regs[19][18]~q ), + .dataf(!\REGS|regs[27][18]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux45~3_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux45~3 .extended_lut = "off"; +defparam \REGS|Mux45~3 .lut_mask = 64'h00007FFF8000FFFF; +defparam \REGS|Mux45~3 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X42_Y6_N11 +dffeas \REGS|regs[25][18] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[18]~174_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~13_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[25][18]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[25][18] .is_wysiwyg = "true"; +defparam \REGS|regs[25][18] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X41_Y3_N12 +cyclonev_lcell_comb \REGS|regs[24][18]~feeder ( +// Equation(s): +// \REGS|regs[24][18]~feeder_combout = ( \rd[18]~174_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[18]~174_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[24][18]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[24][18]~feeder .extended_lut = "off"; +defparam \REGS|regs[24][18]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[24][18]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X41_Y3_N14 +dffeas \REGS|regs[24][18] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[24][18]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~4_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[24][18]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[24][18] .is_wysiwyg = "true"; +defparam \REGS|regs[24][18] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X42_Y6_N44 +dffeas \REGS|regs[16][18] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[18]~174_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~2_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[16][18]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[16][18] .is_wysiwyg = "true"; +defparam \REGS|regs[16][18] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y6_N6 +cyclonev_lcell_comb \rt_alu[18]~77 ( +// Equation(s): +// \rt_alu[18]~77_combout = ( \ROM|mem~0_combout & ( \ROM|mem~10_combout & ( \REGS|regs[24][18]~q ) ) ) # ( !\ROM|mem~0_combout & ( \ROM|mem~10_combout & ( \REGS|regs[16][18]~q ) ) ) # ( \ROM|mem~0_combout & ( !\ROM|mem~10_combout & ( +// \REGS|regs[25][18]~q ) ) ) # ( !\ROM|mem~0_combout & ( !\ROM|mem~10_combout & ( \REGS|regs[16][18]~q ) ) ) + + .dataa(gnd), + .datab(!\REGS|regs[25][18]~q ), + .datac(!\REGS|regs[24][18]~q ), + .datad(!\REGS|regs[16][18]~q ), + .datae(!\ROM|mem~0_combout ), + .dataf(!\ROM|mem~10_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[18]~77_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[18]~77 .extended_lut = "off"; +defparam \rt_alu[18]~77 .lut_mask = 64'h00FF333300FF0F0F; +defparam \rt_alu[18]~77 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X43_Y4_N31 +dffeas \REGS|regs[28][18] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[18]~174_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~8_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[28][18]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[28][18] .is_wysiwyg = "true"; +defparam \REGS|regs[28][18] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X38_Y5_N5 +dffeas \REGS|regs[29][18] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[18]~174_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~17_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[29][18]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[29][18] .is_wysiwyg = "true"; +defparam \REGS|regs[29][18] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X38_Y5_N23 +dffeas \REGS|regs[20][18] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[18]~174_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~7_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[20][18]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[20][18] .is_wysiwyg = "true"; +defparam \REGS|regs[20][18] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X38_Y5_N30 +cyclonev_lcell_comb \rt_alu[18]~75 ( +// Equation(s): +// \rt_alu[18]~75_combout = ( \REGS|regs[20][18]~q & ( \ROM|mem~0_combout & ( (!\ROM|mem~10_combout & ((\REGS|regs[29][18]~q ))) # (\ROM|mem~10_combout & (\REGS|regs[28][18]~q )) ) ) ) # ( !\REGS|regs[20][18]~q & ( \ROM|mem~0_combout & ( +// (!\ROM|mem~10_combout & ((\REGS|regs[29][18]~q ))) # (\ROM|mem~10_combout & (\REGS|regs[28][18]~q )) ) ) ) # ( \REGS|regs[20][18]~q & ( !\ROM|mem~0_combout ) ) + + .dataa(gnd), + .datab(!\REGS|regs[28][18]~q ), + .datac(!\REGS|regs[29][18]~q ), + .datad(!\ROM|mem~10_combout ), + .datae(!\REGS|regs[20][18]~q ), + .dataf(!\ROM|mem~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[18]~75_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[18]~75 .extended_lut = "off"; +defparam \rt_alu[18]~75 .lut_mask = 64'h0000FFFF0F330F33; +defparam \rt_alu[18]~75 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X36_Y10_N15 +cyclonev_lcell_comb \rt_alu[18]~76 ( +// Equation(s): +// \rt_alu[18]~76_combout = ( \REGS|Mux45~5_combout & ( \rt_alu[18]~75_combout & ( ((!\ROM|mem~13_combout ) # (!\ROM|mem~12_combout )) # (\REGS|Mux45~4_combout ) ) ) ) # ( !\REGS|Mux45~5_combout & ( \rt_alu[18]~75_combout & ( (!\ROM|mem~12_combout ) # +// ((\REGS|Mux45~4_combout & \ROM|mem~13_combout )) ) ) ) # ( \REGS|Mux45~5_combout & ( !\rt_alu[18]~75_combout & ( (\ROM|mem~12_combout & ((!\ROM|mem~13_combout ) # (\REGS|Mux45~4_combout ))) ) ) ) # ( !\REGS|Mux45~5_combout & ( !\rt_alu[18]~75_combout +// & ( (\REGS|Mux45~4_combout & (\ROM|mem~13_combout & \ROM|mem~12_combout )) ) ) ) + + .dataa(!\REGS|Mux45~4_combout ), + .datab(gnd), + .datac(!\ROM|mem~13_combout ), + .datad(!\ROM|mem~12_combout ), + .datae(!\REGS|Mux45~5_combout ), + .dataf(!\rt_alu[18]~75_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[18]~76_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[18]~76 .extended_lut = "off"; +defparam \rt_alu[18]~76 .lut_mask = 64'h000500F5FF05FFF5; +defparam \rt_alu[18]~76 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X36_Y10_N24 +cyclonev_lcell_comb \rt_alu[18]~78 ( +// Equation(s): +// \rt_alu[18]~78_combout = ( \rt_alu[18]~77_combout & ( \rt_alu[18]~76_combout & ( (!\rt_alu[17]~5_combout ) # ((!\rt_alu[17]~4_combout & (\REGS|Mux45~3_combout )) # (\rt_alu[17]~4_combout & ((\REGS|Mux45~2_combout )))) ) ) ) # ( +// !\rt_alu[18]~77_combout & ( \rt_alu[18]~76_combout & ( (!\rt_alu[17]~5_combout & (\rt_alu[17]~4_combout )) # (\rt_alu[17]~5_combout & ((!\rt_alu[17]~4_combout & (\REGS|Mux45~3_combout )) # (\rt_alu[17]~4_combout & ((\REGS|Mux45~2_combout ))))) ) ) ) +// # ( \rt_alu[18]~77_combout & ( !\rt_alu[18]~76_combout & ( (!\rt_alu[17]~5_combout & (!\rt_alu[17]~4_combout )) # (\rt_alu[17]~5_combout & ((!\rt_alu[17]~4_combout & (\REGS|Mux45~3_combout )) # (\rt_alu[17]~4_combout & ((\REGS|Mux45~2_combout ))))) +// ) ) ) # ( !\rt_alu[18]~77_combout & ( !\rt_alu[18]~76_combout & ( (\rt_alu[17]~5_combout & ((!\rt_alu[17]~4_combout & (\REGS|Mux45~3_combout )) # (\rt_alu[17]~4_combout & ((\REGS|Mux45~2_combout ))))) ) ) ) + + .dataa(!\rt_alu[17]~5_combout ), + .datab(!\rt_alu[17]~4_combout ), + .datac(!\REGS|Mux45~3_combout ), + .datad(!\REGS|Mux45~2_combout ), + .datae(!\rt_alu[18]~77_combout ), + .dataf(!\rt_alu[18]~76_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[18]~78_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[18]~78 .extended_lut = "off"; +defparam \rt_alu[18]~78 .lut_mask = 64'h04158C9D2637AEBF; +defparam \rt_alu[18]~78 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X36_Y12_N25 +dffeas \REGS|regs[9][18]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[18]~174_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~29_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[9][18]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[9][18]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[9][18]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: FF_X40_Y13_N38 +dffeas \REGS|regs[1][18] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[18]~174_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~28_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[1][18]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[1][18] .is_wysiwyg = "true"; +defparam \REGS|regs[1][18] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X38_Y12_N23 +dffeas \REGS|regs[2][18]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[18]~174_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~32_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[2][18]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[2][18]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[2][18]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: FF_X38_Y12_N2 +dffeas \REGS|regs[10][18] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[18]~174_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~33_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[10][18]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[10][18] .is_wysiwyg = "true"; +defparam \REGS|regs[10][18] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X38_Y12_N26 +dffeas \REGS|regs[11][18] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[18]~174_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~37_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[11][18]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[11][18] .is_wysiwyg = "true"; +defparam \REGS|regs[11][18] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X38_Y12_N36 +cyclonev_lcell_comb \rt_alu[18]~70 ( +// Equation(s): +// \rt_alu[18]~70_combout = ( \REGS|regs[11][18]~q & ( (!\ROM|mem~0_combout & (((\REGS|regs[2][18]~DUPLICATE_q )))) # (\ROM|mem~0_combout & ((!\ROM|mem~10_combout ) # ((\REGS|regs[10][18]~q )))) ) ) # ( !\REGS|regs[11][18]~q & ( (!\ROM|mem~0_combout & +// (((\REGS|regs[2][18]~DUPLICATE_q )))) # (\ROM|mem~0_combout & (\ROM|mem~10_combout & ((\REGS|regs[10][18]~q )))) ) ) + + .dataa(!\ROM|mem~10_combout ), + .datab(!\ROM|mem~0_combout ), + .datac(!\REGS|regs[2][18]~DUPLICATE_q ), + .datad(!\REGS|regs[10][18]~q ), + .datae(gnd), + .dataf(!\REGS|regs[11][18]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[18]~70_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[18]~70 .extended_lut = "off"; +defparam \rt_alu[18]~70 .lut_mask = 64'h0C1D0C1D2E3F2E3F; +defparam \rt_alu[18]~70 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X38_Y12_N3 +cyclonev_lcell_comb \rt_alu[18]~72 ( +// Equation(s): +// \rt_alu[18]~72_combout = (!\ROM|mem~10_combout & ((!\ROM|mem~0_combout & (\REGS|Mux45~1_combout )) # (\ROM|mem~0_combout & ((\REGS|Mux45~0_combout ))))) # (\ROM|mem~10_combout & (((\REGS|Mux45~1_combout )))) + + .dataa(!\ROM|mem~10_combout ), + .datab(!\ROM|mem~0_combout ), + .datac(!\REGS|Mux45~1_combout ), + .datad(!\REGS|Mux45~0_combout ), + .datae(gnd), + .dataf(gnd), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[18]~72_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[18]~72 .extended_lut = "off"; +defparam \rt_alu[18]~72 .lut_mask = 64'h0D2F0D2F0D2F0D2F; +defparam \rt_alu[18]~72 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X38_Y13_N50 +dffeas \REGS|regs[15][18] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[18]~174_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~39_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[15][18]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[15][18] .is_wysiwyg = "true"; +defparam \REGS|regs[15][18] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X38_Y13_N0 +cyclonev_lcell_comb \REGS|regs[6][18]~feeder ( +// Equation(s): +// \REGS|regs[6][18]~feeder_combout = ( \rd[18]~174_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[18]~174_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[6][18]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[6][18]~feeder .extended_lut = "off"; +defparam \REGS|regs[6][18]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[6][18]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X38_Y13_N2 +dffeas \REGS|regs[6][18] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[6][18]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~34_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[6][18]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[6][18] .is_wysiwyg = "true"; +defparam \REGS|regs[6][18] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X38_Y13_N32 +dffeas \REGS|regs[14][18] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[18]~174_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~35_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[14][18]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[14][18] .is_wysiwyg = "true"; +defparam \REGS|regs[14][18] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X38_Y13_N12 +cyclonev_lcell_comb \rt_alu[18]~71 ( +// Equation(s): +// \rt_alu[18]~71_combout = ( \ROM|mem~10_combout & ( \ROM|mem~0_combout & ( \REGS|regs[14][18]~q ) ) ) # ( !\ROM|mem~10_combout & ( \ROM|mem~0_combout & ( \REGS|regs[15][18]~q ) ) ) # ( \ROM|mem~10_combout & ( !\ROM|mem~0_combout & ( +// \REGS|regs[6][18]~q ) ) ) # ( !\ROM|mem~10_combout & ( !\ROM|mem~0_combout & ( \REGS|regs[6][18]~q ) ) ) + + .dataa(!\REGS|regs[15][18]~q ), + .datab(gnd), + .datac(!\REGS|regs[6][18]~q ), + .datad(!\REGS|regs[14][18]~q ), + .datae(!\ROM|mem~10_combout ), + .dataf(!\ROM|mem~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[18]~71_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[18]~71 .extended_lut = "off"; +defparam \rt_alu[18]~71 .lut_mask = 64'h0F0F0F0F555500FF; +defparam \rt_alu[18]~71 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X38_Y12_N45 +cyclonev_lcell_comb \rt_alu[18]~73 ( +// Equation(s): +// \rt_alu[18]~73_combout = ( \rt_alu[18]~72_combout & ( \rt_alu[18]~71_combout & ( (!\rt_alu[17]~10_combout ) # (\rt_alu[18]~70_combout ) ) ) ) # ( !\rt_alu[18]~72_combout & ( \rt_alu[18]~71_combout & ( (!\rt_alu[17]~10_combout & (\ROM|mem~12_combout +// )) # (\rt_alu[17]~10_combout & ((\rt_alu[18]~70_combout ))) ) ) ) # ( \rt_alu[18]~72_combout & ( !\rt_alu[18]~71_combout & ( (!\rt_alu[17]~10_combout & (!\ROM|mem~12_combout )) # (\rt_alu[17]~10_combout & ((\rt_alu[18]~70_combout ))) ) ) ) # ( +// !\rt_alu[18]~72_combout & ( !\rt_alu[18]~71_combout & ( (\rt_alu[17]~10_combout & \rt_alu[18]~70_combout ) ) ) ) + + .dataa(gnd), + .datab(!\ROM|mem~12_combout ), + .datac(!\rt_alu[17]~10_combout ), + .datad(!\rt_alu[18]~70_combout ), + .datae(!\rt_alu[18]~72_combout ), + .dataf(!\rt_alu[18]~71_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[18]~73_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[18]~73 .extended_lut = "off"; +defparam \rt_alu[18]~73 .lut_mask = 64'h000FC0CF303FF0FF; +defparam \rt_alu[18]~73 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y12_N51 +cyclonev_lcell_comb \rt_alu[18]~74 ( +// Equation(s): +// \rt_alu[18]~74_combout = ( \rt_alu[17]~11_combout & ( \rt_alu[18]~73_combout ) ) # ( !\rt_alu[17]~11_combout & ( \rt_alu[18]~73_combout & ( (!\ROM|mem~0_combout & ((\REGS|regs[1][18]~q ))) # (\ROM|mem~0_combout & (\REGS|regs[9][18]~DUPLICATE_q )) ) +// ) ) # ( !\rt_alu[17]~11_combout & ( !\rt_alu[18]~73_combout & ( (!\ROM|mem~0_combout & ((\REGS|regs[1][18]~q ))) # (\ROM|mem~0_combout & (\REGS|regs[9][18]~DUPLICATE_q )) ) ) ) + + .dataa(gnd), + .datab(!\REGS|regs[9][18]~DUPLICATE_q ), + .datac(!\REGS|regs[1][18]~q ), + .datad(!\ROM|mem~0_combout ), + .datae(!\rt_alu[17]~11_combout ), + .dataf(!\rt_alu[18]~73_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[18]~74_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[18]~74 .extended_lut = "off"; +defparam \rt_alu[18]~74 .lut_mask = 64'h0F3300000F33FFFF; +defparam \rt_alu[18]~74 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X36_Y10_N36 +cyclonev_lcell_comb \rt_alu[18]~79 ( +// Equation(s): +// \rt_alu[18]~79_combout = ( \rt_alu[31]~40_combout & ( \rt_alu[18]~74_combout & ( (!\rt_alu[31]~39_combout ) # (\rt_alu[18]~78_combout ) ) ) ) # ( !\rt_alu[31]~40_combout & ( \rt_alu[18]~74_combout & ( (\REGS|regs[8][18]~DUPLICATE_q & +// (\rt_alu[31]~39_combout & \ROM|mem~0_combout )) ) ) ) # ( \rt_alu[31]~40_combout & ( !\rt_alu[18]~74_combout & ( (\rt_alu[31]~39_combout & \rt_alu[18]~78_combout ) ) ) ) # ( !\rt_alu[31]~40_combout & ( !\rt_alu[18]~74_combout & ( +// (\REGS|regs[8][18]~DUPLICATE_q & (\rt_alu[31]~39_combout & \ROM|mem~0_combout )) ) ) ) + + .dataa(!\REGS|regs[8][18]~DUPLICATE_q ), + .datab(!\rt_alu[31]~39_combout ), + .datac(!\rt_alu[18]~78_combout ), + .datad(!\ROM|mem~0_combout ), + .datae(!\rt_alu[31]~40_combout ), + .dataf(!\rt_alu[18]~74_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[18]~79_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[18]~79 .extended_lut = "off"; +defparam \rt_alu[18]~79 .lut_mask = 64'h001103030011CFCF; +defparam \rt_alu[18]~79 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X41_Y6_N19 +dffeas \REGS|regs[24][19] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[19]~261_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~4_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[24][19]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[24][19] .is_wysiwyg = "true"; +defparam \REGS|regs[24][19] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X42_Y6_N17 +dffeas \REGS|regs[16][19] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[19]~261_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~2_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[16][19]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[16][19] .is_wysiwyg = "true"; +defparam \REGS|regs[16][19] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X42_Y6_N2 +dffeas \REGS|regs[25][19]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[19]~261_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~13_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[25][19]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[25][19]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[25][19]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y6_N3 +cyclonev_lcell_comb \rt_alu[19]~87 ( +// Equation(s): +// \rt_alu[19]~87_combout = ( \ROM|mem~10_combout & ( \ROM|mem~0_combout & ( \REGS|regs[24][19]~q ) ) ) # ( !\ROM|mem~10_combout & ( \ROM|mem~0_combout & ( \REGS|regs[25][19]~DUPLICATE_q ) ) ) # ( \ROM|mem~10_combout & ( !\ROM|mem~0_combout & ( +// \REGS|regs[16][19]~q ) ) ) # ( !\ROM|mem~10_combout & ( !\ROM|mem~0_combout & ( \REGS|regs[16][19]~q ) ) ) + + .dataa(gnd), + .datab(!\REGS|regs[24][19]~q ), + .datac(!\REGS|regs[16][19]~q ), + .datad(!\REGS|regs[25][19]~DUPLICATE_q ), + .datae(!\ROM|mem~10_combout ), + .dataf(!\ROM|mem~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[19]~87_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[19]~87 .extended_lut = "off"; +defparam \rt_alu[19]~87 .lut_mask = 64'h0F0F0F0F00FF3333; +defparam \rt_alu[19]~87 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X41_Y6_N14 +dffeas \REGS|regs[19][19]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[19]~261_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~14_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[19][19]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[19][19]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[19][19]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: FF_X41_Y6_N59 +dffeas \REGS|regs[27][19]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[19]~261_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~15_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[27][19]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[27][19]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[27][19]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X41_Y6_N21 +cyclonev_lcell_comb \REGS|Mux44~5 ( +// Equation(s): +// \REGS|Mux44~5_combout = ( \REGS|regs[27][19]~DUPLICATE_q & ( \PC|pc [7] & ( \REGS|regs[19][19]~DUPLICATE_q ) ) ) # ( !\REGS|regs[27][19]~DUPLICATE_q & ( \PC|pc [7] & ( \REGS|regs[19][19]~DUPLICATE_q ) ) ) # ( \REGS|regs[27][19]~DUPLICATE_q & ( +// !\PC|pc [7] & ( ((!\PC|pc [9] & (!\PC|pc[6]~DUPLICATE_q & !\PC|pc [8]))) # (\REGS|regs[19][19]~DUPLICATE_q ) ) ) ) # ( !\REGS|regs[27][19]~DUPLICATE_q & ( !\PC|pc [7] & ( (\REGS|regs[19][19]~DUPLICATE_q & (((\PC|pc [8]) # (\PC|pc[6]~DUPLICATE_q )) # +// (\PC|pc [9]))) ) ) ) + + .dataa(!\PC|pc [9]), + .datab(!\REGS|regs[19][19]~DUPLICATE_q ), + .datac(!\PC|pc[6]~DUPLICATE_q ), + .datad(!\PC|pc [8]), + .datae(!\REGS|regs[27][19]~DUPLICATE_q ), + .dataf(!\PC|pc [7]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux44~5_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux44~5 .extended_lut = "off"; +defparam \REGS|Mux44~5 .lut_mask = 64'h1333B33333333333; +defparam \REGS|Mux44~5 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X38_Y6_N2 +dffeas \REGS|regs[29][19] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[19]~261_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~17_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[29][19]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[29][19] .is_wysiwyg = "true"; +defparam \REGS|regs[29][19] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X41_Y5_N59 +dffeas \REGS|regs[20][19] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[19]~261_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~7_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[20][19]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[20][19] .is_wysiwyg = "true"; +defparam \REGS|regs[20][19] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X40_Y6_N55 +dffeas \REGS|regs[28][19] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[19]~261_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~8_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[28][19]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[28][19] .is_wysiwyg = "true"; +defparam \REGS|regs[28][19] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X38_Y6_N54 +cyclonev_lcell_comb \rt_alu[19]~85 ( +// Equation(s): +// \rt_alu[19]~85_combout = ( \ROM|mem~10_combout & ( (!\ROM|mem~0_combout & (\REGS|regs[20][19]~q )) # (\ROM|mem~0_combout & ((\REGS|regs[28][19]~q ))) ) ) # ( !\ROM|mem~10_combout & ( (!\ROM|mem~0_combout & ((\REGS|regs[20][19]~q ))) # +// (\ROM|mem~0_combout & (\REGS|regs[29][19]~q )) ) ) + + .dataa(!\REGS|regs[29][19]~q ), + .datab(!\ROM|mem~0_combout ), + .datac(!\REGS|regs[20][19]~q ), + .datad(!\REGS|regs[28][19]~q ), + .datae(gnd), + .dataf(!\ROM|mem~10_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[19]~85_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[19]~85 .extended_lut = "off"; +defparam \rt_alu[19]~85 .lut_mask = 64'h1D1D1D1D0C3F0C3F; +defparam \rt_alu[19]~85 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X38_Y6_N12 +cyclonev_lcell_comb \rt_alu[19]~86 ( +// Equation(s): +// \rt_alu[19]~86_combout = ( \REGS|Mux44~2_combout & ( (!\ROM|mem~12_combout & (((\rt_alu[19]~85_combout )))) # (\ROM|mem~12_combout & (((!\ROM|mem~13_combout )) # (\REGS|Mux44~3_combout ))) ) ) # ( !\REGS|Mux44~2_combout & ( (!\ROM|mem~12_combout & +// (((\rt_alu[19]~85_combout )))) # (\ROM|mem~12_combout & (\REGS|Mux44~3_combout & ((\ROM|mem~13_combout )))) ) ) + + .dataa(!\ROM|mem~12_combout ), + .datab(!\REGS|Mux44~3_combout ), + .datac(!\rt_alu[19]~85_combout ), + .datad(!\ROM|mem~13_combout ), + .datae(!\REGS|Mux44~2_combout ), + .dataf(gnd), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[19]~86_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[19]~86 .extended_lut = "off"; +defparam \rt_alu[19]~86 .lut_mask = 64'h0A1B5F1B0A1B5F1B; +defparam \rt_alu[19]~86 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X38_Y6_N18 +cyclonev_lcell_comb \rt_alu[19]~88 ( +// Equation(s): +// \rt_alu[19]~88_combout = ( \REGS|Mux44~4_combout & ( \rt_alu[19]~86_combout & ( ((!\rt_alu[17]~5_combout & (\rt_alu[19]~87_combout )) # (\rt_alu[17]~5_combout & ((\REGS|Mux44~5_combout )))) # (\rt_alu[17]~4_combout ) ) ) ) # ( !\REGS|Mux44~4_combout +// & ( \rt_alu[19]~86_combout & ( (!\rt_alu[17]~5_combout & (((\rt_alu[17]~4_combout )) # (\rt_alu[19]~87_combout ))) # (\rt_alu[17]~5_combout & (((!\rt_alu[17]~4_combout & \REGS|Mux44~5_combout )))) ) ) ) # ( \REGS|Mux44~4_combout & ( +// !\rt_alu[19]~86_combout & ( (!\rt_alu[17]~5_combout & (\rt_alu[19]~87_combout & (!\rt_alu[17]~4_combout ))) # (\rt_alu[17]~5_combout & (((\REGS|Mux44~5_combout ) # (\rt_alu[17]~4_combout )))) ) ) ) # ( !\REGS|Mux44~4_combout & ( +// !\rt_alu[19]~86_combout & ( (!\rt_alu[17]~4_combout & ((!\rt_alu[17]~5_combout & (\rt_alu[19]~87_combout )) # (\rt_alu[17]~5_combout & ((\REGS|Mux44~5_combout ))))) ) ) ) + + .dataa(!\rt_alu[17]~5_combout ), + .datab(!\rt_alu[19]~87_combout ), + .datac(!\rt_alu[17]~4_combout ), + .datad(!\REGS|Mux44~5_combout ), + .datae(!\REGS|Mux44~4_combout ), + .dataf(!\rt_alu[19]~86_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[19]~88_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[19]~88 .extended_lut = "off"; +defparam \rt_alu[19]~88 .lut_mask = 64'h207025752A7A2F7F; +defparam \rt_alu[19]~88 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X41_Y4_N47 +dffeas \REGS|regs[1][19] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[19]~261_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~28_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[1][19]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[1][19] .is_wysiwyg = "true"; +defparam \REGS|regs[1][19] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X35_Y7_N11 +dffeas \REGS|regs[10][19] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[19]~261_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~33_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[10][19]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[10][19] .is_wysiwyg = "true"; +defparam \REGS|regs[10][19] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X35_Y7_N53 +dffeas \REGS|regs[2][19] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[19]~261_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~32_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[2][19]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[2][19] .is_wysiwyg = "true"; +defparam \REGS|regs[2][19] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X35_Y8_N13 +dffeas \REGS|regs[11][19] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[19]~261_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~37_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[11][19]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[11][19] .is_wysiwyg = "true"; +defparam \REGS|regs[11][19] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X35_Y8_N12 +cyclonev_lcell_comb \rt_alu[19]~80 ( +// Equation(s): +// \rt_alu[19]~80_combout = ( \ROM|mem~10_combout & ( (!\ROM|mem~0_combout & ((\REGS|regs[2][19]~q ))) # (\ROM|mem~0_combout & (\REGS|regs[10][19]~q )) ) ) # ( !\ROM|mem~10_combout & ( (!\ROM|mem~0_combout & (\REGS|regs[2][19]~q )) # +// (\ROM|mem~0_combout & ((\REGS|regs[11][19]~q ))) ) ) + + .dataa(!\REGS|regs[10][19]~q ), + .datab(!\REGS|regs[2][19]~q ), + .datac(!\ROM|mem~0_combout ), + .datad(!\REGS|regs[11][19]~q ), + .datae(gnd), + .dataf(!\ROM|mem~10_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[19]~80_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[19]~80 .extended_lut = "off"; +defparam \rt_alu[19]~80 .lut_mask = 64'h303F303F35353535; +defparam \rt_alu[19]~80 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X37_Y6_N25 +dffeas \REGS|regs[15][19] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[19]~261_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~39_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[15][19]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[15][19] .is_wysiwyg = "true"; +defparam \REGS|regs[15][19] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X37_Y6_N53 +dffeas \REGS|regs[6][19] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[19]~261_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~34_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[6][19]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[6][19] .is_wysiwyg = "true"; +defparam \REGS|regs[6][19] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X41_Y7_N56 +dffeas \REGS|regs[14][19] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[19]~261_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~35_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[14][19]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[14][19] .is_wysiwyg = "true"; +defparam \REGS|regs[14][19] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y6_N45 +cyclonev_lcell_comb \rt_alu[19]~81 ( +// Equation(s): +// \rt_alu[19]~81_combout = ( \REGS|regs[14][19]~q & ( (!\ROM|mem~0_combout & (((\REGS|regs[6][19]~q )))) # (\ROM|mem~0_combout & (((\ROM|mem~10_combout )) # (\REGS|regs[15][19]~q ))) ) ) # ( !\REGS|regs[14][19]~q & ( (!\ROM|mem~0_combout & +// (((\REGS|regs[6][19]~q )))) # (\ROM|mem~0_combout & (\REGS|regs[15][19]~q & (!\ROM|mem~10_combout ))) ) ) + + .dataa(!\ROM|mem~0_combout ), + .datab(!\REGS|regs[15][19]~q ), + .datac(!\ROM|mem~10_combout ), + .datad(!\REGS|regs[6][19]~q ), + .datae(!\REGS|regs[14][19]~q ), + .dataf(gnd), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[19]~81_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[19]~81 .extended_lut = "off"; +defparam \rt_alu[19]~81 .lut_mask = 64'h10BA15BF10BA15BF; +defparam \rt_alu[19]~81 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X40_Y8_N24 +cyclonev_lcell_comb \rt_alu[19]~82 ( +// Equation(s): +// \rt_alu[19]~82_combout = ( \REGS|Mux44~1_combout & ( \REGS|Mux44~0_combout ) ) # ( !\REGS|Mux44~1_combout & ( \REGS|Mux44~0_combout & ( (!\ROM|mem~0_combout ) # (\ROM|mem~10_combout ) ) ) ) # ( \REGS|Mux44~1_combout & ( !\REGS|Mux44~0_combout & ( +// (\ROM|mem~0_combout & !\ROM|mem~10_combout ) ) ) ) + + .dataa(gnd), + .datab(gnd), + .datac(!\ROM|mem~0_combout ), + .datad(!\ROM|mem~10_combout ), + .datae(!\REGS|Mux44~1_combout ), + .dataf(!\REGS|Mux44~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[19]~82_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[19]~82 .extended_lut = "off"; +defparam \rt_alu[19]~82 .lut_mask = 64'h00000F00F0FFFFFF; +defparam \rt_alu[19]~82 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y6_N48 +cyclonev_lcell_comb \rt_alu[19]~83 ( +// Equation(s): +// \rt_alu[19]~83_combout = ( \rt_alu[19]~81_combout & ( \rt_alu[19]~82_combout & ( (!\rt_alu[17]~10_combout ) # (\rt_alu[19]~80_combout ) ) ) ) # ( !\rt_alu[19]~81_combout & ( \rt_alu[19]~82_combout & ( (!\rt_alu[17]~10_combout & (!\ROM|mem~12_combout +// )) # (\rt_alu[17]~10_combout & ((\rt_alu[19]~80_combout ))) ) ) ) # ( \rt_alu[19]~81_combout & ( !\rt_alu[19]~82_combout & ( (!\rt_alu[17]~10_combout & (\ROM|mem~12_combout )) # (\rt_alu[17]~10_combout & ((\rt_alu[19]~80_combout ))) ) ) ) # ( +// !\rt_alu[19]~81_combout & ( !\rt_alu[19]~82_combout & ( (\rt_alu[17]~10_combout & \rt_alu[19]~80_combout ) ) ) ) + + .dataa(gnd), + .datab(!\ROM|mem~12_combout ), + .datac(!\rt_alu[17]~10_combout ), + .datad(!\rt_alu[19]~80_combout ), + .datae(!\rt_alu[19]~81_combout ), + .dataf(!\rt_alu[19]~82_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[19]~83_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[19]~83 .extended_lut = "off"; +defparam \rt_alu[19]~83 .lut_mask = 64'h000F303FC0CFF0FF; +defparam \rt_alu[19]~83 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y6_N27 +cyclonev_lcell_comb \rt_alu[19]~84 ( +// Equation(s): +// \rt_alu[19]~84_combout = ( \rt_alu[17]~11_combout & ( \rt_alu[19]~83_combout ) ) # ( !\rt_alu[17]~11_combout & ( \rt_alu[19]~83_combout & ( (!\ROM|mem~0_combout & ((\REGS|regs[1][19]~q ))) # (\ROM|mem~0_combout & (\REGS|regs[9][19]~q )) ) ) ) # ( +// !\rt_alu[17]~11_combout & ( !\rt_alu[19]~83_combout & ( (!\ROM|mem~0_combout & ((\REGS|regs[1][19]~q ))) # (\ROM|mem~0_combout & (\REGS|regs[9][19]~q )) ) ) ) + + .dataa(!\ROM|mem~0_combout ), + .datab(gnd), + .datac(!\REGS|regs[9][19]~q ), + .datad(!\REGS|regs[1][19]~q ), + .datae(!\rt_alu[17]~11_combout ), + .dataf(!\rt_alu[19]~83_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[19]~84_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[19]~84 .extended_lut = "off"; +defparam \rt_alu[19]~84 .lut_mask = 64'h05AF000005AFFFFF; +defparam \rt_alu[19]~84 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X38_Y6_N48 +cyclonev_lcell_comb \rt_alu[19]~90 ( +// Equation(s): +// \rt_alu[19]~90_combout = ( \rt_alu[19]~84_combout & ( \rt_alu[19]~89_combout & ( (\rt_alu[31]~39_combout ) # (\rt_alu[31]~40_combout ) ) ) ) # ( !\rt_alu[19]~84_combout & ( \rt_alu[19]~89_combout & ( \rt_alu[31]~39_combout ) ) ) # ( +// \rt_alu[19]~84_combout & ( !\rt_alu[19]~89_combout & ( (\rt_alu[31]~40_combout & ((!\rt_alu[31]~39_combout ) # (\rt_alu[19]~88_combout ))) ) ) ) # ( !\rt_alu[19]~84_combout & ( !\rt_alu[19]~89_combout & ( (\rt_alu[19]~88_combout & +// (\rt_alu[31]~40_combout & \rt_alu[31]~39_combout )) ) ) ) + + .dataa(!\rt_alu[19]~88_combout ), + .datab(!\rt_alu[31]~40_combout ), + .datac(gnd), + .datad(!\rt_alu[31]~39_combout ), + .datae(!\rt_alu[19]~84_combout ), + .dataf(!\rt_alu[19]~89_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[19]~90_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[19]~90 .extended_lut = "off"; +defparam \rt_alu[19]~90 .lut_mask = 64'h0011331100FF33FF; +defparam \rt_alu[19]~90 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y6_N18 +cyclonev_lcell_comb \ALU|Mux12~0 ( +// Equation(s): +// \ALU|Mux12~0_combout = ( \REGS|Mux12~2_combout & ( \rt_alu[19]~90_combout & ( (\ALU|Mux15~0_combout & \CONTROL_UNIT|ALU_FN [1]) ) ) ) # ( !\REGS|Mux12~2_combout & ( \rt_alu[19]~90_combout & ( ((\ALU|Mux15~0_combout & (\CONTROL_UNIT|ALU_FN [1] & +// !\CONTROL_UNIT|ALU_FN [0]))) # (\ALU|Mux29~1_combout ) ) ) ) # ( \REGS|Mux12~2_combout & ( !\rt_alu[19]~90_combout & ( ((\ALU|Mux15~0_combout & (\CONTROL_UNIT|ALU_FN [1] & !\CONTROL_UNIT|ALU_FN [0]))) # (\ALU|Mux29~1_combout ) ) ) ) # ( +// !\REGS|Mux12~2_combout & ( !\rt_alu[19]~90_combout & ( (\ALU|Mux15~0_combout & !\CONTROL_UNIT|ALU_FN [1]) ) ) ) + + .dataa(!\ALU|Mux15~0_combout ), + .datab(!\CONTROL_UNIT|ALU_FN [1]), + .datac(!\CONTROL_UNIT|ALU_FN [0]), + .datad(!\ALU|Mux29~1_combout ), + .datae(!\REGS|Mux12~2_combout ), + .dataf(!\rt_alu[19]~90_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\ALU|Mux12~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \ALU|Mux12~0 .extended_lut = "off"; +defparam \ALU|Mux12~0 .lut_mask = 64'h444410FF10FF1111; +defparam \ALU|Mux12~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X41_Y8_N0 +cyclonev_lcell_comb \rd[19]~261 ( +// Equation(s): +// \rd[19]~261_combout = ( \ALU|adder_unit|OUT_1 [19] & ( \ALU|Mux12~0_combout & ( !\CONTROL_UNIT|M2R[0]~0_combout ) ) ) # ( !\ALU|adder_unit|OUT_1 [19] & ( \ALU|Mux12~0_combout & ( !\CONTROL_UNIT|M2R[0]~0_combout ) ) ) # ( \ALU|adder_unit|OUT_1 [19] & +// ( !\ALU|Mux12~0_combout & ( (!\CONTROL_UNIT|M2R[0]~0_combout & !\ALU|Mux29~0_combout ) ) ) ) + + .dataa(gnd), + .datab(gnd), + .datac(!\CONTROL_UNIT|M2R[0]~0_combout ), + .datad(!\ALU|Mux29~0_combout ), + .datae(!\ALU|adder_unit|OUT_1 [19]), + .dataf(!\ALU|Mux12~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[19]~261_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[19]~261 .extended_lut = "off"; +defparam \rd[19]~261 .lut_mask = 64'h0000F000F0F0F0F0; +defparam \rd[19]~261 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X36_Y14_N24 +cyclonev_lcell_comb \REGS|regs[8][19]~feeder ( +// Equation(s): +// \REGS|regs[8][19]~feeder_combout = ( \rd[19]~261_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[19]~261_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[8][19]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[8][19]~feeder .extended_lut = "off"; +defparam \REGS|regs[8][19]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[8][19]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X36_Y14_N25 +dffeas \REGS|regs[8][19] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[8][19]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~24_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[8][19]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[8][19] .is_wysiwyg = "true"; +defparam \REGS|regs[8][19] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X38_Y6_N6 +cyclonev_lcell_comb \rt_alu[19]~89 ( +// Equation(s): +// \rt_alu[19]~89_combout = ( \rt_alu[17]~10_combout & ( \CONTROL_UNIT|CLASSIFIER|Equal0~1_combout & ( (\ROM|mem~0_combout & \REGS|regs[8][19]~q ) ) ) ) # ( !\rt_alu[17]~10_combout & ( \CONTROL_UNIT|CLASSIFIER|Equal0~1_combout & ( (\ROM|mem~0_combout +// & \REGS|regs[8][19]~q ) ) ) ) # ( !\rt_alu[17]~10_combout & ( !\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout & ( (!\ROM|mem~9_combout & (\ROM|mem~0_combout & (!\rt_alu[17]~11_combout & \REGS|regs[8][19]~q ))) ) ) ) + + .dataa(!\ROM|mem~9_combout ), + .datab(!\ROM|mem~0_combout ), + .datac(!\rt_alu[17]~11_combout ), + .datad(!\REGS|regs[8][19]~q ), + .datae(!\rt_alu[17]~10_combout ), + .dataf(!\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[19]~89_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[19]~89 .extended_lut = "off"; +defparam \rt_alu[19]~89 .lut_mask = 64'h0020000000330033; +defparam \rt_alu[19]~89 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X38_Y6_N42 +cyclonev_lcell_comb \ALU|adder_unit|operand[19]~6 ( +// Equation(s): +// \ALU|adder_unit|operand[19]~6_combout = ( \rt_alu[19]~84_combout & ( \rt_alu[31]~39_combout & ( !\CONTROL_UNIT|ALU_FN [1] $ ((((\rt_alu[19]~88_combout & \rt_alu[31]~40_combout )) # (\rt_alu[19]~89_combout ))) ) ) ) # ( !\rt_alu[19]~84_combout & ( +// \rt_alu[31]~39_combout & ( !\CONTROL_UNIT|ALU_FN [1] $ ((((\rt_alu[19]~88_combout & \rt_alu[31]~40_combout )) # (\rt_alu[19]~89_combout ))) ) ) ) # ( \rt_alu[19]~84_combout & ( !\rt_alu[31]~39_combout & ( !\CONTROL_UNIT|ALU_FN [1] $ +// (\rt_alu[31]~40_combout ) ) ) ) # ( !\rt_alu[19]~84_combout & ( !\rt_alu[31]~39_combout & ( !\CONTROL_UNIT|ALU_FN [1] ) ) ) + + .dataa(!\CONTROL_UNIT|ALU_FN [1]), + .datab(!\rt_alu[19]~89_combout ), + .datac(!\rt_alu[19]~88_combout ), + .datad(!\rt_alu[31]~40_combout ), + .datae(!\rt_alu[19]~84_combout ), + .dataf(!\rt_alu[31]~39_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\ALU|adder_unit|operand[19]~6_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \ALU|adder_unit|operand[19]~6 .extended_lut = "off"; +defparam \ALU|adder_unit|operand[19]~6 .lut_mask = 64'hAAAAAA5599959995; +defparam \ALU|adder_unit|operand[19]~6 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y15_N48 +cyclonev_lcell_comb \rd[20]~348 ( +// Equation(s): +// \rd[20]~348_combout = ( \ALU|Mux11~0_combout & ( \ALU|adder_unit|OUT_1 [20] & ( !\CONTROL_UNIT|M2R[0]~0_combout ) ) ) # ( !\ALU|Mux11~0_combout & ( \ALU|adder_unit|OUT_1 [20] & ( (!\ALU|Mux29~0_combout & !\CONTROL_UNIT|M2R[0]~0_combout ) ) ) ) # ( +// \ALU|Mux11~0_combout & ( !\ALU|adder_unit|OUT_1 [20] & ( !\CONTROL_UNIT|M2R[0]~0_combout ) ) ) + + .dataa(!\ALU|Mux29~0_combout ), + .datab(gnd), + .datac(!\CONTROL_UNIT|M2R[0]~0_combout ), + .datad(gnd), + .datae(!\ALU|Mux11~0_combout ), + .dataf(!\ALU|adder_unit|OUT_1 [20]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[20]~348_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[20]~348 .extended_lut = "off"; +defparam \rd[20]~348 .lut_mask = 64'h0000F0F0A0A0F0F0; +defparam \rd[20]~348 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X36_Y12_N11 +dffeas \REGS|regs[8][20] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[20]~348_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~24_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[8][20]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[8][20] .is_wysiwyg = "true"; +defparam \REGS|regs[8][20] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X36_Y12_N3 +cyclonev_lcell_comb \REGS|Mux11~1 ( +// Equation(s): +// \REGS|Mux11~1_combout = ( \ROM|mem~15_combout & ( (\ROM|mem~0_combout & \REGS|regs[9][20]~q ) ) ) # ( !\ROM|mem~15_combout & ( (\ROM|mem~0_combout & \REGS|regs[8][20]~q ) ) ) + + .dataa(!\ROM|mem~0_combout ), + .datab(gnd), + .datac(!\REGS|regs[8][20]~q ), + .datad(!\REGS|regs[9][20]~q ), + .datae(gnd), + .dataf(!\ROM|mem~15_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux11~1_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux11~1 .extended_lut = "off"; +defparam \REGS|Mux11~1 .lut_mask = 64'h0505050500550055; +defparam \REGS|Mux11~1 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X35_Y9_N3 +cyclonev_lcell_comb \REGS|Mux11~0 ( +// Equation(s): +// \REGS|Mux11~0_combout = ( \REGS|Mux43~1_combout & ( \ROM|mem~16_combout & ( (!\ROM|mem~9_combout & ((\REGS|Mux43~0_combout ))) # (\ROM|mem~9_combout & (\REGS|Mux43~4_combout )) ) ) ) # ( !\REGS|Mux43~1_combout & ( \ROM|mem~16_combout & ( +// (!\ROM|mem~9_combout & ((\REGS|Mux43~0_combout ))) # (\ROM|mem~9_combout & (\REGS|Mux43~4_combout )) ) ) ) # ( \REGS|Mux43~1_combout & ( !\ROM|mem~16_combout & ( (!\ROM|mem~9_combout ) # (\REGS|Mux43~5_combout ) ) ) ) # ( !\REGS|Mux43~1_combout & ( +// !\ROM|mem~16_combout & ( (\ROM|mem~9_combout & \REGS|Mux43~5_combout ) ) ) ) + + .dataa(!\ROM|mem~9_combout ), + .datab(!\REGS|Mux43~4_combout ), + .datac(!\REGS|Mux43~0_combout ), + .datad(!\REGS|Mux43~5_combout ), + .datae(!\REGS|Mux43~1_combout ), + .dataf(!\ROM|mem~16_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux11~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux11~0 .extended_lut = "off"; +defparam \REGS|Mux11~0 .lut_mask = 64'h0055AAFF1B1B1B1B; +defparam \REGS|Mux11~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X36_Y9_N30 +cyclonev_lcell_comb \REGS|Mux11~2 ( +// Equation(s): +// \REGS|Mux11~2_combout = ( \REGS|Mux11~0_combout & ( (((\ROM|mem~9_combout & \REGS|Mux43~2_combout )) # (\REGS|Mux11~1_combout )) # (\ROM|mem~17_combout ) ) ) # ( !\REGS|Mux11~0_combout & ( (!\ROM|mem~17_combout & (((\ROM|mem~9_combout & +// \REGS|Mux43~2_combout )) # (\REGS|Mux11~1_combout ))) ) ) + + .dataa(!\ROM|mem~17_combout ), + .datab(!\ROM|mem~9_combout ), + .datac(!\REGS|Mux11~1_combout ), + .datad(!\REGS|Mux43~2_combout ), + .datae(gnd), + .dataf(!\REGS|Mux11~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux11~2_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux11~2 .extended_lut = "off"; +defparam \REGS|Mux11~2 .lut_mask = 64'h0A2A0A2A5F7F5F7F; +defparam \REGS|Mux11~2 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X41_Y11_N45 +cyclonev_lcell_comb \rd[21]~435 ( +// Equation(s): +// \rd[21]~435_combout = ( \ALU|Mux10~0_combout & ( \ALU|adder_unit|OUT_1 [21] & ( !\CONTROL_UNIT|M2R[0]~0_combout ) ) ) # ( !\ALU|Mux10~0_combout & ( \ALU|adder_unit|OUT_1 [21] & ( (!\ALU|Mux29~0_combout & !\CONTROL_UNIT|M2R[0]~0_combout ) ) ) ) # ( +// \ALU|Mux10~0_combout & ( !\ALU|adder_unit|OUT_1 [21] & ( !\CONTROL_UNIT|M2R[0]~0_combout ) ) ) + + .dataa(gnd), + .datab(gnd), + .datac(!\ALU|Mux29~0_combout ), + .datad(!\CONTROL_UNIT|M2R[0]~0_combout ), + .datae(!\ALU|Mux10~0_combout ), + .dataf(!\ALU|adder_unit|OUT_1 [21]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[21]~435_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[21]~435 .extended_lut = "off"; +defparam \rd[21]~435 .lut_mask = 64'h0000FF00F000FF00; +defparam \rd[21]~435 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X36_Y12_N59 +dffeas \REGS|regs[8][21] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[21]~435_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~24_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[8][21]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[8][21] .is_wysiwyg = "true"; +defparam \REGS|regs[8][21] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X36_Y12_N12 +cyclonev_lcell_comb \rt_alu[21]~110 ( +// Equation(s): +// \rt_alu[21]~110_combout = ( \rt_alu[17]~11_combout & ( \CONTROL_UNIT|CLASSIFIER|Equal0~1_combout & ( (\ROM|mem~0_combout & \REGS|regs[8][21]~q ) ) ) ) # ( !\rt_alu[17]~11_combout & ( \CONTROL_UNIT|CLASSIFIER|Equal0~1_combout & ( (\ROM|mem~0_combout +// & \REGS|regs[8][21]~q ) ) ) ) # ( !\rt_alu[17]~11_combout & ( !\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout & ( (!\rt_alu[17]~10_combout & (\ROM|mem~0_combout & (!\ROM|mem~9_combout & \REGS|regs[8][21]~q ))) ) ) ) + + .dataa(!\rt_alu[17]~10_combout ), + .datab(!\ROM|mem~0_combout ), + .datac(!\ROM|mem~9_combout ), + .datad(!\REGS|regs[8][21]~q ), + .datae(!\rt_alu[17]~11_combout ), + .dataf(!\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[21]~110_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[21]~110 .extended_lut = "off"; +defparam \rt_alu[21]~110 .lut_mask = 64'h0020000000330033; +defparam \rt_alu[21]~110 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y13_N42 +cyclonev_lcell_comb \ALU|adder_unit|operand[21]~7 ( +// Equation(s): +// \ALU|adder_unit|operand[21]~7_combout = ( \rt_alu[21]~105_combout & ( \rt_alu[21]~109_combout & ( !\CONTROL_UNIT|ALU_FN [1] $ ((((\rt_alu[31]~39_combout & \rt_alu[21]~110_combout )) # (\rt_alu[31]~40_combout ))) ) ) ) # ( !\rt_alu[21]~105_combout & ( +// \rt_alu[21]~109_combout & ( !\CONTROL_UNIT|ALU_FN [1] $ (((\rt_alu[31]~39_combout & ((\rt_alu[21]~110_combout ) # (\rt_alu[31]~40_combout ))))) ) ) ) # ( \rt_alu[21]~105_combout & ( !\rt_alu[21]~109_combout & ( !\CONTROL_UNIT|ALU_FN [1] $ +// (((!\rt_alu[31]~39_combout & (\rt_alu[31]~40_combout )) # (\rt_alu[31]~39_combout & ((\rt_alu[21]~110_combout ))))) ) ) ) # ( !\rt_alu[21]~105_combout & ( !\rt_alu[21]~109_combout & ( !\CONTROL_UNIT|ALU_FN [1] $ (((\rt_alu[31]~39_combout & +// \rt_alu[21]~110_combout ))) ) ) ) + + .dataa(!\CONTROL_UNIT|ALU_FN [1]), + .datab(!\rt_alu[31]~40_combout ), + .datac(!\rt_alu[31]~39_combout ), + .datad(!\rt_alu[21]~110_combout ), + .datae(!\rt_alu[21]~105_combout ), + .dataf(!\rt_alu[21]~109_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\ALU|adder_unit|operand[21]~7_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \ALU|adder_unit|operand[21]~7 .extended_lut = "off"; +defparam \ALU|adder_unit|operand[21]~7 .lut_mask = 64'hAAA59A95A9A59995; +defparam \ALU|adder_unit|operand[21]~7 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X28_Y9_N3 +cyclonev_lcell_comb \rd[22]~437 ( +// Equation(s): +// \rd[22]~437_combout = ( \ALU|adder_unit|OUT_1 [22] & ( (!\CONTROL_UNIT|M2R[0]~0_combout & ((!\ALU|Mux29~0_combout ) # (\ALU|Mux9~0_combout ))) ) ) # ( !\ALU|adder_unit|OUT_1 [22] & ( (\ALU|Mux9~0_combout & !\CONTROL_UNIT|M2R[0]~0_combout ) ) ) + + .dataa(!\ALU|Mux29~0_combout ), + .datab(!\ALU|Mux9~0_combout ), + .datac(!\CONTROL_UNIT|M2R[0]~0_combout ), + .datad(gnd), + .datae(gnd), + .dataf(!\ALU|adder_unit|OUT_1 [22]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[22]~437_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[22]~437 .extended_lut = "off"; +defparam \rd[22]~437 .lut_mask = 64'h30303030B0B0B0B0; +defparam \rd[22]~437 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X37_Y12_N20 +dffeas \REGS|regs[22][22] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[22]~437_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~9_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[22][22]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[22][22] .is_wysiwyg = "true"; +defparam \REGS|regs[22][22] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X37_Y12_N32 +dffeas \REGS|regs[30][22]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[22]~437_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~10_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[30][22]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[30][22]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[30][22]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y12_N18 +cyclonev_lcell_comb \REGS|Mux41~5 ( +// Equation(s): +// \REGS|Mux41~5_combout = ( \REGS|regs[22][22]~q & ( \REGS|regs[30][22]~DUPLICATE_q ) ) # ( !\REGS|regs[22][22]~q & ( \REGS|regs[30][22]~DUPLICATE_q & ( (!\PC|pc [6] & (!\PC|pc [7] & (!\PC|pc[8]~DUPLICATE_q & !\PC|pc [9]))) ) ) ) # ( +// \REGS|regs[22][22]~q & ( !\REGS|regs[30][22]~DUPLICATE_q & ( (((\PC|pc [9]) # (\PC|pc[8]~DUPLICATE_q )) # (\PC|pc [7])) # (\PC|pc [6]) ) ) ) + + .dataa(!\PC|pc [6]), + .datab(!\PC|pc [7]), + .datac(!\PC|pc[8]~DUPLICATE_q ), + .datad(!\PC|pc [9]), + .datae(!\REGS|regs[22][22]~q ), + .dataf(!\REGS|regs[30][22]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux41~5_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux41~5 .extended_lut = "off"; +defparam \REGS|Mux41~5 .lut_mask = 64'h00007FFF8000FFFF; +defparam \REGS|Mux41~5 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X35_Y13_N54 +cyclonev_lcell_comb \REGS|Mux9~0 ( +// Equation(s): +// \REGS|Mux9~0_combout = ( \ROM|mem~16_combout & ( \REGS|Mux41~4_combout & ( (\ROM|mem~9_combout ) # (\REGS|Mux41~0_combout ) ) ) ) # ( !\ROM|mem~16_combout & ( \REGS|Mux41~4_combout & ( (!\ROM|mem~9_combout & ((\REGS|Mux41~1_combout ))) # +// (\ROM|mem~9_combout & (\REGS|Mux41~5_combout )) ) ) ) # ( \ROM|mem~16_combout & ( !\REGS|Mux41~4_combout & ( (\REGS|Mux41~0_combout & !\ROM|mem~9_combout ) ) ) ) # ( !\ROM|mem~16_combout & ( !\REGS|Mux41~4_combout & ( (!\ROM|mem~9_combout & +// ((\REGS|Mux41~1_combout ))) # (\ROM|mem~9_combout & (\REGS|Mux41~5_combout )) ) ) ) + + .dataa(!\REGS|Mux41~5_combout ), + .datab(!\REGS|Mux41~0_combout ), + .datac(!\REGS|Mux41~1_combout ), + .datad(!\ROM|mem~9_combout ), + .datae(!\ROM|mem~16_combout ), + .dataf(!\REGS|Mux41~4_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux9~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux9~0 .extended_lut = "off"; +defparam \REGS|Mux9~0 .lut_mask = 64'h0F5533000F5533FF; +defparam \REGS|Mux9~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y13_N27 +cyclonev_lcell_comb \REGS|Mux9~1 ( +// Equation(s): +// \REGS|Mux9~1_combout = ( \REGS|regs[9][22]~q & ( \ROM|mem~15_combout & ( \ROM|mem~0_combout ) ) ) # ( \REGS|regs[9][22]~q & ( !\ROM|mem~15_combout & ( (\ROM|mem~0_combout & \REGS|regs[8][22]~q ) ) ) ) # ( !\REGS|regs[9][22]~q & ( +// !\ROM|mem~15_combout & ( (\ROM|mem~0_combout & \REGS|regs[8][22]~q ) ) ) ) + + .dataa(gnd), + .datab(!\ROM|mem~0_combout ), + .datac(!\REGS|regs[8][22]~q ), + .datad(gnd), + .datae(!\REGS|regs[9][22]~q ), + .dataf(!\ROM|mem~15_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux9~1_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux9~1 .extended_lut = "off"; +defparam \REGS|Mux9~1 .lut_mask = 64'h0303030300003333; +defparam \REGS|Mux9~1 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X35_Y13_N18 +cyclonev_lcell_comb \REGS|Mux9~2 ( +// Equation(s): +// \REGS|Mux9~2_combout = ( \REGS|Mux9~1_combout & ( \ROM|mem~9_combout & ( (!\ROM|mem~17_combout ) # (\REGS|Mux9~0_combout ) ) ) ) # ( !\REGS|Mux9~1_combout & ( \ROM|mem~9_combout & ( (!\ROM|mem~17_combout & ((\REGS|Mux41~2_combout ))) # +// (\ROM|mem~17_combout & (\REGS|Mux9~0_combout )) ) ) ) # ( \REGS|Mux9~1_combout & ( !\ROM|mem~9_combout & ( (!\ROM|mem~17_combout ) # (\REGS|Mux9~0_combout ) ) ) ) # ( !\REGS|Mux9~1_combout & ( !\ROM|mem~9_combout & ( (\ROM|mem~17_combout & +// \REGS|Mux9~0_combout ) ) ) ) + + .dataa(gnd), + .datab(!\ROM|mem~17_combout ), + .datac(!\REGS|Mux9~0_combout ), + .datad(!\REGS|Mux41~2_combout ), + .datae(!\REGS|Mux9~1_combout ), + .dataf(!\ROM|mem~9_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux9~2_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux9~2 .extended_lut = "off"; +defparam \REGS|Mux9~2 .lut_mask = 64'h0303CFCF03CFCFCF; +defparam \REGS|Mux9~2 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y9_N48 +cyclonev_lcell_comb \ALU|Mux8~1 ( +// Equation(s): +// \ALU|Mux8~1_combout = ( \ALU|adder_unit|OUT_1 [23] & ( (!\ALU|Mux8~0_combout & \ALU|Mux29~0_combout ) ) ) # ( !\ALU|adder_unit|OUT_1 [23] & ( !\ALU|Mux8~0_combout ) ) + + .dataa(gnd), + .datab(gnd), + .datac(!\ALU|Mux8~0_combout ), + .datad(!\ALU|Mux29~0_combout ), + .datae(gnd), + .dataf(!\ALU|adder_unit|OUT_1 [23]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\ALU|Mux8~1_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \ALU|Mux8~1 .extended_lut = "off"; +defparam \ALU|Mux8~1 .lut_mask = 64'hF0F0F0F000F000F0; +defparam \ALU|Mux8~1 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X33_Y9_N39 +cyclonev_lcell_comb \rd[23]~439 ( +// Equation(s): +// \rd[23]~439_combout = ( !\ALU|Mux8~1_combout & ( !\CONTROL_UNIT|M2R[0]~0_combout ) ) + + .dataa(gnd), + .datab(gnd), + .datac(!\CONTROL_UNIT|M2R[0]~0_combout ), + .datad(gnd), + .datae(gnd), + .dataf(!\ALU|Mux8~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[23]~439_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[23]~439 .extended_lut = "off"; +defparam \rd[23]~439 .lut_mask = 64'hF0F0F0F000000000; +defparam \rd[23]~439 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X31_Y13_N20 +dffeas \REGS|regs[26][23] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[23]~439_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~6_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[26][23]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[26][23] .is_wysiwyg = "true"; +defparam \REGS|regs[26][23] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X31_Y13_N8 +dffeas \REGS|regs[18][23] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[23]~439_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~5_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[18][23]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[18][23] .is_wysiwyg = "true"; +defparam \REGS|regs[18][23] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X31_Y13_N54 +cyclonev_lcell_comb \REGS|Mux40~4 ( +// Equation(s): +// \REGS|Mux40~4_combout = ( \ROM|mem~0_combout & ( \REGS|regs[26][23]~q ) ) # ( !\ROM|mem~0_combout & ( \REGS|regs[18][23]~q ) ) + + .dataa(gnd), + .datab(gnd), + .datac(!\REGS|regs[26][23]~q ), + .datad(!\REGS|regs[18][23]~q ), + .datae(gnd), + .dataf(!\ROM|mem~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux40~4_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux40~4 .extended_lut = "off"; +defparam \REGS|Mux40~4 .lut_mask = 64'h00FF00FF0F0F0F0F; +defparam \REGS|Mux40~4 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X36_Y5_N45 +cyclonev_lcell_comb \REGS|Mux8~1 ( +// Equation(s): +// \REGS|Mux8~1_combout = ( \ROM|mem~15_combout & ( (\ROM|mem~0_combout & \REGS|regs[9][23]~q ) ) ) # ( !\ROM|mem~15_combout & ( (\ROM|mem~0_combout & \REGS|regs[8][23]~q ) ) ) + + .dataa(!\ROM|mem~0_combout ), + .datab(gnd), + .datac(!\REGS|regs[8][23]~q ), + .datad(!\REGS|regs[9][23]~q ), + .datae(gnd), + .dataf(!\ROM|mem~15_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux8~1_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux8~1 .extended_lut = "off"; +defparam \REGS|Mux8~1 .lut_mask = 64'h0505050500550055; +defparam \REGS|Mux8~1 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X35_Y13_N36 +cyclonev_lcell_comb \REGS|Mux8~0 ( +// Equation(s): +// \REGS|Mux8~0_combout = ( \REGS|Mux40~2_combout & ( \REGS|Mux40~3_combout & ( ((!\ROM|mem~16_combout & (\REGS|Mux40~0_combout )) # (\ROM|mem~16_combout & ((\REGS|Mux40~1_combout )))) # (\ROM|mem~9_combout ) ) ) ) # ( !\REGS|Mux40~2_combout & ( +// \REGS|Mux40~3_combout & ( (!\ROM|mem~16_combout & (\REGS|Mux40~0_combout & ((!\ROM|mem~9_combout )))) # (\ROM|mem~16_combout & (((\ROM|mem~9_combout ) # (\REGS|Mux40~1_combout )))) ) ) ) # ( \REGS|Mux40~2_combout & ( !\REGS|Mux40~3_combout & ( +// (!\ROM|mem~16_combout & (((\ROM|mem~9_combout )) # (\REGS|Mux40~0_combout ))) # (\ROM|mem~16_combout & (((\REGS|Mux40~1_combout & !\ROM|mem~9_combout )))) ) ) ) # ( !\REGS|Mux40~2_combout & ( !\REGS|Mux40~3_combout & ( (!\ROM|mem~9_combout & +// ((!\ROM|mem~16_combout & (\REGS|Mux40~0_combout )) # (\ROM|mem~16_combout & ((\REGS|Mux40~1_combout ))))) ) ) ) + + .dataa(!\REGS|Mux40~0_combout ), + .datab(!\ROM|mem~16_combout ), + .datac(!\REGS|Mux40~1_combout ), + .datad(!\ROM|mem~9_combout ), + .datae(!\REGS|Mux40~2_combout ), + .dataf(!\REGS|Mux40~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux8~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux8~0 .extended_lut = "off"; +defparam \REGS|Mux8~0 .lut_mask = 64'h470047CC473347FF; +defparam \REGS|Mux8~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X36_Y13_N57 +cyclonev_lcell_comb \REGS|Mux8~2 ( +// Equation(s): +// \REGS|Mux8~2_combout = ( \ROM|mem~17_combout & ( \REGS|Mux8~0_combout ) ) # ( !\ROM|mem~17_combout & ( \REGS|Mux8~0_combout & ( ((\REGS|Mux40~4_combout & \ROM|mem~9_combout )) # (\REGS|Mux8~1_combout ) ) ) ) # ( !\ROM|mem~17_combout & ( +// !\REGS|Mux8~0_combout & ( ((\REGS|Mux40~4_combout & \ROM|mem~9_combout )) # (\REGS|Mux8~1_combout ) ) ) ) + + .dataa(gnd), + .datab(!\REGS|Mux40~4_combout ), + .datac(!\REGS|Mux8~1_combout ), + .datad(!\ROM|mem~9_combout ), + .datae(!\ROM|mem~17_combout ), + .dataf(!\REGS|Mux8~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux8~2_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux8~2 .extended_lut = "off"; +defparam \REGS|Mux8~2 .lut_mask = 64'h0F3F00000F3FFFFF; +defparam \REGS|Mux8~2 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y9_N45 +cyclonev_lcell_comb \ALU|Mux7~1 ( +// Equation(s): +// \ALU|Mux7~1_combout = ( \ALU|Mux29~0_combout & ( \ALU|adder_unit|OUT_1 [24] & ( !\ALU|Mux7~0_combout ) ) ) # ( \ALU|Mux29~0_combout & ( !\ALU|adder_unit|OUT_1 [24] & ( !\ALU|Mux7~0_combout ) ) ) # ( !\ALU|Mux29~0_combout & ( !\ALU|adder_unit|OUT_1 +// [24] & ( !\ALU|Mux7~0_combout ) ) ) + + .dataa(gnd), + .datab(gnd), + .datac(!\ALU|Mux7~0_combout ), + .datad(gnd), + .datae(!\ALU|Mux29~0_combout ), + .dataf(!\ALU|adder_unit|OUT_1 [24]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\ALU|Mux7~1_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \ALU|Mux7~1 .extended_lut = "off"; +defparam \ALU|Mux7~1 .lut_mask = 64'hF0F0F0F00000F0F0; +defparam \ALU|Mux7~1 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X33_Y9_N15 +cyclonev_lcell_comb \rd[24]~441 ( +// Equation(s): +// \rd[24]~441_combout = (!\CONTROL_UNIT|M2R[0]~0_combout & !\ALU|Mux7~1_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(!\CONTROL_UNIT|M2R[0]~0_combout ), + .datad(!\ALU|Mux7~1_combout ), + .datae(gnd), + .dataf(gnd), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[24]~441_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[24]~441 .extended_lut = "off"; +defparam \rd[24]~441 .lut_mask = 64'hF000F000F000F000; +defparam \rd[24]~441 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X32_Y11_N20 +dffeas \REGS|regs[23][24] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[24]~441_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~18_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[23][24]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[23][24] .is_wysiwyg = "true"; +defparam \REGS|regs[23][24] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y9_N38 +dffeas \REGS|regs[31][24] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[24]~441_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~19_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[31][24]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[31][24] .is_wysiwyg = "true"; +defparam \REGS|regs[31][24] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y11_N21 +cyclonev_lcell_comb \REGS|Mux39~4 ( +// Equation(s): +// \REGS|Mux39~4_combout = ( \PC|pc[7]~DUPLICATE_q & ( \REGS|regs[31][24]~q & ( \REGS|regs[23][24]~q ) ) ) # ( !\PC|pc[7]~DUPLICATE_q & ( \REGS|regs[31][24]~q & ( ((!\PC|pc[6]~DUPLICATE_q & (!\PC|pc[8]~DUPLICATE_q & !\PC|pc [9]))) # +// (\REGS|regs[23][24]~q ) ) ) ) # ( \PC|pc[7]~DUPLICATE_q & ( !\REGS|regs[31][24]~q & ( \REGS|regs[23][24]~q ) ) ) # ( !\PC|pc[7]~DUPLICATE_q & ( !\REGS|regs[31][24]~q & ( (\REGS|regs[23][24]~q & (((\PC|pc [9]) # (\PC|pc[8]~DUPLICATE_q )) # +// (\PC|pc[6]~DUPLICATE_q ))) ) ) ) + + .dataa(!\REGS|regs[23][24]~q ), + .datab(!\PC|pc[6]~DUPLICATE_q ), + .datac(!\PC|pc[8]~DUPLICATE_q ), + .datad(!\PC|pc [9]), + .datae(!\PC|pc[7]~DUPLICATE_q ), + .dataf(!\REGS|regs[31][24]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux39~4_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux39~4 .extended_lut = "off"; +defparam \REGS|Mux39~4 .lut_mask = 64'h15555555D5555555; +defparam \REGS|Mux39~4 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y11_N12 +cyclonev_lcell_comb \REGS|Mux7~0 ( +// Equation(s): +// \REGS|Mux7~0_combout = ( \ROM|mem~16_combout & ( \REGS|Mux39~5_combout & ( (!\ROM|mem~9_combout & ((\REGS|Mux39~0_combout ))) # (\ROM|mem~9_combout & (\REGS|Mux39~4_combout )) ) ) ) # ( !\ROM|mem~16_combout & ( \REGS|Mux39~5_combout & ( +// (\REGS|Mux39~1_combout ) # (\ROM|mem~9_combout ) ) ) ) # ( \ROM|mem~16_combout & ( !\REGS|Mux39~5_combout & ( (!\ROM|mem~9_combout & ((\REGS|Mux39~0_combout ))) # (\ROM|mem~9_combout & (\REGS|Mux39~4_combout )) ) ) ) # ( !\ROM|mem~16_combout & ( +// !\REGS|Mux39~5_combout & ( (!\ROM|mem~9_combout & \REGS|Mux39~1_combout ) ) ) ) + + .dataa(!\REGS|Mux39~4_combout ), + .datab(!\REGS|Mux39~0_combout ), + .datac(!\ROM|mem~9_combout ), + .datad(!\REGS|Mux39~1_combout ), + .datae(!\ROM|mem~16_combout ), + .dataf(!\REGS|Mux39~5_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux7~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux7~0 .extended_lut = "off"; +defparam \REGS|Mux7~0 .lut_mask = 64'h00F035350FFF3535; +defparam \REGS|Mux7~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X31_Y11_N4 +dffeas \REGS|regs[9][24]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[24]~441_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~29_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[9][24]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[9][24]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[9][24]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X28_Y11_N12 +cyclonev_lcell_comb \REGS|Mux7~1 ( +// Equation(s): +// \REGS|Mux7~1_combout = ( \ROM|mem~0_combout & ( \ROM|mem~15_combout & ( \REGS|regs[9][24]~DUPLICATE_q ) ) ) # ( \ROM|mem~0_combout & ( !\ROM|mem~15_combout & ( \REGS|regs[8][24]~q ) ) ) + + .dataa(gnd), + .datab(gnd), + .datac(!\REGS|regs[9][24]~DUPLICATE_q ), + .datad(!\REGS|regs[8][24]~q ), + .datae(!\ROM|mem~0_combout ), + .dataf(!\ROM|mem~15_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux7~1_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux7~1 .extended_lut = "off"; +defparam \REGS|Mux7~1 .lut_mask = 64'h000000FF00000F0F; +defparam \REGS|Mux7~1 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y11_N30 +cyclonev_lcell_comb \REGS|Mux7~2 ( +// Equation(s): +// \REGS|Mux7~2_combout = ( \REGS|Mux39~2_combout & ( \REGS|Mux7~1_combout & ( (!\ROM|mem~17_combout ) # (\REGS|Mux7~0_combout ) ) ) ) # ( !\REGS|Mux39~2_combout & ( \REGS|Mux7~1_combout & ( (!\ROM|mem~17_combout ) # (\REGS|Mux7~0_combout ) ) ) ) # ( +// \REGS|Mux39~2_combout & ( !\REGS|Mux7~1_combout & ( (!\ROM|mem~17_combout & (\ROM|mem~9_combout )) # (\ROM|mem~17_combout & ((\REGS|Mux7~0_combout ))) ) ) ) # ( !\REGS|Mux39~2_combout & ( !\REGS|Mux7~1_combout & ( (\ROM|mem~17_combout & +// \REGS|Mux7~0_combout ) ) ) ) + + .dataa(!\ROM|mem~9_combout ), + .datab(gnd), + .datac(!\ROM|mem~17_combout ), + .datad(!\REGS|Mux7~0_combout ), + .datae(!\REGS|Mux39~2_combout ), + .dataf(!\REGS|Mux7~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux7~2_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux7~2 .extended_lut = "off"; +defparam \REGS|Mux7~2 .lut_mask = 64'h000F505FF0FFF0FF; +defparam \REGS|Mux7~2 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X28_Y7_N6 +cyclonev_lcell_comb \rd[25]~443 ( +// Equation(s): +// \rd[25]~443_combout = ( \ALU|adder_unit|OUT_1 [25] & ( (!\CONTROL_UNIT|M2R[0]~0_combout & ((!\ALU|Mux29~0_combout ) # (\ALU|Mux6~0_combout ))) ) ) # ( !\ALU|adder_unit|OUT_1 [25] & ( (!\CONTROL_UNIT|M2R[0]~0_combout & \ALU|Mux6~0_combout ) ) ) + + .dataa(!\CONTROL_UNIT|M2R[0]~0_combout ), + .datab(!\ALU|Mux6~0_combout ), + .datac(!\ALU|Mux29~0_combout ), + .datad(gnd), + .datae(!\ALU|adder_unit|OUT_1 [25]), + .dataf(gnd), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[25]~443_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[25]~443 .extended_lut = "off"; +defparam \rd[25]~443 .lut_mask = 64'h2222A2A22222A2A2; +defparam \rd[25]~443 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X32_Y8_N14 +dffeas \REGS|regs[23][25] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[25]~443_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~18_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[23][25]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[23][25] .is_wysiwyg = "true"; +defparam \REGS|regs[23][25] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X28_Y7_N49 +dffeas \REGS|regs[31][25] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[25]~443_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~19_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[31][25]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[31][25] .is_wysiwyg = "true"; +defparam \REGS|regs[31][25] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y8_N15 +cyclonev_lcell_comb \REGS|Mux38~3 ( +// Equation(s): +// \REGS|Mux38~3_combout = ( \REGS|regs[31][25]~q & ( \PC|pc [9] & ( \REGS|regs[23][25]~q ) ) ) # ( !\REGS|regs[31][25]~q & ( \PC|pc [9] & ( \REGS|regs[23][25]~q ) ) ) # ( \REGS|regs[31][25]~q & ( !\PC|pc [9] & ( ((!\PC|pc[7]~DUPLICATE_q & (!\PC|pc +// [8] & !\PC|pc [6]))) # (\REGS|regs[23][25]~q ) ) ) ) # ( !\REGS|regs[31][25]~q & ( !\PC|pc [9] & ( (\REGS|regs[23][25]~q & (((\PC|pc [6]) # (\PC|pc [8])) # (\PC|pc[7]~DUPLICATE_q ))) ) ) ) + + .dataa(!\PC|pc[7]~DUPLICATE_q ), + .datab(!\PC|pc [8]), + .datac(!\REGS|regs[23][25]~q ), + .datad(!\PC|pc [6]), + .datae(!\REGS|regs[31][25]~q ), + .dataf(!\PC|pc [9]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux38~3_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux38~3 .extended_lut = "off"; +defparam \REGS|Mux38~3 .lut_mask = 64'h070F8F0F0F0F0F0F; +defparam \REGS|Mux38~3 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y8_N6 +cyclonev_lcell_comb \REGS|Mux6~0 ( +// Equation(s): +// \REGS|Mux6~0_combout = ( \REGS|Mux38~2_combout & ( \REGS|Mux38~0_combout & ( (!\ROM|mem~16_combout ) # ((!\ROM|mem~9_combout & ((\REGS|Mux38~1_combout ))) # (\ROM|mem~9_combout & (\REGS|Mux38~3_combout ))) ) ) ) # ( !\REGS|Mux38~2_combout & ( +// \REGS|Mux38~0_combout & ( (!\ROM|mem~9_combout & (((!\ROM|mem~16_combout ) # (\REGS|Mux38~1_combout )))) # (\ROM|mem~9_combout & (\REGS|Mux38~3_combout & (\ROM|mem~16_combout ))) ) ) ) # ( \REGS|Mux38~2_combout & ( !\REGS|Mux38~0_combout & ( +// (!\ROM|mem~9_combout & (((\ROM|mem~16_combout & \REGS|Mux38~1_combout )))) # (\ROM|mem~9_combout & (((!\ROM|mem~16_combout )) # (\REGS|Mux38~3_combout ))) ) ) ) # ( !\REGS|Mux38~2_combout & ( !\REGS|Mux38~0_combout & ( (\ROM|mem~16_combout & +// ((!\ROM|mem~9_combout & ((\REGS|Mux38~1_combout ))) # (\ROM|mem~9_combout & (\REGS|Mux38~3_combout )))) ) ) ) + + .dataa(!\ROM|mem~9_combout ), + .datab(!\REGS|Mux38~3_combout ), + .datac(!\ROM|mem~16_combout ), + .datad(!\REGS|Mux38~1_combout ), + .datae(!\REGS|Mux38~2_combout ), + .dataf(!\REGS|Mux38~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux6~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux6~0 .extended_lut = "off"; +defparam \REGS|Mux6~0 .lut_mask = 64'h010B515BA1ABF1FB; +defparam \REGS|Mux6~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y8_N45 +cyclonev_lcell_comb \REGS|Mux6~1 ( +// Equation(s): +// \REGS|Mux6~1_combout = ( \ROM|mem~15_combout & ( (\REGS|regs[9][25]~DUPLICATE_q & \ROM|mem~0_combout ) ) ) # ( !\ROM|mem~15_combout & ( (\REGS|regs[8][25]~q & \ROM|mem~0_combout ) ) ) + + .dataa(gnd), + .datab(!\REGS|regs[9][25]~DUPLICATE_q ), + .datac(!\REGS|regs[8][25]~q ), + .datad(!\ROM|mem~0_combout ), + .datae(gnd), + .dataf(!\ROM|mem~15_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux6~1_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux6~1 .extended_lut = "off"; +defparam \REGS|Mux6~1 .lut_mask = 64'h000F000F00330033; +defparam \REGS|Mux6~1 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y8_N36 +cyclonev_lcell_comb \REGS|Mux6~2 ( +// Equation(s): +// \REGS|Mux6~2_combout = ( \ROM|mem~17_combout & ( \REGS|Mux38~4_combout & ( \REGS|Mux6~0_combout ) ) ) # ( !\ROM|mem~17_combout & ( \REGS|Mux38~4_combout & ( (\REGS|Mux6~1_combout ) # (\ROM|mem~9_combout ) ) ) ) # ( \ROM|mem~17_combout & ( +// !\REGS|Mux38~4_combout & ( \REGS|Mux6~0_combout ) ) ) # ( !\ROM|mem~17_combout & ( !\REGS|Mux38~4_combout & ( \REGS|Mux6~1_combout ) ) ) + + .dataa(gnd), + .datab(!\REGS|Mux6~0_combout ), + .datac(!\ROM|mem~9_combout ), + .datad(!\REGS|Mux6~1_combout ), + .datae(!\ROM|mem~17_combout ), + .dataf(!\REGS|Mux38~4_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux6~2_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux6~2 .extended_lut = "off"; +defparam \REGS|Mux6~2 .lut_mask = 64'h00FF33330FFF3333; +defparam \REGS|Mux6~2 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X27_Y9_N0 +cyclonev_lcell_comb \rd[26]~445 ( +// Equation(s): +// \rd[26]~445_combout = ( \ALU|Mux5~0_combout & ( \ALU|adder_unit|OUT_1 [26] & ( !\CONTROL_UNIT|M2R[0]~0_combout ) ) ) # ( !\ALU|Mux5~0_combout & ( \ALU|adder_unit|OUT_1 [26] & ( (!\CONTROL_UNIT|M2R[0]~0_combout & !\ALU|Mux29~0_combout ) ) ) ) # ( +// \ALU|Mux5~0_combout & ( !\ALU|adder_unit|OUT_1 [26] & ( !\CONTROL_UNIT|M2R[0]~0_combout ) ) ) + + .dataa(gnd), + .datab(!\CONTROL_UNIT|M2R[0]~0_combout ), + .datac(gnd), + .datad(!\ALU|Mux29~0_combout ), + .datae(!\ALU|Mux5~0_combout ), + .dataf(!\ALU|adder_unit|OUT_1 [26]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[26]~445_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[26]~445 .extended_lut = "off"; +defparam \rd[26]~445 .lut_mask = 64'h0000CCCCCC00CCCC; +defparam \rd[26]~445 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X31_Y8_N44 +dffeas \REGS|regs[9][26]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[26]~445_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~29_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[9][26]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[9][26]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[9][26]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y6_N51 +cyclonev_lcell_comb \REGS|regs[15][26]~feeder ( +// Equation(s): +// \REGS|regs[15][26]~feeder_combout = ( \rd[26]~445_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[26]~445_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[15][26]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[15][26]~feeder .extended_lut = "off"; +defparam \REGS|regs[15][26]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[15][26]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X32_Y6_N52 +dffeas \REGS|regs[15][26] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[15][26]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~39_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[15][26]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[15][26] .is_wysiwyg = "true"; +defparam \REGS|regs[15][26] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X32_Y6_N35 +dffeas \REGS|regs[14][26] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[26]~445_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~35_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[14][26]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[14][26] .is_wysiwyg = "true"; +defparam \REGS|regs[14][26] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X32_Y6_N8 +dffeas \REGS|regs[6][26] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[26]~445_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~34_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[6][26]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[6][26] .is_wysiwyg = "true"; +defparam \REGS|regs[6][26] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X31_Y8_N30 +cyclonev_lcell_comb \rt_alu[26]~173 ( +// Equation(s): +// \rt_alu[26]~173_combout = ( \REGS|regs[6][26]~q & ( (!\ROM|mem~0_combout ) # ((!\ROM|mem~10_combout & (\REGS|regs[15][26]~q )) # (\ROM|mem~10_combout & ((\REGS|regs[14][26]~q )))) ) ) # ( !\REGS|regs[6][26]~q & ( (\ROM|mem~0_combout & +// ((!\ROM|mem~10_combout & (\REGS|regs[15][26]~q )) # (\ROM|mem~10_combout & ((\REGS|regs[14][26]~q ))))) ) ) + + .dataa(!\ROM|mem~0_combout ), + .datab(!\REGS|regs[15][26]~q ), + .datac(!\REGS|regs[14][26]~q ), + .datad(!\ROM|mem~10_combout ), + .datae(gnd), + .dataf(!\REGS|regs[6][26]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[26]~173_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[26]~173 .extended_lut = "off"; +defparam \rt_alu[26]~173 .lut_mask = 64'h11051105BBAFBBAF; +defparam \rt_alu[26]~173 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X28_Y8_N8 +dffeas \REGS|regs[2][26] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[26]~445_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~32_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[2][26]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[2][26] .is_wysiwyg = "true"; +defparam \REGS|regs[2][26] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X28_Y8_N44 +dffeas \REGS|regs[11][26] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[26]~445_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~37_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[11][26]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[11][26] .is_wysiwyg = "true"; +defparam \REGS|regs[11][26] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X28_Y8_N59 +dffeas \REGS|regs[10][26] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[26]~445_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~33_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[10][26]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[10][26] .is_wysiwyg = "true"; +defparam \REGS|regs[10][26] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X28_Y8_N33 +cyclonev_lcell_comb \rt_alu[26]~172 ( +// Equation(s): +// \rt_alu[26]~172_combout = ( \REGS|regs[10][26]~q & ( \ROM|mem~10_combout & ( (\ROM|mem~0_combout ) # (\REGS|regs[2][26]~q ) ) ) ) # ( !\REGS|regs[10][26]~q & ( \ROM|mem~10_combout & ( (\REGS|regs[2][26]~q & !\ROM|mem~0_combout ) ) ) ) # ( +// \REGS|regs[10][26]~q & ( !\ROM|mem~10_combout & ( (!\ROM|mem~0_combout & (\REGS|regs[2][26]~q )) # (\ROM|mem~0_combout & ((\REGS|regs[11][26]~q ))) ) ) ) # ( !\REGS|regs[10][26]~q & ( !\ROM|mem~10_combout & ( (!\ROM|mem~0_combout & +// (\REGS|regs[2][26]~q )) # (\ROM|mem~0_combout & ((\REGS|regs[11][26]~q ))) ) ) ) + + .dataa(gnd), + .datab(!\REGS|regs[2][26]~q ), + .datac(!\REGS|regs[11][26]~q ), + .datad(!\ROM|mem~0_combout ), + .datae(!\REGS|regs[10][26]~q ), + .dataf(!\ROM|mem~10_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[26]~172_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[26]~172 .extended_lut = "off"; +defparam \rt_alu[26]~172 .lut_mask = 64'h330F330F330033FF; +defparam \rt_alu[26]~172 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X31_Y8_N33 +cyclonev_lcell_comb \rt_alu[26]~174 ( +// Equation(s): +// \rt_alu[26]~174_combout = ( \REGS|Mux37~1_combout & ( (!\ROM|mem~0_combout ) # ((\REGS|Mux37~0_combout ) # (\ROM|mem~10_combout )) ) ) # ( !\REGS|Mux37~1_combout & ( (\ROM|mem~0_combout & (!\ROM|mem~10_combout & \REGS|Mux37~0_combout )) ) ) + + .dataa(!\ROM|mem~0_combout ), + .datab(gnd), + .datac(!\ROM|mem~10_combout ), + .datad(!\REGS|Mux37~0_combout ), + .datae(gnd), + .dataf(!\REGS|Mux37~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[26]~174_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[26]~174 .extended_lut = "off"; +defparam \rt_alu[26]~174 .lut_mask = 64'h00500050AFFFAFFF; +defparam \rt_alu[26]~174 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X31_Y8_N36 +cyclonev_lcell_comb \rt_alu[26]~175 ( +// Equation(s): +// \rt_alu[26]~175_combout = ( \rt_alu[26]~172_combout & ( \rt_alu[26]~174_combout & ( (!\ROM|mem~12_combout ) # ((\rt_alu[26]~173_combout ) # (\rt_alu[17]~10_combout )) ) ) ) # ( !\rt_alu[26]~172_combout & ( \rt_alu[26]~174_combout & ( +// (!\rt_alu[17]~10_combout & ((!\ROM|mem~12_combout ) # (\rt_alu[26]~173_combout ))) ) ) ) # ( \rt_alu[26]~172_combout & ( !\rt_alu[26]~174_combout & ( ((\ROM|mem~12_combout & \rt_alu[26]~173_combout )) # (\rt_alu[17]~10_combout ) ) ) ) # ( +// !\rt_alu[26]~172_combout & ( !\rt_alu[26]~174_combout & ( (\ROM|mem~12_combout & (!\rt_alu[17]~10_combout & \rt_alu[26]~173_combout )) ) ) ) + + .dataa(gnd), + .datab(!\ROM|mem~12_combout ), + .datac(!\rt_alu[17]~10_combout ), + .datad(!\rt_alu[26]~173_combout ), + .datae(!\rt_alu[26]~172_combout ), + .dataf(!\rt_alu[26]~174_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[26]~175_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[26]~175 .extended_lut = "off"; +defparam \rt_alu[26]~175 .lut_mask = 64'h00300F3FC0F0CFFF; +defparam \rt_alu[26]~175 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X31_Y13_N46 +dffeas \REGS|regs[1][26]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[26]~445_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~28_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[1][26]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[1][26]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[1][26]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X31_Y8_N48 +cyclonev_lcell_comb \rt_alu[26]~176 ( +// Equation(s): +// \rt_alu[26]~176_combout = ( \rt_alu[26]~175_combout & ( \REGS|regs[1][26]~DUPLICATE_q & ( (!\ROM|mem~0_combout ) # ((\rt_alu[17]~11_combout ) # (\REGS|regs[9][26]~DUPLICATE_q )) ) ) ) # ( !\rt_alu[26]~175_combout & ( \REGS|regs[1][26]~DUPLICATE_q & ( +// (!\rt_alu[17]~11_combout & ((!\ROM|mem~0_combout ) # (\REGS|regs[9][26]~DUPLICATE_q ))) ) ) ) # ( \rt_alu[26]~175_combout & ( !\REGS|regs[1][26]~DUPLICATE_q & ( ((\ROM|mem~0_combout & \REGS|regs[9][26]~DUPLICATE_q )) # (\rt_alu[17]~11_combout ) ) ) ) +// # ( !\rt_alu[26]~175_combout & ( !\REGS|regs[1][26]~DUPLICATE_q & ( (\ROM|mem~0_combout & (\REGS|regs[9][26]~DUPLICATE_q & !\rt_alu[17]~11_combout )) ) ) ) + + .dataa(!\ROM|mem~0_combout ), + .datab(!\REGS|regs[9][26]~DUPLICATE_q ), + .datac(!\rt_alu[17]~11_combout ), + .datad(gnd), + .datae(!\rt_alu[26]~175_combout ), + .dataf(!\REGS|regs[1][26]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[26]~176_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[26]~176 .extended_lut = "off"; +defparam \rt_alu[26]~176 .lut_mask = 64'h10101F1FB0B0BFBF; +defparam \rt_alu[26]~176 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X28_Y11_N34 +dffeas \REGS|regs[8][26]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[26]~445_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~24_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[8][26]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[8][26]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[8][26]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: FF_X30_Y10_N32 +dffeas \REGS|regs[27][26] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[26]~445_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~15_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[27][26]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[27][26] .is_wysiwyg = "true"; +defparam \REGS|regs[27][26] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y9_N34 +dffeas \REGS|regs[19][26] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[26]~445_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~14_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[19][26]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[19][26] .is_wysiwyg = "true"; +defparam \REGS|regs[19][26] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X30_Y10_N33 +cyclonev_lcell_comb \REGS|Mux37~3 ( +// Equation(s): +// \REGS|Mux37~3_combout = ( \ROM|mem~0_combout & ( \REGS|regs[27][26]~q ) ) # ( !\ROM|mem~0_combout & ( \REGS|regs[19][26]~q ) ) + + .dataa(gnd), + .datab(gnd), + .datac(!\REGS|regs[27][26]~q ), + .datad(!\REGS|regs[19][26]~q ), + .datae(gnd), + .dataf(!\ROM|mem~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux37~3_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux37~3 .extended_lut = "off"; +defparam \REGS|Mux37~3 .lut_mask = 64'h00FF00FF0F0F0F0F; +defparam \REGS|Mux37~3 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X31_Y6_N14 +dffeas \REGS|regs[20][26]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[26]~445_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~7_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[20][26]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[20][26]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[20][26]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: FF_X31_Y6_N56 +dffeas \REGS|regs[28][26] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[26]~445_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~8_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[28][26]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[28][26] .is_wysiwyg = "true"; +defparam \REGS|regs[28][26] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X31_Y6_N8 +dffeas \REGS|regs[29][26] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[26]~445_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~17_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[29][26]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[29][26] .is_wysiwyg = "true"; +defparam \REGS|regs[29][26] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X31_Y6_N18 +cyclonev_lcell_comb \rt_alu[26]~177 ( +// Equation(s): +// \rt_alu[26]~177_combout = ( \ROM|mem~10_combout & ( \ROM|mem~0_combout & ( \REGS|regs[28][26]~q ) ) ) # ( !\ROM|mem~10_combout & ( \ROM|mem~0_combout & ( \REGS|regs[29][26]~q ) ) ) # ( \ROM|mem~10_combout & ( !\ROM|mem~0_combout & ( +// \REGS|regs[20][26]~DUPLICATE_q ) ) ) # ( !\ROM|mem~10_combout & ( !\ROM|mem~0_combout & ( \REGS|regs[20][26]~DUPLICATE_q ) ) ) + + .dataa(gnd), + .datab(!\REGS|regs[20][26]~DUPLICATE_q ), + .datac(!\REGS|regs[28][26]~q ), + .datad(!\REGS|regs[29][26]~q ), + .datae(!\ROM|mem~10_combout ), + .dataf(!\ROM|mem~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[26]~177_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[26]~177 .extended_lut = "off"; +defparam \rt_alu[26]~177 .lut_mask = 64'h3333333300FF0F0F; +defparam \rt_alu[26]~177 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X31_Y8_N18 +cyclonev_lcell_comb \rt_alu[26]~178 ( +// Equation(s): +// \rt_alu[26]~178_combout = ( \rt_alu[26]~177_combout & ( \REGS|Mux37~4_combout & ( ((!\ROM|mem~12_combout ) # (\REGS|Mux37~5_combout )) # (\ROM|mem~13_combout ) ) ) ) # ( !\rt_alu[26]~177_combout & ( \REGS|Mux37~4_combout & ( (\ROM|mem~12_combout & +// ((\REGS|Mux37~5_combout ) # (\ROM|mem~13_combout ))) ) ) ) # ( \rt_alu[26]~177_combout & ( !\REGS|Mux37~4_combout & ( (!\ROM|mem~12_combout ) # ((!\ROM|mem~13_combout & \REGS|Mux37~5_combout )) ) ) ) # ( !\rt_alu[26]~177_combout & ( +// !\REGS|Mux37~4_combout & ( (!\ROM|mem~13_combout & (\REGS|Mux37~5_combout & \ROM|mem~12_combout )) ) ) ) + + .dataa(!\ROM|mem~13_combout ), + .datab(gnd), + .datac(!\REGS|Mux37~5_combout ), + .datad(!\ROM|mem~12_combout ), + .datae(!\rt_alu[26]~177_combout ), + .dataf(!\REGS|Mux37~4_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[26]~178_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[26]~178 .extended_lut = "off"; +defparam \rt_alu[26]~178 .lut_mask = 64'h000AFF0A005FFF5F; +defparam \rt_alu[26]~178 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X25_Y8_N44 +dffeas \REGS|regs[25][26] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[26]~445_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~13_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[25][26]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[25][26] .is_wysiwyg = "true"; +defparam \REGS|regs[25][26] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X25_Y8_N5 +dffeas \REGS|regs[16][26] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[26]~445_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~2_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[16][26]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[16][26] .is_wysiwyg = "true"; +defparam \REGS|regs[16][26] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X25_Y8_N11 +dffeas \REGS|regs[24][26]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[26]~445_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~4_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[24][26]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[24][26]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[24][26]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X25_Y8_N39 +cyclonev_lcell_comb \rt_alu[26]~179 ( +// Equation(s): +// \rt_alu[26]~179_combout = ( \REGS|regs[24][26]~DUPLICATE_q & ( (!\ROM|mem~0_combout & (((\REGS|regs[16][26]~q )))) # (\ROM|mem~0_combout & (((\REGS|regs[25][26]~q )) # (\ROM|mem~10_combout ))) ) ) # ( !\REGS|regs[24][26]~DUPLICATE_q & ( +// (!\ROM|mem~0_combout & (((\REGS|regs[16][26]~q )))) # (\ROM|mem~0_combout & (!\ROM|mem~10_combout & (\REGS|regs[25][26]~q ))) ) ) + + .dataa(!\ROM|mem~10_combout ), + .datab(!\ROM|mem~0_combout ), + .datac(!\REGS|regs[25][26]~q ), + .datad(!\REGS|regs[16][26]~q ), + .datae(gnd), + .dataf(!\REGS|regs[24][26]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[26]~179_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[26]~179 .extended_lut = "off"; +defparam \rt_alu[26]~179 .lut_mask = 64'h02CE02CE13DF13DF; +defparam \rt_alu[26]~179 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X31_Y8_N24 +cyclonev_lcell_comb \rt_alu[26]~180 ( +// Equation(s): +// \rt_alu[26]~180_combout = ( \REGS|Mux37~2_combout & ( \rt_alu[26]~179_combout & ( (!\rt_alu[17]~5_combout & (((!\rt_alu[17]~4_combout ) # (\rt_alu[26]~178_combout )))) # (\rt_alu[17]~5_combout & (((\rt_alu[17]~4_combout )) # (\REGS|Mux37~3_combout +// ))) ) ) ) # ( !\REGS|Mux37~2_combout & ( \rt_alu[26]~179_combout & ( (!\rt_alu[17]~5_combout & (((!\rt_alu[17]~4_combout ) # (\rt_alu[26]~178_combout )))) # (\rt_alu[17]~5_combout & (\REGS|Mux37~3_combout & ((!\rt_alu[17]~4_combout )))) ) ) ) # ( +// \REGS|Mux37~2_combout & ( !\rt_alu[26]~179_combout & ( (!\rt_alu[17]~5_combout & (((\rt_alu[26]~178_combout & \rt_alu[17]~4_combout )))) # (\rt_alu[17]~5_combout & (((\rt_alu[17]~4_combout )) # (\REGS|Mux37~3_combout ))) ) ) ) # ( +// !\REGS|Mux37~2_combout & ( !\rt_alu[26]~179_combout & ( (!\rt_alu[17]~5_combout & (((\rt_alu[26]~178_combout & \rt_alu[17]~4_combout )))) # (\rt_alu[17]~5_combout & (\REGS|Mux37~3_combout & ((!\rt_alu[17]~4_combout )))) ) ) ) + + .dataa(!\REGS|Mux37~3_combout ), + .datab(!\rt_alu[17]~5_combout ), + .datac(!\rt_alu[26]~178_combout ), + .datad(!\rt_alu[17]~4_combout ), + .datae(!\REGS|Mux37~2_combout ), + .dataf(!\rt_alu[26]~179_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[26]~180_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[26]~180 .extended_lut = "off"; +defparam \rt_alu[26]~180 .lut_mask = 64'h110C113FDD0CDD3F; +defparam \rt_alu[26]~180 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X31_Y8_N6 +cyclonev_lcell_comb \rt_alu[26]~181 ( +// Equation(s): +// \rt_alu[26]~181_combout = ( \rt_alu[31]~40_combout & ( \rt_alu[26]~180_combout & ( (\rt_alu[26]~176_combout ) # (\rt_alu[31]~39_combout ) ) ) ) # ( !\rt_alu[31]~40_combout & ( \rt_alu[26]~180_combout & ( (\rt_alu[31]~39_combout & (\ROM|mem~0_combout +// & \REGS|regs[8][26]~DUPLICATE_q )) ) ) ) # ( \rt_alu[31]~40_combout & ( !\rt_alu[26]~180_combout & ( (!\rt_alu[31]~39_combout & \rt_alu[26]~176_combout ) ) ) ) # ( !\rt_alu[31]~40_combout & ( !\rt_alu[26]~180_combout & ( (\rt_alu[31]~39_combout & +// (\ROM|mem~0_combout & \REGS|regs[8][26]~DUPLICATE_q )) ) ) ) + + .dataa(!\rt_alu[31]~39_combout ), + .datab(!\ROM|mem~0_combout ), + .datac(!\rt_alu[26]~176_combout ), + .datad(!\REGS|regs[8][26]~DUPLICATE_q ), + .datae(!\rt_alu[31]~40_combout ), + .dataf(!\rt_alu[26]~180_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[26]~181_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[26]~181 .extended_lut = "off"; +defparam \rt_alu[26]~181 .lut_mask = 64'h00110A0A00115F5F; +defparam \rt_alu[26]~181 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X33_Y5_N39 +cyclonev_lcell_comb \rd[27]~447 ( +// Equation(s): +// \rd[27]~447_combout = ( \ALU|Mux29~0_combout & ( \ALU|adder_unit|OUT_1 [27] & ( (!\CONTROL_UNIT|M2R[0]~0_combout & \ALU|Mux4~0_combout ) ) ) ) # ( !\ALU|Mux29~0_combout & ( \ALU|adder_unit|OUT_1 [27] & ( !\CONTROL_UNIT|M2R[0]~0_combout ) ) ) # ( +// \ALU|Mux29~0_combout & ( !\ALU|adder_unit|OUT_1 [27] & ( (!\CONTROL_UNIT|M2R[0]~0_combout & \ALU|Mux4~0_combout ) ) ) ) # ( !\ALU|Mux29~0_combout & ( !\ALU|adder_unit|OUT_1 [27] & ( (!\CONTROL_UNIT|M2R[0]~0_combout & \ALU|Mux4~0_combout ) ) ) ) + + .dataa(!\CONTROL_UNIT|M2R[0]~0_combout ), + .datab(gnd), + .datac(!\ALU|Mux4~0_combout ), + .datad(gnd), + .datae(!\ALU|Mux29~0_combout ), + .dataf(!\ALU|adder_unit|OUT_1 [27]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[27]~447_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[27]~447 .extended_lut = "off"; +defparam \rd[27]~447 .lut_mask = 64'h0A0A0A0AAAAA0A0A; +defparam \rd[27]~447 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X32_Y7_N59 +dffeas \REGS|regs[8][27]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[27]~447_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~24_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[8][27]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[8][27]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[8][27]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y7_N54 +cyclonev_lcell_comb \rt_alu[27]~200 ( +// Equation(s): +// \rt_alu[27]~200_combout = ( \rt_alu[17]~10_combout & ( \CONTROL_UNIT|CLASSIFIER|Equal0~1_combout & ( (\ROM|mem~0_combout & \REGS|regs[8][27]~DUPLICATE_q ) ) ) ) # ( !\rt_alu[17]~10_combout & ( \CONTROL_UNIT|CLASSIFIER|Equal0~1_combout & ( +// (\ROM|mem~0_combout & \REGS|regs[8][27]~DUPLICATE_q ) ) ) ) # ( !\rt_alu[17]~10_combout & ( !\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout & ( (\ROM|mem~0_combout & (\REGS|regs[8][27]~DUPLICATE_q & (!\rt_alu[17]~11_combout & !\ROM|mem~9_combout ))) ) ) +// ) + + .dataa(!\ROM|mem~0_combout ), + .datab(!\REGS|regs[8][27]~DUPLICATE_q ), + .datac(!\rt_alu[17]~11_combout ), + .datad(!\ROM|mem~9_combout ), + .datae(!\rt_alu[17]~10_combout ), + .dataf(!\CONTROL_UNIT|CLASSIFIER|Equal0~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[27]~200_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[27]~200 .extended_lut = "off"; +defparam \rt_alu[27]~200 .lut_mask = 64'h1000000011111111; +defparam \rt_alu[27]~200 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X33_Y7_N21 +cyclonev_lcell_comb \ALU|adder_unit|operand[27]~11 ( +// Equation(s): +// \ALU|adder_unit|operand[27]~11_combout = ( \rt_alu[27]~199_combout & ( \rt_alu[27]~195_combout & ( !\CONTROL_UNIT|ALU_FN [1] $ ((((\rt_alu[31]~39_combout & \rt_alu[27]~200_combout )) # (\rt_alu[31]~40_combout ))) ) ) ) # ( !\rt_alu[27]~199_combout & +// ( \rt_alu[27]~195_combout & ( !\CONTROL_UNIT|ALU_FN [1] $ (((!\rt_alu[31]~39_combout & (\rt_alu[31]~40_combout )) # (\rt_alu[31]~39_combout & ((\rt_alu[27]~200_combout ))))) ) ) ) # ( \rt_alu[27]~199_combout & ( !\rt_alu[27]~195_combout & ( +// !\CONTROL_UNIT|ALU_FN [1] $ (((\rt_alu[31]~39_combout & ((\rt_alu[27]~200_combout ) # (\rt_alu[31]~40_combout ))))) ) ) ) # ( !\rt_alu[27]~199_combout & ( !\rt_alu[27]~195_combout & ( !\CONTROL_UNIT|ALU_FN [1] $ (((\rt_alu[31]~39_combout & +// \rt_alu[27]~200_combout ))) ) ) ) + + .dataa(!\CONTROL_UNIT|ALU_FN [1]), + .datab(!\rt_alu[31]~39_combout ), + .datac(!\rt_alu[31]~40_combout ), + .datad(!\rt_alu[27]~200_combout ), + .datae(!\rt_alu[27]~199_combout ), + .dataf(!\rt_alu[27]~195_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\ALU|adder_unit|operand[27]~11_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \ALU|adder_unit|operand[27]~11 .extended_lut = "off"; +defparam \ALU|adder_unit|operand[27]~11 .lut_mask = 64'hAA99A999A695A595; +defparam \ALU|adder_unit|operand[27]~11 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X33_Y9_N18 +cyclonev_lcell_comb \rd[28]~449 ( +// Equation(s): +// \rd[28]~449_combout = ( \ALU|adder_unit|OUT_1 [28] & ( (!\CONTROL_UNIT|M2R[0]~0_combout & ((!\ALU|Mux29~0_combout ) # (\ALU|Mux3~0_combout ))) ) ) # ( !\ALU|adder_unit|OUT_1 [28] & ( (\ALU|Mux3~0_combout & !\CONTROL_UNIT|M2R[0]~0_combout ) ) ) + + .dataa(gnd), + .datab(!\ALU|Mux29~0_combout ), + .datac(!\ALU|Mux3~0_combout ), + .datad(!\CONTROL_UNIT|M2R[0]~0_combout ), + .datae(gnd), + .dataf(!\ALU|adder_unit|OUT_1 [28]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[28]~449_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[28]~449 .extended_lut = "off"; +defparam \rd[28]~449 .lut_mask = 64'h0F000F00CF00CF00; +defparam \rd[28]~449 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X33_Y9_N47 +dffeas \REGS|regs[8][28] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[28]~449_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~24_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[8][28]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[8][28] .is_wysiwyg = "true"; +defparam \REGS|regs[8][28] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X32_Y5_N8 +dffeas \REGS|regs[19][28] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[28]~449_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~14_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[19][28]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[19][28] .is_wysiwyg = "true"; +defparam \REGS|regs[19][28] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X32_Y5_N50 +dffeas \REGS|regs[27][28] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[28]~449_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~15_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[27][28]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[27][28] .is_wysiwyg = "true"; +defparam \REGS|regs[27][28] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y5_N9 +cyclonev_lcell_comb \REGS|Mux35~3 ( +// Equation(s): +// \REGS|Mux35~3_combout = ( \ROM|mem~0_combout & ( \REGS|regs[27][28]~q ) ) # ( !\ROM|mem~0_combout & ( \REGS|regs[19][28]~q ) ) + + .dataa(gnd), + .datab(gnd), + .datac(!\REGS|regs[19][28]~q ), + .datad(!\REGS|regs[27][28]~q ), + .datae(gnd), + .dataf(!\ROM|mem~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux35~3_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux35~3 .extended_lut = "off"; +defparam \REGS|Mux35~3 .lut_mask = 64'h0F0F0F0F00FF00FF; +defparam \REGS|Mux35~3 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X27_Y5_N15 +cyclonev_lcell_comb \REGS|regs[20][28]~feeder ( +// Equation(s): +// \REGS|regs[20][28]~feeder_combout = ( \rd[28]~449_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[28]~449_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[20][28]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[20][28]~feeder .extended_lut = "off"; +defparam \REGS|regs[20][28]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[20][28]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X27_Y5_N16 +dffeas \REGS|regs[20][28] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[20][28]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~7_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[20][28]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[20][28] .is_wysiwyg = "true"; +defparam \REGS|regs[20][28] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X28_Y7_N22 +dffeas \REGS|regs[28][28]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[28]~449_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~8_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[28][28]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[28][28]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[28][28]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: FF_X31_Y5_N26 +dffeas \REGS|regs[29][28] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[28]~449_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~17_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[29][28]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[29][28] .is_wysiwyg = "true"; +defparam \REGS|regs[29][28] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X31_Y5_N57 +cyclonev_lcell_comb \rt_alu[28]~217 ( +// Equation(s): +// \rt_alu[28]~217_combout = ( \ROM|mem~0_combout & ( \ROM|mem~10_combout & ( \REGS|regs[28][28]~DUPLICATE_q ) ) ) # ( !\ROM|mem~0_combout & ( \ROM|mem~10_combout & ( \REGS|regs[20][28]~q ) ) ) # ( \ROM|mem~0_combout & ( !\ROM|mem~10_combout & ( +// \REGS|regs[29][28]~q ) ) ) # ( !\ROM|mem~0_combout & ( !\ROM|mem~10_combout & ( \REGS|regs[20][28]~q ) ) ) + + .dataa(gnd), + .datab(!\REGS|regs[20][28]~q ), + .datac(!\REGS|regs[28][28]~DUPLICATE_q ), + .datad(!\REGS|regs[29][28]~q ), + .datae(!\ROM|mem~0_combout ), + .dataf(!\ROM|mem~10_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[28]~217_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[28]~217 .extended_lut = "off"; +defparam \rt_alu[28]~217 .lut_mask = 64'h333300FF33330F0F; +defparam \rt_alu[28]~217 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X31_Y5_N42 +cyclonev_lcell_comb \rt_alu[28]~218 ( +// Equation(s): +// \rt_alu[28]~218_combout = ( \ROM|mem~13_combout & ( \ROM|mem~12_combout & ( \REGS|Mux35~4_combout ) ) ) # ( !\ROM|mem~13_combout & ( \ROM|mem~12_combout & ( \REGS|Mux35~5_combout ) ) ) # ( \ROM|mem~13_combout & ( !\ROM|mem~12_combout & ( +// \rt_alu[28]~217_combout ) ) ) # ( !\ROM|mem~13_combout & ( !\ROM|mem~12_combout & ( \rt_alu[28]~217_combout ) ) ) + + .dataa(gnd), + .datab(!\REGS|Mux35~4_combout ), + .datac(!\REGS|Mux35~5_combout ), + .datad(!\rt_alu[28]~217_combout ), + .datae(!\ROM|mem~13_combout ), + .dataf(!\ROM|mem~12_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[28]~218_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[28]~218 .extended_lut = "off"; +defparam \rt_alu[28]~218 .lut_mask = 64'h00FF00FF0F0F3333; +defparam \rt_alu[28]~218 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X27_Y10_N28 +dffeas \REGS|regs[24][28]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[28]~449_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~4_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[24][28]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[24][28]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[24][28]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: FF_X28_Y7_N14 +dffeas \REGS|regs[25][28] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[28]~449_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~13_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[25][28]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[25][28] .is_wysiwyg = "true"; +defparam \REGS|regs[25][28] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X28_Y9_N17 +dffeas \REGS|regs[16][28] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[28]~449_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~2_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[16][28]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[16][28] .is_wysiwyg = "true"; +defparam \REGS|regs[16][28] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X28_Y7_N33 +cyclonev_lcell_comb \rt_alu[28]~219 ( +// Equation(s): +// \rt_alu[28]~219_combout = ( \ROM|mem~0_combout & ( \ROM|mem~10_combout & ( \REGS|regs[24][28]~DUPLICATE_q ) ) ) # ( !\ROM|mem~0_combout & ( \ROM|mem~10_combout & ( \REGS|regs[16][28]~q ) ) ) # ( \ROM|mem~0_combout & ( !\ROM|mem~10_combout & ( +// \REGS|regs[25][28]~q ) ) ) # ( !\ROM|mem~0_combout & ( !\ROM|mem~10_combout & ( \REGS|regs[16][28]~q ) ) ) + + .dataa(!\REGS|regs[24][28]~DUPLICATE_q ), + .datab(!\REGS|regs[25][28]~q ), + .datac(gnd), + .datad(!\REGS|regs[16][28]~q ), + .datae(!\ROM|mem~0_combout ), + .dataf(!\ROM|mem~10_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[28]~219_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[28]~219 .extended_lut = "off"; +defparam \rt_alu[28]~219 .lut_mask = 64'h00FF333300FF5555; +defparam \rt_alu[28]~219 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X31_Y9_N33 +cyclonev_lcell_comb \rt_alu[28]~220 ( +// Equation(s): +// \rt_alu[28]~220_combout = ( \REGS|Mux35~2_combout & ( \rt_alu[28]~219_combout & ( (!\rt_alu[17]~4_combout & (((!\rt_alu[17]~5_combout )) # (\REGS|Mux35~3_combout ))) # (\rt_alu[17]~4_combout & (((\rt_alu[28]~218_combout ) # (\rt_alu[17]~5_combout +// )))) ) ) ) # ( !\REGS|Mux35~2_combout & ( \rt_alu[28]~219_combout & ( (!\rt_alu[17]~4_combout & (((!\rt_alu[17]~5_combout )) # (\REGS|Mux35~3_combout ))) # (\rt_alu[17]~4_combout & (((!\rt_alu[17]~5_combout & \rt_alu[28]~218_combout )))) ) ) ) # ( +// \REGS|Mux35~2_combout & ( !\rt_alu[28]~219_combout & ( (!\rt_alu[17]~4_combout & (\REGS|Mux35~3_combout & (\rt_alu[17]~5_combout ))) # (\rt_alu[17]~4_combout & (((\rt_alu[28]~218_combout ) # (\rt_alu[17]~5_combout )))) ) ) ) # ( +// !\REGS|Mux35~2_combout & ( !\rt_alu[28]~219_combout & ( (!\rt_alu[17]~4_combout & (\REGS|Mux35~3_combout & (\rt_alu[17]~5_combout ))) # (\rt_alu[17]~4_combout & (((!\rt_alu[17]~5_combout & \rt_alu[28]~218_combout )))) ) ) ) + + .dataa(!\REGS|Mux35~3_combout ), + .datab(!\rt_alu[17]~4_combout ), + .datac(!\rt_alu[17]~5_combout ), + .datad(!\rt_alu[28]~218_combout ), + .datae(!\REGS|Mux35~2_combout ), + .dataf(!\rt_alu[28]~219_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[28]~220_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[28]~220 .extended_lut = "off"; +defparam \rt_alu[28]~220 .lut_mask = 64'h04340737C4F4C7F7; +defparam \rt_alu[28]~220 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X30_Y7_N27 +cyclonev_lcell_comb \REGS|regs[1][28]~feeder ( +// Equation(s): +// \REGS|regs[1][28]~feeder_combout = ( \rd[28]~449_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[28]~449_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[1][28]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[1][28]~feeder .extended_lut = "off"; +defparam \REGS|regs[1][28]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[1][28]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X30_Y7_N28 +dffeas \REGS|regs[1][28] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[1][28]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~28_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[1][28]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[1][28] .is_wysiwyg = "true"; +defparam \REGS|regs[1][28] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X32_Y6_N5 +dffeas \REGS|regs[6][28] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[28]~449_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~34_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[6][28]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[6][28] .is_wysiwyg = "true"; +defparam \REGS|regs[6][28] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X32_Y6_N14 +dffeas \REGS|regs[14][28] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[28]~449_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~35_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[14][28]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[14][28] .is_wysiwyg = "true"; +defparam \REGS|regs[14][28] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X32_Y6_N50 +dffeas \REGS|regs[15][28] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[28]~449_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~39_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[15][28]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[15][28] .is_wysiwyg = "true"; +defparam \REGS|regs[15][28] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y6_N39 +cyclonev_lcell_comb \rt_alu[28]~213 ( +// Equation(s): +// \rt_alu[28]~213_combout = ( \ROM|mem~10_combout & ( (!\ROM|mem~0_combout & (\REGS|regs[6][28]~q )) # (\ROM|mem~0_combout & ((\REGS|regs[14][28]~q ))) ) ) # ( !\ROM|mem~10_combout & ( (!\ROM|mem~0_combout & (\REGS|regs[6][28]~q )) # +// (\ROM|mem~0_combout & ((\REGS|regs[15][28]~q ))) ) ) + + .dataa(!\REGS|regs[6][28]~q ), + .datab(!\ROM|mem~0_combout ), + .datac(!\REGS|regs[14][28]~q ), + .datad(!\REGS|regs[15][28]~q ), + .datae(!\ROM|mem~10_combout ), + .dataf(gnd), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[28]~213_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[28]~213 .extended_lut = "off"; +defparam \rt_alu[28]~213 .lut_mask = 64'h4477474744774747; +defparam \rt_alu[28]~213 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X28_Y8_N18 +cyclonev_lcell_comb \REGS|regs[2][28]~feeder ( +// Equation(s): +// \REGS|regs[2][28]~feeder_combout = ( \rd[28]~449_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[28]~449_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[2][28]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[2][28]~feeder .extended_lut = "off"; +defparam \REGS|regs[2][28]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[2][28]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X28_Y8_N20 +dffeas \REGS|regs[2][28] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[2][28]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~32_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[2][28]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[2][28] .is_wysiwyg = "true"; +defparam \REGS|regs[2][28] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X28_Y6_N28 +dffeas \REGS|regs[10][28] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[28]~449_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~33_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[10][28]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[10][28] .is_wysiwyg = "true"; +defparam \REGS|regs[10][28] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X28_Y6_N23 +dffeas \REGS|regs[11][28] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[28]~449_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~37_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[11][28]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[11][28] .is_wysiwyg = "true"; +defparam \REGS|regs[11][28] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X28_Y6_N42 +cyclonev_lcell_comb \rt_alu[28]~212 ( +// Equation(s): +// \rt_alu[28]~212_combout = ( \ROM|mem~10_combout & ( \ROM|mem~0_combout & ( \REGS|regs[10][28]~q ) ) ) # ( !\ROM|mem~10_combout & ( \ROM|mem~0_combout & ( \REGS|regs[11][28]~q ) ) ) # ( \ROM|mem~10_combout & ( !\ROM|mem~0_combout & ( +// \REGS|regs[2][28]~q ) ) ) # ( !\ROM|mem~10_combout & ( !\ROM|mem~0_combout & ( \REGS|regs[2][28]~q ) ) ) + + .dataa(!\REGS|regs[2][28]~q ), + .datab(!\REGS|regs[10][28]~q ), + .datac(!\REGS|regs[11][28]~q ), + .datad(gnd), + .datae(!\ROM|mem~10_combout ), + .dataf(!\ROM|mem~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[28]~212_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[28]~212 .extended_lut = "off"; +defparam \rt_alu[28]~212 .lut_mask = 64'h555555550F0F3333; +defparam \rt_alu[28]~212 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y6_N15 +cyclonev_lcell_comb \rt_alu[28]~214 ( +// Equation(s): +// \rt_alu[28]~214_combout = ( \REGS|Mux35~1_combout & ( \REGS|Mux35~0_combout ) ) # ( !\REGS|Mux35~1_combout & ( \REGS|Mux35~0_combout & ( (\ROM|mem~0_combout & !\ROM|mem~10_combout ) ) ) ) # ( \REGS|Mux35~1_combout & ( !\REGS|Mux35~0_combout & ( +// (!\ROM|mem~0_combout ) # (\ROM|mem~10_combout ) ) ) ) + + .dataa(gnd), + .datab(!\ROM|mem~0_combout ), + .datac(gnd), + .datad(!\ROM|mem~10_combout ), + .datae(!\REGS|Mux35~1_combout ), + .dataf(!\REGS|Mux35~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[28]~214_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[28]~214 .extended_lut = "off"; +defparam \rt_alu[28]~214 .lut_mask = 64'h0000CCFF3300FFFF; +defparam \rt_alu[28]~214 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y6_N30 +cyclonev_lcell_comb \rt_alu[28]~215 ( +// Equation(s): +// \rt_alu[28]~215_combout = ( \rt_alu[28]~212_combout & ( \rt_alu[28]~214_combout & ( ((!\ROM|mem~12_combout ) # (\rt_alu[28]~213_combout )) # (\rt_alu[17]~10_combout ) ) ) ) # ( !\rt_alu[28]~212_combout & ( \rt_alu[28]~214_combout & ( +// (!\rt_alu[17]~10_combout & ((!\ROM|mem~12_combout ) # (\rt_alu[28]~213_combout ))) ) ) ) # ( \rt_alu[28]~212_combout & ( !\rt_alu[28]~214_combout & ( ((\ROM|mem~12_combout & \rt_alu[28]~213_combout )) # (\rt_alu[17]~10_combout ) ) ) ) # ( +// !\rt_alu[28]~212_combout & ( !\rt_alu[28]~214_combout & ( (!\rt_alu[17]~10_combout & (\ROM|mem~12_combout & \rt_alu[28]~213_combout )) ) ) ) + + .dataa(gnd), + .datab(!\rt_alu[17]~10_combout ), + .datac(!\ROM|mem~12_combout ), + .datad(!\rt_alu[28]~213_combout ), + .datae(!\rt_alu[28]~212_combout ), + .dataf(!\rt_alu[28]~214_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[28]~215_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[28]~215 .extended_lut = "off"; +defparam \rt_alu[28]~215 .lut_mask = 64'h000C333FC0CCF3FF; +defparam \rt_alu[28]~215 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y9_N48 +cyclonev_lcell_comb \rt_alu[28]~216 ( +// Equation(s): +// \rt_alu[28]~216_combout = ( \rt_alu[17]~11_combout & ( \rt_alu[28]~215_combout ) ) # ( !\rt_alu[17]~11_combout & ( \rt_alu[28]~215_combout & ( (!\ROM|mem~0_combout & (\REGS|regs[1][28]~q )) # (\ROM|mem~0_combout & ((\REGS|regs[9][28]~q ))) ) ) ) # +// ( !\rt_alu[17]~11_combout & ( !\rt_alu[28]~215_combout & ( (!\ROM|mem~0_combout & (\REGS|regs[1][28]~q )) # (\ROM|mem~0_combout & ((\REGS|regs[9][28]~q ))) ) ) ) + + .dataa(!\ROM|mem~0_combout ), + .datab(!\REGS|regs[1][28]~q ), + .datac(!\REGS|regs[9][28]~q ), + .datad(gnd), + .datae(!\rt_alu[17]~11_combout ), + .dataf(!\rt_alu[28]~215_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[28]~216_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[28]~216 .extended_lut = "off"; +defparam \rt_alu[28]~216 .lut_mask = 64'h272700002727FFFF; +defparam \rt_alu[28]~216 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y9_N54 +cyclonev_lcell_comb \rt_alu[28]~221 ( +// Equation(s): +// \rt_alu[28]~221_combout = ( \rt_alu[28]~220_combout & ( \rt_alu[28]~216_combout & ( ((\REGS|regs[8][28]~q & (\ROM|mem~0_combout & \rt_alu[31]~39_combout ))) # (\rt_alu[31]~40_combout ) ) ) ) # ( !\rt_alu[28]~220_combout & ( \rt_alu[28]~216_combout +// & ( (!\rt_alu[31]~39_combout & (((\rt_alu[31]~40_combout )))) # (\rt_alu[31]~39_combout & (\REGS|regs[8][28]~q & (\ROM|mem~0_combout & !\rt_alu[31]~40_combout ))) ) ) ) # ( \rt_alu[28]~220_combout & ( !\rt_alu[28]~216_combout & ( +// (\rt_alu[31]~39_combout & (((\REGS|regs[8][28]~q & \ROM|mem~0_combout )) # (\rt_alu[31]~40_combout ))) ) ) ) # ( !\rt_alu[28]~220_combout & ( !\rt_alu[28]~216_combout & ( (\REGS|regs[8][28]~q & (\ROM|mem~0_combout & (\rt_alu[31]~39_combout & +// !\rt_alu[31]~40_combout ))) ) ) ) + + .dataa(!\REGS|regs[8][28]~q ), + .datab(!\ROM|mem~0_combout ), + .datac(!\rt_alu[31]~39_combout ), + .datad(!\rt_alu[31]~40_combout ), + .datae(!\rt_alu[28]~220_combout ), + .dataf(!\rt_alu[28]~216_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rt_alu[28]~221_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rt_alu[28]~221 .extended_lut = "off"; +defparam \rt_alu[28]~221 .lut_mask = 64'h0100010F01F001FF; +defparam \rt_alu[28]~221 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X28_Y7_N51 +cyclonev_lcell_comb \rd[29]~451 ( +// Equation(s): +// \rd[29]~451_combout = ( \ALU|Mux2~0_combout & ( \ALU|adder_unit|OUT_1 [29] & ( !\CONTROL_UNIT|M2R[0]~0_combout ) ) ) # ( !\ALU|Mux2~0_combout & ( \ALU|adder_unit|OUT_1 [29] & ( (!\ALU|Mux29~0_combout & !\CONTROL_UNIT|M2R[0]~0_combout ) ) ) ) # ( +// \ALU|Mux2~0_combout & ( !\ALU|adder_unit|OUT_1 [29] & ( !\CONTROL_UNIT|M2R[0]~0_combout ) ) ) + + .dataa(!\ALU|Mux29~0_combout ), + .datab(gnd), + .datac(gnd), + .datad(!\CONTROL_UNIT|M2R[0]~0_combout ), + .datae(!\ALU|Mux2~0_combout ), + .dataf(!\ALU|adder_unit|OUT_1 [29]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[29]~451_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[29]~451 .extended_lut = "off"; +defparam \rd[29]~451 .lut_mask = 64'h0000FF00AA00FF00; +defparam \rd[29]~451 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X30_Y7_N20 +dffeas \REGS|regs[9][29] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[29]~451_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~29_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[9][29]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[9][29] .is_wysiwyg = "true"; +defparam \REGS|regs[9][29] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X32_Y7_N19 +dffeas \REGS|regs[8][29] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[29]~451_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~24_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[8][29]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[8][29] .is_wysiwyg = "true"; +defparam \REGS|regs[8][29] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X31_Y7_N0 +cyclonev_lcell_comb \REGS|Mux2~1 ( +// Equation(s): +// \REGS|Mux2~1_combout = ( \ROM|mem~15_combout & ( (\ROM|mem~0_combout & \REGS|regs[9][29]~q ) ) ) # ( !\ROM|mem~15_combout & ( (\ROM|mem~0_combout & \REGS|regs[8][29]~q ) ) ) + + .dataa(!\ROM|mem~0_combout ), + .datab(gnd), + .datac(!\REGS|regs[9][29]~q ), + .datad(!\REGS|regs[8][29]~q ), + .datae(gnd), + .dataf(!\ROM|mem~15_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux2~1_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux2~1 .extended_lut = "off"; +defparam \REGS|Mux2~1 .lut_mask = 64'h0055005505050505; +defparam \REGS|Mux2~1 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X31_Y7_N30 +cyclonev_lcell_comb \REGS|Mux2~0 ( +// Equation(s): +// \REGS|Mux2~0_combout = ( \ROM|mem~16_combout & ( \REGS|Mux34~2_combout & ( (!\ROM|mem~9_combout & (\REGS|Mux34~1_combout )) # (\ROM|mem~9_combout & ((\REGS|Mux34~3_combout ))) ) ) ) # ( !\ROM|mem~16_combout & ( \REGS|Mux34~2_combout & ( +// (\ROM|mem~9_combout ) # (\REGS|Mux34~0_combout ) ) ) ) # ( \ROM|mem~16_combout & ( !\REGS|Mux34~2_combout & ( (!\ROM|mem~9_combout & (\REGS|Mux34~1_combout )) # (\ROM|mem~9_combout & ((\REGS|Mux34~3_combout ))) ) ) ) # ( !\ROM|mem~16_combout & ( +// !\REGS|Mux34~2_combout & ( (\REGS|Mux34~0_combout & !\ROM|mem~9_combout ) ) ) ) + + .dataa(!\REGS|Mux34~1_combout ), + .datab(!\REGS|Mux34~0_combout ), + .datac(!\REGS|Mux34~3_combout ), + .datad(!\ROM|mem~9_combout ), + .datae(!\ROM|mem~16_combout ), + .dataf(!\REGS|Mux34~2_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux2~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux2~0 .extended_lut = "off"; +defparam \REGS|Mux2~0 .lut_mask = 64'h3300550F33FF550F; +defparam \REGS|Mux2~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X31_Y7_N6 +cyclonev_lcell_comb \REGS|Mux2~2 ( +// Equation(s): +// \REGS|Mux2~2_combout = ( \ROM|mem~17_combout & ( \REGS|Mux34~4_combout & ( \REGS|Mux2~0_combout ) ) ) # ( !\ROM|mem~17_combout & ( \REGS|Mux34~4_combout & ( (\REGS|Mux2~1_combout ) # (\ROM|mem~9_combout ) ) ) ) # ( \ROM|mem~17_combout & ( +// !\REGS|Mux34~4_combout & ( \REGS|Mux2~0_combout ) ) ) # ( !\ROM|mem~17_combout & ( !\REGS|Mux34~4_combout & ( \REGS|Mux2~1_combout ) ) ) + + .dataa(gnd), + .datab(!\ROM|mem~9_combout ), + .datac(!\REGS|Mux2~1_combout ), + .datad(!\REGS|Mux2~0_combout ), + .datae(!\ROM|mem~17_combout ), + .dataf(!\REGS|Mux34~4_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux2~2_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux2~2 .extended_lut = "off"; +defparam \REGS|Mux2~2 .lut_mask = 64'h0F0F00FF3F3F00FF; +defparam \REGS|Mux2~2 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X27_Y9_N21 +cyclonev_lcell_comb \rd[30]~453 ( +// Equation(s): +// \rd[30]~453_combout = ( \ALU|Mux1~0_combout & ( \ALU|adder_unit|OUT_1 [30] & ( !\CONTROL_UNIT|M2R[0]~0_combout ) ) ) # ( !\ALU|Mux1~0_combout & ( \ALU|adder_unit|OUT_1 [30] & ( (!\CONTROL_UNIT|M2R[0]~0_combout & !\ALU|Mux29~0_combout ) ) ) ) # ( +// \ALU|Mux1~0_combout & ( !\ALU|adder_unit|OUT_1 [30] & ( !\CONTROL_UNIT|M2R[0]~0_combout ) ) ) + + .dataa(gnd), + .datab(!\CONTROL_UNIT|M2R[0]~0_combout ), + .datac(!\ALU|Mux29~0_combout ), + .datad(gnd), + .datae(!\ALU|Mux1~0_combout ), + .dataf(!\ALU|adder_unit|OUT_1 [30]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[30]~453_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[30]~453 .extended_lut = "off"; +defparam \rd[30]~453 .lut_mask = 64'h0000CCCCC0C0CCCC; +defparam \rd[30]~453 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X28_Y9_N8 +dffeas \REGS|regs[18][30] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[30]~453_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~5_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[18][30]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[18][30] .is_wysiwyg = "true"; +defparam \REGS|regs[18][30] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X28_Y9_N29 +dffeas \REGS|regs[26][30] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[30]~453_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~6_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[26][30]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[26][30] .is_wysiwyg = "true"; +defparam \REGS|regs[26][30] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X28_Y9_N12 +cyclonev_lcell_comb \REGS|Mux33~2 ( +// Equation(s): +// \REGS|Mux33~2_combout = ( \ROM|mem~0_combout & ( \REGS|regs[26][30]~q ) ) # ( !\ROM|mem~0_combout & ( \REGS|regs[18][30]~q ) ) + + .dataa(gnd), + .datab(!\REGS|regs[18][30]~q ), + .datac(!\REGS|regs[26][30]~q ), + .datad(gnd), + .datae(gnd), + .dataf(!\ROM|mem~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux33~2_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux33~2 .extended_lut = "off"; +defparam \REGS|Mux33~2 .lut_mask = 64'h333333330F0F0F0F; +defparam \REGS|Mux33~2 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X31_Y9_N22 +dffeas \REGS|regs[9][30] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[30]~453_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~29_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[9][30]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[9][30] .is_wysiwyg = "true"; +defparam \REGS|regs[9][30] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X31_Y9_N54 +cyclonev_lcell_comb \REGS|Mux1~1 ( +// Equation(s): +// \REGS|Mux1~1_combout = ( \REGS|regs[9][30]~q & ( (\ROM|mem~0_combout & ((\ROM|mem~15_combout ) # (\REGS|regs[8][30]~DUPLICATE_q ))) ) ) # ( !\REGS|regs[9][30]~q & ( (\ROM|mem~0_combout & (\REGS|regs[8][30]~DUPLICATE_q & !\ROM|mem~15_combout )) ) ) + + .dataa(gnd), + .datab(!\ROM|mem~0_combout ), + .datac(!\REGS|regs[8][30]~DUPLICATE_q ), + .datad(!\ROM|mem~15_combout ), + .datae(gnd), + .dataf(!\REGS|regs[9][30]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux1~1_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux1~1 .extended_lut = "off"; +defparam \REGS|Mux1~1 .lut_mask = 64'h0300030003330333; +defparam \REGS|Mux1~1 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X31_Y9_N24 +cyclonev_lcell_comb \REGS|Mux1~0 ( +// Equation(s): +// \REGS|Mux1~0_combout = ( \ROM|mem~16_combout & ( \REGS|Mux33~4_combout & ( (\ROM|mem~9_combout ) # (\REGS|Mux33~0_combout ) ) ) ) # ( !\ROM|mem~16_combout & ( \REGS|Mux33~4_combout & ( (!\ROM|mem~9_combout & ((\REGS|Mux33~1_combout ))) # +// (\ROM|mem~9_combout & (\REGS|Mux33~5_combout )) ) ) ) # ( \ROM|mem~16_combout & ( !\REGS|Mux33~4_combout & ( (\REGS|Mux33~0_combout & !\ROM|mem~9_combout ) ) ) ) # ( !\ROM|mem~16_combout & ( !\REGS|Mux33~4_combout & ( (!\ROM|mem~9_combout & +// ((\REGS|Mux33~1_combout ))) # (\ROM|mem~9_combout & (\REGS|Mux33~5_combout )) ) ) ) + + .dataa(!\REGS|Mux33~5_combout ), + .datab(!\REGS|Mux33~0_combout ), + .datac(!\ROM|mem~9_combout ), + .datad(!\REGS|Mux33~1_combout ), + .datae(!\ROM|mem~16_combout ), + .dataf(!\REGS|Mux33~4_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux1~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux1~0 .extended_lut = "off"; +defparam \REGS|Mux1~0 .lut_mask = 64'h05F5303005F53F3F; +defparam \REGS|Mux1~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X31_Y9_N42 +cyclonev_lcell_comb \REGS|Mux1~2 ( +// Equation(s): +// \REGS|Mux1~2_combout = ( \REGS|Mux1~1_combout & ( \REGS|Mux1~0_combout ) ) # ( !\REGS|Mux1~1_combout & ( \REGS|Mux1~0_combout & ( ((\ROM|mem~9_combout & \REGS|Mux33~2_combout )) # (\ROM|mem~17_combout ) ) ) ) # ( \REGS|Mux1~1_combout & ( +// !\REGS|Mux1~0_combout & ( !\ROM|mem~17_combout ) ) ) # ( !\REGS|Mux1~1_combout & ( !\REGS|Mux1~0_combout & ( (!\ROM|mem~17_combout & (\ROM|mem~9_combout & \REGS|Mux33~2_combout )) ) ) ) + + .dataa(!\ROM|mem~17_combout ), + .datab(gnd), + .datac(!\ROM|mem~9_combout ), + .datad(!\REGS|Mux33~2_combout ), + .datae(!\REGS|Mux1~1_combout ), + .dataf(!\REGS|Mux1~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Mux1~2_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Mux1~2 .extended_lut = "off"; +defparam \REGS|Mux1~2 .lut_mask = 64'h000AAAAA555FFFFF; +defparam \REGS|Mux1~2 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y8_N51 +cyclonev_lcell_comb \ALU|Mux1~0 ( +// Equation(s): +// \ALU|Mux1~0_combout = ( \CONTROL_UNIT|ALU_FN [1] & ( \rt_alu[30]~261_combout & ( (!\REGS|Mux1~2_combout & (((\ALU|Mux15~0_combout & !\CONTROL_UNIT|ALU_FN [0])) # (\ALU|Mux29~1_combout ))) # (\REGS|Mux1~2_combout & (((\ALU|Mux15~0_combout )))) ) ) ) # +// ( !\CONTROL_UNIT|ALU_FN [1] & ( \rt_alu[30]~261_combout & ( (!\REGS|Mux1~2_combout & \ALU|Mux29~1_combout ) ) ) ) # ( \CONTROL_UNIT|ALU_FN [1] & ( !\rt_alu[30]~261_combout & ( (\REGS|Mux1~2_combout & (((\ALU|Mux15~0_combout & !\CONTROL_UNIT|ALU_FN +// [0])) # (\ALU|Mux29~1_combout ))) ) ) ) # ( !\CONTROL_UNIT|ALU_FN [1] & ( !\rt_alu[30]~261_combout & ( (!\REGS|Mux1~2_combout & ((\ALU|Mux15~0_combout ))) # (\REGS|Mux1~2_combout & (\ALU|Mux29~1_combout )) ) ) ) + + .dataa(!\REGS|Mux1~2_combout ), + .datab(!\ALU|Mux29~1_combout ), + .datac(!\ALU|Mux15~0_combout ), + .datad(!\CONTROL_UNIT|ALU_FN [0]), + .datae(!\CONTROL_UNIT|ALU_FN [1]), + .dataf(!\rt_alu[30]~261_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\ALU|Mux1~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \ALU|Mux1~0 .extended_lut = "off"; +defparam \ALU|Mux1~0 .lut_mask = 64'h1B1B151122222F27; +defparam \ALU|Mux1~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y10_N33 +cyclonev_lcell_comb \ALU|Mux15~1 ( +// Equation(s): +// \ALU|Mux15~1_combout = ( \REGS|Mux15~2_combout & ( \rt_alu[16]~13_combout & ( (\ALU|Mux15~0_combout & \CONTROL_UNIT|ALU_FN [1]) ) ) ) # ( !\REGS|Mux15~2_combout & ( \rt_alu[16]~13_combout & ( ((\ALU|Mux15~0_combout & (\CONTROL_UNIT|ALU_FN [1] & +// !\CONTROL_UNIT|ALU_FN [0]))) # (\ALU|Mux29~1_combout ) ) ) ) # ( \REGS|Mux15~2_combout & ( !\rt_alu[16]~13_combout & ( ((\ALU|Mux15~0_combout & (\CONTROL_UNIT|ALU_FN [1] & !\CONTROL_UNIT|ALU_FN [0]))) # (\ALU|Mux29~1_combout ) ) ) ) # ( +// !\REGS|Mux15~2_combout & ( !\rt_alu[16]~13_combout & ( (\ALU|Mux15~0_combout & !\CONTROL_UNIT|ALU_FN [1]) ) ) ) + + .dataa(!\ALU|Mux15~0_combout ), + .datab(!\CONTROL_UNIT|ALU_FN [1]), + .datac(!\ALU|Mux29~1_combout ), + .datad(!\CONTROL_UNIT|ALU_FN [0]), + .datae(!\REGS|Mux15~2_combout ), + .dataf(!\rt_alu[16]~13_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\ALU|Mux15~1_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \ALU|Mux15~1 .extended_lut = "off"; +defparam \ALU|Mux15~1 .lut_mask = 64'h44441F0F1F0F1111; +defparam \ALU|Mux15~1 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y10_N42 +cyclonev_lcell_comb \pc_we[0]~12 ( +// Equation(s): +// \pc_we[0]~12_combout = ( !\ALU|Mux16~0_combout & ( \ALU|adder_unit|OUT_1 [16] & ( (\ALU|Mux29~0_combout & !\ALU|Mux15~1_combout ) ) ) ) # ( !\ALU|Mux16~0_combout & ( !\ALU|adder_unit|OUT_1 [16] & ( (!\ALU|Mux15~1_combout & ((!\ALU|adder_unit|OUT_1 +// [15]) # (\ALU|Mux29~0_combout ))) ) ) ) + + .dataa(!\ALU|Mux29~0_combout ), + .datab(gnd), + .datac(!\ALU|Mux15~1_combout ), + .datad(!\ALU|adder_unit|OUT_1 [15]), + .datae(!\ALU|Mux16~0_combout ), + .dataf(!\ALU|adder_unit|OUT_1 [16]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\pc_we[0]~12_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \pc_we[0]~12 .extended_lut = "off"; +defparam \pc_we[0]~12 .lut_mask = 64'hF050000050500000; +defparam \pc_we[0]~12 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y8_N18 +cyclonev_lcell_comb \pc_we[0]~13 ( +// Equation(s): +// \pc_we[0]~13_combout = ( \ALU|adder_unit|OUT_1 [30] & ( \ALU|adder_unit|OUT_1 [25] & ( (!\ALU|Mux1~0_combout & (!\ALU|Mux6~0_combout & (\ALU|Mux29~0_combout & \pc_we[0]~12_combout ))) ) ) ) # ( !\ALU|adder_unit|OUT_1 [30] & ( \ALU|adder_unit|OUT_1 +// [25] & ( (!\ALU|Mux1~0_combout & (!\ALU|Mux6~0_combout & (\ALU|Mux29~0_combout & \pc_we[0]~12_combout ))) ) ) ) # ( \ALU|adder_unit|OUT_1 [30] & ( !\ALU|adder_unit|OUT_1 [25] & ( (!\ALU|Mux1~0_combout & (!\ALU|Mux6~0_combout & (\ALU|Mux29~0_combout +// & \pc_we[0]~12_combout ))) ) ) ) # ( !\ALU|adder_unit|OUT_1 [30] & ( !\ALU|adder_unit|OUT_1 [25] & ( (!\ALU|Mux1~0_combout & (!\ALU|Mux6~0_combout & \pc_we[0]~12_combout )) ) ) ) + + .dataa(!\ALU|Mux1~0_combout ), + .datab(!\ALU|Mux6~0_combout ), + .datac(!\ALU|Mux29~0_combout ), + .datad(!\pc_we[0]~12_combout ), + .datae(!\ALU|adder_unit|OUT_1 [30]), + .dataf(!\ALU|adder_unit|OUT_1 [25]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\pc_we[0]~13_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \pc_we[0]~13 .extended_lut = "off"; +defparam \pc_we[0]~13 .lut_mask = 64'h0088000800080008; +defparam \pc_we[0]~13 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y8_N6 +cyclonev_lcell_comb \pc_we[0]~8 ( +// Equation(s): +// \pc_we[0]~8_combout = ( \ALU|adder_unit|OUT_1 [12] & ( \ALU|adder_unit|OUT_1 [11] & ( (!\ALU|Mux20~0_combout & (\ALU|Mux29~0_combout & !\ALU|Mux19~0_combout )) ) ) ) # ( !\ALU|adder_unit|OUT_1 [12] & ( \ALU|adder_unit|OUT_1 [11] & ( +// (!\ALU|Mux20~0_combout & (\ALU|Mux29~0_combout & !\ALU|Mux19~0_combout )) ) ) ) # ( \ALU|adder_unit|OUT_1 [12] & ( !\ALU|adder_unit|OUT_1 [11] & ( (!\ALU|Mux20~0_combout & (\ALU|Mux29~0_combout & !\ALU|Mux19~0_combout )) ) ) ) # ( +// !\ALU|adder_unit|OUT_1 [12] & ( !\ALU|adder_unit|OUT_1 [11] & ( (!\ALU|Mux20~0_combout & !\ALU|Mux19~0_combout ) ) ) ) + + .dataa(!\ALU|Mux20~0_combout ), + .datab(gnd), + .datac(!\ALU|Mux29~0_combout ), + .datad(!\ALU|Mux19~0_combout ), + .datae(!\ALU|adder_unit|OUT_1 [12]), + .dataf(!\ALU|adder_unit|OUT_1 [11]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\pc_we[0]~8_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \pc_we[0]~8 .extended_lut = "off"; +defparam \pc_we[0]~8 .lut_mask = 64'hAA000A000A000A00; +defparam \pc_we[0]~8 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y8_N42 +cyclonev_lcell_comb \pc_we[0]~9 ( +// Equation(s): +// \pc_we[0]~9_combout = ( \ALU|adder_unit|OUT_1 [27] & ( \pc_we[0]~1_combout & ( (\ALU|Mux29~0_combout & (\pc_we[0]~8_combout & (!\ALU|Mux4~0_combout & \ALU|Mux14~1_combout ))) ) ) ) # ( !\ALU|adder_unit|OUT_1 [27] & ( \pc_we[0]~1_combout & ( +// (\pc_we[0]~8_combout & (!\ALU|Mux4~0_combout & \ALU|Mux14~1_combout )) ) ) ) + + .dataa(!\ALU|Mux29~0_combout ), + .datab(!\pc_we[0]~8_combout ), + .datac(!\ALU|Mux4~0_combout ), + .datad(!\ALU|Mux14~1_combout ), + .datae(!\ALU|adder_unit|OUT_1 [27]), + .dataf(!\pc_we[0]~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\pc_we[0]~9_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \pc_we[0]~9 .extended_lut = "off"; +defparam \pc_we[0]~9 .lut_mask = 64'h0000000000300010; +defparam \pc_we[0]~9 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y6_N36 +cyclonev_lcell_comb \pc_we[0]~10 ( +// Equation(s): +// \pc_we[0]~10_combout = ( !\ALU|Mux21~0_combout & ( \ALU|Mux22~1_combout & ( (!\ALU|Mux12~0_combout & (((!\ALU|adder_unit|OUT_1 [19] & !\ALU|adder_unit|OUT_1 [10])) # (\ALU|Mux29~0_combout ))) ) ) ) + + .dataa(!\ALU|Mux12~0_combout ), + .datab(!\ALU|Mux29~0_combout ), + .datac(!\ALU|adder_unit|OUT_1 [19]), + .datad(!\ALU|adder_unit|OUT_1 [10]), + .datae(!\ALU|Mux21~0_combout ), + .dataf(!\ALU|Mux22~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\pc_we[0]~10_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \pc_we[0]~10 .extended_lut = "off"; +defparam \pc_we[0]~10 .lut_mask = 64'h00000000A2220000; +defparam \pc_we[0]~10 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y6_N54 +cyclonev_lcell_comb \pc_we[0]~11 ( +// Equation(s): +// \pc_we[0]~11_combout = ( \pc_we[0]~10_combout & ( \ALU|adder_unit|OUT_1 [29] & ( (!\ALU|Mux11~0_combout & (\ALU|Mux29~0_combout & !\ALU|Mux2~0_combout )) ) ) ) # ( \pc_we[0]~10_combout & ( !\ALU|adder_unit|OUT_1 [29] & ( (!\ALU|Mux11~0_combout & +// (!\ALU|Mux2~0_combout & ((!\ALU|adder_unit|OUT_1 [20]) # (\ALU|Mux29~0_combout )))) ) ) ) + + .dataa(!\ALU|Mux11~0_combout ), + .datab(!\ALU|Mux29~0_combout ), + .datac(!\ALU|Mux2~0_combout ), + .datad(!\ALU|adder_unit|OUT_1 [20]), + .datae(!\pc_we[0]~10_combout ), + .dataf(!\ALU|adder_unit|OUT_1 [29]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\pc_we[0]~11_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \pc_we[0]~11 .extended_lut = "off"; +defparam \pc_we[0]~11 .lut_mask = 64'h0000A02000002020; +defparam \pc_we[0]~11 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X38_Y8_N42 +cyclonev_lcell_comb \pc_we[0]~4 ( +// Equation(s): +// \pc_we[0]~4_combout = ( !\ALU|Mux29~2_combout & ( \ALU|adder_unit|OUT_1 [2] & ( (\CONTROL_UNIT|B~0_combout & \ALU|Mux29~0_combout ) ) ) ) # ( !\ALU|Mux29~2_combout & ( !\ALU|adder_unit|OUT_1 [2] & ( \CONTROL_UNIT|B~0_combout ) ) ) + + .dataa(gnd), + .datab(gnd), + .datac(!\CONTROL_UNIT|B~0_combout ), + .datad(!\ALU|Mux29~0_combout ), + .datae(!\ALU|Mux29~2_combout ), + .dataf(!\ALU|adder_unit|OUT_1 [2]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\pc_we[0]~4_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \pc_we[0]~4 .extended_lut = "off"; +defparam \pc_we[0]~4 .lut_mask = 64'h0F0F0000000F0000; +defparam \pc_we[0]~4 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X38_Y8_N0 +cyclonev_lcell_comb \pc_we[0]~5 ( +// Equation(s): +// \pc_we[0]~5_combout = ( \ALU|adder_unit|OUT_1 [8] & ( \ALU|adder_unit|OUT_1 [13] & ( (!\ALU|Mux18~0_combout & (\ALU|Mux29~0_combout & (!\ALU|Mux23~0_combout & \pc_we[0]~4_combout ))) ) ) ) # ( !\ALU|adder_unit|OUT_1 [8] & ( \ALU|adder_unit|OUT_1 [13] +// & ( (!\ALU|Mux18~0_combout & (\ALU|Mux29~0_combout & (!\ALU|Mux23~0_combout & \pc_we[0]~4_combout ))) ) ) ) # ( \ALU|adder_unit|OUT_1 [8] & ( !\ALU|adder_unit|OUT_1 [13] & ( (!\ALU|Mux18~0_combout & (\ALU|Mux29~0_combout & (!\ALU|Mux23~0_combout & +// \pc_we[0]~4_combout ))) ) ) ) # ( !\ALU|adder_unit|OUT_1 [8] & ( !\ALU|adder_unit|OUT_1 [13] & ( (!\ALU|Mux18~0_combout & (!\ALU|Mux23~0_combout & \pc_we[0]~4_combout )) ) ) ) + + .dataa(!\ALU|Mux18~0_combout ), + .datab(!\ALU|Mux29~0_combout ), + .datac(!\ALU|Mux23~0_combout ), + .datad(!\pc_we[0]~4_combout ), + .datae(!\ALU|adder_unit|OUT_1 [8]), + .dataf(!\ALU|adder_unit|OUT_1 [13]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\pc_we[0]~5_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \pc_we[0]~5 .extended_lut = "off"; +defparam \pc_we[0]~5 .lut_mask = 64'h00A0002000200020; +defparam \pc_we[0]~5 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X38_Y8_N54 +cyclonev_lcell_comb \pc_we[0]~6 ( +// Equation(s): +// \pc_we[0]~6_combout = ( \pc_we[0]~5_combout & ( \ALU|adder_unit|OUT_1 [22] & ( (!\ALU|Mux13~0_combout & (\ALU|Mux29~0_combout & !\ALU|Mux9~0_combout )) ) ) ) # ( \pc_we[0]~5_combout & ( !\ALU|adder_unit|OUT_1 [22] & ( (!\ALU|Mux13~0_combout & +// (!\ALU|Mux9~0_combout & ((!\ALU|adder_unit|OUT_1 [18]) # (\ALU|Mux29~0_combout )))) ) ) ) + + .dataa(!\ALU|Mux13~0_combout ), + .datab(!\ALU|Mux29~0_combout ), + .datac(!\ALU|adder_unit|OUT_1 [18]), + .datad(!\ALU|Mux9~0_combout ), + .datae(!\pc_we[0]~5_combout ), + .dataf(!\ALU|adder_unit|OUT_1 [22]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\pc_we[0]~6_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \pc_we[0]~6 .extended_lut = "off"; +defparam \pc_we[0]~6 .lut_mask = 64'h0000A20000002200; +defparam \pc_we[0]~6 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X38_Y8_N48 +cyclonev_lcell_comb \pc_we[0]~7 ( +// Equation(s): +// \pc_we[0]~7_combout = ( \ALU|Mux8~1_combout & ( \ALU|Mux7~1_combout & ( (!\ALU|Mux3~0_combout & (\pc_we[0]~6_combout & ((!\ALU|adder_unit|OUT_1 [28]) # (\ALU|Mux29~0_combout )))) ) ) ) + + .dataa(!\ALU|Mux3~0_combout ), + .datab(!\ALU|adder_unit|OUT_1 [28]), + .datac(!\pc_we[0]~6_combout ), + .datad(!\ALU|Mux29~0_combout ), + .datae(!\ALU|Mux8~1_combout ), + .dataf(!\ALU|Mux7~1_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\pc_we[0]~7_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \pc_we[0]~7 .extended_lut = "off"; +defparam \pc_we[0]~7 .lut_mask = 64'h000000000000080A; +defparam \pc_we[0]~7 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y8_N36 +cyclonev_lcell_comb \pc_we[0]~2 ( +// Equation(s): +// \pc_we[0]~2_combout = ( !\ALU|Mux17~0_combout & ( \pc_we[0]~0_combout & ( (!\ALU|Mux10~0_combout & (((!\ALU|adder_unit|OUT_1 [14] & !\ALU|adder_unit|OUT_1 [21])) # (\ALU|Mux29~0_combout ))) ) ) ) + + .dataa(!\ALU|adder_unit|OUT_1 [14]), + .datab(!\ALU|Mux10~0_combout ), + .datac(!\ALU|Mux29~0_combout ), + .datad(!\ALU|adder_unit|OUT_1 [21]), + .datae(!\ALU|Mux17~0_combout ), + .dataf(!\pc_we[0]~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\pc_we[0]~2_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \pc_we[0]~2 .extended_lut = "off"; +defparam \pc_we[0]~2 .lut_mask = 64'h000000008C0C0000; +defparam \pc_we[0]~2 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y8_N0 +cyclonev_lcell_comb \pc_we[0]~3 ( +// Equation(s): +// \pc_we[0]~3_combout = ( \pc_we[0]~2_combout & ( \ALU|adder_unit|OUT_1 [31] & ( (\ALU|Mux29~0_combout & (!\ALU|Mux0~0_combout & !\ALU|Mux5~0_combout )) ) ) ) # ( \pc_we[0]~2_combout & ( !\ALU|adder_unit|OUT_1 [31] & ( (!\ALU|Mux0~0_combout & +// (!\ALU|Mux5~0_combout & ((!\ALU|adder_unit|OUT_1 [26]) # (\ALU|Mux29~0_combout )))) ) ) ) + + .dataa(!\ALU|Mux29~0_combout ), + .datab(!\ALU|Mux0~0_combout ), + .datac(!\ALU|Mux5~0_combout ), + .datad(!\ALU|adder_unit|OUT_1 [26]), + .datae(!\pc_we[0]~2_combout ), + .dataf(!\ALU|adder_unit|OUT_1 [31]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\pc_we[0]~3_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \pc_we[0]~3 .extended_lut = "off"; +defparam \pc_we[0]~3 .lut_mask = 64'h0000C04000004040; +defparam \pc_we[0]~3 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y8_N54 +cyclonev_lcell_comb \pc_we[0] ( +// Equation(s): +// pc_we[0] = ( \pc_we[0]~3_combout & ( \ALU|Mux31~3_combout & ( (\pc_we[0]~13_combout & (\pc_we[0]~9_combout & (\pc_we[0]~11_combout & \pc_we[0]~7_combout ))) ) ) ) + + .dataa(!\pc_we[0]~13_combout ), + .datab(!\pc_we[0]~9_combout ), + .datac(!\pc_we[0]~11_combout ), + .datad(!\pc_we[0]~7_combout ), + .datae(!\pc_we[0]~3_combout ), + .dataf(!\ALU|Mux31~3_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(pc_we[0]), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \pc_we[0] .extended_lut = "off"; +defparam \pc_we[0] .lut_mask = 64'h0000000000000001; +defparam \pc_we[0] .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X36_Y8_N16 +dffeas \PC|pc[7] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\Add0~53_sumout ), + .asdata(vcc), + .clrn(!\rst[0]~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\PC|pc [7]), + .prn(vcc)); +// synopsys translate_off +defparam \PC|pc[7] .is_wysiwyg = "true"; +defparam \PC|pc[7] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X35_Y8_N15 +cyclonev_lcell_comb \ROM|mem~3 ( +// Equation(s): +// \ROM|mem~3_combout = ( !\PC|pc [8] & ( (!\PC|pc [7] & !\PC|pc[9]~DUPLICATE_q ) ) ) + + .dataa(gnd), + .datab(gnd), + .datac(!\PC|pc [7]), + .datad(!\PC|pc[9]~DUPLICATE_q ), + .datae(gnd), + .dataf(!\PC|pc [8]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\ROM|mem~3_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \ROM|mem~3 .extended_lut = "off"; +defparam \ROM|mem~3 .lut_mask = 64'hF000F00000000000; +defparam \ROM|mem~3 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X35_Y8_N33 +cyclonev_lcell_comb \ROM|mem~9 ( +// Equation(s): +// \ROM|mem~9_combout = ( !\PC|pc [3] & ( (\ROM|mem~3_combout & (\PC|pc[6]~DUPLICATE_q & \ROM|mem~4_combout )) ) ) + + .dataa(gnd), + .datab(!\ROM|mem~3_combout ), + .datac(!\PC|pc[6]~DUPLICATE_q ), + .datad(!\ROM|mem~4_combout ), + .datae(gnd), + .dataf(!\PC|pc [3]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\ROM|mem~9_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \ROM|mem~9 .extended_lut = "off"; +defparam \ROM|mem~9 .lut_mask = 64'h0003000300000000; +defparam \ROM|mem~9 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X36_Y8_N20 +dffeas \PC|pc[8] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\Add0~61_sumout ), + .asdata(vcc), + .clrn(!\rst[0]~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\PC|pc [8]), + .prn(vcc)); +// synopsys translate_off +defparam \PC|pc[8] .is_wysiwyg = "true"; +defparam \PC|pc[8] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X36_Y8_N8 +dffeas \PC|pc[4]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\Add0~29_sumout ), + .asdata(vcc), + .clrn(!\rst[0]~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\PC|pc[4]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \PC|pc[4]~DUPLICATE .is_wysiwyg = "true"; +defparam \PC|pc[4]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X36_Y9_N12 +cyclonev_lcell_comb \ROM|mem~6 ( +// Equation(s): +// \ROM|mem~6_combout = ( \PC|pc [2] & ( \PC|pc [6] & ( (!\PC|pc[4]~DUPLICATE_q & (!\PC|pc[3]~DUPLICATE_q & (!\PC|pc [5] & !\PC|pc[7]~DUPLICATE_q ))) ) ) ) # ( !\PC|pc [2] & ( \PC|pc [6] & ( (!\PC|pc[4]~DUPLICATE_q & (!\PC|pc[3]~DUPLICATE_q & (!\PC|pc +// [5] & !\PC|pc[7]~DUPLICATE_q ))) ) ) ) # ( \PC|pc [2] & ( !\PC|pc [6] & ( (\PC|pc[4]~DUPLICATE_q & (\PC|pc [5] & !\PC|pc[7]~DUPLICATE_q )) ) ) ) # ( !\PC|pc [2] & ( !\PC|pc [6] & ( (\PC|pc[4]~DUPLICATE_q & (!\PC|pc[3]~DUPLICATE_q & (\PC|pc [5] & +// !\PC|pc[7]~DUPLICATE_q ))) ) ) ) + + .dataa(!\PC|pc[4]~DUPLICATE_q ), + .datab(!\PC|pc[3]~DUPLICATE_q ), + .datac(!\PC|pc [5]), + .datad(!\PC|pc[7]~DUPLICATE_q ), + .datae(!\PC|pc [2]), + .dataf(!\PC|pc [6]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\ROM|mem~6_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \ROM|mem~6 .extended_lut = "off"; +defparam \ROM|mem~6 .lut_mask = 64'h0400050080008000; +defparam \ROM|mem~6 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X43_Y11_N3 +cyclonev_lcell_comb \ALU|Mux29~0 ( +// Equation(s): +// \ALU|Mux29~0_combout = ( \comb~0_combout & ( (\ROM|mem~25_combout ) # (\ROM|mem~6_combout ) ) ) + + .dataa(!\ROM|mem~6_combout ), + .datab(gnd), + .datac(!\ROM|mem~25_combout ), + .datad(gnd), + .datae(gnd), + .dataf(!\comb~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\ALU|Mux29~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \ALU|Mux29~0 .extended_lut = "off"; +defparam \ALU|Mux29~0 .lut_mask = 64'h000000005F5F5F5F; +defparam \ALU|Mux29~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X38_Y14_N54 +cyclonev_lcell_comb \rd[16]~0 ( +// Equation(s): +// \rd[16]~0_combout = ( \ALU|adder_unit|OUT_1 [16] & ( (!\CONTROL_UNIT|M2R[0]~0_combout & ((!\ALU|Mux29~0_combout ) # (\ALU|Mux15~1_combout ))) ) ) # ( !\ALU|adder_unit|OUT_1 [16] & ( (!\CONTROL_UNIT|M2R[0]~0_combout & \ALU|Mux15~1_combout ) ) ) + + .dataa(gnd), + .datab(!\ALU|Mux29~0_combout ), + .datac(!\CONTROL_UNIT|M2R[0]~0_combout ), + .datad(!\ALU|Mux15~1_combout ), + .datae(!\ALU|adder_unit|OUT_1 [16]), + .dataf(gnd), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\rd[16]~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \rd[16]~0 .extended_lut = "off"; +defparam \rd[16]~0 .lut_mask = 64'h00F0C0F000F0C0F0; +defparam \rd[16]~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X37_Y4_N52 +dffeas \REGS|regs[9][16]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[16]~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~29_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[9][16]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[9][16]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[9][16]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: IOIBUF_X10_Y0_N58 +cyclonev_io_ibuf \HID_Register[3]~input ( + .i(HID_Register[3]), + .ibar(gnd), + .dynamicterminationcontrol(gnd), + .o(\HID_Register[3]~input_o )); +// synopsys translate_off +defparam \HID_Register[3]~input .bus_hold = "false"; +defparam \HID_Register[3]~input .simulate_z_as = "z"; +// synopsys translate_on + +// Location: FF_X37_Y5_N49 +dffeas \REGS|regs[11][16] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[16]~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~37_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[11][16]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[11][16] .is_wysiwyg = "true"; +defparam \REGS|regs[11][16] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X25_Y9_N9 +cyclonev_lcell_comb \REGS|Decoder0~36 ( +// Equation(s): +// \REGS|Decoder0~36_combout = ( \comb~2_combout & ( \REGS|Decoder0~27_combout ) ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(!\comb~2_combout ), + .dataf(!\REGS|Decoder0~27_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Decoder0~36_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Decoder0~36 .extended_lut = "off"; +defparam \REGS|Decoder0~36 .lut_mask = 64'h000000000000FFFF; +defparam \REGS|Decoder0~36 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X36_Y3_N2 +dffeas \REGS|regs[3][16] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[16]~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~36_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[3][16]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[3][16] .is_wysiwyg = "true"; +defparam \REGS|regs[3][16] .power_up = "low"; +// synopsys translate_on + +// Location: IOIBUF_X17_Y0_N75 +cyclonev_io_ibuf \HID_Register[1]~input ( + .i(HID_Register[1]), + .ibar(gnd), + .dynamicterminationcontrol(gnd), + .o(\HID_Register[1]~input_o )); +// synopsys translate_off +defparam \HID_Register[1]~input .bus_hold = "false"; +defparam \HID_Register[1]~input .simulate_z_as = "z"; +// synopsys translate_on + +// Location: LABCELL_X36_Y3_N0 +cyclonev_lcell_comb \PC_Reg_Display[0]~18 ( +// Equation(s): +// \PC_Reg_Display[0]~18_combout = ( \REGS|regs[3][16]~q & ( \HID_Register[1]~input_o & ( (!\HID_Register[3]~input_o ) # (\REGS|regs[11][16]~q ) ) ) ) # ( !\REGS|regs[3][16]~q & ( \HID_Register[1]~input_o & ( (\HID_Register[3]~input_o & +// \REGS|regs[11][16]~q ) ) ) ) # ( \REGS|regs[3][16]~q & ( !\HID_Register[1]~input_o & ( (!\HID_Register[3]~input_o & ((\REGS|regs[1][16]~q ))) # (\HID_Register[3]~input_o & (\REGS|regs[9][16]~DUPLICATE_q )) ) ) ) # ( !\REGS|regs[3][16]~q & ( +// !\HID_Register[1]~input_o & ( (!\HID_Register[3]~input_o & ((\REGS|regs[1][16]~q ))) # (\HID_Register[3]~input_o & (\REGS|regs[9][16]~DUPLICATE_q )) ) ) ) + + .dataa(!\REGS|regs[9][16]~DUPLICATE_q ), + .datab(!\HID_Register[3]~input_o ), + .datac(!\REGS|regs[1][16]~q ), + .datad(!\REGS|regs[11][16]~q ), + .datae(!\REGS|regs[3][16]~q ), + .dataf(!\HID_Register[1]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[0]~18_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[0]~18 .extended_lut = "off"; +defparam \PC_Reg_Display[0]~18 .lut_mask = 64'h1D1D1D1D0033CCFF; +defparam \PC_Reg_Display[0]~18 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X35_Y6_N37 +dffeas \REGS|regs[4][16]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[4][16]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~22_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[4][16]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[4][16]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[4][16]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X38_Y13_N54 +cyclonev_lcell_comb \PC_Reg_Display[0]~17 ( +// Equation(s): +// \PC_Reg_Display[0]~17_combout = ( \REGS|regs[6][16]~q & ( \HID_Register[3]~input_o & ( (!\HID_Register[1]~input_o & (\REGS|regs[12][16]~q )) # (\HID_Register[1]~input_o & ((\REGS|regs[14][16]~q ))) ) ) ) # ( !\REGS|regs[6][16]~q & ( +// \HID_Register[3]~input_o & ( (!\HID_Register[1]~input_o & (\REGS|regs[12][16]~q )) # (\HID_Register[1]~input_o & ((\REGS|regs[14][16]~q ))) ) ) ) # ( \REGS|regs[6][16]~q & ( !\HID_Register[3]~input_o & ( (\HID_Register[1]~input_o ) # +// (\REGS|regs[4][16]~DUPLICATE_q ) ) ) ) # ( !\REGS|regs[6][16]~q & ( !\HID_Register[3]~input_o & ( (\REGS|regs[4][16]~DUPLICATE_q & !\HID_Register[1]~input_o ) ) ) ) + + .dataa(!\REGS|regs[4][16]~DUPLICATE_q ), + .datab(!\HID_Register[1]~input_o ), + .datac(!\REGS|regs[12][16]~q ), + .datad(!\REGS|regs[14][16]~q ), + .datae(!\REGS|regs[6][16]~q ), + .dataf(!\HID_Register[3]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[0]~17_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[0]~17 .extended_lut = "off"; +defparam \PC_Reg_Display[0]~17 .lut_mask = 64'h444477770C3F0C3F; +defparam \PC_Reg_Display[0]~17 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y5_N57 +cyclonev_lcell_comb \PC_Reg_Display[0]~16 ( +// Equation(s): +// \PC_Reg_Display[0]~16_combout = ( \REGS|regs[8][16]~DUPLICATE_q & ( (!\HID_Register[3]~input_o & (((\REGS|regs[2][16]~q & \HID_Register[1]~input_o )))) # (\HID_Register[3]~input_o & (((!\HID_Register[1]~input_o )) # (\REGS|regs[10][16]~q ))) ) ) # ( +// !\REGS|regs[8][16]~DUPLICATE_q & ( (\HID_Register[1]~input_o & ((!\HID_Register[3]~input_o & ((\REGS|regs[2][16]~q ))) # (\HID_Register[3]~input_o & (\REGS|regs[10][16]~q )))) ) ) + + .dataa(!\REGS|regs[10][16]~q ), + .datab(!\REGS|regs[2][16]~q ), + .datac(!\HID_Register[3]~input_o ), + .datad(!\HID_Register[1]~input_o ), + .datae(gnd), + .dataf(!\REGS|regs[8][16]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[0]~16_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[0]~16 .extended_lut = "off"; +defparam \PC_Reg_Display[0]~16 .lut_mask = 64'h003500350F350F35; +defparam \PC_Reg_Display[0]~16 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X36_Y3_N11 +dffeas \REGS|regs[5][16]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[16]~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~30_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[5][16]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[5][16]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[5][16]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X27_Y12_N45 +cyclonev_lcell_comb \REGS|Decoder0~38 ( +// Equation(s): +// \REGS|Decoder0~38_combout = ( \comb~2_combout & ( \REGS|Decoder0~21_combout & ( \comb~3_combout ) ) ) + + .dataa(gnd), + .datab(gnd), + .datac(!\comb~3_combout ), + .datad(gnd), + .datae(!\comb~2_combout ), + .dataf(!\REGS|Decoder0~21_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Decoder0~38_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Decoder0~38 .extended_lut = "off"; +defparam \REGS|Decoder0~38 .lut_mask = 64'h0000000000000F0F; +defparam \REGS|Decoder0~38 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X38_Y14_N50 +dffeas \REGS|regs[7][16] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[16]~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~38_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[7][16]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[7][16] .is_wysiwyg = "true"; +defparam \REGS|regs[7][16] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X36_Y3_N40 +dffeas \REGS|regs[13][16]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[16]~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~31_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[13][16]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[13][16]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[13][16]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X38_Y14_N48 +cyclonev_lcell_comb \PC_Reg_Display[0]~19 ( +// Equation(s): +// \PC_Reg_Display[0]~19_combout = ( \REGS|regs[7][16]~q & ( \REGS|regs[13][16]~DUPLICATE_q & ( (!\HID_Register[1]~input_o & (((\HID_Register[3]~input_o )) # (\REGS|regs[5][16]~DUPLICATE_q ))) # (\HID_Register[1]~input_o & (((!\HID_Register[3]~input_o ) +// # (\REGS|regs[15][16]~q )))) ) ) ) # ( !\REGS|regs[7][16]~q & ( \REGS|regs[13][16]~DUPLICATE_q & ( (!\HID_Register[1]~input_o & (((\HID_Register[3]~input_o )) # (\REGS|regs[5][16]~DUPLICATE_q ))) # (\HID_Register[1]~input_o & (((\REGS|regs[15][16]~q +// & \HID_Register[3]~input_o )))) ) ) ) # ( \REGS|regs[7][16]~q & ( !\REGS|regs[13][16]~DUPLICATE_q & ( (!\HID_Register[1]~input_o & (\REGS|regs[5][16]~DUPLICATE_q & ((!\HID_Register[3]~input_o )))) # (\HID_Register[1]~input_o & +// (((!\HID_Register[3]~input_o ) # (\REGS|regs[15][16]~q )))) ) ) ) # ( !\REGS|regs[7][16]~q & ( !\REGS|regs[13][16]~DUPLICATE_q & ( (!\HID_Register[1]~input_o & (\REGS|regs[5][16]~DUPLICATE_q & ((!\HID_Register[3]~input_o )))) # +// (\HID_Register[1]~input_o & (((\REGS|regs[15][16]~q & \HID_Register[3]~input_o )))) ) ) ) + + .dataa(!\HID_Register[1]~input_o ), + .datab(!\REGS|regs[5][16]~DUPLICATE_q ), + .datac(!\REGS|regs[15][16]~q ), + .datad(!\HID_Register[3]~input_o ), + .datae(!\REGS|regs[7][16]~q ), + .dataf(!\REGS|regs[13][16]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[0]~19_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[0]~19 .extended_lut = "off"; +defparam \PC_Reg_Display[0]~19 .lut_mask = 64'h2205770522AF77AF; +defparam \PC_Reg_Display[0]~19 .shared_arith = "off"; // synopsys translate_on // Location: IOIBUF_X12_Y0_N52 @@ -679,40 +98499,17329 @@ defparam \HID_Register[0]~input .bus_hold = "false"; defparam \HID_Register[0]~input .simulate_z_as = "z"; // synopsys translate_on -// Location: IOIBUF_X17_Y0_N75 -cyclonev_io_ibuf \HID_Register[1]~input ( - .i(HID_Register[1]), - .ibar(gnd), - .dynamicterminationcontrol(gnd), - .o(\HID_Register[1]~input_o )); +// Location: MLABCELL_X37_Y5_N45 +cyclonev_lcell_comb \PC_Reg_Display[0]~20 ( +// Equation(s): +// \PC_Reg_Display[0]~20_combout = ( \HID_Register[2]~input_o & ( \HID_Register[0]~input_o & ( \PC_Reg_Display[0]~19_combout ) ) ) # ( !\HID_Register[2]~input_o & ( \HID_Register[0]~input_o & ( \PC_Reg_Display[0]~18_combout ) ) ) # ( +// \HID_Register[2]~input_o & ( !\HID_Register[0]~input_o & ( \PC_Reg_Display[0]~17_combout ) ) ) # ( !\HID_Register[2]~input_o & ( !\HID_Register[0]~input_o & ( \PC_Reg_Display[0]~16_combout ) ) ) + + .dataa(!\PC_Reg_Display[0]~18_combout ), + .datab(!\PC_Reg_Display[0]~17_combout ), + .datac(!\PC_Reg_Display[0]~16_combout ), + .datad(!\PC_Reg_Display[0]~19_combout ), + .datae(!\HID_Register[2]~input_o ), + .dataf(!\HID_Register[0]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[0]~20_combout ), + .sumout(), + .cout(), + .shareout()); // synopsys translate_off -defparam \HID_Register[1]~input .bus_hold = "false"; -defparam \HID_Register[1]~input .simulate_z_as = "z"; +defparam \PC_Reg_Display[0]~20 .extended_lut = "off"; +defparam \PC_Reg_Display[0]~20 .lut_mask = 64'h0F0F3333555500FF; +defparam \PC_Reg_Display[0]~20 .shared_arith = "off"; // synopsys translate_on -// Location: IOIBUF_X10_Y0_N58 -cyclonev_io_ibuf \HID_Register[3]~input ( - .i(HID_Register[3]), +// Location: IOIBUF_X10_Y0_N41 +cyclonev_io_ibuf \HID_PC[0]~input ( + .i(HID_PC[0]), .ibar(gnd), .dynamicterminationcontrol(gnd), - .o(\HID_Register[3]~input_o )); + .o(\HID_PC[0]~input_o )); // synopsys translate_off -defparam \HID_Register[3]~input .bus_hold = "false"; -defparam \HID_Register[3]~input .simulate_z_as = "z"; +defparam \HID_PC[0]~input .bus_hold = "false"; +defparam \HID_PC[0]~input .simulate_z_as = "z"; // synopsys translate_on -// Location: IOIBUF_X46_Y0_N18 -cyclonev_io_ibuf \clk[0]~input ( - .i(clk[0]), - .ibar(gnd), - .dynamicterminationcontrol(gnd), - .o(\clk[0]~input_o )); +// Location: FF_X36_Y8_N44 +dffeas \PC|pc[16]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\Add0~1_sumout ), + .asdata(vcc), + .clrn(!\rst[0]~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\PC|pc[16]~DUPLICATE_q ), + .prn(vcc)); // synopsys translate_off -defparam \clk[0]~input .bus_hold = "false"; -defparam \clk[0]~input .simulate_z_as = "z"; +defparam \PC|pc[16]~DUPLICATE .is_wysiwyg = "true"; +defparam \PC|pc[16]~DUPLICATE .power_up = "low"; // synopsys translate_on -// Location: LABCELL_X56_Y45_N3 +// Location: LABCELL_X36_Y8_N24 +cyclonev_lcell_comb \Add0~77 ( +// Equation(s): +// \Add0~77_sumout = SUM(( (\ROM|mem~9_combout & pc_we[0]) ) + ( \PC|pc[10]~DUPLICATE_q ) + ( \Add0~70 )) +// \Add0~78 = CARRY(( (\ROM|mem~9_combout & pc_we[0]) ) + ( \PC|pc[10]~DUPLICATE_q ) + ( \Add0~70 )) + + .dataa(gnd), + .datab(!\ROM|mem~9_combout ), + .datac(!\PC|pc[10]~DUPLICATE_q ), + .datad(!pc_we[0]), + .datae(gnd), + .dataf(gnd), + .datag(gnd), + .cin(\Add0~70 ), + .sharein(gnd), + .combout(), + .sumout(\Add0~77_sumout ), + .cout(\Add0~78 ), + .shareout()); +// synopsys translate_off +defparam \Add0~77 .extended_lut = "off"; +defparam \Add0~77 .lut_mask = 64'h0000F0F000000033; +defparam \Add0~77 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X36_Y8_N26 +dffeas \PC|pc[10]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\Add0~77_sumout ), + .asdata(vcc), + .clrn(!\rst[0]~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\PC|pc[10]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \PC|pc[10]~DUPLICATE .is_wysiwyg = "true"; +defparam \PC|pc[10]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X36_Y8_N27 +cyclonev_lcell_comb \Add0~85 ( +// Equation(s): +// \Add0~85_sumout = SUM(( (\ROM|mem~9_combout & pc_we[0]) ) + ( \PC|pc [11] ) + ( \Add0~78 )) +// \Add0~86 = CARRY(( (\ROM|mem~9_combout & pc_we[0]) ) + ( \PC|pc [11] ) + ( \Add0~78 )) + + .dataa(gnd), + .datab(!\ROM|mem~9_combout ), + .datac(!\PC|pc [11]), + .datad(!pc_we[0]), + .datae(gnd), + .dataf(gnd), + .datag(gnd), + .cin(\Add0~78 ), + .sharein(gnd), + .combout(), + .sumout(\Add0~85_sumout ), + .cout(\Add0~86 ), + .shareout()); +// synopsys translate_off +defparam \Add0~85 .extended_lut = "off"; +defparam \Add0~85 .lut_mask = 64'h0000F0F000000033; +defparam \Add0~85 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X36_Y8_N28 +dffeas \PC|pc[11] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\Add0~85_sumout ), + .asdata(vcc), + .clrn(!\rst[0]~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\PC|pc [11]), + .prn(vcc)); +// synopsys translate_off +defparam \PC|pc[11] .is_wysiwyg = "true"; +defparam \PC|pc[11] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X36_Y8_N30 +cyclonev_lcell_comb \Add0~93 ( +// Equation(s): +// \Add0~93_sumout = SUM(( (pc_we[0] & \ROM|mem~9_combout ) ) + ( \PC|pc [12] ) + ( \Add0~86 )) +// \Add0~94 = CARRY(( (pc_we[0] & \ROM|mem~9_combout ) ) + ( \PC|pc [12] ) + ( \Add0~86 )) + + .dataa(gnd), + .datab(!pc_we[0]), + .datac(gnd), + .datad(!\ROM|mem~9_combout ), + .datae(gnd), + .dataf(!\PC|pc [12]), + .datag(gnd), + .cin(\Add0~86 ), + .sharein(gnd), + .combout(), + .sumout(\Add0~93_sumout ), + .cout(\Add0~94 ), + .shareout()); +// synopsys translate_off +defparam \Add0~93 .extended_lut = "off"; +defparam \Add0~93 .lut_mask = 64'h0000FF0000000033; +defparam \Add0~93 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X36_Y8_N31 +dffeas \PC|pc[12] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\Add0~93_sumout ), + .asdata(vcc), + .clrn(!\rst[0]~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\PC|pc [12]), + .prn(vcc)); +// synopsys translate_off +defparam \PC|pc[12] .is_wysiwyg = "true"; +defparam \PC|pc[12] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X36_Y8_N33 +cyclonev_lcell_comb \Add0~101 ( +// Equation(s): +// \Add0~101_sumout = SUM(( (!\PC|pc [8] & (pc_we[0] & (!\PC|pc [9] & \ROM|mem~21_combout ))) ) + ( \PC|pc [13] ) + ( \Add0~94 )) +// \Add0~102 = CARRY(( (!\PC|pc [8] & (pc_we[0] & (!\PC|pc [9] & \ROM|mem~21_combout ))) ) + ( \PC|pc [13] ) + ( \Add0~94 )) + + .dataa(!\PC|pc [8]), + .datab(!pc_we[0]), + .datac(!\PC|pc [9]), + .datad(!\ROM|mem~21_combout ), + .datae(gnd), + .dataf(!\PC|pc [13]), + .datag(gnd), + .cin(\Add0~94 ), + .sharein(gnd), + .combout(), + .sumout(\Add0~101_sumout ), + .cout(\Add0~102 ), + .shareout()); +// synopsys translate_off +defparam \Add0~101 .extended_lut = "off"; +defparam \Add0~101 .lut_mask = 64'h0000FF0000000020; +defparam \Add0~101 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X36_Y8_N35 +dffeas \PC|pc[13] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\Add0~101_sumout ), + .asdata(vcc), + .clrn(!\rst[0]~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\PC|pc [13]), + .prn(vcc)); +// synopsys translate_off +defparam \PC|pc[13] .is_wysiwyg = "true"; +defparam \PC|pc[13] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X36_Y8_N36 +cyclonev_lcell_comb \Add0~109 ( +// Equation(s): +// \Add0~109_sumout = SUM(( \PC|pc [14] ) + ( (!\PC|pc [8] & (!\PC|pc [9] & (pc_we[0] & \ROM|mem~22_combout ))) ) + ( \Add0~102 )) +// \Add0~110 = CARRY(( \PC|pc [14] ) + ( (!\PC|pc [8] & (!\PC|pc [9] & (pc_we[0] & \ROM|mem~22_combout ))) ) + ( \Add0~102 )) + + .dataa(!\PC|pc [8]), + .datab(!\PC|pc [9]), + .datac(!pc_we[0]), + .datad(!\PC|pc [14]), + .datae(gnd), + .dataf(!\ROM|mem~22_combout ), + .datag(gnd), + .cin(\Add0~102 ), + .sharein(gnd), + .combout(), + .sumout(\Add0~109_sumout ), + .cout(\Add0~110 ), + .shareout()); +// synopsys translate_off +defparam \Add0~109 .extended_lut = "off"; +defparam \Add0~109 .lut_mask = 64'h0000FFF7000000FF; +defparam \Add0~109 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X36_Y8_N37 +dffeas \PC|pc[14] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\Add0~109_sumout ), + .asdata(vcc), + .clrn(!\rst[0]~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\PC|pc [14]), + .prn(vcc)); +// synopsys translate_off +defparam \PC|pc[14] .is_wysiwyg = "true"; +defparam \PC|pc[14] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X36_Y8_N39 +cyclonev_lcell_comb \Add0~117 ( +// Equation(s): +// \Add0~117_sumout = SUM(( (!\PC|pc [8] & (!\PC|pc [9] & (pc_we[0] & \ROM|mem~23_combout ))) ) + ( \PC|pc [15] ) + ( \Add0~110 )) +// \Add0~118 = CARRY(( (!\PC|pc [8] & (!\PC|pc [9] & (pc_we[0] & \ROM|mem~23_combout ))) ) + ( \PC|pc [15] ) + ( \Add0~110 )) + + .dataa(!\PC|pc [8]), + .datab(!\PC|pc [9]), + .datac(!pc_we[0]), + .datad(!\ROM|mem~23_combout ), + .datae(gnd), + .dataf(!\PC|pc [15]), + .datag(gnd), + .cin(\Add0~110 ), + .sharein(gnd), + .combout(), + .sumout(\Add0~117_sumout ), + .cout(\Add0~118 ), + .shareout()); +// synopsys translate_off +defparam \Add0~117 .extended_lut = "off"; +defparam \Add0~117 .lut_mask = 64'h0000FF0000000008; +defparam \Add0~117 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X36_Y8_N41 +dffeas \PC|pc[15] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\Add0~117_sumout ), + .asdata(vcc), + .clrn(!\rst[0]~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\PC|pc [15]), + .prn(vcc)); +// synopsys translate_off +defparam \PC|pc[15] .is_wysiwyg = "true"; +defparam \PC|pc[15] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X36_Y8_N42 +cyclonev_lcell_comb \Add0~1 ( +// Equation(s): +// \Add0~1_sumout = SUM(( (!\PC|pc [8] & (!\PC|pc [9] & (pc_we[0] & !\ROM|mem~24_combout ))) ) + ( \PC|pc[16]~DUPLICATE_q ) + ( \Add0~118 )) +// \Add0~2 = CARRY(( (!\PC|pc [8] & (!\PC|pc [9] & (pc_we[0] & !\ROM|mem~24_combout ))) ) + ( \PC|pc[16]~DUPLICATE_q ) + ( \Add0~118 )) + + .dataa(!\PC|pc [8]), + .datab(!\PC|pc [9]), + .datac(!pc_we[0]), + .datad(!\ROM|mem~24_combout ), + .datae(gnd), + .dataf(!\PC|pc[16]~DUPLICATE_q ), + .datag(gnd), + .cin(\Add0~118 ), + .sharein(gnd), + .combout(), + .sumout(\Add0~1_sumout ), + .cout(\Add0~2 ), + .shareout()); +// synopsys translate_off +defparam \Add0~1 .extended_lut = "off"; +defparam \Add0~1 .lut_mask = 64'h0000FF0000000800; +defparam \Add0~1 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X36_Y8_N43 +dffeas \PC|pc[16] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\Add0~1_sumout ), + .asdata(vcc), + .clrn(!\rst[0]~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\PC|pc [16]), + .prn(vcc)); +// synopsys translate_off +defparam \PC|pc[16] .is_wysiwyg = "true"; +defparam \PC|pc[16] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X38_Y11_N16 +dffeas \REGS|regs[17][16] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[16]~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~11_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[17][16]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[17][16] .is_wysiwyg = "true"; +defparam \REGS|regs[17][16] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X38_Y15_N22 +dffeas \REGS|regs[27][16]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[27][16]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~15_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[27][16]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[27][16]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[27][16]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: FF_X38_Y3_N32 +dffeas \REGS|regs[25][16] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[16]~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~13_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[25][16]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[25][16] .is_wysiwyg = "true"; +defparam \REGS|regs[25][16] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X38_Y3_N30 +cyclonev_lcell_comb \PC_Reg_Display[0]~2 ( +// Equation(s): +// \PC_Reg_Display[0]~2_combout = ( \REGS|regs[25][16]~q & ( \HID_Register[1]~input_o & ( (!\HID_Register[3]~input_o & (\REGS|regs[19][16]~q )) # (\HID_Register[3]~input_o & ((\REGS|regs[27][16]~DUPLICATE_q ))) ) ) ) # ( !\REGS|regs[25][16]~q & ( +// \HID_Register[1]~input_o & ( (!\HID_Register[3]~input_o & (\REGS|regs[19][16]~q )) # (\HID_Register[3]~input_o & ((\REGS|regs[27][16]~DUPLICATE_q ))) ) ) ) # ( \REGS|regs[25][16]~q & ( !\HID_Register[1]~input_o & ( (\HID_Register[3]~input_o ) # +// (\REGS|regs[17][16]~q ) ) ) ) # ( !\REGS|regs[25][16]~q & ( !\HID_Register[1]~input_o & ( (\REGS|regs[17][16]~q & !\HID_Register[3]~input_o ) ) ) ) + + .dataa(!\REGS|regs[17][16]~q ), + .datab(!\HID_Register[3]~input_o ), + .datac(!\REGS|regs[19][16]~q ), + .datad(!\REGS|regs[27][16]~DUPLICATE_q ), + .datae(!\REGS|regs[25][16]~q ), + .dataf(!\HID_Register[1]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[0]~2_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[0]~2 .extended_lut = "off"; +defparam \PC_Reg_Display[0]~2 .lut_mask = 64'h444477770C3F0C3F; +defparam \PC_Reg_Display[0]~2 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X36_Y11_N17 +dffeas \REGS|regs[23][16] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[16]~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~18_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[23][16]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[23][16] .is_wysiwyg = "true"; +defparam \REGS|regs[23][16] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X28_Y12_N57 +cyclonev_lcell_comb \REGS|Decoder0~16 ( +// Equation(s): +// \REGS|Decoder0~16_combout = ( \REGS|Decoder0~0_combout & ( (\comb~4_combout & (\comb~3_combout & !\comb~2_combout )) ) ) + + .dataa(!\comb~4_combout ), + .datab(!\comb~3_combout ), + .datac(gnd), + .datad(!\comb~2_combout ), + .datae(gnd), + .dataf(!\REGS|Decoder0~0_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|Decoder0~16_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|Decoder0~16 .extended_lut = "off"; +defparam \REGS|Decoder0~16 .lut_mask = 64'h0000000011001100; +defparam \REGS|Decoder0~16 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X38_Y3_N50 +dffeas \REGS|regs[21][16] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[16]~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~16_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[21][16]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[21][16] .is_wysiwyg = "true"; +defparam \REGS|regs[21][16] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X38_Y11_N19 +dffeas \REGS|regs[29][16]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[16]~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~17_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[29][16]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[29][16]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[29][16]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X38_Y3_N48 +cyclonev_lcell_comb \PC_Reg_Display[0]~3 ( +// Equation(s): +// \PC_Reg_Display[0]~3_combout = ( \REGS|regs[21][16]~q & ( \REGS|regs[29][16]~DUPLICATE_q & ( (!\HID_Register[1]~input_o ) # ((!\HID_Register[3]~input_o & (\REGS|regs[23][16]~q )) # (\HID_Register[3]~input_o & ((\REGS|regs[31][16]~q )))) ) ) ) # ( +// !\REGS|regs[21][16]~q & ( \REGS|regs[29][16]~DUPLICATE_q & ( (!\HID_Register[3]~input_o & (\REGS|regs[23][16]~q & (\HID_Register[1]~input_o ))) # (\HID_Register[3]~input_o & (((!\HID_Register[1]~input_o ) # (\REGS|regs[31][16]~q )))) ) ) ) # ( +// \REGS|regs[21][16]~q & ( !\REGS|regs[29][16]~DUPLICATE_q & ( (!\HID_Register[3]~input_o & (((!\HID_Register[1]~input_o )) # (\REGS|regs[23][16]~q ))) # (\HID_Register[3]~input_o & (((\HID_Register[1]~input_o & \REGS|regs[31][16]~q )))) ) ) ) # ( +// !\REGS|regs[21][16]~q & ( !\REGS|regs[29][16]~DUPLICATE_q & ( (\HID_Register[1]~input_o & ((!\HID_Register[3]~input_o & (\REGS|regs[23][16]~q )) # (\HID_Register[3]~input_o & ((\REGS|regs[31][16]~q ))))) ) ) ) + + .dataa(!\REGS|regs[23][16]~q ), + .datab(!\HID_Register[3]~input_o ), + .datac(!\HID_Register[1]~input_o ), + .datad(!\REGS|regs[31][16]~q ), + .datae(!\REGS|regs[21][16]~q ), + .dataf(!\REGS|regs[29][16]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[0]~3_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[0]~3 .extended_lut = "off"; +defparam \PC_Reg_Display[0]~3 .lut_mask = 64'h0407C4C73437F4F7; +defparam \PC_Reg_Display[0]~3 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X37_Y12_N2 +dffeas \REGS|regs[20][16] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[16]~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~7_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[20][16]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[20][16] .is_wysiwyg = "true"; +defparam \REGS|regs[20][16] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X38_Y11_N28 +dffeas \REGS|regs[28][16] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[16]~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~8_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[28][16]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[28][16] .is_wysiwyg = "true"; +defparam \REGS|regs[28][16] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y12_N9 +cyclonev_lcell_comb \PC_Reg_Display[0]~1 ( +// Equation(s): +// \PC_Reg_Display[0]~1_combout = ( \REGS|regs[22][16]~q & ( \REGS|regs[30][16]~q & ( ((!\HID_Register[3]~input_o & (\REGS|regs[20][16]~q )) # (\HID_Register[3]~input_o & ((\REGS|regs[28][16]~q )))) # (\HID_Register[1]~input_o ) ) ) ) # ( +// !\REGS|regs[22][16]~q & ( \REGS|regs[30][16]~q & ( (!\HID_Register[3]~input_o & (\REGS|regs[20][16]~q & (!\HID_Register[1]~input_o ))) # (\HID_Register[3]~input_o & (((\REGS|regs[28][16]~q ) # (\HID_Register[1]~input_o )))) ) ) ) # ( +// \REGS|regs[22][16]~q & ( !\REGS|regs[30][16]~q & ( (!\HID_Register[3]~input_o & (((\HID_Register[1]~input_o )) # (\REGS|regs[20][16]~q ))) # (\HID_Register[3]~input_o & (((!\HID_Register[1]~input_o & \REGS|regs[28][16]~q )))) ) ) ) # ( +// !\REGS|regs[22][16]~q & ( !\REGS|regs[30][16]~q & ( (!\HID_Register[1]~input_o & ((!\HID_Register[3]~input_o & (\REGS|regs[20][16]~q )) # (\HID_Register[3]~input_o & ((\REGS|regs[28][16]~q ))))) ) ) ) + + .dataa(!\REGS|regs[20][16]~q ), + .datab(!\HID_Register[3]~input_o ), + .datac(!\HID_Register[1]~input_o ), + .datad(!\REGS|regs[28][16]~q ), + .datae(!\REGS|regs[22][16]~q ), + .dataf(!\REGS|regs[30][16]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[0]~1_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[0]~1 .extended_lut = "off"; +defparam \PC_Reg_Display[0]~1 .lut_mask = 64'h40704C7C43734F7F; +defparam \PC_Reg_Display[0]~1 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X38_Y3_N26 +dffeas \REGS|regs[24][16] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[16]~0_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~4_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[24][16]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[24][16] .is_wysiwyg = "true"; +defparam \REGS|regs[24][16] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X38_Y3_N24 +cyclonev_lcell_comb \PC_Reg_Display[0]~0 ( +// Equation(s): +// \PC_Reg_Display[0]~0_combout = ( \REGS|regs[24][16]~q & ( \REGS|regs[16][16]~q & ( (!\HID_Register[1]~input_o ) # ((!\HID_Register[3]~input_o & ((\REGS|regs[18][16]~q ))) # (\HID_Register[3]~input_o & (\REGS|regs[26][16]~q ))) ) ) ) # ( +// !\REGS|regs[24][16]~q & ( \REGS|regs[16][16]~q & ( (!\HID_Register[1]~input_o & (((!\HID_Register[3]~input_o )))) # (\HID_Register[1]~input_o & ((!\HID_Register[3]~input_o & ((\REGS|regs[18][16]~q ))) # (\HID_Register[3]~input_o & +// (\REGS|regs[26][16]~q )))) ) ) ) # ( \REGS|regs[24][16]~q & ( !\REGS|regs[16][16]~q & ( (!\HID_Register[1]~input_o & (((\HID_Register[3]~input_o )))) # (\HID_Register[1]~input_o & ((!\HID_Register[3]~input_o & ((\REGS|regs[18][16]~q ))) # +// (\HID_Register[3]~input_o & (\REGS|regs[26][16]~q )))) ) ) ) # ( !\REGS|regs[24][16]~q & ( !\REGS|regs[16][16]~q & ( (\HID_Register[1]~input_o & ((!\HID_Register[3]~input_o & ((\REGS|regs[18][16]~q ))) # (\HID_Register[3]~input_o & +// (\REGS|regs[26][16]~q )))) ) ) ) + + .dataa(!\HID_Register[1]~input_o ), + .datab(!\REGS|regs[26][16]~q ), + .datac(!\REGS|regs[18][16]~q ), + .datad(!\HID_Register[3]~input_o ), + .datae(!\REGS|regs[24][16]~q ), + .dataf(!\REGS|regs[16][16]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[0]~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[0]~0 .extended_lut = "off"; +defparam \PC_Reg_Display[0]~0 .lut_mask = 64'h051105BBAF11AFBB; +defparam \PC_Reg_Display[0]~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y3_N42 +cyclonev_lcell_comb \PC_Reg_Display[0]~4 ( +// Equation(s): +// \PC_Reg_Display[0]~4_combout = ( \HID_Register[2]~input_o & ( \HID_Register[0]~input_o & ( \PC_Reg_Display[0]~3_combout ) ) ) # ( !\HID_Register[2]~input_o & ( \HID_Register[0]~input_o & ( \PC_Reg_Display[0]~2_combout ) ) ) # ( +// \HID_Register[2]~input_o & ( !\HID_Register[0]~input_o & ( \PC_Reg_Display[0]~1_combout ) ) ) # ( !\HID_Register[2]~input_o & ( !\HID_Register[0]~input_o & ( \PC_Reg_Display[0]~0_combout ) ) ) + + .dataa(!\PC_Reg_Display[0]~2_combout ), + .datab(!\PC_Reg_Display[0]~3_combout ), + .datac(!\PC_Reg_Display[0]~1_combout ), + .datad(!\PC_Reg_Display[0]~0_combout ), + .datae(!\HID_Register[2]~input_o ), + .dataf(!\HID_Register[0]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[0]~4_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[0]~4 .extended_lut = "off"; +defparam \PC_Reg_Display[0]~4 .lut_mask = 64'h00FF0F0F55553333; +defparam \PC_Reg_Display[0]~4 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X41_Y6_N7 +dffeas \REGS|regs[27][0]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[27][0]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~15_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[27][0]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[27][0]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[27][0]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: FF_X41_Y6_N46 +dffeas \REGS|regs[19][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[19][0]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~14_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[19][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[19][0] .is_wysiwyg = "true"; +defparam \REGS|regs[19][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X40_Y10_N54 +cyclonev_lcell_comb \PC_Reg_Display[0]~8 ( +// Equation(s): +// \PC_Reg_Display[0]~8_combout = ( \REGS|regs[23][0]~q & ( \REGS|regs[31][0]~q & ( ((!\HID_Register[3]~input_o & ((\REGS|regs[19][0]~q ))) # (\HID_Register[3]~input_o & (\REGS|regs[27][0]~DUPLICATE_q ))) # (\HID_Register[2]~input_o ) ) ) ) # ( +// !\REGS|regs[23][0]~q & ( \REGS|regs[31][0]~q & ( (!\HID_Register[3]~input_o & (((\REGS|regs[19][0]~q & !\HID_Register[2]~input_o )))) # (\HID_Register[3]~input_o & (((\HID_Register[2]~input_o )) # (\REGS|regs[27][0]~DUPLICATE_q ))) ) ) ) # ( +// \REGS|regs[23][0]~q & ( !\REGS|regs[31][0]~q & ( (!\HID_Register[3]~input_o & (((\HID_Register[2]~input_o ) # (\REGS|regs[19][0]~q )))) # (\HID_Register[3]~input_o & (\REGS|regs[27][0]~DUPLICATE_q & ((!\HID_Register[2]~input_o )))) ) ) ) # ( +// !\REGS|regs[23][0]~q & ( !\REGS|regs[31][0]~q & ( (!\HID_Register[2]~input_o & ((!\HID_Register[3]~input_o & ((\REGS|regs[19][0]~q ))) # (\HID_Register[3]~input_o & (\REGS|regs[27][0]~DUPLICATE_q )))) ) ) ) + + .dataa(!\HID_Register[3]~input_o ), + .datab(!\REGS|regs[27][0]~DUPLICATE_q ), + .datac(!\REGS|regs[19][0]~q ), + .datad(!\HID_Register[2]~input_o ), + .datae(!\REGS|regs[23][0]~q ), + .dataf(!\REGS|regs[31][0]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[0]~8_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[0]~8 .extended_lut = "off"; +defparam \PC_Reg_Display[0]~8 .lut_mask = 64'h1B001BAA1B551BFF; +defparam \PC_Reg_Display[0]~8 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X38_Y14_N58 +dffeas \REGS|regs[17][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[0]~86_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~11_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[17][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[17][0] .is_wysiwyg = "true"; +defparam \REGS|regs[17][0] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X38_Y7_N4 +dffeas \REGS|regs[25][0]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[0]~86_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~13_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[25][0]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[25][0]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[25][0]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: FF_X38_Y9_N2 +dffeas \REGS|regs[21][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[0]~86_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~16_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[21][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[21][0] .is_wysiwyg = "true"; +defparam \REGS|regs[21][0] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X38_Y5_N7 +dffeas \REGS|regs[29][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[29][0]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~17_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[29][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[29][0] .is_wysiwyg = "true"; +defparam \REGS|regs[29][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X38_Y9_N54 +cyclonev_lcell_comb \PC_Reg_Display[0]~6 ( +// Equation(s): +// \PC_Reg_Display[0]~6_combout = ( \REGS|regs[21][0]~q & ( \REGS|regs[29][0]~q & ( ((!\HID_Register[3]~input_o & (\REGS|regs[17][0]~q )) # (\HID_Register[3]~input_o & ((\REGS|regs[25][0]~DUPLICATE_q )))) # (\HID_Register[2]~input_o ) ) ) ) # ( +// !\REGS|regs[21][0]~q & ( \REGS|regs[29][0]~q & ( (!\HID_Register[2]~input_o & ((!\HID_Register[3]~input_o & (\REGS|regs[17][0]~q )) # (\HID_Register[3]~input_o & ((\REGS|regs[25][0]~DUPLICATE_q ))))) # (\HID_Register[2]~input_o & +// (((\HID_Register[3]~input_o )))) ) ) ) # ( \REGS|regs[21][0]~q & ( !\REGS|regs[29][0]~q & ( (!\HID_Register[2]~input_o & ((!\HID_Register[3]~input_o & (\REGS|regs[17][0]~q )) # (\HID_Register[3]~input_o & ((\REGS|regs[25][0]~DUPLICATE_q ))))) # +// (\HID_Register[2]~input_o & (((!\HID_Register[3]~input_o )))) ) ) ) # ( !\REGS|regs[21][0]~q & ( !\REGS|regs[29][0]~q & ( (!\HID_Register[2]~input_o & ((!\HID_Register[3]~input_o & (\REGS|regs[17][0]~q )) # (\HID_Register[3]~input_o & +// ((\REGS|regs[25][0]~DUPLICATE_q ))))) ) ) ) + + .dataa(!\REGS|regs[17][0]~q ), + .datab(!\HID_Register[2]~input_o ), + .datac(!\HID_Register[3]~input_o ), + .datad(!\REGS|regs[25][0]~DUPLICATE_q ), + .datae(!\REGS|regs[21][0]~q ), + .dataf(!\REGS|regs[29][0]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[0]~6_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[0]~6 .extended_lut = "off"; +defparam \PC_Reg_Display[0]~6 .lut_mask = 64'h404C707C434F737F; +defparam \PC_Reg_Display[0]~6 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X38_Y5_N55 +dffeas \REGS|regs[20][0]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[20][0]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~7_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[20][0]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[20][0]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[20][0]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X38_Y7_N36 +cyclonev_lcell_comb \PC_Reg_Display[0]~5 ( +// Equation(s): +// \PC_Reg_Display[0]~5_combout = ( \REGS|regs[28][0]~q & ( \REGS|regs[24][0]~q & ( ((!\HID_Register[2]~input_o & ((\REGS|regs[16][0]~q ))) # (\HID_Register[2]~input_o & (\REGS|regs[20][0]~DUPLICATE_q ))) # (\HID_Register[3]~input_o ) ) ) ) # ( +// !\REGS|regs[28][0]~q & ( \REGS|regs[24][0]~q & ( (!\HID_Register[3]~input_o & ((!\HID_Register[2]~input_o & ((\REGS|regs[16][0]~q ))) # (\HID_Register[2]~input_o & (\REGS|regs[20][0]~DUPLICATE_q )))) # (\HID_Register[3]~input_o & +// (((!\HID_Register[2]~input_o )))) ) ) ) # ( \REGS|regs[28][0]~q & ( !\REGS|regs[24][0]~q & ( (!\HID_Register[3]~input_o & ((!\HID_Register[2]~input_o & ((\REGS|regs[16][0]~q ))) # (\HID_Register[2]~input_o & (\REGS|regs[20][0]~DUPLICATE_q )))) # +// (\HID_Register[3]~input_o & (((\HID_Register[2]~input_o )))) ) ) ) # ( !\REGS|regs[28][0]~q & ( !\REGS|regs[24][0]~q & ( (!\HID_Register[3]~input_o & ((!\HID_Register[2]~input_o & ((\REGS|regs[16][0]~q ))) # (\HID_Register[2]~input_o & +// (\REGS|regs[20][0]~DUPLICATE_q )))) ) ) ) + + .dataa(!\HID_Register[3]~input_o ), + .datab(!\REGS|regs[20][0]~DUPLICATE_q ), + .datac(!\HID_Register[2]~input_o ), + .datad(!\REGS|regs[16][0]~q ), + .datae(!\REGS|regs[28][0]~q ), + .dataf(!\REGS|regs[24][0]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[0]~5_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[0]~5 .extended_lut = "off"; +defparam \PC_Reg_Display[0]~5 .lut_mask = 64'h02A207A752F257F7; +defparam \PC_Reg_Display[0]~5 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X41_Y5_N33 +cyclonev_lcell_comb \PC_Reg_Display[0]~7 ( +// Equation(s): +// \PC_Reg_Display[0]~7_combout = ( \REGS|regs[22][0]~q & ( \REGS|regs[26][0]~q & ( (!\HID_Register[3]~input_o & (((\HID_Register[2]~input_o )) # (\REGS|regs[18][0]~q ))) # (\HID_Register[3]~input_o & (((!\HID_Register[2]~input_o ) # +// (\REGS|regs[30][0]~q )))) ) ) ) # ( !\REGS|regs[22][0]~q & ( \REGS|regs[26][0]~q & ( (!\HID_Register[3]~input_o & (\REGS|regs[18][0]~q & (!\HID_Register[2]~input_o ))) # (\HID_Register[3]~input_o & (((!\HID_Register[2]~input_o ) # +// (\REGS|regs[30][0]~q )))) ) ) ) # ( \REGS|regs[22][0]~q & ( !\REGS|regs[26][0]~q & ( (!\HID_Register[3]~input_o & (((\HID_Register[2]~input_o )) # (\REGS|regs[18][0]~q ))) # (\HID_Register[3]~input_o & (((\HID_Register[2]~input_o & +// \REGS|regs[30][0]~q )))) ) ) ) # ( !\REGS|regs[22][0]~q & ( !\REGS|regs[26][0]~q & ( (!\HID_Register[3]~input_o & (\REGS|regs[18][0]~q & (!\HID_Register[2]~input_o ))) # (\HID_Register[3]~input_o & (((\HID_Register[2]~input_o & \REGS|regs[30][0]~q +// )))) ) ) ) + + .dataa(!\REGS|regs[18][0]~q ), + .datab(!\HID_Register[3]~input_o ), + .datac(!\HID_Register[2]~input_o ), + .datad(!\REGS|regs[30][0]~q ), + .datae(!\REGS|regs[22][0]~q ), + .dataf(!\REGS|regs[26][0]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[0]~7_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[0]~7 .extended_lut = "off"; +defparam \PC_Reg_Display[0]~7 .lut_mask = 64'h40434C4F70737C7F; +defparam \PC_Reg_Display[0]~7 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X40_Y4_N24 +cyclonev_lcell_comb \PC_Reg_Display[0]~9 ( +// Equation(s): +// \PC_Reg_Display[0]~9_combout = ( \HID_Register[1]~input_o & ( \PC_Reg_Display[0]~7_combout & ( (!\HID_Register[0]~input_o ) # (\PC_Reg_Display[0]~8_combout ) ) ) ) # ( !\HID_Register[1]~input_o & ( \PC_Reg_Display[0]~7_combout & ( +// (!\HID_Register[0]~input_o & ((\PC_Reg_Display[0]~5_combout ))) # (\HID_Register[0]~input_o & (\PC_Reg_Display[0]~6_combout )) ) ) ) # ( \HID_Register[1]~input_o & ( !\PC_Reg_Display[0]~7_combout & ( (\PC_Reg_Display[0]~8_combout & +// \HID_Register[0]~input_o ) ) ) ) # ( !\HID_Register[1]~input_o & ( !\PC_Reg_Display[0]~7_combout & ( (!\HID_Register[0]~input_o & ((\PC_Reg_Display[0]~5_combout ))) # (\HID_Register[0]~input_o & (\PC_Reg_Display[0]~6_combout )) ) ) ) + + .dataa(!\PC_Reg_Display[0]~8_combout ), + .datab(!\PC_Reg_Display[0]~6_combout ), + .datac(!\HID_Register[0]~input_o ), + .datad(!\PC_Reg_Display[0]~5_combout ), + .datae(!\HID_Register[1]~input_o ), + .dataf(!\PC_Reg_Display[0]~7_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[0]~9_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[0]~9 .extended_lut = "off"; +defparam \PC_Reg_Display[0]~9 .lut_mask = 64'h03F3050503F3F5F5; +defparam \PC_Reg_Display[0]~9 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X40_Y8_N0 +cyclonev_lcell_comb \PC_Reg_Display[0]~10 ( +// Equation(s): +// \PC_Reg_Display[0]~10_combout = ( \HID_Register[2]~input_o & ( \HID_Register[3]~input_o & ( \REGS|regs[12][0]~q ) ) ) # ( !\HID_Register[2]~input_o & ( \HID_Register[3]~input_o & ( \REGS|regs[8][0]~DUPLICATE_q ) ) ) # ( \HID_Register[2]~input_o & +// ( !\HID_Register[3]~input_o & ( \REGS|regs[4][0]~q ) ) ) + + .dataa(gnd), + .datab(!\REGS|regs[4][0]~q ), + .datac(!\REGS|regs[8][0]~DUPLICATE_q ), + .datad(!\REGS|regs[12][0]~q ), + .datae(!\HID_Register[2]~input_o ), + .dataf(!\HID_Register[3]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[0]~10_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[0]~10 .extended_lut = "off"; +defparam \PC_Reg_Display[0]~10 .lut_mask = 64'h000033330F0F00FF; +defparam \PC_Reg_Display[0]~10 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X41_Y14_N56 +dffeas \REGS|regs[3][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[0]~86_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~36_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[3][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[3][0] .is_wysiwyg = "true"; +defparam \REGS|regs[3][0] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X38_Y12_N10 +dffeas \REGS|regs[11][0]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[0]~86_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~37_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[11][0]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[11][0]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[11][0]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: FF_X41_Y10_N10 +dffeas \REGS|regs[15][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[0]~86_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~39_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[15][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[15][0] .is_wysiwyg = "true"; +defparam \REGS|regs[15][0] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X41_Y14_N47 +dffeas \REGS|regs[7][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[0]~86_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~38_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[7][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[7][0] .is_wysiwyg = "true"; +defparam \REGS|regs[7][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X41_Y14_N45 +cyclonev_lcell_comb \PC_Reg_Display[0]~13 ( +// Equation(s): +// \PC_Reg_Display[0]~13_combout = ( \REGS|regs[7][0]~q & ( \HID_Register[2]~input_o & ( (!\HID_Register[3]~input_o ) # (\REGS|regs[15][0]~q ) ) ) ) # ( !\REGS|regs[7][0]~q & ( \HID_Register[2]~input_o & ( (\REGS|regs[15][0]~q & +// \HID_Register[3]~input_o ) ) ) ) # ( \REGS|regs[7][0]~q & ( !\HID_Register[2]~input_o & ( (!\HID_Register[3]~input_o & (\REGS|regs[3][0]~q )) # (\HID_Register[3]~input_o & ((\REGS|regs[11][0]~DUPLICATE_q ))) ) ) ) # ( !\REGS|regs[7][0]~q & ( +// !\HID_Register[2]~input_o & ( (!\HID_Register[3]~input_o & (\REGS|regs[3][0]~q )) # (\HID_Register[3]~input_o & ((\REGS|regs[11][0]~DUPLICATE_q ))) ) ) ) + + .dataa(!\REGS|regs[3][0]~q ), + .datab(!\REGS|regs[11][0]~DUPLICATE_q ), + .datac(!\REGS|regs[15][0]~q ), + .datad(!\HID_Register[3]~input_o ), + .datae(!\REGS|regs[7][0]~q ), + .dataf(!\HID_Register[2]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[0]~13_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[0]~13 .extended_lut = "off"; +defparam \PC_Reg_Display[0]~13 .lut_mask = 64'h55335533000FFF0F; +defparam \PC_Reg_Display[0]~13 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X41_Y10_N43 +dffeas \REGS|regs[14][0]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[0]~86_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~35_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[14][0]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[14][0]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[14][0]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: FF_X38_Y12_N16 +dffeas \REGS|regs[2][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[0]~86_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~32_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[2][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[2][0] .is_wysiwyg = "true"; +defparam \REGS|regs[2][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X40_Y14_N12 +cyclonev_lcell_comb \PC_Reg_Display[0]~12 ( +// Equation(s): +// \PC_Reg_Display[0]~12_combout = ( \REGS|regs[6][0]~q & ( \HID_Register[3]~input_o & ( (!\HID_Register[2]~input_o & ((\REGS|regs[10][0]~q ))) # (\HID_Register[2]~input_o & (\REGS|regs[14][0]~DUPLICATE_q )) ) ) ) # ( !\REGS|regs[6][0]~q & ( +// \HID_Register[3]~input_o & ( (!\HID_Register[2]~input_o & ((\REGS|regs[10][0]~q ))) # (\HID_Register[2]~input_o & (\REGS|regs[14][0]~DUPLICATE_q )) ) ) ) # ( \REGS|regs[6][0]~q & ( !\HID_Register[3]~input_o & ( (\REGS|regs[2][0]~q ) # +// (\HID_Register[2]~input_o ) ) ) ) # ( !\REGS|regs[6][0]~q & ( !\HID_Register[3]~input_o & ( (!\HID_Register[2]~input_o & \REGS|regs[2][0]~q ) ) ) ) + + .dataa(!\HID_Register[2]~input_o ), + .datab(!\REGS|regs[14][0]~DUPLICATE_q ), + .datac(!\REGS|regs[2][0]~q ), + .datad(!\REGS|regs[10][0]~q ), + .datae(!\REGS|regs[6][0]~q ), + .dataf(!\HID_Register[3]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[0]~12_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[0]~12 .extended_lut = "off"; +defparam \PC_Reg_Display[0]~12 .lut_mask = 64'h0A0A5F5F11BB11BB; +defparam \PC_Reg_Display[0]~12 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X36_Y9_N49 +dffeas \REGS|regs[13][0] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[0]~86_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~31_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[13][0]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[13][0] .is_wysiwyg = "true"; +defparam \REGS|regs[13][0] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X41_Y14_N24 +cyclonev_lcell_comb \PC_Reg_Display[0]~11 ( +// Equation(s): +// \PC_Reg_Display[0]~11_combout = ( \REGS|regs[5][0]~q & ( \HID_Register[2]~input_o & ( (!\HID_Register[3]~input_o ) # (\REGS|regs[13][0]~q ) ) ) ) # ( !\REGS|regs[5][0]~q & ( \HID_Register[2]~input_o & ( (\HID_Register[3]~input_o & +// \REGS|regs[13][0]~q ) ) ) ) # ( \REGS|regs[5][0]~q & ( !\HID_Register[2]~input_o & ( (!\HID_Register[3]~input_o & ((\REGS|regs[1][0]~q ))) # (\HID_Register[3]~input_o & (\REGS|regs[9][0]~q )) ) ) ) # ( !\REGS|regs[5][0]~q & ( +// !\HID_Register[2]~input_o & ( (!\HID_Register[3]~input_o & ((\REGS|regs[1][0]~q ))) # (\HID_Register[3]~input_o & (\REGS|regs[9][0]~q )) ) ) ) + + .dataa(!\HID_Register[3]~input_o ), + .datab(!\REGS|regs[9][0]~q ), + .datac(!\REGS|regs[1][0]~q ), + .datad(!\REGS|regs[13][0]~q ), + .datae(!\REGS|regs[5][0]~q ), + .dataf(!\HID_Register[2]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[0]~11_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[0]~11 .extended_lut = "off"; +defparam \PC_Reg_Display[0]~11 .lut_mask = 64'h1B1B1B1B0055AAFF; +defparam \PC_Reg_Display[0]~11 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X41_Y14_N57 +cyclonev_lcell_comb \PC_Reg_Display[0]~14 ( +// Equation(s): +// \PC_Reg_Display[0]~14_combout = ( \HID_Register[1]~input_o & ( \PC_Reg_Display[0]~11_combout & ( (!\HID_Register[0]~input_o & ((\PC_Reg_Display[0]~12_combout ))) # (\HID_Register[0]~input_o & (\PC_Reg_Display[0]~13_combout )) ) ) ) # ( +// !\HID_Register[1]~input_o & ( \PC_Reg_Display[0]~11_combout & ( (\HID_Register[0]~input_o ) # (\PC_Reg_Display[0]~10_combout ) ) ) ) # ( \HID_Register[1]~input_o & ( !\PC_Reg_Display[0]~11_combout & ( (!\HID_Register[0]~input_o & +// ((\PC_Reg_Display[0]~12_combout ))) # (\HID_Register[0]~input_o & (\PC_Reg_Display[0]~13_combout )) ) ) ) # ( !\HID_Register[1]~input_o & ( !\PC_Reg_Display[0]~11_combout & ( (\PC_Reg_Display[0]~10_combout & !\HID_Register[0]~input_o ) ) ) ) + + .dataa(!\PC_Reg_Display[0]~10_combout ), + .datab(!\PC_Reg_Display[0]~13_combout ), + .datac(!\PC_Reg_Display[0]~12_combout ), + .datad(!\HID_Register[0]~input_o ), + .datae(!\HID_Register[1]~input_o ), + .dataf(!\PC_Reg_Display[0]~11_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[0]~14_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[0]~14 .extended_lut = "off"; +defparam \PC_Reg_Display[0]~14 .lut_mask = 64'h55000F3355FF0F33; +defparam \PC_Reg_Display[0]~14 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X21_Y7_N51 +cyclonev_lcell_comb \PC_Reg_Display[0]~15 ( +// Equation(s): +// \PC_Reg_Display[0]~15_combout = ( \HID_Hi_Low[0]~input_o & ( \PC_Reg_Display[0]~14_combout & ( \PC_Reg_Display[0]~4_combout ) ) ) # ( !\HID_Hi_Low[0]~input_o & ( \PC_Reg_Display[0]~14_combout & ( (!\HID_Register[4]~input_o ) # +// (\PC_Reg_Display[0]~9_combout ) ) ) ) # ( \HID_Hi_Low[0]~input_o & ( !\PC_Reg_Display[0]~14_combout & ( \PC_Reg_Display[0]~4_combout ) ) ) # ( !\HID_Hi_Low[0]~input_o & ( !\PC_Reg_Display[0]~14_combout & ( (\HID_Register[4]~input_o & +// \PC_Reg_Display[0]~9_combout ) ) ) ) + + .dataa(!\HID_Register[4]~input_o ), + .datab(!\PC_Reg_Display[0]~4_combout ), + .datac(!\PC_Reg_Display[0]~9_combout ), + .datad(gnd), + .datae(!\HID_Hi_Low[0]~input_o ), + .dataf(!\PC_Reg_Display[0]~14_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[0]~15_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[0]~15 .extended_lut = "off"; +defparam \PC_Reg_Display[0]~15 .lut_mask = 64'h05053333AFAF3333; +defparam \PC_Reg_Display[0]~15 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X21_Y7_N6 +cyclonev_lcell_comb \PC_Reg_Display[0]~21 ( +// Equation(s): +// \PC_Reg_Display[0]~21_combout = ( \PC|pc [16] & ( \PC_Reg_Display[0]~15_combout & ( (!\HID_Hi_Low[0]~input_o & (((!\HID_PC[0]~input_o )))) # (\HID_Hi_Low[0]~input_o & (((\HID_PC[0]~input_o ) # (\PC_Reg_Display[0]~20_combout )) # +// (\HID_Register[4]~input_o ))) ) ) ) # ( !\PC|pc [16] & ( \PC_Reg_Display[0]~15_combout & ( (!\HID_PC[0]~input_o & (((!\HID_Hi_Low[0]~input_o ) # (\PC_Reg_Display[0]~20_combout )) # (\HID_Register[4]~input_o ))) ) ) ) # ( \PC|pc [16] & ( +// !\PC_Reg_Display[0]~15_combout & ( (\HID_Hi_Low[0]~input_o & (((!\HID_Register[4]~input_o & \PC_Reg_Display[0]~20_combout )) # (\HID_PC[0]~input_o ))) ) ) ) # ( !\PC|pc [16] & ( !\PC_Reg_Display[0]~15_combout & ( (!\HID_Register[4]~input_o & +// (\HID_Hi_Low[0]~input_o & (\PC_Reg_Display[0]~20_combout & !\HID_PC[0]~input_o ))) ) ) ) + + .dataa(!\HID_Register[4]~input_o ), + .datab(!\HID_Hi_Low[0]~input_o ), + .datac(!\PC_Reg_Display[0]~20_combout ), + .datad(!\HID_PC[0]~input_o ), + .datae(!\PC|pc [16]), + .dataf(!\PC_Reg_Display[0]~15_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[0]~21_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[0]~21 .extended_lut = "off"; +defparam \PC_Reg_Display[0]~21 .lut_mask = 64'h02000233DF00DF33; +defparam \PC_Reg_Display[0]~21 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X37_Y6_N26 +dffeas \REGS|regs[15][19]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[19]~261_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~39_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[15][19]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[15][19]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[15][19]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X41_Y5_N12 +cyclonev_lcell_comb \PC_Reg_Display[3]~79 ( +// Equation(s): +// \PC_Reg_Display[3]~79_combout = ( \HID_Register[1]~input_o & ( \REGS|regs[11][19]~q & ( (!\HID_Register[2]~input_o ) # (\REGS|regs[15][19]~DUPLICATE_q ) ) ) ) # ( !\HID_Register[1]~input_o & ( \REGS|regs[11][19]~q & ( (!\HID_Register[2]~input_o & +// (\REGS|regs[9][19]~q )) # (\HID_Register[2]~input_o & ((\REGS|regs[13][19]~q ))) ) ) ) # ( \HID_Register[1]~input_o & ( !\REGS|regs[11][19]~q & ( (\REGS|regs[15][19]~DUPLICATE_q & \HID_Register[2]~input_o ) ) ) ) # ( !\HID_Register[1]~input_o & ( +// !\REGS|regs[11][19]~q & ( (!\HID_Register[2]~input_o & (\REGS|regs[9][19]~q )) # (\HID_Register[2]~input_o & ((\REGS|regs[13][19]~q ))) ) ) ) + + .dataa(!\REGS|regs[15][19]~DUPLICATE_q ), + .datab(!\HID_Register[2]~input_o ), + .datac(!\REGS|regs[9][19]~q ), + .datad(!\REGS|regs[13][19]~q ), + .datae(!\HID_Register[1]~input_o ), + .dataf(!\REGS|regs[11][19]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[3]~79_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[3]~79 .extended_lut = "off"; +defparam \PC_Reg_Display[3]~79 .lut_mask = 64'h0C3F11110C3FDDDD; +defparam \PC_Reg_Display[3]~79 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X41_Y7_N24 +cyclonev_lcell_comb \PC_Reg_Display[3]~76 ( +// Equation(s): +// \PC_Reg_Display[3]~76_combout = ( \REGS|regs[10][3]~q & ( \HID_Register[2]~input_o & ( (!\HID_Register[1]~input_o & (\REGS|regs[12][3]~q )) # (\HID_Register[1]~input_o & ((\REGS|regs[14][3]~q ))) ) ) ) # ( !\REGS|regs[10][3]~q & ( +// \HID_Register[2]~input_o & ( (!\HID_Register[1]~input_o & (\REGS|regs[12][3]~q )) # (\HID_Register[1]~input_o & ((\REGS|regs[14][3]~q ))) ) ) ) # ( \REGS|regs[10][3]~q & ( !\HID_Register[2]~input_o & ( (\HID_Register[1]~input_o ) # +// (\REGS|regs[8][3]~DUPLICATE_q ) ) ) ) # ( !\REGS|regs[10][3]~q & ( !\HID_Register[2]~input_o & ( (\REGS|regs[8][3]~DUPLICATE_q & !\HID_Register[1]~input_o ) ) ) ) + + .dataa(!\REGS|regs[8][3]~DUPLICATE_q ), + .datab(!\REGS|regs[12][3]~q ), + .datac(!\HID_Register[1]~input_o ), + .datad(!\REGS|regs[14][3]~q ), + .datae(!\REGS|regs[10][3]~q ), + .dataf(!\HID_Register[2]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[3]~76_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[3]~76 .extended_lut = "off"; +defparam \PC_Reg_Display[3]~76 .lut_mask = 64'h50505F5F303F303F; +defparam \PC_Reg_Display[3]~76 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X41_Y7_N54 +cyclonev_lcell_comb \PC_Reg_Display[3]~78 ( +// Equation(s): +// \PC_Reg_Display[3]~78_combout = ( \REGS|regs[14][19]~q & ( \REGS|regs[8][19]~q & ( (!\HID_Register[1]~input_o & (((!\HID_Register[2]~input_o )) # (\REGS|regs[12][19]~q ))) # (\HID_Register[1]~input_o & (((\REGS|regs[10][19]~q ) # +// (\HID_Register[2]~input_o )))) ) ) ) # ( !\REGS|regs[14][19]~q & ( \REGS|regs[8][19]~q & ( (!\HID_Register[1]~input_o & (((!\HID_Register[2]~input_o )) # (\REGS|regs[12][19]~q ))) # (\HID_Register[1]~input_o & (((!\HID_Register[2]~input_o & +// \REGS|regs[10][19]~q )))) ) ) ) # ( \REGS|regs[14][19]~q & ( !\REGS|regs[8][19]~q & ( (!\HID_Register[1]~input_o & (\REGS|regs[12][19]~q & (\HID_Register[2]~input_o ))) # (\HID_Register[1]~input_o & (((\REGS|regs[10][19]~q ) # +// (\HID_Register[2]~input_o )))) ) ) ) # ( !\REGS|regs[14][19]~q & ( !\REGS|regs[8][19]~q & ( (!\HID_Register[1]~input_o & (\REGS|regs[12][19]~q & (\HID_Register[2]~input_o ))) # (\HID_Register[1]~input_o & (((!\HID_Register[2]~input_o & +// \REGS|regs[10][19]~q )))) ) ) ) + + .dataa(!\HID_Register[1]~input_o ), + .datab(!\REGS|regs[12][19]~q ), + .datac(!\HID_Register[2]~input_o ), + .datad(!\REGS|regs[10][19]~q ), + .datae(!\REGS|regs[14][19]~q ), + .dataf(!\REGS|regs[8][19]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[3]~78_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[3]~78 .extended_lut = "off"; +defparam \PC_Reg_Display[3]~78 .lut_mask = 64'h02520757A2F2A7F7; +defparam \PC_Reg_Display[3]~78 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X35_Y7_N42 +cyclonev_lcell_comb \PC_Reg_Display[3]~77 ( +// Equation(s): +// \PC_Reg_Display[3]~77_combout = ( \REGS|regs[11][3]~q & ( \REGS|regs[13][3]~q & ( (!\HID_Register[2]~input_o & (((\HID_Register[1]~input_o )) # (\REGS|regs[9][3]~q ))) # (\HID_Register[2]~input_o & (((!\HID_Register[1]~input_o ) # +// (\REGS|regs[15][3]~q )))) ) ) ) # ( !\REGS|regs[11][3]~q & ( \REGS|regs[13][3]~q & ( (!\HID_Register[2]~input_o & (\REGS|regs[9][3]~q & (!\HID_Register[1]~input_o ))) # (\HID_Register[2]~input_o & (((!\HID_Register[1]~input_o ) # (\REGS|regs[15][3]~q +// )))) ) ) ) # ( \REGS|regs[11][3]~q & ( !\REGS|regs[13][3]~q & ( (!\HID_Register[2]~input_o & (((\HID_Register[1]~input_o )) # (\REGS|regs[9][3]~q ))) # (\HID_Register[2]~input_o & (((\HID_Register[1]~input_o & \REGS|regs[15][3]~q )))) ) ) ) # ( +// !\REGS|regs[11][3]~q & ( !\REGS|regs[13][3]~q & ( (!\HID_Register[2]~input_o & (\REGS|regs[9][3]~q & (!\HID_Register[1]~input_o ))) # (\HID_Register[2]~input_o & (((\HID_Register[1]~input_o & \REGS|regs[15][3]~q )))) ) ) ) + + .dataa(!\HID_Register[2]~input_o ), + .datab(!\REGS|regs[9][3]~q ), + .datac(!\HID_Register[1]~input_o ), + .datad(!\REGS|regs[15][3]~q ), + .datae(!\REGS|regs[11][3]~q ), + .dataf(!\REGS|regs[13][3]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[3]~77_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[3]~77 .extended_lut = "off"; +defparam \PC_Reg_Display[3]~77 .lut_mask = 64'h20252A2F70757A7F; +defparam \PC_Reg_Display[3]~77 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X41_Y7_N12 +cyclonev_lcell_comb \PC_Reg_Display[3]~80 ( +// Equation(s): +// \PC_Reg_Display[3]~80_combout = ( \PC_Reg_Display[3]~78_combout & ( \PC_Reg_Display[3]~77_combout & ( (!\HID_Hi_Low[0]~input_o & (((\PC_Reg_Display[3]~76_combout ) # (\HID_Register[0]~input_o )))) # (\HID_Hi_Low[0]~input_o & +// (((!\HID_Register[0]~input_o )) # (\PC_Reg_Display[3]~79_combout ))) ) ) ) # ( !\PC_Reg_Display[3]~78_combout & ( \PC_Reg_Display[3]~77_combout & ( (!\HID_Hi_Low[0]~input_o & (((\PC_Reg_Display[3]~76_combout ) # (\HID_Register[0]~input_o )))) # +// (\HID_Hi_Low[0]~input_o & (\PC_Reg_Display[3]~79_combout & (\HID_Register[0]~input_o ))) ) ) ) # ( \PC_Reg_Display[3]~78_combout & ( !\PC_Reg_Display[3]~77_combout & ( (!\HID_Hi_Low[0]~input_o & (((!\HID_Register[0]~input_o & +// \PC_Reg_Display[3]~76_combout )))) # (\HID_Hi_Low[0]~input_o & (((!\HID_Register[0]~input_o )) # (\PC_Reg_Display[3]~79_combout ))) ) ) ) # ( !\PC_Reg_Display[3]~78_combout & ( !\PC_Reg_Display[3]~77_combout & ( (!\HID_Hi_Low[0]~input_o & +// (((!\HID_Register[0]~input_o & \PC_Reg_Display[3]~76_combout )))) # (\HID_Hi_Low[0]~input_o & (\PC_Reg_Display[3]~79_combout & (\HID_Register[0]~input_o ))) ) ) ) + + .dataa(!\HID_Hi_Low[0]~input_o ), + .datab(!\PC_Reg_Display[3]~79_combout ), + .datac(!\HID_Register[0]~input_o ), + .datad(!\PC_Reg_Display[3]~76_combout ), + .datae(!\PC_Reg_Display[3]~78_combout ), + .dataf(!\PC_Reg_Display[3]~77_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[3]~80_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[3]~80 .extended_lut = "off"; +defparam \PC_Reg_Display[3]~80 .lut_mask = 64'h01A151F10BAB5BFB; +defparam \PC_Reg_Display[3]~80 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X40_Y7_N20 +dffeas \REGS|regs[29][3]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[3]~347_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~17_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[29][3]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[29][3]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[29][3]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y11_N0 +cyclonev_lcell_comb \PC_Reg_Display[3]~82 ( +// Equation(s): +// \PC_Reg_Display[3]~82_combout = ( \REGS|regs[29][3]~DUPLICATE_q & ( \REGS|regs[31][3]~q & ( ((!\HID_Register[1]~input_o & (\REGS|regs[25][3]~q )) # (\HID_Register[1]~input_o & ((\REGS|regs[27][3]~q )))) # (\HID_Register[2]~input_o ) ) ) ) # ( +// !\REGS|regs[29][3]~DUPLICATE_q & ( \REGS|regs[31][3]~q & ( (!\HID_Register[2]~input_o & ((!\HID_Register[1]~input_o & (\REGS|regs[25][3]~q )) # (\HID_Register[1]~input_o & ((\REGS|regs[27][3]~q ))))) # (\HID_Register[2]~input_o & +// (((\HID_Register[1]~input_o )))) ) ) ) # ( \REGS|regs[29][3]~DUPLICATE_q & ( !\REGS|regs[31][3]~q & ( (!\HID_Register[2]~input_o & ((!\HID_Register[1]~input_o & (\REGS|regs[25][3]~q )) # (\HID_Register[1]~input_o & ((\REGS|regs[27][3]~q ))))) # +// (\HID_Register[2]~input_o & (((!\HID_Register[1]~input_o )))) ) ) ) # ( !\REGS|regs[29][3]~DUPLICATE_q & ( !\REGS|regs[31][3]~q & ( (!\HID_Register[2]~input_o & ((!\HID_Register[1]~input_o & (\REGS|regs[25][3]~q )) # (\HID_Register[1]~input_o & +// ((\REGS|regs[27][3]~q ))))) ) ) ) + + .dataa(!\REGS|regs[25][3]~q ), + .datab(!\HID_Register[2]~input_o ), + .datac(!\HID_Register[1]~input_o ), + .datad(!\REGS|regs[27][3]~q ), + .datae(!\REGS|regs[29][3]~DUPLICATE_q ), + .dataf(!\REGS|regs[31][3]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[3]~82_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[3]~82 .extended_lut = "off"; +defparam \PC_Reg_Display[3]~82 .lut_mask = 64'h404C707C434F737F; +defparam \PC_Reg_Display[3]~82 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X38_Y5_N13 +dffeas \REGS|regs[30][19]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[19]~261_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~10_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[30][19]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[30][19]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[30][19]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X40_Y6_N54 +cyclonev_lcell_comb \PC_Reg_Display[3]~83 ( +// Equation(s): +// \PC_Reg_Display[3]~83_combout = ( \REGS|regs[28][19]~q & ( \HID_Register[1]~input_o & ( (!\HID_Register[2]~input_o & (\REGS|regs[26][19]~q )) # (\HID_Register[2]~input_o & ((\REGS|regs[30][19]~DUPLICATE_q ))) ) ) ) # ( !\REGS|regs[28][19]~q & ( +// \HID_Register[1]~input_o & ( (!\HID_Register[2]~input_o & (\REGS|regs[26][19]~q )) # (\HID_Register[2]~input_o & ((\REGS|regs[30][19]~DUPLICATE_q ))) ) ) ) # ( \REGS|regs[28][19]~q & ( !\HID_Register[1]~input_o & ( (\REGS|regs[24][19]~q ) # +// (\HID_Register[2]~input_o ) ) ) ) # ( !\REGS|regs[28][19]~q & ( !\HID_Register[1]~input_o & ( (!\HID_Register[2]~input_o & \REGS|regs[24][19]~q ) ) ) ) + + .dataa(!\HID_Register[2]~input_o ), + .datab(!\REGS|regs[24][19]~q ), + .datac(!\REGS|regs[26][19]~q ), + .datad(!\REGS|regs[30][19]~DUPLICATE_q ), + .datae(!\REGS|regs[28][19]~q ), + .dataf(!\HID_Register[1]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[3]~83_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[3]~83 .extended_lut = "off"; +defparam \PC_Reg_Display[3]~83 .lut_mask = 64'h222277770A5F0A5F; +defparam \PC_Reg_Display[3]~83 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X35_Y9_N16 +dffeas \REGS|regs[30][3]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[3]~347_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~10_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[30][3]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[30][3]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[30][3]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X40_Y11_N0 +cyclonev_lcell_comb \PC_Reg_Display[3]~81 ( +// Equation(s): +// \PC_Reg_Display[3]~81_combout = ( \REGS|regs[28][3]~q & ( \HID_Register[1]~input_o & ( (!\HID_Register[2]~input_o & ((\REGS|regs[26][3]~q ))) # (\HID_Register[2]~input_o & (\REGS|regs[30][3]~DUPLICATE_q )) ) ) ) # ( !\REGS|regs[28][3]~q & ( +// \HID_Register[1]~input_o & ( (!\HID_Register[2]~input_o & ((\REGS|regs[26][3]~q ))) # (\HID_Register[2]~input_o & (\REGS|regs[30][3]~DUPLICATE_q )) ) ) ) # ( \REGS|regs[28][3]~q & ( !\HID_Register[1]~input_o & ( (\HID_Register[2]~input_o ) # +// (\REGS|regs[24][3]~q ) ) ) ) # ( !\REGS|regs[28][3]~q & ( !\HID_Register[1]~input_o & ( (\REGS|regs[24][3]~q & !\HID_Register[2]~input_o ) ) ) ) + + .dataa(!\REGS|regs[30][3]~DUPLICATE_q ), + .datab(!\REGS|regs[26][3]~q ), + .datac(!\REGS|regs[24][3]~q ), + .datad(!\HID_Register[2]~input_o ), + .datae(!\REGS|regs[28][3]~q ), + .dataf(!\HID_Register[1]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[3]~81_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[3]~81 .extended_lut = "off"; +defparam \PC_Reg_Display[3]~81 .lut_mask = 64'h0F000FFF33553355; +defparam \PC_Reg_Display[3]~81 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X41_Y6_N58 +dffeas \REGS|regs[27][19] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[19]~261_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~15_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[27][19]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[27][19] .is_wysiwyg = "true"; +defparam \REGS|regs[27][19] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X42_Y6_N1 +dffeas \REGS|regs[25][19] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[19]~261_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~13_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[25][19]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[25][19] .is_wysiwyg = "true"; +defparam \REGS|regs[25][19] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X41_Y5_N21 +cyclonev_lcell_comb \PC_Reg_Display[3]~84 ( +// Equation(s): +// \PC_Reg_Display[3]~84_combout = ( \REGS|regs[25][19]~q & ( \HID_Register[2]~input_o & ( (!\HID_Register[1]~input_o & ((\REGS|regs[29][19]~q ))) # (\HID_Register[1]~input_o & (\REGS|regs[31][19]~q )) ) ) ) # ( !\REGS|regs[25][19]~q & ( +// \HID_Register[2]~input_o & ( (!\HID_Register[1]~input_o & ((\REGS|regs[29][19]~q ))) # (\HID_Register[1]~input_o & (\REGS|regs[31][19]~q )) ) ) ) # ( \REGS|regs[25][19]~q & ( !\HID_Register[2]~input_o & ( (!\HID_Register[1]~input_o ) # +// (\REGS|regs[27][19]~q ) ) ) ) # ( !\REGS|regs[25][19]~q & ( !\HID_Register[2]~input_o & ( (\REGS|regs[27][19]~q & \HID_Register[1]~input_o ) ) ) ) + + .dataa(!\REGS|regs[31][19]~q ), + .datab(!\REGS|regs[27][19]~q ), + .datac(!\REGS|regs[29][19]~q ), + .datad(!\HID_Register[1]~input_o ), + .datae(!\REGS|regs[25][19]~q ), + .dataf(!\HID_Register[2]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[3]~84_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[3]~84 .extended_lut = "off"; +defparam \PC_Reg_Display[3]~84 .lut_mask = 64'h0033FF330F550F55; +defparam \PC_Reg_Display[3]~84 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X40_Y11_N54 +cyclonev_lcell_comb \PC_Reg_Display[3]~85 ( +// Equation(s): +// \PC_Reg_Display[3]~85_combout = ( \HID_Register[0]~input_o & ( \HID_Hi_Low[0]~input_o & ( \PC_Reg_Display[3]~84_combout ) ) ) # ( !\HID_Register[0]~input_o & ( \HID_Hi_Low[0]~input_o & ( \PC_Reg_Display[3]~83_combout ) ) ) # ( +// \HID_Register[0]~input_o & ( !\HID_Hi_Low[0]~input_o & ( \PC_Reg_Display[3]~82_combout ) ) ) # ( !\HID_Register[0]~input_o & ( !\HID_Hi_Low[0]~input_o & ( \PC_Reg_Display[3]~81_combout ) ) ) + + .dataa(!\PC_Reg_Display[3]~82_combout ), + .datab(!\PC_Reg_Display[3]~83_combout ), + .datac(!\PC_Reg_Display[3]~81_combout ), + .datad(!\PC_Reg_Display[3]~84_combout ), + .datae(!\HID_Register[0]~input_o ), + .dataf(!\HID_Hi_Low[0]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[3]~85_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[3]~85 .extended_lut = "off"; +defparam \PC_Reg_Display[3]~85 .lut_mask = 64'h0F0F5555333300FF; +defparam \PC_Reg_Display[3]~85 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X41_Y6_N13 +dffeas \REGS|regs[19][19] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[19]~261_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~14_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[19][19]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[19][19] .is_wysiwyg = "true"; +defparam \REGS|regs[19][19] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X41_Y8_N46 +dffeas \REGS|regs[23][19] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[19]~261_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~18_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[23][19]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[23][19] .is_wysiwyg = "true"; +defparam \REGS|regs[23][19] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X38_Y6_N11 +dffeas \REGS|regs[17][19] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[19]~261_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~11_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[17][19]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[17][19] .is_wysiwyg = "true"; +defparam \REGS|regs[17][19] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X38_Y6_N26 +dffeas \REGS|regs[21][19] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[19]~261_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~16_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[21][19]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[21][19] .is_wysiwyg = "true"; +defparam \REGS|regs[21][19] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X38_Y6_N24 +cyclonev_lcell_comb \PC_Reg_Display[3]~74 ( +// Equation(s): +// \PC_Reg_Display[3]~74_combout = ( \REGS|regs[21][19]~q & ( \HID_Register[2]~input_o & ( (!\HID_Register[1]~input_o ) # (\REGS|regs[23][19]~q ) ) ) ) # ( !\REGS|regs[21][19]~q & ( \HID_Register[2]~input_o & ( (\REGS|regs[23][19]~q & +// \HID_Register[1]~input_o ) ) ) ) # ( \REGS|regs[21][19]~q & ( !\HID_Register[2]~input_o & ( (!\HID_Register[1]~input_o & ((\REGS|regs[17][19]~q ))) # (\HID_Register[1]~input_o & (\REGS|regs[19][19]~q )) ) ) ) # ( !\REGS|regs[21][19]~q & ( +// !\HID_Register[2]~input_o & ( (!\HID_Register[1]~input_o & ((\REGS|regs[17][19]~q ))) # (\HID_Register[1]~input_o & (\REGS|regs[19][19]~q )) ) ) ) + + .dataa(!\REGS|regs[19][19]~q ), + .datab(!\REGS|regs[23][19]~q ), + .datac(!\HID_Register[1]~input_o ), + .datad(!\REGS|regs[17][19]~q ), + .datae(!\REGS|regs[21][19]~q ), + .dataf(!\HID_Register[2]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[3]~74_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[3]~74 .extended_lut = "off"; +defparam \PC_Reg_Display[3]~74 .lut_mask = 64'h05F505F50303F3F3; +defparam \PC_Reg_Display[3]~74 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X41_Y8_N34 +dffeas \REGS|regs[23][3]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[23][3]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~18_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[23][3]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[23][3]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[23][3]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: FF_X38_Y6_N55 +dffeas \REGS|regs[21][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[3]~347_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~16_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[21][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[21][3] .is_wysiwyg = "true"; +defparam \REGS|regs[21][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X38_Y6_N17 +dffeas \REGS|regs[17][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[3]~347_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~11_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[17][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[17][3] .is_wysiwyg = "true"; +defparam \REGS|regs[17][3] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X38_Y6_N0 +cyclonev_lcell_comb \PC_Reg_Display[3]~72 ( +// Equation(s): +// \PC_Reg_Display[3]~72_combout = ( \REGS|regs[19][3]~q & ( \REGS|regs[17][3]~q & ( (!\HID_Register[2]~input_o ) # ((!\HID_Register[1]~input_o & ((\REGS|regs[21][3]~q ))) # (\HID_Register[1]~input_o & (\REGS|regs[23][3]~DUPLICATE_q ))) ) ) ) # ( +// !\REGS|regs[19][3]~q & ( \REGS|regs[17][3]~q & ( (!\HID_Register[2]~input_o & (((!\HID_Register[1]~input_o )))) # (\HID_Register[2]~input_o & ((!\HID_Register[1]~input_o & ((\REGS|regs[21][3]~q ))) # (\HID_Register[1]~input_o & +// (\REGS|regs[23][3]~DUPLICATE_q )))) ) ) ) # ( \REGS|regs[19][3]~q & ( !\REGS|regs[17][3]~q & ( (!\HID_Register[2]~input_o & (((\HID_Register[1]~input_o )))) # (\HID_Register[2]~input_o & ((!\HID_Register[1]~input_o & ((\REGS|regs[21][3]~q ))) # +// (\HID_Register[1]~input_o & (\REGS|regs[23][3]~DUPLICATE_q )))) ) ) ) # ( !\REGS|regs[19][3]~q & ( !\REGS|regs[17][3]~q & ( (\HID_Register[2]~input_o & ((!\HID_Register[1]~input_o & ((\REGS|regs[21][3]~q ))) # (\HID_Register[1]~input_o & +// (\REGS|regs[23][3]~DUPLICATE_q )))) ) ) ) + + .dataa(!\HID_Register[2]~input_o ), + .datab(!\REGS|regs[23][3]~DUPLICATE_q ), + .datac(!\HID_Register[1]~input_o ), + .datad(!\REGS|regs[21][3]~q ), + .datae(!\REGS|regs[19][3]~q ), + .dataf(!\REGS|regs[17][3]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[3]~72_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[3]~72 .extended_lut = "off"; +defparam \PC_Reg_Display[3]~72 .lut_mask = 64'h01510B5BA1F1ABFB; +defparam \PC_Reg_Display[3]~72 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y7_N48 +cyclonev_lcell_comb \PC_Reg_Display[3]~71 ( +// Equation(s): +// \PC_Reg_Display[3]~71_combout = ( \HID_Register[2]~input_o & ( \REGS|regs[18][3]~q & ( (!\HID_Register[1]~input_o & (\REGS|regs[20][3]~q )) # (\HID_Register[1]~input_o & ((\REGS|regs[22][3]~q ))) ) ) ) # ( !\HID_Register[2]~input_o & ( +// \REGS|regs[18][3]~q & ( (\HID_Register[1]~input_o ) # (\REGS|regs[16][3]~q ) ) ) ) # ( \HID_Register[2]~input_o & ( !\REGS|regs[18][3]~q & ( (!\HID_Register[1]~input_o & (\REGS|regs[20][3]~q )) # (\HID_Register[1]~input_o & ((\REGS|regs[22][3]~q ))) +// ) ) ) # ( !\HID_Register[2]~input_o & ( !\REGS|regs[18][3]~q & ( (\REGS|regs[16][3]~q & !\HID_Register[1]~input_o ) ) ) ) + + .dataa(!\REGS|regs[16][3]~q ), + .datab(!\REGS|regs[20][3]~q ), + .datac(!\HID_Register[1]~input_o ), + .datad(!\REGS|regs[22][3]~q ), + .datae(!\HID_Register[2]~input_o ), + .dataf(!\REGS|regs[18][3]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[3]~71_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[3]~71 .extended_lut = "off"; +defparam \PC_Reg_Display[3]~71 .lut_mask = 64'h5050303F5F5F303F; +defparam \PC_Reg_Display[3]~71 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X41_Y5_N0 +cyclonev_lcell_comb \PC_Reg_Display[3]~73 ( +// Equation(s): +// \PC_Reg_Display[3]~73_combout = ( \REGS|regs[22][19]~q & ( \REGS|regs[16][19]~q & ( (!\HID_Register[1]~input_o & ((!\HID_Register[2]~input_o ) # ((\REGS|regs[20][19]~q )))) # (\HID_Register[1]~input_o & (((\REGS|regs[18][19]~q )) # +// (\HID_Register[2]~input_o ))) ) ) ) # ( !\REGS|regs[22][19]~q & ( \REGS|regs[16][19]~q & ( (!\HID_Register[1]~input_o & ((!\HID_Register[2]~input_o ) # ((\REGS|regs[20][19]~q )))) # (\HID_Register[1]~input_o & (!\HID_Register[2]~input_o & +// (\REGS|regs[18][19]~q ))) ) ) ) # ( \REGS|regs[22][19]~q & ( !\REGS|regs[16][19]~q & ( (!\HID_Register[1]~input_o & (\HID_Register[2]~input_o & ((\REGS|regs[20][19]~q )))) # (\HID_Register[1]~input_o & (((\REGS|regs[18][19]~q )) # +// (\HID_Register[2]~input_o ))) ) ) ) # ( !\REGS|regs[22][19]~q & ( !\REGS|regs[16][19]~q & ( (!\HID_Register[1]~input_o & (\HID_Register[2]~input_o & ((\REGS|regs[20][19]~q )))) # (\HID_Register[1]~input_o & (!\HID_Register[2]~input_o & +// (\REGS|regs[18][19]~q ))) ) ) ) + + .dataa(!\HID_Register[1]~input_o ), + .datab(!\HID_Register[2]~input_o ), + .datac(!\REGS|regs[18][19]~q ), + .datad(!\REGS|regs[20][19]~q ), + .datae(!\REGS|regs[22][19]~q ), + .dataf(!\REGS|regs[16][19]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[3]~73_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[3]~73 .extended_lut = "off"; +defparam \PC_Reg_Display[3]~73 .lut_mask = 64'h042615378CAE9DBF; +defparam \PC_Reg_Display[3]~73 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X40_Y4_N54 +cyclonev_lcell_comb \PC_Reg_Display[3]~75 ( +// Equation(s): +// \PC_Reg_Display[3]~75_combout = ( \PC_Reg_Display[3]~71_combout & ( \PC_Reg_Display[3]~73_combout & ( (!\HID_Register[0]~input_o ) # ((!\HID_Hi_Low[0]~input_o & ((\PC_Reg_Display[3]~72_combout ))) # (\HID_Hi_Low[0]~input_o & +// (\PC_Reg_Display[3]~74_combout ))) ) ) ) # ( !\PC_Reg_Display[3]~71_combout & ( \PC_Reg_Display[3]~73_combout & ( (!\HID_Register[0]~input_o & (\HID_Hi_Low[0]~input_o )) # (\HID_Register[0]~input_o & ((!\HID_Hi_Low[0]~input_o & +// ((\PC_Reg_Display[3]~72_combout ))) # (\HID_Hi_Low[0]~input_o & (\PC_Reg_Display[3]~74_combout )))) ) ) ) # ( \PC_Reg_Display[3]~71_combout & ( !\PC_Reg_Display[3]~73_combout & ( (!\HID_Register[0]~input_o & (!\HID_Hi_Low[0]~input_o )) # +// (\HID_Register[0]~input_o & ((!\HID_Hi_Low[0]~input_o & ((\PC_Reg_Display[3]~72_combout ))) # (\HID_Hi_Low[0]~input_o & (\PC_Reg_Display[3]~74_combout )))) ) ) ) # ( !\PC_Reg_Display[3]~71_combout & ( !\PC_Reg_Display[3]~73_combout & ( +// (\HID_Register[0]~input_o & ((!\HID_Hi_Low[0]~input_o & ((\PC_Reg_Display[3]~72_combout ))) # (\HID_Hi_Low[0]~input_o & (\PC_Reg_Display[3]~74_combout )))) ) ) ) + + .dataa(!\HID_Register[0]~input_o ), + .datab(!\HID_Hi_Low[0]~input_o ), + .datac(!\PC_Reg_Display[3]~74_combout ), + .datad(!\PC_Reg_Display[3]~72_combout ), + .datae(!\PC_Reg_Display[3]~71_combout ), + .dataf(!\PC_Reg_Display[3]~73_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[3]~75_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[3]~75 .extended_lut = "off"; +defparam \PC_Reg_Display[3]~75 .lut_mask = 64'h014589CD2367ABEF; +defparam \PC_Reg_Display[3]~75 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X41_Y4_N39 +cyclonev_lcell_comb \PC_Reg_Display[3]~66 ( +// Equation(s): +// \PC_Reg_Display[3]~66_combout = ( \REGS|regs[1][3]~q & ( \HID_Hi_Low[0]~input_o & ( (\REGS|regs[1][19]~q & \HID_Register[0]~input_o ) ) ) ) # ( !\REGS|regs[1][3]~q & ( \HID_Hi_Low[0]~input_o & ( (\REGS|regs[1][19]~q & \HID_Register[0]~input_o ) ) ) +// ) # ( \REGS|regs[1][3]~q & ( !\HID_Hi_Low[0]~input_o & ( \HID_Register[0]~input_o ) ) ) + + .dataa(gnd), + .datab(!\REGS|regs[1][19]~q ), + .datac(gnd), + .datad(!\HID_Register[0]~input_o ), + .datae(!\REGS|regs[1][3]~q ), + .dataf(!\HID_Hi_Low[0]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[3]~66_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[3]~66 .extended_lut = "off"; +defparam \PC_Reg_Display[3]~66 .lut_mask = 64'h000000FF00330033; +defparam \PC_Reg_Display[3]~66 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X41_Y4_N2 +dffeas \REGS|regs[7][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[3]~347_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~38_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[7][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[7][3] .is_wysiwyg = "true"; +defparam \REGS|regs[7][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X41_Y4_N5 +dffeas \REGS|regs[7][19] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[19]~261_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~38_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[7][19]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[7][19] .is_wysiwyg = "true"; +defparam \REGS|regs[7][19] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X41_Y4_N3 +cyclonev_lcell_comb \PC_Reg_Display[3]~69 ( +// Equation(s): +// \PC_Reg_Display[3]~69_combout = ( \REGS|regs[7][19]~q & ( \REGS|regs[6][19]~q & ( ((!\HID_Register[0]~input_o & ((\REGS|regs[6][3]~q ))) # (\HID_Register[0]~input_o & (\REGS|regs[7][3]~q ))) # (\HID_Hi_Low[0]~input_o ) ) ) ) # ( !\REGS|regs[7][19]~q +// & ( \REGS|regs[6][19]~q & ( (!\HID_Register[0]~input_o & (((\HID_Hi_Low[0]~input_o ) # (\REGS|regs[6][3]~q )))) # (\HID_Register[0]~input_o & (\REGS|regs[7][3]~q & ((!\HID_Hi_Low[0]~input_o )))) ) ) ) # ( \REGS|regs[7][19]~q & ( !\REGS|regs[6][19]~q +// & ( (!\HID_Register[0]~input_o & (((\REGS|regs[6][3]~q & !\HID_Hi_Low[0]~input_o )))) # (\HID_Register[0]~input_o & (((\HID_Hi_Low[0]~input_o )) # (\REGS|regs[7][3]~q ))) ) ) ) # ( !\REGS|regs[7][19]~q & ( !\REGS|regs[6][19]~q & ( +// (!\HID_Hi_Low[0]~input_o & ((!\HID_Register[0]~input_o & ((\REGS|regs[6][3]~q ))) # (\HID_Register[0]~input_o & (\REGS|regs[7][3]~q )))) ) ) ) + + .dataa(!\REGS|regs[7][3]~q ), + .datab(!\REGS|regs[6][3]~q ), + .datac(!\HID_Register[0]~input_o ), + .datad(!\HID_Hi_Low[0]~input_o ), + .datae(!\REGS|regs[7][19]~q ), + .dataf(!\REGS|regs[6][19]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[3]~69_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[3]~69 .extended_lut = "off"; +defparam \PC_Reg_Display[3]~69 .lut_mask = 64'h3500350F35F035FF; +defparam \PC_Reg_Display[3]~69 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X41_Y4_N56 +dffeas \REGS|regs[3][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[3]~347_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~36_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[3][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[3][3] .is_wysiwyg = "true"; +defparam \REGS|regs[3][3] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X41_Y4_N59 +dffeas \REGS|regs[3][19] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[19]~261_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~36_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[3][19]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[3][19] .is_wysiwyg = "true"; +defparam \REGS|regs[3][19] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X41_Y4_N57 +cyclonev_lcell_comb \PC_Reg_Display[3]~67 ( +// Equation(s): +// \PC_Reg_Display[3]~67_combout = ( \REGS|regs[3][19]~q & ( \REGS|regs[2][3]~q & ( (!\HID_Register[0]~input_o & (((!\HID_Hi_Low[0]~input_o ) # (\REGS|regs[2][19]~q )))) # (\HID_Register[0]~input_o & (((\HID_Hi_Low[0]~input_o )) # (\REGS|regs[3][3]~q +// ))) ) ) ) # ( !\REGS|regs[3][19]~q & ( \REGS|regs[2][3]~q & ( (!\HID_Register[0]~input_o & (((!\HID_Hi_Low[0]~input_o ) # (\REGS|regs[2][19]~q )))) # (\HID_Register[0]~input_o & (\REGS|regs[3][3]~q & ((!\HID_Hi_Low[0]~input_o )))) ) ) ) # ( +// \REGS|regs[3][19]~q & ( !\REGS|regs[2][3]~q & ( (!\HID_Register[0]~input_o & (((\REGS|regs[2][19]~q & \HID_Hi_Low[0]~input_o )))) # (\HID_Register[0]~input_o & (((\HID_Hi_Low[0]~input_o )) # (\REGS|regs[3][3]~q ))) ) ) ) # ( !\REGS|regs[3][19]~q & ( +// !\REGS|regs[2][3]~q & ( (!\HID_Register[0]~input_o & (((\REGS|regs[2][19]~q & \HID_Hi_Low[0]~input_o )))) # (\HID_Register[0]~input_o & (\REGS|regs[3][3]~q & ((!\HID_Hi_Low[0]~input_o )))) ) ) ) + + .dataa(!\REGS|regs[3][3]~q ), + .datab(!\REGS|regs[2][19]~q ), + .datac(!\HID_Register[0]~input_o ), + .datad(!\HID_Hi_Low[0]~input_o ), + .datae(!\REGS|regs[3][19]~q ), + .dataf(!\REGS|regs[2][3]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[3]~67_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[3]~67 .extended_lut = "off"; +defparam \PC_Reg_Display[3]~67 .lut_mask = 64'h0530053FF530F53F; +defparam \PC_Reg_Display[3]~67 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X40_Y8_N49 +dffeas \REGS|regs[4][3] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[3]~347_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~22_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[4][3]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[4][3] .is_wysiwyg = "true"; +defparam \REGS|regs[4][3] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X41_Y8_N24 +cyclonev_lcell_comb \PC_Reg_Display[3]~68 ( +// Equation(s): +// \PC_Reg_Display[3]~68_combout = ( \REGS|regs[4][3]~q & ( \HID_Register[0]~input_o & ( (!\HID_Hi_Low[0]~input_o & (\REGS|regs[5][3]~q )) # (\HID_Hi_Low[0]~input_o & ((\REGS|regs[5][19]~q ))) ) ) ) # ( !\REGS|regs[4][3]~q & ( \HID_Register[0]~input_o +// & ( (!\HID_Hi_Low[0]~input_o & (\REGS|regs[5][3]~q )) # (\HID_Hi_Low[0]~input_o & ((\REGS|regs[5][19]~q ))) ) ) ) # ( \REGS|regs[4][3]~q & ( !\HID_Register[0]~input_o & ( (!\HID_Hi_Low[0]~input_o ) # (\REGS|regs[4][19]~q ) ) ) ) # ( +// !\REGS|regs[4][3]~q & ( !\HID_Register[0]~input_o & ( (\HID_Hi_Low[0]~input_o & \REGS|regs[4][19]~q ) ) ) ) + + .dataa(!\HID_Hi_Low[0]~input_o ), + .datab(!\REGS|regs[5][3]~q ), + .datac(!\REGS|regs[5][19]~q ), + .datad(!\REGS|regs[4][19]~q ), + .datae(!\REGS|regs[4][3]~q ), + .dataf(!\HID_Register[0]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[3]~68_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[3]~68 .extended_lut = "off"; +defparam \PC_Reg_Display[3]~68 .lut_mask = 64'h0055AAFF27272727; +defparam \PC_Reg_Display[3]~68 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X41_Y4_N42 +cyclonev_lcell_comb \PC_Reg_Display[3]~70 ( +// Equation(s): +// \PC_Reg_Display[3]~70_combout = ( \HID_Register[1]~input_o & ( \PC_Reg_Display[3]~68_combout & ( (!\HID_Register[2]~input_o & ((\PC_Reg_Display[3]~67_combout ))) # (\HID_Register[2]~input_o & (\PC_Reg_Display[3]~69_combout )) ) ) ) # ( +// !\HID_Register[1]~input_o & ( \PC_Reg_Display[3]~68_combout & ( (\PC_Reg_Display[3]~66_combout ) # (\HID_Register[2]~input_o ) ) ) ) # ( \HID_Register[1]~input_o & ( !\PC_Reg_Display[3]~68_combout & ( (!\HID_Register[2]~input_o & +// ((\PC_Reg_Display[3]~67_combout ))) # (\HID_Register[2]~input_o & (\PC_Reg_Display[3]~69_combout )) ) ) ) # ( !\HID_Register[1]~input_o & ( !\PC_Reg_Display[3]~68_combout & ( (!\HID_Register[2]~input_o & \PC_Reg_Display[3]~66_combout ) ) ) ) + + .dataa(!\HID_Register[2]~input_o ), + .datab(!\PC_Reg_Display[3]~66_combout ), + .datac(!\PC_Reg_Display[3]~69_combout ), + .datad(!\PC_Reg_Display[3]~67_combout ), + .datae(!\HID_Register[1]~input_o ), + .dataf(!\PC_Reg_Display[3]~68_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[3]~70_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[3]~70 .extended_lut = "off"; +defparam \PC_Reg_Display[3]~70 .lut_mask = 64'h222205AF777705AF; +defparam \PC_Reg_Display[3]~70 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X40_Y5_N42 +cyclonev_lcell_comb \PC_Reg_Display[3]~86 ( +// Equation(s): +// \PC_Reg_Display[3]~86_combout = ( \PC_Reg_Display[3]~75_combout & ( \PC_Reg_Display[3]~70_combout & ( (!\HID_Register[3]~input_o ) # ((!\HID_Register[4]~input_o & (\PC_Reg_Display[3]~80_combout )) # (\HID_Register[4]~input_o & +// ((\PC_Reg_Display[3]~85_combout )))) ) ) ) # ( !\PC_Reg_Display[3]~75_combout & ( \PC_Reg_Display[3]~70_combout & ( (!\HID_Register[3]~input_o & (((!\HID_Register[4]~input_o )))) # (\HID_Register[3]~input_o & ((!\HID_Register[4]~input_o & +// (\PC_Reg_Display[3]~80_combout )) # (\HID_Register[4]~input_o & ((\PC_Reg_Display[3]~85_combout ))))) ) ) ) # ( \PC_Reg_Display[3]~75_combout & ( !\PC_Reg_Display[3]~70_combout & ( (!\HID_Register[3]~input_o & (((\HID_Register[4]~input_o )))) # +// (\HID_Register[3]~input_o & ((!\HID_Register[4]~input_o & (\PC_Reg_Display[3]~80_combout )) # (\HID_Register[4]~input_o & ((\PC_Reg_Display[3]~85_combout ))))) ) ) ) # ( !\PC_Reg_Display[3]~75_combout & ( !\PC_Reg_Display[3]~70_combout & ( +// (\HID_Register[3]~input_o & ((!\HID_Register[4]~input_o & (\PC_Reg_Display[3]~80_combout )) # (\HID_Register[4]~input_o & ((\PC_Reg_Display[3]~85_combout ))))) ) ) ) + + .dataa(!\PC_Reg_Display[3]~80_combout ), + .datab(!\HID_Register[3]~input_o ), + .datac(!\HID_Register[4]~input_o ), + .datad(!\PC_Reg_Display[3]~85_combout ), + .datae(!\PC_Reg_Display[3]~75_combout ), + .dataf(!\PC_Reg_Display[3]~70_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[3]~86_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[3]~86 .extended_lut = "off"; +defparam \PC_Reg_Display[3]~86 .lut_mask = 64'h10131C1FD0D3DCDF; +defparam \PC_Reg_Display[3]~86 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X36_Y8_N53 +dffeas \PC|pc[19]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\Add0~17_sumout ), + .asdata(vcc), + .clrn(!\rst[0]~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\PC|pc[19]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \PC|pc[19]~DUPLICATE .is_wysiwyg = "true"; +defparam \PC|pc[19]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X36_Y8_N45 +cyclonev_lcell_comb \Add0~5 ( +// Equation(s): +// \Add0~5_sumout = SUM(( \PC|pc[17]~DUPLICATE_q ) + ( (!\PC|pc [8] & (!\PC|pc [9] & (pc_we[0] & \ROM|mem~18_combout ))) ) + ( \Add0~2 )) +// \Add0~6 = CARRY(( \PC|pc[17]~DUPLICATE_q ) + ( (!\PC|pc [8] & (!\PC|pc [9] & (pc_we[0] & \ROM|mem~18_combout ))) ) + ( \Add0~2 )) + + .dataa(!\PC|pc [8]), + .datab(!\PC|pc [9]), + .datac(!pc_we[0]), + .datad(!\PC|pc[17]~DUPLICATE_q ), + .datae(gnd), + .dataf(!\ROM|mem~18_combout ), + .datag(gnd), + .cin(\Add0~2 ), + .sharein(gnd), + .combout(), + .sumout(\Add0~5_sumout ), + .cout(\Add0~6 ), + .shareout()); +// synopsys translate_off +defparam \Add0~5 .extended_lut = "off"; +defparam \Add0~5 .lut_mask = 64'h0000FFF7000000FF; +defparam \Add0~5 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X36_Y8_N47 +dffeas \PC|pc[17]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\Add0~5_sumout ), + .asdata(vcc), + .clrn(!\rst[0]~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\PC|pc[17]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \PC|pc[17]~DUPLICATE .is_wysiwyg = "true"; +defparam \PC|pc[17]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X36_Y8_N48 +cyclonev_lcell_comb \Add0~9 ( +// Equation(s): +// \Add0~9_sumout = SUM(( (!\PC|pc [8] & (!\PC|pc [9] & (pc_we[0] & \ROM|mem~6_combout ))) ) + ( \PC|pc [18] ) + ( \Add0~6 )) +// \Add0~10 = CARRY(( (!\PC|pc [8] & (!\PC|pc [9] & (pc_we[0] & \ROM|mem~6_combout ))) ) + ( \PC|pc [18] ) + ( \Add0~6 )) + + .dataa(!\PC|pc [8]), + .datab(!\PC|pc [9]), + .datac(!pc_we[0]), + .datad(!\ROM|mem~6_combout ), + .datae(gnd), + .dataf(!\PC|pc [18]), + .datag(gnd), + .cin(\Add0~6 ), + .sharein(gnd), + .combout(), + .sumout(\Add0~9_sumout ), + .cout(\Add0~10 ), + .shareout()); +// synopsys translate_off +defparam \Add0~9 .extended_lut = "off"; +defparam \Add0~9 .lut_mask = 64'h0000FF0000000008; +defparam \Add0~9 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X36_Y8_N50 +dffeas \PC|pc[18] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\Add0~9_sumout ), + .asdata(vcc), + .clrn(!\rst[0]~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\PC|pc [18]), + .prn(vcc)); +// synopsys translate_off +defparam \PC|pc[18] .is_wysiwyg = "true"; +defparam \PC|pc[18] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X36_Y8_N51 +cyclonev_lcell_comb \Add0~17 ( +// Equation(s): +// \Add0~17_sumout = SUM(( (!\PC|pc [8] & (!\PC|pc [9] & (pc_we[0] & \ROM|mem~6_combout ))) ) + ( \PC|pc[19]~DUPLICATE_q ) + ( \Add0~10 )) +// \Add0~18 = CARRY(( (!\PC|pc [8] & (!\PC|pc [9] & (pc_we[0] & \ROM|mem~6_combout ))) ) + ( \PC|pc[19]~DUPLICATE_q ) + ( \Add0~10 )) + + .dataa(!\PC|pc [8]), + .datab(!\PC|pc [9]), + .datac(!pc_we[0]), + .datad(!\ROM|mem~6_combout ), + .datae(gnd), + .dataf(!\PC|pc[19]~DUPLICATE_q ), + .datag(gnd), + .cin(\Add0~10 ), + .sharein(gnd), + .combout(), + .sumout(\Add0~17_sumout ), + .cout(\Add0~18 ), + .shareout()); +// synopsys translate_off +defparam \Add0~17 .extended_lut = "off"; +defparam \Add0~17 .lut_mask = 64'h0000FF0000000008; +defparam \Add0~17 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X36_Y8_N52 +dffeas \PC|pc[19] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\Add0~17_sumout ), + .asdata(vcc), + .clrn(!\rst[0]~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\PC|pc [19]), + .prn(vcc)); +// synopsys translate_off +defparam \PC|pc[19] .is_wysiwyg = "true"; +defparam \PC|pc[19] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y5_N3 +cyclonev_lcell_comb \PC_Reg_Display[3]~87 ( +// Equation(s): +// \PC_Reg_Display[3]~87_combout = ( \PC|pc [19] & ( (!\HID_PC[0]~input_o & (((\PC_Reg_Display[3]~86_combout )))) # (\HID_PC[0]~input_o & (((\PC|pc [3])) # (\HID_Hi_Low[0]~input_o ))) ) ) # ( !\PC|pc [19] & ( (!\HID_PC[0]~input_o & +// (((\PC_Reg_Display[3]~86_combout )))) # (\HID_PC[0]~input_o & (!\HID_Hi_Low[0]~input_o & ((\PC|pc [3])))) ) ) + + .dataa(!\HID_Hi_Low[0]~input_o ), + .datab(!\PC_Reg_Display[3]~86_combout ), + .datac(!\PC|pc [3]), + .datad(!\HID_PC[0]~input_o ), + .datae(gnd), + .dataf(!\PC|pc [19]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[3]~87_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[3]~87 .extended_lut = "off"; +defparam \PC_Reg_Display[3]~87 .lut_mask = 64'h330A330A335F335F; +defparam \PC_Reg_Display[3]~87 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X36_Y10_N30 +cyclonev_lcell_comb \PC_Reg_Display[1]~30 ( +// Equation(s): +// \PC_Reg_Display[1]~30_combout = ( \REGS|regs[23][1]~q & ( \HID_Register[3]~input_o & ( (!\HID_Register[2]~input_o & (\REGS|regs[27][1]~q )) # (\HID_Register[2]~input_o & ((\REGS|regs[31][1]~q ))) ) ) ) # ( !\REGS|regs[23][1]~q & ( +// \HID_Register[3]~input_o & ( (!\HID_Register[2]~input_o & (\REGS|regs[27][1]~q )) # (\HID_Register[2]~input_o & ((\REGS|regs[31][1]~q ))) ) ) ) # ( \REGS|regs[23][1]~q & ( !\HID_Register[3]~input_o & ( (\HID_Register[2]~input_o ) # +// (\REGS|regs[19][1]~q ) ) ) ) # ( !\REGS|regs[23][1]~q & ( !\HID_Register[3]~input_o & ( (\REGS|regs[19][1]~q & !\HID_Register[2]~input_o ) ) ) ) + + .dataa(!\REGS|regs[27][1]~q ), + .datab(!\REGS|regs[19][1]~q ), + .datac(!\REGS|regs[31][1]~q ), + .datad(!\HID_Register[2]~input_o ), + .datae(!\REGS|regs[23][1]~q ), + .dataf(!\HID_Register[3]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[1]~30_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[1]~30 .extended_lut = "off"; +defparam \PC_Reg_Display[1]~30 .lut_mask = 64'h330033FF550F550F; +defparam \PC_Reg_Display[1]~30 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X41_Y5_N36 +cyclonev_lcell_comb \REGS|regs[17][1]~feeder ( +// Equation(s): +// \REGS|regs[17][1]~feeder_combout = ( \rd[1]~173_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[1]~173_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[17][1]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[17][1]~feeder .extended_lut = "off"; +defparam \REGS|regs[17][1]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[17][1]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X41_Y5_N37 +dffeas \REGS|regs[17][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[17][1]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~11_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[17][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[17][1] .is_wysiwyg = "true"; +defparam \REGS|regs[17][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X40_Y9_N44 +dffeas \REGS|regs[21][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[1]~173_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~16_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[21][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[21][1] .is_wysiwyg = "true"; +defparam \REGS|regs[21][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X38_Y10_N1 +dffeas \REGS|regs[29][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[1]~173_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~17_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[29][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[29][1] .is_wysiwyg = "true"; +defparam \REGS|regs[29][1] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X45_Y9_N51 +cyclonev_lcell_comb \PC_Reg_Display[1]~28 ( +// Equation(s): +// \PC_Reg_Display[1]~28_combout = ( \REGS|regs[25][1]~q & ( \HID_Register[3]~input_o & ( (!\HID_Register[2]~input_o ) # (\REGS|regs[29][1]~q ) ) ) ) # ( !\REGS|regs[25][1]~q & ( \HID_Register[3]~input_o & ( (\HID_Register[2]~input_o & +// \REGS|regs[29][1]~q ) ) ) ) # ( \REGS|regs[25][1]~q & ( !\HID_Register[3]~input_o & ( (!\HID_Register[2]~input_o & (\REGS|regs[17][1]~q )) # (\HID_Register[2]~input_o & ((\REGS|regs[21][1]~q ))) ) ) ) # ( !\REGS|regs[25][1]~q & ( +// !\HID_Register[3]~input_o & ( (!\HID_Register[2]~input_o & (\REGS|regs[17][1]~q )) # (\HID_Register[2]~input_o & ((\REGS|regs[21][1]~q ))) ) ) ) + + .dataa(!\HID_Register[2]~input_o ), + .datab(!\REGS|regs[17][1]~q ), + .datac(!\REGS|regs[21][1]~q ), + .datad(!\REGS|regs[29][1]~q ), + .datae(!\REGS|regs[25][1]~q ), + .dataf(!\HID_Register[3]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[1]~28_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[1]~28 .extended_lut = "off"; +defparam \PC_Reg_Display[1]~28 .lut_mask = 64'h272727270055AAFF; +defparam \PC_Reg_Display[1]~28 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X38_Y7_N47 +dffeas \REGS|regs[28][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[1]~173_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~8_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[28][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[28][1] .is_wysiwyg = "true"; +defparam \REGS|regs[28][1] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X38_Y7_N24 +cyclonev_lcell_comb \PC_Reg_Display[1]~27 ( +// Equation(s): +// \PC_Reg_Display[1]~27_combout = ( \REGS|regs[20][1]~q & ( \REGS|regs[16][1]~q & ( (!\HID_Register[3]~input_o ) # ((!\HID_Register[2]~input_o & ((\REGS|regs[24][1]~q ))) # (\HID_Register[2]~input_o & (\REGS|regs[28][1]~q ))) ) ) ) # ( +// !\REGS|regs[20][1]~q & ( \REGS|regs[16][1]~q & ( (!\HID_Register[3]~input_o & (((!\HID_Register[2]~input_o )))) # (\HID_Register[3]~input_o & ((!\HID_Register[2]~input_o & ((\REGS|regs[24][1]~q ))) # (\HID_Register[2]~input_o & (\REGS|regs[28][1]~q +// )))) ) ) ) # ( \REGS|regs[20][1]~q & ( !\REGS|regs[16][1]~q & ( (!\HID_Register[3]~input_o & (((\HID_Register[2]~input_o )))) # (\HID_Register[3]~input_o & ((!\HID_Register[2]~input_o & ((\REGS|regs[24][1]~q ))) # (\HID_Register[2]~input_o & +// (\REGS|regs[28][1]~q )))) ) ) ) # ( !\REGS|regs[20][1]~q & ( !\REGS|regs[16][1]~q & ( (\HID_Register[3]~input_o & ((!\HID_Register[2]~input_o & ((\REGS|regs[24][1]~q ))) # (\HID_Register[2]~input_o & (\REGS|regs[28][1]~q )))) ) ) ) + + .dataa(!\HID_Register[3]~input_o ), + .datab(!\REGS|regs[28][1]~q ), + .datac(!\HID_Register[2]~input_o ), + .datad(!\REGS|regs[24][1]~q ), + .datae(!\REGS|regs[20][1]~q ), + .dataf(!\REGS|regs[16][1]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[1]~27_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[1]~27 .extended_lut = "off"; +defparam \PC_Reg_Display[1]~27 .lut_mask = 64'h01510B5BA1F1ABFB; +defparam \PC_Reg_Display[1]~27 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X35_Y9_N49 +dffeas \REGS|regs[30][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[1]~173_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~10_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[30][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[30][1] .is_wysiwyg = "true"; +defparam \REGS|regs[30][1] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X41_Y5_N42 +cyclonev_lcell_comb \PC_Reg_Display[1]~29 ( +// Equation(s): +// \PC_Reg_Display[1]~29_combout = ( \REGS|regs[22][1]~q & ( \HID_Register[3]~input_o & ( (!\HID_Register[2]~input_o & ((\REGS|regs[26][1]~q ))) # (\HID_Register[2]~input_o & (\REGS|regs[30][1]~q )) ) ) ) # ( !\REGS|regs[22][1]~q & ( +// \HID_Register[3]~input_o & ( (!\HID_Register[2]~input_o & ((\REGS|regs[26][1]~q ))) # (\HID_Register[2]~input_o & (\REGS|regs[30][1]~q )) ) ) ) # ( \REGS|regs[22][1]~q & ( !\HID_Register[3]~input_o & ( (\HID_Register[2]~input_o ) # +// (\REGS|regs[18][1]~q ) ) ) ) # ( !\REGS|regs[22][1]~q & ( !\HID_Register[3]~input_o & ( (\REGS|regs[18][1]~q & !\HID_Register[2]~input_o ) ) ) ) + + .dataa(!\REGS|regs[30][1]~q ), + .datab(!\REGS|regs[26][1]~q ), + .datac(!\REGS|regs[18][1]~q ), + .datad(!\HID_Register[2]~input_o ), + .datae(!\REGS|regs[22][1]~q ), + .dataf(!\HID_Register[3]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[1]~29_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[1]~29 .extended_lut = "off"; +defparam \PC_Reg_Display[1]~29 .lut_mask = 64'h0F000FFF33553355; +defparam \PC_Reg_Display[1]~29 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X40_Y5_N54 +cyclonev_lcell_comb \PC_Reg_Display[1]~31 ( +// Equation(s): +// \PC_Reg_Display[1]~31_combout = ( \PC_Reg_Display[1]~29_combout & ( \HID_Register[0]~input_o & ( (!\HID_Register[1]~input_o & ((\PC_Reg_Display[1]~28_combout ))) # (\HID_Register[1]~input_o & (\PC_Reg_Display[1]~30_combout )) ) ) ) # ( +// !\PC_Reg_Display[1]~29_combout & ( \HID_Register[0]~input_o & ( (!\HID_Register[1]~input_o & ((\PC_Reg_Display[1]~28_combout ))) # (\HID_Register[1]~input_o & (\PC_Reg_Display[1]~30_combout )) ) ) ) # ( \PC_Reg_Display[1]~29_combout & ( +// !\HID_Register[0]~input_o & ( (\PC_Reg_Display[1]~27_combout ) # (\HID_Register[1]~input_o ) ) ) ) # ( !\PC_Reg_Display[1]~29_combout & ( !\HID_Register[0]~input_o & ( (!\HID_Register[1]~input_o & \PC_Reg_Display[1]~27_combout ) ) ) ) + + .dataa(!\PC_Reg_Display[1]~30_combout ), + .datab(!\HID_Register[1]~input_o ), + .datac(!\PC_Reg_Display[1]~28_combout ), + .datad(!\PC_Reg_Display[1]~27_combout ), + .datae(!\PC_Reg_Display[1]~29_combout ), + .dataf(!\HID_Register[0]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[1]~31_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[1]~31 .extended_lut = "off"; +defparam \PC_Reg_Display[1]~31 .lut_mask = 64'h00CC33FF1D1D1D1D; +defparam \PC_Reg_Display[1]~31 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X38_Y8_N31 +dffeas \REGS|regs[31][17] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[17]~87_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~19_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[31][17]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[31][17] .is_wysiwyg = "true"; +defparam \REGS|regs[31][17] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X38_Y3_N14 +dffeas \REGS|regs[21][17] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[17]~87_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~16_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[21][17]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[21][17] .is_wysiwyg = "true"; +defparam \REGS|regs[21][17] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X38_Y3_N12 +cyclonev_lcell_comb \PC_Reg_Display[1]~25 ( +// Equation(s): +// \PC_Reg_Display[1]~25_combout = ( \REGS|regs[21][17]~q & ( \HID_Register[1]~input_o & ( (!\HID_Register[3]~input_o & (\REGS|regs[23][17]~q )) # (\HID_Register[3]~input_o & ((\REGS|regs[31][17]~q ))) ) ) ) # ( !\REGS|regs[21][17]~q & ( +// \HID_Register[1]~input_o & ( (!\HID_Register[3]~input_o & (\REGS|regs[23][17]~q )) # (\HID_Register[3]~input_o & ((\REGS|regs[31][17]~q ))) ) ) ) # ( \REGS|regs[21][17]~q & ( !\HID_Register[1]~input_o & ( (!\HID_Register[3]~input_o ) # +// (\REGS|regs[29][17]~q ) ) ) ) # ( !\REGS|regs[21][17]~q & ( !\HID_Register[1]~input_o & ( (\REGS|regs[29][17]~q & \HID_Register[3]~input_o ) ) ) ) + + .dataa(!\REGS|regs[29][17]~q ), + .datab(!\HID_Register[3]~input_o ), + .datac(!\REGS|regs[23][17]~q ), + .datad(!\REGS|regs[31][17]~q ), + .datae(!\REGS|regs[21][17]~q ), + .dataf(!\HID_Register[1]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[1]~25_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[1]~25 .extended_lut = "off"; +defparam \PC_Reg_Display[1]~25 .lut_mask = 64'h1111DDDD0C3F0C3F; +defparam \PC_Reg_Display[1]~25 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X35_Y12_N25 +dffeas \REGS|regs[16][17] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[17]~87_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~2_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[16][17]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[16][17] .is_wysiwyg = "true"; +defparam \REGS|regs[16][17] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X36_Y4_N53 +dffeas \REGS|regs[26][17]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[26][17]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~6_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[26][17]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[26][17]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[26][17]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: FF_X38_Y3_N8 +dffeas \REGS|regs[24][17] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[17]~87_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~4_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[24][17]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[24][17] .is_wysiwyg = "true"; +defparam \REGS|regs[24][17] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X38_Y3_N6 +cyclonev_lcell_comb \PC_Reg_Display[1]~22 ( +// Equation(s): +// \PC_Reg_Display[1]~22_combout = ( \REGS|regs[24][17]~q & ( \HID_Register[1]~input_o & ( (!\HID_Register[3]~input_o & (\REGS|regs[18][17]~q )) # (\HID_Register[3]~input_o & ((\REGS|regs[26][17]~DUPLICATE_q ))) ) ) ) # ( !\REGS|regs[24][17]~q & ( +// \HID_Register[1]~input_o & ( (!\HID_Register[3]~input_o & (\REGS|regs[18][17]~q )) # (\HID_Register[3]~input_o & ((\REGS|regs[26][17]~DUPLICATE_q ))) ) ) ) # ( \REGS|regs[24][17]~q & ( !\HID_Register[1]~input_o & ( (\HID_Register[3]~input_o ) # +// (\REGS|regs[16][17]~q ) ) ) ) # ( !\REGS|regs[24][17]~q & ( !\HID_Register[1]~input_o & ( (\REGS|regs[16][17]~q & !\HID_Register[3]~input_o ) ) ) ) + + .dataa(!\REGS|regs[16][17]~q ), + .datab(!\HID_Register[3]~input_o ), + .datac(!\REGS|regs[18][17]~q ), + .datad(!\REGS|regs[26][17]~DUPLICATE_q ), + .datae(!\REGS|regs[24][17]~q ), + .dataf(!\HID_Register[1]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[1]~22_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[1]~22 .extended_lut = "off"; +defparam \PC_Reg_Display[1]~22 .lut_mask = 64'h444477770C3F0C3F; +defparam \PC_Reg_Display[1]~22 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X38_Y4_N36 +cyclonev_lcell_comb \PC_Reg_Display[1]~23 ( +// Equation(s): +// \PC_Reg_Display[1]~23_combout = ( \REGS|regs[22][17]~q & ( \REGS|regs[20][17]~q & ( (!\HID_Register[3]~input_o ) # ((!\HID_Register[1]~input_o & ((\REGS|regs[28][17]~q ))) # (\HID_Register[1]~input_o & (\REGS|regs[30][17]~q ))) ) ) ) # ( +// !\REGS|regs[22][17]~q & ( \REGS|regs[20][17]~q & ( (!\HID_Register[3]~input_o & (((!\HID_Register[1]~input_o )))) # (\HID_Register[3]~input_o & ((!\HID_Register[1]~input_o & ((\REGS|regs[28][17]~q ))) # (\HID_Register[1]~input_o & +// (\REGS|regs[30][17]~q )))) ) ) ) # ( \REGS|regs[22][17]~q & ( !\REGS|regs[20][17]~q & ( (!\HID_Register[3]~input_o & (((\HID_Register[1]~input_o )))) # (\HID_Register[3]~input_o & ((!\HID_Register[1]~input_o & ((\REGS|regs[28][17]~q ))) # +// (\HID_Register[1]~input_o & (\REGS|regs[30][17]~q )))) ) ) ) # ( !\REGS|regs[22][17]~q & ( !\REGS|regs[20][17]~q & ( (\HID_Register[3]~input_o & ((!\HID_Register[1]~input_o & ((\REGS|regs[28][17]~q ))) # (\HID_Register[1]~input_o & +// (\REGS|regs[30][17]~q )))) ) ) ) + + .dataa(!\REGS|regs[30][17]~q ), + .datab(!\HID_Register[3]~input_o ), + .datac(!\REGS|regs[28][17]~q ), + .datad(!\HID_Register[1]~input_o ), + .datae(!\REGS|regs[22][17]~q ), + .dataf(!\REGS|regs[20][17]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[1]~23_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[1]~23 .extended_lut = "off"; +defparam \PC_Reg_Display[1]~23 .lut_mask = 64'h031103DDCF11CFDD; +defparam \PC_Reg_Display[1]~23 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X32_Y14_N26 +dffeas \REGS|regs[25][17] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[17]~87_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~13_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[25][17]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[25][17] .is_wysiwyg = "true"; +defparam \REGS|regs[25][17] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X35_Y12_N58 +dffeas \REGS|regs[27][17] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[17]~87_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~15_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[27][17]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[27][17] .is_wysiwyg = "true"; +defparam \REGS|regs[27][17] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X35_Y12_N31 +dffeas \REGS|regs[17][17] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[17]~87_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~11_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[17][17]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[17][17] .is_wysiwyg = "true"; +defparam \REGS|regs[17][17] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y14_N36 +cyclonev_lcell_comb \PC_Reg_Display[1]~24 ( +// Equation(s): +// \PC_Reg_Display[1]~24_combout = ( \HID_Register[1]~input_o & ( \REGS|regs[19][17]~q & ( (!\HID_Register[3]~input_o ) # (\REGS|regs[27][17]~q ) ) ) ) # ( !\HID_Register[1]~input_o & ( \REGS|regs[19][17]~q & ( (!\HID_Register[3]~input_o & +// ((\REGS|regs[17][17]~q ))) # (\HID_Register[3]~input_o & (\REGS|regs[25][17]~q )) ) ) ) # ( \HID_Register[1]~input_o & ( !\REGS|regs[19][17]~q & ( (\REGS|regs[27][17]~q & \HID_Register[3]~input_o ) ) ) ) # ( !\HID_Register[1]~input_o & ( +// !\REGS|regs[19][17]~q & ( (!\HID_Register[3]~input_o & ((\REGS|regs[17][17]~q ))) # (\HID_Register[3]~input_o & (\REGS|regs[25][17]~q )) ) ) ) + + .dataa(!\REGS|regs[25][17]~q ), + .datab(!\REGS|regs[27][17]~q ), + .datac(!\REGS|regs[17][17]~q ), + .datad(!\HID_Register[3]~input_o ), + .datae(!\HID_Register[1]~input_o ), + .dataf(!\REGS|regs[19][17]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[1]~24_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[1]~24 .extended_lut = "off"; +defparam \PC_Reg_Display[1]~24 .lut_mask = 64'h0F5500330F55FF33; +defparam \PC_Reg_Display[1]~24 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X38_Y3_N57 +cyclonev_lcell_comb \PC_Reg_Display[1]~26 ( +// Equation(s): +// \PC_Reg_Display[1]~26_combout = ( \HID_Register[0]~input_o & ( \PC_Reg_Display[1]~24_combout & ( (!\HID_Register[2]~input_o ) # (\PC_Reg_Display[1]~25_combout ) ) ) ) # ( !\HID_Register[0]~input_o & ( \PC_Reg_Display[1]~24_combout & ( +// (!\HID_Register[2]~input_o & (\PC_Reg_Display[1]~22_combout )) # (\HID_Register[2]~input_o & ((\PC_Reg_Display[1]~23_combout ))) ) ) ) # ( \HID_Register[0]~input_o & ( !\PC_Reg_Display[1]~24_combout & ( (\HID_Register[2]~input_o & +// \PC_Reg_Display[1]~25_combout ) ) ) ) # ( !\HID_Register[0]~input_o & ( !\PC_Reg_Display[1]~24_combout & ( (!\HID_Register[2]~input_o & (\PC_Reg_Display[1]~22_combout )) # (\HID_Register[2]~input_o & ((\PC_Reg_Display[1]~23_combout ))) ) ) ) + + .dataa(!\HID_Register[2]~input_o ), + .datab(!\PC_Reg_Display[1]~25_combout ), + .datac(!\PC_Reg_Display[1]~22_combout ), + .datad(!\PC_Reg_Display[1]~23_combout ), + .datae(!\HID_Register[0]~input_o ), + .dataf(!\PC_Reg_Display[1]~24_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[1]~26_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[1]~26 .extended_lut = "off"; +defparam \PC_Reg_Display[1]~26 .lut_mask = 64'h0A5F11110A5FBBBB; +defparam \PC_Reg_Display[1]~26 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y7_N0 +cyclonev_lcell_comb \PC_Reg_Display[1]~32 ( +// Equation(s): +// \PC_Reg_Display[1]~32_combout = ( \REGS|regs[8][1]~q & ( (!\HID_Register[3]~input_o & (\REGS|regs[4][1]~q & ((\HID_Register[2]~input_o )))) # (\HID_Register[3]~input_o & (((!\HID_Register[2]~input_o ) # (\REGS|regs[12][1]~q )))) ) ) # ( +// !\REGS|regs[8][1]~q & ( (\HID_Register[2]~input_o & ((!\HID_Register[3]~input_o & (\REGS|regs[4][1]~q )) # (\HID_Register[3]~input_o & ((\REGS|regs[12][1]~q ))))) ) ) + + .dataa(!\HID_Register[3]~input_o ), + .datab(!\REGS|regs[4][1]~q ), + .datac(!\REGS|regs[12][1]~q ), + .datad(!\HID_Register[2]~input_o ), + .datae(gnd), + .dataf(!\REGS|regs[8][1]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[1]~32_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[1]~32 .extended_lut = "off"; +defparam \PC_Reg_Display[1]~32 .lut_mask = 64'h0027002755275527; +defparam \PC_Reg_Display[1]~32 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X38_Y8_N16 +dffeas \REGS|regs[13][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[13][1]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~31_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[13][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[13][1] .is_wysiwyg = "true"; +defparam \REGS|regs[13][1] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X40_Y8_N12 +cyclonev_lcell_comb \PC_Reg_Display[1]~33 ( +// Equation(s): +// \PC_Reg_Display[1]~33_combout = ( \REGS|regs[5][1]~q & ( \REGS|regs[9][1]~q & ( (!\HID_Register[2]~input_o & (((\REGS|regs[1][1]~q ) # (\HID_Register[3]~input_o )))) # (\HID_Register[2]~input_o & (((!\HID_Register[3]~input_o )) # (\REGS|regs[13][1]~q +// ))) ) ) ) # ( !\REGS|regs[5][1]~q & ( \REGS|regs[9][1]~q & ( (!\HID_Register[2]~input_o & (((\REGS|regs[1][1]~q ) # (\HID_Register[3]~input_o )))) # (\HID_Register[2]~input_o & (\REGS|regs[13][1]~q & (\HID_Register[3]~input_o ))) ) ) ) # ( +// \REGS|regs[5][1]~q & ( !\REGS|regs[9][1]~q & ( (!\HID_Register[2]~input_o & (((!\HID_Register[3]~input_o & \REGS|regs[1][1]~q )))) # (\HID_Register[2]~input_o & (((!\HID_Register[3]~input_o )) # (\REGS|regs[13][1]~q ))) ) ) ) # ( !\REGS|regs[5][1]~q +// & ( !\REGS|regs[9][1]~q & ( (!\HID_Register[2]~input_o & (((!\HID_Register[3]~input_o & \REGS|regs[1][1]~q )))) # (\HID_Register[2]~input_o & (\REGS|regs[13][1]~q & (\HID_Register[3]~input_o ))) ) ) ) + + .dataa(!\REGS|regs[13][1]~q ), + .datab(!\HID_Register[2]~input_o ), + .datac(!\HID_Register[3]~input_o ), + .datad(!\REGS|regs[1][1]~q ), + .datae(!\REGS|regs[5][1]~q ), + .dataf(!\REGS|regs[9][1]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[1]~33_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[1]~33 .extended_lut = "off"; +defparam \PC_Reg_Display[1]~33 .lut_mask = 64'h01C131F10DCD3DFD; +defparam \PC_Reg_Display[1]~33 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X40_Y5_N1 +dffeas \REGS|regs[10][1]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[10][1]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~33_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[10][1]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[10][1]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[10][1]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: FF_X38_Y10_N7 +dffeas \REGS|regs[6][1]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[1]~173_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~34_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[6][1]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[6][1]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[6][1]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X40_Y9_N6 +cyclonev_lcell_comb \PC_Reg_Display[1]~34 ( +// Equation(s): +// \PC_Reg_Display[1]~34_combout = ( \REGS|regs[14][1]~q & ( \REGS|regs[6][1]~DUPLICATE_q & ( ((!\HID_Register[3]~input_o & ((\REGS|regs[2][1]~q ))) # (\HID_Register[3]~input_o & (\REGS|regs[10][1]~DUPLICATE_q ))) # (\HID_Register[2]~input_o ) ) ) ) # ( +// !\REGS|regs[14][1]~q & ( \REGS|regs[6][1]~DUPLICATE_q & ( (!\HID_Register[2]~input_o & ((!\HID_Register[3]~input_o & ((\REGS|regs[2][1]~q ))) # (\HID_Register[3]~input_o & (\REGS|regs[10][1]~DUPLICATE_q )))) # (\HID_Register[2]~input_o & +// (((!\HID_Register[3]~input_o )))) ) ) ) # ( \REGS|regs[14][1]~q & ( !\REGS|regs[6][1]~DUPLICATE_q & ( (!\HID_Register[2]~input_o & ((!\HID_Register[3]~input_o & ((\REGS|regs[2][1]~q ))) # (\HID_Register[3]~input_o & (\REGS|regs[10][1]~DUPLICATE_q +// )))) # (\HID_Register[2]~input_o & (((\HID_Register[3]~input_o )))) ) ) ) # ( !\REGS|regs[14][1]~q & ( !\REGS|regs[6][1]~DUPLICATE_q & ( (!\HID_Register[2]~input_o & ((!\HID_Register[3]~input_o & ((\REGS|regs[2][1]~q ))) # (\HID_Register[3]~input_o +// & (\REGS|regs[10][1]~DUPLICATE_q )))) ) ) ) + + .dataa(!\REGS|regs[10][1]~DUPLICATE_q ), + .datab(!\HID_Register[2]~input_o ), + .datac(!\HID_Register[3]~input_o ), + .datad(!\REGS|regs[2][1]~q ), + .datae(!\REGS|regs[14][1]~q ), + .dataf(!\REGS|regs[6][1]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[1]~34_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[1]~34 .extended_lut = "off"; +defparam \PC_Reg_Display[1]~34 .lut_mask = 64'h04C407C734F437F7; +defparam \PC_Reg_Display[1]~34 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X40_Y9_N20 +dffeas \REGS|regs[15][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[15][1]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~39_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[15][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[15][1] .is_wysiwyg = "true"; +defparam \REGS|regs[15][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X40_Y13_N49 +dffeas \REGS|regs[3][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[1]~173_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~36_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[3][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[3][1] .is_wysiwyg = "true"; +defparam \REGS|regs[3][1] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X40_Y5_N26 +dffeas \REGS|regs[7][1] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[1]~173_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~38_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[7][1]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[7][1] .is_wysiwyg = "true"; +defparam \REGS|regs[7][1] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X40_Y5_N24 +cyclonev_lcell_comb \PC_Reg_Display[1]~35 ( +// Equation(s): +// \PC_Reg_Display[1]~35_combout = ( \REGS|regs[7][1]~q & ( \REGS|regs[11][1]~q & ( (!\HID_Register[2]~input_o & (((\REGS|regs[3][1]~q )) # (\HID_Register[3]~input_o ))) # (\HID_Register[2]~input_o & ((!\HID_Register[3]~input_o ) # ((\REGS|regs[15][1]~q +// )))) ) ) ) # ( !\REGS|regs[7][1]~q & ( \REGS|regs[11][1]~q & ( (!\HID_Register[2]~input_o & (((\REGS|regs[3][1]~q )) # (\HID_Register[3]~input_o ))) # (\HID_Register[2]~input_o & (\HID_Register[3]~input_o & (\REGS|regs[15][1]~q ))) ) ) ) # ( +// \REGS|regs[7][1]~q & ( !\REGS|regs[11][1]~q & ( (!\HID_Register[2]~input_o & (!\HID_Register[3]~input_o & ((\REGS|regs[3][1]~q )))) # (\HID_Register[2]~input_o & ((!\HID_Register[3]~input_o ) # ((\REGS|regs[15][1]~q )))) ) ) ) # ( !\REGS|regs[7][1]~q +// & ( !\REGS|regs[11][1]~q & ( (!\HID_Register[2]~input_o & (!\HID_Register[3]~input_o & ((\REGS|regs[3][1]~q )))) # (\HID_Register[2]~input_o & (\HID_Register[3]~input_o & (\REGS|regs[15][1]~q ))) ) ) ) + + .dataa(!\HID_Register[2]~input_o ), + .datab(!\HID_Register[3]~input_o ), + .datac(!\REGS|regs[15][1]~q ), + .datad(!\REGS|regs[3][1]~q ), + .datae(!\REGS|regs[7][1]~q ), + .dataf(!\REGS|regs[11][1]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[1]~35_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[1]~35 .extended_lut = "off"; +defparam \PC_Reg_Display[1]~35 .lut_mask = 64'h018945CD23AB67EF; +defparam \PC_Reg_Display[1]~35 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X40_Y5_N51 +cyclonev_lcell_comb \PC_Reg_Display[1]~36 ( +// Equation(s): +// \PC_Reg_Display[1]~36_combout = ( \PC_Reg_Display[1]~34_combout & ( \PC_Reg_Display[1]~35_combout & ( ((!\HID_Register[0]~input_o & (\PC_Reg_Display[1]~32_combout )) # (\HID_Register[0]~input_o & ((\PC_Reg_Display[1]~33_combout )))) # +// (\HID_Register[1]~input_o ) ) ) ) # ( !\PC_Reg_Display[1]~34_combout & ( \PC_Reg_Display[1]~35_combout & ( (!\HID_Register[1]~input_o & ((!\HID_Register[0]~input_o & (\PC_Reg_Display[1]~32_combout )) # (\HID_Register[0]~input_o & +// ((\PC_Reg_Display[1]~33_combout ))))) # (\HID_Register[1]~input_o & (((\HID_Register[0]~input_o )))) ) ) ) # ( \PC_Reg_Display[1]~34_combout & ( !\PC_Reg_Display[1]~35_combout & ( (!\HID_Register[1]~input_o & ((!\HID_Register[0]~input_o & +// (\PC_Reg_Display[1]~32_combout )) # (\HID_Register[0]~input_o & ((\PC_Reg_Display[1]~33_combout ))))) # (\HID_Register[1]~input_o & (((!\HID_Register[0]~input_o )))) ) ) ) # ( !\PC_Reg_Display[1]~34_combout & ( !\PC_Reg_Display[1]~35_combout & ( +// (!\HID_Register[1]~input_o & ((!\HID_Register[0]~input_o & (\PC_Reg_Display[1]~32_combout )) # (\HID_Register[0]~input_o & ((\PC_Reg_Display[1]~33_combout ))))) ) ) ) + + .dataa(!\PC_Reg_Display[1]~32_combout ), + .datab(!\HID_Register[1]~input_o ), + .datac(!\PC_Reg_Display[1]~33_combout ), + .datad(!\HID_Register[0]~input_o ), + .datae(!\PC_Reg_Display[1]~34_combout ), + .dataf(!\PC_Reg_Display[1]~35_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[1]~36_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[1]~36 .extended_lut = "off"; +defparam \PC_Reg_Display[1]~36 .lut_mask = 64'h440C770C443F773F; +defparam \PC_Reg_Display[1]~36 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X40_Y5_N18 +cyclonev_lcell_comb \PC_Reg_Display[1]~37 ( +// Equation(s): +// \PC_Reg_Display[1]~37_combout = ( \HID_Hi_Low[0]~input_o & ( \PC_Reg_Display[1]~36_combout & ( \PC_Reg_Display[1]~26_combout ) ) ) # ( !\HID_Hi_Low[0]~input_o & ( \PC_Reg_Display[1]~36_combout & ( (!\HID_Register[4]~input_o ) # +// (\PC_Reg_Display[1]~31_combout ) ) ) ) # ( \HID_Hi_Low[0]~input_o & ( !\PC_Reg_Display[1]~36_combout & ( \PC_Reg_Display[1]~26_combout ) ) ) # ( !\HID_Hi_Low[0]~input_o & ( !\PC_Reg_Display[1]~36_combout & ( (\PC_Reg_Display[1]~31_combout & +// \HID_Register[4]~input_o ) ) ) ) + + .dataa(gnd), + .datab(!\PC_Reg_Display[1]~31_combout ), + .datac(!\HID_Register[4]~input_o ), + .datad(!\PC_Reg_Display[1]~26_combout ), + .datae(!\HID_Hi_Low[0]~input_o ), + .dataf(!\PC_Reg_Display[1]~36_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[1]~37_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[1]~37 .extended_lut = "off"; +defparam \PC_Reg_Display[1]~37 .lut_mask = 64'h030300FFF3F300FF; +defparam \PC_Reg_Display[1]~37 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X36_Y8_N46 +dffeas \PC|pc[17] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\Add0~5_sumout ), + .asdata(vcc), + .clrn(!\rst[0]~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\PC|pc [17]), + .prn(vcc)); +// synopsys translate_off +defparam \PC|pc[17] .is_wysiwyg = "true"; +defparam \PC|pc[17] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X37_Y4_N16 +dffeas \REGS|regs[12][17]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[17]~87_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~26_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[12][17]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[12][17]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[12][17]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X38_Y13_N48 +cyclonev_lcell_comb \PC_Reg_Display[1]~39 ( +// Equation(s): +// \PC_Reg_Display[1]~39_combout = ( \REGS|regs[14][17]~q & ( \REGS|regs[12][17]~DUPLICATE_q & ( ((!\HID_Register[1]~input_o & ((\REGS|regs[4][17]~q ))) # (\HID_Register[1]~input_o & (\REGS|regs[6][17]~q ))) # (\HID_Register[3]~input_o ) ) ) ) # ( +// !\REGS|regs[14][17]~q & ( \REGS|regs[12][17]~DUPLICATE_q & ( (!\HID_Register[3]~input_o & ((!\HID_Register[1]~input_o & ((\REGS|regs[4][17]~q ))) # (\HID_Register[1]~input_o & (\REGS|regs[6][17]~q )))) # (\HID_Register[3]~input_o & +// (((!\HID_Register[1]~input_o )))) ) ) ) # ( \REGS|regs[14][17]~q & ( !\REGS|regs[12][17]~DUPLICATE_q & ( (!\HID_Register[3]~input_o & ((!\HID_Register[1]~input_o & ((\REGS|regs[4][17]~q ))) # (\HID_Register[1]~input_o & (\REGS|regs[6][17]~q )))) # +// (\HID_Register[3]~input_o & (((\HID_Register[1]~input_o )))) ) ) ) # ( !\REGS|regs[14][17]~q & ( !\REGS|regs[12][17]~DUPLICATE_q & ( (!\HID_Register[3]~input_o & ((!\HID_Register[1]~input_o & ((\REGS|regs[4][17]~q ))) # (\HID_Register[1]~input_o & +// (\REGS|regs[6][17]~q )))) ) ) ) + + .dataa(!\REGS|regs[6][17]~q ), + .datab(!\REGS|regs[4][17]~q ), + .datac(!\HID_Register[3]~input_o ), + .datad(!\HID_Register[1]~input_o ), + .datae(!\REGS|regs[14][17]~q ), + .dataf(!\REGS|regs[12][17]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[1]~39_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[1]~39 .extended_lut = "off"; +defparam \PC_Reg_Display[1]~39 .lut_mask = 64'h3050305F3F503F5F; +defparam \PC_Reg_Display[1]~39 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X38_Y13_N10 +dffeas \REGS|regs[15][17] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[17]~87_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~39_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[15][17]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[15][17] .is_wysiwyg = "true"; +defparam \REGS|regs[15][17] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X32_Y4_N8 +dffeas \REGS|regs[7][17] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[17]~87_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~38_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[7][17]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[7][17] .is_wysiwyg = "true"; +defparam \REGS|regs[7][17] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y4_N6 +cyclonev_lcell_comb \PC_Reg_Display[1]~41 ( +// Equation(s): +// \PC_Reg_Display[1]~41_combout = ( \REGS|regs[7][17]~q & ( \HID_Register[3]~input_o & ( (!\HID_Register[1]~input_o & ((\REGS|regs[13][17]~q ))) # (\HID_Register[1]~input_o & (\REGS|regs[15][17]~q )) ) ) ) # ( !\REGS|regs[7][17]~q & ( +// \HID_Register[3]~input_o & ( (!\HID_Register[1]~input_o & ((\REGS|regs[13][17]~q ))) # (\HID_Register[1]~input_o & (\REGS|regs[15][17]~q )) ) ) ) # ( \REGS|regs[7][17]~q & ( !\HID_Register[3]~input_o & ( (\HID_Register[1]~input_o ) # +// (\REGS|regs[5][17]~q ) ) ) ) # ( !\REGS|regs[7][17]~q & ( !\HID_Register[3]~input_o & ( (\REGS|regs[5][17]~q & !\HID_Register[1]~input_o ) ) ) ) + + .dataa(!\REGS|regs[5][17]~q ), + .datab(!\REGS|regs[15][17]~q ), + .datac(!\REGS|regs[13][17]~q ), + .datad(!\HID_Register[1]~input_o ), + .datae(!\REGS|regs[7][17]~q ), + .dataf(!\HID_Register[3]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[1]~41_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[1]~41 .extended_lut = "off"; +defparam \PC_Reg_Display[1]~41 .lut_mask = 64'h550055FF0F330F33; +defparam \PC_Reg_Display[1]~41 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X38_Y4_N30 +cyclonev_lcell_comb \PC_Reg_Display[1]~38 ( +// Equation(s): +// \PC_Reg_Display[1]~38_combout = ( \REGS|regs[10][17]~q & ( \HID_Register[1]~input_o & ( (\HID_Register[3]~input_o ) # (\REGS|regs[2][17]~q ) ) ) ) # ( !\REGS|regs[10][17]~q & ( \HID_Register[1]~input_o & ( (\REGS|regs[2][17]~q & +// !\HID_Register[3]~input_o ) ) ) ) # ( \REGS|regs[10][17]~q & ( !\HID_Register[1]~input_o & ( (\HID_Register[3]~input_o & \REGS|regs[8][17]~q ) ) ) ) # ( !\REGS|regs[10][17]~q & ( !\HID_Register[1]~input_o & ( (\HID_Register[3]~input_o & +// \REGS|regs[8][17]~q ) ) ) ) + + .dataa(!\REGS|regs[2][17]~q ), + .datab(!\HID_Register[3]~input_o ), + .datac(!\REGS|regs[8][17]~q ), + .datad(gnd), + .datae(!\REGS|regs[10][17]~q ), + .dataf(!\HID_Register[1]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[1]~38_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[1]~38 .extended_lut = "off"; +defparam \PC_Reg_Display[1]~38 .lut_mask = 64'h0303030344447777; +defparam \PC_Reg_Display[1]~38 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X38_Y12_N49 +dffeas \REGS|regs[11][17]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[17]~87_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~37_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[11][17]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[11][17]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[11][17]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: FF_X32_Y4_N32 +dffeas \REGS|regs[1][17]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[1][17]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~28_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[1][17]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[1][17]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[1][17]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: FF_X32_Y4_N14 +dffeas \REGS|regs[3][17] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[17]~87_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~36_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[3][17]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[3][17] .is_wysiwyg = "true"; +defparam \REGS|regs[3][17] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y4_N12 +cyclonev_lcell_comb \PC_Reg_Display[1]~40 ( +// Equation(s): +// \PC_Reg_Display[1]~40_combout = ( \REGS|regs[3][17]~q & ( \HID_Register[1]~input_o & ( (!\HID_Register[3]~input_o ) # (\REGS|regs[11][17]~DUPLICATE_q ) ) ) ) # ( !\REGS|regs[3][17]~q & ( \HID_Register[1]~input_o & ( (\REGS|regs[11][17]~DUPLICATE_q & +// \HID_Register[3]~input_o ) ) ) ) # ( \REGS|regs[3][17]~q & ( !\HID_Register[1]~input_o & ( (!\HID_Register[3]~input_o & (\REGS|regs[1][17]~DUPLICATE_q )) # (\HID_Register[3]~input_o & ((\REGS|regs[9][17]~q ))) ) ) ) # ( !\REGS|regs[3][17]~q & ( +// !\HID_Register[1]~input_o & ( (!\HID_Register[3]~input_o & (\REGS|regs[1][17]~DUPLICATE_q )) # (\HID_Register[3]~input_o & ((\REGS|regs[9][17]~q ))) ) ) ) + + .dataa(!\REGS|regs[11][17]~DUPLICATE_q ), + .datab(!\REGS|regs[1][17]~DUPLICATE_q ), + .datac(!\HID_Register[3]~input_o ), + .datad(!\REGS|regs[9][17]~q ), + .datae(!\REGS|regs[3][17]~q ), + .dataf(!\HID_Register[1]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[1]~40_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[1]~40 .extended_lut = "off"; +defparam \PC_Reg_Display[1]~40 .lut_mask = 64'h303F303F0505F5F5; +defparam \PC_Reg_Display[1]~40 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y4_N48 +cyclonev_lcell_comb \PC_Reg_Display[1]~42 ( +// Equation(s): +// \PC_Reg_Display[1]~42_combout = ( \PC_Reg_Display[1]~38_combout & ( \PC_Reg_Display[1]~40_combout & ( (!\HID_Register[2]~input_o ) # ((!\HID_Register[0]~input_o & (\PC_Reg_Display[1]~39_combout )) # (\HID_Register[0]~input_o & +// ((\PC_Reg_Display[1]~41_combout )))) ) ) ) # ( !\PC_Reg_Display[1]~38_combout & ( \PC_Reg_Display[1]~40_combout & ( (!\HID_Register[2]~input_o & (((\HID_Register[0]~input_o )))) # (\HID_Register[2]~input_o & ((!\HID_Register[0]~input_o & +// (\PC_Reg_Display[1]~39_combout )) # (\HID_Register[0]~input_o & ((\PC_Reg_Display[1]~41_combout ))))) ) ) ) # ( \PC_Reg_Display[1]~38_combout & ( !\PC_Reg_Display[1]~40_combout & ( (!\HID_Register[2]~input_o & (((!\HID_Register[0]~input_o )))) # +// (\HID_Register[2]~input_o & ((!\HID_Register[0]~input_o & (\PC_Reg_Display[1]~39_combout )) # (\HID_Register[0]~input_o & ((\PC_Reg_Display[1]~41_combout ))))) ) ) ) # ( !\PC_Reg_Display[1]~38_combout & ( !\PC_Reg_Display[1]~40_combout & ( +// (\HID_Register[2]~input_o & ((!\HID_Register[0]~input_o & (\PC_Reg_Display[1]~39_combout )) # (\HID_Register[0]~input_o & ((\PC_Reg_Display[1]~41_combout ))))) ) ) ) + + .dataa(!\PC_Reg_Display[1]~39_combout ), + .datab(!\PC_Reg_Display[1]~41_combout ), + .datac(!\HID_Register[2]~input_o ), + .datad(!\HID_Register[0]~input_o ), + .datae(!\PC_Reg_Display[1]~38_combout ), + .dataf(!\PC_Reg_Display[1]~40_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[1]~42_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[1]~42 .extended_lut = "off"; +defparam \PC_Reg_Display[1]~42 .lut_mask = 64'h0503F50305F3F5F3; +defparam \PC_Reg_Display[1]~42 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y4_N18 +cyclonev_lcell_comb \PC_Reg_Display[1]~43 ( +// Equation(s): +// \PC_Reg_Display[1]~43_combout = ( \PC|pc [17] & ( \PC_Reg_Display[1]~42_combout & ( (!\HID_PC[0]~input_o & (((!\HID_Register[4]~input_o & \HID_Hi_Low[0]~input_o )) # (\PC_Reg_Display[1]~37_combout ))) # (\HID_PC[0]~input_o & (((\HID_Hi_Low[0]~input_o +// )))) ) ) ) # ( !\PC|pc [17] & ( \PC_Reg_Display[1]~42_combout & ( (!\HID_PC[0]~input_o & (((!\HID_Register[4]~input_o & \HID_Hi_Low[0]~input_o )) # (\PC_Reg_Display[1]~37_combout ))) ) ) ) # ( \PC|pc [17] & ( !\PC_Reg_Display[1]~42_combout & ( +// (!\HID_PC[0]~input_o & (\PC_Reg_Display[1]~37_combout & ((!\HID_Hi_Low[0]~input_o ) # (\HID_Register[4]~input_o )))) # (\HID_PC[0]~input_o & (((\HID_Hi_Low[0]~input_o )))) ) ) ) # ( !\PC|pc [17] & ( !\PC_Reg_Display[1]~42_combout & ( +// (\PC_Reg_Display[1]~37_combout & (!\HID_PC[0]~input_o & ((!\HID_Hi_Low[0]~input_o ) # (\HID_Register[4]~input_o )))) ) ) ) + + .dataa(!\PC_Reg_Display[1]~37_combout ), + .datab(!\HID_PC[0]~input_o ), + .datac(!\HID_Register[4]~input_o ), + .datad(!\HID_Hi_Low[0]~input_o ), + .datae(!\PC|pc [17]), + .dataf(!\PC_Reg_Display[1]~42_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[1]~43_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[1]~43 .extended_lut = "off"; +defparam \PC_Reg_Display[1]~43 .lut_mask = 64'h4404443744C444F7; +defparam \PC_Reg_Display[1]~43 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X40_Y12_N16 +dffeas \REGS|regs[6][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[2]~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~34_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[6][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[6][2] .is_wysiwyg = "true"; +defparam \REGS|regs[6][2] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X41_Y14_N33 +cyclonev_lcell_comb \REGS|regs[7][2]~feeder ( +// Equation(s): +// \REGS|regs[7][2]~feeder_combout = ( \rd[2]~260_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[2]~260_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[7][2]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[7][2]~feeder .extended_lut = "off"; +defparam \REGS|regs[7][2]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[7][2]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X41_Y14_N34 +dffeas \REGS|regs[7][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[7][2]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~38_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[7][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[7][2] .is_wysiwyg = "true"; +defparam \REGS|regs[7][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X38_Y13_N1 +dffeas \REGS|regs[6][18]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[6][18]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~34_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[6][18]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[6][18]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[6][18]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: FF_X41_Y14_N49 +dffeas \REGS|regs[7][18] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[18]~174_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~38_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[7][18]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[7][18] .is_wysiwyg = "true"; +defparam \REGS|regs[7][18] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X42_Y15_N54 +cyclonev_lcell_comb \PC_Reg_Display[2]~47 ( +// Equation(s): +// \PC_Reg_Display[2]~47_combout = ( \HID_Register[0]~input_o & ( \REGS|regs[7][18]~q & ( (\REGS|regs[7][2]~q ) # (\HID_Hi_Low[0]~input_o ) ) ) ) # ( !\HID_Register[0]~input_o & ( \REGS|regs[7][18]~q & ( (!\HID_Hi_Low[0]~input_o & (\REGS|regs[6][2]~q +// )) # (\HID_Hi_Low[0]~input_o & ((\REGS|regs[6][18]~DUPLICATE_q ))) ) ) ) # ( \HID_Register[0]~input_o & ( !\REGS|regs[7][18]~q & ( (!\HID_Hi_Low[0]~input_o & \REGS|regs[7][2]~q ) ) ) ) # ( !\HID_Register[0]~input_o & ( !\REGS|regs[7][18]~q & ( +// (!\HID_Hi_Low[0]~input_o & (\REGS|regs[6][2]~q )) # (\HID_Hi_Low[0]~input_o & ((\REGS|regs[6][18]~DUPLICATE_q ))) ) ) ) + + .dataa(!\REGS|regs[6][2]~q ), + .datab(!\HID_Hi_Low[0]~input_o ), + .datac(!\REGS|regs[7][2]~q ), + .datad(!\REGS|regs[6][18]~DUPLICATE_q ), + .datae(!\HID_Register[0]~input_o ), + .dataf(!\REGS|regs[7][18]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[2]~47_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[2]~47 .extended_lut = "off"; +defparam \PC_Reg_Display[2]~47 .lut_mask = 64'h44770C0C44773F3F; +defparam \PC_Reg_Display[2]~47 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X40_Y13_N35 +dffeas \REGS|regs[3][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[2]~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~36_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[3][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[3][2] .is_wysiwyg = "true"; +defparam \REGS|regs[3][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X38_Y12_N22 +dffeas \REGS|regs[2][18] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[18]~174_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~32_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[2][18]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[2][18] .is_wysiwyg = "true"; +defparam \REGS|regs[2][18] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X38_Y12_N55 +dffeas \REGS|regs[2][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[2]~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~32_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[2][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[2][2] .is_wysiwyg = "true"; +defparam \REGS|regs[2][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X40_Y13_N32 +dffeas \REGS|regs[3][18] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[18]~174_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~36_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[3][18]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[3][18] .is_wysiwyg = "true"; +defparam \REGS|regs[3][18] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X40_Y13_N30 +cyclonev_lcell_comb \PC_Reg_Display[2]~45 ( +// Equation(s): +// \PC_Reg_Display[2]~45_combout = ( \REGS|regs[3][18]~q & ( \HID_Register[0]~input_o & ( (\HID_Hi_Low[0]~input_o ) # (\REGS|regs[3][2]~q ) ) ) ) # ( !\REGS|regs[3][18]~q & ( \HID_Register[0]~input_o & ( (\REGS|regs[3][2]~q & !\HID_Hi_Low[0]~input_o ) +// ) ) ) # ( \REGS|regs[3][18]~q & ( !\HID_Register[0]~input_o & ( (!\HID_Hi_Low[0]~input_o & ((\REGS|regs[2][2]~q ))) # (\HID_Hi_Low[0]~input_o & (\REGS|regs[2][18]~q )) ) ) ) # ( !\REGS|regs[3][18]~q & ( !\HID_Register[0]~input_o & ( +// (!\HID_Hi_Low[0]~input_o & ((\REGS|regs[2][2]~q ))) # (\HID_Hi_Low[0]~input_o & (\REGS|regs[2][18]~q )) ) ) ) + + .dataa(!\REGS|regs[3][2]~q ), + .datab(!\REGS|regs[2][18]~q ), + .datac(!\HID_Hi_Low[0]~input_o ), + .datad(!\REGS|regs[2][2]~q ), + .datae(!\REGS|regs[3][18]~q ), + .dataf(!\HID_Register[0]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[2]~45_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[2]~45 .extended_lut = "off"; +defparam \PC_Reg_Display[2]~45 .lut_mask = 64'h03F303F350505F5F; +defparam \PC_Reg_Display[2]~45 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X41_Y8_N54 +cyclonev_lcell_comb \PC_Reg_Display[2]~46 ( +// Equation(s): +// \PC_Reg_Display[2]~46_combout = ( \REGS|regs[4][18]~q & ( \HID_Register[0]~input_o & ( (!\HID_Hi_Low[0]~input_o & (\REGS|regs[5][2]~q )) # (\HID_Hi_Low[0]~input_o & ((\REGS|regs[5][18]~q ))) ) ) ) # ( !\REGS|regs[4][18]~q & ( +// \HID_Register[0]~input_o & ( (!\HID_Hi_Low[0]~input_o & (\REGS|regs[5][2]~q )) # (\HID_Hi_Low[0]~input_o & ((\REGS|regs[5][18]~q ))) ) ) ) # ( \REGS|regs[4][18]~q & ( !\HID_Register[0]~input_o & ( (\REGS|regs[4][2]~q ) # (\HID_Hi_Low[0]~input_o ) ) ) +// ) # ( !\REGS|regs[4][18]~q & ( !\HID_Register[0]~input_o & ( (!\HID_Hi_Low[0]~input_o & \REGS|regs[4][2]~q ) ) ) ) + + .dataa(!\HID_Hi_Low[0]~input_o ), + .datab(!\REGS|regs[5][2]~q ), + .datac(!\REGS|regs[5][18]~q ), + .datad(!\REGS|regs[4][2]~q ), + .datae(!\REGS|regs[4][18]~q ), + .dataf(!\HID_Register[0]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[2]~46_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[2]~46 .extended_lut = "off"; +defparam \PC_Reg_Display[2]~46 .lut_mask = 64'h00AA55FF27272727; +defparam \PC_Reg_Display[2]~46 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X40_Y13_N9 +cyclonev_lcell_comb \PC_Reg_Display[2]~44 ( +// Equation(s): +// \PC_Reg_Display[2]~44_combout = ( \REGS|regs[1][2]~q & ( \HID_Hi_Low[0]~input_o & ( (\REGS|regs[1][18]~q & \HID_Register[0]~input_o ) ) ) ) # ( !\REGS|regs[1][2]~q & ( \HID_Hi_Low[0]~input_o & ( (\REGS|regs[1][18]~q & \HID_Register[0]~input_o ) ) ) +// ) # ( \REGS|regs[1][2]~q & ( !\HID_Hi_Low[0]~input_o & ( \HID_Register[0]~input_o ) ) ) + + .dataa(!\REGS|regs[1][18]~q ), + .datab(gnd), + .datac(gnd), + .datad(!\HID_Register[0]~input_o ), + .datae(!\REGS|regs[1][2]~q ), + .dataf(!\HID_Hi_Low[0]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[2]~44_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[2]~44 .extended_lut = "off"; +defparam \PC_Reg_Display[2]~44 .lut_mask = 64'h000000FF00550055; +defparam \PC_Reg_Display[2]~44 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X40_Y13_N51 +cyclonev_lcell_comb \PC_Reg_Display[2]~48 ( +// Equation(s): +// \PC_Reg_Display[2]~48_combout = ( \HID_Register[1]~input_o & ( \PC_Reg_Display[2]~44_combout & ( (!\HID_Register[2]~input_o & ((\PC_Reg_Display[2]~45_combout ))) # (\HID_Register[2]~input_o & (\PC_Reg_Display[2]~47_combout )) ) ) ) # ( +// !\HID_Register[1]~input_o & ( \PC_Reg_Display[2]~44_combout & ( (!\HID_Register[2]~input_o ) # (\PC_Reg_Display[2]~46_combout ) ) ) ) # ( \HID_Register[1]~input_o & ( !\PC_Reg_Display[2]~44_combout & ( (!\HID_Register[2]~input_o & +// ((\PC_Reg_Display[2]~45_combout ))) # (\HID_Register[2]~input_o & (\PC_Reg_Display[2]~47_combout )) ) ) ) # ( !\HID_Register[1]~input_o & ( !\PC_Reg_Display[2]~44_combout & ( (\HID_Register[2]~input_o & \PC_Reg_Display[2]~46_combout ) ) ) ) + + .dataa(!\HID_Register[2]~input_o ), + .datab(!\PC_Reg_Display[2]~47_combout ), + .datac(!\PC_Reg_Display[2]~45_combout ), + .datad(!\PC_Reg_Display[2]~46_combout ), + .datae(!\HID_Register[1]~input_o ), + .dataf(!\PC_Reg_Display[2]~44_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[2]~48_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[2]~48 .extended_lut = "off"; +defparam \PC_Reg_Display[2]~48 .lut_mask = 64'h00551B1BAAFF1B1B; +defparam \PC_Reg_Display[2]~48 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X40_Y11_N6 +cyclonev_lcell_comb \PC_Reg_Display[2]~59 ( +// Equation(s): +// \PC_Reg_Display[2]~59_combout = ( \REGS|regs[28][2]~q & ( \HID_Register[1]~input_o & ( (!\HID_Register[2]~input_o & (\REGS|regs[26][2]~q )) # (\HID_Register[2]~input_o & ((\REGS|regs[30][2]~q ))) ) ) ) # ( !\REGS|regs[28][2]~q & ( +// \HID_Register[1]~input_o & ( (!\HID_Register[2]~input_o & (\REGS|regs[26][2]~q )) # (\HID_Register[2]~input_o & ((\REGS|regs[30][2]~q ))) ) ) ) # ( \REGS|regs[28][2]~q & ( !\HID_Register[1]~input_o & ( (\HID_Register[2]~input_o ) # +// (\REGS|regs[24][2]~q ) ) ) ) # ( !\REGS|regs[28][2]~q & ( !\HID_Register[1]~input_o & ( (\REGS|regs[24][2]~q & !\HID_Register[2]~input_o ) ) ) ) + + .dataa(!\REGS|regs[26][2]~q ), + .datab(!\REGS|regs[24][2]~q ), + .datac(!\REGS|regs[30][2]~q ), + .datad(!\HID_Register[2]~input_o ), + .datae(!\REGS|regs[28][2]~q ), + .dataf(!\HID_Register[1]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[2]~59_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[2]~59 .extended_lut = "off"; +defparam \PC_Reg_Display[2]~59 .lut_mask = 64'h330033FF550F550F; +defparam \PC_Reg_Display[2]~59 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X43_Y4_N30 +cyclonev_lcell_comb \PC_Reg_Display[2]~61 ( +// Equation(s): +// \PC_Reg_Display[2]~61_combout = ( \REGS|regs[28][18]~q & ( \REGS|regs[30][18]~q & ( ((!\HID_Register[1]~input_o & ((\REGS|regs[24][18]~q ))) # (\HID_Register[1]~input_o & (\REGS|regs[26][18]~q ))) # (\HID_Register[2]~input_o ) ) ) ) # ( +// !\REGS|regs[28][18]~q & ( \REGS|regs[30][18]~q & ( (!\HID_Register[1]~input_o & (((\REGS|regs[24][18]~q & !\HID_Register[2]~input_o )))) # (\HID_Register[1]~input_o & (((\HID_Register[2]~input_o )) # (\REGS|regs[26][18]~q ))) ) ) ) # ( +// \REGS|regs[28][18]~q & ( !\REGS|regs[30][18]~q & ( (!\HID_Register[1]~input_o & (((\HID_Register[2]~input_o ) # (\REGS|regs[24][18]~q )))) # (\HID_Register[1]~input_o & (\REGS|regs[26][18]~q & ((!\HID_Register[2]~input_o )))) ) ) ) # ( +// !\REGS|regs[28][18]~q & ( !\REGS|regs[30][18]~q & ( (!\HID_Register[2]~input_o & ((!\HID_Register[1]~input_o & ((\REGS|regs[24][18]~q ))) # (\HID_Register[1]~input_o & (\REGS|regs[26][18]~q )))) ) ) ) + + .dataa(!\REGS|regs[26][18]~q ), + .datab(!\HID_Register[1]~input_o ), + .datac(!\REGS|regs[24][18]~q ), + .datad(!\HID_Register[2]~input_o ), + .datae(!\REGS|regs[28][18]~q ), + .dataf(!\REGS|regs[30][18]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[2]~61_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[2]~61 .extended_lut = "off"; +defparam \PC_Reg_Display[2]~61 .lut_mask = 64'h1D001DCC1D331DFF; +defparam \PC_Reg_Display[2]~61 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X40_Y13_N0 +cyclonev_lcell_comb \PC_Reg_Display[2]~62 ( +// Equation(s): +// \PC_Reg_Display[2]~62_combout = ( \HID_Register[2]~input_o & ( \REGS|regs[29][18]~q & ( (!\HID_Register[1]~input_o ) # (\REGS|regs[31][18]~q ) ) ) ) # ( !\HID_Register[2]~input_o & ( \REGS|regs[29][18]~q & ( (!\HID_Register[1]~input_o & +// (\REGS|regs[25][18]~q )) # (\HID_Register[1]~input_o & ((\REGS|regs[27][18]~q ))) ) ) ) # ( \HID_Register[2]~input_o & ( !\REGS|regs[29][18]~q & ( (\HID_Register[1]~input_o & \REGS|regs[31][18]~q ) ) ) ) # ( !\HID_Register[2]~input_o & ( +// !\REGS|regs[29][18]~q & ( (!\HID_Register[1]~input_o & (\REGS|regs[25][18]~q )) # (\HID_Register[1]~input_o & ((\REGS|regs[27][18]~q ))) ) ) ) + + .dataa(!\HID_Register[1]~input_o ), + .datab(!\REGS|regs[31][18]~q ), + .datac(!\REGS|regs[25][18]~q ), + .datad(!\REGS|regs[27][18]~q ), + .datae(!\HID_Register[2]~input_o ), + .dataf(!\REGS|regs[29][18]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[2]~62_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[2]~62 .extended_lut = "off"; +defparam \PC_Reg_Display[2]~62 .lut_mask = 64'h0A5F11110A5FBBBB; +defparam \PC_Reg_Display[2]~62 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X40_Y11_N13 +dffeas \REGS|regs[29][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[2]~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~17_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[29][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[29][2] .is_wysiwyg = "true"; +defparam \REGS|regs[29][2] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y15_N12 +cyclonev_lcell_comb \PC_Reg_Display[2]~60 ( +// Equation(s): +// \PC_Reg_Display[2]~60_combout = ( \REGS|regs[31][2]~q & ( \REGS|regs[25][2]~q & ( (!\HID_Register[1]~input_o & (((!\HID_Register[2]~input_o )) # (\REGS|regs[29][2]~q ))) # (\HID_Register[1]~input_o & (((\HID_Register[2]~input_o ) # +// (\REGS|regs[27][2]~q )))) ) ) ) # ( !\REGS|regs[31][2]~q & ( \REGS|regs[25][2]~q & ( (!\HID_Register[1]~input_o & (((!\HID_Register[2]~input_o )) # (\REGS|regs[29][2]~q ))) # (\HID_Register[1]~input_o & (((\REGS|regs[27][2]~q & +// !\HID_Register[2]~input_o )))) ) ) ) # ( \REGS|regs[31][2]~q & ( !\REGS|regs[25][2]~q & ( (!\HID_Register[1]~input_o & (\REGS|regs[29][2]~q & ((\HID_Register[2]~input_o )))) # (\HID_Register[1]~input_o & (((\HID_Register[2]~input_o ) # +// (\REGS|regs[27][2]~q )))) ) ) ) # ( !\REGS|regs[31][2]~q & ( !\REGS|regs[25][2]~q & ( (!\HID_Register[1]~input_o & (\REGS|regs[29][2]~q & ((\HID_Register[2]~input_o )))) # (\HID_Register[1]~input_o & (((\REGS|regs[27][2]~q & +// !\HID_Register[2]~input_o )))) ) ) ) + + .dataa(!\REGS|regs[29][2]~q ), + .datab(!\HID_Register[1]~input_o ), + .datac(!\REGS|regs[27][2]~q ), + .datad(!\HID_Register[2]~input_o ), + .datae(!\REGS|regs[31][2]~q ), + .dataf(!\REGS|regs[25][2]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[2]~60_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[2]~60 .extended_lut = "off"; +defparam \PC_Reg_Display[2]~60 .lut_mask = 64'h03440377CF44CF77; +defparam \PC_Reg_Display[2]~60 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X40_Y13_N12 +cyclonev_lcell_comb \PC_Reg_Display[2]~63 ( +// Equation(s): +// \PC_Reg_Display[2]~63_combout = ( \PC_Reg_Display[2]~62_combout & ( \PC_Reg_Display[2]~60_combout & ( ((!\HID_Hi_Low[0]~input_o & (\PC_Reg_Display[2]~59_combout )) # (\HID_Hi_Low[0]~input_o & ((\PC_Reg_Display[2]~61_combout )))) # +// (\HID_Register[0]~input_o ) ) ) ) # ( !\PC_Reg_Display[2]~62_combout & ( \PC_Reg_Display[2]~60_combout & ( (!\HID_Register[0]~input_o & ((!\HID_Hi_Low[0]~input_o & (\PC_Reg_Display[2]~59_combout )) # (\HID_Hi_Low[0]~input_o & +// ((\PC_Reg_Display[2]~61_combout ))))) # (\HID_Register[0]~input_o & (((!\HID_Hi_Low[0]~input_o )))) ) ) ) # ( \PC_Reg_Display[2]~62_combout & ( !\PC_Reg_Display[2]~60_combout & ( (!\HID_Register[0]~input_o & ((!\HID_Hi_Low[0]~input_o & +// (\PC_Reg_Display[2]~59_combout )) # (\HID_Hi_Low[0]~input_o & ((\PC_Reg_Display[2]~61_combout ))))) # (\HID_Register[0]~input_o & (((\HID_Hi_Low[0]~input_o )))) ) ) ) # ( !\PC_Reg_Display[2]~62_combout & ( !\PC_Reg_Display[2]~60_combout & ( +// (!\HID_Register[0]~input_o & ((!\HID_Hi_Low[0]~input_o & (\PC_Reg_Display[2]~59_combout )) # (\HID_Hi_Low[0]~input_o & ((\PC_Reg_Display[2]~61_combout ))))) ) ) ) + + .dataa(!\PC_Reg_Display[2]~59_combout ), + .datab(!\HID_Register[0]~input_o ), + .datac(!\HID_Hi_Low[0]~input_o ), + .datad(!\PC_Reg_Display[2]~61_combout ), + .datae(!\PC_Reg_Display[2]~62_combout ), + .dataf(!\PC_Reg_Display[2]~60_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[2]~63_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[2]~63 .extended_lut = "off"; +defparam \PC_Reg_Display[2]~63 .lut_mask = 64'h404C434F707C737F; +defparam \PC_Reg_Display[2]~63 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X38_Y5_N22 +dffeas \REGS|regs[20][18]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[18]~174_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~7_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[20][18]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[20][18]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[20][18]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X38_Y4_N24 +cyclonev_lcell_comb \PC_Reg_Display[2]~51 ( +// Equation(s): +// \PC_Reg_Display[2]~51_combout = ( \REGS|regs[22][18]~q & ( \REGS|regs[16][18]~q & ( (!\HID_Register[2]~input_o & (((!\HID_Register[1]~input_o )) # (\REGS|regs[18][18]~q ))) # (\HID_Register[2]~input_o & (((\HID_Register[1]~input_o ) # +// (\REGS|regs[20][18]~DUPLICATE_q )))) ) ) ) # ( !\REGS|regs[22][18]~q & ( \REGS|regs[16][18]~q & ( (!\HID_Register[2]~input_o & (((!\HID_Register[1]~input_o )) # (\REGS|regs[18][18]~q ))) # (\HID_Register[2]~input_o & (((\REGS|regs[20][18]~DUPLICATE_q +// & !\HID_Register[1]~input_o )))) ) ) ) # ( \REGS|regs[22][18]~q & ( !\REGS|regs[16][18]~q & ( (!\HID_Register[2]~input_o & (\REGS|regs[18][18]~q & ((\HID_Register[1]~input_o )))) # (\HID_Register[2]~input_o & (((\HID_Register[1]~input_o ) # +// (\REGS|regs[20][18]~DUPLICATE_q )))) ) ) ) # ( !\REGS|regs[22][18]~q & ( !\REGS|regs[16][18]~q & ( (!\HID_Register[2]~input_o & (\REGS|regs[18][18]~q & ((\HID_Register[1]~input_o )))) # (\HID_Register[2]~input_o & (((\REGS|regs[20][18]~DUPLICATE_q & +// !\HID_Register[1]~input_o )))) ) ) ) + + .dataa(!\REGS|regs[18][18]~q ), + .datab(!\REGS|regs[20][18]~DUPLICATE_q ), + .datac(!\HID_Register[2]~input_o ), + .datad(!\HID_Register[1]~input_o ), + .datae(!\REGS|regs[22][18]~q ), + .dataf(!\REGS|regs[16][18]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[2]~51_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[2]~51 .extended_lut = "off"; +defparam \PC_Reg_Display[2]~51 .lut_mask = 64'h0350035FF350F35F; +defparam \PC_Reg_Display[2]~51 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X38_Y14_N42 +cyclonev_lcell_comb \REGS|regs[17][2]~feeder ( +// Equation(s): +// \REGS|regs[17][2]~feeder_combout = ( \rd[2]~260_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[2]~260_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[17][2]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[17][2]~feeder .extended_lut = "off"; +defparam \REGS|regs[17][2]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[17][2]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X38_Y14_N43 +dffeas \REGS|regs[17][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[17][2]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~11_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[17][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[17][2] .is_wysiwyg = "true"; +defparam \REGS|regs[17][2] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X40_Y10_N14 +dffeas \REGS|regs[21][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[2]~260_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~16_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[21][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[21][2] .is_wysiwyg = "true"; +defparam \REGS|regs[21][2] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X40_Y10_N24 +cyclonev_lcell_comb \PC_Reg_Display[2]~50 ( +// Equation(s): +// \PC_Reg_Display[2]~50_combout = ( \REGS|regs[23][2]~q & ( \REGS|regs[19][2]~q & ( ((!\HID_Register[2]~input_o & (\REGS|regs[17][2]~q )) # (\HID_Register[2]~input_o & ((\REGS|regs[21][2]~q )))) # (\HID_Register[1]~input_o ) ) ) ) # ( +// !\REGS|regs[23][2]~q & ( \REGS|regs[19][2]~q & ( (!\HID_Register[1]~input_o & ((!\HID_Register[2]~input_o & (\REGS|regs[17][2]~q )) # (\HID_Register[2]~input_o & ((\REGS|regs[21][2]~q ))))) # (\HID_Register[1]~input_o & (((!\HID_Register[2]~input_o +// )))) ) ) ) # ( \REGS|regs[23][2]~q & ( !\REGS|regs[19][2]~q & ( (!\HID_Register[1]~input_o & ((!\HID_Register[2]~input_o & (\REGS|regs[17][2]~q )) # (\HID_Register[2]~input_o & ((\REGS|regs[21][2]~q ))))) # (\HID_Register[1]~input_o & +// (((\HID_Register[2]~input_o )))) ) ) ) # ( !\REGS|regs[23][2]~q & ( !\REGS|regs[19][2]~q & ( (!\HID_Register[1]~input_o & ((!\HID_Register[2]~input_o & (\REGS|regs[17][2]~q )) # (\HID_Register[2]~input_o & ((\REGS|regs[21][2]~q ))))) ) ) ) + + .dataa(!\REGS|regs[17][2]~q ), + .datab(!\REGS|regs[21][2]~q ), + .datac(!\HID_Register[1]~input_o ), + .datad(!\HID_Register[2]~input_o ), + .datae(!\REGS|regs[23][2]~q ), + .dataf(!\REGS|regs[19][2]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[2]~50_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[2]~50 .extended_lut = "off"; +defparam \PC_Reg_Display[2]~50 .lut_mask = 64'h5030503F5F305F3F; +defparam \PC_Reg_Display[2]~50 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X37_Y15_N2 +dffeas \REGS|regs[18][2] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[18][2]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~5_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[18][2]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[18][2] .is_wysiwyg = "true"; +defparam \REGS|regs[18][2] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X36_Y14_N6 +cyclonev_lcell_comb \PC_Reg_Display[2]~49 ( +// Equation(s): +// \PC_Reg_Display[2]~49_combout = ( \REGS|regs[22][2]~q & ( \HID_Register[2]~input_o & ( (\REGS|regs[20][2]~q ) # (\HID_Register[1]~input_o ) ) ) ) # ( !\REGS|regs[22][2]~q & ( \HID_Register[2]~input_o & ( (!\HID_Register[1]~input_o & +// \REGS|regs[20][2]~q ) ) ) ) # ( \REGS|regs[22][2]~q & ( !\HID_Register[2]~input_o & ( (!\HID_Register[1]~input_o & ((\REGS|regs[16][2]~q ))) # (\HID_Register[1]~input_o & (\REGS|regs[18][2]~q )) ) ) ) # ( !\REGS|regs[22][2]~q & ( +// !\HID_Register[2]~input_o & ( (!\HID_Register[1]~input_o & ((\REGS|regs[16][2]~q ))) # (\HID_Register[1]~input_o & (\REGS|regs[18][2]~q )) ) ) ) + + .dataa(!\HID_Register[1]~input_o ), + .datab(!\REGS|regs[18][2]~q ), + .datac(!\REGS|regs[16][2]~q ), + .datad(!\REGS|regs[20][2]~q ), + .datae(!\REGS|regs[22][2]~q ), + .dataf(!\HID_Register[2]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[2]~49_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[2]~49 .extended_lut = "off"; +defparam \PC_Reg_Display[2]~49 .lut_mask = 64'h1B1B1B1B00AA55FF; +defparam \PC_Reg_Display[2]~49 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X40_Y3_N35 +dffeas \REGS|regs[17][18] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[18]~174_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~11_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[17][18]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[17][18] .is_wysiwyg = "true"; +defparam \REGS|regs[17][18] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X40_Y3_N2 +dffeas \REGS|regs[21][18] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[18]~174_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~16_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[21][18]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[21][18] .is_wysiwyg = "true"; +defparam \REGS|regs[21][18] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X40_Y3_N0 +cyclonev_lcell_comb \PC_Reg_Display[2]~52 ( +// Equation(s): +// \PC_Reg_Display[2]~52_combout = ( \REGS|regs[21][18]~q & ( \HID_Register[2]~input_o & ( (!\HID_Register[1]~input_o ) # (\REGS|regs[23][18]~q ) ) ) ) # ( !\REGS|regs[21][18]~q & ( \HID_Register[2]~input_o & ( (\REGS|regs[23][18]~q & +// \HID_Register[1]~input_o ) ) ) ) # ( \REGS|regs[21][18]~q & ( !\HID_Register[2]~input_o & ( (!\HID_Register[1]~input_o & (\REGS|regs[17][18]~q )) # (\HID_Register[1]~input_o & ((\REGS|regs[19][18]~q ))) ) ) ) # ( !\REGS|regs[21][18]~q & ( +// !\HID_Register[2]~input_o & ( (!\HID_Register[1]~input_o & (\REGS|regs[17][18]~q )) # (\HID_Register[1]~input_o & ((\REGS|regs[19][18]~q ))) ) ) ) + + .dataa(!\REGS|regs[17][18]~q ), + .datab(!\REGS|regs[23][18]~q ), + .datac(!\HID_Register[1]~input_o ), + .datad(!\REGS|regs[19][18]~q ), + .datae(!\REGS|regs[21][18]~q ), + .dataf(!\HID_Register[2]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[2]~52_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[2]~52 .extended_lut = "off"; +defparam \PC_Reg_Display[2]~52 .lut_mask = 64'h505F505F0303F3F3; +defparam \PC_Reg_Display[2]~52 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X40_Y4_N33 +cyclonev_lcell_comb \PC_Reg_Display[2]~53 ( +// Equation(s): +// \PC_Reg_Display[2]~53_combout = ( \PC_Reg_Display[2]~49_combout & ( \PC_Reg_Display[2]~52_combout & ( (!\HID_Hi_Low[0]~input_o & (((!\HID_Register[0]~input_o ) # (\PC_Reg_Display[2]~50_combout )))) # (\HID_Hi_Low[0]~input_o & +// (((\HID_Register[0]~input_o )) # (\PC_Reg_Display[2]~51_combout ))) ) ) ) # ( !\PC_Reg_Display[2]~49_combout & ( \PC_Reg_Display[2]~52_combout & ( (!\HID_Hi_Low[0]~input_o & (((\PC_Reg_Display[2]~50_combout & \HID_Register[0]~input_o )))) # +// (\HID_Hi_Low[0]~input_o & (((\HID_Register[0]~input_o )) # (\PC_Reg_Display[2]~51_combout ))) ) ) ) # ( \PC_Reg_Display[2]~49_combout & ( !\PC_Reg_Display[2]~52_combout & ( (!\HID_Hi_Low[0]~input_o & (((!\HID_Register[0]~input_o ) # +// (\PC_Reg_Display[2]~50_combout )))) # (\HID_Hi_Low[0]~input_o & (\PC_Reg_Display[2]~51_combout & ((!\HID_Register[0]~input_o )))) ) ) ) # ( !\PC_Reg_Display[2]~49_combout & ( !\PC_Reg_Display[2]~52_combout & ( (!\HID_Hi_Low[0]~input_o & +// (((\PC_Reg_Display[2]~50_combout & \HID_Register[0]~input_o )))) # (\HID_Hi_Low[0]~input_o & (\PC_Reg_Display[2]~51_combout & ((!\HID_Register[0]~input_o )))) ) ) ) + + .dataa(!\PC_Reg_Display[2]~51_combout ), + .datab(!\HID_Hi_Low[0]~input_o ), + .datac(!\PC_Reg_Display[2]~50_combout ), + .datad(!\HID_Register[0]~input_o ), + .datae(!\PC_Reg_Display[2]~49_combout ), + .dataf(!\PC_Reg_Display[2]~52_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[2]~53_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[2]~53 .extended_lut = "off"; +defparam \PC_Reg_Display[2]~53 .lut_mask = 64'h110CDD0C113FDD3F; +defparam \PC_Reg_Display[2]~53 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X40_Y14_N6 +cyclonev_lcell_comb \PC_Reg_Display[2]~54 ( +// Equation(s): +// \PC_Reg_Display[2]~54_combout = ( \REGS|regs[14][2]~q & ( \HID_Register[1]~input_o & ( (\HID_Register[2]~input_o ) # (\REGS|regs[10][2]~q ) ) ) ) # ( !\REGS|regs[14][2]~q & ( \HID_Register[1]~input_o & ( (\REGS|regs[10][2]~q & +// !\HID_Register[2]~input_o ) ) ) ) # ( \REGS|regs[14][2]~q & ( !\HID_Register[1]~input_o & ( (!\HID_Register[2]~input_o & (\REGS|regs[8][2]~DUPLICATE_q )) # (\HID_Register[2]~input_o & ((\REGS|regs[12][2]~q ))) ) ) ) # ( !\REGS|regs[14][2]~q & ( +// !\HID_Register[1]~input_o & ( (!\HID_Register[2]~input_o & (\REGS|regs[8][2]~DUPLICATE_q )) # (\HID_Register[2]~input_o & ((\REGS|regs[12][2]~q ))) ) ) ) + + .dataa(!\REGS|regs[8][2]~DUPLICATE_q ), + .datab(!\REGS|regs[10][2]~q ), + .datac(!\HID_Register[2]~input_o ), + .datad(!\REGS|regs[12][2]~q ), + .datae(!\REGS|regs[14][2]~q ), + .dataf(!\HID_Register[1]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[2]~54_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[2]~54 .extended_lut = "off"; +defparam \PC_Reg_Display[2]~54 .lut_mask = 64'h505F505F30303F3F; +defparam \PC_Reg_Display[2]~54 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X36_Y12_N16 +dffeas \REGS|regs[8][18] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[18]~174_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~24_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[8][18]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[8][18] .is_wysiwyg = "true"; +defparam \REGS|regs[8][18] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X38_Y13_N30 +cyclonev_lcell_comb \PC_Reg_Display[2]~56 ( +// Equation(s): +// \PC_Reg_Display[2]~56_combout = ( \REGS|regs[14][18]~q & ( \HID_Register[2]~input_o & ( (\REGS|regs[12][18]~q ) # (\HID_Register[1]~input_o ) ) ) ) # ( !\REGS|regs[14][18]~q & ( \HID_Register[2]~input_o & ( (!\HID_Register[1]~input_o & +// \REGS|regs[12][18]~q ) ) ) ) # ( \REGS|regs[14][18]~q & ( !\HID_Register[2]~input_o & ( (!\HID_Register[1]~input_o & ((\REGS|regs[8][18]~q ))) # (\HID_Register[1]~input_o & (\REGS|regs[10][18]~q )) ) ) ) # ( !\REGS|regs[14][18]~q & ( +// !\HID_Register[2]~input_o & ( (!\HID_Register[1]~input_o & ((\REGS|regs[8][18]~q ))) # (\HID_Register[1]~input_o & (\REGS|regs[10][18]~q )) ) ) ) + + .dataa(!\REGS|regs[10][18]~q ), + .datab(!\HID_Register[1]~input_o ), + .datac(!\REGS|regs[8][18]~q ), + .datad(!\REGS|regs[12][18]~q ), + .datae(!\REGS|regs[14][18]~q ), + .dataf(!\HID_Register[2]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[2]~56_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[2]~56 .extended_lut = "off"; +defparam \PC_Reg_Display[2]~56 .lut_mask = 64'h1D1D1D1D00CC33FF; +defparam \PC_Reg_Display[2]~56 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X40_Y14_N0 +cyclonev_lcell_comb \PC_Reg_Display[2]~55 ( +// Equation(s): +// \PC_Reg_Display[2]~55_combout = ( \REGS|regs[15][2]~q & ( \REGS|regs[11][2]~q & ( ((!\HID_Register[2]~input_o & (\REGS|regs[9][2]~DUPLICATE_q )) # (\HID_Register[2]~input_o & ((\REGS|regs[13][2]~q )))) # (\HID_Register[1]~input_o ) ) ) ) # ( +// !\REGS|regs[15][2]~q & ( \REGS|regs[11][2]~q & ( (!\HID_Register[2]~input_o & (((\REGS|regs[9][2]~DUPLICATE_q )) # (\HID_Register[1]~input_o ))) # (\HID_Register[2]~input_o & (!\HID_Register[1]~input_o & ((\REGS|regs[13][2]~q )))) ) ) ) # ( +// \REGS|regs[15][2]~q & ( !\REGS|regs[11][2]~q & ( (!\HID_Register[2]~input_o & (!\HID_Register[1]~input_o & (\REGS|regs[9][2]~DUPLICATE_q ))) # (\HID_Register[2]~input_o & (((\REGS|regs[13][2]~q )) # (\HID_Register[1]~input_o ))) ) ) ) # ( +// !\REGS|regs[15][2]~q & ( !\REGS|regs[11][2]~q & ( (!\HID_Register[1]~input_o & ((!\HID_Register[2]~input_o & (\REGS|regs[9][2]~DUPLICATE_q )) # (\HID_Register[2]~input_o & ((\REGS|regs[13][2]~q ))))) ) ) ) + + .dataa(!\HID_Register[2]~input_o ), + .datab(!\HID_Register[1]~input_o ), + .datac(!\REGS|regs[9][2]~DUPLICATE_q ), + .datad(!\REGS|regs[13][2]~q ), + .datae(!\REGS|regs[15][2]~q ), + .dataf(!\REGS|regs[11][2]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[2]~55_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[2]~55 .extended_lut = "off"; +defparam \PC_Reg_Display[2]~55 .lut_mask = 64'h084C195D2A6E3B7F; +defparam \PC_Reg_Display[2]~55 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X38_Y12_N24 +cyclonev_lcell_comb \PC_Reg_Display[2]~57 ( +// Equation(s): +// \PC_Reg_Display[2]~57_combout = ( \REGS|regs[11][18]~q & ( \REGS|regs[13][18]~q & ( (!\HID_Register[2]~input_o & (((\HID_Register[1]~input_o )) # (\REGS|regs[9][18]~DUPLICATE_q ))) # (\HID_Register[2]~input_o & (((!\HID_Register[1]~input_o ) # +// (\REGS|regs[15][18]~q )))) ) ) ) # ( !\REGS|regs[11][18]~q & ( \REGS|regs[13][18]~q & ( (!\HID_Register[2]~input_o & (\REGS|regs[9][18]~DUPLICATE_q & (!\HID_Register[1]~input_o ))) # (\HID_Register[2]~input_o & (((!\HID_Register[1]~input_o ) # +// (\REGS|regs[15][18]~q )))) ) ) ) # ( \REGS|regs[11][18]~q & ( !\REGS|regs[13][18]~q & ( (!\HID_Register[2]~input_o & (((\HID_Register[1]~input_o )) # (\REGS|regs[9][18]~DUPLICATE_q ))) # (\HID_Register[2]~input_o & (((\HID_Register[1]~input_o & +// \REGS|regs[15][18]~q )))) ) ) ) # ( !\REGS|regs[11][18]~q & ( !\REGS|regs[13][18]~q & ( (!\HID_Register[2]~input_o & (\REGS|regs[9][18]~DUPLICATE_q & (!\HID_Register[1]~input_o ))) # (\HID_Register[2]~input_o & (((\HID_Register[1]~input_o & +// \REGS|regs[15][18]~q )))) ) ) ) + + .dataa(!\HID_Register[2]~input_o ), + .datab(!\REGS|regs[9][18]~DUPLICATE_q ), + .datac(!\HID_Register[1]~input_o ), + .datad(!\REGS|regs[15][18]~q ), + .datae(!\REGS|regs[11][18]~q ), + .dataf(!\REGS|regs[13][18]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[2]~57_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[2]~57 .extended_lut = "off"; +defparam \PC_Reg_Display[2]~57 .lut_mask = 64'h20252A2F70757A7F; +defparam \PC_Reg_Display[2]~57 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X40_Y13_N54 +cyclonev_lcell_comb \PC_Reg_Display[2]~58 ( +// Equation(s): +// \PC_Reg_Display[2]~58_combout = ( \PC_Reg_Display[2]~55_combout & ( \PC_Reg_Display[2]~57_combout & ( ((!\HID_Hi_Low[0]~input_o & (\PC_Reg_Display[2]~54_combout )) # (\HID_Hi_Low[0]~input_o & ((\PC_Reg_Display[2]~56_combout )))) # +// (\HID_Register[0]~input_o ) ) ) ) # ( !\PC_Reg_Display[2]~55_combout & ( \PC_Reg_Display[2]~57_combout & ( (!\HID_Register[0]~input_o & ((!\HID_Hi_Low[0]~input_o & (\PC_Reg_Display[2]~54_combout )) # (\HID_Hi_Low[0]~input_o & +// ((\PC_Reg_Display[2]~56_combout ))))) # (\HID_Register[0]~input_o & (((\HID_Hi_Low[0]~input_o )))) ) ) ) # ( \PC_Reg_Display[2]~55_combout & ( !\PC_Reg_Display[2]~57_combout & ( (!\HID_Register[0]~input_o & ((!\HID_Hi_Low[0]~input_o & +// (\PC_Reg_Display[2]~54_combout )) # (\HID_Hi_Low[0]~input_o & ((\PC_Reg_Display[2]~56_combout ))))) # (\HID_Register[0]~input_o & (((!\HID_Hi_Low[0]~input_o )))) ) ) ) # ( !\PC_Reg_Display[2]~55_combout & ( !\PC_Reg_Display[2]~57_combout & ( +// (!\HID_Register[0]~input_o & ((!\HID_Hi_Low[0]~input_o & (\PC_Reg_Display[2]~54_combout )) # (\HID_Hi_Low[0]~input_o & ((\PC_Reg_Display[2]~56_combout ))))) ) ) ) + + .dataa(!\HID_Register[0]~input_o ), + .datab(!\PC_Reg_Display[2]~54_combout ), + .datac(!\HID_Hi_Low[0]~input_o ), + .datad(!\PC_Reg_Display[2]~56_combout ), + .datae(!\PC_Reg_Display[2]~55_combout ), + .dataf(!\PC_Reg_Display[2]~57_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[2]~58_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[2]~58 .extended_lut = "off"; +defparam \PC_Reg_Display[2]~58 .lut_mask = 64'h202A707A252F757F; +defparam \PC_Reg_Display[2]~58 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X40_Y13_N39 +cyclonev_lcell_comb \PC_Reg_Display[2]~64 ( +// Equation(s): +// \PC_Reg_Display[2]~64_combout = ( \PC_Reg_Display[2]~58_combout & ( \HID_Register[4]~input_o & ( (!\HID_Register[3]~input_o & ((\PC_Reg_Display[2]~53_combout ))) # (\HID_Register[3]~input_o & (\PC_Reg_Display[2]~63_combout )) ) ) ) # ( +// !\PC_Reg_Display[2]~58_combout & ( \HID_Register[4]~input_o & ( (!\HID_Register[3]~input_o & ((\PC_Reg_Display[2]~53_combout ))) # (\HID_Register[3]~input_o & (\PC_Reg_Display[2]~63_combout )) ) ) ) # ( \PC_Reg_Display[2]~58_combout & ( +// !\HID_Register[4]~input_o & ( (\HID_Register[3]~input_o ) # (\PC_Reg_Display[2]~48_combout ) ) ) ) # ( !\PC_Reg_Display[2]~58_combout & ( !\HID_Register[4]~input_o & ( (\PC_Reg_Display[2]~48_combout & !\HID_Register[3]~input_o ) ) ) ) + + .dataa(!\PC_Reg_Display[2]~48_combout ), + .datab(!\HID_Register[3]~input_o ), + .datac(!\PC_Reg_Display[2]~63_combout ), + .datad(!\PC_Reg_Display[2]~53_combout ), + .datae(!\PC_Reg_Display[2]~58_combout ), + .dataf(!\HID_Register[4]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[2]~64_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[2]~64 .extended_lut = "off"; +defparam \PC_Reg_Display[2]~64 .lut_mask = 64'h4444777703CF03CF; +defparam \PC_Reg_Display[2]~64 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y4_N3 +cyclonev_lcell_comb \PC_Reg_Display[2]~65 ( +// Equation(s): +// \PC_Reg_Display[2]~65_combout = ( \PC|pc [2] & ( (!\HID_PC[0]~input_o & (\PC_Reg_Display[2]~64_combout )) # (\HID_PC[0]~input_o & (((!\HID_Hi_Low[0]~input_o ) # (\PC|pc [18])))) ) ) # ( !\PC|pc [2] & ( (!\HID_PC[0]~input_o & +// (\PC_Reg_Display[2]~64_combout )) # (\HID_PC[0]~input_o & (((\HID_Hi_Low[0]~input_o & \PC|pc [18])))) ) ) + + .dataa(!\PC_Reg_Display[2]~64_combout ), + .datab(!\HID_Hi_Low[0]~input_o ), + .datac(!\HID_PC[0]~input_o ), + .datad(!\PC|pc [18]), + .datae(gnd), + .dataf(!\PC|pc [2]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[2]~65_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[2]~65 .extended_lut = "off"; +defparam \PC_Reg_Display[2]~65 .lut_mask = 64'h505350535C5F5C5F; +defparam \PC_Reg_Display[2]~65 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X47_Y6_N27 +cyclonev_lcell_comb \display|digit0|Mux5~0 ( +// Equation(s): +// \display|digit0|Mux5~0_combout = ( \PC_Reg_Display[2]~65_combout & ( (!\PC_Reg_Display[1]~43_combout & (!\PC_Reg_Display[0]~21_combout $ (\PC_Reg_Display[3]~87_combout ))) ) ) # ( !\PC_Reg_Display[2]~65_combout & ( (\PC_Reg_Display[0]~21_combout & +// (!\PC_Reg_Display[3]~87_combout $ (\PC_Reg_Display[1]~43_combout ))) ) ) + + .dataa(!\PC_Reg_Display[0]~21_combout ), + .datab(gnd), + .datac(!\PC_Reg_Display[3]~87_combout ), + .datad(!\PC_Reg_Display[1]~43_combout ), + .datae(gnd), + .dataf(!\PC_Reg_Display[2]~65_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\display|digit0|Mux5~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \display|digit0|Mux5~0 .extended_lut = "off"; +defparam \display|digit0|Mux5~0 .lut_mask = 64'h50055005A500A500; +defparam \display|digit0|Mux5~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X47_Y6_N45 +cyclonev_lcell_comb \display|digit0|Mux4~0 ( +// Equation(s): +// \display|digit0|Mux4~0_combout = ( \PC_Reg_Display[2]~65_combout & ( (!\PC_Reg_Display[0]~21_combout & ((\PC_Reg_Display[1]~43_combout ) # (\PC_Reg_Display[3]~87_combout ))) # (\PC_Reg_Display[0]~21_combout & (!\PC_Reg_Display[3]~87_combout $ +// (\PC_Reg_Display[1]~43_combout ))) ) ) # ( !\PC_Reg_Display[2]~65_combout & ( (\PC_Reg_Display[0]~21_combout & (\PC_Reg_Display[3]~87_combout & \PC_Reg_Display[1]~43_combout )) ) ) + + .dataa(!\PC_Reg_Display[0]~21_combout ), + .datab(gnd), + .datac(!\PC_Reg_Display[3]~87_combout ), + .datad(!\PC_Reg_Display[1]~43_combout ), + .datae(gnd), + .dataf(!\PC_Reg_Display[2]~65_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\display|digit0|Mux4~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \display|digit0|Mux4~0 .extended_lut = "off"; +defparam \display|digit0|Mux4~0 .lut_mask = 64'h000500055AAF5AAF; +defparam \display|digit0|Mux4~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X47_Y6_N6 +cyclonev_lcell_comb \display|digit0|Mux3~0 ( +// Equation(s): +// \display|digit0|Mux3~0_combout = ( \PC_Reg_Display[3]~87_combout & ( (\PC_Reg_Display[2]~65_combout & ((!\PC_Reg_Display[0]~21_combout ) # (\PC_Reg_Display[1]~43_combout ))) ) ) # ( !\PC_Reg_Display[3]~87_combout & ( (!\PC_Reg_Display[2]~65_combout & +// (!\PC_Reg_Display[0]~21_combout & \PC_Reg_Display[1]~43_combout )) ) ) + + .dataa(!\PC_Reg_Display[2]~65_combout ), + .datab(gnd), + .datac(!\PC_Reg_Display[0]~21_combout ), + .datad(!\PC_Reg_Display[1]~43_combout ), + .datae(gnd), + .dataf(!\PC_Reg_Display[3]~87_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\display|digit0|Mux3~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \display|digit0|Mux3~0 .extended_lut = "off"; +defparam \display|digit0|Mux3~0 .lut_mask = 64'h00A000A050555055; +defparam \display|digit0|Mux3~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X47_Y6_N9 +cyclonev_lcell_comb \display|digit0|Mux2~0 ( +// Equation(s): +// \display|digit0|Mux2~0_combout = ( \PC_Reg_Display[0]~21_combout & ( !\PC_Reg_Display[2]~65_combout $ (\PC_Reg_Display[1]~43_combout ) ) ) # ( !\PC_Reg_Display[0]~21_combout & ( (!\PC_Reg_Display[2]~65_combout & (\PC_Reg_Display[3]~87_combout & +// \PC_Reg_Display[1]~43_combout )) # (\PC_Reg_Display[2]~65_combout & (!\PC_Reg_Display[3]~87_combout & !\PC_Reg_Display[1]~43_combout )) ) ) + + .dataa(!\PC_Reg_Display[2]~65_combout ), + .datab(!\PC_Reg_Display[3]~87_combout ), + .datac(gnd), + .datad(!\PC_Reg_Display[1]~43_combout ), + .datae(gnd), + .dataf(!\PC_Reg_Display[0]~21_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\display|digit0|Mux2~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \display|digit0|Mux2~0 .extended_lut = "off"; +defparam \display|digit0|Mux2~0 .lut_mask = 64'h44224422AA55AA55; +defparam \display|digit0|Mux2~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X47_Y6_N54 +cyclonev_lcell_comb \display|digit0|Mux1~0 ( +// Equation(s): +// \display|digit0|Mux1~0_combout = ( \PC_Reg_Display[3]~87_combout & ( (!\PC_Reg_Display[2]~65_combout & (\PC_Reg_Display[0]~21_combout & !\PC_Reg_Display[1]~43_combout )) ) ) # ( !\PC_Reg_Display[3]~87_combout & ( ((\PC_Reg_Display[2]~65_combout & +// !\PC_Reg_Display[1]~43_combout )) # (\PC_Reg_Display[0]~21_combout ) ) ) + + .dataa(!\PC_Reg_Display[2]~65_combout ), + .datab(gnd), + .datac(!\PC_Reg_Display[0]~21_combout ), + .datad(!\PC_Reg_Display[1]~43_combout ), + .datae(gnd), + .dataf(!\PC_Reg_Display[3]~87_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\display|digit0|Mux1~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \display|digit0|Mux1~0 .extended_lut = "off"; +defparam \display|digit0|Mux1~0 .lut_mask = 64'h5F0F5F0F0A000A00; +defparam \display|digit0|Mux1~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X47_Y6_N57 +cyclonev_lcell_comb \display|digit0|Mux0~0 ( +// Equation(s): +// \display|digit0|Mux0~0_combout = ( \PC_Reg_Display[0]~21_combout & ( !\PC_Reg_Display[3]~87_combout $ (((\PC_Reg_Display[2]~65_combout & !\PC_Reg_Display[1]~43_combout ))) ) ) # ( !\PC_Reg_Display[0]~21_combout & ( (!\PC_Reg_Display[2]~65_combout & +// (!\PC_Reg_Display[3]~87_combout & \PC_Reg_Display[1]~43_combout )) ) ) + + .dataa(!\PC_Reg_Display[2]~65_combout ), + .datab(!\PC_Reg_Display[3]~87_combout ), + .datac(gnd), + .datad(!\PC_Reg_Display[1]~43_combout ), + .datae(gnd), + .dataf(!\PC_Reg_Display[0]~21_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\display|digit0|Mux0~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \display|digit0|Mux0~0 .extended_lut = "off"; +defparam \display|digit0|Mux0~0 .lut_mask = 64'h0088008899CC99CC; +defparam \display|digit0|Mux0~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X47_Y6_N48 +cyclonev_lcell_comb \display|digit0|WideOr0~0 ( +// Equation(s): +// \display|digit0|WideOr0~0_combout = ( \PC_Reg_Display[2]~65_combout & ( (!\PC_Reg_Display[1]~43_combout & ((!\PC_Reg_Display[3]~87_combout ) # (\PC_Reg_Display[0]~21_combout ))) # (\PC_Reg_Display[1]~43_combout & ((!\PC_Reg_Display[0]~21_combout ) # +// (\PC_Reg_Display[3]~87_combout ))) ) ) # ( !\PC_Reg_Display[2]~65_combout & ( (\PC_Reg_Display[3]~87_combout ) # (\PC_Reg_Display[1]~43_combout ) ) ) + + .dataa(!\PC_Reg_Display[1]~43_combout ), + .datab(!\PC_Reg_Display[3]~87_combout ), + .datac(!\PC_Reg_Display[0]~21_combout ), + .datad(gnd), + .datae(gnd), + .dataf(!\PC_Reg_Display[2]~65_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\display|digit0|WideOr0~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \display|digit0|WideOr0~0 .extended_lut = "off"; +defparam \display|digit0|WideOr0~0 .lut_mask = 64'h77777777DBDBDBDB; +defparam \display|digit0|WideOr0~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X41_Y14_N21 +cyclonev_lcell_comb \REGS|regs[3][4]~feeder ( +// Equation(s): +// \REGS|regs[3][4]~feeder_combout = ( \rd[4]~434_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[4]~434_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[3][4]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[3][4]~feeder .extended_lut = "off"; +defparam \REGS|regs[3][4]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[3][4]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X41_Y14_N22 +dffeas \REGS|regs[3][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[3][4]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~36_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[3][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[3][4] .is_wysiwyg = "true"; +defparam \REGS|regs[3][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X41_Y4_N20 +dffeas \REGS|regs[3][20] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[20]~348_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~36_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[3][20]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[3][20] .is_wysiwyg = "true"; +defparam \REGS|regs[3][20] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X40_Y5_N38 +dffeas \REGS|regs[2][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[2][4]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~32_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[2][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[2][4] .is_wysiwyg = "true"; +defparam \REGS|regs[2][4] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X41_Y4_N18 +cyclonev_lcell_comb \PC_Reg_Display[4]~89 ( +// Equation(s): +// \PC_Reg_Display[4]~89_combout = ( \REGS|regs[3][20]~q & ( \REGS|regs[2][4]~q & ( (!\HID_Hi_Low[0]~input_o & ((!\HID_Register[0]~input_o ) # ((\REGS|regs[3][4]~q )))) # (\HID_Hi_Low[0]~input_o & (((\REGS|regs[2][20]~q )) # (\HID_Register[0]~input_o +// ))) ) ) ) # ( !\REGS|regs[3][20]~q & ( \REGS|regs[2][4]~q & ( (!\HID_Hi_Low[0]~input_o & ((!\HID_Register[0]~input_o ) # ((\REGS|regs[3][4]~q )))) # (\HID_Hi_Low[0]~input_o & (!\HID_Register[0]~input_o & ((\REGS|regs[2][20]~q )))) ) ) ) # ( +// \REGS|regs[3][20]~q & ( !\REGS|regs[2][4]~q & ( (!\HID_Hi_Low[0]~input_o & (\HID_Register[0]~input_o & (\REGS|regs[3][4]~q ))) # (\HID_Hi_Low[0]~input_o & (((\REGS|regs[2][20]~q )) # (\HID_Register[0]~input_o ))) ) ) ) # ( !\REGS|regs[3][20]~q & ( +// !\REGS|regs[2][4]~q & ( (!\HID_Hi_Low[0]~input_o & (\HID_Register[0]~input_o & (\REGS|regs[3][4]~q ))) # (\HID_Hi_Low[0]~input_o & (!\HID_Register[0]~input_o & ((\REGS|regs[2][20]~q )))) ) ) ) + + .dataa(!\HID_Hi_Low[0]~input_o ), + .datab(!\HID_Register[0]~input_o ), + .datac(!\REGS|regs[3][4]~q ), + .datad(!\REGS|regs[2][20]~q ), + .datae(!\REGS|regs[3][20]~q ), + .dataf(!\REGS|regs[2][4]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[4]~89_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[4]~89 .extended_lut = "off"; +defparam \PC_Reg_Display[4]~89 .lut_mask = 64'h024613578ACE9BDF; +defparam \PC_Reg_Display[4]~89 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X41_Y4_N14 +dffeas \REGS|regs[7][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[4]~434_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~38_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[7][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[7][4] .is_wysiwyg = "true"; +defparam \REGS|regs[7][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X41_Y4_N17 +dffeas \REGS|regs[7][20] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[20]~348_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~38_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[7][20]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[7][20] .is_wysiwyg = "true"; +defparam \REGS|regs[7][20] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X41_Y4_N15 +cyclonev_lcell_comb \PC_Reg_Display[4]~91 ( +// Equation(s): +// \PC_Reg_Display[4]~91_combout = ( \REGS|regs[7][20]~q & ( \REGS|regs[6][20]~q & ( ((!\HID_Register[0]~input_o & (\REGS|regs[6][4]~q )) # (\HID_Register[0]~input_o & ((\REGS|regs[7][4]~q )))) # (\HID_Hi_Low[0]~input_o ) ) ) ) # ( !\REGS|regs[7][20]~q +// & ( \REGS|regs[6][20]~q & ( (!\HID_Register[0]~input_o & (((\HID_Hi_Low[0]~input_o )) # (\REGS|regs[6][4]~q ))) # (\HID_Register[0]~input_o & (((\REGS|regs[7][4]~q & !\HID_Hi_Low[0]~input_o )))) ) ) ) # ( \REGS|regs[7][20]~q & ( !\REGS|regs[6][20]~q +// & ( (!\HID_Register[0]~input_o & (\REGS|regs[6][4]~q & ((!\HID_Hi_Low[0]~input_o )))) # (\HID_Register[0]~input_o & (((\HID_Hi_Low[0]~input_o ) # (\REGS|regs[7][4]~q )))) ) ) ) # ( !\REGS|regs[7][20]~q & ( !\REGS|regs[6][20]~q & ( +// (!\HID_Hi_Low[0]~input_o & ((!\HID_Register[0]~input_o & (\REGS|regs[6][4]~q )) # (\HID_Register[0]~input_o & ((\REGS|regs[7][4]~q ))))) ) ) ) + + .dataa(!\REGS|regs[6][4]~q ), + .datab(!\HID_Register[0]~input_o ), + .datac(!\REGS|regs[7][4]~q ), + .datad(!\HID_Hi_Low[0]~input_o ), + .datae(!\REGS|regs[7][20]~q ), + .dataf(!\REGS|regs[6][20]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[4]~91_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[4]~91 .extended_lut = "off"; +defparam \PC_Reg_Display[4]~91 .lut_mask = 64'h4700473347CC47FF; +defparam \PC_Reg_Display[4]~91 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X37_Y7_N11 +dffeas \REGS|regs[5][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[4]~434_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~30_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[5][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[5][4] .is_wysiwyg = "true"; +defparam \REGS|regs[5][4] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y7_N6 +cyclonev_lcell_comb \PC_Reg_Display[4]~90 ( +// Equation(s): +// \PC_Reg_Display[4]~90_combout = ( \REGS|regs[4][4]~q & ( \HID_Hi_Low[0]~input_o & ( (!\HID_Register[0]~input_o & (\REGS|regs[4][20]~q )) # (\HID_Register[0]~input_o & ((\REGS|regs[5][20]~q ))) ) ) ) # ( !\REGS|regs[4][4]~q & ( \HID_Hi_Low[0]~input_o +// & ( (!\HID_Register[0]~input_o & (\REGS|regs[4][20]~q )) # (\HID_Register[0]~input_o & ((\REGS|regs[5][20]~q ))) ) ) ) # ( \REGS|regs[4][4]~q & ( !\HID_Hi_Low[0]~input_o & ( (!\HID_Register[0]~input_o ) # (\REGS|regs[5][4]~q ) ) ) ) # ( +// !\REGS|regs[4][4]~q & ( !\HID_Hi_Low[0]~input_o & ( (\HID_Register[0]~input_o & \REGS|regs[5][4]~q ) ) ) ) + + .dataa(!\HID_Register[0]~input_o ), + .datab(!\REGS|regs[4][20]~q ), + .datac(!\REGS|regs[5][20]~q ), + .datad(!\REGS|regs[5][4]~q ), + .datae(!\REGS|regs[4][4]~q ), + .dataf(!\HID_Hi_Low[0]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[4]~90_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[4]~90 .extended_lut = "off"; +defparam \PC_Reg_Display[4]~90 .lut_mask = 64'h0055AAFF27272727; +defparam \PC_Reg_Display[4]~90 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X41_Y4_N51 +cyclonev_lcell_comb \PC_Reg_Display[4]~88 ( +// Equation(s): +// \PC_Reg_Display[4]~88_combout = ( \REGS|regs[1][4]~q & ( \REGS|regs[1][20]~q & ( \HID_Register[0]~input_o ) ) ) # ( !\REGS|regs[1][4]~q & ( \REGS|regs[1][20]~q & ( (\HID_Hi_Low[0]~input_o & \HID_Register[0]~input_o ) ) ) ) # ( \REGS|regs[1][4]~q & +// ( !\REGS|regs[1][20]~q & ( (!\HID_Hi_Low[0]~input_o & \HID_Register[0]~input_o ) ) ) ) + + .dataa(!\HID_Hi_Low[0]~input_o ), + .datab(gnd), + .datac(gnd), + .datad(!\HID_Register[0]~input_o ), + .datae(!\REGS|regs[1][4]~q ), + .dataf(!\REGS|regs[1][20]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[4]~88_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[4]~88 .extended_lut = "off"; +defparam \PC_Reg_Display[4]~88 .lut_mask = 64'h000000AA005500FF; +defparam \PC_Reg_Display[4]~88 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X41_Y4_N30 +cyclonev_lcell_comb \PC_Reg_Display[4]~92 ( +// Equation(s): +// \PC_Reg_Display[4]~92_combout = ( \PC_Reg_Display[4]~90_combout & ( \PC_Reg_Display[4]~88_combout & ( (!\HID_Register[1]~input_o ) # ((!\HID_Register[2]~input_o & (\PC_Reg_Display[4]~89_combout )) # (\HID_Register[2]~input_o & +// ((\PC_Reg_Display[4]~91_combout )))) ) ) ) # ( !\PC_Reg_Display[4]~90_combout & ( \PC_Reg_Display[4]~88_combout & ( (!\HID_Register[2]~input_o & ((!\HID_Register[1]~input_o ) # ((\PC_Reg_Display[4]~89_combout )))) # (\HID_Register[2]~input_o & +// (\HID_Register[1]~input_o & ((\PC_Reg_Display[4]~91_combout )))) ) ) ) # ( \PC_Reg_Display[4]~90_combout & ( !\PC_Reg_Display[4]~88_combout & ( (!\HID_Register[2]~input_o & (\HID_Register[1]~input_o & (\PC_Reg_Display[4]~89_combout ))) # +// (\HID_Register[2]~input_o & ((!\HID_Register[1]~input_o ) # ((\PC_Reg_Display[4]~91_combout )))) ) ) ) # ( !\PC_Reg_Display[4]~90_combout & ( !\PC_Reg_Display[4]~88_combout & ( (\HID_Register[1]~input_o & ((!\HID_Register[2]~input_o & +// (\PC_Reg_Display[4]~89_combout )) # (\HID_Register[2]~input_o & ((\PC_Reg_Display[4]~91_combout ))))) ) ) ) + + .dataa(!\HID_Register[2]~input_o ), + .datab(!\HID_Register[1]~input_o ), + .datac(!\PC_Reg_Display[4]~89_combout ), + .datad(!\PC_Reg_Display[4]~91_combout ), + .datae(!\PC_Reg_Display[4]~90_combout ), + .dataf(!\PC_Reg_Display[4]~88_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[4]~92_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[4]~92 .extended_lut = "off"; +defparam \PC_Reg_Display[4]~92 .lut_mask = 64'h021346578A9BCEDF; +defparam \PC_Reg_Display[4]~92 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X38_Y5_N24 +cyclonev_lcell_comb \PC_Reg_Display[4]~106 ( +// Equation(s): +// \PC_Reg_Display[4]~106_combout = ( \REGS|regs[29][4]~q & ( \REGS|regs[31][20]~q & ( (!\HID_Register[1]~input_o & (((!\HID_Hi_Low[0]~input_o ) # (\REGS|regs[29][20]~q )))) # (\HID_Register[1]~input_o & (((\HID_Hi_Low[0]~input_o )) # +// (\REGS|regs[31][4]~q ))) ) ) ) # ( !\REGS|regs[29][4]~q & ( \REGS|regs[31][20]~q & ( (!\HID_Register[1]~input_o & (((\HID_Hi_Low[0]~input_o & \REGS|regs[29][20]~q )))) # (\HID_Register[1]~input_o & (((\HID_Hi_Low[0]~input_o )) # (\REGS|regs[31][4]~q +// ))) ) ) ) # ( \REGS|regs[29][4]~q & ( !\REGS|regs[31][20]~q & ( (!\HID_Register[1]~input_o & (((!\HID_Hi_Low[0]~input_o ) # (\REGS|regs[29][20]~q )))) # (\HID_Register[1]~input_o & (\REGS|regs[31][4]~q & (!\HID_Hi_Low[0]~input_o ))) ) ) ) # ( +// !\REGS|regs[29][4]~q & ( !\REGS|regs[31][20]~q & ( (!\HID_Register[1]~input_o & (((\HID_Hi_Low[0]~input_o & \REGS|regs[29][20]~q )))) # (\HID_Register[1]~input_o & (\REGS|regs[31][4]~q & (!\HID_Hi_Low[0]~input_o ))) ) ) ) + + .dataa(!\HID_Register[1]~input_o ), + .datab(!\REGS|regs[31][4]~q ), + .datac(!\HID_Hi_Low[0]~input_o ), + .datad(!\REGS|regs[29][20]~q ), + .datae(!\REGS|regs[29][4]~q ), + .dataf(!\REGS|regs[31][20]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[4]~106_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[4]~106 .extended_lut = "off"; +defparam \PC_Reg_Display[4]~106 .lut_mask = 64'h101AB0BA151FB5BF; +defparam \PC_Reg_Display[4]~106 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X43_Y4_N46 +dffeas \REGS|regs[28][4]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[4]~434_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~8_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[28][4]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[28][4]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[28][4]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: FF_X37_Y4_N31 +dffeas \REGS|regs[30][4]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[30][4]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~10_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[30][4]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[30][4]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[30][4]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X38_Y4_N54 +cyclonev_lcell_comb \PC_Reg_Display[4]~104 ( +// Equation(s): +// \PC_Reg_Display[4]~104_combout = ( \REGS|regs[28][20]~q & ( \REGS|regs[30][4]~DUPLICATE_q & ( (!\HID_Register[1]~input_o & (((\HID_Hi_Low[0]~input_o )) # (\REGS|regs[28][4]~DUPLICATE_q ))) # (\HID_Register[1]~input_o & (((!\HID_Hi_Low[0]~input_o ) # +// (\REGS|regs[30][20]~q )))) ) ) ) # ( !\REGS|regs[28][20]~q & ( \REGS|regs[30][4]~DUPLICATE_q & ( (!\HID_Register[1]~input_o & (\REGS|regs[28][4]~DUPLICATE_q & ((!\HID_Hi_Low[0]~input_o )))) # (\HID_Register[1]~input_o & (((!\HID_Hi_Low[0]~input_o ) # +// (\REGS|regs[30][20]~q )))) ) ) ) # ( \REGS|regs[28][20]~q & ( !\REGS|regs[30][4]~DUPLICATE_q & ( (!\HID_Register[1]~input_o & (((\HID_Hi_Low[0]~input_o )) # (\REGS|regs[28][4]~DUPLICATE_q ))) # (\HID_Register[1]~input_o & (((\REGS|regs[30][20]~q & +// \HID_Hi_Low[0]~input_o )))) ) ) ) # ( !\REGS|regs[28][20]~q & ( !\REGS|regs[30][4]~DUPLICATE_q & ( (!\HID_Register[1]~input_o & (\REGS|regs[28][4]~DUPLICATE_q & ((!\HID_Hi_Low[0]~input_o )))) # (\HID_Register[1]~input_o & (((\REGS|regs[30][20]~q & +// \HID_Hi_Low[0]~input_o )))) ) ) ) + + .dataa(!\REGS|regs[28][4]~DUPLICATE_q ), + .datab(!\HID_Register[1]~input_o ), + .datac(!\REGS|regs[30][20]~q ), + .datad(!\HID_Hi_Low[0]~input_o ), + .datae(!\REGS|regs[28][20]~q ), + .dataf(!\REGS|regs[30][4]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[4]~104_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[4]~104 .extended_lut = "off"; +defparam \PC_Reg_Display[4]~104 .lut_mask = 64'h440344CF770377CF; +defparam \PC_Reg_Display[4]~104 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X41_Y3_N33 +cyclonev_lcell_comb \PC_Reg_Display[4]~103 ( +// Equation(s): +// \PC_Reg_Display[4]~103_combout = ( \REGS|regs[24][20]~q & ( \REGS|regs[26][20]~q & ( ((!\HID_Register[1]~input_o & ((\REGS|regs[24][4]~q ))) # (\HID_Register[1]~input_o & (\REGS|regs[26][4]~q ))) # (\HID_Hi_Low[0]~input_o ) ) ) ) # ( +// !\REGS|regs[24][20]~q & ( \REGS|regs[26][20]~q & ( (!\HID_Register[1]~input_o & (((\REGS|regs[24][4]~q & !\HID_Hi_Low[0]~input_o )))) # (\HID_Register[1]~input_o & (((\HID_Hi_Low[0]~input_o )) # (\REGS|regs[26][4]~q ))) ) ) ) # ( \REGS|regs[24][20]~q +// & ( !\REGS|regs[26][20]~q & ( (!\HID_Register[1]~input_o & (((\HID_Hi_Low[0]~input_o ) # (\REGS|regs[24][4]~q )))) # (\HID_Register[1]~input_o & (\REGS|regs[26][4]~q & ((!\HID_Hi_Low[0]~input_o )))) ) ) ) # ( !\REGS|regs[24][20]~q & ( +// !\REGS|regs[26][20]~q & ( (!\HID_Hi_Low[0]~input_o & ((!\HID_Register[1]~input_o & ((\REGS|regs[24][4]~q ))) # (\HID_Register[1]~input_o & (\REGS|regs[26][4]~q )))) ) ) ) + + .dataa(!\REGS|regs[26][4]~q ), + .datab(!\HID_Register[1]~input_o ), + .datac(!\REGS|regs[24][4]~q ), + .datad(!\HID_Hi_Low[0]~input_o ), + .datae(!\REGS|regs[24][20]~q ), + .dataf(!\REGS|regs[26][20]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[4]~103_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[4]~103 .extended_lut = "off"; +defparam \PC_Reg_Display[4]~103 .lut_mask = 64'h1D001DCC1D331DFF; +defparam \PC_Reg_Display[4]~103 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X37_Y15_N34 +dffeas \REGS|regs[27][20]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[27][20]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~15_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[27][20]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[27][20]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[27][20]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X40_Y6_N24 +cyclonev_lcell_comb \PC_Reg_Display[4]~105 ( +// Equation(s): +// \PC_Reg_Display[4]~105_combout = ( \REGS|regs[25][20]~q & ( \HID_Register[1]~input_o & ( (!\HID_Hi_Low[0]~input_o & (\REGS|regs[27][4]~q )) # (\HID_Hi_Low[0]~input_o & ((\REGS|regs[27][20]~DUPLICATE_q ))) ) ) ) # ( !\REGS|regs[25][20]~q & ( +// \HID_Register[1]~input_o & ( (!\HID_Hi_Low[0]~input_o & (\REGS|regs[27][4]~q )) # (\HID_Hi_Low[0]~input_o & ((\REGS|regs[27][20]~DUPLICATE_q ))) ) ) ) # ( \REGS|regs[25][20]~q & ( !\HID_Register[1]~input_o & ( (\REGS|regs[25][4]~q ) # +// (\HID_Hi_Low[0]~input_o ) ) ) ) # ( !\REGS|regs[25][20]~q & ( !\HID_Register[1]~input_o & ( (!\HID_Hi_Low[0]~input_o & \REGS|regs[25][4]~q ) ) ) ) + + .dataa(!\HID_Hi_Low[0]~input_o ), + .datab(!\REGS|regs[25][4]~q ), + .datac(!\REGS|regs[27][4]~q ), + .datad(!\REGS|regs[27][20]~DUPLICATE_q ), + .datae(!\REGS|regs[25][20]~q ), + .dataf(!\HID_Register[1]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[4]~105_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[4]~105 .extended_lut = "off"; +defparam \PC_Reg_Display[4]~105 .lut_mask = 64'h222277770A5F0A5F; +defparam \PC_Reg_Display[4]~105 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X38_Y5_N42 +cyclonev_lcell_comb \PC_Reg_Display[4]~107 ( +// Equation(s): +// \PC_Reg_Display[4]~107_combout = ( \PC_Reg_Display[4]~105_combout & ( \HID_Register[0]~input_o & ( (!\HID_Register[2]~input_o ) # (\PC_Reg_Display[4]~106_combout ) ) ) ) # ( !\PC_Reg_Display[4]~105_combout & ( \HID_Register[0]~input_o & ( +// (\PC_Reg_Display[4]~106_combout & \HID_Register[2]~input_o ) ) ) ) # ( \PC_Reg_Display[4]~105_combout & ( !\HID_Register[0]~input_o & ( (!\HID_Register[2]~input_o & ((\PC_Reg_Display[4]~103_combout ))) # (\HID_Register[2]~input_o & +// (\PC_Reg_Display[4]~104_combout )) ) ) ) # ( !\PC_Reg_Display[4]~105_combout & ( !\HID_Register[0]~input_o & ( (!\HID_Register[2]~input_o & ((\PC_Reg_Display[4]~103_combout ))) # (\HID_Register[2]~input_o & (\PC_Reg_Display[4]~104_combout )) ) ) ) + + .dataa(!\PC_Reg_Display[4]~106_combout ), + .datab(!\PC_Reg_Display[4]~104_combout ), + .datac(!\PC_Reg_Display[4]~103_combout ), + .datad(!\HID_Register[2]~input_o ), + .datae(!\PC_Reg_Display[4]~105_combout ), + .dataf(!\HID_Register[0]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[4]~107_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[4]~107 .extended_lut = "off"; +defparam \PC_Reg_Display[4]~107 .lut_mask = 64'h0F330F330055FF55; +defparam \PC_Reg_Display[4]~107 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X38_Y16_N37 +dffeas \REGS|regs[19][20] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[19][20]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~14_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[19][20]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[19][20] .is_wysiwyg = "true"; +defparam \REGS|regs[19][20] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X36_Y9_N22 +dffeas \REGS|regs[23][20] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[20]~348_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~18_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[23][20]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[23][20] .is_wysiwyg = "true"; +defparam \REGS|regs[23][20] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X43_Y4_N36 +cyclonev_lcell_comb \PC_Reg_Display[4]~96 ( +// Equation(s): +// \PC_Reg_Display[4]~96_combout = ( \REGS|regs[22][20]~q & ( \REGS|regs[23][20]~q & ( ((!\HID_Register[0]~input_o & ((\REGS|regs[18][20]~q ))) # (\HID_Register[0]~input_o & (\REGS|regs[19][20]~q ))) # (\HID_Register[2]~input_o ) ) ) ) # ( +// !\REGS|regs[22][20]~q & ( \REGS|regs[23][20]~q & ( (!\HID_Register[2]~input_o & ((!\HID_Register[0]~input_o & ((\REGS|regs[18][20]~q ))) # (\HID_Register[0]~input_o & (\REGS|regs[19][20]~q )))) # (\HID_Register[2]~input_o & +// (((\HID_Register[0]~input_o )))) ) ) ) # ( \REGS|regs[22][20]~q & ( !\REGS|regs[23][20]~q & ( (!\HID_Register[2]~input_o & ((!\HID_Register[0]~input_o & ((\REGS|regs[18][20]~q ))) # (\HID_Register[0]~input_o & (\REGS|regs[19][20]~q )))) # +// (\HID_Register[2]~input_o & (((!\HID_Register[0]~input_o )))) ) ) ) # ( !\REGS|regs[22][20]~q & ( !\REGS|regs[23][20]~q & ( (!\HID_Register[2]~input_o & ((!\HID_Register[0]~input_o & ((\REGS|regs[18][20]~q ))) # (\HID_Register[0]~input_o & +// (\REGS|regs[19][20]~q )))) ) ) ) + + .dataa(!\REGS|regs[19][20]~q ), + .datab(!\HID_Register[2]~input_o ), + .datac(!\REGS|regs[18][20]~q ), + .datad(!\HID_Register[0]~input_o ), + .datae(!\REGS|regs[22][20]~q ), + .dataf(!\REGS|regs[23][20]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[4]~96_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[4]~96 .extended_lut = "off"; +defparam \PC_Reg_Display[4]~96 .lut_mask = 64'h0C443F440C773F77; +defparam \PC_Reg_Display[4]~96 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X36_Y7_N1 +dffeas \REGS|regs[23][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[4]~434_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~18_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[23][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[23][4] .is_wysiwyg = "true"; +defparam \REGS|regs[23][4] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X41_Y6_N49 +dffeas \REGS|regs[19][4]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[19][4]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~14_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[19][4]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[19][4]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[19][4]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X43_Y4_N12 +cyclonev_lcell_comb \PC_Reg_Display[4]~95 ( +// Equation(s): +// \PC_Reg_Display[4]~95_combout = ( \REGS|regs[22][4]~q & ( \REGS|regs[19][4]~DUPLICATE_q & ( (!\HID_Register[2]~input_o & (((\HID_Register[0]~input_o )) # (\REGS|regs[18][4]~q ))) # (\HID_Register[2]~input_o & (((!\HID_Register[0]~input_o ) # +// (\REGS|regs[23][4]~q )))) ) ) ) # ( !\REGS|regs[22][4]~q & ( \REGS|regs[19][4]~DUPLICATE_q & ( (!\HID_Register[2]~input_o & (((\HID_Register[0]~input_o )) # (\REGS|regs[18][4]~q ))) # (\HID_Register[2]~input_o & (((\REGS|regs[23][4]~q & +// \HID_Register[0]~input_o )))) ) ) ) # ( \REGS|regs[22][4]~q & ( !\REGS|regs[19][4]~DUPLICATE_q & ( (!\HID_Register[2]~input_o & (\REGS|regs[18][4]~q & ((!\HID_Register[0]~input_o )))) # (\HID_Register[2]~input_o & (((!\HID_Register[0]~input_o ) # +// (\REGS|regs[23][4]~q )))) ) ) ) # ( !\REGS|regs[22][4]~q & ( !\REGS|regs[19][4]~DUPLICATE_q & ( (!\HID_Register[2]~input_o & (\REGS|regs[18][4]~q & ((!\HID_Register[0]~input_o )))) # (\HID_Register[2]~input_o & (((\REGS|regs[23][4]~q & +// \HID_Register[0]~input_o )))) ) ) ) + + .dataa(!\REGS|regs[18][4]~q ), + .datab(!\HID_Register[2]~input_o ), + .datac(!\REGS|regs[23][4]~q ), + .datad(!\HID_Register[0]~input_o ), + .datae(!\REGS|regs[22][4]~q ), + .dataf(!\REGS|regs[19][4]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[4]~95_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[4]~95 .extended_lut = "off"; +defparam \PC_Reg_Display[4]~95 .lut_mask = 64'h4403770344CF77CF; +defparam \PC_Reg_Display[4]~95 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X38_Y5_N34 +dffeas \REGS|regs[20][20] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[20]~348_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~7_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[20][20]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[20][20] .is_wysiwyg = "true"; +defparam \REGS|regs[20][20] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X40_Y3_N53 +dffeas \REGS|regs[21][20] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[20]~348_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~16_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[21][20]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[21][20] .is_wysiwyg = "true"; +defparam \REGS|regs[21][20] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X40_Y3_N8 +dffeas \REGS|regs[17][20] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[20]~348_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~11_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[17][20]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[17][20] .is_wysiwyg = "true"; +defparam \REGS|regs[17][20] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X40_Y3_N51 +cyclonev_lcell_comb \PC_Reg_Display[4]~94 ( +// Equation(s): +// \PC_Reg_Display[4]~94_combout = ( \REGS|regs[21][20]~q & ( \REGS|regs[17][20]~q & ( ((!\HID_Register[2]~input_o & (\REGS|regs[16][20]~q )) # (\HID_Register[2]~input_o & ((\REGS|regs[20][20]~q )))) # (\HID_Register[0]~input_o ) ) ) ) # ( +// !\REGS|regs[21][20]~q & ( \REGS|regs[17][20]~q & ( (!\HID_Register[0]~input_o & ((!\HID_Register[2]~input_o & (\REGS|regs[16][20]~q )) # (\HID_Register[2]~input_o & ((\REGS|regs[20][20]~q ))))) # (\HID_Register[0]~input_o & +// (((!\HID_Register[2]~input_o )))) ) ) ) # ( \REGS|regs[21][20]~q & ( !\REGS|regs[17][20]~q & ( (!\HID_Register[0]~input_o & ((!\HID_Register[2]~input_o & (\REGS|regs[16][20]~q )) # (\HID_Register[2]~input_o & ((\REGS|regs[20][20]~q ))))) # +// (\HID_Register[0]~input_o & (((\HID_Register[2]~input_o )))) ) ) ) # ( !\REGS|regs[21][20]~q & ( !\REGS|regs[17][20]~q & ( (!\HID_Register[0]~input_o & ((!\HID_Register[2]~input_o & (\REGS|regs[16][20]~q )) # (\HID_Register[2]~input_o & +// ((\REGS|regs[20][20]~q ))))) ) ) ) + + .dataa(!\HID_Register[0]~input_o ), + .datab(!\REGS|regs[16][20]~q ), + .datac(!\REGS|regs[20][20]~q ), + .datad(!\HID_Register[2]~input_o ), + .datae(!\REGS|regs[21][20]~q ), + .dataf(!\REGS|regs[17][20]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[4]~94_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[4]~94 .extended_lut = "off"; +defparam \PC_Reg_Display[4]~94 .lut_mask = 64'h220A225F770A775F; +defparam \PC_Reg_Display[4]~94 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X43_Y4_N50 +dffeas \REGS|regs[21][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[4]~434_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~16_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[21][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[21][4] .is_wysiwyg = "true"; +defparam \REGS|regs[21][4] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X40_Y4_N48 +cyclonev_lcell_comb \REGS|regs[17][4]~feeder ( +// Equation(s): +// \REGS|regs[17][4]~feeder_combout = ( \rd[4]~434_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[4]~434_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[17][4]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[17][4]~feeder .extended_lut = "off"; +defparam \REGS|regs[17][4]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[17][4]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X40_Y4_N49 +dffeas \REGS|regs[17][4] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[17][4]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~11_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[17][4]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[17][4] .is_wysiwyg = "true"; +defparam \REGS|regs[17][4] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X43_Y4_N48 +cyclonev_lcell_comb \PC_Reg_Display[4]~93 ( +// Equation(s): +// \PC_Reg_Display[4]~93_combout = ( \REGS|regs[21][4]~q & ( \REGS|regs[17][4]~q & ( ((!\HID_Register[2]~input_o & (\REGS|regs[16][4]~q )) # (\HID_Register[2]~input_o & ((\REGS|regs[20][4]~q )))) # (\HID_Register[0]~input_o ) ) ) ) # ( +// !\REGS|regs[21][4]~q & ( \REGS|regs[17][4]~q & ( (!\HID_Register[2]~input_o & (((\HID_Register[0]~input_o )) # (\REGS|regs[16][4]~q ))) # (\HID_Register[2]~input_o & (((\REGS|regs[20][4]~q & !\HID_Register[0]~input_o )))) ) ) ) # ( +// \REGS|regs[21][4]~q & ( !\REGS|regs[17][4]~q & ( (!\HID_Register[2]~input_o & (\REGS|regs[16][4]~q & ((!\HID_Register[0]~input_o )))) # (\HID_Register[2]~input_o & (((\HID_Register[0]~input_o ) # (\REGS|regs[20][4]~q )))) ) ) ) # ( +// !\REGS|regs[21][4]~q & ( !\REGS|regs[17][4]~q & ( (!\HID_Register[0]~input_o & ((!\HID_Register[2]~input_o & (\REGS|regs[16][4]~q )) # (\HID_Register[2]~input_o & ((\REGS|regs[20][4]~q ))))) ) ) ) + + .dataa(!\REGS|regs[16][4]~q ), + .datab(!\HID_Register[2]~input_o ), + .datac(!\REGS|regs[20][4]~q ), + .datad(!\HID_Register[0]~input_o ), + .datae(!\REGS|regs[21][4]~q ), + .dataf(!\REGS|regs[17][4]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[4]~93_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[4]~93 .extended_lut = "off"; +defparam \PC_Reg_Display[4]~93 .lut_mask = 64'h4700473347CC47FF; +defparam \PC_Reg_Display[4]~93 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X43_Y4_N54 +cyclonev_lcell_comb \PC_Reg_Display[4]~97 ( +// Equation(s): +// \PC_Reg_Display[4]~97_combout = ( \HID_Register[1]~input_o & ( \PC_Reg_Display[4]~93_combout & ( (!\HID_Hi_Low[0]~input_o & ((\PC_Reg_Display[4]~95_combout ))) # (\HID_Hi_Low[0]~input_o & (\PC_Reg_Display[4]~96_combout )) ) ) ) # ( +// !\HID_Register[1]~input_o & ( \PC_Reg_Display[4]~93_combout & ( (!\HID_Hi_Low[0]~input_o ) # (\PC_Reg_Display[4]~94_combout ) ) ) ) # ( \HID_Register[1]~input_o & ( !\PC_Reg_Display[4]~93_combout & ( (!\HID_Hi_Low[0]~input_o & +// ((\PC_Reg_Display[4]~95_combout ))) # (\HID_Hi_Low[0]~input_o & (\PC_Reg_Display[4]~96_combout )) ) ) ) # ( !\HID_Register[1]~input_o & ( !\PC_Reg_Display[4]~93_combout & ( (\PC_Reg_Display[4]~94_combout & \HID_Hi_Low[0]~input_o ) ) ) ) + + .dataa(!\PC_Reg_Display[4]~96_combout ), + .datab(!\PC_Reg_Display[4]~95_combout ), + .datac(!\PC_Reg_Display[4]~94_combout ), + .datad(!\HID_Hi_Low[0]~input_o ), + .datae(!\HID_Register[1]~input_o ), + .dataf(!\PC_Reg_Display[4]~93_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[4]~97_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[4]~97 .extended_lut = "off"; +defparam \PC_Reg_Display[4]~97 .lut_mask = 64'h000F3355FF0F3355; +defparam \PC_Reg_Display[4]~97 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X42_Y8_N31 +dffeas \REGS|regs[9][4]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[9][4]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~29_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[9][4]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[9][4]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[9][4]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X40_Y6_N30 +cyclonev_lcell_comb \PC_Reg_Display[4]~100 ( +// Equation(s): +// \PC_Reg_Display[4]~100_combout = ( \HID_Hi_Low[0]~input_o & ( \REGS|regs[9][4]~DUPLICATE_q & ( (!\HID_Register[1]~input_o & (\REGS|regs[9][20]~q )) # (\HID_Register[1]~input_o & ((\REGS|regs[11][20]~q ))) ) ) ) # ( !\HID_Hi_Low[0]~input_o & ( +// \REGS|regs[9][4]~DUPLICATE_q & ( (!\HID_Register[1]~input_o ) # (\REGS|regs[11][4]~q ) ) ) ) # ( \HID_Hi_Low[0]~input_o & ( !\REGS|regs[9][4]~DUPLICATE_q & ( (!\HID_Register[1]~input_o & (\REGS|regs[9][20]~q )) # (\HID_Register[1]~input_o & +// ((\REGS|regs[11][20]~q ))) ) ) ) # ( !\HID_Hi_Low[0]~input_o & ( !\REGS|regs[9][4]~DUPLICATE_q & ( (\HID_Register[1]~input_o & \REGS|regs[11][4]~q ) ) ) ) + + .dataa(!\HID_Register[1]~input_o ), + .datab(!\REGS|regs[9][20]~q ), + .datac(!\REGS|regs[11][4]~q ), + .datad(!\REGS|regs[11][20]~q ), + .datae(!\HID_Hi_Low[0]~input_o ), + .dataf(!\REGS|regs[9][4]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[4]~100_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[4]~100 .extended_lut = "off"; +defparam \PC_Reg_Display[4]~100 .lut_mask = 64'h05052277AFAF2277; +defparam \PC_Reg_Display[4]~100 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X41_Y7_N3 +cyclonev_lcell_comb \PC_Reg_Display[4]~101 ( +// Equation(s): +// \PC_Reg_Display[4]~101_combout = ( \HID_Register[1]~input_o & ( \REGS|regs[15][4]~q & ( (!\HID_Hi_Low[0]~input_o ) # (\REGS|regs[15][20]~q ) ) ) ) # ( !\HID_Register[1]~input_o & ( \REGS|regs[15][4]~q & ( (!\HID_Hi_Low[0]~input_o & +// ((\REGS|regs[13][4]~q ))) # (\HID_Hi_Low[0]~input_o & (\REGS|regs[13][20]~q )) ) ) ) # ( \HID_Register[1]~input_o & ( !\REGS|regs[15][4]~q & ( (\REGS|regs[15][20]~q & \HID_Hi_Low[0]~input_o ) ) ) ) # ( !\HID_Register[1]~input_o & ( +// !\REGS|regs[15][4]~q & ( (!\HID_Hi_Low[0]~input_o & ((\REGS|regs[13][4]~q ))) # (\HID_Hi_Low[0]~input_o & (\REGS|regs[13][20]~q )) ) ) ) + + .dataa(!\REGS|regs[15][20]~q ), + .datab(!\REGS|regs[13][20]~q ), + .datac(!\REGS|regs[13][4]~q ), + .datad(!\HID_Hi_Low[0]~input_o ), + .datae(!\HID_Register[1]~input_o ), + .dataf(!\REGS|regs[15][4]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[4]~101_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[4]~101 .extended_lut = "off"; +defparam \PC_Reg_Display[4]~101 .lut_mask = 64'h0F3300550F33FF55; +defparam \PC_Reg_Display[4]~101 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y13_N18 +cyclonev_lcell_comb \PC_Reg_Display[4]~98 ( +// Equation(s): +// \PC_Reg_Display[4]~98_combout = ( \HID_Hi_Low[0]~input_o & ( \REGS|regs[8][20]~q & ( (!\HID_Register[1]~input_o ) # (\REGS|regs[10][20]~q ) ) ) ) # ( !\HID_Hi_Low[0]~input_o & ( \REGS|regs[8][20]~q & ( (!\HID_Register[1]~input_o & +// ((\REGS|regs[8][4]~DUPLICATE_q ))) # (\HID_Register[1]~input_o & (\REGS|regs[10][4]~q )) ) ) ) # ( \HID_Hi_Low[0]~input_o & ( !\REGS|regs[8][20]~q & ( (\REGS|regs[10][20]~q & \HID_Register[1]~input_o ) ) ) ) # ( !\HID_Hi_Low[0]~input_o & ( +// !\REGS|regs[8][20]~q & ( (!\HID_Register[1]~input_o & ((\REGS|regs[8][4]~DUPLICATE_q ))) # (\HID_Register[1]~input_o & (\REGS|regs[10][4]~q )) ) ) ) + + .dataa(!\REGS|regs[10][4]~q ), + .datab(!\REGS|regs[10][20]~q ), + .datac(!\HID_Register[1]~input_o ), + .datad(!\REGS|regs[8][4]~DUPLICATE_q ), + .datae(!\HID_Hi_Low[0]~input_o ), + .dataf(!\REGS|regs[8][20]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[4]~98_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[4]~98 .extended_lut = "off"; +defparam \PC_Reg_Display[4]~98 .lut_mask = 64'h05F5030305F5F3F3; +defparam \PC_Reg_Display[4]~98 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X37_Y7_N52 +dffeas \REGS|regs[12][20] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[20]~348_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~26_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[12][20]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[12][20] .is_wysiwyg = "true"; +defparam \REGS|regs[12][20] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X41_Y7_N48 +cyclonev_lcell_comb \PC_Reg_Display[4]~99 ( +// Equation(s): +// \PC_Reg_Display[4]~99_combout = ( \HID_Register[1]~input_o & ( \HID_Hi_Low[0]~input_o & ( \REGS|regs[14][20]~q ) ) ) # ( !\HID_Register[1]~input_o & ( \HID_Hi_Low[0]~input_o & ( \REGS|regs[12][20]~q ) ) ) # ( \HID_Register[1]~input_o & ( +// !\HID_Hi_Low[0]~input_o & ( \REGS|regs[14][4]~q ) ) ) # ( !\HID_Register[1]~input_o & ( !\HID_Hi_Low[0]~input_o & ( \REGS|regs[12][4]~q ) ) ) + + .dataa(!\REGS|regs[12][4]~q ), + .datab(!\REGS|regs[14][20]~q ), + .datac(!\REGS|regs[14][4]~q ), + .datad(!\REGS|regs[12][20]~q ), + .datae(!\HID_Register[1]~input_o ), + .dataf(!\HID_Hi_Low[0]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[4]~99_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[4]~99 .extended_lut = "off"; +defparam \PC_Reg_Display[4]~99 .lut_mask = 64'h55550F0F00FF3333; +defparam \PC_Reg_Display[4]~99 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X38_Y5_N3 +cyclonev_lcell_comb \PC_Reg_Display[4]~102 ( +// Equation(s): +// \PC_Reg_Display[4]~102_combout = ( \PC_Reg_Display[4]~99_combout & ( \HID_Register[2]~input_o & ( (!\HID_Register[0]~input_o ) # (\PC_Reg_Display[4]~101_combout ) ) ) ) # ( !\PC_Reg_Display[4]~99_combout & ( \HID_Register[2]~input_o & ( +// (\HID_Register[0]~input_o & \PC_Reg_Display[4]~101_combout ) ) ) ) # ( \PC_Reg_Display[4]~99_combout & ( !\HID_Register[2]~input_o & ( (!\HID_Register[0]~input_o & ((\PC_Reg_Display[4]~98_combout ))) # (\HID_Register[0]~input_o & +// (\PC_Reg_Display[4]~100_combout )) ) ) ) # ( !\PC_Reg_Display[4]~99_combout & ( !\HID_Register[2]~input_o & ( (!\HID_Register[0]~input_o & ((\PC_Reg_Display[4]~98_combout ))) # (\HID_Register[0]~input_o & (\PC_Reg_Display[4]~100_combout )) ) ) ) + + .dataa(!\HID_Register[0]~input_o ), + .datab(!\PC_Reg_Display[4]~100_combout ), + .datac(!\PC_Reg_Display[4]~101_combout ), + .datad(!\PC_Reg_Display[4]~98_combout ), + .datae(!\PC_Reg_Display[4]~99_combout ), + .dataf(!\HID_Register[2]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[4]~102_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[4]~102 .extended_lut = "off"; +defparam \PC_Reg_Display[4]~102 .lut_mask = 64'h11BB11BB0505AFAF; +defparam \PC_Reg_Display[4]~102 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X38_Y4_N51 +cyclonev_lcell_comb \PC_Reg_Display[4]~108 ( +// Equation(s): +// \PC_Reg_Display[4]~108_combout = ( \PC_Reg_Display[4]~97_combout & ( \PC_Reg_Display[4]~102_combout & ( (!\HID_Register[4]~input_o & (((\HID_Register[3]~input_o )) # (\PC_Reg_Display[4]~92_combout ))) # (\HID_Register[4]~input_o & +// (((!\HID_Register[3]~input_o ) # (\PC_Reg_Display[4]~107_combout )))) ) ) ) # ( !\PC_Reg_Display[4]~97_combout & ( \PC_Reg_Display[4]~102_combout & ( (!\HID_Register[4]~input_o & (((\HID_Register[3]~input_o )) # (\PC_Reg_Display[4]~92_combout ))) # +// (\HID_Register[4]~input_o & (((\HID_Register[3]~input_o & \PC_Reg_Display[4]~107_combout )))) ) ) ) # ( \PC_Reg_Display[4]~97_combout & ( !\PC_Reg_Display[4]~102_combout & ( (!\HID_Register[4]~input_o & (\PC_Reg_Display[4]~92_combout & +// (!\HID_Register[3]~input_o ))) # (\HID_Register[4]~input_o & (((!\HID_Register[3]~input_o ) # (\PC_Reg_Display[4]~107_combout )))) ) ) ) # ( !\PC_Reg_Display[4]~97_combout & ( !\PC_Reg_Display[4]~102_combout & ( (!\HID_Register[4]~input_o & +// (\PC_Reg_Display[4]~92_combout & (!\HID_Register[3]~input_o ))) # (\HID_Register[4]~input_o & (((\HID_Register[3]~input_o & \PC_Reg_Display[4]~107_combout )))) ) ) ) + + .dataa(!\PC_Reg_Display[4]~92_combout ), + .datab(!\HID_Register[4]~input_o ), + .datac(!\HID_Register[3]~input_o ), + .datad(!\PC_Reg_Display[4]~107_combout ), + .datae(!\PC_Reg_Display[4]~97_combout ), + .dataf(!\PC_Reg_Display[4]~102_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[4]~108_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[4]~108 .extended_lut = "off"; +defparam \PC_Reg_Display[4]~108 .lut_mask = 64'h404370734C4F7C7F; +defparam \PC_Reg_Display[4]~108 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X36_Y8_N56 +dffeas \PC|pc[20]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\Add0~25_sumout ), + .asdata(vcc), + .clrn(!\rst[0]~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\PC|pc[20]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \PC|pc[20]~DUPLICATE .is_wysiwyg = "true"; +defparam \PC|pc[20]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X36_Y8_N54 +cyclonev_lcell_comb \Add0~25 ( +// Equation(s): +// \Add0~25_sumout = SUM(( (pc_we[0] & \PC|pc[20]~DUPLICATE_q ) ) + ( (!pc_we[0] & \PC|pc[20]~DUPLICATE_q ) ) + ( \Add0~18 )) +// \Add0~26 = CARRY(( (pc_we[0] & \PC|pc[20]~DUPLICATE_q ) ) + ( (!pc_we[0] & \PC|pc[20]~DUPLICATE_q ) ) + ( \Add0~18 )) + + .dataa(gnd), + .datab(!pc_we[0]), + .datac(!\PC|pc[20]~DUPLICATE_q ), + .datad(gnd), + .datae(gnd), + .dataf(gnd), + .datag(gnd), + .cin(\Add0~18 ), + .sharein(gnd), + .combout(), + .sumout(\Add0~25_sumout ), + .cout(\Add0~26 ), + .shareout()); +// synopsys translate_off +defparam \Add0~25 .extended_lut = "off"; +defparam \Add0~25 .lut_mask = 64'h0000F3F300000303; +defparam \Add0~25 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X36_Y8_N55 +dffeas \PC|pc[20] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\Add0~25_sumout ), + .asdata(vcc), + .clrn(!\rst[0]~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\PC|pc [20]), + .prn(vcc)); +// synopsys translate_off +defparam \PC|pc[20] .is_wysiwyg = "true"; +defparam \PC|pc[20] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y4_N57 +cyclonev_lcell_comb \PC_Reg_Display[4]~109 ( +// Equation(s): +// \PC_Reg_Display[4]~109_combout = ( \HID_PC[0]~input_o & ( \PC|pc [20] & ( (\HID_Hi_Low[0]~input_o ) # (\PC|pc [4]) ) ) ) # ( !\HID_PC[0]~input_o & ( \PC|pc [20] & ( \PC_Reg_Display[4]~108_combout ) ) ) # ( \HID_PC[0]~input_o & ( !\PC|pc [20] & ( +// (\PC|pc [4] & !\HID_Hi_Low[0]~input_o ) ) ) ) # ( !\HID_PC[0]~input_o & ( !\PC|pc [20] & ( \PC_Reg_Display[4]~108_combout ) ) ) + + .dataa(!\PC|pc [4]), + .datab(!\HID_Hi_Low[0]~input_o ), + .datac(gnd), + .datad(!\PC_Reg_Display[4]~108_combout ), + .datae(!\HID_PC[0]~input_o ), + .dataf(!\PC|pc [20]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[4]~109_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[4]~109 .extended_lut = "off"; +defparam \PC_Reg_Display[4]~109 .lut_mask = 64'h00FF444400FF7777; +defparam \PC_Reg_Display[4]~109 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X36_Y8_N57 +cyclonev_lcell_comb \Add0~33 ( +// Equation(s): +// \Add0~33_sumout = SUM(( (pc_we[0] & \PC|pc [21]) ) + ( (!pc_we[0] & \PC|pc [21]) ) + ( \Add0~26 )) +// \Add0~34 = CARRY(( (pc_we[0] & \PC|pc [21]) ) + ( (!pc_we[0] & \PC|pc [21]) ) + ( \Add0~26 )) + + .dataa(gnd), + .datab(!pc_we[0]), + .datac(!\PC|pc [21]), + .datad(gnd), + .datae(gnd), + .dataf(gnd), + .datag(gnd), + .cin(\Add0~26 ), + .sharein(gnd), + .combout(), + .sumout(\Add0~33_sumout ), + .cout(\Add0~34 ), + .shareout()); +// synopsys translate_off +defparam \Add0~33 .extended_lut = "off"; +defparam \Add0~33 .lut_mask = 64'h0000F3F300000303; +defparam \Add0~33 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X36_Y8_N59 +dffeas \PC|pc[21] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\Add0~33_sumout ), + .asdata(vcc), + .clrn(!\rst[0]~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\PC|pc [21]), + .prn(vcc)); +// synopsys translate_off +defparam \PC|pc[21] .is_wysiwyg = "true"; +defparam \PC|pc[21] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X27_Y12_N48 +cyclonev_lcell_comb \PC_Reg_Display[5]~112 ( +// Equation(s): +// \PC_Reg_Display[5]~112_combout = ( \REGS|regs[5][21]~q & ( \REGS|regs[5][5]~q & ( ((!\HID_Hi_Low[0]~input_o & ((\REGS|regs[4][5]~q ))) # (\HID_Hi_Low[0]~input_o & (\REGS|regs[4][21]~q ))) # (\HID_Register[0]~input_o ) ) ) ) # ( !\REGS|regs[5][21]~q +// & ( \REGS|regs[5][5]~q & ( (!\HID_Register[0]~input_o & ((!\HID_Hi_Low[0]~input_o & ((\REGS|regs[4][5]~q ))) # (\HID_Hi_Low[0]~input_o & (\REGS|regs[4][21]~q )))) # (\HID_Register[0]~input_o & (((!\HID_Hi_Low[0]~input_o )))) ) ) ) # ( +// \REGS|regs[5][21]~q & ( !\REGS|regs[5][5]~q & ( (!\HID_Register[0]~input_o & ((!\HID_Hi_Low[0]~input_o & ((\REGS|regs[4][5]~q ))) # (\HID_Hi_Low[0]~input_o & (\REGS|regs[4][21]~q )))) # (\HID_Register[0]~input_o & (((\HID_Hi_Low[0]~input_o )))) ) ) +// ) # ( !\REGS|regs[5][21]~q & ( !\REGS|regs[5][5]~q & ( (!\HID_Register[0]~input_o & ((!\HID_Hi_Low[0]~input_o & ((\REGS|regs[4][5]~q ))) # (\HID_Hi_Low[0]~input_o & (\REGS|regs[4][21]~q )))) ) ) ) + + .dataa(!\REGS|regs[4][21]~q ), + .datab(!\HID_Register[0]~input_o ), + .datac(!\HID_Hi_Low[0]~input_o ), + .datad(!\REGS|regs[4][5]~q ), + .datae(!\REGS|regs[5][21]~q ), + .dataf(!\REGS|regs[5][5]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[5]~112_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[5]~112 .extended_lut = "off"; +defparam \PC_Reg_Display[5]~112 .lut_mask = 64'h04C407C734F437F7; +defparam \PC_Reg_Display[5]~112 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X31_Y14_N29 +dffeas \REGS|regs[1][21] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[21]~435_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~28_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[1][21]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[1][21] .is_wysiwyg = "true"; +defparam \REGS|regs[1][21] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X31_Y14_N30 +cyclonev_lcell_comb \PC_Reg_Display[5]~110 ( +// Equation(s): +// \PC_Reg_Display[5]~110_combout = ( \REGS|regs[1][5]~q & ( \HID_Register[0]~input_o & ( (!\HID_Hi_Low[0]~input_o ) # (\REGS|regs[1][21]~q ) ) ) ) # ( !\REGS|regs[1][5]~q & ( \HID_Register[0]~input_o & ( (\HID_Hi_Low[0]~input_o & \REGS|regs[1][21]~q ) +// ) ) ) + + .dataa(!\HID_Hi_Low[0]~input_o ), + .datab(gnd), + .datac(!\REGS|regs[1][21]~q ), + .datad(gnd), + .datae(!\REGS|regs[1][5]~q ), + .dataf(!\HID_Register[0]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[5]~110_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[5]~110 .extended_lut = "off"; +defparam \PC_Reg_Display[5]~110 .lut_mask = 64'h000000000505AFAF; +defparam \PC_Reg_Display[5]~110 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X27_Y12_N11 +dffeas \REGS|regs[7][5] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[5]~436_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~38_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[7][5]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[7][5] .is_wysiwyg = "true"; +defparam \REGS|regs[7][5] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y12_N8 +dffeas \REGS|regs[7][21] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[21]~435_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~38_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[7][21]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[7][21] .is_wysiwyg = "true"; +defparam \REGS|regs[7][21] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X27_Y12_N6 +cyclonev_lcell_comb \PC_Reg_Display[5]~113 ( +// Equation(s): +// \PC_Reg_Display[5]~113_combout = ( \REGS|regs[7][21]~q & ( \REGS|regs[6][5]~q & ( (!\HID_Hi_Low[0]~input_o & ((!\HID_Register[0]~input_o ) # ((\REGS|regs[7][5]~q )))) # (\HID_Hi_Low[0]~input_o & (((\REGS|regs[6][21]~q )) # (\HID_Register[0]~input_o +// ))) ) ) ) # ( !\REGS|regs[7][21]~q & ( \REGS|regs[6][5]~q & ( (!\HID_Hi_Low[0]~input_o & ((!\HID_Register[0]~input_o ) # ((\REGS|regs[7][5]~q )))) # (\HID_Hi_Low[0]~input_o & (!\HID_Register[0]~input_o & (\REGS|regs[6][21]~q ))) ) ) ) # ( +// \REGS|regs[7][21]~q & ( !\REGS|regs[6][5]~q & ( (!\HID_Hi_Low[0]~input_o & (\HID_Register[0]~input_o & ((\REGS|regs[7][5]~q )))) # (\HID_Hi_Low[0]~input_o & (((\REGS|regs[6][21]~q )) # (\HID_Register[0]~input_o ))) ) ) ) # ( !\REGS|regs[7][21]~q & ( +// !\REGS|regs[6][5]~q & ( (!\HID_Hi_Low[0]~input_o & (\HID_Register[0]~input_o & ((\REGS|regs[7][5]~q )))) # (\HID_Hi_Low[0]~input_o & (!\HID_Register[0]~input_o & (\REGS|regs[6][21]~q ))) ) ) ) + + .dataa(!\HID_Hi_Low[0]~input_o ), + .datab(!\HID_Register[0]~input_o ), + .datac(!\REGS|regs[6][21]~q ), + .datad(!\REGS|regs[7][5]~q ), + .datae(!\REGS|regs[7][21]~q ), + .dataf(!\REGS|regs[6][5]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[5]~113_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[5]~113 .extended_lut = "off"; +defparam \PC_Reg_Display[5]~113 .lut_mask = 64'h042615378CAE9DBF; +defparam \PC_Reg_Display[5]~113 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X27_Y12_N17 +dffeas \REGS|regs[3][5] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[5]~436_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~36_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[3][5]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[3][5] .is_wysiwyg = "true"; +defparam \REGS|regs[3][5] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y12_N14 +dffeas \REGS|regs[3][21] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[21]~435_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~36_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[3][21]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[3][21] .is_wysiwyg = "true"; +defparam \REGS|regs[3][21] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X27_Y12_N12 +cyclonev_lcell_comb \PC_Reg_Display[5]~111 ( +// Equation(s): +// \PC_Reg_Display[5]~111_combout = ( \REGS|regs[3][21]~q & ( \REGS|regs[2][21]~q & ( ((!\HID_Register[0]~input_o & (\REGS|regs[2][5]~q )) # (\HID_Register[0]~input_o & ((\REGS|regs[3][5]~q )))) # (\HID_Hi_Low[0]~input_o ) ) ) ) # ( !\REGS|regs[3][21]~q +// & ( \REGS|regs[2][21]~q & ( (!\HID_Register[0]~input_o & (((\HID_Hi_Low[0]~input_o )) # (\REGS|regs[2][5]~q ))) # (\HID_Register[0]~input_o & (((!\HID_Hi_Low[0]~input_o & \REGS|regs[3][5]~q )))) ) ) ) # ( \REGS|regs[3][21]~q & ( !\REGS|regs[2][21]~q +// & ( (!\HID_Register[0]~input_o & (\REGS|regs[2][5]~q & (!\HID_Hi_Low[0]~input_o ))) # (\HID_Register[0]~input_o & (((\REGS|regs[3][5]~q ) # (\HID_Hi_Low[0]~input_o )))) ) ) ) # ( !\REGS|regs[3][21]~q & ( !\REGS|regs[2][21]~q & ( +// (!\HID_Hi_Low[0]~input_o & ((!\HID_Register[0]~input_o & (\REGS|regs[2][5]~q )) # (\HID_Register[0]~input_o & ((\REGS|regs[3][5]~q ))))) ) ) ) + + .dataa(!\REGS|regs[2][5]~q ), + .datab(!\HID_Register[0]~input_o ), + .datac(!\HID_Hi_Low[0]~input_o ), + .datad(!\REGS|regs[3][5]~q ), + .datae(!\REGS|regs[3][21]~q ), + .dataf(!\REGS|regs[2][21]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[5]~111_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[5]~111 .extended_lut = "off"; +defparam \PC_Reg_Display[5]~111 .lut_mask = 64'h407043734C7C4F7F; +defparam \PC_Reg_Display[5]~111 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X27_Y12_N18 +cyclonev_lcell_comb \PC_Reg_Display[5]~114 ( +// Equation(s): +// \PC_Reg_Display[5]~114_combout = ( \HID_Register[1]~input_o & ( \PC_Reg_Display[5]~111_combout & ( (!\HID_Register[2]~input_o ) # (\PC_Reg_Display[5]~113_combout ) ) ) ) # ( !\HID_Register[1]~input_o & ( \PC_Reg_Display[5]~111_combout & ( +// (!\HID_Register[2]~input_o & ((\PC_Reg_Display[5]~110_combout ))) # (\HID_Register[2]~input_o & (\PC_Reg_Display[5]~112_combout )) ) ) ) # ( \HID_Register[1]~input_o & ( !\PC_Reg_Display[5]~111_combout & ( (\HID_Register[2]~input_o & +// \PC_Reg_Display[5]~113_combout ) ) ) ) # ( !\HID_Register[1]~input_o & ( !\PC_Reg_Display[5]~111_combout & ( (!\HID_Register[2]~input_o & ((\PC_Reg_Display[5]~110_combout ))) # (\HID_Register[2]~input_o & (\PC_Reg_Display[5]~112_combout )) ) ) ) + + .dataa(!\PC_Reg_Display[5]~112_combout ), + .datab(!\HID_Register[2]~input_o ), + .datac(!\PC_Reg_Display[5]~110_combout ), + .datad(!\PC_Reg_Display[5]~113_combout ), + .datae(!\HID_Register[1]~input_o ), + .dataf(!\PC_Reg_Display[5]~111_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[5]~114_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[5]~114 .extended_lut = "off"; +defparam \PC_Reg_Display[5]~114 .lut_mask = 64'h1D1D00331D1DCCFF; +defparam \PC_Reg_Display[5]~114 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X37_Y13_N52 +dffeas \REGS|regs[28][5]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[5]~436_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~8_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[28][5]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[28][5]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[28][5]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: FF_X32_Y14_N58 +dffeas \REGS|regs[24][5] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[5]~436_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~4_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[24][5]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[24][5] .is_wysiwyg = "true"; +defparam \REGS|regs[24][5] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X32_Y14_N32 +dffeas \REGS|regs[25][5] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[5]~436_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~13_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[25][5]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[25][5] .is_wysiwyg = "true"; +defparam \REGS|regs[25][5] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y14_N12 +cyclonev_lcell_comb \PC_Reg_Display[5]~125 ( +// Equation(s): +// \PC_Reg_Display[5]~125_combout = ( \HID_Register[0]~input_o & ( \REGS|regs[25][5]~q & ( (!\HID_Register[2]~input_o ) # (\REGS|regs[29][5]~q ) ) ) ) # ( !\HID_Register[0]~input_o & ( \REGS|regs[25][5]~q & ( (!\HID_Register[2]~input_o & +// ((\REGS|regs[24][5]~q ))) # (\HID_Register[2]~input_o & (\REGS|regs[28][5]~DUPLICATE_q )) ) ) ) # ( \HID_Register[0]~input_o & ( !\REGS|regs[25][5]~q & ( (\HID_Register[2]~input_o & \REGS|regs[29][5]~q ) ) ) ) # ( !\HID_Register[0]~input_o & ( +// !\REGS|regs[25][5]~q & ( (!\HID_Register[2]~input_o & ((\REGS|regs[24][5]~q ))) # (\HID_Register[2]~input_o & (\REGS|regs[28][5]~DUPLICATE_q )) ) ) ) + + .dataa(!\REGS|regs[28][5]~DUPLICATE_q ), + .datab(!\HID_Register[2]~input_o ), + .datac(!\REGS|regs[24][5]~q ), + .datad(!\REGS|regs[29][5]~q ), + .datae(!\HID_Register[0]~input_o ), + .dataf(!\REGS|regs[25][5]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[5]~125_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[5]~125 .extended_lut = "off"; +defparam \PC_Reg_Display[5]~125 .lut_mask = 64'h1D1D00331D1DCCFF; +defparam \PC_Reg_Display[5]~125 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y13_N57 +cyclonev_lcell_comb \PC_Reg_Display[5]~126 ( +// Equation(s): +// \PC_Reg_Display[5]~126_combout = ( \REGS|regs[29][21]~q & ( \HID_Register[2]~input_o & ( (\REGS|regs[28][21]~q ) # (\HID_Register[0]~input_o ) ) ) ) # ( !\REGS|regs[29][21]~q & ( \HID_Register[2]~input_o & ( (!\HID_Register[0]~input_o & +// \REGS|regs[28][21]~q ) ) ) ) # ( \REGS|regs[29][21]~q & ( !\HID_Register[2]~input_o & ( (!\HID_Register[0]~input_o & ((\REGS|regs[24][21]~q ))) # (\HID_Register[0]~input_o & (\REGS|regs[25][21]~q )) ) ) ) # ( !\REGS|regs[29][21]~q & ( +// !\HID_Register[2]~input_o & ( (!\HID_Register[0]~input_o & ((\REGS|regs[24][21]~q ))) # (\HID_Register[0]~input_o & (\REGS|regs[25][21]~q )) ) ) ) + + .dataa(!\HID_Register[0]~input_o ), + .datab(!\REGS|regs[25][21]~q ), + .datac(!\REGS|regs[24][21]~q ), + .datad(!\REGS|regs[28][21]~q ), + .datae(!\REGS|regs[29][21]~q ), + .dataf(!\HID_Register[2]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[5]~126_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[5]~126 .extended_lut = "off"; +defparam \PC_Reg_Display[5]~126 .lut_mask = 64'h1B1B1B1B00AA55FF; +defparam \PC_Reg_Display[5]~126 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X33_Y13_N19 +dffeas \REGS|regs[30][5]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[30][5]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~10_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[30][5]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[30][5]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[30][5]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: FF_X37_Y16_N43 +dffeas \REGS|regs[27][5]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[27][5]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~15_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[27][5]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[27][5]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[27][5]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X41_Y11_N39 +cyclonev_lcell_comb \PC_Reg_Display[5]~127 ( +// Equation(s): +// \PC_Reg_Display[5]~127_combout = ( \REGS|regs[27][5]~DUPLICATE_q & ( \REGS|regs[31][5]~q & ( ((!\HID_Register[2]~input_o & ((\REGS|regs[26][5]~q ))) # (\HID_Register[2]~input_o & (\REGS|regs[30][5]~DUPLICATE_q ))) # (\HID_Register[0]~input_o ) ) ) ) +// # ( !\REGS|regs[27][5]~DUPLICATE_q & ( \REGS|regs[31][5]~q & ( (!\HID_Register[2]~input_o & (((!\HID_Register[0]~input_o & \REGS|regs[26][5]~q )))) # (\HID_Register[2]~input_o & (((\HID_Register[0]~input_o )) # (\REGS|regs[30][5]~DUPLICATE_q ))) ) ) +// ) # ( \REGS|regs[27][5]~DUPLICATE_q & ( !\REGS|regs[31][5]~q & ( (!\HID_Register[2]~input_o & (((\REGS|regs[26][5]~q ) # (\HID_Register[0]~input_o )))) # (\HID_Register[2]~input_o & (\REGS|regs[30][5]~DUPLICATE_q & (!\HID_Register[0]~input_o ))) ) ) +// ) # ( !\REGS|regs[27][5]~DUPLICATE_q & ( !\REGS|regs[31][5]~q & ( (!\HID_Register[0]~input_o & ((!\HID_Register[2]~input_o & ((\REGS|regs[26][5]~q ))) # (\HID_Register[2]~input_o & (\REGS|regs[30][5]~DUPLICATE_q )))) ) ) ) + + .dataa(!\HID_Register[2]~input_o ), + .datab(!\REGS|regs[30][5]~DUPLICATE_q ), + .datac(!\HID_Register[0]~input_o ), + .datad(!\REGS|regs[26][5]~q ), + .datae(!\REGS|regs[27][5]~DUPLICATE_q ), + .dataf(!\REGS|regs[31][5]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[5]~127_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[5]~127 .extended_lut = "off"; +defparam \PC_Reg_Display[5]~127 .lut_mask = 64'h10B01ABA15B51FBF; +defparam \PC_Reg_Display[5]~127 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X30_Y13_N10 +dffeas \REGS|regs[27][21]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[21]~435_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~15_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[27][21]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[27][21]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[27][21]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: FF_X31_Y13_N22 +dffeas \REGS|regs[26][21]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[21]~435_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~6_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[26][21]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[26][21]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[26][21]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X28_Y12_N12 +cyclonev_lcell_comb \PC_Reg_Display[5]~128 ( +// Equation(s): +// \PC_Reg_Display[5]~128_combout = ( \REGS|regs[26][21]~DUPLICATE_q & ( \REGS|regs[31][21]~q & ( (!\HID_Register[2]~input_o & (((!\HID_Register[0]~input_o ) # (\REGS|regs[27][21]~DUPLICATE_q )))) # (\HID_Register[2]~input_o & +// (((\HID_Register[0]~input_o )) # (\REGS|regs[30][21]~q ))) ) ) ) # ( !\REGS|regs[26][21]~DUPLICATE_q & ( \REGS|regs[31][21]~q & ( (!\HID_Register[2]~input_o & (((\REGS|regs[27][21]~DUPLICATE_q & \HID_Register[0]~input_o )))) # +// (\HID_Register[2]~input_o & (((\HID_Register[0]~input_o )) # (\REGS|regs[30][21]~q ))) ) ) ) # ( \REGS|regs[26][21]~DUPLICATE_q & ( !\REGS|regs[31][21]~q & ( (!\HID_Register[2]~input_o & (((!\HID_Register[0]~input_o ) # (\REGS|regs[27][21]~DUPLICATE_q +// )))) # (\HID_Register[2]~input_o & (\REGS|regs[30][21]~q & ((!\HID_Register[0]~input_o )))) ) ) ) # ( !\REGS|regs[26][21]~DUPLICATE_q & ( !\REGS|regs[31][21]~q & ( (!\HID_Register[2]~input_o & (((\REGS|regs[27][21]~DUPLICATE_q & +// \HID_Register[0]~input_o )))) # (\HID_Register[2]~input_o & (\REGS|regs[30][21]~q & ((!\HID_Register[0]~input_o )))) ) ) ) + + .dataa(!\HID_Register[2]~input_o ), + .datab(!\REGS|regs[30][21]~q ), + .datac(!\REGS|regs[27][21]~DUPLICATE_q ), + .datad(!\HID_Register[0]~input_o ), + .datae(!\REGS|regs[26][21]~DUPLICATE_q ), + .dataf(!\REGS|regs[31][21]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[5]~128_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[5]~128 .extended_lut = "off"; +defparam \PC_Reg_Display[5]~128 .lut_mask = 64'h110ABB0A115FBB5F; +defparam \PC_Reg_Display[5]~128 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X31_Y14_N18 +cyclonev_lcell_comb \PC_Reg_Display[5]~129 ( +// Equation(s): +// \PC_Reg_Display[5]~129_combout = ( \PC_Reg_Display[5]~128_combout & ( \HID_Hi_Low[0]~input_o & ( (\HID_Register[1]~input_o ) # (\PC_Reg_Display[5]~126_combout ) ) ) ) # ( !\PC_Reg_Display[5]~128_combout & ( \HID_Hi_Low[0]~input_o & ( +// (\PC_Reg_Display[5]~126_combout & !\HID_Register[1]~input_o ) ) ) ) # ( \PC_Reg_Display[5]~128_combout & ( !\HID_Hi_Low[0]~input_o & ( (!\HID_Register[1]~input_o & (\PC_Reg_Display[5]~125_combout )) # (\HID_Register[1]~input_o & +// ((\PC_Reg_Display[5]~127_combout ))) ) ) ) # ( !\PC_Reg_Display[5]~128_combout & ( !\HID_Hi_Low[0]~input_o & ( (!\HID_Register[1]~input_o & (\PC_Reg_Display[5]~125_combout )) # (\HID_Register[1]~input_o & ((\PC_Reg_Display[5]~127_combout ))) ) ) ) + + .dataa(!\PC_Reg_Display[5]~125_combout ), + .datab(!\PC_Reg_Display[5]~126_combout ), + .datac(!\PC_Reg_Display[5]~127_combout ), + .datad(!\HID_Register[1]~input_o ), + .datae(!\PC_Reg_Display[5]~128_combout ), + .dataf(!\HID_Hi_Low[0]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[5]~129_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[5]~129 .extended_lut = "off"; +defparam \PC_Reg_Display[5]~129 .lut_mask = 64'h550F550F330033FF; +defparam \PC_Reg_Display[5]~129 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X35_Y15_N58 +dffeas \REGS|regs[13][21] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[13][21]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~31_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[13][21]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[13][21] .is_wysiwyg = "true"; +defparam \REGS|regs[13][21] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X36_Y15_N49 +dffeas \REGS|regs[9][21] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[9][21]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~29_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[9][21]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[9][21] .is_wysiwyg = "true"; +defparam \REGS|regs[9][21] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X36_Y16_N36 +cyclonev_lcell_comb \PC_Reg_Display[5]~121 ( +// Equation(s): +// \PC_Reg_Display[5]~121_combout = ( \HID_Register[0]~input_o & ( \REGS|regs[8][21]~DUPLICATE_q & ( (!\HID_Register[2]~input_o & ((\REGS|regs[9][21]~q ))) # (\HID_Register[2]~input_o & (\REGS|regs[13][21]~q )) ) ) ) # ( !\HID_Register[0]~input_o & ( +// \REGS|regs[8][21]~DUPLICATE_q & ( (!\HID_Register[2]~input_o ) # (\REGS|regs[12][21]~q ) ) ) ) # ( \HID_Register[0]~input_o & ( !\REGS|regs[8][21]~DUPLICATE_q & ( (!\HID_Register[2]~input_o & ((\REGS|regs[9][21]~q ))) # (\HID_Register[2]~input_o & +// (\REGS|regs[13][21]~q )) ) ) ) # ( !\HID_Register[0]~input_o & ( !\REGS|regs[8][21]~DUPLICATE_q & ( (\REGS|regs[12][21]~q & \HID_Register[2]~input_o ) ) ) ) + + .dataa(!\REGS|regs[13][21]~q ), + .datab(!\REGS|regs[12][21]~q ), + .datac(!\HID_Register[2]~input_o ), + .datad(!\REGS|regs[9][21]~q ), + .datae(!\HID_Register[0]~input_o ), + .dataf(!\REGS|regs[8][21]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[5]~121_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[5]~121 .extended_lut = "off"; +defparam \PC_Reg_Display[5]~121 .lut_mask = 64'h030305F5F3F305F5; +defparam \PC_Reg_Display[5]~121 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X36_Y13_N37 +dffeas \REGS|regs[12][5]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[5]~436_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~26_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[12][5]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[12][5]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[12][5]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X36_Y4_N30 +cyclonev_lcell_comb \PC_Reg_Display[5]~120 ( +// Equation(s): +// \PC_Reg_Display[5]~120_combout = ( \REGS|regs[8][5]~DUPLICATE_q & ( \REGS|regs[12][5]~DUPLICATE_q & ( (!\HID_Register[0]~input_o ) # ((!\HID_Register[2]~input_o & ((\REGS|regs[9][5]~q ))) # (\HID_Register[2]~input_o & (\REGS|regs[13][5]~q ))) ) ) ) # +// ( !\REGS|regs[8][5]~DUPLICATE_q & ( \REGS|regs[12][5]~DUPLICATE_q & ( (!\HID_Register[2]~input_o & (((\REGS|regs[9][5]~q & \HID_Register[0]~input_o )))) # (\HID_Register[2]~input_o & (((!\HID_Register[0]~input_o )) # (\REGS|regs[13][5]~q ))) ) ) ) # +// ( \REGS|regs[8][5]~DUPLICATE_q & ( !\REGS|regs[12][5]~DUPLICATE_q & ( (!\HID_Register[2]~input_o & (((!\HID_Register[0]~input_o ) # (\REGS|regs[9][5]~q )))) # (\HID_Register[2]~input_o & (\REGS|regs[13][5]~q & ((\HID_Register[0]~input_o )))) ) ) ) # +// ( !\REGS|regs[8][5]~DUPLICATE_q & ( !\REGS|regs[12][5]~DUPLICATE_q & ( (\HID_Register[0]~input_o & ((!\HID_Register[2]~input_o & ((\REGS|regs[9][5]~q ))) # (\HID_Register[2]~input_o & (\REGS|regs[13][5]~q )))) ) ) ) + + .dataa(!\REGS|regs[13][5]~q ), + .datab(!\HID_Register[2]~input_o ), + .datac(!\REGS|regs[9][5]~q ), + .datad(!\HID_Register[0]~input_o ), + .datae(!\REGS|regs[8][5]~DUPLICATE_q ), + .dataf(!\REGS|regs[12][5]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[5]~120_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[5]~120 .extended_lut = "off"; +defparam \PC_Reg_Display[5]~120 .lut_mask = 64'h001DCC1D331DFF1D; +defparam \PC_Reg_Display[5]~120 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X36_Y16_N8 +dffeas \REGS|regs[10][5]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[10][5]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~33_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[10][5]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[10][5]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[10][5]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X31_Y14_N0 +cyclonev_lcell_comb \PC_Reg_Display[5]~122 ( +// Equation(s): +// \PC_Reg_Display[5]~122_combout = ( \REGS|regs[14][5]~q & ( \REGS|regs[10][5]~DUPLICATE_q & ( (!\HID_Register[0]~input_o ) # ((!\HID_Register[2]~input_o & (\REGS|regs[11][5]~q )) # (\HID_Register[2]~input_o & ((\REGS|regs[15][5]~q )))) ) ) ) # ( +// !\REGS|regs[14][5]~q & ( \REGS|regs[10][5]~DUPLICATE_q & ( (!\HID_Register[2]~input_o & (((!\HID_Register[0]~input_o )) # (\REGS|regs[11][5]~q ))) # (\HID_Register[2]~input_o & (((\HID_Register[0]~input_o & \REGS|regs[15][5]~q )))) ) ) ) # ( +// \REGS|regs[14][5]~q & ( !\REGS|regs[10][5]~DUPLICATE_q & ( (!\HID_Register[2]~input_o & (\REGS|regs[11][5]~q & (\HID_Register[0]~input_o ))) # (\HID_Register[2]~input_o & (((!\HID_Register[0]~input_o ) # (\REGS|regs[15][5]~q )))) ) ) ) # ( +// !\REGS|regs[14][5]~q & ( !\REGS|regs[10][5]~DUPLICATE_q & ( (\HID_Register[0]~input_o & ((!\HID_Register[2]~input_o & (\REGS|regs[11][5]~q )) # (\HID_Register[2]~input_o & ((\REGS|regs[15][5]~q ))))) ) ) ) + + .dataa(!\REGS|regs[11][5]~q ), + .datab(!\HID_Register[2]~input_o ), + .datac(!\HID_Register[0]~input_o ), + .datad(!\REGS|regs[15][5]~q ), + .datae(!\REGS|regs[14][5]~q ), + .dataf(!\REGS|regs[10][5]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[5]~122_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[5]~122 .extended_lut = "off"; +defparam \PC_Reg_Display[5]~122 .lut_mask = 64'h04073437C4C7F4F7; +defparam \PC_Reg_Display[5]~122 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X31_Y14_N54 +cyclonev_lcell_comb \PC_Reg_Display[5]~123 ( +// Equation(s): +// \PC_Reg_Display[5]~123_combout = ( \REGS|regs[14][21]~q & ( \REGS|regs[11][21]~q & ( (!\HID_Register[2]~input_o & (((\REGS|regs[10][21]~q ) # (\HID_Register[0]~input_o )))) # (\HID_Register[2]~input_o & (((!\HID_Register[0]~input_o )) # +// (\REGS|regs[15][21]~q ))) ) ) ) # ( !\REGS|regs[14][21]~q & ( \REGS|regs[11][21]~q & ( (!\HID_Register[2]~input_o & (((\REGS|regs[10][21]~q ) # (\HID_Register[0]~input_o )))) # (\HID_Register[2]~input_o & (\REGS|regs[15][21]~q & +// (\HID_Register[0]~input_o ))) ) ) ) # ( \REGS|regs[14][21]~q & ( !\REGS|regs[11][21]~q & ( (!\HID_Register[2]~input_o & (((!\HID_Register[0]~input_o & \REGS|regs[10][21]~q )))) # (\HID_Register[2]~input_o & (((!\HID_Register[0]~input_o )) # +// (\REGS|regs[15][21]~q ))) ) ) ) # ( !\REGS|regs[14][21]~q & ( !\REGS|regs[11][21]~q & ( (!\HID_Register[2]~input_o & (((!\HID_Register[0]~input_o & \REGS|regs[10][21]~q )))) # (\HID_Register[2]~input_o & (\REGS|regs[15][21]~q & +// (\HID_Register[0]~input_o ))) ) ) ) + + .dataa(!\REGS|regs[15][21]~q ), + .datab(!\HID_Register[2]~input_o ), + .datac(!\HID_Register[0]~input_o ), + .datad(!\REGS|regs[10][21]~q ), + .datae(!\REGS|regs[14][21]~q ), + .dataf(!\REGS|regs[11][21]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[5]~123_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[5]~123 .extended_lut = "off"; +defparam \PC_Reg_Display[5]~123 .lut_mask = 64'h01C131F10DCD3DFD; +defparam \PC_Reg_Display[5]~123 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X31_Y14_N51 +cyclonev_lcell_comb \PC_Reg_Display[5]~124 ( +// Equation(s): +// \PC_Reg_Display[5]~124_combout = ( \PC_Reg_Display[5]~123_combout & ( \HID_Register[1]~input_o & ( (\PC_Reg_Display[5]~122_combout ) # (\HID_Hi_Low[0]~input_o ) ) ) ) # ( !\PC_Reg_Display[5]~123_combout & ( \HID_Register[1]~input_o & ( +// (!\HID_Hi_Low[0]~input_o & \PC_Reg_Display[5]~122_combout ) ) ) ) # ( \PC_Reg_Display[5]~123_combout & ( !\HID_Register[1]~input_o & ( (!\HID_Hi_Low[0]~input_o & ((\PC_Reg_Display[5]~120_combout ))) # (\HID_Hi_Low[0]~input_o & +// (\PC_Reg_Display[5]~121_combout )) ) ) ) # ( !\PC_Reg_Display[5]~123_combout & ( !\HID_Register[1]~input_o & ( (!\HID_Hi_Low[0]~input_o & ((\PC_Reg_Display[5]~120_combout ))) # (\HID_Hi_Low[0]~input_o & (\PC_Reg_Display[5]~121_combout )) ) ) ) + + .dataa(!\HID_Hi_Low[0]~input_o ), + .datab(!\PC_Reg_Display[5]~121_combout ), + .datac(!\PC_Reg_Display[5]~120_combout ), + .datad(!\PC_Reg_Display[5]~122_combout ), + .datae(!\PC_Reg_Display[5]~123_combout ), + .dataf(!\HID_Register[1]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[5]~124_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[5]~124 .extended_lut = "off"; +defparam \PC_Reg_Display[5]~124 .lut_mask = 64'h1B1B1B1B00AA55FF; +defparam \PC_Reg_Display[5]~124 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X33_Y15_N39 +cyclonev_lcell_comb \PC_Reg_Display[5]~115 ( +// Equation(s): +// \PC_Reg_Display[5]~115_combout = ( \REGS|regs[16][5]~q & ( \REGS|regs[18][5]~q & ( (!\HID_Hi_Low[0]~input_o ) # ((!\HID_Register[1]~input_o & (\REGS|regs[16][21]~q )) # (\HID_Register[1]~input_o & ((\REGS|regs[18][21]~q )))) ) ) ) # ( +// !\REGS|regs[16][5]~q & ( \REGS|regs[18][5]~q & ( (!\HID_Hi_Low[0]~input_o & (((\HID_Register[1]~input_o )))) # (\HID_Hi_Low[0]~input_o & ((!\HID_Register[1]~input_o & (\REGS|regs[16][21]~q )) # (\HID_Register[1]~input_o & ((\REGS|regs[18][21]~q +// ))))) ) ) ) # ( \REGS|regs[16][5]~q & ( !\REGS|regs[18][5]~q & ( (!\HID_Hi_Low[0]~input_o & (((!\HID_Register[1]~input_o )))) # (\HID_Hi_Low[0]~input_o & ((!\HID_Register[1]~input_o & (\REGS|regs[16][21]~q )) # (\HID_Register[1]~input_o & +// ((\REGS|regs[18][21]~q ))))) ) ) ) # ( !\REGS|regs[16][5]~q & ( !\REGS|regs[18][5]~q & ( (\HID_Hi_Low[0]~input_o & ((!\HID_Register[1]~input_o & (\REGS|regs[16][21]~q )) # (\HID_Register[1]~input_o & ((\REGS|regs[18][21]~q ))))) ) ) ) + + .dataa(!\HID_Hi_Low[0]~input_o ), + .datab(!\REGS|regs[16][21]~q ), + .datac(!\REGS|regs[18][21]~q ), + .datad(!\HID_Register[1]~input_o ), + .datae(!\REGS|regs[16][5]~q ), + .dataf(!\REGS|regs[18][5]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[5]~115_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[5]~115 .extended_lut = "off"; +defparam \PC_Reg_Display[5]~115 .lut_mask = 64'h1105BB0511AFBBAF; +defparam \PC_Reg_Display[5]~115 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X37_Y16_N52 +dffeas \REGS|regs[19][5]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[19][5]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~14_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[19][5]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[19][5]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[19][5]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: FF_X30_Y13_N26 +dffeas \REGS|regs[17][21] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[21]~435_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~11_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[17][21]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[17][21] .is_wysiwyg = "true"; +defparam \REGS|regs[17][21] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X30_Y13_N24 +cyclonev_lcell_comb \PC_Reg_Display[5]~117 ( +// Equation(s): +// \PC_Reg_Display[5]~117_combout = ( \REGS|regs[17][21]~q & ( \REGS|regs[19][21]~q & ( ((!\HID_Register[1]~input_o & (\REGS|regs[17][5]~q )) # (\HID_Register[1]~input_o & ((\REGS|regs[19][5]~DUPLICATE_q )))) # (\HID_Hi_Low[0]~input_o ) ) ) ) # ( +// !\REGS|regs[17][21]~q & ( \REGS|regs[19][21]~q & ( (!\HID_Register[1]~input_o & (\REGS|regs[17][5]~q & ((!\HID_Hi_Low[0]~input_o )))) # (\HID_Register[1]~input_o & (((\HID_Hi_Low[0]~input_o ) # (\REGS|regs[19][5]~DUPLICATE_q )))) ) ) ) # ( +// \REGS|regs[17][21]~q & ( !\REGS|regs[19][21]~q & ( (!\HID_Register[1]~input_o & (((\HID_Hi_Low[0]~input_o )) # (\REGS|regs[17][5]~q ))) # (\HID_Register[1]~input_o & (((\REGS|regs[19][5]~DUPLICATE_q & !\HID_Hi_Low[0]~input_o )))) ) ) ) # ( +// !\REGS|regs[17][21]~q & ( !\REGS|regs[19][21]~q & ( (!\HID_Hi_Low[0]~input_o & ((!\HID_Register[1]~input_o & (\REGS|regs[17][5]~q )) # (\HID_Register[1]~input_o & ((\REGS|regs[19][5]~DUPLICATE_q ))))) ) ) ) + + .dataa(!\HID_Register[1]~input_o ), + .datab(!\REGS|regs[17][5]~q ), + .datac(!\REGS|regs[19][5]~DUPLICATE_q ), + .datad(!\HID_Hi_Low[0]~input_o ), + .datae(!\REGS|regs[17][21]~q ), + .dataf(!\REGS|regs[19][21]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[5]~117_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[5]~117 .extended_lut = "off"; +defparam \PC_Reg_Display[5]~117 .lut_mask = 64'h270027AA275527FF; +defparam \PC_Reg_Display[5]~117 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X40_Y10_N20 +dffeas \REGS|regs[21][21] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[21]~435_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~16_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[21][21]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[21][21] .is_wysiwyg = "true"; +defparam \REGS|regs[21][21] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X40_Y10_N23 +dffeas \REGS|regs[21][5] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[5]~436_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~16_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[21][5]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[21][5] .is_wysiwyg = "true"; +defparam \REGS|regs[21][5] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X40_Y10_N46 +dffeas \REGS|regs[23][5]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[5]~436_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~18_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[23][5]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[23][5]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[23][5]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X40_Y10_N9 +cyclonev_lcell_comb \PC_Reg_Display[5]~118 ( +// Equation(s): +// \PC_Reg_Display[5]~118_combout = ( \HID_Register[1]~input_o & ( \REGS|regs[23][5]~DUPLICATE_q & ( (!\HID_Hi_Low[0]~input_o ) # (\REGS|regs[23][21]~q ) ) ) ) # ( !\HID_Register[1]~input_o & ( \REGS|regs[23][5]~DUPLICATE_q & ( (!\HID_Hi_Low[0]~input_o +// & ((\REGS|regs[21][5]~q ))) # (\HID_Hi_Low[0]~input_o & (\REGS|regs[21][21]~q )) ) ) ) # ( \HID_Register[1]~input_o & ( !\REGS|regs[23][5]~DUPLICATE_q & ( (\REGS|regs[23][21]~q & \HID_Hi_Low[0]~input_o ) ) ) ) # ( !\HID_Register[1]~input_o & ( +// !\REGS|regs[23][5]~DUPLICATE_q & ( (!\HID_Hi_Low[0]~input_o & ((\REGS|regs[21][5]~q ))) # (\HID_Hi_Low[0]~input_o & (\REGS|regs[21][21]~q )) ) ) ) + + .dataa(!\REGS|regs[21][21]~q ), + .datab(!\REGS|regs[23][21]~q ), + .datac(!\HID_Hi_Low[0]~input_o ), + .datad(!\REGS|regs[21][5]~q ), + .datae(!\HID_Register[1]~input_o ), + .dataf(!\REGS|regs[23][5]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[5]~118_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[5]~118 .extended_lut = "off"; +defparam \PC_Reg_Display[5]~118 .lut_mask = 64'h05F5030305F5F3F3; +defparam \PC_Reg_Display[5]~118 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X37_Y13_N13 +dffeas \REGS|regs[20][21] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[21]~435_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~7_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[20][21]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[20][21] .is_wysiwyg = "true"; +defparam \REGS|regs[20][21] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X37_Y13_N1 +dffeas \REGS|regs[20][5]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[5]~436_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~7_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[20][5]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[20][5]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[20][5]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y12_N33 +cyclonev_lcell_comb \PC_Reg_Display[5]~116 ( +// Equation(s): +// \PC_Reg_Display[5]~116_combout = ( \HID_Hi_Low[0]~input_o & ( \REGS|regs[20][5]~DUPLICATE_q & ( (!\HID_Register[1]~input_o & (\REGS|regs[20][21]~q )) # (\HID_Register[1]~input_o & ((\REGS|regs[22][21]~q ))) ) ) ) # ( !\HID_Hi_Low[0]~input_o & ( +// \REGS|regs[20][5]~DUPLICATE_q & ( (!\HID_Register[1]~input_o ) # (\REGS|regs[22][5]~q ) ) ) ) # ( \HID_Hi_Low[0]~input_o & ( !\REGS|regs[20][5]~DUPLICATE_q & ( (!\HID_Register[1]~input_o & (\REGS|regs[20][21]~q )) # (\HID_Register[1]~input_o & +// ((\REGS|regs[22][21]~q ))) ) ) ) # ( !\HID_Hi_Low[0]~input_o & ( !\REGS|regs[20][5]~DUPLICATE_q & ( (\HID_Register[1]~input_o & \REGS|regs[22][5]~q ) ) ) ) + + .dataa(!\REGS|regs[20][21]~q ), + .datab(!\REGS|regs[22][21]~q ), + .datac(!\HID_Register[1]~input_o ), + .datad(!\REGS|regs[22][5]~q ), + .datae(!\HID_Hi_Low[0]~input_o ), + .dataf(!\REGS|regs[20][5]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[5]~116_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[5]~116 .extended_lut = "off"; +defparam \PC_Reg_Display[5]~116 .lut_mask = 64'h000F5353F0FF5353; +defparam \PC_Reg_Display[5]~116 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X31_Y14_N24 +cyclonev_lcell_comb \PC_Reg_Display[5]~119 ( +// Equation(s): +// \PC_Reg_Display[5]~119_combout = ( \PC_Reg_Display[5]~118_combout & ( \PC_Reg_Display[5]~116_combout & ( ((!\HID_Register[0]~input_o & (\PC_Reg_Display[5]~115_combout )) # (\HID_Register[0]~input_o & ((\PC_Reg_Display[5]~117_combout )))) # +// (\HID_Register[2]~input_o ) ) ) ) # ( !\PC_Reg_Display[5]~118_combout & ( \PC_Reg_Display[5]~116_combout & ( (!\HID_Register[0]~input_o & (((\HID_Register[2]~input_o )) # (\PC_Reg_Display[5]~115_combout ))) # (\HID_Register[0]~input_o & +// (((\PC_Reg_Display[5]~117_combout & !\HID_Register[2]~input_o )))) ) ) ) # ( \PC_Reg_Display[5]~118_combout & ( !\PC_Reg_Display[5]~116_combout & ( (!\HID_Register[0]~input_o & (\PC_Reg_Display[5]~115_combout & ((!\HID_Register[2]~input_o )))) # +// (\HID_Register[0]~input_o & (((\HID_Register[2]~input_o ) # (\PC_Reg_Display[5]~117_combout )))) ) ) ) # ( !\PC_Reg_Display[5]~118_combout & ( !\PC_Reg_Display[5]~116_combout & ( (!\HID_Register[2]~input_o & ((!\HID_Register[0]~input_o & +// (\PC_Reg_Display[5]~115_combout )) # (\HID_Register[0]~input_o & ((\PC_Reg_Display[5]~117_combout ))))) ) ) ) + + .dataa(!\HID_Register[0]~input_o ), + .datab(!\PC_Reg_Display[5]~115_combout ), + .datac(!\PC_Reg_Display[5]~117_combout ), + .datad(!\HID_Register[2]~input_o ), + .datae(!\PC_Reg_Display[5]~118_combout ), + .dataf(!\PC_Reg_Display[5]~116_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[5]~119_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[5]~119 .extended_lut = "off"; +defparam \PC_Reg_Display[5]~119 .lut_mask = 64'h2700275527AA27FF; +defparam \PC_Reg_Display[5]~119 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X31_Y14_N36 +cyclonev_lcell_comb \PC_Reg_Display[5]~130 ( +// Equation(s): +// \PC_Reg_Display[5]~130_combout = ( \PC_Reg_Display[5]~124_combout & ( \PC_Reg_Display[5]~119_combout & ( (!\HID_Register[4]~input_o & (((\HID_Register[3]~input_o )) # (\PC_Reg_Display[5]~114_combout ))) # (\HID_Register[4]~input_o & +// (((!\HID_Register[3]~input_o ) # (\PC_Reg_Display[5]~129_combout )))) ) ) ) # ( !\PC_Reg_Display[5]~124_combout & ( \PC_Reg_Display[5]~119_combout & ( (!\HID_Register[4]~input_o & (\PC_Reg_Display[5]~114_combout & ((!\HID_Register[3]~input_o )))) # +// (\HID_Register[4]~input_o & (((!\HID_Register[3]~input_o ) # (\PC_Reg_Display[5]~129_combout )))) ) ) ) # ( \PC_Reg_Display[5]~124_combout & ( !\PC_Reg_Display[5]~119_combout & ( (!\HID_Register[4]~input_o & (((\HID_Register[3]~input_o )) # +// (\PC_Reg_Display[5]~114_combout ))) # (\HID_Register[4]~input_o & (((\PC_Reg_Display[5]~129_combout & \HID_Register[3]~input_o )))) ) ) ) # ( !\PC_Reg_Display[5]~124_combout & ( !\PC_Reg_Display[5]~119_combout & ( (!\HID_Register[4]~input_o & +// (\PC_Reg_Display[5]~114_combout & ((!\HID_Register[3]~input_o )))) # (\HID_Register[4]~input_o & (((\PC_Reg_Display[5]~129_combout & \HID_Register[3]~input_o )))) ) ) ) + + .dataa(!\HID_Register[4]~input_o ), + .datab(!\PC_Reg_Display[5]~114_combout ), + .datac(!\PC_Reg_Display[5]~129_combout ), + .datad(!\HID_Register[3]~input_o ), + .datae(!\PC_Reg_Display[5]~124_combout ), + .dataf(!\PC_Reg_Display[5]~119_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[5]~130_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[5]~130 .extended_lut = "off"; +defparam \PC_Reg_Display[5]~130 .lut_mask = 64'h220522AF770577AF; +defparam \PC_Reg_Display[5]~130 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X22_Y12_N27 +cyclonev_lcell_comb \PC_Reg_Display[5]~131 ( +// Equation(s): +// \PC_Reg_Display[5]~131_combout = ( \PC_Reg_Display[5]~130_combout & ( \PC|pc[5]~DUPLICATE_q & ( (!\HID_Hi_Low[0]~input_o ) # ((!\HID_PC[0]~input_o ) # (\PC|pc [21])) ) ) ) # ( !\PC_Reg_Display[5]~130_combout & ( \PC|pc[5]~DUPLICATE_q & ( +// (\HID_PC[0]~input_o & ((!\HID_Hi_Low[0]~input_o ) # (\PC|pc [21]))) ) ) ) # ( \PC_Reg_Display[5]~130_combout & ( !\PC|pc[5]~DUPLICATE_q & ( (!\HID_PC[0]~input_o ) # ((\HID_Hi_Low[0]~input_o & \PC|pc [21])) ) ) ) # ( !\PC_Reg_Display[5]~130_combout & +// ( !\PC|pc[5]~DUPLICATE_q & ( (\HID_Hi_Low[0]~input_o & (\HID_PC[0]~input_o & \PC|pc [21])) ) ) ) + + .dataa(!\HID_Hi_Low[0]~input_o ), + .datab(!\HID_PC[0]~input_o ), + .datac(!\PC|pc [21]), + .datad(gnd), + .datae(!\PC_Reg_Display[5]~130_combout ), + .dataf(!\PC|pc[5]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[5]~131_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[5]~131 .extended_lut = "off"; +defparam \PC_Reg_Display[5]~131 .lut_mask = 64'h0101CDCD2323EFEF; +defparam \PC_Reg_Display[5]~131 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X36_Y7_N30 +cyclonev_lcell_comb \Add0~41 ( +// Equation(s): +// \Add0~41_sumout = SUM(( (pc_we[0] & \PC|pc [22]) ) + ( (!pc_we[0] & \PC|pc [22]) ) + ( \Add0~34 )) +// \Add0~42 = CARRY(( (pc_we[0] & \PC|pc [22]) ) + ( (!pc_we[0] & \PC|pc [22]) ) + ( \Add0~34 )) + + .dataa(!pc_we[0]), + .datab(gnd), + .datac(!\PC|pc [22]), + .datad(gnd), + .datae(gnd), + .dataf(gnd), + .datag(gnd), + .cin(\Add0~34 ), + .sharein(gnd), + .combout(), + .sumout(\Add0~41_sumout ), + .cout(\Add0~42 ), + .shareout()); +// synopsys translate_off +defparam \Add0~41 .extended_lut = "off"; +defparam \Add0~41 .lut_mask = 64'h0000F5F500000505; +defparam \Add0~41 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X36_Y7_N31 +dffeas \PC|pc[22] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\Add0~41_sumout ), + .asdata(vcc), + .clrn(!\rst[0]~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\PC|pc [22]), + .prn(vcc)); +// synopsys translate_off +defparam \PC|pc[22] .is_wysiwyg = "true"; +defparam \PC|pc[22] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X36_Y7_N33 +cyclonev_lcell_comb \Add0~49 ( +// Equation(s): +// \Add0~49_sumout = SUM(( (pc_we[0] & \PC|pc [23]) ) + ( (!pc_we[0] & \PC|pc [23]) ) + ( \Add0~42 )) +// \Add0~50 = CARRY(( (pc_we[0] & \PC|pc [23]) ) + ( (!pc_we[0] & \PC|pc [23]) ) + ( \Add0~42 )) + + .dataa(!pc_we[0]), + .datab(gnd), + .datac(!\PC|pc [23]), + .datad(gnd), + .datae(gnd), + .dataf(gnd), + .datag(gnd), + .cin(\Add0~42 ), + .sharein(gnd), + .combout(), + .sumout(\Add0~49_sumout ), + .cout(\Add0~50 ), + .shareout()); +// synopsys translate_off +defparam \Add0~49 .extended_lut = "off"; +defparam \Add0~49 .lut_mask = 64'h0000F5F500000505; +defparam \Add0~49 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X36_Y7_N34 +dffeas \PC|pc[23] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\Add0~49_sumout ), + .asdata(vcc), + .clrn(!\rst[0]~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\PC|pc [23]), + .prn(vcc)); +// synopsys translate_off +defparam \PC|pc[23] .is_wysiwyg = "true"; +defparam \PC|pc[23] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X33_Y12_N25 +dffeas \REGS|regs[26][7] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[7]~440_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~6_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[26][7]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[26][7] .is_wysiwyg = "true"; +defparam \REGS|regs[26][7] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X25_Y7_N26 +dffeas \REGS|regs[24][7] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[7]~440_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~4_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[24][7]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[24][7] .is_wysiwyg = "true"; +defparam \REGS|regs[24][7] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X25_Y7_N24 +cyclonev_lcell_comb \PC_Reg_Display[7]~169 ( +// Equation(s): +// \PC_Reg_Display[7]~169_combout = ( \REGS|regs[24][7]~q & ( \REGS|regs[28][7]~q & ( (!\HID_Register[1]~input_o ) # ((!\HID_Register[2]~input_o & (\REGS|regs[26][7]~q )) # (\HID_Register[2]~input_o & ((\REGS|regs[30][7]~q )))) ) ) ) # ( +// !\REGS|regs[24][7]~q & ( \REGS|regs[28][7]~q & ( (!\HID_Register[2]~input_o & (\REGS|regs[26][7]~q & ((\HID_Register[1]~input_o )))) # (\HID_Register[2]~input_o & (((!\HID_Register[1]~input_o ) # (\REGS|regs[30][7]~q )))) ) ) ) # ( +// \REGS|regs[24][7]~q & ( !\REGS|regs[28][7]~q & ( (!\HID_Register[2]~input_o & (((!\HID_Register[1]~input_o )) # (\REGS|regs[26][7]~q ))) # (\HID_Register[2]~input_o & (((\REGS|regs[30][7]~q & \HID_Register[1]~input_o )))) ) ) ) # ( +// !\REGS|regs[24][7]~q & ( !\REGS|regs[28][7]~q & ( (\HID_Register[1]~input_o & ((!\HID_Register[2]~input_o & (\REGS|regs[26][7]~q )) # (\HID_Register[2]~input_o & ((\REGS|regs[30][7]~q ))))) ) ) ) + + .dataa(!\REGS|regs[26][7]~q ), + .datab(!\HID_Register[2]~input_o ), + .datac(!\REGS|regs[30][7]~q ), + .datad(!\HID_Register[1]~input_o ), + .datae(!\REGS|regs[24][7]~q ), + .dataf(!\REGS|regs[28][7]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[7]~169_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[7]~169 .extended_lut = "off"; +defparam \PC_Reg_Display[7]~169 .lut_mask = 64'h0047CC473347FF47; +defparam \PC_Reg_Display[7]~169 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X32_Y14_N44 +dffeas \REGS|regs[25][7] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[7]~440_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~13_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[25][7]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[25][7] .is_wysiwyg = "true"; +defparam \REGS|regs[25][7] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y14_N42 +cyclonev_lcell_comb \PC_Reg_Display[7]~170 ( +// Equation(s): +// \PC_Reg_Display[7]~170_combout = ( \REGS|regs[25][7]~q & ( \HID_Register[1]~input_o & ( (!\HID_Register[2]~input_o & ((\REGS|regs[27][7]~q ))) # (\HID_Register[2]~input_o & (\REGS|regs[31][7]~q )) ) ) ) # ( !\REGS|regs[25][7]~q & ( +// \HID_Register[1]~input_o & ( (!\HID_Register[2]~input_o & ((\REGS|regs[27][7]~q ))) # (\HID_Register[2]~input_o & (\REGS|regs[31][7]~q )) ) ) ) # ( \REGS|regs[25][7]~q & ( !\HID_Register[1]~input_o & ( (!\HID_Register[2]~input_o ) # +// (\REGS|regs[29][7]~q ) ) ) ) # ( !\REGS|regs[25][7]~q & ( !\HID_Register[1]~input_o & ( (\REGS|regs[29][7]~q & \HID_Register[2]~input_o ) ) ) ) + + .dataa(!\REGS|regs[31][7]~q ), + .datab(!\REGS|regs[29][7]~q ), + .datac(!\REGS|regs[27][7]~q ), + .datad(!\HID_Register[2]~input_o ), + .datae(!\REGS|regs[25][7]~q ), + .dataf(!\HID_Register[1]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[7]~170_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[7]~170 .extended_lut = "off"; +defparam \PC_Reg_Display[7]~170 .lut_mask = 64'h0033FF330F550F55; +defparam \PC_Reg_Display[7]~170 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X31_Y7_N48 +cyclonev_lcell_comb \PC_Reg_Display[7]~171 ( +// Equation(s): +// \PC_Reg_Display[7]~171_combout = ( \REGS|regs[30][23]~q & ( \REGS|regs[24][23]~q & ( (!\HID_Register[1]~input_o & (((!\HID_Register[2]~input_o ) # (\REGS|regs[28][23]~q )))) # (\HID_Register[1]~input_o & (((\HID_Register[2]~input_o )) # +// (\REGS|regs[26][23]~q ))) ) ) ) # ( !\REGS|regs[30][23]~q & ( \REGS|regs[24][23]~q & ( (!\HID_Register[1]~input_o & (((!\HID_Register[2]~input_o ) # (\REGS|regs[28][23]~q )))) # (\HID_Register[1]~input_o & (\REGS|regs[26][23]~q & +// ((!\HID_Register[2]~input_o )))) ) ) ) # ( \REGS|regs[30][23]~q & ( !\REGS|regs[24][23]~q & ( (!\HID_Register[1]~input_o & (((\REGS|regs[28][23]~q & \HID_Register[2]~input_o )))) # (\HID_Register[1]~input_o & (((\HID_Register[2]~input_o )) # +// (\REGS|regs[26][23]~q ))) ) ) ) # ( !\REGS|regs[30][23]~q & ( !\REGS|regs[24][23]~q & ( (!\HID_Register[1]~input_o & (((\REGS|regs[28][23]~q & \HID_Register[2]~input_o )))) # (\HID_Register[1]~input_o & (\REGS|regs[26][23]~q & +// ((!\HID_Register[2]~input_o )))) ) ) ) + + .dataa(!\REGS|regs[26][23]~q ), + .datab(!\HID_Register[1]~input_o ), + .datac(!\REGS|regs[28][23]~q ), + .datad(!\HID_Register[2]~input_o ), + .datae(!\REGS|regs[30][23]~q ), + .dataf(!\REGS|regs[24][23]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[7]~171_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[7]~171 .extended_lut = "off"; +defparam \PC_Reg_Display[7]~171 .lut_mask = 64'h110C113FDD0CDD3F; +defparam \PC_Reg_Display[7]~171 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X25_Y8_N45 +cyclonev_lcell_comb \PC_Reg_Display[7]~172 ( +// Equation(s): +// \PC_Reg_Display[7]~172_combout = ( \REGS|regs[25][23]~q & ( \REGS|regs[31][23]~q & ( (!\HID_Register[2]~input_o & (((!\HID_Register[1]~input_o )) # (\REGS|regs[27][23]~q ))) # (\HID_Register[2]~input_o & (((\HID_Register[1]~input_o ) # +// (\REGS|regs[29][23]~q )))) ) ) ) # ( !\REGS|regs[25][23]~q & ( \REGS|regs[31][23]~q & ( (!\HID_Register[2]~input_o & (\REGS|regs[27][23]~q & ((\HID_Register[1]~input_o )))) # (\HID_Register[2]~input_o & (((\HID_Register[1]~input_o ) # +// (\REGS|regs[29][23]~q )))) ) ) ) # ( \REGS|regs[25][23]~q & ( !\REGS|regs[31][23]~q & ( (!\HID_Register[2]~input_o & (((!\HID_Register[1]~input_o )) # (\REGS|regs[27][23]~q ))) # (\HID_Register[2]~input_o & (((\REGS|regs[29][23]~q & +// !\HID_Register[1]~input_o )))) ) ) ) # ( !\REGS|regs[25][23]~q & ( !\REGS|regs[31][23]~q & ( (!\HID_Register[2]~input_o & (\REGS|regs[27][23]~q & ((\HID_Register[1]~input_o )))) # (\HID_Register[2]~input_o & (((\REGS|regs[29][23]~q & +// !\HID_Register[1]~input_o )))) ) ) ) + + .dataa(!\REGS|regs[27][23]~q ), + .datab(!\HID_Register[2]~input_o ), + .datac(!\REGS|regs[29][23]~q ), + .datad(!\HID_Register[1]~input_o ), + .datae(!\REGS|regs[25][23]~q ), + .dataf(!\REGS|regs[31][23]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[7]~172_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[7]~172 .extended_lut = "off"; +defparam \PC_Reg_Display[7]~172 .lut_mask = 64'h0344CF440377CF77; +defparam \PC_Reg_Display[7]~172 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X25_Y8_N24 +cyclonev_lcell_comb \PC_Reg_Display[7]~173 ( +// Equation(s): +// \PC_Reg_Display[7]~173_combout = ( \PC_Reg_Display[7]~171_combout & ( \PC_Reg_Display[7]~172_combout & ( ((!\HID_Register[0]~input_o & (\PC_Reg_Display[7]~169_combout )) # (\HID_Register[0]~input_o & ((\PC_Reg_Display[7]~170_combout )))) # +// (\HID_Hi_Low[0]~input_o ) ) ) ) # ( !\PC_Reg_Display[7]~171_combout & ( \PC_Reg_Display[7]~172_combout & ( (!\HID_Hi_Low[0]~input_o & ((!\HID_Register[0]~input_o & (\PC_Reg_Display[7]~169_combout )) # (\HID_Register[0]~input_o & +// ((\PC_Reg_Display[7]~170_combout ))))) # (\HID_Hi_Low[0]~input_o & (((\HID_Register[0]~input_o )))) ) ) ) # ( \PC_Reg_Display[7]~171_combout & ( !\PC_Reg_Display[7]~172_combout & ( (!\HID_Hi_Low[0]~input_o & ((!\HID_Register[0]~input_o & +// (\PC_Reg_Display[7]~169_combout )) # (\HID_Register[0]~input_o & ((\PC_Reg_Display[7]~170_combout ))))) # (\HID_Hi_Low[0]~input_o & (((!\HID_Register[0]~input_o )))) ) ) ) # ( !\PC_Reg_Display[7]~171_combout & ( !\PC_Reg_Display[7]~172_combout & ( +// (!\HID_Hi_Low[0]~input_o & ((!\HID_Register[0]~input_o & (\PC_Reg_Display[7]~169_combout )) # (\HID_Register[0]~input_o & ((\PC_Reg_Display[7]~170_combout ))))) ) ) ) + + .dataa(!\PC_Reg_Display[7]~169_combout ), + .datab(!\PC_Reg_Display[7]~170_combout ), + .datac(!\HID_Hi_Low[0]~input_o ), + .datad(!\HID_Register[0]~input_o ), + .datae(!\PC_Reg_Display[7]~171_combout ), + .dataf(!\PC_Reg_Display[7]~172_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[7]~173_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[7]~173 .extended_lut = "off"; +defparam \PC_Reg_Display[7]~173 .lut_mask = 64'h50305F30503F5F3F; +defparam \PC_Reg_Display[7]~173 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X27_Y12_N41 +dffeas \REGS|regs[7][7] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[7]~440_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~38_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[7][7]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[7][7] .is_wysiwyg = "true"; +defparam \REGS|regs[7][7] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y12_N38 +dffeas \REGS|regs[7][23] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[23]~439_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~38_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[7][23]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[7][23] .is_wysiwyg = "true"; +defparam \REGS|regs[7][23] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X27_Y12_N36 +cyclonev_lcell_comb \PC_Reg_Display[7]~157 ( +// Equation(s): +// \PC_Reg_Display[7]~157_combout = ( \REGS|regs[7][23]~q & ( \REGS|regs[6][7]~q & ( (!\HID_Hi_Low[0]~input_o & (((!\HID_Register[0]~input_o ) # (\REGS|regs[7][7]~q )))) # (\HID_Hi_Low[0]~input_o & (((\HID_Register[0]~input_o )) # (\REGS|regs[6][23]~q +// ))) ) ) ) # ( !\REGS|regs[7][23]~q & ( \REGS|regs[6][7]~q & ( (!\HID_Hi_Low[0]~input_o & (((!\HID_Register[0]~input_o ) # (\REGS|regs[7][7]~q )))) # (\HID_Hi_Low[0]~input_o & (\REGS|regs[6][23]~q & ((!\HID_Register[0]~input_o )))) ) ) ) # ( +// \REGS|regs[7][23]~q & ( !\REGS|regs[6][7]~q & ( (!\HID_Hi_Low[0]~input_o & (((\REGS|regs[7][7]~q & \HID_Register[0]~input_o )))) # (\HID_Hi_Low[0]~input_o & (((\HID_Register[0]~input_o )) # (\REGS|regs[6][23]~q ))) ) ) ) # ( !\REGS|regs[7][23]~q & ( +// !\REGS|regs[6][7]~q & ( (!\HID_Hi_Low[0]~input_o & (((\REGS|regs[7][7]~q & \HID_Register[0]~input_o )))) # (\HID_Hi_Low[0]~input_o & (\REGS|regs[6][23]~q & ((!\HID_Register[0]~input_o )))) ) ) ) + + .dataa(!\REGS|regs[6][23]~q ), + .datab(!\REGS|regs[7][7]~q ), + .datac(!\HID_Hi_Low[0]~input_o ), + .datad(!\HID_Register[0]~input_o ), + .datae(!\REGS|regs[7][23]~q ), + .dataf(!\REGS|regs[6][7]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[7]~157_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[7]~157 .extended_lut = "off"; +defparam \PC_Reg_Display[7]~157 .lut_mask = 64'h0530053FF530F53F; +defparam \PC_Reg_Display[7]~157 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X28_Y13_N22 +dffeas \REGS|regs[3][7] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[7]~440_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~36_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[3][7]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[3][7] .is_wysiwyg = "true"; +defparam \REGS|regs[3][7] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X28_Y13_N20 +dffeas \REGS|regs[3][23] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[23]~439_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~36_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[3][23]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[3][23] .is_wysiwyg = "true"; +defparam \REGS|regs[3][23] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X28_Y13_N18 +cyclonev_lcell_comb \PC_Reg_Display[7]~155 ( +// Equation(s): +// \PC_Reg_Display[7]~155_combout = ( \REGS|regs[3][23]~q & ( \REGS|regs[2][7]~q & ( (!\HID_Register[0]~input_o & (((!\HID_Hi_Low[0]~input_o )) # (\REGS|regs[2][23]~q ))) # (\HID_Register[0]~input_o & (((\REGS|regs[3][7]~q ) # (\HID_Hi_Low[0]~input_o +// )))) ) ) ) # ( !\REGS|regs[3][23]~q & ( \REGS|regs[2][7]~q & ( (!\HID_Register[0]~input_o & (((!\HID_Hi_Low[0]~input_o )) # (\REGS|regs[2][23]~q ))) # (\HID_Register[0]~input_o & (((!\HID_Hi_Low[0]~input_o & \REGS|regs[3][7]~q )))) ) ) ) # ( +// \REGS|regs[3][23]~q & ( !\REGS|regs[2][7]~q & ( (!\HID_Register[0]~input_o & (\REGS|regs[2][23]~q & (\HID_Hi_Low[0]~input_o ))) # (\HID_Register[0]~input_o & (((\REGS|regs[3][7]~q ) # (\HID_Hi_Low[0]~input_o )))) ) ) ) # ( !\REGS|regs[3][23]~q & ( +// !\REGS|regs[2][7]~q & ( (!\HID_Register[0]~input_o & (\REGS|regs[2][23]~q & (\HID_Hi_Low[0]~input_o ))) # (\HID_Register[0]~input_o & (((!\HID_Hi_Low[0]~input_o & \REGS|regs[3][7]~q )))) ) ) ) + + .dataa(!\HID_Register[0]~input_o ), + .datab(!\REGS|regs[2][23]~q ), + .datac(!\HID_Hi_Low[0]~input_o ), + .datad(!\REGS|regs[3][7]~q ), + .datae(!\REGS|regs[3][23]~q ), + .dataf(!\REGS|regs[2][7]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[7]~155_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[7]~155 .extended_lut = "off"; +defparam \PC_Reg_Display[7]~155 .lut_mask = 64'h02520757A2F2A7F7; +defparam \PC_Reg_Display[7]~155 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X31_Y13_N39 +cyclonev_lcell_comb \PC_Reg_Display[7]~154 ( +// Equation(s): +// \PC_Reg_Display[7]~154_combout = ( \HID_Hi_Low[0]~input_o & ( (\HID_Register[0]~input_o & \REGS|regs[1][23]~q ) ) ) # ( !\HID_Hi_Low[0]~input_o & ( (\REGS|regs[1][7]~q & \HID_Register[0]~input_o ) ) ) + + .dataa(!\REGS|regs[1][7]~q ), + .datab(gnd), + .datac(!\HID_Register[0]~input_o ), + .datad(!\REGS|regs[1][23]~q ), + .datae(gnd), + .dataf(!\HID_Hi_Low[0]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[7]~154_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[7]~154 .extended_lut = "off"; +defparam \PC_Reg_Display[7]~154 .lut_mask = 64'h05050505000F000F; +defparam \PC_Reg_Display[7]~154 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X35_Y13_N15 +cyclonev_lcell_comb \PC_Reg_Display[7]~156 ( +// Equation(s): +// \PC_Reg_Display[7]~156_combout = ( \REGS|regs[5][7]~q & ( \REGS|regs[5][23]~q & ( ((!\HID_Hi_Low[0]~input_o & ((\REGS|regs[4][7]~q ))) # (\HID_Hi_Low[0]~input_o & (\REGS|regs[4][23]~q ))) # (\HID_Register[0]~input_o ) ) ) ) # ( !\REGS|regs[5][7]~q & +// ( \REGS|regs[5][23]~q & ( (!\HID_Register[0]~input_o & ((!\HID_Hi_Low[0]~input_o & ((\REGS|regs[4][7]~q ))) # (\HID_Hi_Low[0]~input_o & (\REGS|regs[4][23]~q )))) # (\HID_Register[0]~input_o & (((\HID_Hi_Low[0]~input_o )))) ) ) ) # ( +// \REGS|regs[5][7]~q & ( !\REGS|regs[5][23]~q & ( (!\HID_Register[0]~input_o & ((!\HID_Hi_Low[0]~input_o & ((\REGS|regs[4][7]~q ))) # (\HID_Hi_Low[0]~input_o & (\REGS|regs[4][23]~q )))) # (\HID_Register[0]~input_o & (((!\HID_Hi_Low[0]~input_o )))) ) ) +// ) # ( !\REGS|regs[5][7]~q & ( !\REGS|regs[5][23]~q & ( (!\HID_Register[0]~input_o & ((!\HID_Hi_Low[0]~input_o & ((\REGS|regs[4][7]~q ))) # (\HID_Hi_Low[0]~input_o & (\REGS|regs[4][23]~q )))) ) ) ) + + .dataa(!\REGS|regs[4][23]~q ), + .datab(!\HID_Register[0]~input_o ), + .datac(!\REGS|regs[4][7]~q ), + .datad(!\HID_Hi_Low[0]~input_o ), + .datae(!\REGS|regs[5][7]~q ), + .dataf(!\REGS|regs[5][23]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[7]~156_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[7]~156 .extended_lut = "off"; +defparam \PC_Reg_Display[7]~156 .lut_mask = 64'h0C443F440C773F77; +defparam \PC_Reg_Display[7]~156 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X31_Y13_N48 +cyclonev_lcell_comb \PC_Reg_Display[7]~158 ( +// Equation(s): +// \PC_Reg_Display[7]~158_combout = ( \HID_Register[2]~input_o & ( \PC_Reg_Display[7]~156_combout & ( (!\HID_Register[1]~input_o ) # (\PC_Reg_Display[7]~157_combout ) ) ) ) # ( !\HID_Register[2]~input_o & ( \PC_Reg_Display[7]~156_combout & ( +// (!\HID_Register[1]~input_o & ((\PC_Reg_Display[7]~154_combout ))) # (\HID_Register[1]~input_o & (\PC_Reg_Display[7]~155_combout )) ) ) ) # ( \HID_Register[2]~input_o & ( !\PC_Reg_Display[7]~156_combout & ( (\PC_Reg_Display[7]~157_combout & +// \HID_Register[1]~input_o ) ) ) ) # ( !\HID_Register[2]~input_o & ( !\PC_Reg_Display[7]~156_combout & ( (!\HID_Register[1]~input_o & ((\PC_Reg_Display[7]~154_combout ))) # (\HID_Register[1]~input_o & (\PC_Reg_Display[7]~155_combout )) ) ) ) + + .dataa(!\PC_Reg_Display[7]~157_combout ), + .datab(!\HID_Register[1]~input_o ), + .datac(!\PC_Reg_Display[7]~155_combout ), + .datad(!\PC_Reg_Display[7]~154_combout ), + .datae(!\HID_Register[2]~input_o ), + .dataf(!\PC_Reg_Display[7]~156_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[7]~158_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[7]~158 .extended_lut = "off"; +defparam \PC_Reg_Display[7]~158 .lut_mask = 64'h03CF111103CFDDDD; +defparam \PC_Reg_Display[7]~158 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X33_Y7_N44 +dffeas \REGS|regs[17][23] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[23]~439_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~11_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[17][23]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[17][23] .is_wysiwyg = "true"; +defparam \REGS|regs[17][23] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X28_Y13_N44 +dffeas \REGS|regs[21][23] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[23]~439_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~16_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[21][23]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[21][23] .is_wysiwyg = "true"; +defparam \REGS|regs[21][23] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X28_Y13_N42 +cyclonev_lcell_comb \PC_Reg_Display[7]~162 ( +// Equation(s): +// \PC_Reg_Display[7]~162_combout = ( \REGS|regs[21][23]~q & ( \HID_Register[1]~input_o & ( (!\HID_Register[2]~input_o & ((\REGS|regs[19][23]~q ))) # (\HID_Register[2]~input_o & (\REGS|regs[23][23]~q )) ) ) ) # ( !\REGS|regs[21][23]~q & ( +// \HID_Register[1]~input_o & ( (!\HID_Register[2]~input_o & ((\REGS|regs[19][23]~q ))) # (\HID_Register[2]~input_o & (\REGS|regs[23][23]~q )) ) ) ) # ( \REGS|regs[21][23]~q & ( !\HID_Register[1]~input_o & ( (\HID_Register[2]~input_o ) # +// (\REGS|regs[17][23]~q ) ) ) ) # ( !\REGS|regs[21][23]~q & ( !\HID_Register[1]~input_o & ( (\REGS|regs[17][23]~q & !\HID_Register[2]~input_o ) ) ) ) + + .dataa(!\REGS|regs[23][23]~q ), + .datab(!\REGS|regs[17][23]~q ), + .datac(!\HID_Register[2]~input_o ), + .datad(!\REGS|regs[19][23]~q ), + .datae(!\REGS|regs[21][23]~q ), + .dataf(!\HID_Register[1]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[7]~162_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[7]~162 .extended_lut = "off"; +defparam \PC_Reg_Display[7]~162 .lut_mask = 64'h30303F3F05F505F5; +defparam \PC_Reg_Display[7]~162 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X31_Y7_N46 +dffeas \REGS|regs[20][23]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[23]~439_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~7_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[20][23]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[20][23]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[20][23]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: FF_X31_Y13_N7 +dffeas \REGS|regs[18][23]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[23]~439_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~5_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[18][23]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[18][23]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[18][23]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X35_Y5_N42 +cyclonev_lcell_comb \PC_Reg_Display[7]~161 ( +// Equation(s): +// \PC_Reg_Display[7]~161_combout = ( \HID_Register[1]~input_o & ( \REGS|regs[22][23]~q & ( (\REGS|regs[18][23]~DUPLICATE_q ) # (\HID_Register[2]~input_o ) ) ) ) # ( !\HID_Register[1]~input_o & ( \REGS|regs[22][23]~q & ( (!\HID_Register[2]~input_o & +// (\REGS|regs[16][23]~q )) # (\HID_Register[2]~input_o & ((\REGS|regs[20][23]~DUPLICATE_q ))) ) ) ) # ( \HID_Register[1]~input_o & ( !\REGS|regs[22][23]~q & ( (!\HID_Register[2]~input_o & \REGS|regs[18][23]~DUPLICATE_q ) ) ) ) # ( +// !\HID_Register[1]~input_o & ( !\REGS|regs[22][23]~q & ( (!\HID_Register[2]~input_o & (\REGS|regs[16][23]~q )) # (\HID_Register[2]~input_o & ((\REGS|regs[20][23]~DUPLICATE_q ))) ) ) ) + + .dataa(!\REGS|regs[16][23]~q ), + .datab(!\HID_Register[2]~input_o ), + .datac(!\REGS|regs[20][23]~DUPLICATE_q ), + .datad(!\REGS|regs[18][23]~DUPLICATE_q ), + .datae(!\HID_Register[1]~input_o ), + .dataf(!\REGS|regs[22][23]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[7]~161_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[7]~161 .extended_lut = "off"; +defparam \PC_Reg_Display[7]~161 .lut_mask = 64'h474700CC474733FF; +defparam \PC_Reg_Display[7]~161 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X28_Y13_N2 +dffeas \REGS|regs[21][7] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[7]~440_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~16_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[21][7]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[21][7] .is_wysiwyg = "true"; +defparam \REGS|regs[21][7] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X28_Y13_N0 +cyclonev_lcell_comb \PC_Reg_Display[7]~160 ( +// Equation(s): +// \PC_Reg_Display[7]~160_combout = ( \REGS|regs[21][7]~q & ( \HID_Register[1]~input_o & ( (!\HID_Register[2]~input_o & (\REGS|regs[19][7]~q )) # (\HID_Register[2]~input_o & ((\REGS|regs[23][7]~q ))) ) ) ) # ( !\REGS|regs[21][7]~q & ( +// \HID_Register[1]~input_o & ( (!\HID_Register[2]~input_o & (\REGS|regs[19][7]~q )) # (\HID_Register[2]~input_o & ((\REGS|regs[23][7]~q ))) ) ) ) # ( \REGS|regs[21][7]~q & ( !\HID_Register[1]~input_o & ( (\HID_Register[2]~input_o ) # +// (\REGS|regs[17][7]~q ) ) ) ) # ( !\REGS|regs[21][7]~q & ( !\HID_Register[1]~input_o & ( (\REGS|regs[17][7]~q & !\HID_Register[2]~input_o ) ) ) ) + + .dataa(!\REGS|regs[19][7]~q ), + .datab(!\REGS|regs[17][7]~q ), + .datac(!\HID_Register[2]~input_o ), + .datad(!\REGS|regs[23][7]~q ), + .datae(!\REGS|regs[21][7]~q ), + .dataf(!\HID_Register[1]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[7]~160_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[7]~160 .extended_lut = "off"; +defparam \PC_Reg_Display[7]~160 .lut_mask = 64'h30303F3F505F505F; +defparam \PC_Reg_Display[7]~160 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X35_Y12_N10 +dffeas \REGS|regs[16][7] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[16][7]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~2_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[16][7]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[16][7] .is_wysiwyg = "true"; +defparam \REGS|regs[16][7] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y12_N24 +cyclonev_lcell_comb \PC_Reg_Display[7]~159 ( +// Equation(s): +// \PC_Reg_Display[7]~159_combout = ( \REGS|regs[22][7]~q & ( \HID_Register[2]~input_o & ( (\REGS|regs[20][7]~q ) # (\HID_Register[1]~input_o ) ) ) ) # ( !\REGS|regs[22][7]~q & ( \HID_Register[2]~input_o & ( (!\HID_Register[1]~input_o & +// \REGS|regs[20][7]~q ) ) ) ) # ( \REGS|regs[22][7]~q & ( !\HID_Register[2]~input_o & ( (!\HID_Register[1]~input_o & (\REGS|regs[16][7]~q )) # (\HID_Register[1]~input_o & ((\REGS|regs[18][7]~q ))) ) ) ) # ( !\REGS|regs[22][7]~q & ( +// !\HID_Register[2]~input_o & ( (!\HID_Register[1]~input_o & (\REGS|regs[16][7]~q )) # (\HID_Register[1]~input_o & ((\REGS|regs[18][7]~q ))) ) ) ) + + .dataa(!\REGS|regs[16][7]~q ), + .datab(!\HID_Register[1]~input_o ), + .datac(!\REGS|regs[18][7]~q ), + .datad(!\REGS|regs[20][7]~q ), + .datae(!\REGS|regs[22][7]~q ), + .dataf(!\HID_Register[2]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[7]~159_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[7]~159 .extended_lut = "off"; +defparam \PC_Reg_Display[7]~159 .lut_mask = 64'h4747474700CC33FF; +defparam \PC_Reg_Display[7]~159 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X28_Y13_N24 +cyclonev_lcell_comb \PC_Reg_Display[7]~163 ( +// Equation(s): +// \PC_Reg_Display[7]~163_combout = ( \PC_Reg_Display[7]~160_combout & ( \PC_Reg_Display[7]~159_combout & ( (!\HID_Hi_Low[0]~input_o ) # ((!\HID_Register[0]~input_o & ((\PC_Reg_Display[7]~161_combout ))) # (\HID_Register[0]~input_o & +// (\PC_Reg_Display[7]~162_combout ))) ) ) ) # ( !\PC_Reg_Display[7]~160_combout & ( \PC_Reg_Display[7]~159_combout & ( (!\HID_Hi_Low[0]~input_o & (((!\HID_Register[0]~input_o )))) # (\HID_Hi_Low[0]~input_o & ((!\HID_Register[0]~input_o & +// ((\PC_Reg_Display[7]~161_combout ))) # (\HID_Register[0]~input_o & (\PC_Reg_Display[7]~162_combout )))) ) ) ) # ( \PC_Reg_Display[7]~160_combout & ( !\PC_Reg_Display[7]~159_combout & ( (!\HID_Hi_Low[0]~input_o & (((\HID_Register[0]~input_o )))) # +// (\HID_Hi_Low[0]~input_o & ((!\HID_Register[0]~input_o & ((\PC_Reg_Display[7]~161_combout ))) # (\HID_Register[0]~input_o & (\PC_Reg_Display[7]~162_combout )))) ) ) ) # ( !\PC_Reg_Display[7]~160_combout & ( !\PC_Reg_Display[7]~159_combout & ( +// (\HID_Hi_Low[0]~input_o & ((!\HID_Register[0]~input_o & ((\PC_Reg_Display[7]~161_combout ))) # (\HID_Register[0]~input_o & (\PC_Reg_Display[7]~162_combout )))) ) ) ) + + .dataa(!\HID_Hi_Low[0]~input_o ), + .datab(!\PC_Reg_Display[7]~162_combout ), + .datac(!\HID_Register[0]~input_o ), + .datad(!\PC_Reg_Display[7]~161_combout ), + .datae(!\PC_Reg_Display[7]~160_combout ), + .dataf(!\PC_Reg_Display[7]~159_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[7]~163_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[7]~163 .extended_lut = "off"; +defparam \PC_Reg_Display[7]~163 .lut_mask = 64'h01510B5BA1F1ABFB; +defparam \PC_Reg_Display[7]~163 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X35_Y5_N21 +cyclonev_lcell_comb \PC_Reg_Display[7]~165 ( +// Equation(s): +// \PC_Reg_Display[7]~165_combout = ( \REGS|regs[9][7]~q & ( \REGS|regs[13][7]~q & ( (!\HID_Register[1]~input_o ) # ((!\HID_Register[2]~input_o & ((\REGS|regs[11][7]~q ))) # (\HID_Register[2]~input_o & (\REGS|regs[15][7]~q ))) ) ) ) # ( +// !\REGS|regs[9][7]~q & ( \REGS|regs[13][7]~q & ( (!\HID_Register[1]~input_o & (((\HID_Register[2]~input_o )))) # (\HID_Register[1]~input_o & ((!\HID_Register[2]~input_o & ((\REGS|regs[11][7]~q ))) # (\HID_Register[2]~input_o & (\REGS|regs[15][7]~q +// )))) ) ) ) # ( \REGS|regs[9][7]~q & ( !\REGS|regs[13][7]~q & ( (!\HID_Register[1]~input_o & (((!\HID_Register[2]~input_o )))) # (\HID_Register[1]~input_o & ((!\HID_Register[2]~input_o & ((\REGS|regs[11][7]~q ))) # (\HID_Register[2]~input_o & +// (\REGS|regs[15][7]~q )))) ) ) ) # ( !\REGS|regs[9][7]~q & ( !\REGS|regs[13][7]~q & ( (\HID_Register[1]~input_o & ((!\HID_Register[2]~input_o & ((\REGS|regs[11][7]~q ))) # (\HID_Register[2]~input_o & (\REGS|regs[15][7]~q )))) ) ) ) + + .dataa(!\HID_Register[1]~input_o ), + .datab(!\REGS|regs[15][7]~q ), + .datac(!\HID_Register[2]~input_o ), + .datad(!\REGS|regs[11][7]~q ), + .datae(!\REGS|regs[9][7]~q ), + .dataf(!\REGS|regs[13][7]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[7]~165_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[7]~165 .extended_lut = "off"; +defparam \PC_Reg_Display[7]~165 .lut_mask = 64'h0151A1F10B5BABFB; +defparam \PC_Reg_Display[7]~165 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X36_Y5_N23 +dffeas \REGS|regs[14][7]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[7]~440_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~35_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[14][7]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[14][7]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[14][7]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X36_Y5_N54 +cyclonev_lcell_comb \PC_Reg_Display[7]~164 ( +// Equation(s): +// \PC_Reg_Display[7]~164_combout = ( \REGS|regs[14][7]~DUPLICATE_q & ( \REGS|regs[8][7]~DUPLICATE_q & ( (!\HID_Register[2]~input_o & (((!\HID_Register[1]~input_o ) # (\REGS|regs[10][7]~q )))) # (\HID_Register[2]~input_o & (((\HID_Register[1]~input_o )) +// # (\REGS|regs[12][7]~q ))) ) ) ) # ( !\REGS|regs[14][7]~DUPLICATE_q & ( \REGS|regs[8][7]~DUPLICATE_q & ( (!\HID_Register[2]~input_o & (((!\HID_Register[1]~input_o ) # (\REGS|regs[10][7]~q )))) # (\HID_Register[2]~input_o & (\REGS|regs[12][7]~q & +// ((!\HID_Register[1]~input_o )))) ) ) ) # ( \REGS|regs[14][7]~DUPLICATE_q & ( !\REGS|regs[8][7]~DUPLICATE_q & ( (!\HID_Register[2]~input_o & (((\REGS|regs[10][7]~q & \HID_Register[1]~input_o )))) # (\HID_Register[2]~input_o & +// (((\HID_Register[1]~input_o )) # (\REGS|regs[12][7]~q ))) ) ) ) # ( !\REGS|regs[14][7]~DUPLICATE_q & ( !\REGS|regs[8][7]~DUPLICATE_q & ( (!\HID_Register[2]~input_o & (((\REGS|regs[10][7]~q & \HID_Register[1]~input_o )))) # (\HID_Register[2]~input_o & +// (\REGS|regs[12][7]~q & ((!\HID_Register[1]~input_o )))) ) ) ) + + .dataa(!\REGS|regs[12][7]~q ), + .datab(!\HID_Register[2]~input_o ), + .datac(!\REGS|regs[10][7]~q ), + .datad(!\HID_Register[1]~input_o ), + .datae(!\REGS|regs[14][7]~DUPLICATE_q ), + .dataf(!\REGS|regs[8][7]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[7]~164_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[7]~164 .extended_lut = "off"; +defparam \PC_Reg_Display[7]~164 .lut_mask = 64'h110C113FDD0CDD3F; +defparam \PC_Reg_Display[7]~164 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X36_Y3_N42 +cyclonev_lcell_comb \PC_Reg_Display[7]~166 ( +// Equation(s): +// \PC_Reg_Display[7]~166_combout = ( \REGS|regs[10][23]~q & ( \REGS|regs[12][23]~q & ( (!\HID_Register[1]~input_o & (((\HID_Register[2]~input_o ) # (\REGS|regs[8][23]~q )))) # (\HID_Register[1]~input_o & (((!\HID_Register[2]~input_o )) # +// (\REGS|regs[14][23]~q ))) ) ) ) # ( !\REGS|regs[10][23]~q & ( \REGS|regs[12][23]~q & ( (!\HID_Register[1]~input_o & (((\HID_Register[2]~input_o ) # (\REGS|regs[8][23]~q )))) # (\HID_Register[1]~input_o & (\REGS|regs[14][23]~q & +// ((\HID_Register[2]~input_o )))) ) ) ) # ( \REGS|regs[10][23]~q & ( !\REGS|regs[12][23]~q & ( (!\HID_Register[1]~input_o & (((\REGS|regs[8][23]~q & !\HID_Register[2]~input_o )))) # (\HID_Register[1]~input_o & (((!\HID_Register[2]~input_o )) # +// (\REGS|regs[14][23]~q ))) ) ) ) # ( !\REGS|regs[10][23]~q & ( !\REGS|regs[12][23]~q & ( (!\HID_Register[1]~input_o & (((\REGS|regs[8][23]~q & !\HID_Register[2]~input_o )))) # (\HID_Register[1]~input_o & (\REGS|regs[14][23]~q & +// ((\HID_Register[2]~input_o )))) ) ) ) + + .dataa(!\HID_Register[1]~input_o ), + .datab(!\REGS|regs[14][23]~q ), + .datac(!\REGS|regs[8][23]~q ), + .datad(!\HID_Register[2]~input_o ), + .datae(!\REGS|regs[10][23]~q ), + .dataf(!\REGS|regs[12][23]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[7]~166_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[7]~166 .extended_lut = "off"; +defparam \PC_Reg_Display[7]~166 .lut_mask = 64'h0A115F110ABB5FBB; +defparam \PC_Reg_Display[7]~166 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y5_N36 +cyclonev_lcell_comb \PC_Reg_Display[7]~167 ( +// Equation(s): +// \PC_Reg_Display[7]~167_combout = ( \HID_Register[1]~input_o & ( \HID_Register[2]~input_o & ( \REGS|regs[15][23]~q ) ) ) # ( !\HID_Register[1]~input_o & ( \HID_Register[2]~input_o & ( \REGS|regs[13][23]~q ) ) ) # ( \HID_Register[1]~input_o & ( +// !\HID_Register[2]~input_o & ( \REGS|regs[11][23]~q ) ) ) # ( !\HID_Register[1]~input_o & ( !\HID_Register[2]~input_o & ( \REGS|regs[9][23]~q ) ) ) + + .dataa(!\REGS|regs[15][23]~q ), + .datab(!\REGS|regs[9][23]~q ), + .datac(!\REGS|regs[11][23]~q ), + .datad(!\REGS|regs[13][23]~q ), + .datae(!\HID_Register[1]~input_o ), + .dataf(!\HID_Register[2]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[7]~167_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[7]~167 .extended_lut = "off"; +defparam \PC_Reg_Display[7]~167 .lut_mask = 64'h33330F0F00FF5555; +defparam \PC_Reg_Display[7]~167 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y5_N30 +cyclonev_lcell_comb \PC_Reg_Display[7]~168 ( +// Equation(s): +// \PC_Reg_Display[7]~168_combout = ( \HID_Hi_Low[0]~input_o & ( \PC_Reg_Display[7]~167_combout & ( (\PC_Reg_Display[7]~166_combout ) # (\HID_Register[0]~input_o ) ) ) ) # ( !\HID_Hi_Low[0]~input_o & ( \PC_Reg_Display[7]~167_combout & ( +// (!\HID_Register[0]~input_o & ((\PC_Reg_Display[7]~164_combout ))) # (\HID_Register[0]~input_o & (\PC_Reg_Display[7]~165_combout )) ) ) ) # ( \HID_Hi_Low[0]~input_o & ( !\PC_Reg_Display[7]~167_combout & ( (!\HID_Register[0]~input_o & +// \PC_Reg_Display[7]~166_combout ) ) ) ) # ( !\HID_Hi_Low[0]~input_o & ( !\PC_Reg_Display[7]~167_combout & ( (!\HID_Register[0]~input_o & ((\PC_Reg_Display[7]~164_combout ))) # (\HID_Register[0]~input_o & (\PC_Reg_Display[7]~165_combout )) ) ) ) + + .dataa(!\HID_Register[0]~input_o ), + .datab(!\PC_Reg_Display[7]~165_combout ), + .datac(!\PC_Reg_Display[7]~164_combout ), + .datad(!\PC_Reg_Display[7]~166_combout ), + .datae(!\HID_Hi_Low[0]~input_o ), + .dataf(!\PC_Reg_Display[7]~167_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[7]~168_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[7]~168 .extended_lut = "off"; +defparam \PC_Reg_Display[7]~168 .lut_mask = 64'h1B1B00AA1B1B55FF; +defparam \PC_Reg_Display[7]~168 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X25_Y8_N0 +cyclonev_lcell_comb \PC_Reg_Display[7]~174 ( +// Equation(s): +// \PC_Reg_Display[7]~174_combout = ( \HID_Register[3]~input_o & ( \PC_Reg_Display[7]~168_combout & ( (!\HID_Register[4]~input_o ) # (\PC_Reg_Display[7]~173_combout ) ) ) ) # ( !\HID_Register[3]~input_o & ( \PC_Reg_Display[7]~168_combout & ( +// (!\HID_Register[4]~input_o & (\PC_Reg_Display[7]~158_combout )) # (\HID_Register[4]~input_o & ((\PC_Reg_Display[7]~163_combout ))) ) ) ) # ( \HID_Register[3]~input_o & ( !\PC_Reg_Display[7]~168_combout & ( (\PC_Reg_Display[7]~173_combout & +// \HID_Register[4]~input_o ) ) ) ) # ( !\HID_Register[3]~input_o & ( !\PC_Reg_Display[7]~168_combout & ( (!\HID_Register[4]~input_o & (\PC_Reg_Display[7]~158_combout )) # (\HID_Register[4]~input_o & ((\PC_Reg_Display[7]~163_combout ))) ) ) ) + + .dataa(!\PC_Reg_Display[7]~173_combout ), + .datab(!\PC_Reg_Display[7]~158_combout ), + .datac(!\PC_Reg_Display[7]~163_combout ), + .datad(!\HID_Register[4]~input_o ), + .datae(!\HID_Register[3]~input_o ), + .dataf(!\PC_Reg_Display[7]~168_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[7]~174_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[7]~174 .extended_lut = "off"; +defparam \PC_Reg_Display[7]~174 .lut_mask = 64'h330F0055330FFF55; +defparam \PC_Reg_Display[7]~174 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X36_Y7_N9 +cyclonev_lcell_comb \PC_Reg_Display[7]~175 ( +// Equation(s): +// \PC_Reg_Display[7]~175_combout = ( \PC_Reg_Display[7]~174_combout & ( (!\HID_PC[0]~input_o ) # ((!\HID_Hi_Low[0]~input_o & (\PC|pc [7])) # (\HID_Hi_Low[0]~input_o & ((\PC|pc [23])))) ) ) # ( !\PC_Reg_Display[7]~174_combout & ( (\HID_PC[0]~input_o & +// ((!\HID_Hi_Low[0]~input_o & (\PC|pc [7])) # (\HID_Hi_Low[0]~input_o & ((\PC|pc [23]))))) ) ) + + .dataa(!\HID_PC[0]~input_o ), + .datab(!\HID_Hi_Low[0]~input_o ), + .datac(!\PC|pc [7]), + .datad(!\PC|pc [23]), + .datae(gnd), + .dataf(!\PC_Reg_Display[7]~174_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[7]~175_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[7]~175 .extended_lut = "off"; +defparam \PC_Reg_Display[7]~175 .lut_mask = 64'h04150415AEBFAEBF; +defparam \PC_Reg_Display[7]~175 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X37_Y5_N43 +dffeas \REGS|regs[2][22] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[22]~437_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~32_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[2][22]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[2][22] .is_wysiwyg = "true"; +defparam \REGS|regs[2][22] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X28_Y13_N41 +dffeas \REGS|regs[3][6] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[6]~438_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~36_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[3][6]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[3][6] .is_wysiwyg = "true"; +defparam \REGS|regs[3][6] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X28_Y13_N38 +dffeas \REGS|regs[3][22] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[22]~437_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~36_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[3][22]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[3][22] .is_wysiwyg = "true"; +defparam \REGS|regs[3][22] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X37_Y5_N40 +dffeas \REGS|regs[2][6] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[6]~438_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~32_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[2][6]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[2][6] .is_wysiwyg = "true"; +defparam \REGS|regs[2][6] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X28_Y13_N36 +cyclonev_lcell_comb \PC_Reg_Display[6]~133 ( +// Equation(s): +// \PC_Reg_Display[6]~133_combout = ( \REGS|regs[3][22]~q & ( \REGS|regs[2][6]~q & ( (!\HID_Register[0]~input_o & ((!\HID_Hi_Low[0]~input_o ) # ((\REGS|regs[2][22]~q )))) # (\HID_Register[0]~input_o & (((\REGS|regs[3][6]~q )) # (\HID_Hi_Low[0]~input_o +// ))) ) ) ) # ( !\REGS|regs[3][22]~q & ( \REGS|regs[2][6]~q & ( (!\HID_Register[0]~input_o & ((!\HID_Hi_Low[0]~input_o ) # ((\REGS|regs[2][22]~q )))) # (\HID_Register[0]~input_o & (!\HID_Hi_Low[0]~input_o & ((\REGS|regs[3][6]~q )))) ) ) ) # ( +// \REGS|regs[3][22]~q & ( !\REGS|regs[2][6]~q & ( (!\HID_Register[0]~input_o & (\HID_Hi_Low[0]~input_o & (\REGS|regs[2][22]~q ))) # (\HID_Register[0]~input_o & (((\REGS|regs[3][6]~q )) # (\HID_Hi_Low[0]~input_o ))) ) ) ) # ( !\REGS|regs[3][22]~q & ( +// !\REGS|regs[2][6]~q & ( (!\HID_Register[0]~input_o & (\HID_Hi_Low[0]~input_o & (\REGS|regs[2][22]~q ))) # (\HID_Register[0]~input_o & (!\HID_Hi_Low[0]~input_o & ((\REGS|regs[3][6]~q )))) ) ) ) + + .dataa(!\HID_Register[0]~input_o ), + .datab(!\HID_Hi_Low[0]~input_o ), + .datac(!\REGS|regs[2][22]~q ), + .datad(!\REGS|regs[3][6]~q ), + .datae(!\REGS|regs[3][22]~q ), + .dataf(!\REGS|regs[2][6]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[6]~133_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[6]~133 .extended_lut = "off"; +defparam \PC_Reg_Display[6]~133 .lut_mask = 64'h024613578ACE9BDF; +defparam \PC_Reg_Display[6]~133 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X35_Y13_N45 +cyclonev_lcell_comb \PC_Reg_Display[6]~134 ( +// Equation(s): +// \PC_Reg_Display[6]~134_combout = ( \REGS|regs[4][6]~q & ( \REGS|regs[4][22]~q & ( (!\HID_Register[0]~input_o ) # ((!\HID_Hi_Low[0]~input_o & ((\REGS|regs[5][6]~q ))) # (\HID_Hi_Low[0]~input_o & (\REGS|regs[5][22]~q ))) ) ) ) # ( !\REGS|regs[4][6]~q +// & ( \REGS|regs[4][22]~q & ( (!\HID_Hi_Low[0]~input_o & (((\HID_Register[0]~input_o & \REGS|regs[5][6]~q )))) # (\HID_Hi_Low[0]~input_o & (((!\HID_Register[0]~input_o )) # (\REGS|regs[5][22]~q ))) ) ) ) # ( \REGS|regs[4][6]~q & ( !\REGS|regs[4][22]~q +// & ( (!\HID_Hi_Low[0]~input_o & (((!\HID_Register[0]~input_o ) # (\REGS|regs[5][6]~q )))) # (\HID_Hi_Low[0]~input_o & (\REGS|regs[5][22]~q & (\HID_Register[0]~input_o ))) ) ) ) # ( !\REGS|regs[4][6]~q & ( !\REGS|regs[4][22]~q & ( +// (\HID_Register[0]~input_o & ((!\HID_Hi_Low[0]~input_o & ((\REGS|regs[5][6]~q ))) # (\HID_Hi_Low[0]~input_o & (\REGS|regs[5][22]~q )))) ) ) ) + + .dataa(!\HID_Hi_Low[0]~input_o ), + .datab(!\REGS|regs[5][22]~q ), + .datac(!\HID_Register[0]~input_o ), + .datad(!\REGS|regs[5][6]~q ), + .datae(!\REGS|regs[4][6]~q ), + .dataf(!\REGS|regs[4][22]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[6]~134_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[6]~134 .extended_lut = "off"; +defparam \PC_Reg_Display[6]~134 .lut_mask = 64'h010BA1AB515BF1FB; +defparam \PC_Reg_Display[6]~134 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X31_Y14_N11 +dffeas \REGS|regs[7][6] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[6]~438_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~38_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[7][6]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[7][6] .is_wysiwyg = "true"; +defparam \REGS|regs[7][6] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X31_Y14_N8 +dffeas \REGS|regs[7][22] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[22]~437_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~38_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[7][22]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[7][22] .is_wysiwyg = "true"; +defparam \REGS|regs[7][22] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X31_Y14_N6 +cyclonev_lcell_comb \PC_Reg_Display[6]~135 ( +// Equation(s): +// \PC_Reg_Display[6]~135_combout = ( \REGS|regs[7][22]~q & ( \REGS|regs[6][6]~q & ( (!\HID_Register[0]~input_o & (((!\HID_Hi_Low[0]~input_o )) # (\REGS|regs[6][22]~q ))) # (\HID_Register[0]~input_o & (((\REGS|regs[7][6]~q ) # (\HID_Hi_Low[0]~input_o +// )))) ) ) ) # ( !\REGS|regs[7][22]~q & ( \REGS|regs[6][6]~q & ( (!\HID_Register[0]~input_o & (((!\HID_Hi_Low[0]~input_o )) # (\REGS|regs[6][22]~q ))) # (\HID_Register[0]~input_o & (((!\HID_Hi_Low[0]~input_o & \REGS|regs[7][6]~q )))) ) ) ) # ( +// \REGS|regs[7][22]~q & ( !\REGS|regs[6][6]~q & ( (!\HID_Register[0]~input_o & (\REGS|regs[6][22]~q & (\HID_Hi_Low[0]~input_o ))) # (\HID_Register[0]~input_o & (((\REGS|regs[7][6]~q ) # (\HID_Hi_Low[0]~input_o )))) ) ) ) # ( !\REGS|regs[7][22]~q & ( +// !\REGS|regs[6][6]~q & ( (!\HID_Register[0]~input_o & (\REGS|regs[6][22]~q & (\HID_Hi_Low[0]~input_o ))) # (\HID_Register[0]~input_o & (((!\HID_Hi_Low[0]~input_o & \REGS|regs[7][6]~q )))) ) ) ) + + .dataa(!\HID_Register[0]~input_o ), + .datab(!\REGS|regs[6][22]~q ), + .datac(!\HID_Hi_Low[0]~input_o ), + .datad(!\REGS|regs[7][6]~q ), + .datae(!\REGS|regs[7][22]~q ), + .dataf(!\REGS|regs[6][6]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[6]~135_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[6]~135 .extended_lut = "off"; +defparam \PC_Reg_Display[6]~135 .lut_mask = 64'h02520757A2F2A7F7; +defparam \PC_Reg_Display[6]~135 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X31_Y13_N3 +cyclonev_lcell_comb \PC_Reg_Display[6]~132 ( +// Equation(s): +// \PC_Reg_Display[6]~132_combout = ( \REGS|regs[1][22]~q & ( \HID_Hi_Low[0]~input_o & ( \HID_Register[0]~input_o ) ) ) # ( \REGS|regs[1][22]~q & ( !\HID_Hi_Low[0]~input_o & ( (\HID_Register[0]~input_o & \REGS|regs[1][6]~q ) ) ) ) # ( +// !\REGS|regs[1][22]~q & ( !\HID_Hi_Low[0]~input_o & ( (\HID_Register[0]~input_o & \REGS|regs[1][6]~q ) ) ) ) + + .dataa(gnd), + .datab(!\HID_Register[0]~input_o ), + .datac(!\REGS|regs[1][6]~q ), + .datad(gnd), + .datae(!\REGS|regs[1][22]~q ), + .dataf(!\HID_Hi_Low[0]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[6]~132_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[6]~132 .extended_lut = "off"; +defparam \PC_Reg_Display[6]~132 .lut_mask = 64'h0303030300003333; +defparam \PC_Reg_Display[6]~132 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X31_Y13_N30 +cyclonev_lcell_comb \PC_Reg_Display[6]~136 ( +// Equation(s): +// \PC_Reg_Display[6]~136_combout = ( \PC_Reg_Display[6]~132_combout & ( \HID_Register[2]~input_o & ( (!\HID_Register[1]~input_o & (\PC_Reg_Display[6]~134_combout )) # (\HID_Register[1]~input_o & ((\PC_Reg_Display[6]~135_combout ))) ) ) ) # ( +// !\PC_Reg_Display[6]~132_combout & ( \HID_Register[2]~input_o & ( (!\HID_Register[1]~input_o & (\PC_Reg_Display[6]~134_combout )) # (\HID_Register[1]~input_o & ((\PC_Reg_Display[6]~135_combout ))) ) ) ) # ( \PC_Reg_Display[6]~132_combout & ( +// !\HID_Register[2]~input_o & ( (!\HID_Register[1]~input_o ) # (\PC_Reg_Display[6]~133_combout ) ) ) ) # ( !\PC_Reg_Display[6]~132_combout & ( !\HID_Register[2]~input_o & ( (\PC_Reg_Display[6]~133_combout & \HID_Register[1]~input_o ) ) ) ) + + .dataa(!\PC_Reg_Display[6]~133_combout ), + .datab(!\PC_Reg_Display[6]~134_combout ), + .datac(!\PC_Reg_Display[6]~135_combout ), + .datad(!\HID_Register[1]~input_o ), + .datae(!\PC_Reg_Display[6]~132_combout ), + .dataf(!\HID_Register[2]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[6]~136_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[6]~136 .extended_lut = "off"; +defparam \PC_Reg_Display[6]~136 .lut_mask = 64'h0055FF55330F330F; +defparam \PC_Reg_Display[6]~136 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X25_Y8_N34 +dffeas \REGS|regs[24][22] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[22]~437_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~4_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[24][22]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[24][22] .is_wysiwyg = "true"; +defparam \REGS|regs[24][22] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X37_Y12_N31 +dffeas \REGS|regs[30][22] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[22]~437_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~10_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[30][22]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[30][22] .is_wysiwyg = "true"; +defparam \REGS|regs[30][22] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X28_Y13_N48 +cyclonev_lcell_comb \PC_Reg_Display[6]~149 ( +// Equation(s): +// \PC_Reg_Display[6]~149_combout = ( \REGS|regs[28][22]~q & ( \REGS|regs[26][22]~q & ( (!\HID_Register[1]~input_o & (((\HID_Register[2]~input_o )) # (\REGS|regs[24][22]~q ))) # (\HID_Register[1]~input_o & (((!\HID_Register[2]~input_o ) # +// (\REGS|regs[30][22]~q )))) ) ) ) # ( !\REGS|regs[28][22]~q & ( \REGS|regs[26][22]~q & ( (!\HID_Register[1]~input_o & (\REGS|regs[24][22]~q & (!\HID_Register[2]~input_o ))) # (\HID_Register[1]~input_o & (((!\HID_Register[2]~input_o ) # +// (\REGS|regs[30][22]~q )))) ) ) ) # ( \REGS|regs[28][22]~q & ( !\REGS|regs[26][22]~q & ( (!\HID_Register[1]~input_o & (((\HID_Register[2]~input_o )) # (\REGS|regs[24][22]~q ))) # (\HID_Register[1]~input_o & (((\HID_Register[2]~input_o & +// \REGS|regs[30][22]~q )))) ) ) ) # ( !\REGS|regs[28][22]~q & ( !\REGS|regs[26][22]~q & ( (!\HID_Register[1]~input_o & (\REGS|regs[24][22]~q & (!\HID_Register[2]~input_o ))) # (\HID_Register[1]~input_o & (((\HID_Register[2]~input_o & +// \REGS|regs[30][22]~q )))) ) ) ) + + .dataa(!\REGS|regs[24][22]~q ), + .datab(!\HID_Register[1]~input_o ), + .datac(!\HID_Register[2]~input_o ), + .datad(!\REGS|regs[30][22]~q ), + .datae(!\REGS|regs[28][22]~q ), + .dataf(!\REGS|regs[26][22]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[6]~149_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[6]~149 .extended_lut = "off"; +defparam \PC_Reg_Display[6]~149 .lut_mask = 64'h40434C4F70737C7F; +defparam \PC_Reg_Display[6]~149 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X31_Y11_N10 +dffeas \REGS|regs[29][22]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[22]~437_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~17_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[29][22]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[29][22]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[29][22]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X30_Y13_N18 +cyclonev_lcell_comb \PC_Reg_Display[6]~150 ( +// Equation(s): +// \PC_Reg_Display[6]~150_combout = ( \REGS|regs[29][22]~DUPLICATE_q & ( \REGS|regs[31][22]~q & ( ((!\HID_Register[1]~input_o & (\REGS|regs[25][22]~q )) # (\HID_Register[1]~input_o & ((\REGS|regs[27][22]~q )))) # (\HID_Register[2]~input_o ) ) ) ) # ( +// !\REGS|regs[29][22]~DUPLICATE_q & ( \REGS|regs[31][22]~q & ( (!\HID_Register[1]~input_o & (!\HID_Register[2]~input_o & (\REGS|regs[25][22]~q ))) # (\HID_Register[1]~input_o & (((\REGS|regs[27][22]~q )) # (\HID_Register[2]~input_o ))) ) ) ) # ( +// \REGS|regs[29][22]~DUPLICATE_q & ( !\REGS|regs[31][22]~q & ( (!\HID_Register[1]~input_o & (((\REGS|regs[25][22]~q )) # (\HID_Register[2]~input_o ))) # (\HID_Register[1]~input_o & (!\HID_Register[2]~input_o & ((\REGS|regs[27][22]~q )))) ) ) ) # ( +// !\REGS|regs[29][22]~DUPLICATE_q & ( !\REGS|regs[31][22]~q & ( (!\HID_Register[2]~input_o & ((!\HID_Register[1]~input_o & (\REGS|regs[25][22]~q )) # (\HID_Register[1]~input_o & ((\REGS|regs[27][22]~q ))))) ) ) ) + + .dataa(!\HID_Register[1]~input_o ), + .datab(!\HID_Register[2]~input_o ), + .datac(!\REGS|regs[25][22]~q ), + .datad(!\REGS|regs[27][22]~q ), + .datae(!\REGS|regs[29][22]~DUPLICATE_q ), + .dataf(!\REGS|regs[31][22]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[6]~150_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[6]~150 .extended_lut = "off"; +defparam \PC_Reg_Display[6]~150 .lut_mask = 64'h084C2A6E195D3B7F; +defparam \PC_Reg_Display[6]~150 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X32_Y14_N2 +dffeas \REGS|regs[25][6] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[6]~438_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~13_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[25][6]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[25][6] .is_wysiwyg = "true"; +defparam \REGS|regs[25][6] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X38_Y15_N43 +dffeas \REGS|regs[27][6]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[27][6]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~15_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[27][6]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[27][6]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[27][6]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y14_N0 +cyclonev_lcell_comb \PC_Reg_Display[6]~148 ( +// Equation(s): +// \PC_Reg_Display[6]~148_combout = ( \REGS|regs[25][6]~q & ( \REGS|regs[27][6]~DUPLICATE_q & ( (!\HID_Register[2]~input_o ) # ((!\HID_Register[1]~input_o & ((\REGS|regs[29][6]~q ))) # (\HID_Register[1]~input_o & (\REGS|regs[31][6]~q ))) ) ) ) # ( +// !\REGS|regs[25][6]~q & ( \REGS|regs[27][6]~DUPLICATE_q & ( (!\HID_Register[2]~input_o & (((\HID_Register[1]~input_o )))) # (\HID_Register[2]~input_o & ((!\HID_Register[1]~input_o & ((\REGS|regs[29][6]~q ))) # (\HID_Register[1]~input_o & +// (\REGS|regs[31][6]~q )))) ) ) ) # ( \REGS|regs[25][6]~q & ( !\REGS|regs[27][6]~DUPLICATE_q & ( (!\HID_Register[2]~input_o & (((!\HID_Register[1]~input_o )))) # (\HID_Register[2]~input_o & ((!\HID_Register[1]~input_o & ((\REGS|regs[29][6]~q ))) # +// (\HID_Register[1]~input_o & (\REGS|regs[31][6]~q )))) ) ) ) # ( !\REGS|regs[25][6]~q & ( !\REGS|regs[27][6]~DUPLICATE_q & ( (\HID_Register[2]~input_o & ((!\HID_Register[1]~input_o & ((\REGS|regs[29][6]~q ))) # (\HID_Register[1]~input_o & +// (\REGS|regs[31][6]~q )))) ) ) ) + + .dataa(!\REGS|regs[31][6]~q ), + .datab(!\HID_Register[2]~input_o ), + .datac(!\REGS|regs[29][6]~q ), + .datad(!\HID_Register[1]~input_o ), + .datae(!\REGS|regs[25][6]~q ), + .dataf(!\REGS|regs[27][6]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[6]~148_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[6]~148 .extended_lut = "off"; +defparam \PC_Reg_Display[6]~148 .lut_mask = 64'h0311CF1103DDCFDD; +defparam \PC_Reg_Display[6]~148 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X38_Y15_N16 +dffeas \REGS|regs[26][6]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[26][6]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~6_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[26][6]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[26][6]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[26][6]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: FF_X32_Y14_N20 +dffeas \REGS|regs[24][6] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[6]~438_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~4_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[24][6]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[24][6] .is_wysiwyg = "true"; +defparam \REGS|regs[24][6] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y14_N18 +cyclonev_lcell_comb \PC_Reg_Display[6]~147 ( +// Equation(s): +// \PC_Reg_Display[6]~147_combout = ( \REGS|regs[24][6]~q & ( \HID_Register[1]~input_o & ( (!\HID_Register[2]~input_o & ((\REGS|regs[26][6]~DUPLICATE_q ))) # (\HID_Register[2]~input_o & (\REGS|regs[30][6]~q )) ) ) ) # ( !\REGS|regs[24][6]~q & ( +// \HID_Register[1]~input_o & ( (!\HID_Register[2]~input_o & ((\REGS|regs[26][6]~DUPLICATE_q ))) # (\HID_Register[2]~input_o & (\REGS|regs[30][6]~q )) ) ) ) # ( \REGS|regs[24][6]~q & ( !\HID_Register[1]~input_o & ( (!\HID_Register[2]~input_o ) # +// (\REGS|regs[28][6]~q ) ) ) ) # ( !\REGS|regs[24][6]~q & ( !\HID_Register[1]~input_o & ( (\REGS|regs[28][6]~q & \HID_Register[2]~input_o ) ) ) ) + + .dataa(!\REGS|regs[30][6]~q ), + .datab(!\REGS|regs[26][6]~DUPLICATE_q ), + .datac(!\REGS|regs[28][6]~q ), + .datad(!\HID_Register[2]~input_o ), + .datae(!\REGS|regs[24][6]~q ), + .dataf(!\HID_Register[1]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[6]~147_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[6]~147 .extended_lut = "off"; +defparam \PC_Reg_Display[6]~147 .lut_mask = 64'h000FFF0F33553355; +defparam \PC_Reg_Display[6]~147 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X30_Y13_N0 +cyclonev_lcell_comb \PC_Reg_Display[6]~151 ( +// Equation(s): +// \PC_Reg_Display[6]~151_combout = ( \HID_Register[0]~input_o & ( \PC_Reg_Display[6]~147_combout & ( (!\HID_Hi_Low[0]~input_o & ((\PC_Reg_Display[6]~148_combout ))) # (\HID_Hi_Low[0]~input_o & (\PC_Reg_Display[6]~150_combout )) ) ) ) # ( +// !\HID_Register[0]~input_o & ( \PC_Reg_Display[6]~147_combout & ( (!\HID_Hi_Low[0]~input_o ) # (\PC_Reg_Display[6]~149_combout ) ) ) ) # ( \HID_Register[0]~input_o & ( !\PC_Reg_Display[6]~147_combout & ( (!\HID_Hi_Low[0]~input_o & +// ((\PC_Reg_Display[6]~148_combout ))) # (\HID_Hi_Low[0]~input_o & (\PC_Reg_Display[6]~150_combout )) ) ) ) # ( !\HID_Register[0]~input_o & ( !\PC_Reg_Display[6]~147_combout & ( (\PC_Reg_Display[6]~149_combout & \HID_Hi_Low[0]~input_o ) ) ) ) + + .dataa(!\PC_Reg_Display[6]~149_combout ), + .datab(!\HID_Hi_Low[0]~input_o ), + .datac(!\PC_Reg_Display[6]~150_combout ), + .datad(!\PC_Reg_Display[6]~148_combout ), + .datae(!\HID_Register[0]~input_o ), + .dataf(!\PC_Reg_Display[6]~147_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[6]~151_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[6]~151 .extended_lut = "off"; +defparam \PC_Reg_Display[6]~151 .lut_mask = 64'h111103CFDDDD03CF; +defparam \PC_Reg_Display[6]~151 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X30_Y13_N38 +dffeas \REGS|regs[17][22] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[22]~437_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~11_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[17][22]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[17][22] .is_wysiwyg = "true"; +defparam \REGS|regs[17][22] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X30_Y13_N36 +cyclonev_lcell_comb \PC_Reg_Display[6]~139 ( +// Equation(s): +// \PC_Reg_Display[6]~139_combout = ( \REGS|regs[17][22]~q & ( \REGS|regs[19][22]~q & ( ((!\HID_Register[1]~input_o & ((\REGS|regs[16][22]~q ))) # (\HID_Register[1]~input_o & (\REGS|regs[18][22]~q ))) # (\HID_Register[0]~input_o ) ) ) ) # ( +// !\REGS|regs[17][22]~q & ( \REGS|regs[19][22]~q & ( (!\HID_Register[1]~input_o & (((!\HID_Register[0]~input_o & \REGS|regs[16][22]~q )))) # (\HID_Register[1]~input_o & (((\HID_Register[0]~input_o )) # (\REGS|regs[18][22]~q ))) ) ) ) # ( +// \REGS|regs[17][22]~q & ( !\REGS|regs[19][22]~q & ( (!\HID_Register[1]~input_o & (((\REGS|regs[16][22]~q ) # (\HID_Register[0]~input_o )))) # (\HID_Register[1]~input_o & (\REGS|regs[18][22]~q & (!\HID_Register[0]~input_o ))) ) ) ) # ( +// !\REGS|regs[17][22]~q & ( !\REGS|regs[19][22]~q & ( (!\HID_Register[0]~input_o & ((!\HID_Register[1]~input_o & ((\REGS|regs[16][22]~q ))) # (\HID_Register[1]~input_o & (\REGS|regs[18][22]~q )))) ) ) ) + + .dataa(!\HID_Register[1]~input_o ), + .datab(!\REGS|regs[18][22]~q ), + .datac(!\HID_Register[0]~input_o ), + .datad(!\REGS|regs[16][22]~q ), + .datae(!\REGS|regs[17][22]~q ), + .dataf(!\REGS|regs[19][22]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[6]~139_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[6]~139 .extended_lut = "off"; +defparam \PC_Reg_Display[6]~139 .lut_mask = 64'h10B01ABA15B51FBF; +defparam \PC_Reg_Display[6]~139 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X38_Y11_N46 +dffeas \REGS|regs[17][6] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[6]~438_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~11_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[17][6]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[17][6] .is_wysiwyg = "true"; +defparam \REGS|regs[17][6] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y16_N24 +cyclonev_lcell_comb \PC_Reg_Display[6]~137 ( +// Equation(s): +// \PC_Reg_Display[6]~137_combout = ( \REGS|regs[19][6]~q & ( \REGS|regs[16][6]~q & ( (!\HID_Register[0]~input_o & (((!\HID_Register[1]~input_o )) # (\REGS|regs[18][6]~q ))) # (\HID_Register[0]~input_o & (((\HID_Register[1]~input_o ) # +// (\REGS|regs[17][6]~q )))) ) ) ) # ( !\REGS|regs[19][6]~q & ( \REGS|regs[16][6]~q & ( (!\HID_Register[0]~input_o & (((!\HID_Register[1]~input_o )) # (\REGS|regs[18][6]~q ))) # (\HID_Register[0]~input_o & (((\REGS|regs[17][6]~q & +// !\HID_Register[1]~input_o )))) ) ) ) # ( \REGS|regs[19][6]~q & ( !\REGS|regs[16][6]~q & ( (!\HID_Register[0]~input_o & (\REGS|regs[18][6]~q & ((\HID_Register[1]~input_o )))) # (\HID_Register[0]~input_o & (((\HID_Register[1]~input_o ) # +// (\REGS|regs[17][6]~q )))) ) ) ) # ( !\REGS|regs[19][6]~q & ( !\REGS|regs[16][6]~q & ( (!\HID_Register[0]~input_o & (\REGS|regs[18][6]~q & ((\HID_Register[1]~input_o )))) # (\HID_Register[0]~input_o & (((\REGS|regs[17][6]~q & +// !\HID_Register[1]~input_o )))) ) ) ) + + .dataa(!\REGS|regs[18][6]~q ), + .datab(!\REGS|regs[17][6]~q ), + .datac(!\HID_Register[0]~input_o ), + .datad(!\HID_Register[1]~input_o ), + .datae(!\REGS|regs[19][6]~q ), + .dataf(!\REGS|regs[16][6]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[6]~137_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[6]~137 .extended_lut = "off"; +defparam \PC_Reg_Display[6]~137 .lut_mask = 64'h0350035FF350F35F; +defparam \PC_Reg_Display[6]~137 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X40_Y10_N58 +dffeas \REGS|regs[23][6] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[6]~438_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~18_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[23][6]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[23][6] .is_wysiwyg = "true"; +defparam \REGS|regs[23][6] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X28_Y13_N32 +dffeas \REGS|regs[21][6] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[6]~438_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~16_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[21][6]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[21][6] .is_wysiwyg = "true"; +defparam \REGS|regs[21][6] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X28_Y13_N30 +cyclonev_lcell_comb \PC_Reg_Display[6]~138 ( +// Equation(s): +// \PC_Reg_Display[6]~138_combout = ( \REGS|regs[21][6]~q & ( \REGS|regs[22][6]~q & ( (!\HID_Register[0]~input_o & (((\REGS|regs[20][6]~q )) # (\HID_Register[1]~input_o ))) # (\HID_Register[0]~input_o & ((!\HID_Register[1]~input_o ) # +// ((\REGS|regs[23][6]~q )))) ) ) ) # ( !\REGS|regs[21][6]~q & ( \REGS|regs[22][6]~q & ( (!\HID_Register[0]~input_o & (((\REGS|regs[20][6]~q )) # (\HID_Register[1]~input_o ))) # (\HID_Register[0]~input_o & (\HID_Register[1]~input_o & +// (\REGS|regs[23][6]~q ))) ) ) ) # ( \REGS|regs[21][6]~q & ( !\REGS|regs[22][6]~q & ( (!\HID_Register[0]~input_o & (!\HID_Register[1]~input_o & ((\REGS|regs[20][6]~q )))) # (\HID_Register[0]~input_o & ((!\HID_Register[1]~input_o ) # +// ((\REGS|regs[23][6]~q )))) ) ) ) # ( !\REGS|regs[21][6]~q & ( !\REGS|regs[22][6]~q & ( (!\HID_Register[0]~input_o & (!\HID_Register[1]~input_o & ((\REGS|regs[20][6]~q )))) # (\HID_Register[0]~input_o & (\HID_Register[1]~input_o & +// (\REGS|regs[23][6]~q ))) ) ) ) + + .dataa(!\HID_Register[0]~input_o ), + .datab(!\HID_Register[1]~input_o ), + .datac(!\REGS|regs[23][6]~q ), + .datad(!\REGS|regs[20][6]~q ), + .datae(!\REGS|regs[21][6]~q ), + .dataf(!\REGS|regs[22][6]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[6]~138_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[6]~138 .extended_lut = "off"; +defparam \PC_Reg_Display[6]~138 .lut_mask = 64'h018945CD23AB67EF; +defparam \PC_Reg_Display[6]~138 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X25_Y11_N56 +dffeas \REGS|regs[21][22] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[22]~437_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~16_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[21][22]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[21][22] .is_wysiwyg = "true"; +defparam \REGS|regs[21][22] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X25_Y11_N14 +dffeas \REGS|regs[20][22] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[22]~437_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~7_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[20][22]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[20][22] .is_wysiwyg = "true"; +defparam \REGS|regs[20][22] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X25_Y11_N54 +cyclonev_lcell_comb \PC_Reg_Display[6]~140 ( +// Equation(s): +// \PC_Reg_Display[6]~140_combout = ( \REGS|regs[21][22]~q & ( \REGS|regs[20][22]~q & ( (!\HID_Register[1]~input_o ) # ((!\HID_Register[0]~input_o & (\REGS|regs[22][22]~q )) # (\HID_Register[0]~input_o & ((\REGS|regs[23][22]~q )))) ) ) ) # ( +// !\REGS|regs[21][22]~q & ( \REGS|regs[20][22]~q & ( (!\HID_Register[1]~input_o & (((!\HID_Register[0]~input_o )))) # (\HID_Register[1]~input_o & ((!\HID_Register[0]~input_o & (\REGS|regs[22][22]~q )) # (\HID_Register[0]~input_o & +// ((\REGS|regs[23][22]~q ))))) ) ) ) # ( \REGS|regs[21][22]~q & ( !\REGS|regs[20][22]~q & ( (!\HID_Register[1]~input_o & (((\HID_Register[0]~input_o )))) # (\HID_Register[1]~input_o & ((!\HID_Register[0]~input_o & (\REGS|regs[22][22]~q )) # +// (\HID_Register[0]~input_o & ((\REGS|regs[23][22]~q ))))) ) ) ) # ( !\REGS|regs[21][22]~q & ( !\REGS|regs[20][22]~q & ( (\HID_Register[1]~input_o & ((!\HID_Register[0]~input_o & (\REGS|regs[22][22]~q )) # (\HID_Register[0]~input_o & +// ((\REGS|regs[23][22]~q ))))) ) ) ) + + .dataa(!\HID_Register[1]~input_o ), + .datab(!\REGS|regs[22][22]~q ), + .datac(!\REGS|regs[23][22]~q ), + .datad(!\HID_Register[0]~input_o ), + .datae(!\REGS|regs[21][22]~q ), + .dataf(!\REGS|regs[20][22]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[6]~140_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[6]~140 .extended_lut = "off"; +defparam \PC_Reg_Display[6]~140 .lut_mask = 64'h110511AFBB05BBAF; +defparam \PC_Reg_Display[6]~140 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X30_Y13_N6 +cyclonev_lcell_comb \PC_Reg_Display[6]~141 ( +// Equation(s): +// \PC_Reg_Display[6]~141_combout = ( \HID_Hi_Low[0]~input_o & ( \PC_Reg_Display[6]~140_combout & ( (\HID_Register[2]~input_o ) # (\PC_Reg_Display[6]~139_combout ) ) ) ) # ( !\HID_Hi_Low[0]~input_o & ( \PC_Reg_Display[6]~140_combout & ( +// (!\HID_Register[2]~input_o & (\PC_Reg_Display[6]~137_combout )) # (\HID_Register[2]~input_o & ((\PC_Reg_Display[6]~138_combout ))) ) ) ) # ( \HID_Hi_Low[0]~input_o & ( !\PC_Reg_Display[6]~140_combout & ( (\PC_Reg_Display[6]~139_combout & +// !\HID_Register[2]~input_o ) ) ) ) # ( !\HID_Hi_Low[0]~input_o & ( !\PC_Reg_Display[6]~140_combout & ( (!\HID_Register[2]~input_o & (\PC_Reg_Display[6]~137_combout )) # (\HID_Register[2]~input_o & ((\PC_Reg_Display[6]~138_combout ))) ) ) ) + + .dataa(!\PC_Reg_Display[6]~139_combout ), + .datab(!\HID_Register[2]~input_o ), + .datac(!\PC_Reg_Display[6]~137_combout ), + .datad(!\PC_Reg_Display[6]~138_combout ), + .datae(!\HID_Hi_Low[0]~input_o ), + .dataf(!\PC_Reg_Display[6]~140_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[6]~141_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[6]~141 .extended_lut = "off"; +defparam \PC_Reg_Display[6]~141 .lut_mask = 64'h0C3F44440C3F7777; +defparam \PC_Reg_Display[6]~141 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X37_Y5_N22 +dffeas \REGS|regs[10][22] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[22]~437_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~33_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[10][22]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[10][22] .is_wysiwyg = "true"; +defparam \REGS|regs[10][22] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y13_N12 +cyclonev_lcell_comb \PC_Reg_Display[6]~144 ( +// Equation(s): +// \PC_Reg_Display[6]~144_combout = ( \REGS|regs[10][22]~q & ( \REGS|regs[14][22]~q & ( ((!\HID_Register[2]~input_o & ((\REGS|regs[8][22]~q ))) # (\HID_Register[2]~input_o & (\REGS|regs[12][22]~q ))) # (\HID_Register[1]~input_o ) ) ) ) # ( +// !\REGS|regs[10][22]~q & ( \REGS|regs[14][22]~q & ( (!\HID_Register[2]~input_o & (((!\HID_Register[1]~input_o & \REGS|regs[8][22]~q )))) # (\HID_Register[2]~input_o & (((\HID_Register[1]~input_o )) # (\REGS|regs[12][22]~q ))) ) ) ) # ( +// \REGS|regs[10][22]~q & ( !\REGS|regs[14][22]~q & ( (!\HID_Register[2]~input_o & (((\REGS|regs[8][22]~q ) # (\HID_Register[1]~input_o )))) # (\HID_Register[2]~input_o & (\REGS|regs[12][22]~q & (!\HID_Register[1]~input_o ))) ) ) ) # ( +// !\REGS|regs[10][22]~q & ( !\REGS|regs[14][22]~q & ( (!\HID_Register[1]~input_o & ((!\HID_Register[2]~input_o & ((\REGS|regs[8][22]~q ))) # (\HID_Register[2]~input_o & (\REGS|regs[12][22]~q )))) ) ) ) + + .dataa(!\HID_Register[2]~input_o ), + .datab(!\REGS|regs[12][22]~q ), + .datac(!\HID_Register[1]~input_o ), + .datad(!\REGS|regs[8][22]~q ), + .datae(!\REGS|regs[10][22]~q ), + .dataf(!\REGS|regs[14][22]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[6]~144_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[6]~144 .extended_lut = "off"; +defparam \PC_Reg_Display[6]~144 .lut_mask = 64'h10B01ABA15B51FBF; +defparam \PC_Reg_Display[6]~144 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X37_Y5_N1 +dffeas \REGS|regs[11][6]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[6]~438_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~37_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[11][6]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[11][6]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[11][6]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: FF_X32_Y13_N50 +dffeas \REGS|regs[15][6]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[15][6]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~39_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[15][6]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[15][6]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[15][6]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y13_N39 +cyclonev_lcell_comb \PC_Reg_Display[6]~143 ( +// Equation(s): +// \PC_Reg_Display[6]~143_combout = ( \REGS|regs[13][6]~q & ( \REGS|regs[15][6]~DUPLICATE_q & ( ((!\HID_Register[1]~input_o & (\REGS|regs[9][6]~DUPLICATE_q )) # (\HID_Register[1]~input_o & ((\REGS|regs[11][6]~DUPLICATE_q )))) # (\HID_Register[2]~input_o +// ) ) ) ) # ( !\REGS|regs[13][6]~q & ( \REGS|regs[15][6]~DUPLICATE_q & ( (!\HID_Register[2]~input_o & ((!\HID_Register[1]~input_o & (\REGS|regs[9][6]~DUPLICATE_q )) # (\HID_Register[1]~input_o & ((\REGS|regs[11][6]~DUPLICATE_q ))))) # +// (\HID_Register[2]~input_o & (((\HID_Register[1]~input_o )))) ) ) ) # ( \REGS|regs[13][6]~q & ( !\REGS|regs[15][6]~DUPLICATE_q & ( (!\HID_Register[2]~input_o & ((!\HID_Register[1]~input_o & (\REGS|regs[9][6]~DUPLICATE_q )) # (\HID_Register[1]~input_o +// & ((\REGS|regs[11][6]~DUPLICATE_q ))))) # (\HID_Register[2]~input_o & (((!\HID_Register[1]~input_o )))) ) ) ) # ( !\REGS|regs[13][6]~q & ( !\REGS|regs[15][6]~DUPLICATE_q & ( (!\HID_Register[2]~input_o & ((!\HID_Register[1]~input_o & +// (\REGS|regs[9][6]~DUPLICATE_q )) # (\HID_Register[1]~input_o & ((\REGS|regs[11][6]~DUPLICATE_q ))))) ) ) ) + + .dataa(!\HID_Register[2]~input_o ), + .datab(!\REGS|regs[9][6]~DUPLICATE_q ), + .datac(!\REGS|regs[11][6]~DUPLICATE_q ), + .datad(!\HID_Register[1]~input_o ), + .datae(!\REGS|regs[13][6]~q ), + .dataf(!\REGS|regs[15][6]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[6]~143_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[6]~143 .extended_lut = "off"; +defparam \PC_Reg_Display[6]~143 .lut_mask = 64'h220A770A225F775F; +defparam \PC_Reg_Display[6]~143 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X37_Y5_N34 +dffeas \REGS|regs[10][6] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[6]~438_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~33_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[10][6]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[10][6] .is_wysiwyg = "true"; +defparam \REGS|regs[10][6] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y13_N54 +cyclonev_lcell_comb \PC_Reg_Display[6]~142 ( +// Equation(s): +// \PC_Reg_Display[6]~142_combout = ( \REGS|regs[14][6]~q & ( \REGS|regs[8][6]~DUPLICATE_q & ( (!\HID_Register[2]~input_o & (((!\HID_Register[1]~input_o )) # (\REGS|regs[10][6]~q ))) # (\HID_Register[2]~input_o & (((\REGS|regs[12][6]~q ) # +// (\HID_Register[1]~input_o )))) ) ) ) # ( !\REGS|regs[14][6]~q & ( \REGS|regs[8][6]~DUPLICATE_q & ( (!\HID_Register[2]~input_o & (((!\HID_Register[1]~input_o )) # (\REGS|regs[10][6]~q ))) # (\HID_Register[2]~input_o & (((!\HID_Register[1]~input_o & +// \REGS|regs[12][6]~q )))) ) ) ) # ( \REGS|regs[14][6]~q & ( !\REGS|regs[8][6]~DUPLICATE_q & ( (!\HID_Register[2]~input_o & (\REGS|regs[10][6]~q & (\HID_Register[1]~input_o ))) # (\HID_Register[2]~input_o & (((\REGS|regs[12][6]~q ) # +// (\HID_Register[1]~input_o )))) ) ) ) # ( !\REGS|regs[14][6]~q & ( !\REGS|regs[8][6]~DUPLICATE_q & ( (!\HID_Register[2]~input_o & (\REGS|regs[10][6]~q & (\HID_Register[1]~input_o ))) # (\HID_Register[2]~input_o & (((!\HID_Register[1]~input_o & +// \REGS|regs[12][6]~q )))) ) ) ) + + .dataa(!\HID_Register[2]~input_o ), + .datab(!\REGS|regs[10][6]~q ), + .datac(!\HID_Register[1]~input_o ), + .datad(!\REGS|regs[12][6]~q ), + .datae(!\REGS|regs[14][6]~q ), + .dataf(!\REGS|regs[8][6]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[6]~142_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[6]~142 .extended_lut = "off"; +defparam \PC_Reg_Display[6]~142 .lut_mask = 64'h02520757A2F2A7F7; +defparam \PC_Reg_Display[6]~142 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X30_Y13_N30 +cyclonev_lcell_comb \PC_Reg_Display[6]~145 ( +// Equation(s): +// \PC_Reg_Display[6]~145_combout = ( \REGS|regs[15][22]~q & ( \REGS|regs[9][22]~q & ( (!\HID_Register[1]~input_o & (((!\HID_Register[2]~input_o ) # (\REGS|regs[13][22]~q )))) # (\HID_Register[1]~input_o & (((\HID_Register[2]~input_o )) # +// (\REGS|regs[11][22]~q ))) ) ) ) # ( !\REGS|regs[15][22]~q & ( \REGS|regs[9][22]~q & ( (!\HID_Register[1]~input_o & (((!\HID_Register[2]~input_o ) # (\REGS|regs[13][22]~q )))) # (\HID_Register[1]~input_o & (\REGS|regs[11][22]~q & +// (!\HID_Register[2]~input_o ))) ) ) ) # ( \REGS|regs[15][22]~q & ( !\REGS|regs[9][22]~q & ( (!\HID_Register[1]~input_o & (((\HID_Register[2]~input_o & \REGS|regs[13][22]~q )))) # (\HID_Register[1]~input_o & (((\HID_Register[2]~input_o )) # +// (\REGS|regs[11][22]~q ))) ) ) ) # ( !\REGS|regs[15][22]~q & ( !\REGS|regs[9][22]~q & ( (!\HID_Register[1]~input_o & (((\HID_Register[2]~input_o & \REGS|regs[13][22]~q )))) # (\HID_Register[1]~input_o & (\REGS|regs[11][22]~q & +// (!\HID_Register[2]~input_o ))) ) ) ) + + .dataa(!\HID_Register[1]~input_o ), + .datab(!\REGS|regs[11][22]~q ), + .datac(!\HID_Register[2]~input_o ), + .datad(!\REGS|regs[13][22]~q ), + .datae(!\REGS|regs[15][22]~q ), + .dataf(!\REGS|regs[9][22]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[6]~145_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[6]~145 .extended_lut = "off"; +defparam \PC_Reg_Display[6]~145 .lut_mask = 64'h101A151FB0BAB5BF; +defparam \PC_Reg_Display[6]~145 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y13_N21 +cyclonev_lcell_comb \PC_Reg_Display[6]~146 ( +// Equation(s): +// \PC_Reg_Display[6]~146_combout = ( \HID_Hi_Low[0]~input_o & ( \PC_Reg_Display[6]~145_combout & ( (\PC_Reg_Display[6]~144_combout ) # (\HID_Register[0]~input_o ) ) ) ) # ( !\HID_Hi_Low[0]~input_o & ( \PC_Reg_Display[6]~145_combout & ( +// (!\HID_Register[0]~input_o & ((\PC_Reg_Display[6]~142_combout ))) # (\HID_Register[0]~input_o & (\PC_Reg_Display[6]~143_combout )) ) ) ) # ( \HID_Hi_Low[0]~input_o & ( !\PC_Reg_Display[6]~145_combout & ( (!\HID_Register[0]~input_o & +// \PC_Reg_Display[6]~144_combout ) ) ) ) # ( !\HID_Hi_Low[0]~input_o & ( !\PC_Reg_Display[6]~145_combout & ( (!\HID_Register[0]~input_o & ((\PC_Reg_Display[6]~142_combout ))) # (\HID_Register[0]~input_o & (\PC_Reg_Display[6]~143_combout )) ) ) ) + + .dataa(!\HID_Register[0]~input_o ), + .datab(!\PC_Reg_Display[6]~144_combout ), + .datac(!\PC_Reg_Display[6]~143_combout ), + .datad(!\PC_Reg_Display[6]~142_combout ), + .datae(!\HID_Hi_Low[0]~input_o ), + .dataf(!\PC_Reg_Display[6]~145_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[6]~146_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[6]~146 .extended_lut = "off"; +defparam \PC_Reg_Display[6]~146 .lut_mask = 64'h05AF222205AF7777; +defparam \PC_Reg_Display[6]~146 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X30_Y13_N54 +cyclonev_lcell_comb \PC_Reg_Display[6]~152 ( +// Equation(s): +// \PC_Reg_Display[6]~152_combout = ( \HID_Register[3]~input_o & ( \PC_Reg_Display[6]~146_combout & ( (!\HID_Register[4]~input_o ) # (\PC_Reg_Display[6]~151_combout ) ) ) ) # ( !\HID_Register[3]~input_o & ( \PC_Reg_Display[6]~146_combout & ( +// (!\HID_Register[4]~input_o & (\PC_Reg_Display[6]~136_combout )) # (\HID_Register[4]~input_o & ((\PC_Reg_Display[6]~141_combout ))) ) ) ) # ( \HID_Register[3]~input_o & ( !\PC_Reg_Display[6]~146_combout & ( (\HID_Register[4]~input_o & +// \PC_Reg_Display[6]~151_combout ) ) ) ) # ( !\HID_Register[3]~input_o & ( !\PC_Reg_Display[6]~146_combout & ( (!\HID_Register[4]~input_o & (\PC_Reg_Display[6]~136_combout )) # (\HID_Register[4]~input_o & ((\PC_Reg_Display[6]~141_combout ))) ) ) ) + + .dataa(!\PC_Reg_Display[6]~136_combout ), + .datab(!\HID_Register[4]~input_o ), + .datac(!\PC_Reg_Display[6]~151_combout ), + .datad(!\PC_Reg_Display[6]~141_combout ), + .datae(!\HID_Register[3]~input_o ), + .dataf(!\PC_Reg_Display[6]~146_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[6]~152_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[6]~152 .extended_lut = "off"; +defparam \PC_Reg_Display[6]~152 .lut_mask = 64'h447703034477CFCF; +defparam \PC_Reg_Display[6]~152 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X36_Y7_N6 +cyclonev_lcell_comb \PC_Reg_Display[6]~153 ( +// Equation(s): +// \PC_Reg_Display[6]~153_combout = ( \PC|pc[6]~DUPLICATE_q & ( (!\HID_PC[0]~input_o & (((\PC_Reg_Display[6]~152_combout )))) # (\HID_PC[0]~input_o & ((!\HID_Hi_Low[0]~input_o ) # ((\PC|pc [22])))) ) ) # ( !\PC|pc[6]~DUPLICATE_q & ( (!\HID_PC[0]~input_o +// & (((\PC_Reg_Display[6]~152_combout )))) # (\HID_PC[0]~input_o & (\HID_Hi_Low[0]~input_o & (\PC|pc [22]))) ) ) + + .dataa(!\HID_PC[0]~input_o ), + .datab(!\HID_Hi_Low[0]~input_o ), + .datac(!\PC|pc [22]), + .datad(!\PC_Reg_Display[6]~152_combout ), + .datae(gnd), + .dataf(!\PC|pc[6]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[6]~153_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[6]~153 .extended_lut = "off"; +defparam \PC_Reg_Display[6]~153 .lut_mask = 64'h01AB01AB45EF45EF; +defparam \PC_Reg_Display[6]~153 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X47_Y5_N51 +cyclonev_lcell_comb \display|digit1|Mux5~0 ( +// Equation(s): +// \display|digit1|Mux5~0_combout = ( \PC_Reg_Display[7]~175_combout & ( \PC_Reg_Display[6]~153_combout & ( (\PC_Reg_Display[4]~109_combout & !\PC_Reg_Display[5]~131_combout ) ) ) ) # ( !\PC_Reg_Display[7]~175_combout & ( \PC_Reg_Display[6]~153_combout +// & ( (!\PC_Reg_Display[4]~109_combout & !\PC_Reg_Display[5]~131_combout ) ) ) ) # ( \PC_Reg_Display[7]~175_combout & ( !\PC_Reg_Display[6]~153_combout & ( (\PC_Reg_Display[4]~109_combout & \PC_Reg_Display[5]~131_combout ) ) ) ) # ( +// !\PC_Reg_Display[7]~175_combout & ( !\PC_Reg_Display[6]~153_combout & ( (\PC_Reg_Display[4]~109_combout & !\PC_Reg_Display[5]~131_combout ) ) ) ) + + .dataa(!\PC_Reg_Display[4]~109_combout ), + .datab(gnd), + .datac(gnd), + .datad(!\PC_Reg_Display[5]~131_combout ), + .datae(!\PC_Reg_Display[7]~175_combout ), + .dataf(!\PC_Reg_Display[6]~153_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\display|digit1|Mux5~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \display|digit1|Mux5~0 .extended_lut = "off"; +defparam \display|digit1|Mux5~0 .lut_mask = 64'h55000055AA005500; +defparam \display|digit1|Mux5~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X47_Y5_N6 +cyclonev_lcell_comb \display|digit1|Mux4~0 ( +// Equation(s): +// \display|digit1|Mux4~0_combout = (!\PC_Reg_Display[7]~175_combout & (\PC_Reg_Display[6]~153_combout & (!\PC_Reg_Display[4]~109_combout $ (!\PC_Reg_Display[5]~131_combout )))) # (\PC_Reg_Display[7]~175_combout & ((!\PC_Reg_Display[4]~109_combout & +// (\PC_Reg_Display[6]~153_combout )) # (\PC_Reg_Display[4]~109_combout & ((\PC_Reg_Display[5]~131_combout ))))) + + .dataa(!\PC_Reg_Display[7]~175_combout ), + .datab(!\PC_Reg_Display[6]~153_combout ), + .datac(!\PC_Reg_Display[4]~109_combout ), + .datad(!\PC_Reg_Display[5]~131_combout ), + .datae(gnd), + .dataf(gnd), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\display|digit1|Mux4~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \display|digit1|Mux4~0 .extended_lut = "off"; +defparam \display|digit1|Mux4~0 .lut_mask = 64'h1235123512351235; +defparam \display|digit1|Mux4~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X47_Y5_N54 +cyclonev_lcell_comb \display|digit1|Mux3~0 ( +// Equation(s): +// \display|digit1|Mux3~0_combout = ( \PC_Reg_Display[7]~175_combout & ( \PC_Reg_Display[6]~153_combout & ( (!\PC_Reg_Display[4]~109_combout ) # (\PC_Reg_Display[5]~131_combout ) ) ) ) # ( !\PC_Reg_Display[7]~175_combout & ( +// !\PC_Reg_Display[6]~153_combout & ( (\PC_Reg_Display[5]~131_combout & !\PC_Reg_Display[4]~109_combout ) ) ) ) + + .dataa(!\PC_Reg_Display[5]~131_combout ), + .datab(gnd), + .datac(!\PC_Reg_Display[4]~109_combout ), + .datad(gnd), + .datae(!\PC_Reg_Display[7]~175_combout ), + .dataf(!\PC_Reg_Display[6]~153_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\display|digit1|Mux3~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \display|digit1|Mux3~0 .extended_lut = "off"; +defparam \display|digit1|Mux3~0 .lut_mask = 64'h505000000000F5F5; +defparam \display|digit1|Mux3~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X47_Y5_N3 +cyclonev_lcell_comb \display|digit1|Mux2~0 ( +// Equation(s): +// \display|digit1|Mux2~0_combout = ( \PC_Reg_Display[7]~175_combout & ( \PC_Reg_Display[6]~153_combout & ( (\PC_Reg_Display[4]~109_combout & \PC_Reg_Display[5]~131_combout ) ) ) ) # ( !\PC_Reg_Display[7]~175_combout & ( \PC_Reg_Display[6]~153_combout +// & ( !\PC_Reg_Display[4]~109_combout $ (\PC_Reg_Display[5]~131_combout ) ) ) ) # ( \PC_Reg_Display[7]~175_combout & ( !\PC_Reg_Display[6]~153_combout & ( !\PC_Reg_Display[4]~109_combout $ (!\PC_Reg_Display[5]~131_combout ) ) ) ) # ( +// !\PC_Reg_Display[7]~175_combout & ( !\PC_Reg_Display[6]~153_combout & ( (\PC_Reg_Display[4]~109_combout & !\PC_Reg_Display[5]~131_combout ) ) ) ) + + .dataa(!\PC_Reg_Display[4]~109_combout ), + .datab(gnd), + .datac(gnd), + .datad(!\PC_Reg_Display[5]~131_combout ), + .datae(!\PC_Reg_Display[7]~175_combout ), + .dataf(!\PC_Reg_Display[6]~153_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\display|digit1|Mux2~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \display|digit1|Mux2~0 .extended_lut = "off"; +defparam \display|digit1|Mux2~0 .lut_mask = 64'h550055AAAA550055; +defparam \display|digit1|Mux2~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X47_Y5_N9 +cyclonev_lcell_comb \display|digit1|Mux1~0 ( +// Equation(s): +// \display|digit1|Mux1~0_combout = ( \PC_Reg_Display[4]~109_combout & ( (!\PC_Reg_Display[7]~175_combout ) # ((!\PC_Reg_Display[6]~153_combout & !\PC_Reg_Display[5]~131_combout )) ) ) # ( !\PC_Reg_Display[4]~109_combout & ( +// (!\PC_Reg_Display[7]~175_combout & (\PC_Reg_Display[6]~153_combout & !\PC_Reg_Display[5]~131_combout )) ) ) + + .dataa(!\PC_Reg_Display[7]~175_combout ), + .datab(!\PC_Reg_Display[6]~153_combout ), + .datac(gnd), + .datad(!\PC_Reg_Display[5]~131_combout ), + .datae(gnd), + .dataf(!\PC_Reg_Display[4]~109_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\display|digit1|Mux1~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \display|digit1|Mux1~0 .extended_lut = "off"; +defparam \display|digit1|Mux1~0 .lut_mask = 64'h22002200EEAAEEAA; +defparam \display|digit1|Mux1~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X47_Y5_N27 +cyclonev_lcell_comb \display|digit1|Mux0~0 ( +// Equation(s): +// \display|digit1|Mux0~0_combout = ( \PC_Reg_Display[4]~109_combout & ( !\PC_Reg_Display[7]~175_combout $ (((\PC_Reg_Display[6]~153_combout & !\PC_Reg_Display[5]~131_combout ))) ) ) # ( !\PC_Reg_Display[4]~109_combout & ( +// (!\PC_Reg_Display[7]~175_combout & (!\PC_Reg_Display[6]~153_combout & \PC_Reg_Display[5]~131_combout )) ) ) + + .dataa(!\PC_Reg_Display[7]~175_combout ), + .datab(!\PC_Reg_Display[6]~153_combout ), + .datac(gnd), + .datad(!\PC_Reg_Display[5]~131_combout ), + .datae(gnd), + .dataf(!\PC_Reg_Display[4]~109_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\display|digit1|Mux0~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \display|digit1|Mux0~0 .extended_lut = "off"; +defparam \display|digit1|Mux0~0 .lut_mask = 64'h0088008899AA99AA; +defparam \display|digit1|Mux0~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X47_Y5_N24 +cyclonev_lcell_comb \display|digit1|WideOr0~0 ( +// Equation(s): +// \display|digit1|WideOr0~0_combout = (!\PC_Reg_Display[4]~109_combout & ((!\PC_Reg_Display[7]~175_combout $ (!\PC_Reg_Display[6]~153_combout )) # (\PC_Reg_Display[5]~131_combout ))) # (\PC_Reg_Display[4]~109_combout & ((!\PC_Reg_Display[6]~153_combout +// $ (!\PC_Reg_Display[5]~131_combout )) # (\PC_Reg_Display[7]~175_combout ))) + + .dataa(!\PC_Reg_Display[7]~175_combout ), + .datab(!\PC_Reg_Display[6]~153_combout ), + .datac(!\PC_Reg_Display[4]~109_combout ), + .datad(!\PC_Reg_Display[5]~131_combout ), + .datae(gnd), + .dataf(gnd), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\display|digit1|WideOr0~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \display|digit1|WideOr0~0 .extended_lut = "off"; +defparam \display|digit1|WideOr0~0 .lut_mask = 64'h67FD67FD67FD67FD; +defparam \display|digit1|WideOr0~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X36_Y7_N36 +cyclonev_lcell_comb \Add0~57 ( +// Equation(s): +// \Add0~57_sumout = SUM(( (pc_we[0] & \PC|pc [24]) ) + ( (!pc_we[0] & \PC|pc [24]) ) + ( \Add0~50 )) +// \Add0~58 = CARRY(( (pc_we[0] & \PC|pc [24]) ) + ( (!pc_we[0] & \PC|pc [24]) ) + ( \Add0~50 )) + + .dataa(!pc_we[0]), + .datab(gnd), + .datac(!\PC|pc [24]), + .datad(gnd), + .datae(gnd), + .dataf(gnd), + .datag(gnd), + .cin(\Add0~50 ), + .sharein(gnd), + .combout(), + .sumout(\Add0~57_sumout ), + .cout(\Add0~58 ), + .shareout()); +// synopsys translate_off +defparam \Add0~57 .extended_lut = "off"; +defparam \Add0~57 .lut_mask = 64'h0000F5F500000505; +defparam \Add0~57 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X36_Y7_N38 +dffeas \PC|pc[24] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\Add0~57_sumout ), + .asdata(vcc), + .clrn(!\rst[0]~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\PC|pc [24]), + .prn(vcc)); +// synopsys translate_off +defparam \PC|pc[24] .is_wysiwyg = "true"; +defparam \PC|pc[24] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X36_Y7_N39 +cyclonev_lcell_comb \Add0~65 ( +// Equation(s): +// \Add0~65_sumout = SUM(( (pc_we[0] & \PC|pc [25]) ) + ( (!pc_we[0] & \PC|pc [25]) ) + ( \Add0~58 )) +// \Add0~66 = CARRY(( (pc_we[0] & \PC|pc [25]) ) + ( (!pc_we[0] & \PC|pc [25]) ) + ( \Add0~58 )) + + .dataa(!pc_we[0]), + .datab(gnd), + .datac(!\PC|pc [25]), + .datad(gnd), + .datae(gnd), + .dataf(gnd), + .datag(gnd), + .cin(\Add0~58 ), + .sharein(gnd), + .combout(), + .sumout(\Add0~65_sumout ), + .cout(\Add0~66 ), + .shareout()); +// synopsys translate_off +defparam \Add0~65 .extended_lut = "off"; +defparam \Add0~65 .lut_mask = 64'h0000F5F500000505; +defparam \Add0~65 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X36_Y7_N41 +dffeas \PC|pc[25] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\Add0~65_sumout ), + .asdata(vcc), + .clrn(!\rst[0]~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\PC|pc [25]), + .prn(vcc)); +// synopsys translate_off +defparam \PC|pc[25] .is_wysiwyg = "true"; +defparam \PC|pc[25] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X36_Y7_N42 +cyclonev_lcell_comb \Add0~73 ( +// Equation(s): +// \Add0~73_sumout = SUM(( (pc_we[0] & \PC|pc [26]) ) + ( (!pc_we[0] & \PC|pc [26]) ) + ( \Add0~66 )) +// \Add0~74 = CARRY(( (pc_we[0] & \PC|pc [26]) ) + ( (!pc_we[0] & \PC|pc [26]) ) + ( \Add0~66 )) + + .dataa(!pc_we[0]), + .datab(gnd), + .datac(!\PC|pc [26]), + .datad(gnd), + .datae(gnd), + .dataf(gnd), + .datag(gnd), + .cin(\Add0~66 ), + .sharein(gnd), + .combout(), + .sumout(\Add0~73_sumout ), + .cout(\Add0~74 ), + .shareout()); +// synopsys translate_off +defparam \Add0~73 .extended_lut = "off"; +defparam \Add0~73 .lut_mask = 64'h0000F5F500000505; +defparam \Add0~73 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X36_Y7_N43 +dffeas \PC|pc[26] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\Add0~73_sumout ), + .asdata(vcc), + .clrn(!\rst[0]~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\PC|pc [26]), + .prn(vcc)); +// synopsys translate_off +defparam \PC|pc[26] .is_wysiwyg = "true"; +defparam \PC|pc[26] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X36_Y7_N45 +cyclonev_lcell_comb \Add0~81 ( +// Equation(s): +// \Add0~81_sumout = SUM(( (pc_we[0] & \PC|pc [27]) ) + ( (!pc_we[0] & \PC|pc [27]) ) + ( \Add0~74 )) +// \Add0~82 = CARRY(( (pc_we[0] & \PC|pc [27]) ) + ( (!pc_we[0] & \PC|pc [27]) ) + ( \Add0~74 )) + + .dataa(!pc_we[0]), + .datab(gnd), + .datac(!\PC|pc [27]), + .datad(gnd), + .datae(gnd), + .dataf(gnd), + .datag(gnd), + .cin(\Add0~74 ), + .sharein(gnd), + .combout(), + .sumout(\Add0~81_sumout ), + .cout(\Add0~82 ), + .shareout()); +// synopsys translate_off +defparam \Add0~81 .extended_lut = "off"; +defparam \Add0~81 .lut_mask = 64'h0000F5F500000505; +defparam \Add0~81 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X36_Y7_N47 +dffeas \PC|pc[27] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\Add0~81_sumout ), + .asdata(vcc), + .clrn(!\rst[0]~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\PC|pc [27]), + .prn(vcc)); +// synopsys translate_off +defparam \PC|pc[27] .is_wysiwyg = "true"; +defparam \PC|pc[27] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X22_Y5_N19 +dffeas \REGS|regs[21][11] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[11]~448_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~16_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[21][11]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[21][11] .is_wysiwyg = "true"; +defparam \REGS|regs[21][11] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X22_Y5_N23 +dffeas \REGS|regs[21][27] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[27]~447_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~16_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[21][27]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[21][27] .is_wysiwyg = "true"; +defparam \REGS|regs[21][27] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X22_Y5_N21 +cyclonev_lcell_comb \PC_Reg_Display[11]~250 ( +// Equation(s): +// \PC_Reg_Display[11]~250_combout = ( \REGS|regs[21][27]~q & ( \REGS|regs[23][11]~q & ( (!\HID_Hi_Low[0]~input_o & (((\HID_Register[1]~input_o ) # (\REGS|regs[21][11]~q )))) # (\HID_Hi_Low[0]~input_o & (((!\HID_Register[1]~input_o )) # +// (\REGS|regs[23][27]~q ))) ) ) ) # ( !\REGS|regs[21][27]~q & ( \REGS|regs[23][11]~q & ( (!\HID_Hi_Low[0]~input_o & (((\HID_Register[1]~input_o ) # (\REGS|regs[21][11]~q )))) # (\HID_Hi_Low[0]~input_o & (\REGS|regs[23][27]~q & +// ((\HID_Register[1]~input_o )))) ) ) ) # ( \REGS|regs[21][27]~q & ( !\REGS|regs[23][11]~q & ( (!\HID_Hi_Low[0]~input_o & (((\REGS|regs[21][11]~q & !\HID_Register[1]~input_o )))) # (\HID_Hi_Low[0]~input_o & (((!\HID_Register[1]~input_o )) # +// (\REGS|regs[23][27]~q ))) ) ) ) # ( !\REGS|regs[21][27]~q & ( !\REGS|regs[23][11]~q & ( (!\HID_Hi_Low[0]~input_o & (((\REGS|regs[21][11]~q & !\HID_Register[1]~input_o )))) # (\HID_Hi_Low[0]~input_o & (\REGS|regs[23][27]~q & +// ((\HID_Register[1]~input_o )))) ) ) ) + + .dataa(!\REGS|regs[23][27]~q ), + .datab(!\HID_Hi_Low[0]~input_o ), + .datac(!\REGS|regs[21][11]~q ), + .datad(!\HID_Register[1]~input_o ), + .datae(!\REGS|regs[21][27]~q ), + .dataf(!\REGS|regs[23][11]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[11]~250_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[11]~250 .extended_lut = "off"; +defparam \PC_Reg_Display[11]~250 .lut_mask = 64'h0C113F110CDD3FDD; +defparam \PC_Reg_Display[11]~250 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X30_Y5_N22 +dffeas \REGS|regs[20][27] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[27]~447_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~7_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[20][27]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[20][27] .is_wysiwyg = "true"; +defparam \REGS|regs[20][27] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X35_Y14_N22 +dffeas \REGS|regs[22][11]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[11]~448_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~9_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[22][11]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[22][11]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[22][11]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X31_Y4_N30 +cyclonev_lcell_comb \PC_Reg_Display[11]~248 ( +// Equation(s): +// \PC_Reg_Display[11]~248_combout = ( \REGS|regs[22][27]~q & ( \REGS|regs[22][11]~DUPLICATE_q & ( ((!\HID_Hi_Low[0]~input_o & ((\REGS|regs[20][11]~q ))) # (\HID_Hi_Low[0]~input_o & (\REGS|regs[20][27]~q ))) # (\HID_Register[1]~input_o ) ) ) ) # ( +// !\REGS|regs[22][27]~q & ( \REGS|regs[22][11]~DUPLICATE_q & ( (!\HID_Register[1]~input_o & ((!\HID_Hi_Low[0]~input_o & ((\REGS|regs[20][11]~q ))) # (\HID_Hi_Low[0]~input_o & (\REGS|regs[20][27]~q )))) # (\HID_Register[1]~input_o & +// (((!\HID_Hi_Low[0]~input_o )))) ) ) ) # ( \REGS|regs[22][27]~q & ( !\REGS|regs[22][11]~DUPLICATE_q & ( (!\HID_Register[1]~input_o & ((!\HID_Hi_Low[0]~input_o & ((\REGS|regs[20][11]~q ))) # (\HID_Hi_Low[0]~input_o & (\REGS|regs[20][27]~q )))) # +// (\HID_Register[1]~input_o & (((\HID_Hi_Low[0]~input_o )))) ) ) ) # ( !\REGS|regs[22][27]~q & ( !\REGS|regs[22][11]~DUPLICATE_q & ( (!\HID_Register[1]~input_o & ((!\HID_Hi_Low[0]~input_o & ((\REGS|regs[20][11]~q ))) # (\HID_Hi_Low[0]~input_o & +// (\REGS|regs[20][27]~q )))) ) ) ) + + .dataa(!\REGS|regs[20][27]~q ), + .datab(!\REGS|regs[20][11]~q ), + .datac(!\HID_Register[1]~input_o ), + .datad(!\HID_Hi_Low[0]~input_o ), + .datae(!\REGS|regs[22][27]~q ), + .dataf(!\REGS|regs[22][11]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[11]~248_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[11]~248 .extended_lut = "off"; +defparam \PC_Reg_Display[11]~248 .lut_mask = 64'h3050305F3F503F5F; +defparam \PC_Reg_Display[11]~248 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X33_Y7_N46 +dffeas \REGS|regs[17][11]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[11]~448_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~11_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[17][11]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[17][11]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[17][11]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: FF_X28_Y4_N17 +dffeas \REGS|regs[17][27] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[27]~447_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~11_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[17][27]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[17][27] .is_wysiwyg = "true"; +defparam \REGS|regs[17][27] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X28_Y4_N15 +cyclonev_lcell_comb \PC_Reg_Display[11]~249 ( +// Equation(s): +// \PC_Reg_Display[11]~249_combout = ( \REGS|regs[17][27]~q & ( \HID_Register[1]~input_o & ( (!\HID_Hi_Low[0]~input_o & (\REGS|regs[19][11]~q )) # (\HID_Hi_Low[0]~input_o & ((\REGS|regs[19][27]~q ))) ) ) ) # ( !\REGS|regs[17][27]~q & ( +// \HID_Register[1]~input_o & ( (!\HID_Hi_Low[0]~input_o & (\REGS|regs[19][11]~q )) # (\HID_Hi_Low[0]~input_o & ((\REGS|regs[19][27]~q ))) ) ) ) # ( \REGS|regs[17][27]~q & ( !\HID_Register[1]~input_o & ( (\HID_Hi_Low[0]~input_o ) # +// (\REGS|regs[17][11]~DUPLICATE_q ) ) ) ) # ( !\REGS|regs[17][27]~q & ( !\HID_Register[1]~input_o & ( (\REGS|regs[17][11]~DUPLICATE_q & !\HID_Hi_Low[0]~input_o ) ) ) ) + + .dataa(!\REGS|regs[17][11]~DUPLICATE_q ), + .datab(!\REGS|regs[19][11]~q ), + .datac(!\HID_Hi_Low[0]~input_o ), + .datad(!\REGS|regs[19][27]~q ), + .datae(!\REGS|regs[17][27]~q ), + .dataf(!\HID_Register[1]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[11]~249_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[11]~249 .extended_lut = "off"; +defparam \PC_Reg_Display[11]~249 .lut_mask = 64'h50505F5F303F303F; +defparam \PC_Reg_Display[11]~249 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X33_Y7_N56 +dffeas \REGS|regs[18][11] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[11]~448_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~5_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[18][11]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[18][11] .is_wysiwyg = "true"; +defparam \REGS|regs[18][11] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X33_Y7_N36 +cyclonev_lcell_comb \PC_Reg_Display[11]~247 ( +// Equation(s): +// \PC_Reg_Display[11]~247_combout = ( \REGS|regs[18][11]~q & ( \HID_Register[1]~input_o & ( (!\HID_Hi_Low[0]~input_o ) # (\REGS|regs[18][27]~q ) ) ) ) # ( !\REGS|regs[18][11]~q & ( \HID_Register[1]~input_o & ( (\REGS|regs[18][27]~q & +// \HID_Hi_Low[0]~input_o ) ) ) ) # ( \REGS|regs[18][11]~q & ( !\HID_Register[1]~input_o & ( (!\HID_Hi_Low[0]~input_o & ((\REGS|regs[16][11]~q ))) # (\HID_Hi_Low[0]~input_o & (\REGS|regs[16][27]~q )) ) ) ) # ( !\REGS|regs[18][11]~q & ( +// !\HID_Register[1]~input_o & ( (!\HID_Hi_Low[0]~input_o & ((\REGS|regs[16][11]~q ))) # (\HID_Hi_Low[0]~input_o & (\REGS|regs[16][27]~q )) ) ) ) + + .dataa(!\REGS|regs[16][27]~q ), + .datab(!\REGS|regs[18][27]~q ), + .datac(!\HID_Hi_Low[0]~input_o ), + .datad(!\REGS|regs[16][11]~q ), + .datae(!\REGS|regs[18][11]~q ), + .dataf(!\HID_Register[1]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[11]~247_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[11]~247 .extended_lut = "off"; +defparam \PC_Reg_Display[11]~247 .lut_mask = 64'h05F505F50303F3F3; +defparam \PC_Reg_Display[11]~247 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X22_Y5_N36 +cyclonev_lcell_comb \PC_Reg_Display[11]~251 ( +// Equation(s): +// \PC_Reg_Display[11]~251_combout = ( \HID_Register[2]~input_o & ( \PC_Reg_Display[11]~247_combout & ( (!\HID_Register[0]~input_o & ((\PC_Reg_Display[11]~248_combout ))) # (\HID_Register[0]~input_o & (\PC_Reg_Display[11]~250_combout )) ) ) ) # ( +// !\HID_Register[2]~input_o & ( \PC_Reg_Display[11]~247_combout & ( (!\HID_Register[0]~input_o ) # (\PC_Reg_Display[11]~249_combout ) ) ) ) # ( \HID_Register[2]~input_o & ( !\PC_Reg_Display[11]~247_combout & ( (!\HID_Register[0]~input_o & +// ((\PC_Reg_Display[11]~248_combout ))) # (\HID_Register[0]~input_o & (\PC_Reg_Display[11]~250_combout )) ) ) ) # ( !\HID_Register[2]~input_o & ( !\PC_Reg_Display[11]~247_combout & ( (\PC_Reg_Display[11]~249_combout & \HID_Register[0]~input_o ) ) ) ) + + .dataa(!\PC_Reg_Display[11]~250_combout ), + .datab(!\PC_Reg_Display[11]~248_combout ), + .datac(!\PC_Reg_Display[11]~249_combout ), + .datad(!\HID_Register[0]~input_o ), + .datae(!\HID_Register[2]~input_o ), + .dataf(!\PC_Reg_Display[11]~247_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[11]~251_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[11]~251 .extended_lut = "off"; +defparam \PC_Reg_Display[11]~251 .lut_mask = 64'h000F3355FF0F3355; +defparam \PC_Reg_Display[11]~251 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X35_Y4_N55 +dffeas \REGS|regs[26][11]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[11]~448_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~6_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[26][11]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[26][11]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[26][11]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X27_Y9_N48 +cyclonev_lcell_comb \PC_Reg_Display[11]~259 ( +// Equation(s): +// \PC_Reg_Display[11]~259_combout = ( \REGS|regs[26][11]~DUPLICATE_q & ( \HID_Register[2]~input_o & ( (!\HID_Register[0]~input_o & ((\REGS|regs[30][11]~q ))) # (\HID_Register[0]~input_o & (\REGS|regs[31][11]~q )) ) ) ) # ( +// !\REGS|regs[26][11]~DUPLICATE_q & ( \HID_Register[2]~input_o & ( (!\HID_Register[0]~input_o & ((\REGS|regs[30][11]~q ))) # (\HID_Register[0]~input_o & (\REGS|regs[31][11]~q )) ) ) ) # ( \REGS|regs[26][11]~DUPLICATE_q & ( !\HID_Register[2]~input_o & +// ( (!\HID_Register[0]~input_o ) # (\REGS|regs[27][11]~q ) ) ) ) # ( !\REGS|regs[26][11]~DUPLICATE_q & ( !\HID_Register[2]~input_o & ( (\REGS|regs[27][11]~q & \HID_Register[0]~input_o ) ) ) ) + + .dataa(!\REGS|regs[27][11]~q ), + .datab(!\REGS|regs[31][11]~q ), + .datac(!\REGS|regs[30][11]~q ), + .datad(!\HID_Register[0]~input_o ), + .datae(!\REGS|regs[26][11]~DUPLICATE_q ), + .dataf(!\HID_Register[2]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[11]~259_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[11]~259 .extended_lut = "off"; +defparam \PC_Reg_Display[11]~259 .lut_mask = 64'h0055FF550F330F33; +defparam \PC_Reg_Display[11]~259 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X32_Y7_N43 +dffeas \REGS|regs[26][27] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[27]~447_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~6_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[26][27]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[26][27] .is_wysiwyg = "true"; +defparam \REGS|regs[26][27] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y5_N36 +cyclonev_lcell_comb \PC_Reg_Display[11]~260 ( +// Equation(s): +// \PC_Reg_Display[11]~260_combout = ( \REGS|regs[30][27]~q & ( \REGS|regs[31][27]~q & ( ((!\HID_Register[0]~input_o & (\REGS|regs[26][27]~q )) # (\HID_Register[0]~input_o & ((\REGS|regs[27][27]~q )))) # (\HID_Register[2]~input_o ) ) ) ) # ( +// !\REGS|regs[30][27]~q & ( \REGS|regs[31][27]~q & ( (!\HID_Register[0]~input_o & (\REGS|regs[26][27]~q & ((!\HID_Register[2]~input_o )))) # (\HID_Register[0]~input_o & (((\HID_Register[2]~input_o ) # (\REGS|regs[27][27]~q )))) ) ) ) # ( +// \REGS|regs[30][27]~q & ( !\REGS|regs[31][27]~q & ( (!\HID_Register[0]~input_o & (((\HID_Register[2]~input_o )) # (\REGS|regs[26][27]~q ))) # (\HID_Register[0]~input_o & (((\REGS|regs[27][27]~q & !\HID_Register[2]~input_o )))) ) ) ) # ( +// !\REGS|regs[30][27]~q & ( !\REGS|regs[31][27]~q & ( (!\HID_Register[2]~input_o & ((!\HID_Register[0]~input_o & (\REGS|regs[26][27]~q )) # (\HID_Register[0]~input_o & ((\REGS|regs[27][27]~q ))))) ) ) ) + + .dataa(!\HID_Register[0]~input_o ), + .datab(!\REGS|regs[26][27]~q ), + .datac(!\REGS|regs[27][27]~q ), + .datad(!\HID_Register[2]~input_o ), + .datae(!\REGS|regs[30][27]~q ), + .dataf(!\REGS|regs[31][27]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[11]~260_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[11]~260 .extended_lut = "off"; +defparam \PC_Reg_Display[11]~260 .lut_mask = 64'h270027AA275527FF; +defparam \PC_Reg_Display[11]~260 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X30_Y5_N12 +cyclonev_lcell_comb \PC_Reg_Display[11]~258 ( +// Equation(s): +// \PC_Reg_Display[11]~258_combout = ( \REGS|regs[28][27]~q & ( \HID_Register[0]~input_o & ( (!\HID_Register[2]~input_o & ((\REGS|regs[25][27]~q ))) # (\HID_Register[2]~input_o & (\REGS|regs[29][27]~q )) ) ) ) # ( !\REGS|regs[28][27]~q & ( +// \HID_Register[0]~input_o & ( (!\HID_Register[2]~input_o & ((\REGS|regs[25][27]~q ))) # (\HID_Register[2]~input_o & (\REGS|regs[29][27]~q )) ) ) ) # ( \REGS|regs[28][27]~q & ( !\HID_Register[0]~input_o & ( (\REGS|regs[24][27]~q ) # +// (\HID_Register[2]~input_o ) ) ) ) # ( !\REGS|regs[28][27]~q & ( !\HID_Register[0]~input_o & ( (!\HID_Register[2]~input_o & \REGS|regs[24][27]~q ) ) ) ) + + .dataa(!\HID_Register[2]~input_o ), + .datab(!\REGS|regs[24][27]~q ), + .datac(!\REGS|regs[29][27]~q ), + .datad(!\REGS|regs[25][27]~q ), + .datae(!\REGS|regs[28][27]~q ), + .dataf(!\HID_Register[0]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[11]~258_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[11]~258 .extended_lut = "off"; +defparam \PC_Reg_Display[11]~258 .lut_mask = 64'h2222777705AF05AF; +defparam \PC_Reg_Display[11]~258 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X36_Y6_N55 +dffeas \REGS|regs[29][11] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[11]~448_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~17_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[29][11]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[29][11] .is_wysiwyg = "true"; +defparam \REGS|regs[29][11] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X28_Y4_N45 +cyclonev_lcell_comb \REGS|regs[24][11]~feeder ( +// Equation(s): +// \REGS|regs[24][11]~feeder_combout = ( \rd[11]~448_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[11]~448_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[24][11]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[24][11]~feeder .extended_lut = "off"; +defparam \REGS|regs[24][11]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[24][11]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X28_Y4_N46 +dffeas \REGS|regs[24][11] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[24][11]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~4_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[24][11]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[24][11] .is_wysiwyg = "true"; +defparam \REGS|regs[24][11] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X30_Y4_N14 +dffeas \REGS|regs[25][11] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[11]~448_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~13_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[25][11]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[25][11] .is_wysiwyg = "true"; +defparam \REGS|regs[25][11] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X30_Y4_N12 +cyclonev_lcell_comb \PC_Reg_Display[11]~257 ( +// Equation(s): +// \PC_Reg_Display[11]~257_combout = ( \REGS|regs[25][11]~q & ( \HID_Register[0]~input_o & ( (!\HID_Register[2]~input_o ) # (\REGS|regs[29][11]~q ) ) ) ) # ( !\REGS|regs[25][11]~q & ( \HID_Register[0]~input_o & ( (\HID_Register[2]~input_o & +// \REGS|regs[29][11]~q ) ) ) ) # ( \REGS|regs[25][11]~q & ( !\HID_Register[0]~input_o & ( (!\HID_Register[2]~input_o & ((\REGS|regs[24][11]~q ))) # (\HID_Register[2]~input_o & (\REGS|regs[28][11]~q )) ) ) ) # ( !\REGS|regs[25][11]~q & ( +// !\HID_Register[0]~input_o & ( (!\HID_Register[2]~input_o & ((\REGS|regs[24][11]~q ))) # (\HID_Register[2]~input_o & (\REGS|regs[28][11]~q )) ) ) ) + + .dataa(!\HID_Register[2]~input_o ), + .datab(!\REGS|regs[28][11]~q ), + .datac(!\REGS|regs[29][11]~q ), + .datad(!\REGS|regs[24][11]~q ), + .datae(!\REGS|regs[25][11]~q ), + .dataf(!\HID_Register[0]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[11]~257_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[11]~257 .extended_lut = "off"; +defparam \PC_Reg_Display[11]~257 .lut_mask = 64'h11BB11BB0505AFAF; +defparam \PC_Reg_Display[11]~257 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X30_Y5_N30 +cyclonev_lcell_comb \PC_Reg_Display[11]~261 ( +// Equation(s): +// \PC_Reg_Display[11]~261_combout = ( \HID_Register[1]~input_o & ( \PC_Reg_Display[11]~257_combout & ( (!\HID_Hi_Low[0]~input_o & (\PC_Reg_Display[11]~259_combout )) # (\HID_Hi_Low[0]~input_o & ((\PC_Reg_Display[11]~260_combout ))) ) ) ) # ( +// !\HID_Register[1]~input_o & ( \PC_Reg_Display[11]~257_combout & ( (!\HID_Hi_Low[0]~input_o ) # (\PC_Reg_Display[11]~258_combout ) ) ) ) # ( \HID_Register[1]~input_o & ( !\PC_Reg_Display[11]~257_combout & ( (!\HID_Hi_Low[0]~input_o & +// (\PC_Reg_Display[11]~259_combout )) # (\HID_Hi_Low[0]~input_o & ((\PC_Reg_Display[11]~260_combout ))) ) ) ) # ( !\HID_Register[1]~input_o & ( !\PC_Reg_Display[11]~257_combout & ( (\HID_Hi_Low[0]~input_o & \PC_Reg_Display[11]~258_combout ) ) ) ) + + .dataa(!\PC_Reg_Display[11]~259_combout ), + .datab(!\PC_Reg_Display[11]~260_combout ), + .datac(!\HID_Hi_Low[0]~input_o ), + .datad(!\PC_Reg_Display[11]~258_combout ), + .datae(!\HID_Register[1]~input_o ), + .dataf(!\PC_Reg_Display[11]~257_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[11]~261_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[11]~261 .extended_lut = "off"; +defparam \PC_Reg_Display[11]~261 .lut_mask = 64'h000F5353F0FF5353; +defparam \PC_Reg_Display[11]~261 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X32_Y7_N58 +dffeas \REGS|regs[8][27] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[27]~447_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~24_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[8][27]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[8][27] .is_wysiwyg = "true"; +defparam \REGS|regs[8][27] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X30_Y7_N36 +cyclonev_lcell_comb \PC_Reg_Display[11]~253 ( +// Equation(s): +// \PC_Reg_Display[11]~253_combout = ( \REGS|regs[12][27]~q & ( \HID_Register[2]~input_o & ( (!\HID_Register[0]~input_o ) # (\REGS|regs[13][27]~q ) ) ) ) # ( !\REGS|regs[12][27]~q & ( \HID_Register[2]~input_o & ( (\HID_Register[0]~input_o & +// \REGS|regs[13][27]~q ) ) ) ) # ( \REGS|regs[12][27]~q & ( !\HID_Register[2]~input_o & ( (!\HID_Register[0]~input_o & (\REGS|regs[8][27]~q )) # (\HID_Register[0]~input_o & ((\REGS|regs[9][27]~q ))) ) ) ) # ( !\REGS|regs[12][27]~q & ( +// !\HID_Register[2]~input_o & ( (!\HID_Register[0]~input_o & (\REGS|regs[8][27]~q )) # (\HID_Register[0]~input_o & ((\REGS|regs[9][27]~q ))) ) ) ) + + .dataa(!\REGS|regs[8][27]~q ), + .datab(!\REGS|regs[9][27]~q ), + .datac(!\HID_Register[0]~input_o ), + .datad(!\REGS|regs[13][27]~q ), + .datae(!\REGS|regs[12][27]~q ), + .dataf(!\HID_Register[2]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[11]~253_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[11]~253 .extended_lut = "off"; +defparam \PC_Reg_Display[11]~253 .lut_mask = 64'h53535353000FF0FF; +defparam \PC_Reg_Display[11]~253 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X28_Y8_N1 +dffeas \REGS|regs[11][27]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[27]~447_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~37_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[11][27]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[11][27]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[11][27]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X27_Y7_N0 +cyclonev_lcell_comb \PC_Reg_Display[11]~255 ( +// Equation(s): +// \PC_Reg_Display[11]~255_combout = ( \REGS|regs[11][27]~DUPLICATE_q & ( \REGS|regs[14][27]~q & ( (!\HID_Register[2]~input_o & (((\HID_Register[0]~input_o ) # (\REGS|regs[10][27]~q )))) # (\HID_Register[2]~input_o & (((!\HID_Register[0]~input_o )) # +// (\REGS|regs[15][27]~q ))) ) ) ) # ( !\REGS|regs[11][27]~DUPLICATE_q & ( \REGS|regs[14][27]~q & ( (!\HID_Register[2]~input_o & (((\REGS|regs[10][27]~q & !\HID_Register[0]~input_o )))) # (\HID_Register[2]~input_o & (((!\HID_Register[0]~input_o )) # +// (\REGS|regs[15][27]~q ))) ) ) ) # ( \REGS|regs[11][27]~DUPLICATE_q & ( !\REGS|regs[14][27]~q & ( (!\HID_Register[2]~input_o & (((\HID_Register[0]~input_o ) # (\REGS|regs[10][27]~q )))) # (\HID_Register[2]~input_o & (\REGS|regs[15][27]~q & +// ((\HID_Register[0]~input_o )))) ) ) ) # ( !\REGS|regs[11][27]~DUPLICATE_q & ( !\REGS|regs[14][27]~q & ( (!\HID_Register[2]~input_o & (((\REGS|regs[10][27]~q & !\HID_Register[0]~input_o )))) # (\HID_Register[2]~input_o & (\REGS|regs[15][27]~q & +// ((\HID_Register[0]~input_o )))) ) ) ) + + .dataa(!\REGS|regs[15][27]~q ), + .datab(!\HID_Register[2]~input_o ), + .datac(!\REGS|regs[10][27]~q ), + .datad(!\HID_Register[0]~input_o ), + .datae(!\REGS|regs[11][27]~DUPLICATE_q ), + .dataf(!\REGS|regs[14][27]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[11]~255_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[11]~255 .extended_lut = "off"; +defparam \PC_Reg_Display[11]~255 .lut_mask = 64'h0C110CDD3F113FDD; +defparam \PC_Reg_Display[11]~255 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X33_Y4_N42 +cyclonev_lcell_comb \PC_Reg_Display[11]~252 ( +// Equation(s): +// \PC_Reg_Display[11]~252_combout = ( \REGS|regs[8][11]~DUPLICATE_q & ( \HID_Register[2]~input_o & ( (!\HID_Register[0]~input_o & (\REGS|regs[12][11]~q )) # (\HID_Register[0]~input_o & ((\REGS|regs[13][11]~q ))) ) ) ) # ( !\REGS|regs[8][11]~DUPLICATE_q +// & ( \HID_Register[2]~input_o & ( (!\HID_Register[0]~input_o & (\REGS|regs[12][11]~q )) # (\HID_Register[0]~input_o & ((\REGS|regs[13][11]~q ))) ) ) ) # ( \REGS|regs[8][11]~DUPLICATE_q & ( !\HID_Register[2]~input_o & ( (!\HID_Register[0]~input_o ) # +// (\REGS|regs[9][11]~q ) ) ) ) # ( !\REGS|regs[8][11]~DUPLICATE_q & ( !\HID_Register[2]~input_o & ( (\HID_Register[0]~input_o & \REGS|regs[9][11]~q ) ) ) ) + + .dataa(!\HID_Register[0]~input_o ), + .datab(!\REGS|regs[12][11]~q ), + .datac(!\REGS|regs[13][11]~q ), + .datad(!\REGS|regs[9][11]~q ), + .datae(!\REGS|regs[8][11]~DUPLICATE_q ), + .dataf(!\HID_Register[2]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[11]~252_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[11]~252 .extended_lut = "off"; +defparam \PC_Reg_Display[11]~252 .lut_mask = 64'h0055AAFF27272727; +defparam \PC_Reg_Display[11]~252 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X36_Y6_N31 +dffeas \REGS|regs[15][11]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[11]~448_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~39_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[15][11]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[15][11]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[15][11]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X33_Y4_N39 +cyclonev_lcell_comb \PC_Reg_Display[11]~254 ( +// Equation(s): +// \PC_Reg_Display[11]~254_combout = ( \REGS|regs[14][11]~q & ( \REGS|regs[15][11]~DUPLICATE_q & ( ((!\HID_Register[0]~input_o & ((\REGS|regs[10][11]~q ))) # (\HID_Register[0]~input_o & (\REGS|regs[11][11]~q ))) # (\HID_Register[2]~input_o ) ) ) ) # ( +// !\REGS|regs[14][11]~q & ( \REGS|regs[15][11]~DUPLICATE_q & ( (!\HID_Register[2]~input_o & ((!\HID_Register[0]~input_o & ((\REGS|regs[10][11]~q ))) # (\HID_Register[0]~input_o & (\REGS|regs[11][11]~q )))) # (\HID_Register[2]~input_o & +// (((\HID_Register[0]~input_o )))) ) ) ) # ( \REGS|regs[14][11]~q & ( !\REGS|regs[15][11]~DUPLICATE_q & ( (!\HID_Register[2]~input_o & ((!\HID_Register[0]~input_o & ((\REGS|regs[10][11]~q ))) # (\HID_Register[0]~input_o & (\REGS|regs[11][11]~q )))) # +// (\HID_Register[2]~input_o & (((!\HID_Register[0]~input_o )))) ) ) ) # ( !\REGS|regs[14][11]~q & ( !\REGS|regs[15][11]~DUPLICATE_q & ( (!\HID_Register[2]~input_o & ((!\HID_Register[0]~input_o & ((\REGS|regs[10][11]~q ))) # (\HID_Register[0]~input_o & +// (\REGS|regs[11][11]~q )))) ) ) ) + + .dataa(!\HID_Register[2]~input_o ), + .datab(!\REGS|regs[11][11]~q ), + .datac(!\REGS|regs[10][11]~q ), + .datad(!\HID_Register[0]~input_o ), + .datae(!\REGS|regs[14][11]~q ), + .dataf(!\REGS|regs[15][11]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[11]~254_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[11]~254 .extended_lut = "off"; +defparam \PC_Reg_Display[11]~254 .lut_mask = 64'h0A225F220A775F77; +defparam \PC_Reg_Display[11]~254 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y4_N24 +cyclonev_lcell_comb \PC_Reg_Display[11]~256 ( +// Equation(s): +// \PC_Reg_Display[11]~256_combout = ( \PC_Reg_Display[11]~252_combout & ( \PC_Reg_Display[11]~254_combout & ( (!\HID_Hi_Low[0]~input_o ) # ((!\HID_Register[1]~input_o & (\PC_Reg_Display[11]~253_combout )) # (\HID_Register[1]~input_o & +// ((\PC_Reg_Display[11]~255_combout )))) ) ) ) # ( !\PC_Reg_Display[11]~252_combout & ( \PC_Reg_Display[11]~254_combout & ( (!\HID_Hi_Low[0]~input_o & (((\HID_Register[1]~input_o )))) # (\HID_Hi_Low[0]~input_o & ((!\HID_Register[1]~input_o & +// (\PC_Reg_Display[11]~253_combout )) # (\HID_Register[1]~input_o & ((\PC_Reg_Display[11]~255_combout ))))) ) ) ) # ( \PC_Reg_Display[11]~252_combout & ( !\PC_Reg_Display[11]~254_combout & ( (!\HID_Hi_Low[0]~input_o & (((!\HID_Register[1]~input_o )))) # +// (\HID_Hi_Low[0]~input_o & ((!\HID_Register[1]~input_o & (\PC_Reg_Display[11]~253_combout )) # (\HID_Register[1]~input_o & ((\PC_Reg_Display[11]~255_combout ))))) ) ) ) # ( !\PC_Reg_Display[11]~252_combout & ( !\PC_Reg_Display[11]~254_combout & ( +// (\HID_Hi_Low[0]~input_o & ((!\HID_Register[1]~input_o & (\PC_Reg_Display[11]~253_combout )) # (\HID_Register[1]~input_o & ((\PC_Reg_Display[11]~255_combout ))))) ) ) ) + + .dataa(!\PC_Reg_Display[11]~253_combout ), + .datab(!\HID_Hi_Low[0]~input_o ), + .datac(!\PC_Reg_Display[11]~255_combout ), + .datad(!\HID_Register[1]~input_o ), + .datae(!\PC_Reg_Display[11]~252_combout ), + .dataf(!\PC_Reg_Display[11]~254_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[11]~256_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[11]~256 .extended_lut = "off"; +defparam \PC_Reg_Display[11]~256 .lut_mask = 64'h1103DD0311CFDDCF; +defparam \PC_Reg_Display[11]~256 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y9_N3 +cyclonev_lcell_comb \PC_Reg_Display[11]~244 ( +// Equation(s): +// \PC_Reg_Display[11]~244_combout = ( \REGS|regs[5][27]~q & ( \HID_Hi_Low[0]~input_o & ( (\REGS|regs[4][27]~q ) # (\HID_Register[0]~input_o ) ) ) ) # ( !\REGS|regs[5][27]~q & ( \HID_Hi_Low[0]~input_o & ( (!\HID_Register[0]~input_o & +// \REGS|regs[4][27]~q ) ) ) ) # ( \REGS|regs[5][27]~q & ( !\HID_Hi_Low[0]~input_o & ( (!\HID_Register[0]~input_o & ((\REGS|regs[4][11]~q ))) # (\HID_Register[0]~input_o & (\REGS|regs[5][11]~q )) ) ) ) # ( !\REGS|regs[5][27]~q & ( +// !\HID_Hi_Low[0]~input_o & ( (!\HID_Register[0]~input_o & ((\REGS|regs[4][11]~q ))) # (\HID_Register[0]~input_o & (\REGS|regs[5][11]~q )) ) ) ) + + .dataa(!\REGS|regs[5][11]~q ), + .datab(!\HID_Register[0]~input_o ), + .datac(!\REGS|regs[4][11]~q ), + .datad(!\REGS|regs[4][27]~q ), + .datae(!\REGS|regs[5][27]~q ), + .dataf(!\HID_Hi_Low[0]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[11]~244_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[11]~244 .extended_lut = "off"; +defparam \PC_Reg_Display[11]~244 .lut_mask = 64'h1D1D1D1D00CC33FF; +defparam \PC_Reg_Display[11]~244 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X33_Y4_N54 +cyclonev_lcell_comb \PC_Reg_Display[11]~242 ( +// Equation(s): +// \PC_Reg_Display[11]~242_combout = ( \REGS|regs[1][11]~q & ( \HID_Register[0]~input_o & ( (!\HID_Hi_Low[0]~input_o ) # (\REGS|regs[1][27]~q ) ) ) ) # ( !\REGS|regs[1][11]~q & ( \HID_Register[0]~input_o & ( (\HID_Hi_Low[0]~input_o & +// \REGS|regs[1][27]~q ) ) ) ) + + .dataa(!\HID_Hi_Low[0]~input_o ), + .datab(!\REGS|regs[1][27]~q ), + .datac(gnd), + .datad(gnd), + .datae(!\REGS|regs[1][11]~q ), + .dataf(!\HID_Register[0]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[11]~242_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[11]~242 .extended_lut = "off"; +defparam \PC_Reg_Display[11]~242 .lut_mask = 64'h000000001111BBBB; +defparam \PC_Reg_Display[11]~242 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X28_Y5_N5 +dffeas \REGS|regs[3][11] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[11]~448_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~36_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[3][11]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[3][11] .is_wysiwyg = "true"; +defparam \REGS|regs[3][11] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X28_Y5_N2 +dffeas \REGS|regs[3][27] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[27]~447_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~36_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[3][27]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[3][27] .is_wysiwyg = "true"; +defparam \REGS|regs[3][27] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X28_Y5_N0 +cyclonev_lcell_comb \PC_Reg_Display[11]~243 ( +// Equation(s): +// \PC_Reg_Display[11]~243_combout = ( \REGS|regs[3][27]~q & ( \HID_Hi_Low[0]~input_o & ( (\HID_Register[0]~input_o ) # (\REGS|regs[2][27]~q ) ) ) ) # ( !\REGS|regs[3][27]~q & ( \HID_Hi_Low[0]~input_o & ( (\REGS|regs[2][27]~q & +// !\HID_Register[0]~input_o ) ) ) ) # ( \REGS|regs[3][27]~q & ( !\HID_Hi_Low[0]~input_o & ( (!\HID_Register[0]~input_o & (\REGS|regs[2][11]~q )) # (\HID_Register[0]~input_o & ((\REGS|regs[3][11]~q ))) ) ) ) # ( !\REGS|regs[3][27]~q & ( +// !\HID_Hi_Low[0]~input_o & ( (!\HID_Register[0]~input_o & (\REGS|regs[2][11]~q )) # (\HID_Register[0]~input_o & ((\REGS|regs[3][11]~q ))) ) ) ) + + .dataa(!\REGS|regs[2][11]~q ), + .datab(!\REGS|regs[2][27]~q ), + .datac(!\REGS|regs[3][11]~q ), + .datad(!\HID_Register[0]~input_o ), + .datae(!\REGS|regs[3][27]~q ), + .dataf(!\HID_Hi_Low[0]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[11]~243_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[11]~243 .extended_lut = "off"; +defparam \PC_Reg_Display[11]~243 .lut_mask = 64'h550F550F330033FF; +defparam \PC_Reg_Display[11]~243 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X28_Y5_N59 +dffeas \REGS|regs[7][11] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[11]~448_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~38_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[7][11]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[7][11] .is_wysiwyg = "true"; +defparam \REGS|regs[7][11] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X28_Y5_N56 +dffeas \REGS|regs[7][27] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[27]~447_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~38_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[7][27]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[7][27] .is_wysiwyg = "true"; +defparam \REGS|regs[7][27] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X28_Y5_N54 +cyclonev_lcell_comb \PC_Reg_Display[11]~245 ( +// Equation(s): +// \PC_Reg_Display[11]~245_combout = ( \REGS|regs[7][27]~q & ( \REGS|regs[6][27]~q & ( ((!\HID_Register[0]~input_o & (\REGS|regs[6][11]~q )) # (\HID_Register[0]~input_o & ((\REGS|regs[7][11]~q )))) # (\HID_Hi_Low[0]~input_o ) ) ) ) # ( +// !\REGS|regs[7][27]~q & ( \REGS|regs[6][27]~q & ( (!\HID_Hi_Low[0]~input_o & ((!\HID_Register[0]~input_o & (\REGS|regs[6][11]~q )) # (\HID_Register[0]~input_o & ((\REGS|regs[7][11]~q ))))) # (\HID_Hi_Low[0]~input_o & (((!\HID_Register[0]~input_o )))) +// ) ) ) # ( \REGS|regs[7][27]~q & ( !\REGS|regs[6][27]~q & ( (!\HID_Hi_Low[0]~input_o & ((!\HID_Register[0]~input_o & (\REGS|regs[6][11]~q )) # (\HID_Register[0]~input_o & ((\REGS|regs[7][11]~q ))))) # (\HID_Hi_Low[0]~input_o & +// (((\HID_Register[0]~input_o )))) ) ) ) # ( !\REGS|regs[7][27]~q & ( !\REGS|regs[6][27]~q & ( (!\HID_Hi_Low[0]~input_o & ((!\HID_Register[0]~input_o & (\REGS|regs[6][11]~q )) # (\HID_Register[0]~input_o & ((\REGS|regs[7][11]~q ))))) ) ) ) + + .dataa(!\REGS|regs[6][11]~q ), + .datab(!\REGS|regs[7][11]~q ), + .datac(!\HID_Hi_Low[0]~input_o ), + .datad(!\HID_Register[0]~input_o ), + .datae(!\REGS|regs[7][27]~q ), + .dataf(!\REGS|regs[6][27]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[11]~245_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[11]~245 .extended_lut = "off"; +defparam \PC_Reg_Display[11]~245 .lut_mask = 64'h5030503F5F305F3F; +defparam \PC_Reg_Display[11]~245 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X30_Y5_N24 +cyclonev_lcell_comb \PC_Reg_Display[11]~246 ( +// Equation(s): +// \PC_Reg_Display[11]~246_combout = ( \HID_Register[2]~input_o & ( \PC_Reg_Display[11]~245_combout & ( (\PC_Reg_Display[11]~244_combout ) # (\HID_Register[1]~input_o ) ) ) ) # ( !\HID_Register[2]~input_o & ( \PC_Reg_Display[11]~245_combout & ( +// (!\HID_Register[1]~input_o & (\PC_Reg_Display[11]~242_combout )) # (\HID_Register[1]~input_o & ((\PC_Reg_Display[11]~243_combout ))) ) ) ) # ( \HID_Register[2]~input_o & ( !\PC_Reg_Display[11]~245_combout & ( (!\HID_Register[1]~input_o & +// \PC_Reg_Display[11]~244_combout ) ) ) ) # ( !\HID_Register[2]~input_o & ( !\PC_Reg_Display[11]~245_combout & ( (!\HID_Register[1]~input_o & (\PC_Reg_Display[11]~242_combout )) # (\HID_Register[1]~input_o & ((\PC_Reg_Display[11]~243_combout ))) ) ) ) + + .dataa(!\HID_Register[1]~input_o ), + .datab(!\PC_Reg_Display[11]~244_combout ), + .datac(!\PC_Reg_Display[11]~242_combout ), + .datad(!\PC_Reg_Display[11]~243_combout ), + .datae(!\HID_Register[2]~input_o ), + .dataf(!\PC_Reg_Display[11]~245_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[11]~246_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[11]~246 .extended_lut = "off"; +defparam \PC_Reg_Display[11]~246 .lut_mask = 64'h0A5F22220A5F7777; +defparam \PC_Reg_Display[11]~246 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X30_Y5_N18 +cyclonev_lcell_comb \PC_Reg_Display[11]~262 ( +// Equation(s): +// \PC_Reg_Display[11]~262_combout = ( \PC_Reg_Display[11]~256_combout & ( \PC_Reg_Display[11]~246_combout & ( (!\HID_Register[4]~input_o ) # ((!\HID_Register[3]~input_o & (\PC_Reg_Display[11]~251_combout )) # (\HID_Register[3]~input_o & +// ((\PC_Reg_Display[11]~261_combout )))) ) ) ) # ( !\PC_Reg_Display[11]~256_combout & ( \PC_Reg_Display[11]~246_combout & ( (!\HID_Register[4]~input_o & (((!\HID_Register[3]~input_o )))) # (\HID_Register[4]~input_o & ((!\HID_Register[3]~input_o & +// (\PC_Reg_Display[11]~251_combout )) # (\HID_Register[3]~input_o & ((\PC_Reg_Display[11]~261_combout ))))) ) ) ) # ( \PC_Reg_Display[11]~256_combout & ( !\PC_Reg_Display[11]~246_combout & ( (!\HID_Register[4]~input_o & (((\HID_Register[3]~input_o )))) +// # (\HID_Register[4]~input_o & ((!\HID_Register[3]~input_o & (\PC_Reg_Display[11]~251_combout )) # (\HID_Register[3]~input_o & ((\PC_Reg_Display[11]~261_combout ))))) ) ) ) # ( !\PC_Reg_Display[11]~256_combout & ( !\PC_Reg_Display[11]~246_combout & ( +// (\HID_Register[4]~input_o & ((!\HID_Register[3]~input_o & (\PC_Reg_Display[11]~251_combout )) # (\HID_Register[3]~input_o & ((\PC_Reg_Display[11]~261_combout ))))) ) ) ) + + .dataa(!\HID_Register[4]~input_o ), + .datab(!\PC_Reg_Display[11]~251_combout ), + .datac(!\HID_Register[3]~input_o ), + .datad(!\PC_Reg_Display[11]~261_combout ), + .datae(!\PC_Reg_Display[11]~256_combout ), + .dataf(!\PC_Reg_Display[11]~246_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[11]~262_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[11]~262 .extended_lut = "off"; +defparam \PC_Reg_Display[11]~262 .lut_mask = 64'h10151A1FB0B5BABF; +defparam \PC_Reg_Display[11]~262 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X36_Y7_N24 +cyclonev_lcell_comb \PC_Reg_Display[11]~263 ( +// Equation(s): +// \PC_Reg_Display[11]~263_combout = ( \PC_Reg_Display[11]~262_combout & ( (!\HID_PC[0]~input_o ) # ((!\HID_Hi_Low[0]~input_o & (\PC|pc [11])) # (\HID_Hi_Low[0]~input_o & ((\PC|pc [27])))) ) ) # ( !\PC_Reg_Display[11]~262_combout & ( (\HID_PC[0]~input_o +// & ((!\HID_Hi_Low[0]~input_o & (\PC|pc [11])) # (\HID_Hi_Low[0]~input_o & ((\PC|pc [27]))))) ) ) + + .dataa(!\HID_PC[0]~input_o ), + .datab(!\HID_Hi_Low[0]~input_o ), + .datac(!\PC|pc [11]), + .datad(!\PC|pc [27]), + .datae(gnd), + .dataf(!\PC_Reg_Display[11]~262_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[11]~263_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[11]~263 .extended_lut = "off"; +defparam \PC_Reg_Display[11]~263 .lut_mask = 64'h04150415AEBFAEBF; +defparam \PC_Reg_Display[11]~263 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y5_N21 +cyclonev_lcell_comb \PC_Reg_Display[9]~216 ( +// Equation(s): +// \PC_Reg_Display[9]~216_combout = ( \REGS|regs[26][25]~q & ( \HID_Register[0]~input_o & ( (!\HID_Register[2]~input_o & ((\REGS|regs[27][25]~q ))) # (\HID_Register[2]~input_o & (\REGS|regs[31][25]~q )) ) ) ) # ( !\REGS|regs[26][25]~q & ( +// \HID_Register[0]~input_o & ( (!\HID_Register[2]~input_o & ((\REGS|regs[27][25]~q ))) # (\HID_Register[2]~input_o & (\REGS|regs[31][25]~q )) ) ) ) # ( \REGS|regs[26][25]~q & ( !\HID_Register[0]~input_o & ( (!\HID_Register[2]~input_o ) # +// (\REGS|regs[30][25]~q ) ) ) ) # ( !\REGS|regs[26][25]~q & ( !\HID_Register[0]~input_o & ( (\REGS|regs[30][25]~q & \HID_Register[2]~input_o ) ) ) ) + + .dataa(!\REGS|regs[31][25]~q ), + .datab(!\REGS|regs[27][25]~q ), + .datac(!\REGS|regs[30][25]~q ), + .datad(!\HID_Register[2]~input_o ), + .datae(!\REGS|regs[26][25]~q ), + .dataf(!\HID_Register[0]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[9]~216_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[9]~216 .extended_lut = "off"; +defparam \PC_Reg_Display[9]~216 .lut_mask = 64'h000FFF0F33553355; +defparam \PC_Reg_Display[9]~216 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X33_Y13_N24 +cyclonev_lcell_comb \PC_Reg_Display[9]~215 ( +// Equation(s): +// \PC_Reg_Display[9]~215_combout = ( \REGS|regs[30][9]~q & ( \REGS|regs[27][9]~q & ( (!\HID_Register[2]~input_o & (((\HID_Register[0]~input_o ) # (\REGS|regs[26][9]~q )))) # (\HID_Register[2]~input_o & (((!\HID_Register[0]~input_o )) # +// (\REGS|regs[31][9]~q ))) ) ) ) # ( !\REGS|regs[30][9]~q & ( \REGS|regs[27][9]~q & ( (!\HID_Register[2]~input_o & (((\HID_Register[0]~input_o ) # (\REGS|regs[26][9]~q )))) # (\HID_Register[2]~input_o & (\REGS|regs[31][9]~q & ((\HID_Register[0]~input_o +// )))) ) ) ) # ( \REGS|regs[30][9]~q & ( !\REGS|regs[27][9]~q & ( (!\HID_Register[2]~input_o & (((\REGS|regs[26][9]~q & !\HID_Register[0]~input_o )))) # (\HID_Register[2]~input_o & (((!\HID_Register[0]~input_o )) # (\REGS|regs[31][9]~q ))) ) ) ) # ( +// !\REGS|regs[30][9]~q & ( !\REGS|regs[27][9]~q & ( (!\HID_Register[2]~input_o & (((\REGS|regs[26][9]~q & !\HID_Register[0]~input_o )))) # (\HID_Register[2]~input_o & (\REGS|regs[31][9]~q & ((\HID_Register[0]~input_o )))) ) ) ) + + .dataa(!\HID_Register[2]~input_o ), + .datab(!\REGS|regs[31][9]~q ), + .datac(!\REGS|regs[26][9]~q ), + .datad(!\HID_Register[0]~input_o ), + .datae(!\REGS|regs[30][9]~q ), + .dataf(!\REGS|regs[27][9]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[9]~215_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[9]~215 .extended_lut = "off"; +defparam \PC_Reg_Display[9]~215 .lut_mask = 64'h0A115F110ABB5FBB; +defparam \PC_Reg_Display[9]~215 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X25_Y7_N57 +cyclonev_lcell_comb \REGS|regs[24][9]~feeder ( +// Equation(s): +// \REGS|regs[24][9]~feeder_combout = ( \rd[9]~444_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[9]~444_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[24][9]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[24][9]~feeder .extended_lut = "off"; +defparam \REGS|regs[24][9]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[24][9]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X25_Y7_N58 +dffeas \REGS|regs[24][9] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[24][9]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~4_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[24][9]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[24][9] .is_wysiwyg = "true"; +defparam \REGS|regs[24][9] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X28_Y7_N26 +dffeas \REGS|regs[25][9] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[9]~444_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~13_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[25][9]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[25][9] .is_wysiwyg = "true"; +defparam \REGS|regs[25][9] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X28_Y7_N42 +cyclonev_lcell_comb \PC_Reg_Display[9]~213 ( +// Equation(s): +// \PC_Reg_Display[9]~213_combout = ( \REGS|regs[28][9]~q & ( \REGS|regs[29][9]~q & ( ((!\HID_Register[0]~input_o & (\REGS|regs[24][9]~q )) # (\HID_Register[0]~input_o & ((\REGS|regs[25][9]~q )))) # (\HID_Register[2]~input_o ) ) ) ) # ( +// !\REGS|regs[28][9]~q & ( \REGS|regs[29][9]~q & ( (!\HID_Register[2]~input_o & ((!\HID_Register[0]~input_o & (\REGS|regs[24][9]~q )) # (\HID_Register[0]~input_o & ((\REGS|regs[25][9]~q ))))) # (\HID_Register[2]~input_o & (((\HID_Register[0]~input_o +// )))) ) ) ) # ( \REGS|regs[28][9]~q & ( !\REGS|regs[29][9]~q & ( (!\HID_Register[2]~input_o & ((!\HID_Register[0]~input_o & (\REGS|regs[24][9]~q )) # (\HID_Register[0]~input_o & ((\REGS|regs[25][9]~q ))))) # (\HID_Register[2]~input_o & +// (((!\HID_Register[0]~input_o )))) ) ) ) # ( !\REGS|regs[28][9]~q & ( !\REGS|regs[29][9]~q & ( (!\HID_Register[2]~input_o & ((!\HID_Register[0]~input_o & (\REGS|regs[24][9]~q )) # (\HID_Register[0]~input_o & ((\REGS|regs[25][9]~q ))))) ) ) ) + + .dataa(!\HID_Register[2]~input_o ), + .datab(!\REGS|regs[24][9]~q ), + .datac(!\REGS|regs[25][9]~q ), + .datad(!\HID_Register[0]~input_o ), + .datae(!\REGS|regs[28][9]~q ), + .dataf(!\REGS|regs[29][9]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[9]~213_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[9]~213 .extended_lut = "off"; +defparam \PC_Reg_Display[9]~213 .lut_mask = 64'h220A770A225F775F; +defparam \PC_Reg_Display[9]~213 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X32_Y8_N41 +dffeas \REGS|regs[29][25]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[25]~443_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~17_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[29][25]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[29][25]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[29][25]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X28_Y7_N18 +cyclonev_lcell_comb \PC_Reg_Display[9]~214 ( +// Equation(s): +// \PC_Reg_Display[9]~214_combout = ( \REGS|regs[28][25]~q & ( \HID_Register[0]~input_o & ( (!\HID_Register[2]~input_o & ((\REGS|regs[25][25]~q ))) # (\HID_Register[2]~input_o & (\REGS|regs[29][25]~DUPLICATE_q )) ) ) ) # ( !\REGS|regs[28][25]~q & ( +// \HID_Register[0]~input_o & ( (!\HID_Register[2]~input_o & ((\REGS|regs[25][25]~q ))) # (\HID_Register[2]~input_o & (\REGS|regs[29][25]~DUPLICATE_q )) ) ) ) # ( \REGS|regs[28][25]~q & ( !\HID_Register[0]~input_o & ( (\REGS|regs[24][25]~q ) # +// (\HID_Register[2]~input_o ) ) ) ) # ( !\REGS|regs[28][25]~q & ( !\HID_Register[0]~input_o & ( (!\HID_Register[2]~input_o & \REGS|regs[24][25]~q ) ) ) ) + + .dataa(!\HID_Register[2]~input_o ), + .datab(!\REGS|regs[24][25]~q ), + .datac(!\REGS|regs[29][25]~DUPLICATE_q ), + .datad(!\REGS|regs[25][25]~q ), + .datae(!\REGS|regs[28][25]~q ), + .dataf(!\HID_Register[0]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[9]~214_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[9]~214 .extended_lut = "off"; +defparam \PC_Reg_Display[9]~214 .lut_mask = 64'h2222777705AF05AF; +defparam \PC_Reg_Display[9]~214 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X22_Y7_N36 +cyclonev_lcell_comb \PC_Reg_Display[9]~217 ( +// Equation(s): +// \PC_Reg_Display[9]~217_combout = ( \PC_Reg_Display[9]~213_combout & ( \PC_Reg_Display[9]~214_combout & ( (!\HID_Register[1]~input_o ) # ((!\HID_Hi_Low[0]~input_o & ((\PC_Reg_Display[9]~215_combout ))) # (\HID_Hi_Low[0]~input_o & +// (\PC_Reg_Display[9]~216_combout ))) ) ) ) # ( !\PC_Reg_Display[9]~213_combout & ( \PC_Reg_Display[9]~214_combout & ( (!\HID_Hi_Low[0]~input_o & (((\PC_Reg_Display[9]~215_combout & \HID_Register[1]~input_o )))) # (\HID_Hi_Low[0]~input_o & +// (((!\HID_Register[1]~input_o )) # (\PC_Reg_Display[9]~216_combout ))) ) ) ) # ( \PC_Reg_Display[9]~213_combout & ( !\PC_Reg_Display[9]~214_combout & ( (!\HID_Hi_Low[0]~input_o & (((!\HID_Register[1]~input_o ) # (\PC_Reg_Display[9]~215_combout )))) # +// (\HID_Hi_Low[0]~input_o & (\PC_Reg_Display[9]~216_combout & ((\HID_Register[1]~input_o )))) ) ) ) # ( !\PC_Reg_Display[9]~213_combout & ( !\PC_Reg_Display[9]~214_combout & ( (\HID_Register[1]~input_o & ((!\HID_Hi_Low[0]~input_o & +// ((\PC_Reg_Display[9]~215_combout ))) # (\HID_Hi_Low[0]~input_o & (\PC_Reg_Display[9]~216_combout )))) ) ) ) + + .dataa(!\PC_Reg_Display[9]~216_combout ), + .datab(!\PC_Reg_Display[9]~215_combout ), + .datac(!\HID_Hi_Low[0]~input_o ), + .datad(!\HID_Register[1]~input_o ), + .datae(!\PC_Reg_Display[9]~213_combout ), + .dataf(!\PC_Reg_Display[9]~214_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[9]~217_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[9]~217 .extended_lut = "off"; +defparam \PC_Reg_Display[9]~217 .lut_mask = 64'h0035F0350F35FF35; +defparam \PC_Reg_Display[9]~217 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X23_Y9_N51 +cyclonev_lcell_comb \PC_Reg_Display[9]~204 ( +// Equation(s): +// \PC_Reg_Display[9]~204_combout = ( \REGS|regs[20][25]~q & ( \REGS|regs[22][25]~q & ( ((!\HID_Register[1]~input_o & (\REGS|regs[20][9]~q )) # (\HID_Register[1]~input_o & ((\REGS|regs[22][9]~q )))) # (\HID_Hi_Low[0]~input_o ) ) ) ) # ( +// !\REGS|regs[20][25]~q & ( \REGS|regs[22][25]~q & ( (!\HID_Register[1]~input_o & (\REGS|regs[20][9]~q & ((!\HID_Hi_Low[0]~input_o )))) # (\HID_Register[1]~input_o & (((\HID_Hi_Low[0]~input_o ) # (\REGS|regs[22][9]~q )))) ) ) ) # ( \REGS|regs[20][25]~q +// & ( !\REGS|regs[22][25]~q & ( (!\HID_Register[1]~input_o & (((\HID_Hi_Low[0]~input_o )) # (\REGS|regs[20][9]~q ))) # (\HID_Register[1]~input_o & (((\REGS|regs[22][9]~q & !\HID_Hi_Low[0]~input_o )))) ) ) ) # ( !\REGS|regs[20][25]~q & ( +// !\REGS|regs[22][25]~q & ( (!\HID_Hi_Low[0]~input_o & ((!\HID_Register[1]~input_o & (\REGS|regs[20][9]~q )) # (\HID_Register[1]~input_o & ((\REGS|regs[22][9]~q ))))) ) ) ) + + .dataa(!\REGS|regs[20][9]~q ), + .datab(!\HID_Register[1]~input_o ), + .datac(!\REGS|regs[22][9]~q ), + .datad(!\HID_Hi_Low[0]~input_o ), + .datae(!\REGS|regs[20][25]~q ), + .dataf(!\REGS|regs[22][25]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[9]~204_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[9]~204 .extended_lut = "off"; +defparam \PC_Reg_Display[9]~204 .lut_mask = 64'h470047CC473347FF; +defparam \PC_Reg_Display[9]~204 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X25_Y6_N22 +dffeas \REGS|regs[21][9] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[9]~444_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~16_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[21][9]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[21][9] .is_wysiwyg = "true"; +defparam \REGS|regs[21][9] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X23_Y7_N44 +dffeas \REGS|regs[21][25] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[25]~443_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~16_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[21][25]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[21][25] .is_wysiwyg = "true"; +defparam \REGS|regs[21][25] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X23_Y7_N42 +cyclonev_lcell_comb \PC_Reg_Display[9]~206 ( +// Equation(s): +// \PC_Reg_Display[9]~206_combout = ( \REGS|regs[21][25]~q & ( \HID_Hi_Low[0]~input_o & ( (!\HID_Register[1]~input_o ) # (\REGS|regs[23][25]~q ) ) ) ) # ( !\REGS|regs[21][25]~q & ( \HID_Hi_Low[0]~input_o & ( (\HID_Register[1]~input_o & +// \REGS|regs[23][25]~q ) ) ) ) # ( \REGS|regs[21][25]~q & ( !\HID_Hi_Low[0]~input_o & ( (!\HID_Register[1]~input_o & ((\REGS|regs[21][9]~q ))) # (\HID_Register[1]~input_o & (\REGS|regs[23][9]~q )) ) ) ) # ( !\REGS|regs[21][25]~q & ( +// !\HID_Hi_Low[0]~input_o & ( (!\HID_Register[1]~input_o & ((\REGS|regs[21][9]~q ))) # (\HID_Register[1]~input_o & (\REGS|regs[23][9]~q )) ) ) ) + + .dataa(!\HID_Register[1]~input_o ), + .datab(!\REGS|regs[23][9]~q ), + .datac(!\REGS|regs[21][9]~q ), + .datad(!\REGS|regs[23][25]~q ), + .datae(!\REGS|regs[21][25]~q ), + .dataf(!\HID_Hi_Low[0]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[9]~206_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[9]~206 .extended_lut = "off"; +defparam \PC_Reg_Display[9]~206 .lut_mask = 64'h1B1B1B1B0055AAFF; +defparam \PC_Reg_Display[9]~206 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X23_Y7_N29 +dffeas \REGS|regs[17][25] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[25]~443_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~11_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[17][25]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[17][25] .is_wysiwyg = "true"; +defparam \REGS|regs[17][25] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X23_Y7_N27 +cyclonev_lcell_comb \PC_Reg_Display[9]~205 ( +// Equation(s): +// \PC_Reg_Display[9]~205_combout = ( \REGS|regs[17][25]~q & ( \HID_Hi_Low[0]~input_o & ( (!\HID_Register[1]~input_o ) # (\REGS|regs[19][25]~q ) ) ) ) # ( !\REGS|regs[17][25]~q & ( \HID_Hi_Low[0]~input_o & ( (\HID_Register[1]~input_o & +// \REGS|regs[19][25]~q ) ) ) ) # ( \REGS|regs[17][25]~q & ( !\HID_Hi_Low[0]~input_o & ( (!\HID_Register[1]~input_o & ((\REGS|regs[17][9]~q ))) # (\HID_Register[1]~input_o & (\REGS|regs[19][9]~q )) ) ) ) # ( !\REGS|regs[17][25]~q & ( +// !\HID_Hi_Low[0]~input_o & ( (!\HID_Register[1]~input_o & ((\REGS|regs[17][9]~q ))) # (\HID_Register[1]~input_o & (\REGS|regs[19][9]~q )) ) ) ) + + .dataa(!\HID_Register[1]~input_o ), + .datab(!\REGS|regs[19][25]~q ), + .datac(!\REGS|regs[19][9]~q ), + .datad(!\REGS|regs[17][9]~q ), + .datae(!\REGS|regs[17][25]~q ), + .dataf(!\HID_Hi_Low[0]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[9]~205_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[9]~205 .extended_lut = "off"; +defparam \PC_Reg_Display[9]~205 .lut_mask = 64'h05AF05AF1111BBBB; +defparam \PC_Reg_Display[9]~205 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X28_Y9_N41 +dffeas \REGS|regs[16][9] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[16][9]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~2_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[16][9]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[16][9] .is_wysiwyg = "true"; +defparam \REGS|regs[16][9] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X28_Y9_N24 +cyclonev_lcell_comb \PC_Reg_Display[9]~203 ( +// Equation(s): +// \PC_Reg_Display[9]~203_combout = ( \HID_Register[1]~input_o & ( \HID_Hi_Low[0]~input_o & ( \REGS|regs[18][25]~q ) ) ) # ( !\HID_Register[1]~input_o & ( \HID_Hi_Low[0]~input_o & ( \REGS|regs[16][25]~q ) ) ) # ( \HID_Register[1]~input_o & ( +// !\HID_Hi_Low[0]~input_o & ( \REGS|regs[18][9]~q ) ) ) # ( !\HID_Register[1]~input_o & ( !\HID_Hi_Low[0]~input_o & ( \REGS|regs[16][9]~q ) ) ) + + .dataa(!\REGS|regs[16][25]~q ), + .datab(!\REGS|regs[18][25]~q ), + .datac(!\REGS|regs[18][9]~q ), + .datad(!\REGS|regs[16][9]~q ), + .datae(!\HID_Register[1]~input_o ), + .dataf(!\HID_Hi_Low[0]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[9]~203_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[9]~203 .extended_lut = "off"; +defparam \PC_Reg_Display[9]~203 .lut_mask = 64'h00FF0F0F55553333; +defparam \PC_Reg_Display[9]~203 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X22_Y7_N6 +cyclonev_lcell_comb \PC_Reg_Display[9]~207 ( +// Equation(s): +// \PC_Reg_Display[9]~207_combout = ( \PC_Reg_Display[9]~203_combout & ( \HID_Register[2]~input_o & ( (!\HID_Register[0]~input_o & (\PC_Reg_Display[9]~204_combout )) # (\HID_Register[0]~input_o & ((\PC_Reg_Display[9]~206_combout ))) ) ) ) # ( +// !\PC_Reg_Display[9]~203_combout & ( \HID_Register[2]~input_o & ( (!\HID_Register[0]~input_o & (\PC_Reg_Display[9]~204_combout )) # (\HID_Register[0]~input_o & ((\PC_Reg_Display[9]~206_combout ))) ) ) ) # ( \PC_Reg_Display[9]~203_combout & ( +// !\HID_Register[2]~input_o & ( (!\HID_Register[0]~input_o ) # (\PC_Reg_Display[9]~205_combout ) ) ) ) # ( !\PC_Reg_Display[9]~203_combout & ( !\HID_Register[2]~input_o & ( (\HID_Register[0]~input_o & \PC_Reg_Display[9]~205_combout ) ) ) ) + + .dataa(!\HID_Register[0]~input_o ), + .datab(!\PC_Reg_Display[9]~204_combout ), + .datac(!\PC_Reg_Display[9]~206_combout ), + .datad(!\PC_Reg_Display[9]~205_combout ), + .datae(!\PC_Reg_Display[9]~203_combout ), + .dataf(!\HID_Register[2]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[9]~207_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[9]~207 .extended_lut = "off"; +defparam \PC_Reg_Display[9]~207 .lut_mask = 64'h0055AAFF27272727; +defparam \PC_Reg_Display[9]~207 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X36_Y12_N31 +dffeas \REGS|regs[9][9] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[9]~444_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~29_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[9][9]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[9][9] .is_wysiwyg = "true"; +defparam \REGS|regs[9][9] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X30_Y11_N13 +dffeas \REGS|regs[12][9] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[12][9]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~26_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[12][9]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[12][9] .is_wysiwyg = "true"; +defparam \REGS|regs[12][9] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X33_Y14_N24 +cyclonev_lcell_comb \PC_Reg_Display[9]~208 ( +// Equation(s): +// \PC_Reg_Display[9]~208_combout = ( \REGS|regs[13][9]~q & ( \HID_Register[2]~input_o & ( (\HID_Register[0]~input_o ) # (\REGS|regs[12][9]~q ) ) ) ) # ( !\REGS|regs[13][9]~q & ( \HID_Register[2]~input_o & ( (\REGS|regs[12][9]~q & +// !\HID_Register[0]~input_o ) ) ) ) # ( \REGS|regs[13][9]~q & ( !\HID_Register[2]~input_o & ( (!\HID_Register[0]~input_o & (\REGS|regs[8][9]~DUPLICATE_q )) # (\HID_Register[0]~input_o & ((\REGS|regs[9][9]~q ))) ) ) ) # ( !\REGS|regs[13][9]~q & ( +// !\HID_Register[2]~input_o & ( (!\HID_Register[0]~input_o & (\REGS|regs[8][9]~DUPLICATE_q )) # (\HID_Register[0]~input_o & ((\REGS|regs[9][9]~q ))) ) ) ) + + .dataa(!\REGS|regs[8][9]~DUPLICATE_q ), + .datab(!\REGS|regs[9][9]~q ), + .datac(!\REGS|regs[12][9]~q ), + .datad(!\HID_Register[0]~input_o ), + .datae(!\REGS|regs[13][9]~q ), + .dataf(!\HID_Register[2]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[9]~208_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[9]~208 .extended_lut = "off"; +defparam \PC_Reg_Display[9]~208 .lut_mask = 64'h553355330F000FFF; +defparam \PC_Reg_Display[9]~208 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X27_Y7_N21 +cyclonev_lcell_comb \PC_Reg_Display[9]~211 ( +// Equation(s): +// \PC_Reg_Display[9]~211_combout = ( \REGS|regs[11][25]~q & ( \HID_Register[0]~input_o & ( (!\HID_Register[2]~input_o ) # (\REGS|regs[15][25]~q ) ) ) ) # ( !\REGS|regs[11][25]~q & ( \HID_Register[0]~input_o & ( (\REGS|regs[15][25]~q & +// \HID_Register[2]~input_o ) ) ) ) # ( \REGS|regs[11][25]~q & ( !\HID_Register[0]~input_o & ( (!\HID_Register[2]~input_o & ((\REGS|regs[10][25]~q ))) # (\HID_Register[2]~input_o & (\REGS|regs[14][25]~q )) ) ) ) # ( !\REGS|regs[11][25]~q & ( +// !\HID_Register[0]~input_o & ( (!\HID_Register[2]~input_o & ((\REGS|regs[10][25]~q ))) # (\HID_Register[2]~input_o & (\REGS|regs[14][25]~q )) ) ) ) + + .dataa(!\REGS|regs[15][25]~q ), + .datab(!\HID_Register[2]~input_o ), + .datac(!\REGS|regs[14][25]~q ), + .datad(!\REGS|regs[10][25]~q ), + .datae(!\REGS|regs[11][25]~q ), + .dataf(!\HID_Register[0]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[9]~211_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[9]~211 .extended_lut = "off"; +defparam \PC_Reg_Display[9]~211 .lut_mask = 64'h03CF03CF1111DDDD; +defparam \PC_Reg_Display[9]~211 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X27_Y7_N51 +cyclonev_lcell_comb \PC_Reg_Display[9]~210 ( +// Equation(s): +// \PC_Reg_Display[9]~210_combout = ( \REGS|regs[15][9]~q & ( \HID_Register[0]~input_o & ( (\REGS|regs[11][9]~q ) # (\HID_Register[2]~input_o ) ) ) ) # ( !\REGS|regs[15][9]~q & ( \HID_Register[0]~input_o & ( (!\HID_Register[2]~input_o & +// \REGS|regs[11][9]~q ) ) ) ) # ( \REGS|regs[15][9]~q & ( !\HID_Register[0]~input_o & ( (!\HID_Register[2]~input_o & ((\REGS|regs[10][9]~q ))) # (\HID_Register[2]~input_o & (\REGS|regs[14][9]~q )) ) ) ) # ( !\REGS|regs[15][9]~q & ( +// !\HID_Register[0]~input_o & ( (!\HID_Register[2]~input_o & ((\REGS|regs[10][9]~q ))) # (\HID_Register[2]~input_o & (\REGS|regs[14][9]~q )) ) ) ) + + .dataa(!\REGS|regs[14][9]~q ), + .datab(!\REGS|regs[10][9]~q ), + .datac(!\HID_Register[2]~input_o ), + .datad(!\REGS|regs[11][9]~q ), + .datae(!\REGS|regs[15][9]~q ), + .dataf(!\HID_Register[0]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[9]~210_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[9]~210 .extended_lut = "off"; +defparam \PC_Reg_Display[9]~210 .lut_mask = 64'h3535353500F00FFF; +defparam \PC_Reg_Display[9]~210 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X32_Y8_N10 +dffeas \REGS|regs[9][25] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[25]~443_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~29_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[9][25]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[9][25] .is_wysiwyg = "true"; +defparam \REGS|regs[9][25] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X27_Y8_N6 +cyclonev_lcell_comb \PC_Reg_Display[9]~209 ( +// Equation(s): +// \PC_Reg_Display[9]~209_combout = ( \REGS|regs[13][25]~q & ( \REGS|regs[12][25]~q & ( ((!\HID_Register[0]~input_o & (\REGS|regs[8][25]~q )) # (\HID_Register[0]~input_o & ((\REGS|regs[9][25]~q )))) # (\HID_Register[2]~input_o ) ) ) ) # ( +// !\REGS|regs[13][25]~q & ( \REGS|regs[12][25]~q & ( (!\HID_Register[2]~input_o & ((!\HID_Register[0]~input_o & (\REGS|regs[8][25]~q )) # (\HID_Register[0]~input_o & ((\REGS|regs[9][25]~q ))))) # (\HID_Register[2]~input_o & +// (((!\HID_Register[0]~input_o )))) ) ) ) # ( \REGS|regs[13][25]~q & ( !\REGS|regs[12][25]~q & ( (!\HID_Register[2]~input_o & ((!\HID_Register[0]~input_o & (\REGS|regs[8][25]~q )) # (\HID_Register[0]~input_o & ((\REGS|regs[9][25]~q ))))) # +// (\HID_Register[2]~input_o & (((\HID_Register[0]~input_o )))) ) ) ) # ( !\REGS|regs[13][25]~q & ( !\REGS|regs[12][25]~q & ( (!\HID_Register[2]~input_o & ((!\HID_Register[0]~input_o & (\REGS|regs[8][25]~q )) # (\HID_Register[0]~input_o & +// ((\REGS|regs[9][25]~q ))))) ) ) ) + + .dataa(!\REGS|regs[8][25]~q ), + .datab(!\REGS|regs[9][25]~q ), + .datac(!\HID_Register[2]~input_o ), + .datad(!\HID_Register[0]~input_o ), + .datae(!\REGS|regs[13][25]~q ), + .dataf(!\REGS|regs[12][25]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[9]~209_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[9]~209 .extended_lut = "off"; +defparam \PC_Reg_Display[9]~209 .lut_mask = 64'h5030503F5F305F3F; +defparam \PC_Reg_Display[9]~209 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X27_Y7_N54 +cyclonev_lcell_comb \PC_Reg_Display[9]~212 ( +// Equation(s): +// \PC_Reg_Display[9]~212_combout = ( \PC_Reg_Display[9]~210_combout & ( \PC_Reg_Display[9]~209_combout & ( (!\HID_Hi_Low[0]~input_o & (((\HID_Register[1]~input_o )) # (\PC_Reg_Display[9]~208_combout ))) # (\HID_Hi_Low[0]~input_o & +// (((!\HID_Register[1]~input_o ) # (\PC_Reg_Display[9]~211_combout )))) ) ) ) # ( !\PC_Reg_Display[9]~210_combout & ( \PC_Reg_Display[9]~209_combout & ( (!\HID_Hi_Low[0]~input_o & (\PC_Reg_Display[9]~208_combout & ((!\HID_Register[1]~input_o )))) # +// (\HID_Hi_Low[0]~input_o & (((!\HID_Register[1]~input_o ) # (\PC_Reg_Display[9]~211_combout )))) ) ) ) # ( \PC_Reg_Display[9]~210_combout & ( !\PC_Reg_Display[9]~209_combout & ( (!\HID_Hi_Low[0]~input_o & (((\HID_Register[1]~input_o )) # +// (\PC_Reg_Display[9]~208_combout ))) # (\HID_Hi_Low[0]~input_o & (((\PC_Reg_Display[9]~211_combout & \HID_Register[1]~input_o )))) ) ) ) # ( !\PC_Reg_Display[9]~210_combout & ( !\PC_Reg_Display[9]~209_combout & ( (!\HID_Hi_Low[0]~input_o & +// (\PC_Reg_Display[9]~208_combout & ((!\HID_Register[1]~input_o )))) # (\HID_Hi_Low[0]~input_o & (((\PC_Reg_Display[9]~211_combout & \HID_Register[1]~input_o )))) ) ) ) + + .dataa(!\PC_Reg_Display[9]~208_combout ), + .datab(!\PC_Reg_Display[9]~211_combout ), + .datac(!\HID_Hi_Low[0]~input_o ), + .datad(!\HID_Register[1]~input_o ), + .datae(!\PC_Reg_Display[9]~210_combout ), + .dataf(!\PC_Reg_Display[9]~209_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[9]~212_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[9]~212 .extended_lut = "off"; +defparam \PC_Reg_Display[9]~212 .lut_mask = 64'h500350F35F035FF3; +defparam \PC_Reg_Display[9]~212 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X23_Y8_N15 +cyclonev_lcell_comb \PC_Reg_Display[9]~200 ( +// Equation(s): +// \PC_Reg_Display[9]~200_combout = ( \REGS|regs[4][25]~q & ( \REGS|regs[4][9]~q & ( (!\HID_Register[0]~input_o ) # ((!\HID_Hi_Low[0]~input_o & ((\REGS|regs[5][9]~q ))) # (\HID_Hi_Low[0]~input_o & (\REGS|regs[5][25]~q ))) ) ) ) # ( !\REGS|regs[4][25]~q +// & ( \REGS|regs[4][9]~q & ( (!\HID_Hi_Low[0]~input_o & (((!\HID_Register[0]~input_o ) # (\REGS|regs[5][9]~q )))) # (\HID_Hi_Low[0]~input_o & (\REGS|regs[5][25]~q & ((\HID_Register[0]~input_o )))) ) ) ) # ( \REGS|regs[4][25]~q & ( !\REGS|regs[4][9]~q +// & ( (!\HID_Hi_Low[0]~input_o & (((\REGS|regs[5][9]~q & \HID_Register[0]~input_o )))) # (\HID_Hi_Low[0]~input_o & (((!\HID_Register[0]~input_o )) # (\REGS|regs[5][25]~q ))) ) ) ) # ( !\REGS|regs[4][25]~q & ( !\REGS|regs[4][9]~q & ( +// (\HID_Register[0]~input_o & ((!\HID_Hi_Low[0]~input_o & ((\REGS|regs[5][9]~q ))) # (\HID_Hi_Low[0]~input_o & (\REGS|regs[5][25]~q )))) ) ) ) + + .dataa(!\REGS|regs[5][25]~q ), + .datab(!\HID_Hi_Low[0]~input_o ), + .datac(!\REGS|regs[5][9]~q ), + .datad(!\HID_Register[0]~input_o ), + .datae(!\REGS|regs[4][25]~q ), + .dataf(!\REGS|regs[4][9]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[9]~200_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[9]~200 .extended_lut = "off"; +defparam \PC_Reg_Display[9]~200 .lut_mask = 64'h001D331DCC1DFF1D; +defparam \PC_Reg_Display[9]~200 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X33_Y6_N7 +dffeas \REGS|regs[1][9]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[1][9]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~28_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[1][9]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[1][9]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[1][9]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X25_Y6_N48 +cyclonev_lcell_comb \PC_Reg_Display[9]~198 ( +// Equation(s): +// \PC_Reg_Display[9]~198_combout = ( \REGS|regs[1][25]~q & ( (\HID_Register[0]~input_o & ((\HID_Hi_Low[0]~input_o ) # (\REGS|regs[1][9]~DUPLICATE_q ))) ) ) # ( !\REGS|regs[1][25]~q & ( (\HID_Register[0]~input_o & (\REGS|regs[1][9]~DUPLICATE_q & +// !\HID_Hi_Low[0]~input_o )) ) ) + + .dataa(gnd), + .datab(!\HID_Register[0]~input_o ), + .datac(!\REGS|regs[1][9]~DUPLICATE_q ), + .datad(!\HID_Hi_Low[0]~input_o ), + .datae(!\REGS|regs[1][25]~q ), + .dataf(gnd), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[9]~198_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[9]~198 .extended_lut = "off"; +defparam \PC_Reg_Display[9]~198 .lut_mask = 64'h0300033303000333; +defparam \PC_Reg_Display[9]~198 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X28_Y5_N46 +dffeas \REGS|regs[7][9] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[9]~444_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~38_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[7][9]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[7][9] .is_wysiwyg = "true"; +defparam \REGS|regs[7][9] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X22_Y7_N59 +dffeas \REGS|regs[7][25] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[25]~443_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~38_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[7][25]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[7][25] .is_wysiwyg = "true"; +defparam \REGS|regs[7][25] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X22_Y7_N57 +cyclonev_lcell_comb \PC_Reg_Display[9]~201 ( +// Equation(s): +// \PC_Reg_Display[9]~201_combout = ( \REGS|regs[7][25]~q & ( \REGS|regs[6][9]~q & ( (!\HID_Register[0]~input_o & ((!\HID_Hi_Low[0]~input_o ) # ((\REGS|regs[6][25]~q )))) # (\HID_Register[0]~input_o & (((\REGS|regs[7][9]~q )) # (\HID_Hi_Low[0]~input_o +// ))) ) ) ) # ( !\REGS|regs[7][25]~q & ( \REGS|regs[6][9]~q & ( (!\HID_Register[0]~input_o & ((!\HID_Hi_Low[0]~input_o ) # ((\REGS|regs[6][25]~q )))) # (\HID_Register[0]~input_o & (!\HID_Hi_Low[0]~input_o & ((\REGS|regs[7][9]~q )))) ) ) ) # ( +// \REGS|regs[7][25]~q & ( !\REGS|regs[6][9]~q & ( (!\HID_Register[0]~input_o & (\HID_Hi_Low[0]~input_o & (\REGS|regs[6][25]~q ))) # (\HID_Register[0]~input_o & (((\REGS|regs[7][9]~q )) # (\HID_Hi_Low[0]~input_o ))) ) ) ) # ( !\REGS|regs[7][25]~q & ( +// !\REGS|regs[6][9]~q & ( (!\HID_Register[0]~input_o & (\HID_Hi_Low[0]~input_o & (\REGS|regs[6][25]~q ))) # (\HID_Register[0]~input_o & (!\HID_Hi_Low[0]~input_o & ((\REGS|regs[7][9]~q )))) ) ) ) + + .dataa(!\HID_Register[0]~input_o ), + .datab(!\HID_Hi_Low[0]~input_o ), + .datac(!\REGS|regs[6][25]~q ), + .datad(!\REGS|regs[7][9]~q ), + .datae(!\REGS|regs[7][25]~q ), + .dataf(!\REGS|regs[6][9]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[9]~201_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[9]~201 .extended_lut = "off"; +defparam \PC_Reg_Display[9]~201 .lut_mask = 64'h024613578ACE9BDF; +defparam \PC_Reg_Display[9]~201 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X28_Y8_N22 +dffeas \REGS|regs[2][25] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[25]~443_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~32_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[2][25]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[2][25] .is_wysiwyg = "true"; +defparam \REGS|regs[2][25] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X28_Y5_N41 +dffeas \REGS|regs[3][9] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[9]~444_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~36_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[3][9]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[3][9] .is_wysiwyg = "true"; +defparam \REGS|regs[3][9] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X28_Y5_N38 +dffeas \REGS|regs[3][25] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[25]~443_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~36_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[3][25]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[3][25] .is_wysiwyg = "true"; +defparam \REGS|regs[3][25] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X28_Y5_N36 +cyclonev_lcell_comb \PC_Reg_Display[9]~199 ( +// Equation(s): +// \PC_Reg_Display[9]~199_combout = ( \REGS|regs[3][25]~q & ( \REGS|regs[2][9]~q & ( (!\HID_Hi_Low[0]~input_o & (((!\HID_Register[0]~input_o ) # (\REGS|regs[3][9]~q )))) # (\HID_Hi_Low[0]~input_o & (((\HID_Register[0]~input_o )) # (\REGS|regs[2][25]~q +// ))) ) ) ) # ( !\REGS|regs[3][25]~q & ( \REGS|regs[2][9]~q & ( (!\HID_Hi_Low[0]~input_o & (((!\HID_Register[0]~input_o ) # (\REGS|regs[3][9]~q )))) # (\HID_Hi_Low[0]~input_o & (\REGS|regs[2][25]~q & ((!\HID_Register[0]~input_o )))) ) ) ) # ( +// \REGS|regs[3][25]~q & ( !\REGS|regs[2][9]~q & ( (!\HID_Hi_Low[0]~input_o & (((\REGS|regs[3][9]~q & \HID_Register[0]~input_o )))) # (\HID_Hi_Low[0]~input_o & (((\HID_Register[0]~input_o )) # (\REGS|regs[2][25]~q ))) ) ) ) # ( !\REGS|regs[3][25]~q & ( +// !\REGS|regs[2][9]~q & ( (!\HID_Hi_Low[0]~input_o & (((\REGS|regs[3][9]~q & \HID_Register[0]~input_o )))) # (\HID_Hi_Low[0]~input_o & (\REGS|regs[2][25]~q & ((!\HID_Register[0]~input_o )))) ) ) ) + + .dataa(!\REGS|regs[2][25]~q ), + .datab(!\REGS|regs[3][9]~q ), + .datac(!\HID_Hi_Low[0]~input_o ), + .datad(!\HID_Register[0]~input_o ), + .datae(!\REGS|regs[3][25]~q ), + .dataf(!\REGS|regs[2][9]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[9]~199_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[9]~199 .extended_lut = "off"; +defparam \PC_Reg_Display[9]~199 .lut_mask = 64'h0530053FF530F53F; +defparam \PC_Reg_Display[9]~199 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X22_Y7_N51 +cyclonev_lcell_comb \PC_Reg_Display[9]~202 ( +// Equation(s): +// \PC_Reg_Display[9]~202_combout = ( \PC_Reg_Display[9]~199_combout & ( \HID_Register[1]~input_o & ( (!\HID_Register[2]~input_o ) # (\PC_Reg_Display[9]~201_combout ) ) ) ) # ( !\PC_Reg_Display[9]~199_combout & ( \HID_Register[1]~input_o & ( +// (\HID_Register[2]~input_o & \PC_Reg_Display[9]~201_combout ) ) ) ) # ( \PC_Reg_Display[9]~199_combout & ( !\HID_Register[1]~input_o & ( (!\HID_Register[2]~input_o & ((\PC_Reg_Display[9]~198_combout ))) # (\HID_Register[2]~input_o & +// (\PC_Reg_Display[9]~200_combout )) ) ) ) # ( !\PC_Reg_Display[9]~199_combout & ( !\HID_Register[1]~input_o & ( (!\HID_Register[2]~input_o & ((\PC_Reg_Display[9]~198_combout ))) # (\HID_Register[2]~input_o & (\PC_Reg_Display[9]~200_combout )) ) ) ) + + .dataa(!\HID_Register[2]~input_o ), + .datab(!\PC_Reg_Display[9]~200_combout ), + .datac(!\PC_Reg_Display[9]~198_combout ), + .datad(!\PC_Reg_Display[9]~201_combout ), + .datae(!\PC_Reg_Display[9]~199_combout ), + .dataf(!\HID_Register[1]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[9]~202_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[9]~202 .extended_lut = "off"; +defparam \PC_Reg_Display[9]~202 .lut_mask = 64'h1B1B1B1B0055AAFF; +defparam \PC_Reg_Display[9]~202 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X22_Y7_N42 +cyclonev_lcell_comb \PC_Reg_Display[9]~218 ( +// Equation(s): +// \PC_Reg_Display[9]~218_combout = ( \HID_Register[4]~input_o & ( \PC_Reg_Display[9]~202_combout & ( (!\HID_Register[3]~input_o & ((\PC_Reg_Display[9]~207_combout ))) # (\HID_Register[3]~input_o & (\PC_Reg_Display[9]~217_combout )) ) ) ) # ( +// !\HID_Register[4]~input_o & ( \PC_Reg_Display[9]~202_combout & ( (!\HID_Register[3]~input_o ) # (\PC_Reg_Display[9]~212_combout ) ) ) ) # ( \HID_Register[4]~input_o & ( !\PC_Reg_Display[9]~202_combout & ( (!\HID_Register[3]~input_o & +// ((\PC_Reg_Display[9]~207_combout ))) # (\HID_Register[3]~input_o & (\PC_Reg_Display[9]~217_combout )) ) ) ) # ( !\HID_Register[4]~input_o & ( !\PC_Reg_Display[9]~202_combout & ( (\HID_Register[3]~input_o & \PC_Reg_Display[9]~212_combout ) ) ) ) + + .dataa(!\PC_Reg_Display[9]~217_combout ), + .datab(!\PC_Reg_Display[9]~207_combout ), + .datac(!\HID_Register[3]~input_o ), + .datad(!\PC_Reg_Display[9]~212_combout ), + .datae(!\HID_Register[4]~input_o ), + .dataf(!\PC_Reg_Display[9]~202_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[9]~218_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[9]~218 .extended_lut = "off"; +defparam \PC_Reg_Display[9]~218 .lut_mask = 64'h000F3535F0FF3535; +defparam \PC_Reg_Display[9]~218 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X36_Y7_N27 +cyclonev_lcell_comb \PC_Reg_Display[9]~219 ( +// Equation(s): +// \PC_Reg_Display[9]~219_combout = ( \PC|pc [25] & ( (!\HID_PC[0]~input_o & (((\PC_Reg_Display[9]~218_combout )))) # (\HID_PC[0]~input_o & (((\PC|pc [9])) # (\HID_Hi_Low[0]~input_o ))) ) ) # ( !\PC|pc [25] & ( (!\HID_PC[0]~input_o & +// (((\PC_Reg_Display[9]~218_combout )))) # (\HID_PC[0]~input_o & (!\HID_Hi_Low[0]~input_o & ((\PC|pc [9])))) ) ) + + .dataa(!\HID_PC[0]~input_o ), + .datab(!\HID_Hi_Low[0]~input_o ), + .datac(!\PC_Reg_Display[9]~218_combout ), + .datad(!\PC|pc [9]), + .datae(gnd), + .dataf(!\PC|pc [25]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[9]~219_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[9]~219 .extended_lut = "off"; +defparam \PC_Reg_Display[9]~219 .lut_mask = 64'h0A4E0A4E1B5F1B5F; +defparam \PC_Reg_Display[9]~219 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X36_Y8_N25 +dffeas \PC|pc[10] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\Add0~77_sumout ), + .asdata(vcc), + .clrn(!\rst[0]~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\PC|pc [10]), + .prn(vcc)); +// synopsys translate_off +defparam \PC|pc[10] .is_wysiwyg = "true"; +defparam \PC|pc[10] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X35_Y10_N4 +dffeas \REGS|regs[17][10] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[10]~446_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~11_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[17][10]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[17][10] .is_wysiwyg = "true"; +defparam \REGS|regs[17][10] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X28_Y12_N23 +dffeas \REGS|regs[21][10] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[10]~446_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~16_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[21][10]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[21][10] .is_wysiwyg = "true"; +defparam \REGS|regs[21][10] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X28_Y12_N21 +cyclonev_lcell_comb \PC_Reg_Display[10]~225 ( +// Equation(s): +// \PC_Reg_Display[10]~225_combout = ( \REGS|regs[21][10]~q & ( \HID_Register[2]~input_o & ( (\HID_Register[0]~input_o ) # (\REGS|regs[20][10]~q ) ) ) ) # ( !\REGS|regs[21][10]~q & ( \HID_Register[2]~input_o & ( (\REGS|regs[20][10]~q & +// !\HID_Register[0]~input_o ) ) ) ) # ( \REGS|regs[21][10]~q & ( !\HID_Register[2]~input_o & ( (!\HID_Register[0]~input_o & (\REGS|regs[16][10]~q )) # (\HID_Register[0]~input_o & ((\REGS|regs[17][10]~q ))) ) ) ) # ( !\REGS|regs[21][10]~q & ( +// !\HID_Register[2]~input_o & ( (!\HID_Register[0]~input_o & (\REGS|regs[16][10]~q )) # (\HID_Register[0]~input_o & ((\REGS|regs[17][10]~q ))) ) ) ) + + .dataa(!\REGS|regs[20][10]~q ), + .datab(!\REGS|regs[16][10]~q ), + .datac(!\HID_Register[0]~input_o ), + .datad(!\REGS|regs[17][10]~q ), + .datae(!\REGS|regs[21][10]~q ), + .dataf(!\HID_Register[2]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[10]~225_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[10]~225 .extended_lut = "off"; +defparam \PC_Reg_Display[10]~225 .lut_mask = 64'h303F303F50505F5F; +defparam \PC_Reg_Display[10]~225 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X27_Y9_N16 +dffeas \REGS|regs[23][26]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[26]~445_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~18_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[23][26]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[23][26]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[23][26]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X35_Y5_N48 +cyclonev_lcell_comb \PC_Reg_Display[10]~228 ( +// Equation(s): +// \PC_Reg_Display[10]~228_combout = ( \HID_Register[2]~input_o & ( \REGS|regs[22][26]~q & ( (!\HID_Register[0]~input_o ) # (\REGS|regs[23][26]~DUPLICATE_q ) ) ) ) # ( !\HID_Register[2]~input_o & ( \REGS|regs[22][26]~q & ( (!\HID_Register[0]~input_o & +// ((\REGS|regs[18][26]~q ))) # (\HID_Register[0]~input_o & (\REGS|regs[19][26]~q )) ) ) ) # ( \HID_Register[2]~input_o & ( !\REGS|regs[22][26]~q & ( (\HID_Register[0]~input_o & \REGS|regs[23][26]~DUPLICATE_q ) ) ) ) # ( !\HID_Register[2]~input_o & ( +// !\REGS|regs[22][26]~q & ( (!\HID_Register[0]~input_o & ((\REGS|regs[18][26]~q ))) # (\HID_Register[0]~input_o & (\REGS|regs[19][26]~q )) ) ) ) + + .dataa(!\HID_Register[0]~input_o ), + .datab(!\REGS|regs[23][26]~DUPLICATE_q ), + .datac(!\REGS|regs[19][26]~q ), + .datad(!\REGS|regs[18][26]~q ), + .datae(!\HID_Register[2]~input_o ), + .dataf(!\REGS|regs[22][26]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[10]~228_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[10]~228 .extended_lut = "off"; +defparam \PC_Reg_Display[10]~228 .lut_mask = 64'h05AF111105AFBBBB; +defparam \PC_Reg_Display[10]~228 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X33_Y5_N18 +cyclonev_lcell_comb \PC_Reg_Display[10]~227 ( +// Equation(s): +// \PC_Reg_Display[10]~227_combout = ( \REGS|regs[19][10]~q & ( \REGS|regs[22][10]~q & ( (!\HID_Register[2]~input_o & (((\HID_Register[0]~input_o )) # (\REGS|regs[18][10]~q ))) # (\HID_Register[2]~input_o & (((!\HID_Register[0]~input_o ) # +// (\REGS|regs[23][10]~q )))) ) ) ) # ( !\REGS|regs[19][10]~q & ( \REGS|regs[22][10]~q & ( (!\HID_Register[2]~input_o & (\REGS|regs[18][10]~q & (!\HID_Register[0]~input_o ))) # (\HID_Register[2]~input_o & (((!\HID_Register[0]~input_o ) # +// (\REGS|regs[23][10]~q )))) ) ) ) # ( \REGS|regs[19][10]~q & ( !\REGS|regs[22][10]~q & ( (!\HID_Register[2]~input_o & (((\HID_Register[0]~input_o )) # (\REGS|regs[18][10]~q ))) # (\HID_Register[2]~input_o & (((\HID_Register[0]~input_o & +// \REGS|regs[23][10]~q )))) ) ) ) # ( !\REGS|regs[19][10]~q & ( !\REGS|regs[22][10]~q & ( (!\HID_Register[2]~input_o & (\REGS|regs[18][10]~q & (!\HID_Register[0]~input_o ))) # (\HID_Register[2]~input_o & (((\HID_Register[0]~input_o & +// \REGS|regs[23][10]~q )))) ) ) ) + + .dataa(!\REGS|regs[18][10]~q ), + .datab(!\HID_Register[2]~input_o ), + .datac(!\HID_Register[0]~input_o ), + .datad(!\REGS|regs[23][10]~q ), + .datae(!\REGS|regs[19][10]~q ), + .dataf(!\REGS|regs[22][10]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[10]~227_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[10]~227 .extended_lut = "off"; +defparam \PC_Reg_Display[10]~227 .lut_mask = 64'h40434C4F70737C7F; +defparam \PC_Reg_Display[10]~227 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X31_Y6_N13 +dffeas \REGS|regs[20][26] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[26]~445_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~7_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[20][26]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[20][26] .is_wysiwyg = "true"; +defparam \REGS|regs[20][26] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X25_Y6_N14 +dffeas \REGS|regs[17][26] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[26]~445_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~11_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[17][26]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[17][26] .is_wysiwyg = "true"; +defparam \REGS|regs[17][26] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X25_Y6_N35 +dffeas \REGS|regs[21][26] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[26]~445_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~16_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[21][26]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[21][26] .is_wysiwyg = "true"; +defparam \REGS|regs[21][26] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X25_Y6_N33 +cyclonev_lcell_comb \PC_Reg_Display[10]~226 ( +// Equation(s): +// \PC_Reg_Display[10]~226_combout = ( \REGS|regs[21][26]~q & ( \HID_Register[0]~input_o & ( (\HID_Register[2]~input_o ) # (\REGS|regs[17][26]~q ) ) ) ) # ( !\REGS|regs[21][26]~q & ( \HID_Register[0]~input_o & ( (\REGS|regs[17][26]~q & +// !\HID_Register[2]~input_o ) ) ) ) # ( \REGS|regs[21][26]~q & ( !\HID_Register[0]~input_o & ( (!\HID_Register[2]~input_o & ((\REGS|regs[16][26]~q ))) # (\HID_Register[2]~input_o & (\REGS|regs[20][26]~q )) ) ) ) # ( !\REGS|regs[21][26]~q & ( +// !\HID_Register[0]~input_o & ( (!\HID_Register[2]~input_o & ((\REGS|regs[16][26]~q ))) # (\HID_Register[2]~input_o & (\REGS|regs[20][26]~q )) ) ) ) + + .dataa(!\REGS|regs[20][26]~q ), + .datab(!\REGS|regs[17][26]~q ), + .datac(!\REGS|regs[16][26]~q ), + .datad(!\HID_Register[2]~input_o ), + .datae(!\REGS|regs[21][26]~q ), + .dataf(!\HID_Register[0]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[10]~226_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[10]~226 .extended_lut = "off"; +defparam \PC_Reg_Display[10]~226 .lut_mask = 64'h0F550F55330033FF; +defparam \PC_Reg_Display[10]~226 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X31_Y6_N6 +cyclonev_lcell_comb \PC_Reg_Display[10]~229 ( +// Equation(s): +// \PC_Reg_Display[10]~229_combout = ( \HID_Hi_Low[0]~input_o & ( \PC_Reg_Display[10]~226_combout & ( (!\HID_Register[1]~input_o ) # (\PC_Reg_Display[10]~228_combout ) ) ) ) # ( !\HID_Hi_Low[0]~input_o & ( \PC_Reg_Display[10]~226_combout & ( +// (!\HID_Register[1]~input_o & (\PC_Reg_Display[10]~225_combout )) # (\HID_Register[1]~input_o & ((\PC_Reg_Display[10]~227_combout ))) ) ) ) # ( \HID_Hi_Low[0]~input_o & ( !\PC_Reg_Display[10]~226_combout & ( (\HID_Register[1]~input_o & +// \PC_Reg_Display[10]~228_combout ) ) ) ) # ( !\HID_Hi_Low[0]~input_o & ( !\PC_Reg_Display[10]~226_combout & ( (!\HID_Register[1]~input_o & (\PC_Reg_Display[10]~225_combout )) # (\HID_Register[1]~input_o & ((\PC_Reg_Display[10]~227_combout ))) ) ) ) + + .dataa(!\PC_Reg_Display[10]~225_combout ), + .datab(!\HID_Register[1]~input_o ), + .datac(!\PC_Reg_Display[10]~228_combout ), + .datad(!\PC_Reg_Display[10]~227_combout ), + .datae(!\HID_Hi_Low[0]~input_o ), + .dataf(!\PC_Reg_Display[10]~226_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[10]~229_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[10]~229 .extended_lut = "off"; +defparam \PC_Reg_Display[10]~229 .lut_mask = 64'h447703034477CFCF; +defparam \PC_Reg_Display[10]~229 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X31_Y6_N35 +dffeas \REGS|regs[28][10] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[10]~446_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~8_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[28][10]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[28][10] .is_wysiwyg = "true"; +defparam \REGS|regs[28][10] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X35_Y5_N19 +dffeas \REGS|regs[30][10]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[10]~446_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~10_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[30][10]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[30][10]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[30][10]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X31_Y6_N54 +cyclonev_lcell_comb \PC_Reg_Display[10]~236 ( +// Equation(s): +// \PC_Reg_Display[10]~236_combout = ( \REGS|regs[28][26]~q & ( \REGS|regs[30][10]~DUPLICATE_q & ( (!\HID_Hi_Low[0]~input_o & (((\HID_Register[1]~input_o )) # (\REGS|regs[28][10]~q ))) # (\HID_Hi_Low[0]~input_o & (((!\HID_Register[1]~input_o ) # +// (\REGS|regs[30][26]~q )))) ) ) ) # ( !\REGS|regs[28][26]~q & ( \REGS|regs[30][10]~DUPLICATE_q & ( (!\HID_Hi_Low[0]~input_o & (((\HID_Register[1]~input_o )) # (\REGS|regs[28][10]~q ))) # (\HID_Hi_Low[0]~input_o & (((\REGS|regs[30][26]~q & +// \HID_Register[1]~input_o )))) ) ) ) # ( \REGS|regs[28][26]~q & ( !\REGS|regs[30][10]~DUPLICATE_q & ( (!\HID_Hi_Low[0]~input_o & (\REGS|regs[28][10]~q & ((!\HID_Register[1]~input_o )))) # (\HID_Hi_Low[0]~input_o & (((!\HID_Register[1]~input_o ) # +// (\REGS|regs[30][26]~q )))) ) ) ) # ( !\REGS|regs[28][26]~q & ( !\REGS|regs[30][10]~DUPLICATE_q & ( (!\HID_Hi_Low[0]~input_o & (\REGS|regs[28][10]~q & ((!\HID_Register[1]~input_o )))) # (\HID_Hi_Low[0]~input_o & (((\REGS|regs[30][26]~q & +// \HID_Register[1]~input_o )))) ) ) ) + + .dataa(!\REGS|regs[28][10]~q ), + .datab(!\HID_Hi_Low[0]~input_o ), + .datac(!\REGS|regs[30][26]~q ), + .datad(!\HID_Register[1]~input_o ), + .datae(!\REGS|regs[28][26]~q ), + .dataf(!\REGS|regs[30][10]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[10]~236_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[10]~236 .extended_lut = "off"; +defparam \PC_Reg_Display[10]~236 .lut_mask = 64'h4403770344CF77CF; +defparam \PC_Reg_Display[10]~236 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X35_Y10_N25 +dffeas \REGS|regs[29][10] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[10]~446_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~17_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[29][10]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[29][10] .is_wysiwyg = "true"; +defparam \REGS|regs[29][10] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X31_Y6_N24 +cyclonev_lcell_comb \PC_Reg_Display[10]~238 ( +// Equation(s): +// \PC_Reg_Display[10]~238_combout = ( \HID_Hi_Low[0]~input_o & ( \REGS|regs[29][26]~q & ( (!\HID_Register[1]~input_o ) # (\REGS|regs[31][26]~q ) ) ) ) # ( !\HID_Hi_Low[0]~input_o & ( \REGS|regs[29][26]~q & ( (!\HID_Register[1]~input_o & +// ((\REGS|regs[29][10]~q ))) # (\HID_Register[1]~input_o & (\REGS|regs[31][10]~q )) ) ) ) # ( \HID_Hi_Low[0]~input_o & ( !\REGS|regs[29][26]~q & ( (\REGS|regs[31][26]~q & \HID_Register[1]~input_o ) ) ) ) # ( !\HID_Hi_Low[0]~input_o & ( +// !\REGS|regs[29][26]~q & ( (!\HID_Register[1]~input_o & ((\REGS|regs[29][10]~q ))) # (\HID_Register[1]~input_o & (\REGS|regs[31][10]~q )) ) ) ) + + .dataa(!\REGS|regs[31][26]~q ), + .datab(!\REGS|regs[31][10]~q ), + .datac(!\REGS|regs[29][10]~q ), + .datad(!\HID_Register[1]~input_o ), + .datae(!\HID_Hi_Low[0]~input_o ), + .dataf(!\REGS|regs[29][26]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[10]~238_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[10]~238 .extended_lut = "off"; +defparam \PC_Reg_Display[10]~238 .lut_mask = 64'h0F3300550F33FF55; +defparam \PC_Reg_Display[10]~238 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X25_Y8_N10 +dffeas \REGS|regs[24][26] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[26]~445_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~4_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[24][26]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[24][26] .is_wysiwyg = "true"; +defparam \REGS|regs[24][26] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X28_Y10_N26 +dffeas \REGS|regs[24][10] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[10]~446_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~4_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[24][10]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[24][10] .is_wysiwyg = "true"; +defparam \REGS|regs[24][10] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X28_Y10_N24 +cyclonev_lcell_comb \PC_Reg_Display[10]~235 ( +// Equation(s): +// \PC_Reg_Display[10]~235_combout = ( \REGS|regs[24][10]~q & ( \HID_Register[1]~input_o & ( (!\HID_Hi_Low[0]~input_o & ((\REGS|regs[26][10]~q ))) # (\HID_Hi_Low[0]~input_o & (\REGS|regs[26][26]~q )) ) ) ) # ( !\REGS|regs[24][10]~q & ( +// \HID_Register[1]~input_o & ( (!\HID_Hi_Low[0]~input_o & ((\REGS|regs[26][10]~q ))) # (\HID_Hi_Low[0]~input_o & (\REGS|regs[26][26]~q )) ) ) ) # ( \REGS|regs[24][10]~q & ( !\HID_Register[1]~input_o & ( (!\HID_Hi_Low[0]~input_o ) # +// (\REGS|regs[24][26]~q ) ) ) ) # ( !\REGS|regs[24][10]~q & ( !\HID_Register[1]~input_o & ( (\HID_Hi_Low[0]~input_o & \REGS|regs[24][26]~q ) ) ) ) + + .dataa(!\REGS|regs[26][26]~q ), + .datab(!\HID_Hi_Low[0]~input_o ), + .datac(!\REGS|regs[24][26]~q ), + .datad(!\REGS|regs[26][10]~q ), + .datae(!\REGS|regs[24][10]~q ), + .dataf(!\HID_Register[1]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[10]~235_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[10]~235 .extended_lut = "off"; +defparam \PC_Reg_Display[10]~235 .lut_mask = 64'h0303CFCF11DD11DD; +defparam \PC_Reg_Display[10]~235 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X30_Y10_N56 +dffeas \REGS|regs[25][10] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[10]~446_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~13_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[25][10]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[25][10] .is_wysiwyg = "true"; +defparam \REGS|regs[25][10] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X30_Y10_N0 +cyclonev_lcell_comb \PC_Reg_Display[10]~237 ( +// Equation(s): +// \PC_Reg_Display[10]~237_combout = ( \HID_Register[1]~input_o & ( \REGS|regs[27][10]~q & ( (!\HID_Hi_Low[0]~input_o ) # (\REGS|regs[27][26]~q ) ) ) ) # ( !\HID_Register[1]~input_o & ( \REGS|regs[27][10]~q & ( (!\HID_Hi_Low[0]~input_o & +// (\REGS|regs[25][10]~q )) # (\HID_Hi_Low[0]~input_o & ((\REGS|regs[25][26]~q ))) ) ) ) # ( \HID_Register[1]~input_o & ( !\REGS|regs[27][10]~q & ( (\REGS|regs[27][26]~q & \HID_Hi_Low[0]~input_o ) ) ) ) # ( !\HID_Register[1]~input_o & ( +// !\REGS|regs[27][10]~q & ( (!\HID_Hi_Low[0]~input_o & (\REGS|regs[25][10]~q )) # (\HID_Hi_Low[0]~input_o & ((\REGS|regs[25][26]~q ))) ) ) ) + + .dataa(!\REGS|regs[25][10]~q ), + .datab(!\REGS|regs[27][26]~q ), + .datac(!\HID_Hi_Low[0]~input_o ), + .datad(!\REGS|regs[25][26]~q ), + .datae(!\HID_Register[1]~input_o ), + .dataf(!\REGS|regs[27][10]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[10]~237_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[10]~237 .extended_lut = "off"; +defparam \PC_Reg_Display[10]~237 .lut_mask = 64'h505F0303505FF3F3; +defparam \PC_Reg_Display[10]~237 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X31_Y6_N15 +cyclonev_lcell_comb \PC_Reg_Display[10]~239 ( +// Equation(s): +// \PC_Reg_Display[10]~239_combout = ( \PC_Reg_Display[10]~235_combout & ( \PC_Reg_Display[10]~237_combout & ( (!\HID_Register[2]~input_o ) # ((!\HID_Register[0]~input_o & (\PC_Reg_Display[10]~236_combout )) # (\HID_Register[0]~input_o & +// ((\PC_Reg_Display[10]~238_combout )))) ) ) ) # ( !\PC_Reg_Display[10]~235_combout & ( \PC_Reg_Display[10]~237_combout & ( (!\HID_Register[0]~input_o & (\HID_Register[2]~input_o & (\PC_Reg_Display[10]~236_combout ))) # (\HID_Register[0]~input_o & +// ((!\HID_Register[2]~input_o ) # ((\PC_Reg_Display[10]~238_combout )))) ) ) ) # ( \PC_Reg_Display[10]~235_combout & ( !\PC_Reg_Display[10]~237_combout & ( (!\HID_Register[0]~input_o & ((!\HID_Register[2]~input_o ) # ((\PC_Reg_Display[10]~236_combout +// )))) # (\HID_Register[0]~input_o & (\HID_Register[2]~input_o & ((\PC_Reg_Display[10]~238_combout )))) ) ) ) # ( !\PC_Reg_Display[10]~235_combout & ( !\PC_Reg_Display[10]~237_combout & ( (\HID_Register[2]~input_o & ((!\HID_Register[0]~input_o & +// (\PC_Reg_Display[10]~236_combout )) # (\HID_Register[0]~input_o & ((\PC_Reg_Display[10]~238_combout ))))) ) ) ) + + .dataa(!\HID_Register[0]~input_o ), + .datab(!\HID_Register[2]~input_o ), + .datac(!\PC_Reg_Display[10]~236_combout ), + .datad(!\PC_Reg_Display[10]~238_combout ), + .datae(!\PC_Reg_Display[10]~235_combout ), + .dataf(!\PC_Reg_Display[10]~237_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[10]~239_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[10]~239 .extended_lut = "off"; +defparam \PC_Reg_Display[10]~239 .lut_mask = 64'h02138A9B4657CEDF; +defparam \PC_Reg_Display[10]~239 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X31_Y6_N51 +cyclonev_lcell_comb \PC_Reg_Display[10]~231 ( +// Equation(s): +// \PC_Reg_Display[10]~231_combout = ( \REGS|regs[12][10]~q & ( \REGS|regs[14][26]~q & ( (!\HID_Register[1]~input_o & (((!\HID_Hi_Low[0]~input_o )) # (\REGS|regs[12][26]~q ))) # (\HID_Register[1]~input_o & (((\HID_Hi_Low[0]~input_o ) # +// (\REGS|regs[14][10]~q )))) ) ) ) # ( !\REGS|regs[12][10]~q & ( \REGS|regs[14][26]~q & ( (!\HID_Register[1]~input_o & (\REGS|regs[12][26]~q & ((\HID_Hi_Low[0]~input_o )))) # (\HID_Register[1]~input_o & (((\HID_Hi_Low[0]~input_o ) # +// (\REGS|regs[14][10]~q )))) ) ) ) # ( \REGS|regs[12][10]~q & ( !\REGS|regs[14][26]~q & ( (!\HID_Register[1]~input_o & (((!\HID_Hi_Low[0]~input_o )) # (\REGS|regs[12][26]~q ))) # (\HID_Register[1]~input_o & (((\REGS|regs[14][10]~q & +// !\HID_Hi_Low[0]~input_o )))) ) ) ) # ( !\REGS|regs[12][10]~q & ( !\REGS|regs[14][26]~q & ( (!\HID_Register[1]~input_o & (\REGS|regs[12][26]~q & ((\HID_Hi_Low[0]~input_o )))) # (\HID_Register[1]~input_o & (((\REGS|regs[14][10]~q & +// !\HID_Hi_Low[0]~input_o )))) ) ) ) + + .dataa(!\REGS|regs[12][26]~q ), + .datab(!\HID_Register[1]~input_o ), + .datac(!\REGS|regs[14][10]~q ), + .datad(!\HID_Hi_Low[0]~input_o ), + .datae(!\REGS|regs[12][10]~q ), + .dataf(!\REGS|regs[14][26]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[10]~231_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[10]~231 .extended_lut = "off"; +defparam \PC_Reg_Display[10]~231 .lut_mask = 64'h0344CF440377CF77; +defparam \PC_Reg_Display[10]~231 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X28_Y8_N45 +cyclonev_lcell_comb \PC_Reg_Display[10]~230 ( +// Equation(s): +// \PC_Reg_Display[10]~230_combout = ( \REGS|regs[10][26]~q & ( \REGS|regs[8][10]~DUPLICATE_q & ( (!\HID_Hi_Low[0]~input_o & (((!\HID_Register[1]~input_o )) # (\REGS|regs[10][10]~q ))) # (\HID_Hi_Low[0]~input_o & (((\HID_Register[1]~input_o ) # +// (\REGS|regs[8][26]~DUPLICATE_q )))) ) ) ) # ( !\REGS|regs[10][26]~q & ( \REGS|regs[8][10]~DUPLICATE_q & ( (!\HID_Hi_Low[0]~input_o & (((!\HID_Register[1]~input_o )) # (\REGS|regs[10][10]~q ))) # (\HID_Hi_Low[0]~input_o & +// (((\REGS|regs[8][26]~DUPLICATE_q & !\HID_Register[1]~input_o )))) ) ) ) # ( \REGS|regs[10][26]~q & ( !\REGS|regs[8][10]~DUPLICATE_q & ( (!\HID_Hi_Low[0]~input_o & (\REGS|regs[10][10]~q & ((\HID_Register[1]~input_o )))) # (\HID_Hi_Low[0]~input_o & +// (((\HID_Register[1]~input_o ) # (\REGS|regs[8][26]~DUPLICATE_q )))) ) ) ) # ( !\REGS|regs[10][26]~q & ( !\REGS|regs[8][10]~DUPLICATE_q & ( (!\HID_Hi_Low[0]~input_o & (\REGS|regs[10][10]~q & ((\HID_Register[1]~input_o )))) # (\HID_Hi_Low[0]~input_o & +// (((\REGS|regs[8][26]~DUPLICATE_q & !\HID_Register[1]~input_o )))) ) ) ) + + .dataa(!\REGS|regs[10][10]~q ), + .datab(!\REGS|regs[8][26]~DUPLICATE_q ), + .datac(!\HID_Hi_Low[0]~input_o ), + .datad(!\HID_Register[1]~input_o ), + .datae(!\REGS|regs[10][26]~q ), + .dataf(!\REGS|regs[8][10]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[10]~230_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[10]~230 .extended_lut = "off"; +defparam \PC_Reg_Display[10]~230 .lut_mask = 64'h0350035FF350F35F; +defparam \PC_Reg_Display[10]~230 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X28_Y8_N43 +dffeas \REGS|regs[11][26]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[26]~445_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~37_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[11][26]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[11][26]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[11][26]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X23_Y8_N54 +cyclonev_lcell_comb \PC_Reg_Display[10]~232 ( +// Equation(s): +// \PC_Reg_Display[10]~232_combout = ( \REGS|regs[9][26]~DUPLICATE_q & ( \REGS|regs[11][26]~DUPLICATE_q & ( ((!\HID_Register[1]~input_o & ((\REGS|regs[9][10]~q ))) # (\HID_Register[1]~input_o & (\REGS|regs[11][10]~q ))) # (\HID_Hi_Low[0]~input_o ) ) ) ) +// # ( !\REGS|regs[9][26]~DUPLICATE_q & ( \REGS|regs[11][26]~DUPLICATE_q & ( (!\HID_Register[1]~input_o & (((\REGS|regs[9][10]~q & !\HID_Hi_Low[0]~input_o )))) # (\HID_Register[1]~input_o & (((\HID_Hi_Low[0]~input_o )) # (\REGS|regs[11][10]~q ))) ) ) ) +// # ( \REGS|regs[9][26]~DUPLICATE_q & ( !\REGS|regs[11][26]~DUPLICATE_q & ( (!\HID_Register[1]~input_o & (((\HID_Hi_Low[0]~input_o ) # (\REGS|regs[9][10]~q )))) # (\HID_Register[1]~input_o & (\REGS|regs[11][10]~q & ((!\HID_Hi_Low[0]~input_o )))) ) ) ) +// # ( !\REGS|regs[9][26]~DUPLICATE_q & ( !\REGS|regs[11][26]~DUPLICATE_q & ( (!\HID_Hi_Low[0]~input_o & ((!\HID_Register[1]~input_o & ((\REGS|regs[9][10]~q ))) # (\HID_Register[1]~input_o & (\REGS|regs[11][10]~q )))) ) ) ) + + .dataa(!\REGS|regs[11][10]~q ), + .datab(!\REGS|regs[9][10]~q ), + .datac(!\HID_Register[1]~input_o ), + .datad(!\HID_Hi_Low[0]~input_o ), + .datae(!\REGS|regs[9][26]~DUPLICATE_q ), + .dataf(!\REGS|regs[11][26]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[10]~232_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[10]~232 .extended_lut = "off"; +defparam \PC_Reg_Display[10]~232 .lut_mask = 64'h350035F0350F35FF; +defparam \PC_Reg_Display[10]~232 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X31_Y6_N30 +cyclonev_lcell_comb \PC_Reg_Display[10]~233 ( +// Equation(s): +// \PC_Reg_Display[10]~233_combout = ( \REGS|regs[15][26]~q & ( \REGS|regs[13][26]~q & ( ((!\HID_Register[1]~input_o & ((\REGS|regs[13][10]~q ))) # (\HID_Register[1]~input_o & (\REGS|regs[15][10]~q ))) # (\HID_Hi_Low[0]~input_o ) ) ) ) # ( +// !\REGS|regs[15][26]~q & ( \REGS|regs[13][26]~q & ( (!\HID_Hi_Low[0]~input_o & ((!\HID_Register[1]~input_o & ((\REGS|regs[13][10]~q ))) # (\HID_Register[1]~input_o & (\REGS|regs[15][10]~q )))) # (\HID_Hi_Low[0]~input_o & (((!\HID_Register[1]~input_o +// )))) ) ) ) # ( \REGS|regs[15][26]~q & ( !\REGS|regs[13][26]~q & ( (!\HID_Hi_Low[0]~input_o & ((!\HID_Register[1]~input_o & ((\REGS|regs[13][10]~q ))) # (\HID_Register[1]~input_o & (\REGS|regs[15][10]~q )))) # (\HID_Hi_Low[0]~input_o & +// (((\HID_Register[1]~input_o )))) ) ) ) # ( !\REGS|regs[15][26]~q & ( !\REGS|regs[13][26]~q & ( (!\HID_Hi_Low[0]~input_o & ((!\HID_Register[1]~input_o & ((\REGS|regs[13][10]~q ))) # (\HID_Register[1]~input_o & (\REGS|regs[15][10]~q )))) ) ) ) + + .dataa(!\HID_Hi_Low[0]~input_o ), + .datab(!\REGS|regs[15][10]~q ), + .datac(!\REGS|regs[13][10]~q ), + .datad(!\HID_Register[1]~input_o ), + .datae(!\REGS|regs[15][26]~q ), + .dataf(!\REGS|regs[13][26]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[10]~233_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[10]~233 .extended_lut = "off"; +defparam \PC_Reg_Display[10]~233 .lut_mask = 64'h0A220A775F225F77; +defparam \PC_Reg_Display[10]~233 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X31_Y6_N0 +cyclonev_lcell_comb \PC_Reg_Display[10]~234 ( +// Equation(s): +// \PC_Reg_Display[10]~234_combout = ( \PC_Reg_Display[10]~232_combout & ( \PC_Reg_Display[10]~233_combout & ( ((!\HID_Register[2]~input_o & ((\PC_Reg_Display[10]~230_combout ))) # (\HID_Register[2]~input_o & (\PC_Reg_Display[10]~231_combout ))) # +// (\HID_Register[0]~input_o ) ) ) ) # ( !\PC_Reg_Display[10]~232_combout & ( \PC_Reg_Display[10]~233_combout & ( (!\HID_Register[0]~input_o & ((!\HID_Register[2]~input_o & ((\PC_Reg_Display[10]~230_combout ))) # (\HID_Register[2]~input_o & +// (\PC_Reg_Display[10]~231_combout )))) # (\HID_Register[0]~input_o & (((\HID_Register[2]~input_o )))) ) ) ) # ( \PC_Reg_Display[10]~232_combout & ( !\PC_Reg_Display[10]~233_combout & ( (!\HID_Register[0]~input_o & ((!\HID_Register[2]~input_o & +// ((\PC_Reg_Display[10]~230_combout ))) # (\HID_Register[2]~input_o & (\PC_Reg_Display[10]~231_combout )))) # (\HID_Register[0]~input_o & (((!\HID_Register[2]~input_o )))) ) ) ) # ( !\PC_Reg_Display[10]~232_combout & ( !\PC_Reg_Display[10]~233_combout & +// ( (!\HID_Register[0]~input_o & ((!\HID_Register[2]~input_o & ((\PC_Reg_Display[10]~230_combout ))) # (\HID_Register[2]~input_o & (\PC_Reg_Display[10]~231_combout )))) ) ) ) + + .dataa(!\PC_Reg_Display[10]~231_combout ), + .datab(!\PC_Reg_Display[10]~230_combout ), + .datac(!\HID_Register[0]~input_o ), + .datad(!\HID_Register[2]~input_o ), + .datae(!\PC_Reg_Display[10]~232_combout ), + .dataf(!\PC_Reg_Display[10]~233_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[10]~234_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[10]~234 .extended_lut = "off"; +defparam \PC_Reg_Display[10]~234 .lut_mask = 64'h30503F50305F3F5F; +defparam \PC_Reg_Display[10]~234 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X27_Y12_N28 +dffeas \REGS|regs[7][10] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[10]~446_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~38_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[7][10]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[7][10] .is_wysiwyg = "true"; +defparam \REGS|regs[7][10] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y12_N26 +dffeas \REGS|regs[7][26] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[26]~445_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~38_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[7][26]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[7][26] .is_wysiwyg = "true"; +defparam \REGS|regs[7][26] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X27_Y12_N24 +cyclonev_lcell_comb \PC_Reg_Display[10]~223 ( +// Equation(s): +// \PC_Reg_Display[10]~223_combout = ( \REGS|regs[7][26]~q & ( \HID_Register[0]~input_o & ( (\HID_Hi_Low[0]~input_o ) # (\REGS|regs[7][10]~q ) ) ) ) # ( !\REGS|regs[7][26]~q & ( \HID_Register[0]~input_o & ( (\REGS|regs[7][10]~q & +// !\HID_Hi_Low[0]~input_o ) ) ) ) # ( \REGS|regs[7][26]~q & ( !\HID_Register[0]~input_o & ( (!\HID_Hi_Low[0]~input_o & (\REGS|regs[6][10]~q )) # (\HID_Hi_Low[0]~input_o & ((\REGS|regs[6][26]~q ))) ) ) ) # ( !\REGS|regs[7][26]~q & ( +// !\HID_Register[0]~input_o & ( (!\HID_Hi_Low[0]~input_o & (\REGS|regs[6][10]~q )) # (\HID_Hi_Low[0]~input_o & ((\REGS|regs[6][26]~q ))) ) ) ) + + .dataa(!\REGS|regs[6][10]~q ), + .datab(!\REGS|regs[7][10]~q ), + .datac(!\HID_Hi_Low[0]~input_o ), + .datad(!\REGS|regs[6][26]~q ), + .datae(!\REGS|regs[7][26]~q ), + .dataf(!\HID_Register[0]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[10]~223_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[10]~223 .extended_lut = "off"; +defparam \PC_Reg_Display[10]~223 .lut_mask = 64'h505F505F30303F3F; +defparam \PC_Reg_Display[10]~223 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X31_Y13_N47 +dffeas \REGS|regs[1][26] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[26]~445_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~28_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[1][26]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[1][26] .is_wysiwyg = "true"; +defparam \REGS|regs[1][26] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X31_Y13_N27 +cyclonev_lcell_comb \PC_Reg_Display[10]~220 ( +// Equation(s): +// \PC_Reg_Display[10]~220_combout = ( \HID_Hi_Low[0]~input_o & ( (\REGS|regs[1][26]~q & \HID_Register[0]~input_o ) ) ) # ( !\HID_Hi_Low[0]~input_o & ( (\REGS|regs[1][10]~q & \HID_Register[0]~input_o ) ) ) + + .dataa(!\REGS|regs[1][10]~q ), + .datab(!\REGS|regs[1][26]~q ), + .datac(!\HID_Register[0]~input_o ), + .datad(gnd), + .datae(gnd), + .dataf(!\HID_Hi_Low[0]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[10]~220_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[10]~220 .extended_lut = "off"; +defparam \PC_Reg_Display[10]~220 .lut_mask = 64'h0505050503030303; +defparam \PC_Reg_Display[10]~220 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X28_Y8_N16 +dffeas \REGS|regs[2][10] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[2][10]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~32_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[2][10]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[2][10] .is_wysiwyg = "true"; +defparam \REGS|regs[2][10] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X28_Y8_N7 +dffeas \REGS|regs[2][26]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[26]~445_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~32_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[2][26]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[2][26]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[2][26]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: FF_X28_Y13_N14 +dffeas \REGS|regs[3][26] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[26]~445_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~36_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[3][26]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[3][26] .is_wysiwyg = "true"; +defparam \REGS|regs[3][26] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X28_Y13_N17 +dffeas \REGS|regs[3][10] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[10]~446_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~36_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[3][10]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[3][10] .is_wysiwyg = "true"; +defparam \REGS|regs[3][10] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X28_Y13_N12 +cyclonev_lcell_comb \PC_Reg_Display[10]~221 ( +// Equation(s): +// \PC_Reg_Display[10]~221_combout = ( \REGS|regs[3][26]~q & ( \REGS|regs[3][10]~q & ( ((!\HID_Hi_Low[0]~input_o & (\REGS|regs[2][10]~q )) # (\HID_Hi_Low[0]~input_o & ((\REGS|regs[2][26]~DUPLICATE_q )))) # (\HID_Register[0]~input_o ) ) ) ) # ( +// !\REGS|regs[3][26]~q & ( \REGS|regs[3][10]~q & ( (!\HID_Register[0]~input_o & ((!\HID_Hi_Low[0]~input_o & (\REGS|regs[2][10]~q )) # (\HID_Hi_Low[0]~input_o & ((\REGS|regs[2][26]~DUPLICATE_q ))))) # (\HID_Register[0]~input_o & +// (((!\HID_Hi_Low[0]~input_o )))) ) ) ) # ( \REGS|regs[3][26]~q & ( !\REGS|regs[3][10]~q & ( (!\HID_Register[0]~input_o & ((!\HID_Hi_Low[0]~input_o & (\REGS|regs[2][10]~q )) # (\HID_Hi_Low[0]~input_o & ((\REGS|regs[2][26]~DUPLICATE_q ))))) # +// (\HID_Register[0]~input_o & (((\HID_Hi_Low[0]~input_o )))) ) ) ) # ( !\REGS|regs[3][26]~q & ( !\REGS|regs[3][10]~q & ( (!\HID_Register[0]~input_o & ((!\HID_Hi_Low[0]~input_o & (\REGS|regs[2][10]~q )) # (\HID_Hi_Low[0]~input_o & +// ((\REGS|regs[2][26]~DUPLICATE_q ))))) ) ) ) + + .dataa(!\HID_Register[0]~input_o ), + .datab(!\REGS|regs[2][10]~q ), + .datac(!\REGS|regs[2][26]~DUPLICATE_q ), + .datad(!\HID_Hi_Low[0]~input_o ), + .datae(!\REGS|regs[3][26]~q ), + .dataf(!\REGS|regs[3][10]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[10]~221_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[10]~221 .extended_lut = "off"; +defparam \PC_Reg_Display[10]~221 .lut_mask = 64'h220A225F770A775F; +defparam \PC_Reg_Display[10]~221 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X30_Y11_N19 +dffeas \REGS|regs[4][26]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[26]~445_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~22_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[4][26]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[4][26]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[4][26]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: FF_X33_Y8_N46 +dffeas \REGS|regs[4][10]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[10]~446_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~22_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[4][10]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[4][10]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[4][10]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X27_Y12_N54 +cyclonev_lcell_comb \PC_Reg_Display[10]~222 ( +// Equation(s): +// \PC_Reg_Display[10]~222_combout = ( \REGS|regs[5][26]~q & ( \HID_Hi_Low[0]~input_o & ( (\HID_Register[0]~input_o ) # (\REGS|regs[4][26]~DUPLICATE_q ) ) ) ) # ( !\REGS|regs[5][26]~q & ( \HID_Hi_Low[0]~input_o & ( (\REGS|regs[4][26]~DUPLICATE_q & +// !\HID_Register[0]~input_o ) ) ) ) # ( \REGS|regs[5][26]~q & ( !\HID_Hi_Low[0]~input_o & ( (!\HID_Register[0]~input_o & ((\REGS|regs[4][10]~DUPLICATE_q ))) # (\HID_Register[0]~input_o & (\REGS|regs[5][10]~q )) ) ) ) # ( !\REGS|regs[5][26]~q & ( +// !\HID_Hi_Low[0]~input_o & ( (!\HID_Register[0]~input_o & ((\REGS|regs[4][10]~DUPLICATE_q ))) # (\HID_Register[0]~input_o & (\REGS|regs[5][10]~q )) ) ) ) + + .dataa(!\REGS|regs[4][26]~DUPLICATE_q ), + .datab(!\REGS|regs[5][10]~q ), + .datac(!\REGS|regs[4][10]~DUPLICATE_q ), + .datad(!\HID_Register[0]~input_o ), + .datae(!\REGS|regs[5][26]~q ), + .dataf(!\HID_Hi_Low[0]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[10]~222_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[10]~222 .extended_lut = "off"; +defparam \PC_Reg_Display[10]~222 .lut_mask = 64'h0F330F33550055FF; +defparam \PC_Reg_Display[10]~222 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X31_Y13_N42 +cyclonev_lcell_comb \PC_Reg_Display[10]~224 ( +// Equation(s): +// \PC_Reg_Display[10]~224_combout = ( \PC_Reg_Display[10]~221_combout & ( \PC_Reg_Display[10]~222_combout & ( (!\HID_Register[2]~input_o & (((\HID_Register[1]~input_o ) # (\PC_Reg_Display[10]~220_combout )))) # (\HID_Register[2]~input_o & +// (((!\HID_Register[1]~input_o )) # (\PC_Reg_Display[10]~223_combout ))) ) ) ) # ( !\PC_Reg_Display[10]~221_combout & ( \PC_Reg_Display[10]~222_combout & ( (!\HID_Register[2]~input_o & (((\PC_Reg_Display[10]~220_combout & !\HID_Register[1]~input_o )))) +// # (\HID_Register[2]~input_o & (((!\HID_Register[1]~input_o )) # (\PC_Reg_Display[10]~223_combout ))) ) ) ) # ( \PC_Reg_Display[10]~221_combout & ( !\PC_Reg_Display[10]~222_combout & ( (!\HID_Register[2]~input_o & (((\HID_Register[1]~input_o ) # +// (\PC_Reg_Display[10]~220_combout )))) # (\HID_Register[2]~input_o & (\PC_Reg_Display[10]~223_combout & ((\HID_Register[1]~input_o )))) ) ) ) # ( !\PC_Reg_Display[10]~221_combout & ( !\PC_Reg_Display[10]~222_combout & ( (!\HID_Register[2]~input_o & +// (((\PC_Reg_Display[10]~220_combout & !\HID_Register[1]~input_o )))) # (\HID_Register[2]~input_o & (\PC_Reg_Display[10]~223_combout & ((\HID_Register[1]~input_o )))) ) ) ) + + .dataa(!\PC_Reg_Display[10]~223_combout ), + .datab(!\HID_Register[2]~input_o ), + .datac(!\PC_Reg_Display[10]~220_combout ), + .datad(!\HID_Register[1]~input_o ), + .datae(!\PC_Reg_Display[10]~221_combout ), + .dataf(!\PC_Reg_Display[10]~222_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[10]~224_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[10]~224 .extended_lut = "off"; +defparam \PC_Reg_Display[10]~224 .lut_mask = 64'h0C110CDD3F113FDD; +defparam \PC_Reg_Display[10]~224 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X31_Y6_N42 +cyclonev_lcell_comb \PC_Reg_Display[10]~240 ( +// Equation(s): +// \PC_Reg_Display[10]~240_combout = ( \HID_Register[4]~input_o & ( \PC_Reg_Display[10]~224_combout & ( (!\HID_Register[3]~input_o & (\PC_Reg_Display[10]~229_combout )) # (\HID_Register[3]~input_o & ((\PC_Reg_Display[10]~239_combout ))) ) ) ) # ( +// !\HID_Register[4]~input_o & ( \PC_Reg_Display[10]~224_combout & ( (!\HID_Register[3]~input_o ) # (\PC_Reg_Display[10]~234_combout ) ) ) ) # ( \HID_Register[4]~input_o & ( !\PC_Reg_Display[10]~224_combout & ( (!\HID_Register[3]~input_o & +// (\PC_Reg_Display[10]~229_combout )) # (\HID_Register[3]~input_o & ((\PC_Reg_Display[10]~239_combout ))) ) ) ) # ( !\HID_Register[4]~input_o & ( !\PC_Reg_Display[10]~224_combout & ( (\PC_Reg_Display[10]~234_combout & \HID_Register[3]~input_o ) ) ) ) + + .dataa(!\PC_Reg_Display[10]~229_combout ), + .datab(!\PC_Reg_Display[10]~239_combout ), + .datac(!\PC_Reg_Display[10]~234_combout ), + .datad(!\HID_Register[3]~input_o ), + .datae(!\HID_Register[4]~input_o ), + .dataf(!\PC_Reg_Display[10]~224_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[10]~240_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[10]~240 .extended_lut = "off"; +defparam \PC_Reg_Display[10]~240 .lut_mask = 64'h000F5533FF0F5533; +defparam \PC_Reg_Display[10]~240 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X40_Y10_N0 +cyclonev_lcell_comb \PC_Reg_Display[10]~241 ( +// Equation(s): +// \PC_Reg_Display[10]~241_combout = ( \PC|pc [26] & ( (!\HID_PC[0]~input_o & (((\PC_Reg_Display[10]~240_combout )))) # (\HID_PC[0]~input_o & (((\PC|pc [10])) # (\HID_Hi_Low[0]~input_o ))) ) ) # ( !\PC|pc [26] & ( (!\HID_PC[0]~input_o & +// (((\PC_Reg_Display[10]~240_combout )))) # (\HID_PC[0]~input_o & (!\HID_Hi_Low[0]~input_o & (\PC|pc [10]))) ) ) + + .dataa(!\HID_PC[0]~input_o ), + .datab(!\HID_Hi_Low[0]~input_o ), + .datac(!\PC|pc [10]), + .datad(!\PC_Reg_Display[10]~240_combout ), + .datae(gnd), + .dataf(!\PC|pc [26]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[10]~241_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[10]~241 .extended_lut = "off"; +defparam \PC_Reg_Display[10]~241 .lut_mask = 64'h04AE04AE15BF15BF; +defparam \PC_Reg_Display[10]~241 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X33_Y12_N58 +dffeas \REGS|regs[18][8] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[8]~442_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~5_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[18][8]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[18][8] .is_wysiwyg = "true"; +defparam \REGS|regs[18][8] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X37_Y12_N42 +cyclonev_lcell_comb \PC_Reg_Display[8]~183 ( +// Equation(s): +// \PC_Reg_Display[8]~183_combout = ( \REGS|regs[22][8]~q & ( \REGS|regs[19][8]~q & ( (!\HID_Register[0]~input_o & (((\REGS|regs[18][8]~q ) # (\HID_Register[2]~input_o )))) # (\HID_Register[0]~input_o & (((!\HID_Register[2]~input_o )) # +// (\REGS|regs[23][8]~q ))) ) ) ) # ( !\REGS|regs[22][8]~q & ( \REGS|regs[19][8]~q & ( (!\HID_Register[0]~input_o & (((!\HID_Register[2]~input_o & \REGS|regs[18][8]~q )))) # (\HID_Register[0]~input_o & (((!\HID_Register[2]~input_o )) # +// (\REGS|regs[23][8]~q ))) ) ) ) # ( \REGS|regs[22][8]~q & ( !\REGS|regs[19][8]~q & ( (!\HID_Register[0]~input_o & (((\REGS|regs[18][8]~q ) # (\HID_Register[2]~input_o )))) # (\HID_Register[0]~input_o & (\REGS|regs[23][8]~q & (\HID_Register[2]~input_o +// ))) ) ) ) # ( !\REGS|regs[22][8]~q & ( !\REGS|regs[19][8]~q & ( (!\HID_Register[0]~input_o & (((!\HID_Register[2]~input_o & \REGS|regs[18][8]~q )))) # (\HID_Register[0]~input_o & (\REGS|regs[23][8]~q & (\HID_Register[2]~input_o ))) ) ) ) + + .dataa(!\HID_Register[0]~input_o ), + .datab(!\REGS|regs[23][8]~q ), + .datac(!\HID_Register[2]~input_o ), + .datad(!\REGS|regs[18][8]~q ), + .datae(!\REGS|regs[22][8]~q ), + .dataf(!\REGS|regs[19][8]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[8]~183_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[8]~183 .extended_lut = "off"; +defparam \PC_Reg_Display[8]~183 .lut_mask = 64'h01A10BAB51F15BFB; +defparam \PC_Reg_Display[8]~183 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X25_Y11_N20 +dffeas \REGS|regs[20][24] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[24]~441_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~7_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[20][24]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[20][24] .is_wysiwyg = "true"; +defparam \REGS|regs[20][24] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X25_Y8_N53 +dffeas \REGS|regs[16][24]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[24]~441_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~2_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[16][24]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[16][24]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[16][24]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: FF_X25_Y11_N50 +dffeas \REGS|regs[21][24] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[24]~441_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~16_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[21][24]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[21][24] .is_wysiwyg = "true"; +defparam \REGS|regs[21][24] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X25_Y11_N26 +dffeas \REGS|regs[17][24] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[24]~441_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~11_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[17][24]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[17][24] .is_wysiwyg = "true"; +defparam \REGS|regs[17][24] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X25_Y11_N48 +cyclonev_lcell_comb \PC_Reg_Display[8]~182 ( +// Equation(s): +// \PC_Reg_Display[8]~182_combout = ( \REGS|regs[21][24]~q & ( \REGS|regs[17][24]~q & ( ((!\HID_Register[2]~input_o & ((\REGS|regs[16][24]~DUPLICATE_q ))) # (\HID_Register[2]~input_o & (\REGS|regs[20][24]~q ))) # (\HID_Register[0]~input_o ) ) ) ) # ( +// !\REGS|regs[21][24]~q & ( \REGS|regs[17][24]~q & ( (!\HID_Register[0]~input_o & ((!\HID_Register[2]~input_o & ((\REGS|regs[16][24]~DUPLICATE_q ))) # (\HID_Register[2]~input_o & (\REGS|regs[20][24]~q )))) # (\HID_Register[0]~input_o & +// (((!\HID_Register[2]~input_o )))) ) ) ) # ( \REGS|regs[21][24]~q & ( !\REGS|regs[17][24]~q & ( (!\HID_Register[0]~input_o & ((!\HID_Register[2]~input_o & ((\REGS|regs[16][24]~DUPLICATE_q ))) # (\HID_Register[2]~input_o & (\REGS|regs[20][24]~q )))) # +// (\HID_Register[0]~input_o & (((\HID_Register[2]~input_o )))) ) ) ) # ( !\REGS|regs[21][24]~q & ( !\REGS|regs[17][24]~q & ( (!\HID_Register[0]~input_o & ((!\HID_Register[2]~input_o & ((\REGS|regs[16][24]~DUPLICATE_q ))) # (\HID_Register[2]~input_o & +// (\REGS|regs[20][24]~q )))) ) ) ) + + .dataa(!\REGS|regs[20][24]~q ), + .datab(!\REGS|regs[16][24]~DUPLICATE_q ), + .datac(!\HID_Register[0]~input_o ), + .datad(!\HID_Register[2]~input_o ), + .datae(!\REGS|regs[21][24]~q ), + .dataf(!\REGS|regs[17][24]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[8]~182_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[8]~182 .extended_lut = "off"; +defparam \PC_Reg_Display[8]~182 .lut_mask = 64'h3050305F3F503F5F; +defparam \PC_Reg_Display[8]~182 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X35_Y5_N6 +cyclonev_lcell_comb \PC_Reg_Display[8]~184 ( +// Equation(s): +// \PC_Reg_Display[8]~184_combout = ( \REGS|regs[22][24]~q & ( \HID_Register[0]~input_o & ( (!\HID_Register[2]~input_o & (\REGS|regs[19][24]~q )) # (\HID_Register[2]~input_o & ((\REGS|regs[23][24]~q ))) ) ) ) # ( !\REGS|regs[22][24]~q & ( +// \HID_Register[0]~input_o & ( (!\HID_Register[2]~input_o & (\REGS|regs[19][24]~q )) # (\HID_Register[2]~input_o & ((\REGS|regs[23][24]~q ))) ) ) ) # ( \REGS|regs[22][24]~q & ( !\HID_Register[0]~input_o & ( (\REGS|regs[18][24]~q ) # +// (\HID_Register[2]~input_o ) ) ) ) # ( !\REGS|regs[22][24]~q & ( !\HID_Register[0]~input_o & ( (!\HID_Register[2]~input_o & \REGS|regs[18][24]~q ) ) ) ) + + .dataa(!\REGS|regs[19][24]~q ), + .datab(!\HID_Register[2]~input_o ), + .datac(!\REGS|regs[18][24]~q ), + .datad(!\REGS|regs[23][24]~q ), + .datae(!\REGS|regs[22][24]~q ), + .dataf(!\HID_Register[0]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[8]~184_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[8]~184 .extended_lut = "off"; +defparam \PC_Reg_Display[8]~184 .lut_mask = 64'h0C0C3F3F44774477; +defparam \PC_Reg_Display[8]~184 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X22_Y7_N26 +dffeas \REGS|regs[21][8] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[8]~442_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~16_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[21][8]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[21][8] .is_wysiwyg = "true"; +defparam \REGS|regs[21][8] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X22_Y7_N24 +cyclonev_lcell_comb \PC_Reg_Display[8]~181 ( +// Equation(s): +// \PC_Reg_Display[8]~181_combout = ( \REGS|regs[21][8]~q & ( \HID_Register[2]~input_o & ( (\HID_Register[0]~input_o ) # (\REGS|regs[20][8]~q ) ) ) ) # ( !\REGS|regs[21][8]~q & ( \HID_Register[2]~input_o & ( (\REGS|regs[20][8]~q & +// !\HID_Register[0]~input_o ) ) ) ) # ( \REGS|regs[21][8]~q & ( !\HID_Register[2]~input_o & ( (!\HID_Register[0]~input_o & (\REGS|regs[16][8]~q )) # (\HID_Register[0]~input_o & ((\REGS|regs[17][8]~q ))) ) ) ) # ( !\REGS|regs[21][8]~q & ( +// !\HID_Register[2]~input_o & ( (!\HID_Register[0]~input_o & (\REGS|regs[16][8]~q )) # (\HID_Register[0]~input_o & ((\REGS|regs[17][8]~q ))) ) ) ) + + .dataa(!\REGS|regs[16][8]~q ), + .datab(!\REGS|regs[20][8]~q ), + .datac(!\REGS|regs[17][8]~q ), + .datad(!\HID_Register[0]~input_o ), + .datae(!\REGS|regs[21][8]~q ), + .dataf(!\HID_Register[2]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[8]~181_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[8]~181 .extended_lut = "off"; +defparam \PC_Reg_Display[8]~181 .lut_mask = 64'h550F550F330033FF; +defparam \PC_Reg_Display[8]~181 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X22_Y5_N12 +cyclonev_lcell_comb \PC_Reg_Display[8]~185 ( +// Equation(s): +// \PC_Reg_Display[8]~185_combout = ( \PC_Reg_Display[8]~184_combout & ( \PC_Reg_Display[8]~181_combout & ( (!\HID_Hi_Low[0]~input_o & (((!\HID_Register[1]~input_o )) # (\PC_Reg_Display[8]~183_combout ))) # (\HID_Hi_Low[0]~input_o & +// (((\PC_Reg_Display[8]~182_combout ) # (\HID_Register[1]~input_o )))) ) ) ) # ( !\PC_Reg_Display[8]~184_combout & ( \PC_Reg_Display[8]~181_combout & ( (!\HID_Hi_Low[0]~input_o & (((!\HID_Register[1]~input_o )) # (\PC_Reg_Display[8]~183_combout ))) # +// (\HID_Hi_Low[0]~input_o & (((!\HID_Register[1]~input_o & \PC_Reg_Display[8]~182_combout )))) ) ) ) # ( \PC_Reg_Display[8]~184_combout & ( !\PC_Reg_Display[8]~181_combout & ( (!\HID_Hi_Low[0]~input_o & (\PC_Reg_Display[8]~183_combout & +// (\HID_Register[1]~input_o ))) # (\HID_Hi_Low[0]~input_o & (((\PC_Reg_Display[8]~182_combout ) # (\HID_Register[1]~input_o )))) ) ) ) # ( !\PC_Reg_Display[8]~184_combout & ( !\PC_Reg_Display[8]~181_combout & ( (!\HID_Hi_Low[0]~input_o & +// (\PC_Reg_Display[8]~183_combout & (\HID_Register[1]~input_o ))) # (\HID_Hi_Low[0]~input_o & (((!\HID_Register[1]~input_o & \PC_Reg_Display[8]~182_combout )))) ) ) ) + + .dataa(!\PC_Reg_Display[8]~183_combout ), + .datab(!\HID_Hi_Low[0]~input_o ), + .datac(!\HID_Register[1]~input_o ), + .datad(!\PC_Reg_Display[8]~182_combout ), + .datae(!\PC_Reg_Display[8]~184_combout ), + .dataf(!\PC_Reg_Display[8]~181_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[8]~185_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[8]~185 .extended_lut = "off"; +defparam \PC_Reg_Display[8]~185 .lut_mask = 64'h04340737C4F4C7F7; +defparam \PC_Reg_Display[8]~185 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X28_Y13_N59 +dffeas \REGS|regs[3][8] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[8]~442_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~36_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[3][8]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[3][8] .is_wysiwyg = "true"; +defparam \REGS|regs[3][8] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X28_Y13_N56 +dffeas \REGS|regs[3][24] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[24]~441_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~36_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[3][24]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[3][24] .is_wysiwyg = "true"; +defparam \REGS|regs[3][24] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X28_Y13_N54 +cyclonev_lcell_comb \PC_Reg_Display[8]~177 ( +// Equation(s): +// \PC_Reg_Display[8]~177_combout = ( \REGS|regs[3][24]~q & ( \REGS|regs[2][24]~q & ( ((!\HID_Register[0]~input_o & (\REGS|regs[2][8]~q )) # (\HID_Register[0]~input_o & ((\REGS|regs[3][8]~q )))) # (\HID_Hi_Low[0]~input_o ) ) ) ) # ( !\REGS|regs[3][24]~q +// & ( \REGS|regs[2][24]~q & ( (!\HID_Register[0]~input_o & (((\REGS|regs[2][8]~q )) # (\HID_Hi_Low[0]~input_o ))) # (\HID_Register[0]~input_o & (!\HID_Hi_Low[0]~input_o & ((\REGS|regs[3][8]~q )))) ) ) ) # ( \REGS|regs[3][24]~q & ( !\REGS|regs[2][24]~q +// & ( (!\HID_Register[0]~input_o & (!\HID_Hi_Low[0]~input_o & (\REGS|regs[2][8]~q ))) # (\HID_Register[0]~input_o & (((\REGS|regs[3][8]~q )) # (\HID_Hi_Low[0]~input_o ))) ) ) ) # ( !\REGS|regs[3][24]~q & ( !\REGS|regs[2][24]~q & ( +// (!\HID_Hi_Low[0]~input_o & ((!\HID_Register[0]~input_o & (\REGS|regs[2][8]~q )) # (\HID_Register[0]~input_o & ((\REGS|regs[3][8]~q ))))) ) ) ) + + .dataa(!\HID_Register[0]~input_o ), + .datab(!\HID_Hi_Low[0]~input_o ), + .datac(!\REGS|regs[2][8]~q ), + .datad(!\REGS|regs[3][8]~q ), + .datae(!\REGS|regs[3][24]~q ), + .dataf(!\REGS|regs[2][24]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[8]~177_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[8]~177 .extended_lut = "off"; +defparam \PC_Reg_Display[8]~177 .lut_mask = 64'h084C195D2A6E3B7F; +defparam \PC_Reg_Display[8]~177 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X36_Y4_N22 +dffeas \REGS|regs[5][8]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[8]~442_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~30_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[5][8]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[5][8]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[5][8]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: FF_X33_Y8_N52 +dffeas \REGS|regs[4][8]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[8]~442_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~22_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[4][8]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[4][8]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[4][8]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X27_Y11_N36 +cyclonev_lcell_comb \PC_Reg_Display[8]~178 ( +// Equation(s): +// \PC_Reg_Display[8]~178_combout = ( \REGS|regs[5][24]~q & ( \REGS|regs[4][8]~DUPLICATE_q & ( (!\HID_Register[0]~input_o & (((!\HID_Hi_Low[0]~input_o )) # (\REGS|regs[4][24]~q ))) # (\HID_Register[0]~input_o & (((\HID_Hi_Low[0]~input_o ) # +// (\REGS|regs[5][8]~DUPLICATE_q )))) ) ) ) # ( !\REGS|regs[5][24]~q & ( \REGS|regs[4][8]~DUPLICATE_q & ( (!\HID_Register[0]~input_o & (((!\HID_Hi_Low[0]~input_o )) # (\REGS|regs[4][24]~q ))) # (\HID_Register[0]~input_o & (((\REGS|regs[5][8]~DUPLICATE_q +// & !\HID_Hi_Low[0]~input_o )))) ) ) ) # ( \REGS|regs[5][24]~q & ( !\REGS|regs[4][8]~DUPLICATE_q & ( (!\HID_Register[0]~input_o & (\REGS|regs[4][24]~q & ((\HID_Hi_Low[0]~input_o )))) # (\HID_Register[0]~input_o & (((\HID_Hi_Low[0]~input_o ) # +// (\REGS|regs[5][8]~DUPLICATE_q )))) ) ) ) # ( !\REGS|regs[5][24]~q & ( !\REGS|regs[4][8]~DUPLICATE_q & ( (!\HID_Register[0]~input_o & (\REGS|regs[4][24]~q & ((\HID_Hi_Low[0]~input_o )))) # (\HID_Register[0]~input_o & (((\REGS|regs[5][8]~DUPLICATE_q & +// !\HID_Hi_Low[0]~input_o )))) ) ) ) + + .dataa(!\REGS|regs[4][24]~q ), + .datab(!\REGS|regs[5][8]~DUPLICATE_q ), + .datac(!\HID_Register[0]~input_o ), + .datad(!\HID_Hi_Low[0]~input_o ), + .datae(!\REGS|regs[5][24]~q ), + .dataf(!\REGS|regs[4][8]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[8]~178_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[8]~178 .extended_lut = "off"; +defparam \PC_Reg_Display[8]~178 .lut_mask = 64'h0350035FF350F35F; +defparam \PC_Reg_Display[8]~178 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X31_Y13_N59 +dffeas \REGS|regs[1][24] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[24]~441_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~28_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[1][24]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[1][24] .is_wysiwyg = "true"; +defparam \REGS|regs[1][24] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X31_Y13_N18 +cyclonev_lcell_comb \PC_Reg_Display[8]~176 ( +// Equation(s): +// \PC_Reg_Display[8]~176_combout = (\HID_Register[0]~input_o & ((!\HID_Hi_Low[0]~input_o & (\REGS|regs[1][8]~q )) # (\HID_Hi_Low[0]~input_o & ((\REGS|regs[1][24]~q ))))) + + .dataa(!\HID_Hi_Low[0]~input_o ), + .datab(!\REGS|regs[1][8]~q ), + .datac(!\HID_Register[0]~input_o ), + .datad(!\REGS|regs[1][24]~q ), + .datae(gnd), + .dataf(gnd), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[8]~176_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[8]~176 .extended_lut = "off"; +defparam \PC_Reg_Display[8]~176 .lut_mask = 64'h0207020702070207; +defparam \PC_Reg_Display[8]~176 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X27_Y12_N35 +dffeas \REGS|regs[7][8] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[8]~442_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~38_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[7][8]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[7][8] .is_wysiwyg = "true"; +defparam \REGS|regs[7][8] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X32_Y6_N10 +dffeas \REGS|regs[6][24] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[24]~441_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~34_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[6][24]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[6][24] .is_wysiwyg = "true"; +defparam \REGS|regs[6][24] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y12_N32 +dffeas \REGS|regs[7][24] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[24]~441_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~38_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[7][24]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[7][24] .is_wysiwyg = "true"; +defparam \REGS|regs[7][24] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X27_Y12_N30 +cyclonev_lcell_comb \PC_Reg_Display[8]~179 ( +// Equation(s): +// \PC_Reg_Display[8]~179_combout = ( \REGS|regs[7][24]~q & ( \HID_Hi_Low[0]~input_o & ( (\REGS|regs[6][24]~q ) # (\HID_Register[0]~input_o ) ) ) ) # ( !\REGS|regs[7][24]~q & ( \HID_Hi_Low[0]~input_o & ( (!\HID_Register[0]~input_o & \REGS|regs[6][24]~q +// ) ) ) ) # ( \REGS|regs[7][24]~q & ( !\HID_Hi_Low[0]~input_o & ( (!\HID_Register[0]~input_o & ((\REGS|regs[6][8]~q ))) # (\HID_Register[0]~input_o & (\REGS|regs[7][8]~q )) ) ) ) # ( !\REGS|regs[7][24]~q & ( !\HID_Hi_Low[0]~input_o & ( +// (!\HID_Register[0]~input_o & ((\REGS|regs[6][8]~q ))) # (\HID_Register[0]~input_o & (\REGS|regs[7][8]~q )) ) ) ) + + .dataa(!\REGS|regs[7][8]~q ), + .datab(!\HID_Register[0]~input_o ), + .datac(!\REGS|regs[6][8]~q ), + .datad(!\REGS|regs[6][24]~q ), + .datae(!\REGS|regs[7][24]~q ), + .dataf(!\HID_Hi_Low[0]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[8]~179_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[8]~179 .extended_lut = "off"; +defparam \PC_Reg_Display[8]~179 .lut_mask = 64'h1D1D1D1D00CC33FF; +defparam \PC_Reg_Display[8]~179 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X30_Y13_N15 +cyclonev_lcell_comb \PC_Reg_Display[8]~180 ( +// Equation(s): +// \PC_Reg_Display[8]~180_combout = ( \HID_Register[2]~input_o & ( \HID_Register[1]~input_o & ( \PC_Reg_Display[8]~179_combout ) ) ) # ( !\HID_Register[2]~input_o & ( \HID_Register[1]~input_o & ( \PC_Reg_Display[8]~177_combout ) ) ) # ( +// \HID_Register[2]~input_o & ( !\HID_Register[1]~input_o & ( \PC_Reg_Display[8]~178_combout ) ) ) # ( !\HID_Register[2]~input_o & ( !\HID_Register[1]~input_o & ( \PC_Reg_Display[8]~176_combout ) ) ) + + .dataa(!\PC_Reg_Display[8]~177_combout ), + .datab(!\PC_Reg_Display[8]~178_combout ), + .datac(!\PC_Reg_Display[8]~176_combout ), + .datad(!\PC_Reg_Display[8]~179_combout ), + .datae(!\HID_Register[2]~input_o ), + .dataf(!\HID_Register[1]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[8]~180_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[8]~180 .extended_lut = "off"; +defparam \PC_Reg_Display[8]~180 .lut_mask = 64'h0F0F3333555500FF; +defparam \PC_Reg_Display[8]~180 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X35_Y11_N14 +dffeas \REGS|regs[15][8]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[8]~442_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~39_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[15][8]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[15][8]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[15][8]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y11_N20 +dffeas \REGS|regs[13][24]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[24]~441_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~31_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[13][24]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[13][24]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[13][24]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y6_N57 +cyclonev_lcell_comb \PC_Reg_Display[8]~189 ( +// Equation(s): +// \PC_Reg_Display[8]~189_combout = ( \REGS|regs[15][8]~DUPLICATE_q & ( \REGS|regs[13][24]~DUPLICATE_q & ( (!\HID_Hi_Low[0]~input_o & (((\HID_Register[1]~input_o ) # (\REGS|regs[13][8]~q )))) # (\HID_Hi_Low[0]~input_o & (((!\HID_Register[1]~input_o )) # +// (\REGS|regs[15][24]~q ))) ) ) ) # ( !\REGS|regs[15][8]~DUPLICATE_q & ( \REGS|regs[13][24]~DUPLICATE_q & ( (!\HID_Hi_Low[0]~input_o & (((\REGS|regs[13][8]~q & !\HID_Register[1]~input_o )))) # (\HID_Hi_Low[0]~input_o & (((!\HID_Register[1]~input_o )) # +// (\REGS|regs[15][24]~q ))) ) ) ) # ( \REGS|regs[15][8]~DUPLICATE_q & ( !\REGS|regs[13][24]~DUPLICATE_q & ( (!\HID_Hi_Low[0]~input_o & (((\HID_Register[1]~input_o ) # (\REGS|regs[13][8]~q )))) # (\HID_Hi_Low[0]~input_o & (\REGS|regs[15][24]~q & +// ((\HID_Register[1]~input_o )))) ) ) ) # ( !\REGS|regs[15][8]~DUPLICATE_q & ( !\REGS|regs[13][24]~DUPLICATE_q & ( (!\HID_Hi_Low[0]~input_o & (((\REGS|regs[13][8]~q & !\HID_Register[1]~input_o )))) # (\HID_Hi_Low[0]~input_o & (\REGS|regs[15][24]~q & +// ((\HID_Register[1]~input_o )))) ) ) ) + + .dataa(!\REGS|regs[15][24]~q ), + .datab(!\REGS|regs[13][8]~q ), + .datac(!\HID_Hi_Low[0]~input_o ), + .datad(!\HID_Register[1]~input_o ), + .datae(!\REGS|regs[15][8]~DUPLICATE_q ), + .dataf(!\REGS|regs[13][24]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[8]~189_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[8]~189 .extended_lut = "off"; +defparam \PC_Reg_Display[8]~189 .lut_mask = 64'h300530F53F053FF5; +defparam \PC_Reg_Display[8]~189 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X35_Y11_N1 +dffeas \REGS|regs[9][8] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[8]~442_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~29_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[9][8]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[9][8] .is_wysiwyg = "true"; +defparam \REGS|regs[9][8] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X27_Y8_N0 +cyclonev_lcell_comb \PC_Reg_Display[8]~188 ( +// Equation(s): +// \PC_Reg_Display[8]~188_combout = ( \REGS|regs[11][24]~q & ( \REGS|regs[11][8]~q & ( ((!\HID_Hi_Low[0]~input_o & ((\REGS|regs[9][8]~q ))) # (\HID_Hi_Low[0]~input_o & (\REGS|regs[9][24]~DUPLICATE_q ))) # (\HID_Register[1]~input_o ) ) ) ) # ( +// !\REGS|regs[11][24]~q & ( \REGS|regs[11][8]~q & ( (!\HID_Hi_Low[0]~input_o & (((\REGS|regs[9][8]~q ) # (\HID_Register[1]~input_o )))) # (\HID_Hi_Low[0]~input_o & (\REGS|regs[9][24]~DUPLICATE_q & (!\HID_Register[1]~input_o ))) ) ) ) # ( +// \REGS|regs[11][24]~q & ( !\REGS|regs[11][8]~q & ( (!\HID_Hi_Low[0]~input_o & (((!\HID_Register[1]~input_o & \REGS|regs[9][8]~q )))) # (\HID_Hi_Low[0]~input_o & (((\HID_Register[1]~input_o )) # (\REGS|regs[9][24]~DUPLICATE_q ))) ) ) ) # ( +// !\REGS|regs[11][24]~q & ( !\REGS|regs[11][8]~q & ( (!\HID_Register[1]~input_o & ((!\HID_Hi_Low[0]~input_o & ((\REGS|regs[9][8]~q ))) # (\HID_Hi_Low[0]~input_o & (\REGS|regs[9][24]~DUPLICATE_q )))) ) ) ) + + .dataa(!\HID_Hi_Low[0]~input_o ), + .datab(!\REGS|regs[9][24]~DUPLICATE_q ), + .datac(!\HID_Register[1]~input_o ), + .datad(!\REGS|regs[9][8]~q ), + .datae(!\REGS|regs[11][24]~q ), + .dataf(!\REGS|regs[11][8]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[8]~188_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[8]~188 .extended_lut = "off"; +defparam \PC_Reg_Display[8]~188 .lut_mask = 64'h10B015B51ABA1FBF; +defparam \PC_Reg_Display[8]~188 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X33_Y8_N34 +dffeas \REGS|regs[12][8] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[8]~442_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~26_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[12][8]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[12][8] .is_wysiwyg = "true"; +defparam \REGS|regs[12][8] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y6_N24 +cyclonev_lcell_comb \PC_Reg_Display[8]~187 ( +// Equation(s): +// \PC_Reg_Display[8]~187_combout = ( \REGS|regs[14][24]~q & ( \REGS|regs[14][8]~q & ( ((!\HID_Hi_Low[0]~input_o & ((\REGS|regs[12][8]~q ))) # (\HID_Hi_Low[0]~input_o & (\REGS|regs[12][24]~q ))) # (\HID_Register[1]~input_o ) ) ) ) # ( +// !\REGS|regs[14][24]~q & ( \REGS|regs[14][8]~q & ( (!\HID_Register[1]~input_o & ((!\HID_Hi_Low[0]~input_o & ((\REGS|regs[12][8]~q ))) # (\HID_Hi_Low[0]~input_o & (\REGS|regs[12][24]~q )))) # (\HID_Register[1]~input_o & (((!\HID_Hi_Low[0]~input_o )))) +// ) ) ) # ( \REGS|regs[14][24]~q & ( !\REGS|regs[14][8]~q & ( (!\HID_Register[1]~input_o & ((!\HID_Hi_Low[0]~input_o & ((\REGS|regs[12][8]~q ))) # (\HID_Hi_Low[0]~input_o & (\REGS|regs[12][24]~q )))) # (\HID_Register[1]~input_o & +// (((\HID_Hi_Low[0]~input_o )))) ) ) ) # ( !\REGS|regs[14][24]~q & ( !\REGS|regs[14][8]~q & ( (!\HID_Register[1]~input_o & ((!\HID_Hi_Low[0]~input_o & ((\REGS|regs[12][8]~q ))) # (\HID_Hi_Low[0]~input_o & (\REGS|regs[12][24]~q )))) ) ) ) + + .dataa(!\REGS|regs[12][24]~q ), + .datab(!\HID_Register[1]~input_o ), + .datac(!\REGS|regs[12][8]~q ), + .datad(!\HID_Hi_Low[0]~input_o ), + .datae(!\REGS|regs[14][24]~q ), + .dataf(!\REGS|regs[14][8]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[8]~187_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[8]~187 .extended_lut = "off"; +defparam \PC_Reg_Display[8]~187 .lut_mask = 64'h0C440C773F443F77; +defparam \PC_Reg_Display[8]~187 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X36_Y14_N55 +dffeas \REGS|regs[8][8]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[8][8]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~24_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[8][8]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[8][8]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[8][8]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X28_Y8_N3 +cyclonev_lcell_comb \PC_Reg_Display[8]~186 ( +// Equation(s): +// \PC_Reg_Display[8]~186_combout = ( \HID_Register[1]~input_o & ( \REGS|regs[10][8]~q & ( (!\HID_Hi_Low[0]~input_o ) # (\REGS|regs[10][24]~q ) ) ) ) # ( !\HID_Register[1]~input_o & ( \REGS|regs[10][8]~q & ( (!\HID_Hi_Low[0]~input_o & +// (\REGS|regs[8][8]~DUPLICATE_q )) # (\HID_Hi_Low[0]~input_o & ((\REGS|regs[8][24]~q ))) ) ) ) # ( \HID_Register[1]~input_o & ( !\REGS|regs[10][8]~q & ( (\HID_Hi_Low[0]~input_o & \REGS|regs[10][24]~q ) ) ) ) # ( !\HID_Register[1]~input_o & ( +// !\REGS|regs[10][8]~q & ( (!\HID_Hi_Low[0]~input_o & (\REGS|regs[8][8]~DUPLICATE_q )) # (\HID_Hi_Low[0]~input_o & ((\REGS|regs[8][24]~q ))) ) ) ) + + .dataa(!\REGS|regs[8][8]~DUPLICATE_q ), + .datab(!\HID_Hi_Low[0]~input_o ), + .datac(!\REGS|regs[8][24]~q ), + .datad(!\REGS|regs[10][24]~q ), + .datae(!\HID_Register[1]~input_o ), + .dataf(!\REGS|regs[10][8]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[8]~186_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[8]~186 .extended_lut = "off"; +defparam \PC_Reg_Display[8]~186 .lut_mask = 64'h474700334747CCFF; +defparam \PC_Reg_Display[8]~186 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X28_Y6_N0 +cyclonev_lcell_comb \PC_Reg_Display[8]~190 ( +// Equation(s): +// \PC_Reg_Display[8]~190_combout = ( \HID_Register[2]~input_o & ( \PC_Reg_Display[8]~186_combout & ( (!\HID_Register[0]~input_o & ((\PC_Reg_Display[8]~187_combout ))) # (\HID_Register[0]~input_o & (\PC_Reg_Display[8]~189_combout )) ) ) ) # ( +// !\HID_Register[2]~input_o & ( \PC_Reg_Display[8]~186_combout & ( (!\HID_Register[0]~input_o ) # (\PC_Reg_Display[8]~188_combout ) ) ) ) # ( \HID_Register[2]~input_o & ( !\PC_Reg_Display[8]~186_combout & ( (!\HID_Register[0]~input_o & +// ((\PC_Reg_Display[8]~187_combout ))) # (\HID_Register[0]~input_o & (\PC_Reg_Display[8]~189_combout )) ) ) ) # ( !\HID_Register[2]~input_o & ( !\PC_Reg_Display[8]~186_combout & ( (\PC_Reg_Display[8]~188_combout & \HID_Register[0]~input_o ) ) ) ) + + .dataa(!\PC_Reg_Display[8]~189_combout ), + .datab(!\PC_Reg_Display[8]~188_combout ), + .datac(!\PC_Reg_Display[8]~187_combout ), + .datad(!\HID_Register[0]~input_o ), + .datae(!\HID_Register[2]~input_o ), + .dataf(!\PC_Reg_Display[8]~186_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[8]~190_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[8]~190 .extended_lut = "off"; +defparam \PC_Reg_Display[8]~190 .lut_mask = 64'h00330F55FF330F55; +defparam \PC_Reg_Display[8]~190 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y11_N0 +cyclonev_lcell_comb \PC_Reg_Display[8]~194 ( +// Equation(s): +// \PC_Reg_Display[8]~194_combout = ( \REGS|regs[29][8]~q & ( \REGS|regs[31][24]~q & ( (!\HID_Hi_Low[0]~input_o & (((!\HID_Register[1]~input_o )) # (\REGS|regs[31][8]~q ))) # (\HID_Hi_Low[0]~input_o & (((\HID_Register[1]~input_o ) # +// (\REGS|regs[29][24]~q )))) ) ) ) # ( !\REGS|regs[29][8]~q & ( \REGS|regs[31][24]~q & ( (!\HID_Hi_Low[0]~input_o & (\REGS|regs[31][8]~q & ((\HID_Register[1]~input_o )))) # (\HID_Hi_Low[0]~input_o & (((\HID_Register[1]~input_o ) # (\REGS|regs[29][24]~q +// )))) ) ) ) # ( \REGS|regs[29][8]~q & ( !\REGS|regs[31][24]~q & ( (!\HID_Hi_Low[0]~input_o & (((!\HID_Register[1]~input_o )) # (\REGS|regs[31][8]~q ))) # (\HID_Hi_Low[0]~input_o & (((\REGS|regs[29][24]~q & !\HID_Register[1]~input_o )))) ) ) ) # ( +// !\REGS|regs[29][8]~q & ( !\REGS|regs[31][24]~q & ( (!\HID_Hi_Low[0]~input_o & (\REGS|regs[31][8]~q & ((\HID_Register[1]~input_o )))) # (\HID_Hi_Low[0]~input_o & (((\REGS|regs[29][24]~q & !\HID_Register[1]~input_o )))) ) ) ) + + .dataa(!\REGS|regs[31][8]~q ), + .datab(!\REGS|regs[29][24]~q ), + .datac(!\HID_Hi_Low[0]~input_o ), + .datad(!\HID_Register[1]~input_o ), + .datae(!\REGS|regs[29][8]~q ), + .dataf(!\REGS|regs[31][24]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[8]~194_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[8]~194 .extended_lut = "off"; +defparam \PC_Reg_Display[8]~194 .lut_mask = 64'h0350F350035FF35F; +defparam \PC_Reg_Display[8]~194 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X37_Y12_N28 +dffeas \REGS|regs[30][8] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[8]~442_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~10_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[30][8]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[30][8] .is_wysiwyg = "true"; +defparam \REGS|regs[30][8] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y11_N27 +cyclonev_lcell_comb \PC_Reg_Display[8]~192 ( +// Equation(s): +// \PC_Reg_Display[8]~192_combout = ( \REGS|regs[28][8]~q & ( \HID_Hi_Low[0]~input_o & ( (!\HID_Register[1]~input_o & (\REGS|regs[28][24]~q )) # (\HID_Register[1]~input_o & ((\REGS|regs[30][24]~q ))) ) ) ) # ( !\REGS|regs[28][8]~q & ( +// \HID_Hi_Low[0]~input_o & ( (!\HID_Register[1]~input_o & (\REGS|regs[28][24]~q )) # (\HID_Register[1]~input_o & ((\REGS|regs[30][24]~q ))) ) ) ) # ( \REGS|regs[28][8]~q & ( !\HID_Hi_Low[0]~input_o & ( (!\HID_Register[1]~input_o ) # +// (\REGS|regs[30][8]~q ) ) ) ) # ( !\REGS|regs[28][8]~q & ( !\HID_Hi_Low[0]~input_o & ( (\HID_Register[1]~input_o & \REGS|regs[30][8]~q ) ) ) ) + + .dataa(!\REGS|regs[28][24]~q ), + .datab(!\HID_Register[1]~input_o ), + .datac(!\REGS|regs[30][8]~q ), + .datad(!\REGS|regs[30][24]~q ), + .datae(!\REGS|regs[28][8]~q ), + .dataf(!\HID_Hi_Low[0]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[8]~192_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[8]~192 .extended_lut = "off"; +defparam \PC_Reg_Display[8]~192 .lut_mask = 64'h0303CFCF44774477; +defparam \PC_Reg_Display[8]~192 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X23_Y8_N23 +dffeas \REGS|regs[27][8]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[27][8]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~15_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[27][8]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[27][8]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[27][8]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: FF_X25_Y8_N56 +dffeas \REGS|regs[25][8] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[8]~442_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~13_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[25][8]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[25][8] .is_wysiwyg = "true"; +defparam \REGS|regs[25][8] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X25_Y8_N54 +cyclonev_lcell_comb \PC_Reg_Display[8]~193 ( +// Equation(s): +// \PC_Reg_Display[8]~193_combout = ( \REGS|regs[25][8]~q & ( \REGS|regs[25][24]~q & ( (!\HID_Register[1]~input_o ) # ((!\HID_Hi_Low[0]~input_o & (\REGS|regs[27][8]~DUPLICATE_q )) # (\HID_Hi_Low[0]~input_o & ((\REGS|regs[27][24]~q )))) ) ) ) # ( +// !\REGS|regs[25][8]~q & ( \REGS|regs[25][24]~q & ( (!\HID_Hi_Low[0]~input_o & (\REGS|regs[27][8]~DUPLICATE_q & ((\HID_Register[1]~input_o )))) # (\HID_Hi_Low[0]~input_o & (((!\HID_Register[1]~input_o ) # (\REGS|regs[27][24]~q )))) ) ) ) # ( +// \REGS|regs[25][8]~q & ( !\REGS|regs[25][24]~q & ( (!\HID_Hi_Low[0]~input_o & (((!\HID_Register[1]~input_o )) # (\REGS|regs[27][8]~DUPLICATE_q ))) # (\HID_Hi_Low[0]~input_o & (((\REGS|regs[27][24]~q & \HID_Register[1]~input_o )))) ) ) ) # ( +// !\REGS|regs[25][8]~q & ( !\REGS|regs[25][24]~q & ( (\HID_Register[1]~input_o & ((!\HID_Hi_Low[0]~input_o & (\REGS|regs[27][8]~DUPLICATE_q )) # (\HID_Hi_Low[0]~input_o & ((\REGS|regs[27][24]~q ))))) ) ) ) + + .dataa(!\HID_Hi_Low[0]~input_o ), + .datab(!\REGS|regs[27][8]~DUPLICATE_q ), + .datac(!\REGS|regs[27][24]~q ), + .datad(!\HID_Register[1]~input_o ), + .datae(!\REGS|regs[25][8]~q ), + .dataf(!\REGS|regs[25][24]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[8]~193_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[8]~193 .extended_lut = "off"; +defparam \PC_Reg_Display[8]~193 .lut_mask = 64'h0027AA275527FF27; +defparam \PC_Reg_Display[8]~193 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X25_Y8_N32 +dffeas \REGS|regs[24][8] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[8]~442_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~4_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[24][8]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[24][8] .is_wysiwyg = "true"; +defparam \REGS|regs[24][8] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X25_Y8_N12 +cyclonev_lcell_comb \PC_Reg_Display[8]~191 ( +// Equation(s): +// \PC_Reg_Display[8]~191_combout = ( \REGS|regs[26][24]~q & ( \REGS|regs[24][24]~q & ( ((!\HID_Register[1]~input_o & (\REGS|regs[24][8]~q )) # (\HID_Register[1]~input_o & ((\REGS|regs[26][8]~q )))) # (\HID_Hi_Low[0]~input_o ) ) ) ) # ( +// !\REGS|regs[26][24]~q & ( \REGS|regs[24][24]~q & ( (!\HID_Hi_Low[0]~input_o & ((!\HID_Register[1]~input_o & (\REGS|regs[24][8]~q )) # (\HID_Register[1]~input_o & ((\REGS|regs[26][8]~q ))))) # (\HID_Hi_Low[0]~input_o & (((!\HID_Register[1]~input_o +// )))) ) ) ) # ( \REGS|regs[26][24]~q & ( !\REGS|regs[24][24]~q & ( (!\HID_Hi_Low[0]~input_o & ((!\HID_Register[1]~input_o & (\REGS|regs[24][8]~q )) # (\HID_Register[1]~input_o & ((\REGS|regs[26][8]~q ))))) # (\HID_Hi_Low[0]~input_o & +// (((\HID_Register[1]~input_o )))) ) ) ) # ( !\REGS|regs[26][24]~q & ( !\REGS|regs[24][24]~q & ( (!\HID_Hi_Low[0]~input_o & ((!\HID_Register[1]~input_o & (\REGS|regs[24][8]~q )) # (\HID_Register[1]~input_o & ((\REGS|regs[26][8]~q ))))) ) ) ) + + .dataa(!\HID_Hi_Low[0]~input_o ), + .datab(!\REGS|regs[24][8]~q ), + .datac(!\HID_Register[1]~input_o ), + .datad(!\REGS|regs[26][8]~q ), + .datae(!\REGS|regs[26][24]~q ), + .dataf(!\REGS|regs[24][24]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[8]~191_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[8]~191 .extended_lut = "off"; +defparam \PC_Reg_Display[8]~191 .lut_mask = 64'h202A252F707A757F; +defparam \PC_Reg_Display[8]~191 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X25_Y8_N6 +cyclonev_lcell_comb \PC_Reg_Display[8]~195 ( +// Equation(s): +// \PC_Reg_Display[8]~195_combout = ( \HID_Register[2]~input_o & ( \PC_Reg_Display[8]~191_combout & ( (!\HID_Register[0]~input_o & ((\PC_Reg_Display[8]~192_combout ))) # (\HID_Register[0]~input_o & (\PC_Reg_Display[8]~194_combout )) ) ) ) # ( +// !\HID_Register[2]~input_o & ( \PC_Reg_Display[8]~191_combout & ( (!\HID_Register[0]~input_o ) # (\PC_Reg_Display[8]~193_combout ) ) ) ) # ( \HID_Register[2]~input_o & ( !\PC_Reg_Display[8]~191_combout & ( (!\HID_Register[0]~input_o & +// ((\PC_Reg_Display[8]~192_combout ))) # (\HID_Register[0]~input_o & (\PC_Reg_Display[8]~194_combout )) ) ) ) # ( !\HID_Register[2]~input_o & ( !\PC_Reg_Display[8]~191_combout & ( (\PC_Reg_Display[8]~193_combout & \HID_Register[0]~input_o ) ) ) ) + + .dataa(!\PC_Reg_Display[8]~194_combout ), + .datab(!\PC_Reg_Display[8]~192_combout ), + .datac(!\PC_Reg_Display[8]~193_combout ), + .datad(!\HID_Register[0]~input_o ), + .datae(!\HID_Register[2]~input_o ), + .dataf(!\PC_Reg_Display[8]~191_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[8]~195_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[8]~195 .extended_lut = "off"; +defparam \PC_Reg_Display[8]~195 .lut_mask = 64'h000F3355FF0F3355; +defparam \PC_Reg_Display[8]~195 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X25_Y8_N48 +cyclonev_lcell_comb \PC_Reg_Display[8]~196 ( +// Equation(s): +// \PC_Reg_Display[8]~196_combout = ( \HID_Register[3]~input_o & ( \PC_Reg_Display[8]~195_combout & ( (\HID_Register[4]~input_o ) # (\PC_Reg_Display[8]~190_combout ) ) ) ) # ( !\HID_Register[3]~input_o & ( \PC_Reg_Display[8]~195_combout & ( +// (!\HID_Register[4]~input_o & ((\PC_Reg_Display[8]~180_combout ))) # (\HID_Register[4]~input_o & (\PC_Reg_Display[8]~185_combout )) ) ) ) # ( \HID_Register[3]~input_o & ( !\PC_Reg_Display[8]~195_combout & ( (\PC_Reg_Display[8]~190_combout & +// !\HID_Register[4]~input_o ) ) ) ) # ( !\HID_Register[3]~input_o & ( !\PC_Reg_Display[8]~195_combout & ( (!\HID_Register[4]~input_o & ((\PC_Reg_Display[8]~180_combout ))) # (\HID_Register[4]~input_o & (\PC_Reg_Display[8]~185_combout )) ) ) ) + + .dataa(!\PC_Reg_Display[8]~185_combout ), + .datab(!\PC_Reg_Display[8]~180_combout ), + .datac(!\PC_Reg_Display[8]~190_combout ), + .datad(!\HID_Register[4]~input_o ), + .datae(!\HID_Register[3]~input_o ), + .dataf(!\PC_Reg_Display[8]~195_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[8]~196_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[8]~196 .extended_lut = "off"; +defparam \PC_Reg_Display[8]~196 .lut_mask = 64'h33550F0033550FFF; +defparam \PC_Reg_Display[8]~196 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X40_Y10_N3 +cyclonev_lcell_comb \PC_Reg_Display[8]~197 ( +// Equation(s): +// \PC_Reg_Display[8]~197_combout = ( \PC|pc [24] & ( (!\HID_PC[0]~input_o & (((\PC_Reg_Display[8]~196_combout )))) # (\HID_PC[0]~input_o & (((\PC|pc [8])) # (\HID_Hi_Low[0]~input_o ))) ) ) # ( !\PC|pc [24] & ( (!\HID_PC[0]~input_o & +// (((\PC_Reg_Display[8]~196_combout )))) # (\HID_PC[0]~input_o & (!\HID_Hi_Low[0]~input_o & ((\PC|pc [8])))) ) ) + + .dataa(!\HID_PC[0]~input_o ), + .datab(!\HID_Hi_Low[0]~input_o ), + .datac(!\PC_Reg_Display[8]~196_combout ), + .datad(!\PC|pc [8]), + .datae(gnd), + .dataf(!\PC|pc [24]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[8]~197_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[8]~197 .extended_lut = "off"; +defparam \PC_Reg_Display[8]~197 .lut_mask = 64'h0A4E0A4E1B5F1B5F; +defparam \PC_Reg_Display[8]~197 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X40_Y14_N54 +cyclonev_lcell_comb \display|digit2|Mux5~0 ( +// Equation(s): +// \display|digit2|Mux5~0_combout = ( \PC_Reg_Display[10]~241_combout & ( \PC_Reg_Display[8]~197_combout & ( (\PC_Reg_Display[11]~263_combout & !\PC_Reg_Display[9]~219_combout ) ) ) ) # ( !\PC_Reg_Display[10]~241_combout & ( +// \PC_Reg_Display[8]~197_combout & ( !\PC_Reg_Display[11]~263_combout $ (\PC_Reg_Display[9]~219_combout ) ) ) ) # ( \PC_Reg_Display[10]~241_combout & ( !\PC_Reg_Display[8]~197_combout & ( (!\PC_Reg_Display[11]~263_combout & +// !\PC_Reg_Display[9]~219_combout ) ) ) ) + + .dataa(gnd), + .datab(!\PC_Reg_Display[11]~263_combout ), + .datac(!\PC_Reg_Display[9]~219_combout ), + .datad(gnd), + .datae(!\PC_Reg_Display[10]~241_combout ), + .dataf(!\PC_Reg_Display[8]~197_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\display|digit2|Mux5~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \display|digit2|Mux5~0 .extended_lut = "off"; +defparam \display|digit2|Mux5~0 .lut_mask = 64'h0000C0C0C3C33030; +defparam \display|digit2|Mux5~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X53_Y11_N24 +cyclonev_lcell_comb \display|digit2|Mux4~0 ( +// Equation(s): +// \display|digit2|Mux4~0_combout = ( \PC_Reg_Display[8]~197_combout & ( \PC_Reg_Display[11]~263_combout & ( \PC_Reg_Display[9]~219_combout ) ) ) # ( !\PC_Reg_Display[8]~197_combout & ( \PC_Reg_Display[11]~263_combout & ( +// \PC_Reg_Display[10]~241_combout ) ) ) # ( \PC_Reg_Display[8]~197_combout & ( !\PC_Reg_Display[11]~263_combout & ( (!\PC_Reg_Display[9]~219_combout & \PC_Reg_Display[10]~241_combout ) ) ) ) # ( !\PC_Reg_Display[8]~197_combout & ( +// !\PC_Reg_Display[11]~263_combout & ( (\PC_Reg_Display[9]~219_combout & \PC_Reg_Display[10]~241_combout ) ) ) ) + + .dataa(!\PC_Reg_Display[9]~219_combout ), + .datab(gnd), + .datac(!\PC_Reg_Display[10]~241_combout ), + .datad(gnd), + .datae(!\PC_Reg_Display[8]~197_combout ), + .dataf(!\PC_Reg_Display[11]~263_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\display|digit2|Mux4~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \display|digit2|Mux4~0 .extended_lut = "off"; +defparam \display|digit2|Mux4~0 .lut_mask = 64'h05050A0A0F0F5555; +defparam \display|digit2|Mux4~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X53_Y11_N57 +cyclonev_lcell_comb \display|digit2|Mux3~0 ( +// Equation(s): +// \display|digit2|Mux3~0_combout = ( \PC_Reg_Display[8]~197_combout & ( \PC_Reg_Display[11]~263_combout & ( (\PC_Reg_Display[10]~241_combout & \PC_Reg_Display[9]~219_combout ) ) ) ) # ( !\PC_Reg_Display[8]~197_combout & ( +// \PC_Reg_Display[11]~263_combout & ( \PC_Reg_Display[10]~241_combout ) ) ) # ( !\PC_Reg_Display[8]~197_combout & ( !\PC_Reg_Display[11]~263_combout & ( (!\PC_Reg_Display[10]~241_combout & \PC_Reg_Display[9]~219_combout ) ) ) ) + + .dataa(!\PC_Reg_Display[10]~241_combout ), + .datab(gnd), + .datac(gnd), + .datad(!\PC_Reg_Display[9]~219_combout ), + .datae(!\PC_Reg_Display[8]~197_combout ), + .dataf(!\PC_Reg_Display[11]~263_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\display|digit2|Mux3~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \display|digit2|Mux3~0 .extended_lut = "off"; +defparam \display|digit2|Mux3~0 .lut_mask = 64'h00AA000055550055; +defparam \display|digit2|Mux3~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X41_Y11_N6 +cyclonev_lcell_comb \display|digit2|Mux2~0 ( +// Equation(s): +// \display|digit2|Mux2~0_combout = ( \PC_Reg_Display[10]~241_combout & ( (!\PC_Reg_Display[8]~197_combout & (!\PC_Reg_Display[9]~219_combout & !\PC_Reg_Display[11]~263_combout )) # (\PC_Reg_Display[8]~197_combout & (\PC_Reg_Display[9]~219_combout )) ) +// ) # ( !\PC_Reg_Display[10]~241_combout & ( (!\PC_Reg_Display[8]~197_combout & (\PC_Reg_Display[9]~219_combout & \PC_Reg_Display[11]~263_combout )) # (\PC_Reg_Display[8]~197_combout & (!\PC_Reg_Display[9]~219_combout )) ) ) + + .dataa(!\PC_Reg_Display[8]~197_combout ), + .datab(!\PC_Reg_Display[9]~219_combout ), + .datac(!\PC_Reg_Display[11]~263_combout ), + .datad(gnd), + .datae(gnd), + .dataf(!\PC_Reg_Display[10]~241_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\display|digit2|Mux2~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \display|digit2|Mux2~0 .extended_lut = "off"; +defparam \display|digit2|Mux2~0 .lut_mask = 64'h4646464691919191; +defparam \display|digit2|Mux2~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X41_Y11_N9 +cyclonev_lcell_comb \display|digit2|Mux1~0 ( +// Equation(s): +// \display|digit2|Mux1~0_combout = ( \PC_Reg_Display[10]~241_combout & ( (!\PC_Reg_Display[11]~263_combout & ((!\PC_Reg_Display[9]~219_combout ) # (\PC_Reg_Display[8]~197_combout ))) ) ) # ( !\PC_Reg_Display[10]~241_combout & ( +// (\PC_Reg_Display[8]~197_combout & ((!\PC_Reg_Display[9]~219_combout ) # (!\PC_Reg_Display[11]~263_combout ))) ) ) + + .dataa(!\PC_Reg_Display[8]~197_combout ), + .datab(!\PC_Reg_Display[9]~219_combout ), + .datac(gnd), + .datad(!\PC_Reg_Display[11]~263_combout ), + .datae(gnd), + .dataf(!\PC_Reg_Display[10]~241_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\display|digit2|Mux1~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \display|digit2|Mux1~0 .extended_lut = "off"; +defparam \display|digit2|Mux1~0 .lut_mask = 64'h55445544DD00DD00; +defparam \display|digit2|Mux1~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X53_Y11_N48 +cyclonev_lcell_comb \display|digit2|Mux0~0 ( +// Equation(s): +// \display|digit2|Mux0~0_combout = ( \PC_Reg_Display[10]~241_combout & ( (\PC_Reg_Display[8]~197_combout & (!\PC_Reg_Display[9]~219_combout $ (!\PC_Reg_Display[11]~263_combout ))) ) ) # ( !\PC_Reg_Display[10]~241_combout & ( +// (!\PC_Reg_Display[11]~263_combout & ((\PC_Reg_Display[8]~197_combout ) # (\PC_Reg_Display[9]~219_combout ))) ) ) + + .dataa(!\PC_Reg_Display[9]~219_combout ), + .datab(!\PC_Reg_Display[11]~263_combout ), + .datac(!\PC_Reg_Display[8]~197_combout ), + .datad(gnd), + .datae(!\PC_Reg_Display[10]~241_combout ), + .dataf(gnd), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\display|digit2|Mux0~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \display|digit2|Mux0~0 .extended_lut = "off"; +defparam \display|digit2|Mux0~0 .lut_mask = 64'h4C4C06064C4C0606; +defparam \display|digit2|Mux0~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X45_Y15_N36 +cyclonev_lcell_comb \display|digit2|WideOr0~0 ( +// Equation(s): +// \display|digit2|WideOr0~0_combout = ( \PC_Reg_Display[8]~197_combout & ( (!\PC_Reg_Display[9]~219_combout $ (!\PC_Reg_Display[10]~241_combout )) # (\PC_Reg_Display[11]~263_combout ) ) ) # ( !\PC_Reg_Display[8]~197_combout & ( +// (!\PC_Reg_Display[10]~241_combout $ (!\PC_Reg_Display[11]~263_combout )) # (\PC_Reg_Display[9]~219_combout ) ) ) + + .dataa(!\PC_Reg_Display[9]~219_combout ), + .datab(!\PC_Reg_Display[10]~241_combout ), + .datac(gnd), + .datad(!\PC_Reg_Display[11]~263_combout ), + .datae(gnd), + .dataf(!\PC_Reg_Display[8]~197_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\display|digit2|WideOr0~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \display|digit2|WideOr0~0 .extended_lut = "off"; +defparam \display|digit2|WideOr0~0 .lut_mask = 64'h77DD77DD66FF66FF; +defparam \display|digit2|WideOr0~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X31_Y9_N4 +dffeas \REGS|regs[8][30] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[30]~453_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~24_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[8][30]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[8][30] .is_wysiwyg = "true"; +defparam \REGS|regs[8][30] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X30_Y9_N5 +dffeas \REGS|regs[10][14] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[14]~454_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~33_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[10][14]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[10][14] .is_wysiwyg = "true"; +defparam \REGS|regs[10][14] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X30_Y9_N45 +cyclonev_lcell_comb \PC_Reg_Display[14]~318 ( +// Equation(s): +// \PC_Reg_Display[14]~318_combout = ( \REGS|regs[10][14]~q & ( \REGS|regs[8][14]~DUPLICATE_q & ( (!\HID_Hi_Low[0]~input_o ) # ((!\HID_Register[1]~input_o & ((\REGS|regs[8][30]~q ))) # (\HID_Register[1]~input_o & (\REGS|regs[10][30]~q ))) ) ) ) # ( +// !\REGS|regs[10][14]~q & ( \REGS|regs[8][14]~DUPLICATE_q & ( (!\HID_Hi_Low[0]~input_o & (((!\HID_Register[1]~input_o )))) # (\HID_Hi_Low[0]~input_o & ((!\HID_Register[1]~input_o & ((\REGS|regs[8][30]~q ))) # (\HID_Register[1]~input_o & +// (\REGS|regs[10][30]~q )))) ) ) ) # ( \REGS|regs[10][14]~q & ( !\REGS|regs[8][14]~DUPLICATE_q & ( (!\HID_Hi_Low[0]~input_o & (((\HID_Register[1]~input_o )))) # (\HID_Hi_Low[0]~input_o & ((!\HID_Register[1]~input_o & ((\REGS|regs[8][30]~q ))) # +// (\HID_Register[1]~input_o & (\REGS|regs[10][30]~q )))) ) ) ) # ( !\REGS|regs[10][14]~q & ( !\REGS|regs[8][14]~DUPLICATE_q & ( (\HID_Hi_Low[0]~input_o & ((!\HID_Register[1]~input_o & ((\REGS|regs[8][30]~q ))) # (\HID_Register[1]~input_o & +// (\REGS|regs[10][30]~q )))) ) ) ) + + .dataa(!\REGS|regs[10][30]~q ), + .datab(!\REGS|regs[8][30]~q ), + .datac(!\HID_Hi_Low[0]~input_o ), + .datad(!\HID_Register[1]~input_o ), + .datae(!\REGS|regs[10][14]~q ), + .dataf(!\REGS|regs[8][14]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[14]~318_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[14]~318 .extended_lut = "off"; +defparam \PC_Reg_Display[14]~318 .lut_mask = 64'h030503F5F305F3F5; +defparam \PC_Reg_Display[14]~318 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X25_Y9_N39 +cyclonev_lcell_comb \PC_Reg_Display[14]~320 ( +// Equation(s): +// \PC_Reg_Display[14]~320_combout = ( \REGS|regs[9][30]~DUPLICATE_q & ( \REGS|regs[11][14]~q & ( (!\HID_Register[1]~input_o & (((\HID_Hi_Low[0]~input_o ) # (\REGS|regs[9][14]~q )))) # (\HID_Register[1]~input_o & (((!\HID_Hi_Low[0]~input_o )) # +// (\REGS|regs[11][30]~q ))) ) ) ) # ( !\REGS|regs[9][30]~DUPLICATE_q & ( \REGS|regs[11][14]~q & ( (!\HID_Register[1]~input_o & (((\REGS|regs[9][14]~q & !\HID_Hi_Low[0]~input_o )))) # (\HID_Register[1]~input_o & (((!\HID_Hi_Low[0]~input_o )) # +// (\REGS|regs[11][30]~q ))) ) ) ) # ( \REGS|regs[9][30]~DUPLICATE_q & ( !\REGS|regs[11][14]~q & ( (!\HID_Register[1]~input_o & (((\HID_Hi_Low[0]~input_o ) # (\REGS|regs[9][14]~q )))) # (\HID_Register[1]~input_o & (\REGS|regs[11][30]~q & +// ((\HID_Hi_Low[0]~input_o )))) ) ) ) # ( !\REGS|regs[9][30]~DUPLICATE_q & ( !\REGS|regs[11][14]~q & ( (!\HID_Register[1]~input_o & (((\REGS|regs[9][14]~q & !\HID_Hi_Low[0]~input_o )))) # (\HID_Register[1]~input_o & (\REGS|regs[11][30]~q & +// ((\HID_Hi_Low[0]~input_o )))) ) ) ) + + .dataa(!\HID_Register[1]~input_o ), + .datab(!\REGS|regs[11][30]~q ), + .datac(!\REGS|regs[9][14]~q ), + .datad(!\HID_Hi_Low[0]~input_o ), + .datae(!\REGS|regs[9][30]~DUPLICATE_q ), + .dataf(!\REGS|regs[11][14]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[14]~320_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[14]~320 .extended_lut = "off"; +defparam \PC_Reg_Display[14]~320 .lut_mask = 64'h0A110ABB5F115FBB; +defparam \PC_Reg_Display[14]~320 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X27_Y8_N48 +cyclonev_lcell_comb \PC_Reg_Display[14]~321 ( +// Equation(s): +// \PC_Reg_Display[14]~321_combout = ( \REGS|regs[15][14]~q & ( \REGS|regs[15][30]~q & ( ((!\HID_Hi_Low[0]~input_o & ((\REGS|regs[13][14]~q ))) # (\HID_Hi_Low[0]~input_o & (\REGS|regs[13][30]~q ))) # (\HID_Register[1]~input_o ) ) ) ) # ( +// !\REGS|regs[15][14]~q & ( \REGS|regs[15][30]~q & ( (!\HID_Register[1]~input_o & ((!\HID_Hi_Low[0]~input_o & ((\REGS|regs[13][14]~q ))) # (\HID_Hi_Low[0]~input_o & (\REGS|regs[13][30]~q )))) # (\HID_Register[1]~input_o & (((\HID_Hi_Low[0]~input_o +// )))) ) ) ) # ( \REGS|regs[15][14]~q & ( !\REGS|regs[15][30]~q & ( (!\HID_Register[1]~input_o & ((!\HID_Hi_Low[0]~input_o & ((\REGS|regs[13][14]~q ))) # (\HID_Hi_Low[0]~input_o & (\REGS|regs[13][30]~q )))) # (\HID_Register[1]~input_o & +// (((!\HID_Hi_Low[0]~input_o )))) ) ) ) # ( !\REGS|regs[15][14]~q & ( !\REGS|regs[15][30]~q & ( (!\HID_Register[1]~input_o & ((!\HID_Hi_Low[0]~input_o & ((\REGS|regs[13][14]~q ))) # (\HID_Hi_Low[0]~input_o & (\REGS|regs[13][30]~q )))) ) ) ) + + .dataa(!\HID_Register[1]~input_o ), + .datab(!\REGS|regs[13][30]~q ), + .datac(!\HID_Hi_Low[0]~input_o ), + .datad(!\REGS|regs[13][14]~q ), + .datae(!\REGS|regs[15][14]~q ), + .dataf(!\REGS|regs[15][30]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[14]~321_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[14]~321 .extended_lut = "off"; +defparam \PC_Reg_Display[14]~321 .lut_mask = 64'h02A252F207A757F7; +defparam \PC_Reg_Display[14]~321 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X33_Y6_N52 +dffeas \REGS|regs[12][14]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[14]~454_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~26_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[12][14]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[12][14]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[12][14]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: FF_X25_Y9_N7 +dffeas \REGS|regs[12][30] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[30]~453_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~26_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[12][30]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[12][30] .is_wysiwyg = "true"; +defparam \REGS|regs[12][30] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X27_Y10_N21 +cyclonev_lcell_comb \PC_Reg_Display[14]~319 ( +// Equation(s): +// \PC_Reg_Display[14]~319_combout = ( \REGS|regs[14][14]~q & ( \HID_Hi_Low[0]~input_o & ( (!\HID_Register[1]~input_o & (\REGS|regs[12][30]~q )) # (\HID_Register[1]~input_o & ((\REGS|regs[14][30]~q ))) ) ) ) # ( !\REGS|regs[14][14]~q & ( +// \HID_Hi_Low[0]~input_o & ( (!\HID_Register[1]~input_o & (\REGS|regs[12][30]~q )) # (\HID_Register[1]~input_o & ((\REGS|regs[14][30]~q ))) ) ) ) # ( \REGS|regs[14][14]~q & ( !\HID_Hi_Low[0]~input_o & ( (\HID_Register[1]~input_o ) # +// (\REGS|regs[12][14]~DUPLICATE_q ) ) ) ) # ( !\REGS|regs[14][14]~q & ( !\HID_Hi_Low[0]~input_o & ( (\REGS|regs[12][14]~DUPLICATE_q & !\HID_Register[1]~input_o ) ) ) ) + + .dataa(!\REGS|regs[12][14]~DUPLICATE_q ), + .datab(!\REGS|regs[12][30]~q ), + .datac(!\REGS|regs[14][30]~q ), + .datad(!\HID_Register[1]~input_o ), + .datae(!\REGS|regs[14][14]~q ), + .dataf(!\HID_Hi_Low[0]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[14]~319_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[14]~319 .extended_lut = "off"; +defparam \PC_Reg_Display[14]~319 .lut_mask = 64'h550055FF330F330F; +defparam \PC_Reg_Display[14]~319 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X23_Y9_N57 +cyclonev_lcell_comb \PC_Reg_Display[14]~322 ( +// Equation(s): +// \PC_Reg_Display[14]~322_combout = ( \HID_Register[0]~input_o & ( \HID_Register[2]~input_o & ( \PC_Reg_Display[14]~321_combout ) ) ) # ( !\HID_Register[0]~input_o & ( \HID_Register[2]~input_o & ( \PC_Reg_Display[14]~319_combout ) ) ) # ( +// \HID_Register[0]~input_o & ( !\HID_Register[2]~input_o & ( \PC_Reg_Display[14]~320_combout ) ) ) # ( !\HID_Register[0]~input_o & ( !\HID_Register[2]~input_o & ( \PC_Reg_Display[14]~318_combout ) ) ) + + .dataa(!\PC_Reg_Display[14]~318_combout ), + .datab(!\PC_Reg_Display[14]~320_combout ), + .datac(!\PC_Reg_Display[14]~321_combout ), + .datad(!\PC_Reg_Display[14]~319_combout ), + .datae(!\HID_Register[0]~input_o ), + .dataf(!\HID_Register[2]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[14]~322_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[14]~322 .extended_lut = "off"; +defparam \PC_Reg_Display[14]~322 .lut_mask = 64'h5555333300FF0F0F; +defparam \PC_Reg_Display[14]~322 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X27_Y10_N53 +dffeas \REGS|regs[24][14] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[14]~454_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~4_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[24][14]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[24][14] .is_wysiwyg = "true"; +defparam \REGS|regs[24][14] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X27_Y10_N51 +cyclonev_lcell_comb \PC_Reg_Display[14]~323 ( +// Equation(s): +// \PC_Reg_Display[14]~323_combout = ( \REGS|regs[24][14]~q & ( \HID_Register[1]~input_o & ( (!\HID_Hi_Low[0]~input_o & (\REGS|regs[26][14]~q )) # (\HID_Hi_Low[0]~input_o & ((\REGS|regs[26][30]~q ))) ) ) ) # ( !\REGS|regs[24][14]~q & ( +// \HID_Register[1]~input_o & ( (!\HID_Hi_Low[0]~input_o & (\REGS|regs[26][14]~q )) # (\HID_Hi_Low[0]~input_o & ((\REGS|regs[26][30]~q ))) ) ) ) # ( \REGS|regs[24][14]~q & ( !\HID_Register[1]~input_o & ( (!\HID_Hi_Low[0]~input_o ) # +// (\REGS|regs[24][30]~q ) ) ) ) # ( !\REGS|regs[24][14]~q & ( !\HID_Register[1]~input_o & ( (\REGS|regs[24][30]~q & \HID_Hi_Low[0]~input_o ) ) ) ) + + .dataa(!\REGS|regs[26][14]~q ), + .datab(!\REGS|regs[24][30]~q ), + .datac(!\HID_Hi_Low[0]~input_o ), + .datad(!\REGS|regs[26][30]~q ), + .datae(!\REGS|regs[24][14]~q ), + .dataf(!\HID_Register[1]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[14]~323_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[14]~323 .extended_lut = "off"; +defparam \PC_Reg_Display[14]~323 .lut_mask = 64'h0303F3F3505F505F; +defparam \PC_Reg_Display[14]~323 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X35_Y14_N37 +dffeas \REGS|regs[30][14]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[30][14]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~10_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[30][14]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[30][14]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[30][14]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X23_Y10_N45 +cyclonev_lcell_comb \PC_Reg_Display[14]~324 ( +// Equation(s): +// \PC_Reg_Display[14]~324_combout = ( \REGS|regs[28][30]~q & ( \HID_Register[1]~input_o & ( (!\HID_Hi_Low[0]~input_o & ((\REGS|regs[30][14]~DUPLICATE_q ))) # (\HID_Hi_Low[0]~input_o & (\REGS|regs[30][30]~q )) ) ) ) # ( !\REGS|regs[28][30]~q & ( +// \HID_Register[1]~input_o & ( (!\HID_Hi_Low[0]~input_o & ((\REGS|regs[30][14]~DUPLICATE_q ))) # (\HID_Hi_Low[0]~input_o & (\REGS|regs[30][30]~q )) ) ) ) # ( \REGS|regs[28][30]~q & ( !\HID_Register[1]~input_o & ( (\REGS|regs[28][14]~q ) # +// (\HID_Hi_Low[0]~input_o ) ) ) ) # ( !\REGS|regs[28][30]~q & ( !\HID_Register[1]~input_o & ( (!\HID_Hi_Low[0]~input_o & \REGS|regs[28][14]~q ) ) ) ) + + .dataa(!\HID_Hi_Low[0]~input_o ), + .datab(!\REGS|regs[28][14]~q ), + .datac(!\REGS|regs[30][30]~q ), + .datad(!\REGS|regs[30][14]~DUPLICATE_q ), + .datae(!\REGS|regs[28][30]~q ), + .dataf(!\HID_Register[1]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[14]~324_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[14]~324 .extended_lut = "off"; +defparam \PC_Reg_Display[14]~324 .lut_mask = 64'h2222777705AF05AF; +defparam \PC_Reg_Display[14]~324 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X30_Y10_N46 +dffeas \REGS|regs[27][14]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[14]~454_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~15_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[27][14]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[27][14]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[27][14]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y10_N32 +dffeas \REGS|regs[25][14] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[14]~454_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~13_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[25][14]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[25][14] .is_wysiwyg = "true"; +defparam \REGS|regs[25][14] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X27_Y10_N30 +cyclonev_lcell_comb \PC_Reg_Display[14]~325 ( +// Equation(s): +// \PC_Reg_Display[14]~325_combout = ( \REGS|regs[25][14]~q & ( \HID_Register[1]~input_o & ( (!\HID_Hi_Low[0]~input_o & ((\REGS|regs[27][14]~DUPLICATE_q ))) # (\HID_Hi_Low[0]~input_o & (\REGS|regs[27][30]~q )) ) ) ) # ( !\REGS|regs[25][14]~q & ( +// \HID_Register[1]~input_o & ( (!\HID_Hi_Low[0]~input_o & ((\REGS|regs[27][14]~DUPLICATE_q ))) # (\HID_Hi_Low[0]~input_o & (\REGS|regs[27][30]~q )) ) ) ) # ( \REGS|regs[25][14]~q & ( !\HID_Register[1]~input_o & ( (!\HID_Hi_Low[0]~input_o ) # +// (\REGS|regs[25][30]~q ) ) ) ) # ( !\REGS|regs[25][14]~q & ( !\HID_Register[1]~input_o & ( (\REGS|regs[25][30]~q & \HID_Hi_Low[0]~input_o ) ) ) ) + + .dataa(!\REGS|regs[27][30]~q ), + .datab(!\REGS|regs[25][30]~q ), + .datac(!\HID_Hi_Low[0]~input_o ), + .datad(!\REGS|regs[27][14]~DUPLICATE_q ), + .datae(!\REGS|regs[25][14]~q ), + .dataf(!\HID_Register[1]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[14]~325_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[14]~325 .extended_lut = "off"; +defparam \PC_Reg_Display[14]~325 .lut_mask = 64'h0303F3F305F505F5; +defparam \PC_Reg_Display[14]~325 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X31_Y9_N13 +dffeas \REGS|regs[29][30]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[30]~453_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~17_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[29][30]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[29][30]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[29][30]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: FF_X32_Y12_N34 +dffeas \REGS|regs[31][14]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[14]~454_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~19_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[31][14]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[31][14]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[31][14]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y9_N43 +dffeas \REGS|regs[31][30]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[30]~453_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~19_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[31][30]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[31][30]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[31][30]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X28_Y11_N42 +cyclonev_lcell_comb \PC_Reg_Display[14]~326 ( +// Equation(s): +// \PC_Reg_Display[14]~326_combout = ( \REGS|regs[29][14]~q & ( \HID_Hi_Low[0]~input_o & ( (!\HID_Register[1]~input_o & (\REGS|regs[29][30]~DUPLICATE_q )) # (\HID_Register[1]~input_o & ((\REGS|regs[31][30]~DUPLICATE_q ))) ) ) ) # ( !\REGS|regs[29][14]~q +// & ( \HID_Hi_Low[0]~input_o & ( (!\HID_Register[1]~input_o & (\REGS|regs[29][30]~DUPLICATE_q )) # (\HID_Register[1]~input_o & ((\REGS|regs[31][30]~DUPLICATE_q ))) ) ) ) # ( \REGS|regs[29][14]~q & ( !\HID_Hi_Low[0]~input_o & ( +// (!\HID_Register[1]~input_o ) # (\REGS|regs[31][14]~DUPLICATE_q ) ) ) ) # ( !\REGS|regs[29][14]~q & ( !\HID_Hi_Low[0]~input_o & ( (\HID_Register[1]~input_o & \REGS|regs[31][14]~DUPLICATE_q ) ) ) ) + + .dataa(!\REGS|regs[29][30]~DUPLICATE_q ), + .datab(!\HID_Register[1]~input_o ), + .datac(!\REGS|regs[31][14]~DUPLICATE_q ), + .datad(!\REGS|regs[31][30]~DUPLICATE_q ), + .datae(!\REGS|regs[29][14]~q ), + .dataf(!\HID_Hi_Low[0]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[14]~326_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[14]~326 .extended_lut = "off"; +defparam \PC_Reg_Display[14]~326 .lut_mask = 64'h0303CFCF44774477; +defparam \PC_Reg_Display[14]~326 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X23_Y10_N48 +cyclonev_lcell_comb \PC_Reg_Display[14]~327 ( +// Equation(s): +// \PC_Reg_Display[14]~327_combout = ( \HID_Register[2]~input_o & ( \PC_Reg_Display[14]~326_combout & ( (\HID_Register[0]~input_o ) # (\PC_Reg_Display[14]~324_combout ) ) ) ) # ( !\HID_Register[2]~input_o & ( \PC_Reg_Display[14]~326_combout & ( +// (!\HID_Register[0]~input_o & (\PC_Reg_Display[14]~323_combout )) # (\HID_Register[0]~input_o & ((\PC_Reg_Display[14]~325_combout ))) ) ) ) # ( \HID_Register[2]~input_o & ( !\PC_Reg_Display[14]~326_combout & ( (\PC_Reg_Display[14]~324_combout & +// !\HID_Register[0]~input_o ) ) ) ) # ( !\HID_Register[2]~input_o & ( !\PC_Reg_Display[14]~326_combout & ( (!\HID_Register[0]~input_o & (\PC_Reg_Display[14]~323_combout )) # (\HID_Register[0]~input_o & ((\PC_Reg_Display[14]~325_combout ))) ) ) ) + + .dataa(!\PC_Reg_Display[14]~323_combout ), + .datab(!\PC_Reg_Display[14]~324_combout ), + .datac(!\PC_Reg_Display[14]~325_combout ), + .datad(!\HID_Register[0]~input_o ), + .datae(!\HID_Register[2]~input_o ), + .dataf(!\PC_Reg_Display[14]~326_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[14]~327_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[14]~327 .extended_lut = "off"; +defparam \PC_Reg_Display[14]~327 .lut_mask = 64'h550F3300550F33FF; +defparam \PC_Reg_Display[14]~327 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X32_Y12_N38 +dffeas \REGS|regs[23][14]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[14]~454_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~18_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[23][14]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[23][14]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[23][14]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X35_Y14_N18 +cyclonev_lcell_comb \PC_Reg_Display[14]~315 ( +// Equation(s): +// \PC_Reg_Display[14]~315_combout = ( \REGS|regs[22][14]~q & ( \REGS|regs[23][14]~DUPLICATE_q & ( ((!\HID_Register[0]~input_o & (\REGS|regs[18][14]~q )) # (\HID_Register[0]~input_o & ((\REGS|regs[19][14]~q )))) # (\HID_Register[2]~input_o ) ) ) ) # ( +// !\REGS|regs[22][14]~q & ( \REGS|regs[23][14]~DUPLICATE_q & ( (!\HID_Register[2]~input_o & ((!\HID_Register[0]~input_o & (\REGS|regs[18][14]~q )) # (\HID_Register[0]~input_o & ((\REGS|regs[19][14]~q ))))) # (\HID_Register[2]~input_o & +// (((\HID_Register[0]~input_o )))) ) ) ) # ( \REGS|regs[22][14]~q & ( !\REGS|regs[23][14]~DUPLICATE_q & ( (!\HID_Register[2]~input_o & ((!\HID_Register[0]~input_o & (\REGS|regs[18][14]~q )) # (\HID_Register[0]~input_o & ((\REGS|regs[19][14]~q ))))) # +// (\HID_Register[2]~input_o & (((!\HID_Register[0]~input_o )))) ) ) ) # ( !\REGS|regs[22][14]~q & ( !\REGS|regs[23][14]~DUPLICATE_q & ( (!\HID_Register[2]~input_o & ((!\HID_Register[0]~input_o & (\REGS|regs[18][14]~q )) # (\HID_Register[0]~input_o & +// ((\REGS|regs[19][14]~q ))))) ) ) ) + + .dataa(!\REGS|regs[18][14]~q ), + .datab(!\HID_Register[2]~input_o ), + .datac(!\REGS|regs[19][14]~q ), + .datad(!\HID_Register[0]~input_o ), + .datae(!\REGS|regs[22][14]~q ), + .dataf(!\REGS|regs[23][14]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[14]~315_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[14]~315 .extended_lut = "off"; +defparam \PC_Reg_Display[14]~315 .lut_mask = 64'h440C770C443F773F; +defparam \PC_Reg_Display[14]~315 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X25_Y6_N59 +dffeas \REGS|regs[21][30] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[30]~453_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~16_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[21][30]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[21][30] .is_wysiwyg = "true"; +defparam \REGS|regs[21][30] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X25_Y6_N41 +dffeas \REGS|regs[17][30] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[30]~453_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~11_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[17][30]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[17][30] .is_wysiwyg = "true"; +defparam \REGS|regs[17][30] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X25_Y6_N39 +cyclonev_lcell_comb \PC_Reg_Display[14]~314 ( +// Equation(s): +// \PC_Reg_Display[14]~314_combout = ( \REGS|regs[17][30]~q & ( \REGS|regs[16][30]~q & ( (!\HID_Register[2]~input_o ) # ((!\HID_Register[0]~input_o & (\REGS|regs[20][30]~q )) # (\HID_Register[0]~input_o & ((\REGS|regs[21][30]~q )))) ) ) ) # ( +// !\REGS|regs[17][30]~q & ( \REGS|regs[16][30]~q & ( (!\HID_Register[0]~input_o & (((!\HID_Register[2]~input_o )) # (\REGS|regs[20][30]~q ))) # (\HID_Register[0]~input_o & (((\REGS|regs[21][30]~q & \HID_Register[2]~input_o )))) ) ) ) # ( +// \REGS|regs[17][30]~q & ( !\REGS|regs[16][30]~q & ( (!\HID_Register[0]~input_o & (\REGS|regs[20][30]~q & ((\HID_Register[2]~input_o )))) # (\HID_Register[0]~input_o & (((!\HID_Register[2]~input_o ) # (\REGS|regs[21][30]~q )))) ) ) ) # ( +// !\REGS|regs[17][30]~q & ( !\REGS|regs[16][30]~q & ( (\HID_Register[2]~input_o & ((!\HID_Register[0]~input_o & (\REGS|regs[20][30]~q )) # (\HID_Register[0]~input_o & ((\REGS|regs[21][30]~q ))))) ) ) ) + + .dataa(!\REGS|regs[20][30]~q ), + .datab(!\REGS|regs[21][30]~q ), + .datac(!\HID_Register[0]~input_o ), + .datad(!\HID_Register[2]~input_o ), + .datae(!\REGS|regs[17][30]~q ), + .dataf(!\REGS|regs[16][30]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[14]~314_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[14]~314 .extended_lut = "off"; +defparam \PC_Reg_Display[14]~314 .lut_mask = 64'h00530F53F053FF53; +defparam \PC_Reg_Display[14]~314 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X32_Y5_N4 +dffeas \REGS|regs[19][30] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[30]~453_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~14_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[19][30]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[19][30] .is_wysiwyg = "true"; +defparam \REGS|regs[19][30] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X27_Y5_N54 +cyclonev_lcell_comb \PC_Reg_Display[14]~316 ( +// Equation(s): +// \PC_Reg_Display[14]~316_combout = ( \REGS|regs[22][30]~q & ( \REGS|regs[19][30]~q & ( (!\HID_Register[2]~input_o & (((\HID_Register[0]~input_o )) # (\REGS|regs[18][30]~q ))) # (\HID_Register[2]~input_o & (((!\HID_Register[0]~input_o ) # +// (\REGS|regs[23][30]~q )))) ) ) ) # ( !\REGS|regs[22][30]~q & ( \REGS|regs[19][30]~q & ( (!\HID_Register[2]~input_o & (((\HID_Register[0]~input_o )) # (\REGS|regs[18][30]~q ))) # (\HID_Register[2]~input_o & (((\REGS|regs[23][30]~q & +// \HID_Register[0]~input_o )))) ) ) ) # ( \REGS|regs[22][30]~q & ( !\REGS|regs[19][30]~q & ( (!\HID_Register[2]~input_o & (\REGS|regs[18][30]~q & ((!\HID_Register[0]~input_o )))) # (\HID_Register[2]~input_o & (((!\HID_Register[0]~input_o ) # +// (\REGS|regs[23][30]~q )))) ) ) ) # ( !\REGS|regs[22][30]~q & ( !\REGS|regs[19][30]~q & ( (!\HID_Register[2]~input_o & (\REGS|regs[18][30]~q & ((!\HID_Register[0]~input_o )))) # (\HID_Register[2]~input_o & (((\REGS|regs[23][30]~q & +// \HID_Register[0]~input_o )))) ) ) ) + + .dataa(!\HID_Register[2]~input_o ), + .datab(!\REGS|regs[18][30]~q ), + .datac(!\REGS|regs[23][30]~q ), + .datad(!\HID_Register[0]~input_o ), + .datae(!\REGS|regs[22][30]~q ), + .dataf(!\REGS|regs[19][30]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[14]~316_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[14]~316 .extended_lut = "off"; +defparam \PC_Reg_Display[14]~316 .lut_mask = 64'h2205770522AF77AF; +defparam \PC_Reg_Display[14]~316 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X25_Y10_N5 +dffeas \REGS|regs[21][14] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[14]~454_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~16_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[21][14]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[21][14] .is_wysiwyg = "true"; +defparam \REGS|regs[21][14] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X25_Y10_N3 +cyclonev_lcell_comb \PC_Reg_Display[14]~313 ( +// Equation(s): +// \PC_Reg_Display[14]~313_combout = ( \REGS|regs[21][14]~q & ( \REGS|regs[16][14]~q & ( (!\HID_Register[2]~input_o & (((!\HID_Register[0]~input_o ) # (\REGS|regs[17][14]~q )))) # (\HID_Register[2]~input_o & (((\HID_Register[0]~input_o )) # +// (\REGS|regs[20][14]~q ))) ) ) ) # ( !\REGS|regs[21][14]~q & ( \REGS|regs[16][14]~q & ( (!\HID_Register[2]~input_o & (((!\HID_Register[0]~input_o ) # (\REGS|regs[17][14]~q )))) # (\HID_Register[2]~input_o & (\REGS|regs[20][14]~q & +// ((!\HID_Register[0]~input_o )))) ) ) ) # ( \REGS|regs[21][14]~q & ( !\REGS|regs[16][14]~q & ( (!\HID_Register[2]~input_o & (((\REGS|regs[17][14]~q & \HID_Register[0]~input_o )))) # (\HID_Register[2]~input_o & (((\HID_Register[0]~input_o )) # +// (\REGS|regs[20][14]~q ))) ) ) ) # ( !\REGS|regs[21][14]~q & ( !\REGS|regs[16][14]~q & ( (!\HID_Register[2]~input_o & (((\REGS|regs[17][14]~q & \HID_Register[0]~input_o )))) # (\HID_Register[2]~input_o & (\REGS|regs[20][14]~q & +// ((!\HID_Register[0]~input_o )))) ) ) ) + + .dataa(!\REGS|regs[20][14]~q ), + .datab(!\REGS|regs[17][14]~q ), + .datac(!\HID_Register[2]~input_o ), + .datad(!\HID_Register[0]~input_o ), + .datae(!\REGS|regs[21][14]~q ), + .dataf(!\REGS|regs[16][14]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[14]~313_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[14]~313 .extended_lut = "off"; +defparam \PC_Reg_Display[14]~313 .lut_mask = 64'h0530053FF530F53F; +defparam \PC_Reg_Display[14]~313 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X25_Y6_N27 +cyclonev_lcell_comb \PC_Reg_Display[14]~317 ( +// Equation(s): +// \PC_Reg_Display[14]~317_combout = ( \PC_Reg_Display[14]~316_combout & ( \PC_Reg_Display[14]~313_combout & ( (!\HID_Hi_Low[0]~input_o & (((!\HID_Register[1]~input_o )) # (\PC_Reg_Display[14]~315_combout ))) # (\HID_Hi_Low[0]~input_o & +// (((\HID_Register[1]~input_o ) # (\PC_Reg_Display[14]~314_combout )))) ) ) ) # ( !\PC_Reg_Display[14]~316_combout & ( \PC_Reg_Display[14]~313_combout & ( (!\HID_Hi_Low[0]~input_o & (((!\HID_Register[1]~input_o )) # (\PC_Reg_Display[14]~315_combout ))) # +// (\HID_Hi_Low[0]~input_o & (((\PC_Reg_Display[14]~314_combout & !\HID_Register[1]~input_o )))) ) ) ) # ( \PC_Reg_Display[14]~316_combout & ( !\PC_Reg_Display[14]~313_combout & ( (!\HID_Hi_Low[0]~input_o & (\PC_Reg_Display[14]~315_combout & +// ((\HID_Register[1]~input_o )))) # (\HID_Hi_Low[0]~input_o & (((\HID_Register[1]~input_o ) # (\PC_Reg_Display[14]~314_combout )))) ) ) ) # ( !\PC_Reg_Display[14]~316_combout & ( !\PC_Reg_Display[14]~313_combout & ( (!\HID_Hi_Low[0]~input_o & +// (\PC_Reg_Display[14]~315_combout & ((\HID_Register[1]~input_o )))) # (\HID_Hi_Low[0]~input_o & (((\PC_Reg_Display[14]~314_combout & !\HID_Register[1]~input_o )))) ) ) ) + + .dataa(!\PC_Reg_Display[14]~315_combout ), + .datab(!\HID_Hi_Low[0]~input_o ), + .datac(!\PC_Reg_Display[14]~314_combout ), + .datad(!\HID_Register[1]~input_o ), + .datae(!\PC_Reg_Display[14]~316_combout ), + .dataf(!\PC_Reg_Display[14]~313_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[14]~317_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[14]~317 .extended_lut = "off"; +defparam \PC_Reg_Display[14]~317 .lut_mask = 64'h03440377CF44CF77; +defparam \PC_Reg_Display[14]~317 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X30_Y7_N59 +dffeas \REGS|regs[1][30] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[30]~453_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~28_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[1][30]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[1][30] .is_wysiwyg = "true"; +defparam \REGS|regs[1][30] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X30_Y7_N9 +cyclonev_lcell_comb \PC_Reg_Display[14]~308 ( +// Equation(s): +// \PC_Reg_Display[14]~308_combout = ( \HID_Hi_Low[0]~input_o & ( (\HID_Register[0]~input_o & \REGS|regs[1][30]~q ) ) ) # ( !\HID_Hi_Low[0]~input_o & ( (\HID_Register[0]~input_o & \REGS|regs[1][14]~q ) ) ) + + .dataa(!\HID_Register[0]~input_o ), + .datab(!\REGS|regs[1][30]~q ), + .datac(!\REGS|regs[1][14]~q ), + .datad(gnd), + .datae(gnd), + .dataf(!\HID_Hi_Low[0]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[14]~308_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[14]~308 .extended_lut = "off"; +defparam \PC_Reg_Display[14]~308 .lut_mask = 64'h0505050511111111; +defparam \PC_Reg_Display[14]~308 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X23_Y10_N59 +dffeas \REGS|regs[7][14] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[14]~454_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~38_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[7][14]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[7][14] .is_wysiwyg = "true"; +defparam \REGS|regs[7][14] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X23_Y10_N56 +dffeas \REGS|regs[7][30] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[30]~453_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~38_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[7][30]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[7][30] .is_wysiwyg = "true"; +defparam \REGS|regs[7][30] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X23_Y10_N54 +cyclonev_lcell_comb \PC_Reg_Display[14]~311 ( +// Equation(s): +// \PC_Reg_Display[14]~311_combout = ( \REGS|regs[7][30]~q & ( \REGS|regs[6][30]~q & ( ((!\HID_Register[0]~input_o & ((\REGS|regs[6][14]~q ))) # (\HID_Register[0]~input_o & (\REGS|regs[7][14]~q ))) # (\HID_Hi_Low[0]~input_o ) ) ) ) # ( +// !\REGS|regs[7][30]~q & ( \REGS|regs[6][30]~q & ( (!\HID_Register[0]~input_o & (((\REGS|regs[6][14]~q ) # (\HID_Hi_Low[0]~input_o )))) # (\HID_Register[0]~input_o & (\REGS|regs[7][14]~q & (!\HID_Hi_Low[0]~input_o ))) ) ) ) # ( \REGS|regs[7][30]~q & ( +// !\REGS|regs[6][30]~q & ( (!\HID_Register[0]~input_o & (((!\HID_Hi_Low[0]~input_o & \REGS|regs[6][14]~q )))) # (\HID_Register[0]~input_o & (((\HID_Hi_Low[0]~input_o )) # (\REGS|regs[7][14]~q ))) ) ) ) # ( !\REGS|regs[7][30]~q & ( !\REGS|regs[6][30]~q +// & ( (!\HID_Hi_Low[0]~input_o & ((!\HID_Register[0]~input_o & ((\REGS|regs[6][14]~q ))) # (\HID_Register[0]~input_o & (\REGS|regs[7][14]~q )))) ) ) ) + + .dataa(!\HID_Register[0]~input_o ), + .datab(!\REGS|regs[7][14]~q ), + .datac(!\HID_Hi_Low[0]~input_o ), + .datad(!\REGS|regs[6][14]~q ), + .datae(!\REGS|regs[7][30]~q ), + .dataf(!\REGS|regs[6][30]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[14]~311_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[14]~311 .extended_lut = "off"; +defparam \PC_Reg_Display[14]~311 .lut_mask = 64'h10B015B51ABA1FBF; +defparam \PC_Reg_Display[14]~311 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X23_Y10_N41 +dffeas \REGS|regs[3][14] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[14]~454_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~36_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[3][14]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[3][14] .is_wysiwyg = "true"; +defparam \REGS|regs[3][14] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X23_Y10_N38 +dffeas \REGS|regs[3][30] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[30]~453_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~36_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[3][30]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[3][30] .is_wysiwyg = "true"; +defparam \REGS|regs[3][30] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X23_Y10_N36 +cyclonev_lcell_comb \PC_Reg_Display[14]~309 ( +// Equation(s): +// \PC_Reg_Display[14]~309_combout = ( \REGS|regs[3][30]~q & ( \HID_Register[0]~input_o & ( (\HID_Hi_Low[0]~input_o ) # (\REGS|regs[3][14]~q ) ) ) ) # ( !\REGS|regs[3][30]~q & ( \HID_Register[0]~input_o & ( (\REGS|regs[3][14]~q & +// !\HID_Hi_Low[0]~input_o ) ) ) ) # ( \REGS|regs[3][30]~q & ( !\HID_Register[0]~input_o & ( (!\HID_Hi_Low[0]~input_o & ((\REGS|regs[2][14]~q ))) # (\HID_Hi_Low[0]~input_o & (\REGS|regs[2][30]~q )) ) ) ) # ( !\REGS|regs[3][30]~q & ( +// !\HID_Register[0]~input_o & ( (!\HID_Hi_Low[0]~input_o & ((\REGS|regs[2][14]~q ))) # (\HID_Hi_Low[0]~input_o & (\REGS|regs[2][30]~q )) ) ) ) + + .dataa(!\REGS|regs[2][30]~q ), + .datab(!\REGS|regs[3][14]~q ), + .datac(!\REGS|regs[2][14]~q ), + .datad(!\HID_Hi_Low[0]~input_o ), + .datae(!\REGS|regs[3][30]~q ), + .dataf(!\HID_Register[0]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[14]~309_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[14]~309 .extended_lut = "off"; +defparam \PC_Reg_Display[14]~309 .lut_mask = 64'h0F550F55330033FF; +defparam \PC_Reg_Display[14]~309 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X27_Y8_N53 +dffeas \REGS|regs[4][14] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[14]~454_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~22_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[4][14]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[4][14] .is_wysiwyg = "true"; +defparam \REGS|regs[4][14] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y8_N5 +dffeas \REGS|regs[5][14]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[14]~454_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~30_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[5][14]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[5][14]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[5][14]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X27_Y8_N33 +cyclonev_lcell_comb \PC_Reg_Display[14]~310 ( +// Equation(s): +// \PC_Reg_Display[14]~310_combout = ( \REGS|regs[5][14]~DUPLICATE_q & ( \HID_Hi_Low[0]~input_o & ( (!\HID_Register[0]~input_o & (\REGS|regs[4][30]~q )) # (\HID_Register[0]~input_o & ((\REGS|regs[5][30]~q ))) ) ) ) # ( !\REGS|regs[5][14]~DUPLICATE_q & +// ( \HID_Hi_Low[0]~input_o & ( (!\HID_Register[0]~input_o & (\REGS|regs[4][30]~q )) # (\HID_Register[0]~input_o & ((\REGS|regs[5][30]~q ))) ) ) ) # ( \REGS|regs[5][14]~DUPLICATE_q & ( !\HID_Hi_Low[0]~input_o & ( (\HID_Register[0]~input_o ) # +// (\REGS|regs[4][14]~q ) ) ) ) # ( !\REGS|regs[5][14]~DUPLICATE_q & ( !\HID_Hi_Low[0]~input_o & ( (\REGS|regs[4][14]~q & !\HID_Register[0]~input_o ) ) ) ) + + .dataa(!\REGS|regs[4][14]~q ), + .datab(!\HID_Register[0]~input_o ), + .datac(!\REGS|regs[4][30]~q ), + .datad(!\REGS|regs[5][30]~q ), + .datae(!\REGS|regs[5][14]~DUPLICATE_q ), + .dataf(!\HID_Hi_Low[0]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[14]~310_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[14]~310 .extended_lut = "off"; +defparam \PC_Reg_Display[14]~310 .lut_mask = 64'h444477770C3F0C3F; +defparam \PC_Reg_Display[14]~310 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X23_Y10_N24 +cyclonev_lcell_comb \PC_Reg_Display[14]~312 ( +// Equation(s): +// \PC_Reg_Display[14]~312_combout = ( \PC_Reg_Display[14]~309_combout & ( \PC_Reg_Display[14]~310_combout & ( (!\HID_Register[2]~input_o & (((\HID_Register[1]~input_o )) # (\PC_Reg_Display[14]~308_combout ))) # (\HID_Register[2]~input_o & +// (((!\HID_Register[1]~input_o ) # (\PC_Reg_Display[14]~311_combout )))) ) ) ) # ( !\PC_Reg_Display[14]~309_combout & ( \PC_Reg_Display[14]~310_combout & ( (!\HID_Register[2]~input_o & (\PC_Reg_Display[14]~308_combout & ((!\HID_Register[1]~input_o )))) +// # (\HID_Register[2]~input_o & (((!\HID_Register[1]~input_o ) # (\PC_Reg_Display[14]~311_combout )))) ) ) ) # ( \PC_Reg_Display[14]~309_combout & ( !\PC_Reg_Display[14]~310_combout & ( (!\HID_Register[2]~input_o & (((\HID_Register[1]~input_o )) # +// (\PC_Reg_Display[14]~308_combout ))) # (\HID_Register[2]~input_o & (((\PC_Reg_Display[14]~311_combout & \HID_Register[1]~input_o )))) ) ) ) # ( !\PC_Reg_Display[14]~309_combout & ( !\PC_Reg_Display[14]~310_combout & ( (!\HID_Register[2]~input_o & +// (\PC_Reg_Display[14]~308_combout & ((!\HID_Register[1]~input_o )))) # (\HID_Register[2]~input_o & (((\PC_Reg_Display[14]~311_combout & \HID_Register[1]~input_o )))) ) ) ) + + .dataa(!\PC_Reg_Display[14]~308_combout ), + .datab(!\HID_Register[2]~input_o ), + .datac(!\PC_Reg_Display[14]~311_combout ), + .datad(!\HID_Register[1]~input_o ), + .datae(!\PC_Reg_Display[14]~309_combout ), + .dataf(!\PC_Reg_Display[14]~310_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[14]~312_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[14]~312 .extended_lut = "off"; +defparam \PC_Reg_Display[14]~312 .lut_mask = 64'h440344CF770377CF; +defparam \PC_Reg_Display[14]~312 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X25_Y7_N18 +cyclonev_lcell_comb \PC_Reg_Display[14]~328 ( +// Equation(s): +// \PC_Reg_Display[14]~328_combout = ( \PC_Reg_Display[14]~312_combout & ( \HID_Register[4]~input_o & ( (!\HID_Register[3]~input_o & ((\PC_Reg_Display[14]~317_combout ))) # (\HID_Register[3]~input_o & (\PC_Reg_Display[14]~327_combout )) ) ) ) # ( +// !\PC_Reg_Display[14]~312_combout & ( \HID_Register[4]~input_o & ( (!\HID_Register[3]~input_o & ((\PC_Reg_Display[14]~317_combout ))) # (\HID_Register[3]~input_o & (\PC_Reg_Display[14]~327_combout )) ) ) ) # ( \PC_Reg_Display[14]~312_combout & ( +// !\HID_Register[4]~input_o & ( (!\HID_Register[3]~input_o ) # (\PC_Reg_Display[14]~322_combout ) ) ) ) # ( !\PC_Reg_Display[14]~312_combout & ( !\HID_Register[4]~input_o & ( (\PC_Reg_Display[14]~322_combout & \HID_Register[3]~input_o ) ) ) ) + + .dataa(!\PC_Reg_Display[14]~322_combout ), + .datab(!\PC_Reg_Display[14]~327_combout ), + .datac(!\PC_Reg_Display[14]~317_combout ), + .datad(!\HID_Register[3]~input_o ), + .datae(!\PC_Reg_Display[14]~312_combout ), + .dataf(!\HID_Register[4]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[14]~328_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[14]~328 .extended_lut = "off"; +defparam \PC_Reg_Display[14]~328 .lut_mask = 64'h0055FF550F330F33; +defparam \PC_Reg_Display[14]~328 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X36_Y7_N48 +cyclonev_lcell_comb \Add0~89 ( +// Equation(s): +// \Add0~89_sumout = SUM(( (pc_we[0] & \PC|pc [28]) ) + ( (!pc_we[0] & \PC|pc [28]) ) + ( \Add0~82 )) +// \Add0~90 = CARRY(( (pc_we[0] & \PC|pc [28]) ) + ( (!pc_we[0] & \PC|pc [28]) ) + ( \Add0~82 )) + + .dataa(!pc_we[0]), + .datab(gnd), + .datac(!\PC|pc [28]), + .datad(gnd), + .datae(gnd), + .dataf(gnd), + .datag(gnd), + .cin(\Add0~82 ), + .sharein(gnd), + .combout(), + .sumout(\Add0~89_sumout ), + .cout(\Add0~90 ), + .shareout()); +// synopsys translate_off +defparam \Add0~89 .extended_lut = "off"; +defparam \Add0~89 .lut_mask = 64'h0000F5F500000505; +defparam \Add0~89 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X36_Y7_N50 +dffeas \PC|pc[28] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\Add0~89_sumout ), + .asdata(vcc), + .clrn(!\rst[0]~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\PC|pc [28]), + .prn(vcc)); +// synopsys translate_off +defparam \PC|pc[28] .is_wysiwyg = "true"; +defparam \PC|pc[28] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X36_Y7_N51 +cyclonev_lcell_comb \Add0~97 ( +// Equation(s): +// \Add0~97_sumout = SUM(( (pc_we[0] & \PC|pc [29]) ) + ( (!pc_we[0] & \PC|pc [29]) ) + ( \Add0~90 )) +// \Add0~98 = CARRY(( (pc_we[0] & \PC|pc [29]) ) + ( (!pc_we[0] & \PC|pc [29]) ) + ( \Add0~90 )) + + .dataa(!pc_we[0]), + .datab(gnd), + .datac(!\PC|pc [29]), + .datad(gnd), + .datae(gnd), + .dataf(gnd), + .datag(gnd), + .cin(\Add0~90 ), + .sharein(gnd), + .combout(), + .sumout(\Add0~97_sumout ), + .cout(\Add0~98 ), + .shareout()); +// synopsys translate_off +defparam \Add0~97 .extended_lut = "off"; +defparam \Add0~97 .lut_mask = 64'h0000F5F500000505; +defparam \Add0~97 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X36_Y7_N52 +dffeas \PC|pc[29] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\Add0~97_sumout ), + .asdata(vcc), + .clrn(!\rst[0]~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\PC|pc [29]), + .prn(vcc)); +// synopsys translate_off +defparam \PC|pc[29] .is_wysiwyg = "true"; +defparam \PC|pc[29] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X36_Y7_N54 +cyclonev_lcell_comb \Add0~105 ( +// Equation(s): +// \Add0~105_sumout = SUM(( (pc_we[0] & \PC|pc [30]) ) + ( (!pc_we[0] & \PC|pc [30]) ) + ( \Add0~98 )) +// \Add0~106 = CARRY(( (pc_we[0] & \PC|pc [30]) ) + ( (!pc_we[0] & \PC|pc [30]) ) + ( \Add0~98 )) + + .dataa(!pc_we[0]), + .datab(gnd), + .datac(!\PC|pc [30]), + .datad(gnd), + .datae(gnd), + .dataf(gnd), + .datag(gnd), + .cin(\Add0~98 ), + .sharein(gnd), + .combout(), + .sumout(\Add0~105_sumout ), + .cout(\Add0~106 ), + .shareout()); +// synopsys translate_off +defparam \Add0~105 .extended_lut = "off"; +defparam \Add0~105 .lut_mask = 64'h0000F5F500000505; +defparam \Add0~105 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X36_Y7_N56 +dffeas \PC|pc[30] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\Add0~105_sumout ), + .asdata(vcc), + .clrn(!\rst[0]~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\PC|pc [30]), + .prn(vcc)); +// synopsys translate_off +defparam \PC|pc[30] .is_wysiwyg = "true"; +defparam \PC|pc[30] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X36_Y7_N12 +cyclonev_lcell_comb \PC_Reg_Display[14]~329 ( +// Equation(s): +// \PC_Reg_Display[14]~329_combout = ( \PC|pc [14] & ( (!\HID_PC[0]~input_o & (((\PC_Reg_Display[14]~328_combout )))) # (\HID_PC[0]~input_o & ((!\HID_Hi_Low[0]~input_o ) # ((\PC|pc [30])))) ) ) # ( !\PC|pc [14] & ( (!\HID_PC[0]~input_o & +// (((\PC_Reg_Display[14]~328_combout )))) # (\HID_PC[0]~input_o & (\HID_Hi_Low[0]~input_o & ((\PC|pc [30])))) ) ) + + .dataa(!\HID_PC[0]~input_o ), + .datab(!\HID_Hi_Low[0]~input_o ), + .datac(!\PC_Reg_Display[14]~328_combout ), + .datad(!\PC|pc [30]), + .datae(gnd), + .dataf(!\PC|pc [14]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[14]~329_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[14]~329 .extended_lut = "off"; +defparam \PC_Reg_Display[14]~329 .lut_mask = 64'h0A1B0A1B4E5F4E5F; +defparam \PC_Reg_Display[14]~329 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X36_Y7_N57 +cyclonev_lcell_comb \Add0~113 ( +// Equation(s): +// \Add0~113_sumout = SUM(( (pc_we[0] & \PC|pc [31]) ) + ( (!pc_we[0] & \PC|pc [31]) ) + ( \Add0~106 )) + + .dataa(!pc_we[0]), + .datab(gnd), + .datac(!\PC|pc [31]), + .datad(gnd), + .datae(gnd), + .dataf(gnd), + .datag(gnd), + .cin(\Add0~106 ), + .sharein(gnd), + .combout(), + .sumout(\Add0~113_sumout ), + .cout(), + .shareout()); +// synopsys translate_off +defparam \Add0~113 .extended_lut = "off"; +defparam \Add0~113 .lut_mask = 64'h0000F5F500000505; +defparam \Add0~113 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X36_Y7_N59 +dffeas \PC|pc[31] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\Add0~113_sumout ), + .asdata(vcc), + .clrn(!\rst[0]~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\PC|pc [31]), + .prn(vcc)); +// synopsys translate_off +defparam \PC|pc[31] .is_wysiwyg = "true"; +defparam \PC|pc[31] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X28_Y5_N23 +dffeas \REGS|regs[3][15] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[15]~456_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~36_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[3][15]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[3][15] .is_wysiwyg = "true"; +defparam \REGS|regs[3][15] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X28_Y5_N20 +dffeas \REGS|regs[3][31] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[31]~455_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~36_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[3][31]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[3][31] .is_wysiwyg = "true"; +defparam \REGS|regs[3][31] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X30_Y9_N7 +dffeas \REGS|regs[2][31] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[31]~455_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~32_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[2][31]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[2][31] .is_wysiwyg = "true"; +defparam \REGS|regs[2][31] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X28_Y5_N18 +cyclonev_lcell_comb \PC_Reg_Display[15]~331 ( +// Equation(s): +// \PC_Reg_Display[15]~331_combout = ( \REGS|regs[3][31]~q & ( \REGS|regs[2][31]~q & ( ((!\HID_Register[0]~input_o & (\REGS|regs[2][15]~q )) # (\HID_Register[0]~input_o & ((\REGS|regs[3][15]~q )))) # (\HID_Hi_Low[0]~input_o ) ) ) ) # ( +// !\REGS|regs[3][31]~q & ( \REGS|regs[2][31]~q & ( (!\HID_Hi_Low[0]~input_o & ((!\HID_Register[0]~input_o & (\REGS|regs[2][15]~q )) # (\HID_Register[0]~input_o & ((\REGS|regs[3][15]~q ))))) # (\HID_Hi_Low[0]~input_o & (((!\HID_Register[0]~input_o )))) +// ) ) ) # ( \REGS|regs[3][31]~q & ( !\REGS|regs[2][31]~q & ( (!\HID_Hi_Low[0]~input_o & ((!\HID_Register[0]~input_o & (\REGS|regs[2][15]~q )) # (\HID_Register[0]~input_o & ((\REGS|regs[3][15]~q ))))) # (\HID_Hi_Low[0]~input_o & +// (((\HID_Register[0]~input_o )))) ) ) ) # ( !\REGS|regs[3][31]~q & ( !\REGS|regs[2][31]~q & ( (!\HID_Hi_Low[0]~input_o & ((!\HID_Register[0]~input_o & (\REGS|regs[2][15]~q )) # (\HID_Register[0]~input_o & ((\REGS|regs[3][15]~q ))))) ) ) ) + + .dataa(!\HID_Hi_Low[0]~input_o ), + .datab(!\REGS|regs[2][15]~q ), + .datac(!\REGS|regs[3][15]~q ), + .datad(!\HID_Register[0]~input_o ), + .datae(!\REGS|regs[3][31]~q ), + .dataf(!\REGS|regs[2][31]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[15]~331_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[15]~331 .extended_lut = "off"; +defparam \PC_Reg_Display[15]~331 .lut_mask = 64'h220A225F770A775F; +defparam \PC_Reg_Display[15]~331 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X28_Y5_N15 +cyclonev_lcell_comb \PC_Reg_Display[15]~330 ( +// Equation(s): +// \PC_Reg_Display[15]~330_combout = ( \REGS|regs[1][15]~q & ( \HID_Register[0]~input_o & ( (!\HID_Hi_Low[0]~input_o ) # (\REGS|regs[1][31]~q ) ) ) ) # ( !\REGS|regs[1][15]~q & ( \HID_Register[0]~input_o & ( (\REGS|regs[1][31]~q & +// \HID_Hi_Low[0]~input_o ) ) ) ) + + .dataa(!\REGS|regs[1][31]~q ), + .datab(gnd), + .datac(gnd), + .datad(!\HID_Hi_Low[0]~input_o ), + .datae(!\REGS|regs[1][15]~q ), + .dataf(!\HID_Register[0]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[15]~330_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[15]~330 .extended_lut = "off"; +defparam \PC_Reg_Display[15]~330 .lut_mask = 64'h000000000055FF55; +defparam \PC_Reg_Display[15]~330 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X28_Y5_N26 +dffeas \REGS|regs[7][15] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[15]~456_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~38_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[7][15]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[7][15] .is_wysiwyg = "true"; +defparam \REGS|regs[7][15] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X28_Y5_N29 +dffeas \REGS|regs[7][31] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[31]~455_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~38_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[7][31]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[7][31] .is_wysiwyg = "true"; +defparam \REGS|regs[7][31] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X28_Y5_N27 +cyclonev_lcell_comb \PC_Reg_Display[15]~333 ( +// Equation(s): +// \PC_Reg_Display[15]~333_combout = ( \REGS|regs[7][31]~q & ( \REGS|regs[6][15]~q & ( (!\HID_Register[0]~input_o & (((!\HID_Hi_Low[0]~input_o ) # (\REGS|regs[6][31]~q )))) # (\HID_Register[0]~input_o & (((\HID_Hi_Low[0]~input_o )) # +// (\REGS|regs[7][15]~q ))) ) ) ) # ( !\REGS|regs[7][31]~q & ( \REGS|regs[6][15]~q & ( (!\HID_Register[0]~input_o & (((!\HID_Hi_Low[0]~input_o ) # (\REGS|regs[6][31]~q )))) # (\HID_Register[0]~input_o & (\REGS|regs[7][15]~q & ((!\HID_Hi_Low[0]~input_o +// )))) ) ) ) # ( \REGS|regs[7][31]~q & ( !\REGS|regs[6][15]~q & ( (!\HID_Register[0]~input_o & (((\REGS|regs[6][31]~q & \HID_Hi_Low[0]~input_o )))) # (\HID_Register[0]~input_o & (((\HID_Hi_Low[0]~input_o )) # (\REGS|regs[7][15]~q ))) ) ) ) # ( +// !\REGS|regs[7][31]~q & ( !\REGS|regs[6][15]~q & ( (!\HID_Register[0]~input_o & (((\REGS|regs[6][31]~q & \HID_Hi_Low[0]~input_o )))) # (\HID_Register[0]~input_o & (\REGS|regs[7][15]~q & ((!\HID_Hi_Low[0]~input_o )))) ) ) ) + + .dataa(!\REGS|regs[7][15]~q ), + .datab(!\HID_Register[0]~input_o ), + .datac(!\REGS|regs[6][31]~q ), + .datad(!\HID_Hi_Low[0]~input_o ), + .datae(!\REGS|regs[7][31]~q ), + .dataf(!\REGS|regs[6][15]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[15]~333_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[15]~333 .extended_lut = "off"; +defparam \PC_Reg_Display[15]~333 .lut_mask = 64'h110C113FDD0CDD3F; +defparam \PC_Reg_Display[15]~333 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X27_Y8_N47 +dffeas \REGS|regs[5][15] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[15]~456_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~30_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[5][15]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[5][15] .is_wysiwyg = "true"; +defparam \REGS|regs[5][15] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X27_Y8_N42 +cyclonev_lcell_comb \PC_Reg_Display[15]~332 ( +// Equation(s): +// \PC_Reg_Display[15]~332_combout = ( \REGS|regs[5][31]~q & ( \REGS|regs[4][15]~q & ( (!\HID_Hi_Low[0]~input_o & (((!\HID_Register[0]~input_o )) # (\REGS|regs[5][15]~q ))) # (\HID_Hi_Low[0]~input_o & (((\HID_Register[0]~input_o ) # (\REGS|regs[4][31]~q +// )))) ) ) ) # ( !\REGS|regs[5][31]~q & ( \REGS|regs[4][15]~q & ( (!\HID_Hi_Low[0]~input_o & (((!\HID_Register[0]~input_o )) # (\REGS|regs[5][15]~q ))) # (\HID_Hi_Low[0]~input_o & (((\REGS|regs[4][31]~q & !\HID_Register[0]~input_o )))) ) ) ) # ( +// \REGS|regs[5][31]~q & ( !\REGS|regs[4][15]~q & ( (!\HID_Hi_Low[0]~input_o & (\REGS|regs[5][15]~q & ((\HID_Register[0]~input_o )))) # (\HID_Hi_Low[0]~input_o & (((\HID_Register[0]~input_o ) # (\REGS|regs[4][31]~q )))) ) ) ) # ( !\REGS|regs[5][31]~q & +// ( !\REGS|regs[4][15]~q & ( (!\HID_Hi_Low[0]~input_o & (\REGS|regs[5][15]~q & ((\HID_Register[0]~input_o )))) # (\HID_Hi_Low[0]~input_o & (((\REGS|regs[4][31]~q & !\HID_Register[0]~input_o )))) ) ) ) + + .dataa(!\HID_Hi_Low[0]~input_o ), + .datab(!\REGS|regs[5][15]~q ), + .datac(!\REGS|regs[4][31]~q ), + .datad(!\HID_Register[0]~input_o ), + .datae(!\REGS|regs[5][31]~q ), + .dataf(!\REGS|regs[4][15]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[15]~332_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[15]~332 .extended_lut = "off"; +defparam \PC_Reg_Display[15]~332 .lut_mask = 64'h05220577AF22AF77; +defparam \PC_Reg_Display[15]~332 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X27_Y5_N51 +cyclonev_lcell_comb \PC_Reg_Display[15]~334 ( +// Equation(s): +// \PC_Reg_Display[15]~334_combout = ( \PC_Reg_Display[15]~333_combout & ( \PC_Reg_Display[15]~332_combout & ( ((!\HID_Register[1]~input_o & ((\PC_Reg_Display[15]~330_combout ))) # (\HID_Register[1]~input_o & (\PC_Reg_Display[15]~331_combout ))) # +// (\HID_Register[2]~input_o ) ) ) ) # ( !\PC_Reg_Display[15]~333_combout & ( \PC_Reg_Display[15]~332_combout & ( (!\HID_Register[2]~input_o & ((!\HID_Register[1]~input_o & ((\PC_Reg_Display[15]~330_combout ))) # (\HID_Register[1]~input_o & +// (\PC_Reg_Display[15]~331_combout )))) # (\HID_Register[2]~input_o & (((!\HID_Register[1]~input_o )))) ) ) ) # ( \PC_Reg_Display[15]~333_combout & ( !\PC_Reg_Display[15]~332_combout & ( (!\HID_Register[2]~input_o & ((!\HID_Register[1]~input_o & +// ((\PC_Reg_Display[15]~330_combout ))) # (\HID_Register[1]~input_o & (\PC_Reg_Display[15]~331_combout )))) # (\HID_Register[2]~input_o & (((\HID_Register[1]~input_o )))) ) ) ) # ( !\PC_Reg_Display[15]~333_combout & ( !\PC_Reg_Display[15]~332_combout & +// ( (!\HID_Register[2]~input_o & ((!\HID_Register[1]~input_o & ((\PC_Reg_Display[15]~330_combout ))) # (\HID_Register[1]~input_o & (\PC_Reg_Display[15]~331_combout )))) ) ) ) + + .dataa(!\HID_Register[2]~input_o ), + .datab(!\PC_Reg_Display[15]~331_combout ), + .datac(!\HID_Register[1]~input_o ), + .datad(!\PC_Reg_Display[15]~330_combout ), + .datae(!\PC_Reg_Display[15]~333_combout ), + .dataf(!\PC_Reg_Display[15]~332_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[15]~334_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[15]~334 .extended_lut = "off"; +defparam \PC_Reg_Display[15]~334 .lut_mask = 64'h02A207A752F257F7; +defparam \PC_Reg_Display[15]~334 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X25_Y5_N50 +dffeas \REGS|regs[21][15] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[15]~456_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~16_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[21][15]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[21][15] .is_wysiwyg = "true"; +defparam \REGS|regs[21][15] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X25_Y5_N53 +dffeas \REGS|regs[21][31] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[31]~455_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~16_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[21][31]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[21][31] .is_wysiwyg = "true"; +defparam \REGS|regs[21][31] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X25_Y5_N51 +cyclonev_lcell_comb \PC_Reg_Display[15]~338 ( +// Equation(s): +// \PC_Reg_Display[15]~338_combout = ( \REGS|regs[21][31]~q & ( \REGS|regs[23][31]~q & ( ((!\HID_Register[1]~input_o & ((\REGS|regs[21][15]~q ))) # (\HID_Register[1]~input_o & (\REGS|regs[23][15]~q ))) # (\HID_Hi_Low[0]~input_o ) ) ) ) # ( +// !\REGS|regs[21][31]~q & ( \REGS|regs[23][31]~q & ( (!\HID_Hi_Low[0]~input_o & ((!\HID_Register[1]~input_o & ((\REGS|regs[21][15]~q ))) # (\HID_Register[1]~input_o & (\REGS|regs[23][15]~q )))) # (\HID_Hi_Low[0]~input_o & (((\HID_Register[1]~input_o +// )))) ) ) ) # ( \REGS|regs[21][31]~q & ( !\REGS|regs[23][31]~q & ( (!\HID_Hi_Low[0]~input_o & ((!\HID_Register[1]~input_o & ((\REGS|regs[21][15]~q ))) # (\HID_Register[1]~input_o & (\REGS|regs[23][15]~q )))) # (\HID_Hi_Low[0]~input_o & +// (((!\HID_Register[1]~input_o )))) ) ) ) # ( !\REGS|regs[21][31]~q & ( !\REGS|regs[23][31]~q & ( (!\HID_Hi_Low[0]~input_o & ((!\HID_Register[1]~input_o & ((\REGS|regs[21][15]~q ))) # (\HID_Register[1]~input_o & (\REGS|regs[23][15]~q )))) ) ) ) + + .dataa(!\HID_Hi_Low[0]~input_o ), + .datab(!\REGS|regs[23][15]~q ), + .datac(!\HID_Register[1]~input_o ), + .datad(!\REGS|regs[21][15]~q ), + .datae(!\REGS|regs[21][31]~q ), + .dataf(!\REGS|regs[23][31]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[15]~338_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[15]~338 .extended_lut = "off"; +defparam \PC_Reg_Display[15]~338 .lut_mask = 64'h02A252F207A757F7; +defparam \PC_Reg_Display[15]~338 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X30_Y5_N34 +dffeas \REGS|regs[20][31]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[31]~455_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~7_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[20][31]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[20][31]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[20][31]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X27_Y5_N36 +cyclonev_lcell_comb \PC_Reg_Display[15]~336 ( +// Equation(s): +// \PC_Reg_Display[15]~336_combout = ( \REGS|regs[22][31]~q & ( \REGS|regs[20][31]~DUPLICATE_q & ( ((!\HID_Register[1]~input_o & (\REGS|regs[20][15]~q )) # (\HID_Register[1]~input_o & ((\REGS|regs[22][15]~q )))) # (\HID_Hi_Low[0]~input_o ) ) ) ) # ( +// !\REGS|regs[22][31]~q & ( \REGS|regs[20][31]~DUPLICATE_q & ( (!\HID_Register[1]~input_o & (((\HID_Hi_Low[0]~input_o )) # (\REGS|regs[20][15]~q ))) # (\HID_Register[1]~input_o & (((\REGS|regs[22][15]~q & !\HID_Hi_Low[0]~input_o )))) ) ) ) # ( +// \REGS|regs[22][31]~q & ( !\REGS|regs[20][31]~DUPLICATE_q & ( (!\HID_Register[1]~input_o & (\REGS|regs[20][15]~q & ((!\HID_Hi_Low[0]~input_o )))) # (\HID_Register[1]~input_o & (((\HID_Hi_Low[0]~input_o ) # (\REGS|regs[22][15]~q )))) ) ) ) # ( +// !\REGS|regs[22][31]~q & ( !\REGS|regs[20][31]~DUPLICATE_q & ( (!\HID_Hi_Low[0]~input_o & ((!\HID_Register[1]~input_o & (\REGS|regs[20][15]~q )) # (\HID_Register[1]~input_o & ((\REGS|regs[22][15]~q ))))) ) ) ) + + .dataa(!\REGS|regs[20][15]~q ), + .datab(!\REGS|regs[22][15]~q ), + .datac(!\HID_Register[1]~input_o ), + .datad(!\HID_Hi_Low[0]~input_o ), + .datae(!\REGS|regs[22][31]~q ), + .dataf(!\REGS|regs[20][31]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[15]~336_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[15]~336 .extended_lut = "off"; +defparam \PC_Reg_Display[15]~336 .lut_mask = 64'h5300530F53F053FF; +defparam \PC_Reg_Display[15]~336 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X28_Y9_N57 +cyclonev_lcell_comb \PC_Reg_Display[15]~335 ( +// Equation(s): +// \PC_Reg_Display[15]~335_combout = ( \REGS|regs[18][31]~q & ( \HID_Hi_Low[0]~input_o & ( (\REGS|regs[16][31]~q ) # (\HID_Register[1]~input_o ) ) ) ) # ( !\REGS|regs[18][31]~q & ( \HID_Hi_Low[0]~input_o & ( (!\HID_Register[1]~input_o & +// \REGS|regs[16][31]~q ) ) ) ) # ( \REGS|regs[18][31]~q & ( !\HID_Hi_Low[0]~input_o & ( (!\HID_Register[1]~input_o & (\REGS|regs[16][15]~q )) # (\HID_Register[1]~input_o & ((\REGS|regs[18][15]~q ))) ) ) ) # ( !\REGS|regs[18][31]~q & ( +// !\HID_Hi_Low[0]~input_o & ( (!\HID_Register[1]~input_o & (\REGS|regs[16][15]~q )) # (\HID_Register[1]~input_o & ((\REGS|regs[18][15]~q ))) ) ) ) + + .dataa(!\HID_Register[1]~input_o ), + .datab(!\REGS|regs[16][15]~q ), + .datac(!\REGS|regs[18][15]~q ), + .datad(!\REGS|regs[16][31]~q ), + .datae(!\REGS|regs[18][31]~q ), + .dataf(!\HID_Hi_Low[0]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[15]~335_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[15]~335 .extended_lut = "off"; +defparam \PC_Reg_Display[15]~335 .lut_mask = 64'h2727272700AA55FF; +defparam \PC_Reg_Display[15]~335 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X23_Y7_N32 +dffeas \REGS|regs[17][31] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[31]~455_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~11_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[17][31]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[17][31] .is_wysiwyg = "true"; +defparam \REGS|regs[17][31] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X23_Y7_N30 +cyclonev_lcell_comb \PC_Reg_Display[15]~337 ( +// Equation(s): +// \PC_Reg_Display[15]~337_combout = ( \REGS|regs[17][31]~q & ( \HID_Hi_Low[0]~input_o & ( (!\HID_Register[1]~input_o ) # (\REGS|regs[19][31]~q ) ) ) ) # ( !\REGS|regs[17][31]~q & ( \HID_Hi_Low[0]~input_o & ( (\REGS|regs[19][31]~q & +// \HID_Register[1]~input_o ) ) ) ) # ( \REGS|regs[17][31]~q & ( !\HID_Hi_Low[0]~input_o & ( (!\HID_Register[1]~input_o & ((\REGS|regs[17][15]~q ))) # (\HID_Register[1]~input_o & (\REGS|regs[19][15]~q )) ) ) ) # ( !\REGS|regs[17][31]~q & ( +// !\HID_Hi_Low[0]~input_o & ( (!\HID_Register[1]~input_o & ((\REGS|regs[17][15]~q ))) # (\HID_Register[1]~input_o & (\REGS|regs[19][15]~q )) ) ) ) + + .dataa(!\REGS|regs[19][31]~q ), + .datab(!\REGS|regs[19][15]~q ), + .datac(!\HID_Register[1]~input_o ), + .datad(!\REGS|regs[17][15]~q ), + .datae(!\REGS|regs[17][31]~q ), + .dataf(!\HID_Hi_Low[0]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[15]~337_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[15]~337 .extended_lut = "off"; +defparam \PC_Reg_Display[15]~337 .lut_mask = 64'h03F303F30505F5F5; +defparam \PC_Reg_Display[15]~337 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X22_Y5_N42 +cyclonev_lcell_comb \PC_Reg_Display[15]~339 ( +// Equation(s): +// \PC_Reg_Display[15]~339_combout = ( \HID_Register[2]~input_o & ( \PC_Reg_Display[15]~337_combout & ( (!\HID_Register[0]~input_o & ((\PC_Reg_Display[15]~336_combout ))) # (\HID_Register[0]~input_o & (\PC_Reg_Display[15]~338_combout )) ) ) ) # ( +// !\HID_Register[2]~input_o & ( \PC_Reg_Display[15]~337_combout & ( (\HID_Register[0]~input_o ) # (\PC_Reg_Display[15]~335_combout ) ) ) ) # ( \HID_Register[2]~input_o & ( !\PC_Reg_Display[15]~337_combout & ( (!\HID_Register[0]~input_o & +// ((\PC_Reg_Display[15]~336_combout ))) # (\HID_Register[0]~input_o & (\PC_Reg_Display[15]~338_combout )) ) ) ) # ( !\HID_Register[2]~input_o & ( !\PC_Reg_Display[15]~337_combout & ( (\PC_Reg_Display[15]~335_combout & !\HID_Register[0]~input_o ) ) ) ) + + .dataa(!\PC_Reg_Display[15]~338_combout ), + .datab(!\PC_Reg_Display[15]~336_combout ), + .datac(!\PC_Reg_Display[15]~335_combout ), + .datad(!\HID_Register[0]~input_o ), + .datae(!\HID_Register[2]~input_o ), + .dataf(!\PC_Reg_Display[15]~337_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[15]~339_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[15]~339 .extended_lut = "off"; +defparam \PC_Reg_Display[15]~339 .lut_mask = 64'h0F0033550FFF3355; +defparam \PC_Reg_Display[15]~339 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X27_Y9_N9 +cyclonev_lcell_comb \PC_Reg_Display[15]~348 ( +// Equation(s): +// \PC_Reg_Display[15]~348_combout = ( \REGS|regs[31][31]~q & ( \REGS|regs[30][31]~q & ( ((!\HID_Register[0]~input_o & (\REGS|regs[26][31]~q )) # (\HID_Register[0]~input_o & ((\REGS|regs[27][31]~q )))) # (\HID_Register[2]~input_o ) ) ) ) # ( +// !\REGS|regs[31][31]~q & ( \REGS|regs[30][31]~q & ( (!\HID_Register[2]~input_o & ((!\HID_Register[0]~input_o & (\REGS|regs[26][31]~q )) # (\HID_Register[0]~input_o & ((\REGS|regs[27][31]~q ))))) # (\HID_Register[2]~input_o & +// (((!\HID_Register[0]~input_o )))) ) ) ) # ( \REGS|regs[31][31]~q & ( !\REGS|regs[30][31]~q & ( (!\HID_Register[2]~input_o & ((!\HID_Register[0]~input_o & (\REGS|regs[26][31]~q )) # (\HID_Register[0]~input_o & ((\REGS|regs[27][31]~q ))))) # +// (\HID_Register[2]~input_o & (((\HID_Register[0]~input_o )))) ) ) ) # ( !\REGS|regs[31][31]~q & ( !\REGS|regs[30][31]~q & ( (!\HID_Register[2]~input_o & ((!\HID_Register[0]~input_o & (\REGS|regs[26][31]~q )) # (\HID_Register[0]~input_o & +// ((\REGS|regs[27][31]~q ))))) ) ) ) + + .dataa(!\HID_Register[2]~input_o ), + .datab(!\REGS|regs[26][31]~q ), + .datac(!\HID_Register[0]~input_o ), + .datad(!\REGS|regs[27][31]~q ), + .datae(!\REGS|regs[31][31]~q ), + .dataf(!\REGS|regs[30][31]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[15]~348_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[15]~348 .extended_lut = "off"; +defparam \PC_Reg_Display[15]~348 .lut_mask = 64'h202A252F707A757F; +defparam \PC_Reg_Display[15]~348 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X30_Y10_N10 +dffeas \REGS|regs[27][15] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[27][15]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~15_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[27][15]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[27][15] .is_wysiwyg = "true"; +defparam \REGS|regs[27][15] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X30_Y8_N40 +dffeas \REGS|regs[30][15] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[15]~456_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~10_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[30][15]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[30][15] .is_wysiwyg = "true"; +defparam \REGS|regs[30][15] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X30_Y5_N39 +cyclonev_lcell_comb \PC_Reg_Display[15]~347 ( +// Equation(s): +// \PC_Reg_Display[15]~347_combout = ( \HID_Register[2]~input_o & ( \REGS|regs[31][15]~q & ( (\HID_Register[0]~input_o ) # (\REGS|regs[30][15]~q ) ) ) ) # ( !\HID_Register[2]~input_o & ( \REGS|regs[31][15]~q & ( (!\HID_Register[0]~input_o & +// ((\REGS|regs[26][15]~q ))) # (\HID_Register[0]~input_o & (\REGS|regs[27][15]~q )) ) ) ) # ( \HID_Register[2]~input_o & ( !\REGS|regs[31][15]~q & ( (\REGS|regs[30][15]~q & !\HID_Register[0]~input_o ) ) ) ) # ( !\HID_Register[2]~input_o & ( +// !\REGS|regs[31][15]~q & ( (!\HID_Register[0]~input_o & ((\REGS|regs[26][15]~q ))) # (\HID_Register[0]~input_o & (\REGS|regs[27][15]~q )) ) ) ) + + .dataa(!\REGS|regs[27][15]~q ), + .datab(!\REGS|regs[30][15]~q ), + .datac(!\REGS|regs[26][15]~q ), + .datad(!\HID_Register[0]~input_o ), + .datae(!\HID_Register[2]~input_o ), + .dataf(!\REGS|regs[31][15]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[15]~347_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[15]~347 .extended_lut = "off"; +defparam \PC_Reg_Display[15]~347 .lut_mask = 64'h0F5533000F5533FF; +defparam \PC_Reg_Display[15]~347 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X30_Y5_N54 +cyclonev_lcell_comb \PC_Reg_Display[15]~346 ( +// Equation(s): +// \PC_Reg_Display[15]~346_combout = ( \REGS|regs[28][31]~q & ( \HID_Register[0]~input_o & ( (!\HID_Register[2]~input_o & (\REGS|regs[25][31]~q )) # (\HID_Register[2]~input_o & ((\REGS|regs[29][31]~q ))) ) ) ) # ( !\REGS|regs[28][31]~q & ( +// \HID_Register[0]~input_o & ( (!\HID_Register[2]~input_o & (\REGS|regs[25][31]~q )) # (\HID_Register[2]~input_o & ((\REGS|regs[29][31]~q ))) ) ) ) # ( \REGS|regs[28][31]~q & ( !\HID_Register[0]~input_o & ( (\REGS|regs[24][31]~q ) # +// (\HID_Register[2]~input_o ) ) ) ) # ( !\REGS|regs[28][31]~q & ( !\HID_Register[0]~input_o & ( (!\HID_Register[2]~input_o & \REGS|regs[24][31]~q ) ) ) ) + + .dataa(!\REGS|regs[25][31]~q ), + .datab(!\REGS|regs[29][31]~q ), + .datac(!\HID_Register[2]~input_o ), + .datad(!\REGS|regs[24][31]~q ), + .datae(!\REGS|regs[28][31]~q ), + .dataf(!\HID_Register[0]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[15]~346_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[15]~346 .extended_lut = "off"; +defparam \PC_Reg_Display[15]~346 .lut_mask = 64'h00F00FFF53535353; +defparam \PC_Reg_Display[15]~346 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X30_Y8_N58 +dffeas \REGS|regs[29][15]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[15]~456_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~17_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[29][15]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[29][15]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[29][15]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y10_N59 +dffeas \REGS|regs[25][15] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[15]~456_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~13_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[25][15]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[25][15] .is_wysiwyg = "true"; +defparam \REGS|regs[25][15] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X27_Y10_N39 +cyclonev_lcell_comb \REGS|regs[24][15]~feeder ( +// Equation(s): +// \REGS|regs[24][15]~feeder_combout = ( \rd[15]~456_combout ) + + .dataa(gnd), + .datab(gnd), + .datac(gnd), + .datad(gnd), + .datae(gnd), + .dataf(!\rd[15]~456_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\REGS|regs[24][15]~feeder_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \REGS|regs[24][15]~feeder .extended_lut = "off"; +defparam \REGS|regs[24][15]~feeder .lut_mask = 64'h00000000FFFFFFFF; +defparam \REGS|regs[24][15]~feeder .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X27_Y10_N41 +dffeas \REGS|regs[24][15] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[24][15]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~4_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[24][15]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[24][15] .is_wysiwyg = "true"; +defparam \REGS|regs[24][15] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X27_Y10_N57 +cyclonev_lcell_comb \PC_Reg_Display[15]~345 ( +// Equation(s): +// \PC_Reg_Display[15]~345_combout = ( \REGS|regs[25][15]~q & ( \REGS|regs[24][15]~q & ( (!\HID_Register[2]~input_o ) # ((!\HID_Register[0]~input_o & (\REGS|regs[28][15]~q )) # (\HID_Register[0]~input_o & ((\REGS|regs[29][15]~DUPLICATE_q )))) ) ) ) # ( +// !\REGS|regs[25][15]~q & ( \REGS|regs[24][15]~q & ( (!\HID_Register[2]~input_o & (((!\HID_Register[0]~input_o )))) # (\HID_Register[2]~input_o & ((!\HID_Register[0]~input_o & (\REGS|regs[28][15]~q )) # (\HID_Register[0]~input_o & +// ((\REGS|regs[29][15]~DUPLICATE_q ))))) ) ) ) # ( \REGS|regs[25][15]~q & ( !\REGS|regs[24][15]~q & ( (!\HID_Register[2]~input_o & (((\HID_Register[0]~input_o )))) # (\HID_Register[2]~input_o & ((!\HID_Register[0]~input_o & (\REGS|regs[28][15]~q )) # +// (\HID_Register[0]~input_o & ((\REGS|regs[29][15]~DUPLICATE_q ))))) ) ) ) # ( !\REGS|regs[25][15]~q & ( !\REGS|regs[24][15]~q & ( (\HID_Register[2]~input_o & ((!\HID_Register[0]~input_o & (\REGS|regs[28][15]~q )) # (\HID_Register[0]~input_o & +// ((\REGS|regs[29][15]~DUPLICATE_q ))))) ) ) ) + + .dataa(!\HID_Register[2]~input_o ), + .datab(!\REGS|regs[28][15]~q ), + .datac(!\REGS|regs[29][15]~DUPLICATE_q ), + .datad(!\HID_Register[0]~input_o ), + .datae(!\REGS|regs[25][15]~q ), + .dataf(!\REGS|regs[24][15]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[15]~345_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[15]~345 .extended_lut = "off"; +defparam \PC_Reg_Display[15]~345 .lut_mask = 64'h110511AFBB05BBAF; +defparam \PC_Reg_Display[15]~345 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X27_Y5_N30 +cyclonev_lcell_comb \PC_Reg_Display[15]~349 ( +// Equation(s): +// \PC_Reg_Display[15]~349_combout = ( \PC_Reg_Display[15]~346_combout & ( \PC_Reg_Display[15]~345_combout & ( (!\HID_Register[1]~input_o ) # ((!\HID_Hi_Low[0]~input_o & ((\PC_Reg_Display[15]~347_combout ))) # (\HID_Hi_Low[0]~input_o & +// (\PC_Reg_Display[15]~348_combout ))) ) ) ) # ( !\PC_Reg_Display[15]~346_combout & ( \PC_Reg_Display[15]~345_combout & ( (!\HID_Register[1]~input_o & (((!\HID_Hi_Low[0]~input_o )))) # (\HID_Register[1]~input_o & ((!\HID_Hi_Low[0]~input_o & +// ((\PC_Reg_Display[15]~347_combout ))) # (\HID_Hi_Low[0]~input_o & (\PC_Reg_Display[15]~348_combout )))) ) ) ) # ( \PC_Reg_Display[15]~346_combout & ( !\PC_Reg_Display[15]~345_combout & ( (!\HID_Register[1]~input_o & (((\HID_Hi_Low[0]~input_o )))) # +// (\HID_Register[1]~input_o & ((!\HID_Hi_Low[0]~input_o & ((\PC_Reg_Display[15]~347_combout ))) # (\HID_Hi_Low[0]~input_o & (\PC_Reg_Display[15]~348_combout )))) ) ) ) # ( !\PC_Reg_Display[15]~346_combout & ( !\PC_Reg_Display[15]~345_combout & ( +// (\HID_Register[1]~input_o & ((!\HID_Hi_Low[0]~input_o & ((\PC_Reg_Display[15]~347_combout ))) # (\HID_Hi_Low[0]~input_o & (\PC_Reg_Display[15]~348_combout )))) ) ) ) + + .dataa(!\PC_Reg_Display[15]~348_combout ), + .datab(!\HID_Register[1]~input_o ), + .datac(!\PC_Reg_Display[15]~347_combout ), + .datad(!\HID_Hi_Low[0]~input_o ), + .datae(!\PC_Reg_Display[15]~346_combout ), + .dataf(!\PC_Reg_Display[15]~345_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[15]~349_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[15]~349 .extended_lut = "off"; +defparam \PC_Reg_Display[15]~349 .lut_mask = 64'h031103DDCF11CFDD; +defparam \PC_Reg_Display[15]~349 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X30_Y9_N43 +dffeas \REGS|regs[11][31] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[31]~455_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~37_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[11][31]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[11][31] .is_wysiwyg = "true"; +defparam \REGS|regs[11][31] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X30_Y6_N30 +cyclonev_lcell_comb \PC_Reg_Display[15]~343 ( +// Equation(s): +// \PC_Reg_Display[15]~343_combout = ( \REGS|regs[14][31]~q & ( \REGS|regs[10][31]~q & ( (!\HID_Register[0]~input_o ) # ((!\HID_Register[2]~input_o & (\REGS|regs[11][31]~q )) # (\HID_Register[2]~input_o & ((\REGS|regs[15][31]~q )))) ) ) ) # ( +// !\REGS|regs[14][31]~q & ( \REGS|regs[10][31]~q & ( (!\HID_Register[0]~input_o & (!\HID_Register[2]~input_o )) # (\HID_Register[0]~input_o & ((!\HID_Register[2]~input_o & (\REGS|regs[11][31]~q )) # (\HID_Register[2]~input_o & ((\REGS|regs[15][31]~q +// ))))) ) ) ) # ( \REGS|regs[14][31]~q & ( !\REGS|regs[10][31]~q & ( (!\HID_Register[0]~input_o & (\HID_Register[2]~input_o )) # (\HID_Register[0]~input_o & ((!\HID_Register[2]~input_o & (\REGS|regs[11][31]~q )) # (\HID_Register[2]~input_o & +// ((\REGS|regs[15][31]~q ))))) ) ) ) # ( !\REGS|regs[14][31]~q & ( !\REGS|regs[10][31]~q & ( (\HID_Register[0]~input_o & ((!\HID_Register[2]~input_o & (\REGS|regs[11][31]~q )) # (\HID_Register[2]~input_o & ((\REGS|regs[15][31]~q ))))) ) ) ) + + .dataa(!\HID_Register[0]~input_o ), + .datab(!\HID_Register[2]~input_o ), + .datac(!\REGS|regs[11][31]~q ), + .datad(!\REGS|regs[15][31]~q ), + .datae(!\REGS|regs[14][31]~q ), + .dataf(!\REGS|regs[10][31]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[15]~343_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[15]~343 .extended_lut = "off"; +defparam \PC_Reg_Display[15]~343 .lut_mask = 64'h041526378C9DAEBF; +defparam \PC_Reg_Display[15]~343 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X27_Y10_N12 +cyclonev_lcell_comb \PC_Reg_Display[15]~342 ( +// Equation(s): +// \PC_Reg_Display[15]~342_combout = ( \REGS|regs[14][15]~q & ( \REGS|regs[11][15]~q & ( (!\HID_Register[0]~input_o & (((\REGS|regs[10][15]~q ) # (\HID_Register[2]~input_o )))) # (\HID_Register[0]~input_o & (((!\HID_Register[2]~input_o )) # +// (\REGS|regs[15][15]~q ))) ) ) ) # ( !\REGS|regs[14][15]~q & ( \REGS|regs[11][15]~q & ( (!\HID_Register[0]~input_o & (((!\HID_Register[2]~input_o & \REGS|regs[10][15]~q )))) # (\HID_Register[0]~input_o & (((!\HID_Register[2]~input_o )) # +// (\REGS|regs[15][15]~q ))) ) ) ) # ( \REGS|regs[14][15]~q & ( !\REGS|regs[11][15]~q & ( (!\HID_Register[0]~input_o & (((\REGS|regs[10][15]~q ) # (\HID_Register[2]~input_o )))) # (\HID_Register[0]~input_o & (\REGS|regs[15][15]~q & +// (\HID_Register[2]~input_o ))) ) ) ) # ( !\REGS|regs[14][15]~q & ( !\REGS|regs[11][15]~q & ( (!\HID_Register[0]~input_o & (((!\HID_Register[2]~input_o & \REGS|regs[10][15]~q )))) # (\HID_Register[0]~input_o & (\REGS|regs[15][15]~q & +// (\HID_Register[2]~input_o ))) ) ) ) + + .dataa(!\HID_Register[0]~input_o ), + .datab(!\REGS|regs[15][15]~q ), + .datac(!\HID_Register[2]~input_o ), + .datad(!\REGS|regs[10][15]~q ), + .datae(!\REGS|regs[14][15]~q ), + .dataf(!\REGS|regs[11][15]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[15]~342_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[15]~342 .extended_lut = "off"; +defparam \PC_Reg_Display[15]~342 .lut_mask = 64'h01A10BAB51F15BFB; +defparam \PC_Reg_Display[15]~342 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X30_Y12_N26 +dffeas \REGS|regs[13][15] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[13][15]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~31_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[13][15]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[13][15] .is_wysiwyg = "true"; +defparam \REGS|regs[13][15] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X30_Y12_N48 +cyclonev_lcell_comb \PC_Reg_Display[15]~340 ( +// Equation(s): +// \PC_Reg_Display[15]~340_combout = ( \REGS|regs[12][15]~q & ( \HID_Register[2]~input_o & ( (!\HID_Register[0]~input_o ) # (\REGS|regs[13][15]~q ) ) ) ) # ( !\REGS|regs[12][15]~q & ( \HID_Register[2]~input_o & ( (\HID_Register[0]~input_o & +// \REGS|regs[13][15]~q ) ) ) ) # ( \REGS|regs[12][15]~q & ( !\HID_Register[2]~input_o & ( (!\HID_Register[0]~input_o & (\REGS|regs[8][15]~q )) # (\HID_Register[0]~input_o & ((\REGS|regs[9][15]~q ))) ) ) ) # ( !\REGS|regs[12][15]~q & ( +// !\HID_Register[2]~input_o & ( (!\HID_Register[0]~input_o & (\REGS|regs[8][15]~q )) # (\HID_Register[0]~input_o & ((\REGS|regs[9][15]~q ))) ) ) ) + + .dataa(!\REGS|regs[8][15]~q ), + .datab(!\HID_Register[0]~input_o ), + .datac(!\REGS|regs[13][15]~q ), + .datad(!\REGS|regs[9][15]~q ), + .datae(!\REGS|regs[12][15]~q ), + .dataf(!\HID_Register[2]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[15]~340_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[15]~340 .extended_lut = "off"; +defparam \PC_Reg_Display[15]~340 .lut_mask = 64'h447744770303CFCF; +defparam \PC_Reg_Display[15]~340 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X33_Y9_N28 +dffeas \REGS|regs[9][31] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[31]~455_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~29_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[9][31]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[9][31] .is_wysiwyg = "true"; +defparam \REGS|regs[9][31] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X25_Y7_N12 +cyclonev_lcell_comb \PC_Reg_Display[15]~341 ( +// Equation(s): +// \PC_Reg_Display[15]~341_combout = ( \REGS|regs[13][31]~q & ( \HID_Register[0]~input_o & ( (\HID_Register[2]~input_o ) # (\REGS|regs[9][31]~q ) ) ) ) # ( !\REGS|regs[13][31]~q & ( \HID_Register[0]~input_o & ( (\REGS|regs[9][31]~q & +// !\HID_Register[2]~input_o ) ) ) ) # ( \REGS|regs[13][31]~q & ( !\HID_Register[0]~input_o & ( (!\HID_Register[2]~input_o & ((\REGS|regs[8][31]~q ))) # (\HID_Register[2]~input_o & (\REGS|regs[12][31]~q )) ) ) ) # ( !\REGS|regs[13][31]~q & ( +// !\HID_Register[0]~input_o & ( (!\HID_Register[2]~input_o & ((\REGS|regs[8][31]~q ))) # (\HID_Register[2]~input_o & (\REGS|regs[12][31]~q )) ) ) ) + + .dataa(!\REGS|regs[9][31]~q ), + .datab(!\REGS|regs[12][31]~q ), + .datac(!\REGS|regs[8][31]~q ), + .datad(!\HID_Register[2]~input_o ), + .datae(!\REGS|regs[13][31]~q ), + .dataf(!\HID_Register[0]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[15]~341_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[15]~341 .extended_lut = "off"; +defparam \PC_Reg_Display[15]~341 .lut_mask = 64'h0F330F33550055FF; +defparam \PC_Reg_Display[15]~341 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X27_Y10_N42 +cyclonev_lcell_comb \PC_Reg_Display[15]~344 ( +// Equation(s): +// \PC_Reg_Display[15]~344_combout = ( \PC_Reg_Display[15]~341_combout & ( \HID_Register[1]~input_o & ( (!\HID_Hi_Low[0]~input_o & ((\PC_Reg_Display[15]~342_combout ))) # (\HID_Hi_Low[0]~input_o & (\PC_Reg_Display[15]~343_combout )) ) ) ) # ( +// !\PC_Reg_Display[15]~341_combout & ( \HID_Register[1]~input_o & ( (!\HID_Hi_Low[0]~input_o & ((\PC_Reg_Display[15]~342_combout ))) # (\HID_Hi_Low[0]~input_o & (\PC_Reg_Display[15]~343_combout )) ) ) ) # ( \PC_Reg_Display[15]~341_combout & ( +// !\HID_Register[1]~input_o & ( (\HID_Hi_Low[0]~input_o ) # (\PC_Reg_Display[15]~340_combout ) ) ) ) # ( !\PC_Reg_Display[15]~341_combout & ( !\HID_Register[1]~input_o & ( (\PC_Reg_Display[15]~340_combout & !\HID_Hi_Low[0]~input_o ) ) ) ) + + .dataa(!\PC_Reg_Display[15]~343_combout ), + .datab(!\PC_Reg_Display[15]~342_combout ), + .datac(!\PC_Reg_Display[15]~340_combout ), + .datad(!\HID_Hi_Low[0]~input_o ), + .datae(!\PC_Reg_Display[15]~341_combout ), + .dataf(!\HID_Register[1]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[15]~344_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[15]~344 .extended_lut = "off"; +defparam \PC_Reg_Display[15]~344 .lut_mask = 64'h0F000FFF33553355; +defparam \PC_Reg_Display[15]~344 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X27_Y5_N42 +cyclonev_lcell_comb \PC_Reg_Display[15]~350 ( +// Equation(s): +// \PC_Reg_Display[15]~350_combout = ( \PC_Reg_Display[15]~344_combout & ( \HID_Register[3]~input_o & ( (!\HID_Register[4]~input_o ) # (\PC_Reg_Display[15]~349_combout ) ) ) ) # ( !\PC_Reg_Display[15]~344_combout & ( \HID_Register[3]~input_o & ( +// (\HID_Register[4]~input_o & \PC_Reg_Display[15]~349_combout ) ) ) ) # ( \PC_Reg_Display[15]~344_combout & ( !\HID_Register[3]~input_o & ( (!\HID_Register[4]~input_o & (\PC_Reg_Display[15]~334_combout )) # (\HID_Register[4]~input_o & +// ((\PC_Reg_Display[15]~339_combout ))) ) ) ) # ( !\PC_Reg_Display[15]~344_combout & ( !\HID_Register[3]~input_o & ( (!\HID_Register[4]~input_o & (\PC_Reg_Display[15]~334_combout )) # (\HID_Register[4]~input_o & ((\PC_Reg_Display[15]~339_combout ))) ) ) +// ) + + .dataa(!\PC_Reg_Display[15]~334_combout ), + .datab(!\PC_Reg_Display[15]~339_combout ), + .datac(!\HID_Register[4]~input_o ), + .datad(!\PC_Reg_Display[15]~349_combout ), + .datae(!\PC_Reg_Display[15]~344_combout ), + .dataf(!\HID_Register[3]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[15]~350_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[15]~350 .extended_lut = "off"; +defparam \PC_Reg_Display[15]~350 .lut_mask = 64'h53535353000FF0FF; +defparam \PC_Reg_Display[15]~350 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X36_Y8_N40 +dffeas \PC|pc[15]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\Add0~117_sumout ), + .asdata(vcc), + .clrn(!\rst[0]~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\PC|pc[15]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \PC|pc[15]~DUPLICATE .is_wysiwyg = "true"; +defparam \PC|pc[15]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X36_Y7_N21 +cyclonev_lcell_comb \PC_Reg_Display[15]~351 ( +// Equation(s): +// \PC_Reg_Display[15]~351_combout = ( \PC|pc[15]~DUPLICATE_q & ( (!\HID_PC[0]~input_o & (((\PC_Reg_Display[15]~350_combout )))) # (\HID_PC[0]~input_o & ((!\HID_Hi_Low[0]~input_o ) # ((\PC|pc [31])))) ) ) # ( !\PC|pc[15]~DUPLICATE_q & ( +// (!\HID_PC[0]~input_o & (((\PC_Reg_Display[15]~350_combout )))) # (\HID_PC[0]~input_o & (\HID_Hi_Low[0]~input_o & (\PC|pc [31]))) ) ) + + .dataa(!\HID_PC[0]~input_o ), + .datab(!\HID_Hi_Low[0]~input_o ), + .datac(!\PC|pc [31]), + .datad(!\PC_Reg_Display[15]~350_combout ), + .datae(gnd), + .dataf(!\PC|pc[15]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[15]~351_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[15]~351 .extended_lut = "off"; +defparam \PC_Reg_Display[15]~351 .lut_mask = 64'h01AB01AB45EF45EF; +defparam \PC_Reg_Display[15]~351 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X27_Y10_N29 +dffeas \REGS|regs[24][28] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[28]~449_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~4_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[24][28]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[24][28] .is_wysiwyg = "true"; +defparam \REGS|regs[24][28] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X27_Y10_N26 +dffeas \REGS|regs[24][12] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[12]~450_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~4_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[24][12]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[24][12] .is_wysiwyg = "true"; +defparam \REGS|regs[24][12] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X27_Y10_N24 +cyclonev_lcell_comb \PC_Reg_Display[12]~279 ( +// Equation(s): +// \PC_Reg_Display[12]~279_combout = ( \REGS|regs[24][12]~q & ( \HID_Register[1]~input_o & ( (!\HID_Hi_Low[0]~input_o & (\REGS|regs[26][12]~q )) # (\HID_Hi_Low[0]~input_o & ((\REGS|regs[26][28]~q ))) ) ) ) # ( !\REGS|regs[24][12]~q & ( +// \HID_Register[1]~input_o & ( (!\HID_Hi_Low[0]~input_o & (\REGS|regs[26][12]~q )) # (\HID_Hi_Low[0]~input_o & ((\REGS|regs[26][28]~q ))) ) ) ) # ( \REGS|regs[24][12]~q & ( !\HID_Register[1]~input_o & ( (!\HID_Hi_Low[0]~input_o ) # +// (\REGS|regs[24][28]~q ) ) ) ) # ( !\REGS|regs[24][12]~q & ( !\HID_Register[1]~input_o & ( (\REGS|regs[24][28]~q & \HID_Hi_Low[0]~input_o ) ) ) ) + + .dataa(!\REGS|regs[26][12]~q ), + .datab(!\REGS|regs[26][28]~q ), + .datac(!\REGS|regs[24][28]~q ), + .datad(!\HID_Hi_Low[0]~input_o ), + .datae(!\REGS|regs[24][12]~q ), + .dataf(!\HID_Register[1]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[12]~279_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[12]~279 .extended_lut = "off"; +defparam \PC_Reg_Display[12]~279 .lut_mask = 64'h000FFF0F55335533; +defparam \PC_Reg_Display[12]~279 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X33_Y13_N1 +dffeas \REGS|regs[27][12] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[12]~450_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~15_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[27][12]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[27][12] .is_wysiwyg = "true"; +defparam \REGS|regs[27][12] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X28_Y7_N56 +dffeas \REGS|regs[25][12] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[12]~450_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~13_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[25][12]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[25][12] .is_wysiwyg = "true"; +defparam \REGS|regs[25][12] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X28_Y7_N3 +cyclonev_lcell_comb \PC_Reg_Display[12]~281 ( +// Equation(s): +// \PC_Reg_Display[12]~281_combout = ( \REGS|regs[25][12]~q & ( \HID_Register[1]~input_o & ( (!\HID_Hi_Low[0]~input_o & (\REGS|regs[27][12]~q )) # (\HID_Hi_Low[0]~input_o & ((\REGS|regs[27][28]~q ))) ) ) ) # ( !\REGS|regs[25][12]~q & ( +// \HID_Register[1]~input_o & ( (!\HID_Hi_Low[0]~input_o & (\REGS|regs[27][12]~q )) # (\HID_Hi_Low[0]~input_o & ((\REGS|regs[27][28]~q ))) ) ) ) # ( \REGS|regs[25][12]~q & ( !\HID_Register[1]~input_o & ( (!\HID_Hi_Low[0]~input_o ) # +// (\REGS|regs[25][28]~q ) ) ) ) # ( !\REGS|regs[25][12]~q & ( !\HID_Register[1]~input_o & ( (\HID_Hi_Low[0]~input_o & \REGS|regs[25][28]~q ) ) ) ) + + .dataa(!\REGS|regs[27][12]~q ), + .datab(!\HID_Hi_Low[0]~input_o ), + .datac(!\REGS|regs[25][28]~q ), + .datad(!\REGS|regs[27][28]~q ), + .datae(!\REGS|regs[25][12]~q ), + .dataf(!\HID_Register[1]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[12]~281_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[12]~281 .extended_lut = "off"; +defparam \PC_Reg_Display[12]~281 .lut_mask = 64'h0303CFCF44774477; +defparam \PC_Reg_Display[12]~281 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X32_Y12_N49 +dffeas \REGS|regs[31][12]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[31][12]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~19_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[31][12]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[31][12]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[31][12]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X22_Y9_N54 +cyclonev_lcell_comb \PC_Reg_Display[12]~282 ( +// Equation(s): +// \PC_Reg_Display[12]~282_combout = ( \REGS|regs[31][28]~q & ( \REGS|regs[29][28]~q & ( ((!\HID_Register[1]~input_o & (\REGS|regs[29][12]~q )) # (\HID_Register[1]~input_o & ((\REGS|regs[31][12]~DUPLICATE_q )))) # (\HID_Hi_Low[0]~input_o ) ) ) ) # ( +// !\REGS|regs[31][28]~q & ( \REGS|regs[29][28]~q & ( (!\HID_Hi_Low[0]~input_o & ((!\HID_Register[1]~input_o & (\REGS|regs[29][12]~q )) # (\HID_Register[1]~input_o & ((\REGS|regs[31][12]~DUPLICATE_q ))))) # (\HID_Hi_Low[0]~input_o & +// (((!\HID_Register[1]~input_o )))) ) ) ) # ( \REGS|regs[31][28]~q & ( !\REGS|regs[29][28]~q & ( (!\HID_Hi_Low[0]~input_o & ((!\HID_Register[1]~input_o & (\REGS|regs[29][12]~q )) # (\HID_Register[1]~input_o & ((\REGS|regs[31][12]~DUPLICATE_q ))))) # +// (\HID_Hi_Low[0]~input_o & (((\HID_Register[1]~input_o )))) ) ) ) # ( !\REGS|regs[31][28]~q & ( !\REGS|regs[29][28]~q & ( (!\HID_Hi_Low[0]~input_o & ((!\HID_Register[1]~input_o & (\REGS|regs[29][12]~q )) # (\HID_Register[1]~input_o & +// ((\REGS|regs[31][12]~DUPLICATE_q ))))) ) ) ) + + .dataa(!\REGS|regs[29][12]~q ), + .datab(!\HID_Hi_Low[0]~input_o ), + .datac(!\REGS|regs[31][12]~DUPLICATE_q ), + .datad(!\HID_Register[1]~input_o ), + .datae(!\REGS|regs[31][28]~q ), + .dataf(!\REGS|regs[29][28]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[12]~282_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[12]~282 .extended_lut = "off"; +defparam \PC_Reg_Display[12]~282 .lut_mask = 64'h440C443F770C773F; +defparam \PC_Reg_Display[12]~282 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X28_Y7_N11 +dffeas \REGS|regs[28][12] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[12]~450_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~8_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[28][12]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[28][12] .is_wysiwyg = "true"; +defparam \REGS|regs[28][12] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X28_Y7_N23 +dffeas \REGS|regs[28][28] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[28]~449_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~8_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[28][28]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[28][28] .is_wysiwyg = "true"; +defparam \REGS|regs[28][28] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X28_Y7_N12 +cyclonev_lcell_comb \PC_Reg_Display[12]~280 ( +// Equation(s): +// \PC_Reg_Display[12]~280_combout = ( \HID_Hi_Low[0]~input_o & ( \HID_Register[1]~input_o & ( \REGS|regs[30][28]~q ) ) ) # ( !\HID_Hi_Low[0]~input_o & ( \HID_Register[1]~input_o & ( \REGS|regs[30][12]~q ) ) ) # ( \HID_Hi_Low[0]~input_o & ( +// !\HID_Register[1]~input_o & ( \REGS|regs[28][28]~q ) ) ) # ( !\HID_Hi_Low[0]~input_o & ( !\HID_Register[1]~input_o & ( \REGS|regs[28][12]~q ) ) ) + + .dataa(!\REGS|regs[30][28]~q ), + .datab(!\REGS|regs[28][12]~q ), + .datac(!\REGS|regs[28][28]~q ), + .datad(!\REGS|regs[30][12]~q ), + .datae(!\HID_Hi_Low[0]~input_o ), + .dataf(!\HID_Register[1]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[12]~280_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[12]~280 .extended_lut = "off"; +defparam \PC_Reg_Display[12]~280 .lut_mask = 64'h33330F0F00FF5555; +defparam \PC_Reg_Display[12]~280 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X22_Y9_N48 +cyclonev_lcell_comb \PC_Reg_Display[12]~283 ( +// Equation(s): +// \PC_Reg_Display[12]~283_combout = ( \PC_Reg_Display[12]~282_combout & ( \PC_Reg_Display[12]~280_combout & ( ((!\HID_Register[0]~input_o & (\PC_Reg_Display[12]~279_combout )) # (\HID_Register[0]~input_o & ((\PC_Reg_Display[12]~281_combout )))) # +// (\HID_Register[2]~input_o ) ) ) ) # ( !\PC_Reg_Display[12]~282_combout & ( \PC_Reg_Display[12]~280_combout & ( (!\HID_Register[2]~input_o & ((!\HID_Register[0]~input_o & (\PC_Reg_Display[12]~279_combout )) # (\HID_Register[0]~input_o & +// ((\PC_Reg_Display[12]~281_combout ))))) # (\HID_Register[2]~input_o & (((!\HID_Register[0]~input_o )))) ) ) ) # ( \PC_Reg_Display[12]~282_combout & ( !\PC_Reg_Display[12]~280_combout & ( (!\HID_Register[2]~input_o & ((!\HID_Register[0]~input_o & +// (\PC_Reg_Display[12]~279_combout )) # (\HID_Register[0]~input_o & ((\PC_Reg_Display[12]~281_combout ))))) # (\HID_Register[2]~input_o & (((\HID_Register[0]~input_o )))) ) ) ) # ( !\PC_Reg_Display[12]~282_combout & ( !\PC_Reg_Display[12]~280_combout & +// ( (!\HID_Register[2]~input_o & ((!\HID_Register[0]~input_o & (\PC_Reg_Display[12]~279_combout )) # (\HID_Register[0]~input_o & ((\PC_Reg_Display[12]~281_combout ))))) ) ) ) + + .dataa(!\PC_Reg_Display[12]~279_combout ), + .datab(!\HID_Register[2]~input_o ), + .datac(!\HID_Register[0]~input_o ), + .datad(!\PC_Reg_Display[12]~281_combout ), + .datae(!\PC_Reg_Display[12]~282_combout ), + .dataf(!\PC_Reg_Display[12]~280_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[12]~283_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[12]~283 .extended_lut = "off"; +defparam \PC_Reg_Display[12]~283 .lut_mask = 64'h404C434F707C737F; +defparam \PC_Reg_Display[12]~283 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X33_Y10_N37 +dffeas \REGS|regs[11][12] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[12]~450_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~37_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[11][12]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[11][12] .is_wysiwyg = "true"; +defparam \REGS|regs[11][12] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X28_Y6_N33 +cyclonev_lcell_comb \PC_Reg_Display[12]~276 ( +// Equation(s): +// \PC_Reg_Display[12]~276_combout = ( \REGS|regs[11][28]~q & ( \REGS|regs[9][28]~q & ( ((!\HID_Register[1]~input_o & (\REGS|regs[9][12]~q )) # (\HID_Register[1]~input_o & ((\REGS|regs[11][12]~q )))) # (\HID_Hi_Low[0]~input_o ) ) ) ) # ( +// !\REGS|regs[11][28]~q & ( \REGS|regs[9][28]~q & ( (!\HID_Hi_Low[0]~input_o & ((!\HID_Register[1]~input_o & (\REGS|regs[9][12]~q )) # (\HID_Register[1]~input_o & ((\REGS|regs[11][12]~q ))))) # (\HID_Hi_Low[0]~input_o & (!\HID_Register[1]~input_o )) ) +// ) ) # ( \REGS|regs[11][28]~q & ( !\REGS|regs[9][28]~q & ( (!\HID_Hi_Low[0]~input_o & ((!\HID_Register[1]~input_o & (\REGS|regs[9][12]~q )) # (\HID_Register[1]~input_o & ((\REGS|regs[11][12]~q ))))) # (\HID_Hi_Low[0]~input_o & +// (\HID_Register[1]~input_o )) ) ) ) # ( !\REGS|regs[11][28]~q & ( !\REGS|regs[9][28]~q & ( (!\HID_Hi_Low[0]~input_o & ((!\HID_Register[1]~input_o & (\REGS|regs[9][12]~q )) # (\HID_Register[1]~input_o & ((\REGS|regs[11][12]~q ))))) ) ) ) + + .dataa(!\HID_Hi_Low[0]~input_o ), + .datab(!\HID_Register[1]~input_o ), + .datac(!\REGS|regs[9][12]~q ), + .datad(!\REGS|regs[11][12]~q ), + .datae(!\REGS|regs[11][28]~q ), + .dataf(!\REGS|regs[9][28]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[12]~276_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[12]~276 .extended_lut = "off"; +defparam \PC_Reg_Display[12]~276 .lut_mask = 64'h082A193B4C6E5D7F; +defparam \PC_Reg_Display[12]~276 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X32_Y7_N37 +dffeas \REGS|regs[8][12] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[12]~450_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~24_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[8][12]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[8][12] .is_wysiwyg = "true"; +defparam \REGS|regs[8][12] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X28_Y6_N27 +cyclonev_lcell_comb \PC_Reg_Display[12]~274 ( +// Equation(s): +// \PC_Reg_Display[12]~274_combout = ( \REGS|regs[10][28]~q & ( \REGS|regs[10][12]~q & ( ((!\HID_Hi_Low[0]~input_o & (\REGS|regs[8][12]~q )) # (\HID_Hi_Low[0]~input_o & ((\REGS|regs[8][28]~q )))) # (\HID_Register[1]~input_o ) ) ) ) # ( +// !\REGS|regs[10][28]~q & ( \REGS|regs[10][12]~q & ( (!\HID_Register[1]~input_o & ((!\HID_Hi_Low[0]~input_o & (\REGS|regs[8][12]~q )) # (\HID_Hi_Low[0]~input_o & ((\REGS|regs[8][28]~q ))))) # (\HID_Register[1]~input_o & (((!\HID_Hi_Low[0]~input_o )))) +// ) ) ) # ( \REGS|regs[10][28]~q & ( !\REGS|regs[10][12]~q & ( (!\HID_Register[1]~input_o & ((!\HID_Hi_Low[0]~input_o & (\REGS|regs[8][12]~q )) # (\HID_Hi_Low[0]~input_o & ((\REGS|regs[8][28]~q ))))) # (\HID_Register[1]~input_o & +// (((\HID_Hi_Low[0]~input_o )))) ) ) ) # ( !\REGS|regs[10][28]~q & ( !\REGS|regs[10][12]~q & ( (!\HID_Register[1]~input_o & ((!\HID_Hi_Low[0]~input_o & (\REGS|regs[8][12]~q )) # (\HID_Hi_Low[0]~input_o & ((\REGS|regs[8][28]~q ))))) ) ) ) + + .dataa(!\HID_Register[1]~input_o ), + .datab(!\REGS|regs[8][12]~q ), + .datac(!\REGS|regs[8][28]~q ), + .datad(!\HID_Hi_Low[0]~input_o ), + .datae(!\REGS|regs[10][28]~q ), + .dataf(!\REGS|regs[10][12]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[12]~274_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[12]~274 .extended_lut = "off"; +defparam \PC_Reg_Display[12]~274 .lut_mask = 64'h220A225F770A775F; +defparam \PC_Reg_Display[12]~274 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X32_Y9_N28 +dffeas \REGS|regs[12][28]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[28]~449_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~26_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[12][28]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[12][28]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[12][28]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y6_N0 +cyclonev_lcell_comb \PC_Reg_Display[12]~275 ( +// Equation(s): +// \PC_Reg_Display[12]~275_combout = ( \HID_Register[1]~input_o & ( \REGS|regs[14][28]~q & ( (\HID_Hi_Low[0]~input_o ) # (\REGS|regs[14][12]~q ) ) ) ) # ( !\HID_Register[1]~input_o & ( \REGS|regs[14][28]~q & ( (!\HID_Hi_Low[0]~input_o & +// (\REGS|regs[12][12]~q )) # (\HID_Hi_Low[0]~input_o & ((\REGS|regs[12][28]~DUPLICATE_q ))) ) ) ) # ( \HID_Register[1]~input_o & ( !\REGS|regs[14][28]~q & ( (\REGS|regs[14][12]~q & !\HID_Hi_Low[0]~input_o ) ) ) ) # ( !\HID_Register[1]~input_o & ( +// !\REGS|regs[14][28]~q & ( (!\HID_Hi_Low[0]~input_o & (\REGS|regs[12][12]~q )) # (\HID_Hi_Low[0]~input_o & ((\REGS|regs[12][28]~DUPLICATE_q ))) ) ) ) + + .dataa(!\REGS|regs[14][12]~q ), + .datab(!\REGS|regs[12][12]~q ), + .datac(!\REGS|regs[12][28]~DUPLICATE_q ), + .datad(!\HID_Hi_Low[0]~input_o ), + .datae(!\HID_Register[1]~input_o ), + .dataf(!\REGS|regs[14][28]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[12]~275_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[12]~275 .extended_lut = "off"; +defparam \PC_Reg_Display[12]~275 .lut_mask = 64'h330F5500330F55FF; +defparam \PC_Reg_Display[12]~275 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X28_Y6_N51 +cyclonev_lcell_comb \PC_Reg_Display[12]~277 ( +// Equation(s): +// \PC_Reg_Display[12]~277_combout = ( \REGS|regs[13][12]~q & ( \REGS|regs[15][12]~q & ( (!\HID_Hi_Low[0]~input_o ) # ((!\HID_Register[1]~input_o & ((\REGS|regs[13][28]~q ))) # (\HID_Register[1]~input_o & (\REGS|regs[15][28]~q ))) ) ) ) # ( +// !\REGS|regs[13][12]~q & ( \REGS|regs[15][12]~q & ( (!\HID_Hi_Low[0]~input_o & (((\HID_Register[1]~input_o )))) # (\HID_Hi_Low[0]~input_o & ((!\HID_Register[1]~input_o & ((\REGS|regs[13][28]~q ))) # (\HID_Register[1]~input_o & (\REGS|regs[15][28]~q +// )))) ) ) ) # ( \REGS|regs[13][12]~q & ( !\REGS|regs[15][12]~q & ( (!\HID_Hi_Low[0]~input_o & (((!\HID_Register[1]~input_o )))) # (\HID_Hi_Low[0]~input_o & ((!\HID_Register[1]~input_o & ((\REGS|regs[13][28]~q ))) # (\HID_Register[1]~input_o & +// (\REGS|regs[15][28]~q )))) ) ) ) # ( !\REGS|regs[13][12]~q & ( !\REGS|regs[15][12]~q & ( (\HID_Hi_Low[0]~input_o & ((!\HID_Register[1]~input_o & ((\REGS|regs[13][28]~q ))) # (\HID_Register[1]~input_o & (\REGS|regs[15][28]~q )))) ) ) ) + + .dataa(!\HID_Hi_Low[0]~input_o ), + .datab(!\REGS|regs[15][28]~q ), + .datac(!\REGS|regs[13][28]~q ), + .datad(!\HID_Register[1]~input_o ), + .datae(!\REGS|regs[13][12]~q ), + .dataf(!\REGS|regs[15][12]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[12]~277_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[12]~277 .extended_lut = "off"; +defparam \PC_Reg_Display[12]~277 .lut_mask = 64'h0511AF1105BBAFBB; +defparam \PC_Reg_Display[12]~277 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X28_Y6_N57 +cyclonev_lcell_comb \PC_Reg_Display[12]~278 ( +// Equation(s): +// \PC_Reg_Display[12]~278_combout = ( \PC_Reg_Display[12]~275_combout & ( \PC_Reg_Display[12]~277_combout & ( ((!\HID_Register[0]~input_o & ((\PC_Reg_Display[12]~274_combout ))) # (\HID_Register[0]~input_o & (\PC_Reg_Display[12]~276_combout ))) # +// (\HID_Register[2]~input_o ) ) ) ) # ( !\PC_Reg_Display[12]~275_combout & ( \PC_Reg_Display[12]~277_combout & ( (!\HID_Register[0]~input_o & (((!\HID_Register[2]~input_o & \PC_Reg_Display[12]~274_combout )))) # (\HID_Register[0]~input_o & +// (((\HID_Register[2]~input_o )) # (\PC_Reg_Display[12]~276_combout ))) ) ) ) # ( \PC_Reg_Display[12]~275_combout & ( !\PC_Reg_Display[12]~277_combout & ( (!\HID_Register[0]~input_o & (((\PC_Reg_Display[12]~274_combout ) # (\HID_Register[2]~input_o )))) +// # (\HID_Register[0]~input_o & (\PC_Reg_Display[12]~276_combout & (!\HID_Register[2]~input_o ))) ) ) ) # ( !\PC_Reg_Display[12]~275_combout & ( !\PC_Reg_Display[12]~277_combout & ( (!\HID_Register[2]~input_o & ((!\HID_Register[0]~input_o & +// ((\PC_Reg_Display[12]~274_combout ))) # (\HID_Register[0]~input_o & (\PC_Reg_Display[12]~276_combout )))) ) ) ) + + .dataa(!\PC_Reg_Display[12]~276_combout ), + .datab(!\HID_Register[0]~input_o ), + .datac(!\HID_Register[2]~input_o ), + .datad(!\PC_Reg_Display[12]~274_combout ), + .datae(!\PC_Reg_Display[12]~275_combout ), + .dataf(!\PC_Reg_Display[12]~277_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[12]~278_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[12]~278 .extended_lut = "off"; +defparam \PC_Reg_Display[12]~278 .lut_mask = 64'h10D01CDC13D31FDF; +defparam \PC_Reg_Display[12]~278 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X33_Y13_N54 +cyclonev_lcell_comb \PC_Reg_Display[12]~271 ( +// Equation(s): +// \PC_Reg_Display[12]~271_combout = ( \REGS|regs[22][12]~q & ( \REGS|regs[19][12]~q & ( (!\HID_Register[2]~input_o & (((\HID_Register[0]~input_o ) # (\REGS|regs[18][12]~q )))) # (\HID_Register[2]~input_o & (((!\HID_Register[0]~input_o )) # +// (\REGS|regs[23][12]~q ))) ) ) ) # ( !\REGS|regs[22][12]~q & ( \REGS|regs[19][12]~q & ( (!\HID_Register[2]~input_o & (((\HID_Register[0]~input_o ) # (\REGS|regs[18][12]~q )))) # (\HID_Register[2]~input_o & (\REGS|regs[23][12]~q & +// ((\HID_Register[0]~input_o )))) ) ) ) # ( \REGS|regs[22][12]~q & ( !\REGS|regs[19][12]~q & ( (!\HID_Register[2]~input_o & (((\REGS|regs[18][12]~q & !\HID_Register[0]~input_o )))) # (\HID_Register[2]~input_o & (((!\HID_Register[0]~input_o )) # +// (\REGS|regs[23][12]~q ))) ) ) ) # ( !\REGS|regs[22][12]~q & ( !\REGS|regs[19][12]~q & ( (!\HID_Register[2]~input_o & (((\REGS|regs[18][12]~q & !\HID_Register[0]~input_o )))) # (\HID_Register[2]~input_o & (\REGS|regs[23][12]~q & +// ((\HID_Register[0]~input_o )))) ) ) ) + + .dataa(!\HID_Register[2]~input_o ), + .datab(!\REGS|regs[23][12]~q ), + .datac(!\REGS|regs[18][12]~q ), + .datad(!\HID_Register[0]~input_o ), + .datae(!\REGS|regs[22][12]~q ), + .dataf(!\REGS|regs[19][12]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[12]~271_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[12]~271 .extended_lut = "off"; +defparam \PC_Reg_Display[12]~271 .lut_mask = 64'h0A115F110ABB5FBB; +defparam \PC_Reg_Display[12]~271 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X22_Y9_N44 +dffeas \REGS|regs[21][28] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[28]~449_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~16_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[21][28]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[21][28] .is_wysiwyg = "true"; +defparam \REGS|regs[21][28] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X22_Y9_N17 +dffeas \REGS|regs[17][28] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[28]~449_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~11_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[17][28]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[17][28] .is_wysiwyg = "true"; +defparam \REGS|regs[17][28] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X22_Y9_N42 +cyclonev_lcell_comb \PC_Reg_Display[12]~270 ( +// Equation(s): +// \PC_Reg_Display[12]~270_combout = ( \REGS|regs[21][28]~q & ( \REGS|regs[17][28]~q & ( ((!\HID_Register[2]~input_o & (\REGS|regs[16][28]~q )) # (\HID_Register[2]~input_o & ((\REGS|regs[20][28]~q )))) # (\HID_Register[0]~input_o ) ) ) ) # ( +// !\REGS|regs[21][28]~q & ( \REGS|regs[17][28]~q & ( (!\HID_Register[0]~input_o & ((!\HID_Register[2]~input_o & (\REGS|regs[16][28]~q )) # (\HID_Register[2]~input_o & ((\REGS|regs[20][28]~q ))))) # (\HID_Register[0]~input_o & +// (((!\HID_Register[2]~input_o )))) ) ) ) # ( \REGS|regs[21][28]~q & ( !\REGS|regs[17][28]~q & ( (!\HID_Register[0]~input_o & ((!\HID_Register[2]~input_o & (\REGS|regs[16][28]~q )) # (\HID_Register[2]~input_o & ((\REGS|regs[20][28]~q ))))) # +// (\HID_Register[0]~input_o & (((\HID_Register[2]~input_o )))) ) ) ) # ( !\REGS|regs[21][28]~q & ( !\REGS|regs[17][28]~q & ( (!\HID_Register[0]~input_o & ((!\HID_Register[2]~input_o & (\REGS|regs[16][28]~q )) # (\HID_Register[2]~input_o & +// ((\REGS|regs[20][28]~q ))))) ) ) ) + + .dataa(!\REGS|regs[16][28]~q ), + .datab(!\REGS|regs[20][28]~q ), + .datac(!\HID_Register[0]~input_o ), + .datad(!\HID_Register[2]~input_o ), + .datae(!\REGS|regs[21][28]~q ), + .dataf(!\REGS|regs[17][28]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[12]~270_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[12]~270 .extended_lut = "off"; +defparam \PC_Reg_Display[12]~270 .lut_mask = 64'h5030503F5F305F3F; +defparam \PC_Reg_Display[12]~270 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X22_Y9_N35 +dffeas \REGS|regs[21][12] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[12]~450_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~16_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[21][12]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[21][12] .is_wysiwyg = "true"; +defparam \REGS|regs[21][12] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X22_Y9_N33 +cyclonev_lcell_comb \PC_Reg_Display[12]~269 ( +// Equation(s): +// \PC_Reg_Display[12]~269_combout = ( \REGS|regs[21][12]~q & ( \REGS|regs[16][12]~q & ( (!\HID_Register[2]~input_o & (((!\HID_Register[0]~input_o )) # (\REGS|regs[17][12]~q ))) # (\HID_Register[2]~input_o & (((\HID_Register[0]~input_o ) # +// (\REGS|regs[20][12]~q )))) ) ) ) # ( !\REGS|regs[21][12]~q & ( \REGS|regs[16][12]~q & ( (!\HID_Register[2]~input_o & (((!\HID_Register[0]~input_o )) # (\REGS|regs[17][12]~q ))) # (\HID_Register[2]~input_o & (((\REGS|regs[20][12]~q & +// !\HID_Register[0]~input_o )))) ) ) ) # ( \REGS|regs[21][12]~q & ( !\REGS|regs[16][12]~q & ( (!\HID_Register[2]~input_o & (\REGS|regs[17][12]~q & ((\HID_Register[0]~input_o )))) # (\HID_Register[2]~input_o & (((\HID_Register[0]~input_o ) # +// (\REGS|regs[20][12]~q )))) ) ) ) # ( !\REGS|regs[21][12]~q & ( !\REGS|regs[16][12]~q & ( (!\HID_Register[2]~input_o & (\REGS|regs[17][12]~q & ((\HID_Register[0]~input_o )))) # (\HID_Register[2]~input_o & (((\REGS|regs[20][12]~q & +// !\HID_Register[0]~input_o )))) ) ) ) + + .dataa(!\HID_Register[2]~input_o ), + .datab(!\REGS|regs[17][12]~q ), + .datac(!\REGS|regs[20][12]~q ), + .datad(!\HID_Register[0]~input_o ), + .datae(!\REGS|regs[21][12]~q ), + .dataf(!\REGS|regs[16][12]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[12]~269_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[12]~269 .extended_lut = "off"; +defparam \PC_Reg_Display[12]~269 .lut_mask = 64'h05220577AF22AF77; +defparam \PC_Reg_Display[12]~269 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X31_Y5_N1 +dffeas \REGS|regs[23][28]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[28]~449_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~18_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[23][28]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[23][28]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[23][28]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X30_Y4_N18 +cyclonev_lcell_comb \PC_Reg_Display[12]~272 ( +// Equation(s): +// \PC_Reg_Display[12]~272_combout = ( \REGS|regs[22][28]~q & ( \REGS|regs[23][28]~DUPLICATE_q & ( ((!\HID_Register[0]~input_o & (\REGS|regs[18][28]~q )) # (\HID_Register[0]~input_o & ((\REGS|regs[19][28]~q )))) # (\HID_Register[2]~input_o ) ) ) ) # ( +// !\REGS|regs[22][28]~q & ( \REGS|regs[23][28]~DUPLICATE_q & ( (!\HID_Register[2]~input_o & ((!\HID_Register[0]~input_o & (\REGS|regs[18][28]~q )) # (\HID_Register[0]~input_o & ((\REGS|regs[19][28]~q ))))) # (\HID_Register[2]~input_o & +// (((\HID_Register[0]~input_o )))) ) ) ) # ( \REGS|regs[22][28]~q & ( !\REGS|regs[23][28]~DUPLICATE_q & ( (!\HID_Register[2]~input_o & ((!\HID_Register[0]~input_o & (\REGS|regs[18][28]~q )) # (\HID_Register[0]~input_o & ((\REGS|regs[19][28]~q ))))) # +// (\HID_Register[2]~input_o & (((!\HID_Register[0]~input_o )))) ) ) ) # ( !\REGS|regs[22][28]~q & ( !\REGS|regs[23][28]~DUPLICATE_q & ( (!\HID_Register[2]~input_o & ((!\HID_Register[0]~input_o & (\REGS|regs[18][28]~q )) # (\HID_Register[0]~input_o & +// ((\REGS|regs[19][28]~q ))))) ) ) ) + + .dataa(!\REGS|regs[18][28]~q ), + .datab(!\REGS|regs[19][28]~q ), + .datac(!\HID_Register[2]~input_o ), + .datad(!\HID_Register[0]~input_o ), + .datae(!\REGS|regs[22][28]~q ), + .dataf(!\REGS|regs[23][28]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[12]~272_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[12]~272 .extended_lut = "off"; +defparam \PC_Reg_Display[12]~272 .lut_mask = 64'h50305F30503F5F3F; +defparam \PC_Reg_Display[12]~272 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X22_Y9_N36 +cyclonev_lcell_comb \PC_Reg_Display[12]~273 ( +// Equation(s): +// \PC_Reg_Display[12]~273_combout = ( \HID_Hi_Low[0]~input_o & ( \HID_Register[1]~input_o & ( \PC_Reg_Display[12]~272_combout ) ) ) # ( !\HID_Hi_Low[0]~input_o & ( \HID_Register[1]~input_o & ( \PC_Reg_Display[12]~271_combout ) ) ) # ( +// \HID_Hi_Low[0]~input_o & ( !\HID_Register[1]~input_o & ( \PC_Reg_Display[12]~270_combout ) ) ) # ( !\HID_Hi_Low[0]~input_o & ( !\HID_Register[1]~input_o & ( \PC_Reg_Display[12]~269_combout ) ) ) + + .dataa(!\PC_Reg_Display[12]~271_combout ), + .datab(!\PC_Reg_Display[12]~270_combout ), + .datac(!\PC_Reg_Display[12]~269_combout ), + .datad(!\PC_Reg_Display[12]~272_combout ), + .datae(!\HID_Hi_Low[0]~input_o ), + .dataf(!\HID_Register[1]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[12]~273_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[12]~273 .extended_lut = "off"; +defparam \PC_Reg_Display[12]~273 .lut_mask = 64'h0F0F3333555500FF; +defparam \PC_Reg_Display[12]~273 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X30_Y7_N54 +cyclonev_lcell_comb \PC_Reg_Display[12]~264 ( +// Equation(s): +// \PC_Reg_Display[12]~264_combout = ( \REGS|regs[1][12]~q & ( (\HID_Register[0]~input_o & ((!\HID_Hi_Low[0]~input_o ) # (\REGS|regs[1][28]~q ))) ) ) # ( !\REGS|regs[1][12]~q & ( (\REGS|regs[1][28]~q & (\HID_Register[0]~input_o & \HID_Hi_Low[0]~input_o +// )) ) ) + + .dataa(gnd), + .datab(!\REGS|regs[1][28]~q ), + .datac(!\HID_Register[0]~input_o ), + .datad(!\HID_Hi_Low[0]~input_o ), + .datae(!\REGS|regs[1][12]~q ), + .dataf(gnd), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[12]~264_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[12]~264 .extended_lut = "off"; +defparam \PC_Reg_Display[12]~264 .lut_mask = 64'h00030F0300030F03; +defparam \PC_Reg_Display[12]~264 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X32_Y9_N47 +dffeas \REGS|regs[5][12] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[12]~450_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~30_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[5][12]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[5][12] .is_wysiwyg = "true"; +defparam \REGS|regs[5][12] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X32_Y9_N42 +cyclonev_lcell_comb \PC_Reg_Display[12]~266 ( +// Equation(s): +// \PC_Reg_Display[12]~266_combout = ( \REGS|regs[5][28]~q & ( \REGS|regs[4][28]~q & ( ((!\HID_Register[0]~input_o & ((\REGS|regs[4][12]~q ))) # (\HID_Register[0]~input_o & (\REGS|regs[5][12]~q ))) # (\HID_Hi_Low[0]~input_o ) ) ) ) # ( +// !\REGS|regs[5][28]~q & ( \REGS|regs[4][28]~q & ( (!\HID_Hi_Low[0]~input_o & ((!\HID_Register[0]~input_o & ((\REGS|regs[4][12]~q ))) # (\HID_Register[0]~input_o & (\REGS|regs[5][12]~q )))) # (\HID_Hi_Low[0]~input_o & (((!\HID_Register[0]~input_o )))) +// ) ) ) # ( \REGS|regs[5][28]~q & ( !\REGS|regs[4][28]~q & ( (!\HID_Hi_Low[0]~input_o & ((!\HID_Register[0]~input_o & ((\REGS|regs[4][12]~q ))) # (\HID_Register[0]~input_o & (\REGS|regs[5][12]~q )))) # (\HID_Hi_Low[0]~input_o & +// (((\HID_Register[0]~input_o )))) ) ) ) # ( !\REGS|regs[5][28]~q & ( !\REGS|regs[4][28]~q & ( (!\HID_Hi_Low[0]~input_o & ((!\HID_Register[0]~input_o & ((\REGS|regs[4][12]~q ))) # (\HID_Register[0]~input_o & (\REGS|regs[5][12]~q )))) ) ) ) + + .dataa(!\HID_Hi_Low[0]~input_o ), + .datab(!\REGS|regs[5][12]~q ), + .datac(!\REGS|regs[4][12]~q ), + .datad(!\HID_Register[0]~input_o ), + .datae(!\REGS|regs[5][28]~q ), + .dataf(!\REGS|regs[4][28]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[12]~266_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[12]~266 .extended_lut = "off"; +defparam \PC_Reg_Display[12]~266 .lut_mask = 64'h0A220A775F225F77; +defparam \PC_Reg_Display[12]~266 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X32_Y6_N4 +dffeas \REGS|regs[6][28]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[28]~449_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~34_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[6][28]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[6][28]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[6][28]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: FF_X23_Y10_N8 +dffeas \REGS|regs[7][28] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[28]~449_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~38_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[7][28]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[7][28] .is_wysiwyg = "true"; +defparam \REGS|regs[7][28] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X23_Y10_N11 +dffeas \REGS|regs[7][12] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[12]~450_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~38_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[7][12]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[7][12] .is_wysiwyg = "true"; +defparam \REGS|regs[7][12] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X23_Y10_N6 +cyclonev_lcell_comb \PC_Reg_Display[12]~267 ( +// Equation(s): +// \PC_Reg_Display[12]~267_combout = ( \REGS|regs[7][28]~q & ( \REGS|regs[7][12]~q & ( ((!\HID_Hi_Low[0]~input_o & (\REGS|regs[6][12]~q )) # (\HID_Hi_Low[0]~input_o & ((\REGS|regs[6][28]~DUPLICATE_q )))) # (\HID_Register[0]~input_o ) ) ) ) # ( +// !\REGS|regs[7][28]~q & ( \REGS|regs[7][12]~q & ( (!\HID_Hi_Low[0]~input_o & (((\REGS|regs[6][12]~q )) # (\HID_Register[0]~input_o ))) # (\HID_Hi_Low[0]~input_o & (!\HID_Register[0]~input_o & ((\REGS|regs[6][28]~DUPLICATE_q )))) ) ) ) # ( +// \REGS|regs[7][28]~q & ( !\REGS|regs[7][12]~q & ( (!\HID_Hi_Low[0]~input_o & (!\HID_Register[0]~input_o & (\REGS|regs[6][12]~q ))) # (\HID_Hi_Low[0]~input_o & (((\REGS|regs[6][28]~DUPLICATE_q )) # (\HID_Register[0]~input_o ))) ) ) ) # ( +// !\REGS|regs[7][28]~q & ( !\REGS|regs[7][12]~q & ( (!\HID_Register[0]~input_o & ((!\HID_Hi_Low[0]~input_o & (\REGS|regs[6][12]~q )) # (\HID_Hi_Low[0]~input_o & ((\REGS|regs[6][28]~DUPLICATE_q ))))) ) ) ) + + .dataa(!\HID_Hi_Low[0]~input_o ), + .datab(!\HID_Register[0]~input_o ), + .datac(!\REGS|regs[6][12]~q ), + .datad(!\REGS|regs[6][28]~DUPLICATE_q ), + .datae(!\REGS|regs[7][28]~q ), + .dataf(!\REGS|regs[7][12]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[12]~267_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[12]~267 .extended_lut = "off"; +defparam \PC_Reg_Display[12]~267 .lut_mask = 64'h084C195D2A6E3B7F; +defparam \PC_Reg_Display[12]~267 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X28_Y8_N19 +dffeas \REGS|regs[2][28]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\REGS|regs[2][28]~feeder_combout ), + .asdata(vcc), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(\REGS|Decoder0~32_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[2][28]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[2][28]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[2][28]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: FF_X31_Y10_N5 +dffeas \REGS|regs[2][12] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[12]~450_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~32_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[2][12]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[2][12] .is_wysiwyg = "true"; +defparam \REGS|regs[2][12] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X23_Y10_N14 +dffeas \REGS|regs[3][28] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[28]~449_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~36_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[3][28]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[3][28] .is_wysiwyg = "true"; +defparam \REGS|regs[3][28] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X23_Y10_N17 +dffeas \REGS|regs[3][12] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[12]~450_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~36_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[3][12]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[3][12] .is_wysiwyg = "true"; +defparam \REGS|regs[3][12] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X23_Y10_N12 +cyclonev_lcell_comb \PC_Reg_Display[12]~265 ( +// Equation(s): +// \PC_Reg_Display[12]~265_combout = ( \REGS|regs[3][28]~q & ( \REGS|regs[3][12]~q & ( ((!\HID_Hi_Low[0]~input_o & ((\REGS|regs[2][12]~q ))) # (\HID_Hi_Low[0]~input_o & (\REGS|regs[2][28]~DUPLICATE_q ))) # (\HID_Register[0]~input_o ) ) ) ) # ( +// !\REGS|regs[3][28]~q & ( \REGS|regs[3][12]~q & ( (!\HID_Hi_Low[0]~input_o & (((\HID_Register[0]~input_o ) # (\REGS|regs[2][12]~q )))) # (\HID_Hi_Low[0]~input_o & (\REGS|regs[2][28]~DUPLICATE_q & ((!\HID_Register[0]~input_o )))) ) ) ) # ( +// \REGS|regs[3][28]~q & ( !\REGS|regs[3][12]~q & ( (!\HID_Hi_Low[0]~input_o & (((\REGS|regs[2][12]~q & !\HID_Register[0]~input_o )))) # (\HID_Hi_Low[0]~input_o & (((\HID_Register[0]~input_o )) # (\REGS|regs[2][28]~DUPLICATE_q ))) ) ) ) # ( +// !\REGS|regs[3][28]~q & ( !\REGS|regs[3][12]~q & ( (!\HID_Register[0]~input_o & ((!\HID_Hi_Low[0]~input_o & ((\REGS|regs[2][12]~q ))) # (\HID_Hi_Low[0]~input_o & (\REGS|regs[2][28]~DUPLICATE_q )))) ) ) ) + + .dataa(!\REGS|regs[2][28]~DUPLICATE_q ), + .datab(!\REGS|regs[2][12]~q ), + .datac(!\HID_Hi_Low[0]~input_o ), + .datad(!\HID_Register[0]~input_o ), + .datae(!\REGS|regs[3][28]~q ), + .dataf(!\REGS|regs[3][12]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[12]~265_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[12]~265 .extended_lut = "off"; +defparam \PC_Reg_Display[12]~265 .lut_mask = 64'h3500350F35F035FF; +defparam \PC_Reg_Display[12]~265 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X22_Y9_N24 +cyclonev_lcell_comb \PC_Reg_Display[12]~268 ( +// Equation(s): +// \PC_Reg_Display[12]~268_combout = ( \PC_Reg_Display[12]~267_combout & ( \PC_Reg_Display[12]~265_combout & ( ((!\HID_Register[2]~input_o & (\PC_Reg_Display[12]~264_combout )) # (\HID_Register[2]~input_o & ((\PC_Reg_Display[12]~266_combout )))) # +// (\HID_Register[1]~input_o ) ) ) ) # ( !\PC_Reg_Display[12]~267_combout & ( \PC_Reg_Display[12]~265_combout & ( (!\HID_Register[2]~input_o & (((\HID_Register[1]~input_o )) # (\PC_Reg_Display[12]~264_combout ))) # (\HID_Register[2]~input_o & +// (((\PC_Reg_Display[12]~266_combout & !\HID_Register[1]~input_o )))) ) ) ) # ( \PC_Reg_Display[12]~267_combout & ( !\PC_Reg_Display[12]~265_combout & ( (!\HID_Register[2]~input_o & (\PC_Reg_Display[12]~264_combout & ((!\HID_Register[1]~input_o )))) # +// (\HID_Register[2]~input_o & (((\HID_Register[1]~input_o ) # (\PC_Reg_Display[12]~266_combout )))) ) ) ) # ( !\PC_Reg_Display[12]~267_combout & ( !\PC_Reg_Display[12]~265_combout & ( (!\HID_Register[1]~input_o & ((!\HID_Register[2]~input_o & +// (\PC_Reg_Display[12]~264_combout )) # (\HID_Register[2]~input_o & ((\PC_Reg_Display[12]~266_combout ))))) ) ) ) + + .dataa(!\PC_Reg_Display[12]~264_combout ), + .datab(!\HID_Register[2]~input_o ), + .datac(!\PC_Reg_Display[12]~266_combout ), + .datad(!\HID_Register[1]~input_o ), + .datae(!\PC_Reg_Display[12]~267_combout ), + .dataf(!\PC_Reg_Display[12]~265_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[12]~268_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[12]~268 .extended_lut = "off"; +defparam \PC_Reg_Display[12]~268 .lut_mask = 64'h4700473347CC47FF; +defparam \PC_Reg_Display[12]~268 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X22_Y9_N18 +cyclonev_lcell_comb \PC_Reg_Display[12]~284 ( +// Equation(s): +// \PC_Reg_Display[12]~284_combout = ( \PC_Reg_Display[12]~273_combout & ( \PC_Reg_Display[12]~268_combout & ( (!\HID_Register[3]~input_o ) # ((!\HID_Register[4]~input_o & ((\PC_Reg_Display[12]~278_combout ))) # (\HID_Register[4]~input_o & +// (\PC_Reg_Display[12]~283_combout ))) ) ) ) # ( !\PC_Reg_Display[12]~273_combout & ( \PC_Reg_Display[12]~268_combout & ( (!\HID_Register[3]~input_o & (!\HID_Register[4]~input_o )) # (\HID_Register[3]~input_o & ((!\HID_Register[4]~input_o & +// ((\PC_Reg_Display[12]~278_combout ))) # (\HID_Register[4]~input_o & (\PC_Reg_Display[12]~283_combout )))) ) ) ) # ( \PC_Reg_Display[12]~273_combout & ( !\PC_Reg_Display[12]~268_combout & ( (!\HID_Register[3]~input_o & (\HID_Register[4]~input_o )) # +// (\HID_Register[3]~input_o & ((!\HID_Register[4]~input_o & ((\PC_Reg_Display[12]~278_combout ))) # (\HID_Register[4]~input_o & (\PC_Reg_Display[12]~283_combout )))) ) ) ) # ( !\PC_Reg_Display[12]~273_combout & ( !\PC_Reg_Display[12]~268_combout & ( +// (\HID_Register[3]~input_o & ((!\HID_Register[4]~input_o & ((\PC_Reg_Display[12]~278_combout ))) # (\HID_Register[4]~input_o & (\PC_Reg_Display[12]~283_combout )))) ) ) ) + + .dataa(!\HID_Register[3]~input_o ), + .datab(!\HID_Register[4]~input_o ), + .datac(!\PC_Reg_Display[12]~283_combout ), + .datad(!\PC_Reg_Display[12]~278_combout ), + .datae(!\PC_Reg_Display[12]~273_combout ), + .dataf(!\PC_Reg_Display[12]~268_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[12]~284_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[12]~284 .extended_lut = "off"; +defparam \PC_Reg_Display[12]~284 .lut_mask = 64'h0145236789CDABEF; +defparam \PC_Reg_Display[12]~284 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X36_Y7_N18 +cyclonev_lcell_comb \PC_Reg_Display[12]~285 ( +// Equation(s): +// \PC_Reg_Display[12]~285_combout = ( \PC|pc [12] & ( (!\HID_PC[0]~input_o & (((\PC_Reg_Display[12]~284_combout )))) # (\HID_PC[0]~input_o & ((!\HID_Hi_Low[0]~input_o ) # ((\PC|pc [28])))) ) ) # ( !\PC|pc [12] & ( (!\HID_PC[0]~input_o & +// (((\PC_Reg_Display[12]~284_combout )))) # (\HID_PC[0]~input_o & (\HID_Hi_Low[0]~input_o & (\PC|pc [28]))) ) ) + + .dataa(!\HID_PC[0]~input_o ), + .datab(!\HID_Hi_Low[0]~input_o ), + .datac(!\PC|pc [28]), + .datad(!\PC_Reg_Display[12]~284_combout ), + .datae(gnd), + .dataf(!\PC|pc [12]), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[12]~285_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[12]~285 .extended_lut = "off"; +defparam \PC_Reg_Display[12]~285 .lut_mask = 64'h01AB01AB45EF45EF; +defparam \PC_Reg_Display[12]~285 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X36_Y8_N34 +dffeas \PC|pc[13]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\Add0~101_sumout ), + .asdata(vcc), + .clrn(!\rst[0]~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\PC|pc[13]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \PC|pc[13]~DUPLICATE .is_wysiwyg = "true"; +defparam \PC|pc[13]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X30_Y6_N24 +cyclonev_lcell_comb \PC_Reg_Display[13]~298 ( +// Equation(s): +// \PC_Reg_Display[13]~298_combout = ( \REGS|regs[14][13]~q & ( \HID_Register[2]~input_o & ( (!\HID_Register[0]~input_o ) # (\REGS|regs[15][13]~q ) ) ) ) # ( !\REGS|regs[14][13]~q & ( \HID_Register[2]~input_o & ( (\REGS|regs[15][13]~q & +// \HID_Register[0]~input_o ) ) ) ) # ( \REGS|regs[14][13]~q & ( !\HID_Register[2]~input_o & ( (!\HID_Register[0]~input_o & (\REGS|regs[10][13]~q )) # (\HID_Register[0]~input_o & ((\REGS|regs[11][13]~q ))) ) ) ) # ( !\REGS|regs[14][13]~q & ( +// !\HID_Register[2]~input_o & ( (!\HID_Register[0]~input_o & (\REGS|regs[10][13]~q )) # (\HID_Register[0]~input_o & ((\REGS|regs[11][13]~q ))) ) ) ) + + .dataa(!\REGS|regs[10][13]~q ), + .datab(!\REGS|regs[15][13]~q ), + .datac(!\REGS|regs[11][13]~q ), + .datad(!\HID_Register[0]~input_o ), + .datae(!\REGS|regs[14][13]~q ), + .dataf(!\HID_Register[2]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[13]~298_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[13]~298 .extended_lut = "off"; +defparam \PC_Reg_Display[13]~298 .lut_mask = 64'h550F550F0033FF33; +defparam \PC_Reg_Display[13]~298 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X30_Y11_N3 +cyclonev_lcell_comb \PC_Reg_Display[13]~297 ( +// Equation(s): +// \PC_Reg_Display[13]~297_combout = ( \REGS|regs[12][29]~q & ( \REGS|regs[9][29]~q & ( (!\HID_Register[0]~input_o & (((\HID_Register[2]~input_o )) # (\REGS|regs[8][29]~DUPLICATE_q ))) # (\HID_Register[0]~input_o & (((!\HID_Register[2]~input_o ) # +// (\REGS|regs[13][29]~q )))) ) ) ) # ( !\REGS|regs[12][29]~q & ( \REGS|regs[9][29]~q & ( (!\HID_Register[0]~input_o & (\REGS|regs[8][29]~DUPLICATE_q & ((!\HID_Register[2]~input_o )))) # (\HID_Register[0]~input_o & (((!\HID_Register[2]~input_o ) # +// (\REGS|regs[13][29]~q )))) ) ) ) # ( \REGS|regs[12][29]~q & ( !\REGS|regs[9][29]~q & ( (!\HID_Register[0]~input_o & (((\HID_Register[2]~input_o )) # (\REGS|regs[8][29]~DUPLICATE_q ))) # (\HID_Register[0]~input_o & (((\REGS|regs[13][29]~q & +// \HID_Register[2]~input_o )))) ) ) ) # ( !\REGS|regs[12][29]~q & ( !\REGS|regs[9][29]~q & ( (!\HID_Register[0]~input_o & (\REGS|regs[8][29]~DUPLICATE_q & ((!\HID_Register[2]~input_o )))) # (\HID_Register[0]~input_o & (((\REGS|regs[13][29]~q & +// \HID_Register[2]~input_o )))) ) ) ) + + .dataa(!\REGS|regs[8][29]~DUPLICATE_q ), + .datab(!\HID_Register[0]~input_o ), + .datac(!\REGS|regs[13][29]~q ), + .datad(!\HID_Register[2]~input_o ), + .datae(!\REGS|regs[12][29]~q ), + .dataf(!\REGS|regs[9][29]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[13]~297_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[13]~297 .extended_lut = "off"; +defparam \PC_Reg_Display[13]~297 .lut_mask = 64'h440344CF770377CF; +defparam \PC_Reg_Display[13]~297 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X30_Y12_N30 +cyclonev_lcell_comb \PC_Reg_Display[13]~296 ( +// Equation(s): +// \PC_Reg_Display[13]~296_combout = ( \REGS|regs[13][13]~q & ( \REGS|regs[12][13]~q & ( ((!\HID_Register[0]~input_o & ((\REGS|regs[8][13]~q ))) # (\HID_Register[0]~input_o & (\REGS|regs[9][13]~q ))) # (\HID_Register[2]~input_o ) ) ) ) # ( +// !\REGS|regs[13][13]~q & ( \REGS|regs[12][13]~q & ( (!\HID_Register[2]~input_o & ((!\HID_Register[0]~input_o & ((\REGS|regs[8][13]~q ))) # (\HID_Register[0]~input_o & (\REGS|regs[9][13]~q )))) # (\HID_Register[2]~input_o & +// (((!\HID_Register[0]~input_o )))) ) ) ) # ( \REGS|regs[13][13]~q & ( !\REGS|regs[12][13]~q & ( (!\HID_Register[2]~input_o & ((!\HID_Register[0]~input_o & ((\REGS|regs[8][13]~q ))) # (\HID_Register[0]~input_o & (\REGS|regs[9][13]~q )))) # +// (\HID_Register[2]~input_o & (((\HID_Register[0]~input_o )))) ) ) ) # ( !\REGS|regs[13][13]~q & ( !\REGS|regs[12][13]~q & ( (!\HID_Register[2]~input_o & ((!\HID_Register[0]~input_o & ((\REGS|regs[8][13]~q ))) # (\HID_Register[0]~input_o & +// (\REGS|regs[9][13]~q )))) ) ) ) + + .dataa(!\REGS|regs[9][13]~q ), + .datab(!\REGS|regs[8][13]~q ), + .datac(!\HID_Register[2]~input_o ), + .datad(!\HID_Register[0]~input_o ), + .datae(!\REGS|regs[13][13]~q ), + .dataf(!\REGS|regs[12][13]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[13]~296_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[13]~296 .extended_lut = "off"; +defparam \PC_Reg_Display[13]~296 .lut_mask = 64'h3050305F3F503F5F; +defparam \PC_Reg_Display[13]~296 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X30_Y6_N6 +cyclonev_lcell_comb \PC_Reg_Display[13]~299 ( +// Equation(s): +// \PC_Reg_Display[13]~299_combout = ( \REGS|regs[14][29]~q & ( \REGS|regs[15][29]~q & ( ((!\HID_Register[0]~input_o & ((\REGS|regs[10][29]~q ))) # (\HID_Register[0]~input_o & (\REGS|regs[11][29]~q ))) # (\HID_Register[2]~input_o ) ) ) ) # ( +// !\REGS|regs[14][29]~q & ( \REGS|regs[15][29]~q & ( (!\HID_Register[2]~input_o & ((!\HID_Register[0]~input_o & ((\REGS|regs[10][29]~q ))) # (\HID_Register[0]~input_o & (\REGS|regs[11][29]~q )))) # (\HID_Register[2]~input_o & +// (((\HID_Register[0]~input_o )))) ) ) ) # ( \REGS|regs[14][29]~q & ( !\REGS|regs[15][29]~q & ( (!\HID_Register[2]~input_o & ((!\HID_Register[0]~input_o & ((\REGS|regs[10][29]~q ))) # (\HID_Register[0]~input_o & (\REGS|regs[11][29]~q )))) # +// (\HID_Register[2]~input_o & (((!\HID_Register[0]~input_o )))) ) ) ) # ( !\REGS|regs[14][29]~q & ( !\REGS|regs[15][29]~q & ( (!\HID_Register[2]~input_o & ((!\HID_Register[0]~input_o & ((\REGS|regs[10][29]~q ))) # (\HID_Register[0]~input_o & +// (\REGS|regs[11][29]~q )))) ) ) ) + + .dataa(!\REGS|regs[11][29]~q ), + .datab(!\HID_Register[2]~input_o ), + .datac(!\REGS|regs[10][29]~q ), + .datad(!\HID_Register[0]~input_o ), + .datae(!\REGS|regs[14][29]~q ), + .dataf(!\REGS|regs[15][29]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[13]~299_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[13]~299 .extended_lut = "off"; +defparam \PC_Reg_Display[13]~299 .lut_mask = 64'h0C443F440C773F77; +defparam \PC_Reg_Display[13]~299 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X30_Y6_N51 +cyclonev_lcell_comb \PC_Reg_Display[13]~300 ( +// Equation(s): +// \PC_Reg_Display[13]~300_combout = ( \HID_Hi_Low[0]~input_o & ( \PC_Reg_Display[13]~299_combout & ( (\PC_Reg_Display[13]~297_combout ) # (\HID_Register[1]~input_o ) ) ) ) # ( !\HID_Hi_Low[0]~input_o & ( \PC_Reg_Display[13]~299_combout & ( +// (!\HID_Register[1]~input_o & ((\PC_Reg_Display[13]~296_combout ))) # (\HID_Register[1]~input_o & (\PC_Reg_Display[13]~298_combout )) ) ) ) # ( \HID_Hi_Low[0]~input_o & ( !\PC_Reg_Display[13]~299_combout & ( (!\HID_Register[1]~input_o & +// \PC_Reg_Display[13]~297_combout ) ) ) ) # ( !\HID_Hi_Low[0]~input_o & ( !\PC_Reg_Display[13]~299_combout & ( (!\HID_Register[1]~input_o & ((\PC_Reg_Display[13]~296_combout ))) # (\HID_Register[1]~input_o & (\PC_Reg_Display[13]~298_combout )) ) ) ) + + .dataa(!\PC_Reg_Display[13]~298_combout ), + .datab(!\HID_Register[1]~input_o ), + .datac(!\PC_Reg_Display[13]~297_combout ), + .datad(!\PC_Reg_Display[13]~296_combout ), + .datae(!\HID_Hi_Low[0]~input_o ), + .dataf(!\PC_Reg_Display[13]~299_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[13]~300_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[13]~300 .extended_lut = "off"; +defparam \PC_Reg_Display[13]~300 .lut_mask = 64'h11DD0C0C11DD3F3F; +defparam \PC_Reg_Display[13]~300 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X27_Y8_N26 +dffeas \REGS|regs[5][29]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[29]~451_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~30_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[5][29]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[5][29]~DUPLICATE .is_wysiwyg = "true"; +defparam \REGS|regs[5][29]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: FF_X30_Y11_N1 +dffeas \REGS|regs[4][29] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[29]~451_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~22_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[4][29]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[4][29] .is_wysiwyg = "true"; +defparam \REGS|regs[4][29] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X27_Y8_N12 +cyclonev_lcell_comb \PC_Reg_Display[13]~288 ( +// Equation(s): +// \PC_Reg_Display[13]~288_combout = ( \REGS|regs[4][29]~q & ( \HID_Hi_Low[0]~input_o & ( (!\HID_Register[0]~input_o ) # (\REGS|regs[5][29]~DUPLICATE_q ) ) ) ) # ( !\REGS|regs[4][29]~q & ( \HID_Hi_Low[0]~input_o & ( (\REGS|regs[5][29]~DUPLICATE_q & +// \HID_Register[0]~input_o ) ) ) ) # ( \REGS|regs[4][29]~q & ( !\HID_Hi_Low[0]~input_o & ( (!\HID_Register[0]~input_o & ((\REGS|regs[4][13]~q ))) # (\HID_Register[0]~input_o & (\REGS|regs[5][13]~q )) ) ) ) # ( !\REGS|regs[4][29]~q & ( +// !\HID_Hi_Low[0]~input_o & ( (!\HID_Register[0]~input_o & ((\REGS|regs[4][13]~q ))) # (\HID_Register[0]~input_o & (\REGS|regs[5][13]~q )) ) ) ) + + .dataa(!\REGS|regs[5][29]~DUPLICATE_q ), + .datab(!\REGS|regs[5][13]~q ), + .datac(!\REGS|regs[4][13]~q ), + .datad(!\HID_Register[0]~input_o ), + .datae(!\REGS|regs[4][29]~q ), + .dataf(!\HID_Hi_Low[0]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[13]~288_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[13]~288 .extended_lut = "off"; +defparam \PC_Reg_Display[13]~288 .lut_mask = 64'h0F330F330055FF55; +defparam \PC_Reg_Display[13]~288 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X22_Y7_N16 +dffeas \REGS|regs[3][13] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[13]~452_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~36_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[3][13]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[3][13] .is_wysiwyg = "true"; +defparam \REGS|regs[3][13] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X22_Y7_N14 +dffeas \REGS|regs[3][29] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[29]~451_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~36_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[3][29]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[3][29] .is_wysiwyg = "true"; +defparam \REGS|regs[3][29] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X22_Y7_N12 +cyclonev_lcell_comb \PC_Reg_Display[13]~287 ( +// Equation(s): +// \PC_Reg_Display[13]~287_combout = ( \REGS|regs[3][29]~q & ( \REGS|regs[2][13]~q & ( (!\HID_Register[0]~input_o & (((!\HID_Hi_Low[0]~input_o )) # (\REGS|regs[2][29]~q ))) # (\HID_Register[0]~input_o & (((\HID_Hi_Low[0]~input_o ) # (\REGS|regs[3][13]~q +// )))) ) ) ) # ( !\REGS|regs[3][29]~q & ( \REGS|regs[2][13]~q & ( (!\HID_Register[0]~input_o & (((!\HID_Hi_Low[0]~input_o )) # (\REGS|regs[2][29]~q ))) # (\HID_Register[0]~input_o & (((\REGS|regs[3][13]~q & !\HID_Hi_Low[0]~input_o )))) ) ) ) # ( +// \REGS|regs[3][29]~q & ( !\REGS|regs[2][13]~q & ( (!\HID_Register[0]~input_o & (\REGS|regs[2][29]~q & ((\HID_Hi_Low[0]~input_o )))) # (\HID_Register[0]~input_o & (((\HID_Hi_Low[0]~input_o ) # (\REGS|regs[3][13]~q )))) ) ) ) # ( !\REGS|regs[3][29]~q & +// ( !\REGS|regs[2][13]~q & ( (!\HID_Register[0]~input_o & (\REGS|regs[2][29]~q & ((\HID_Hi_Low[0]~input_o )))) # (\HID_Register[0]~input_o & (((\REGS|regs[3][13]~q & !\HID_Hi_Low[0]~input_o )))) ) ) ) + + .dataa(!\REGS|regs[2][29]~q ), + .datab(!\REGS|regs[3][13]~q ), + .datac(!\HID_Register[0]~input_o ), + .datad(!\HID_Hi_Low[0]~input_o ), + .datae(!\REGS|regs[3][29]~q ), + .dataf(!\REGS|regs[2][13]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[13]~287_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[13]~287 .extended_lut = "off"; +defparam \PC_Reg_Display[13]~287 .lut_mask = 64'h0350035FF350F35F; +defparam \PC_Reg_Display[13]~287 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X30_Y7_N51 +cyclonev_lcell_comb \PC_Reg_Display[13]~286 ( +// Equation(s): +// \PC_Reg_Display[13]~286_combout = ( \REGS|regs[1][13]~q & ( (\HID_Register[0]~input_o & ((!\HID_Hi_Low[0]~input_o ) # (\REGS|regs[1][29]~q ))) ) ) # ( !\REGS|regs[1][13]~q & ( (\REGS|regs[1][29]~q & (\HID_Hi_Low[0]~input_o & \HID_Register[0]~input_o +// )) ) ) + + .dataa(!\REGS|regs[1][29]~q ), + .datab(gnd), + .datac(!\HID_Hi_Low[0]~input_o ), + .datad(!\HID_Register[0]~input_o ), + .datae(!\REGS|regs[1][13]~q ), + .dataf(gnd), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[13]~286_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[13]~286 .extended_lut = "off"; +defparam \PC_Reg_Display[13]~286 .lut_mask = 64'h000500F5000500F5; +defparam \PC_Reg_Display[13]~286 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X28_Y5_N52 +dffeas \REGS|regs[7][13] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[13]~452_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~38_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[7][13]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[7][13] .is_wysiwyg = "true"; +defparam \REGS|regs[7][13] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X28_Y5_N50 +dffeas \REGS|regs[7][29] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[29]~451_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~38_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[7][29]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[7][29] .is_wysiwyg = "true"; +defparam \REGS|regs[7][29] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X28_Y5_N48 +cyclonev_lcell_comb \PC_Reg_Display[13]~289 ( +// Equation(s): +// \PC_Reg_Display[13]~289_combout = ( \REGS|regs[7][29]~q & ( \REGS|regs[6][13]~q & ( (!\HID_Hi_Low[0]~input_o & ((!\HID_Register[0]~input_o ) # ((\REGS|regs[7][13]~q )))) # (\HID_Hi_Low[0]~input_o & (((\REGS|regs[6][29]~q )) # +// (\HID_Register[0]~input_o ))) ) ) ) # ( !\REGS|regs[7][29]~q & ( \REGS|regs[6][13]~q & ( (!\HID_Hi_Low[0]~input_o & ((!\HID_Register[0]~input_o ) # ((\REGS|regs[7][13]~q )))) # (\HID_Hi_Low[0]~input_o & (!\HID_Register[0]~input_o & +// (\REGS|regs[6][29]~q ))) ) ) ) # ( \REGS|regs[7][29]~q & ( !\REGS|regs[6][13]~q & ( (!\HID_Hi_Low[0]~input_o & (\HID_Register[0]~input_o & ((\REGS|regs[7][13]~q )))) # (\HID_Hi_Low[0]~input_o & (((\REGS|regs[6][29]~q )) # (\HID_Register[0]~input_o +// ))) ) ) ) # ( !\REGS|regs[7][29]~q & ( !\REGS|regs[6][13]~q & ( (!\HID_Hi_Low[0]~input_o & (\HID_Register[0]~input_o & ((\REGS|regs[7][13]~q )))) # (\HID_Hi_Low[0]~input_o & (!\HID_Register[0]~input_o & (\REGS|regs[6][29]~q ))) ) ) ) + + .dataa(!\HID_Hi_Low[0]~input_o ), + .datab(!\HID_Register[0]~input_o ), + .datac(!\REGS|regs[6][29]~q ), + .datad(!\REGS|regs[7][13]~q ), + .datae(!\REGS|regs[7][29]~q ), + .dataf(!\REGS|regs[6][13]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[13]~289_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[13]~289 .extended_lut = "off"; +defparam \PC_Reg_Display[13]~289 .lut_mask = 64'h042615378CAE9DBF; +defparam \PC_Reg_Display[13]~289 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X33_Y6_N30 +cyclonev_lcell_comb \PC_Reg_Display[13]~290 ( +// Equation(s): +// \PC_Reg_Display[13]~290_combout = ( \PC_Reg_Display[13]~286_combout & ( \PC_Reg_Display[13]~289_combout & ( (!\HID_Register[2]~input_o & (((!\HID_Register[1]~input_o ) # (\PC_Reg_Display[13]~287_combout )))) # (\HID_Register[2]~input_o & +// (((\HID_Register[1]~input_o )) # (\PC_Reg_Display[13]~288_combout ))) ) ) ) # ( !\PC_Reg_Display[13]~286_combout & ( \PC_Reg_Display[13]~289_combout & ( (!\HID_Register[2]~input_o & (((\PC_Reg_Display[13]~287_combout & \HID_Register[1]~input_o )))) # +// (\HID_Register[2]~input_o & (((\HID_Register[1]~input_o )) # (\PC_Reg_Display[13]~288_combout ))) ) ) ) # ( \PC_Reg_Display[13]~286_combout & ( !\PC_Reg_Display[13]~289_combout & ( (!\HID_Register[2]~input_o & (((!\HID_Register[1]~input_o ) # +// (\PC_Reg_Display[13]~287_combout )))) # (\HID_Register[2]~input_o & (\PC_Reg_Display[13]~288_combout & ((!\HID_Register[1]~input_o )))) ) ) ) # ( !\PC_Reg_Display[13]~286_combout & ( !\PC_Reg_Display[13]~289_combout & ( (!\HID_Register[2]~input_o & +// (((\PC_Reg_Display[13]~287_combout & \HID_Register[1]~input_o )))) # (\HID_Register[2]~input_o & (\PC_Reg_Display[13]~288_combout & ((!\HID_Register[1]~input_o )))) ) ) ) + + .dataa(!\PC_Reg_Display[13]~288_combout ), + .datab(!\HID_Register[2]~input_o ), + .datac(!\PC_Reg_Display[13]~287_combout ), + .datad(!\HID_Register[1]~input_o ), + .datae(!\PC_Reg_Display[13]~286_combout ), + .dataf(!\PC_Reg_Display[13]~289_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[13]~290_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[13]~290 .extended_lut = "off"; +defparam \PC_Reg_Display[13]~290 .lut_mask = 64'h110CDD0C113FDD3F; +defparam \PC_Reg_Display[13]~290 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X31_Y4_N39 +cyclonev_lcell_comb \PC_Reg_Display[13]~292 ( +// Equation(s): +// \PC_Reg_Display[13]~292_combout = ( \REGS|regs[22][29]~q & ( \REGS|regs[22][13]~q & ( ((!\HID_Hi_Low[0]~input_o & ((\REGS|regs[20][13]~q ))) # (\HID_Hi_Low[0]~input_o & (\REGS|regs[20][29]~q ))) # (\HID_Register[1]~input_o ) ) ) ) # ( +// !\REGS|regs[22][29]~q & ( \REGS|regs[22][13]~q & ( (!\HID_Register[1]~input_o & ((!\HID_Hi_Low[0]~input_o & ((\REGS|regs[20][13]~q ))) # (\HID_Hi_Low[0]~input_o & (\REGS|regs[20][29]~q )))) # (\HID_Register[1]~input_o & (((!\HID_Hi_Low[0]~input_o +// )))) ) ) ) # ( \REGS|regs[22][29]~q & ( !\REGS|regs[22][13]~q & ( (!\HID_Register[1]~input_o & ((!\HID_Hi_Low[0]~input_o & ((\REGS|regs[20][13]~q ))) # (\HID_Hi_Low[0]~input_o & (\REGS|regs[20][29]~q )))) # (\HID_Register[1]~input_o & +// (((\HID_Hi_Low[0]~input_o )))) ) ) ) # ( !\REGS|regs[22][29]~q & ( !\REGS|regs[22][13]~q & ( (!\HID_Register[1]~input_o & ((!\HID_Hi_Low[0]~input_o & ((\REGS|regs[20][13]~q ))) # (\HID_Hi_Low[0]~input_o & (\REGS|regs[20][29]~q )))) ) ) ) + + .dataa(!\HID_Register[1]~input_o ), + .datab(!\REGS|regs[20][29]~q ), + .datac(!\REGS|regs[20][13]~q ), + .datad(!\HID_Hi_Low[0]~input_o ), + .datae(!\REGS|regs[22][29]~q ), + .dataf(!\REGS|regs[22][13]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[13]~292_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[13]~292 .extended_lut = "off"; +defparam \PC_Reg_Display[13]~292 .lut_mask = 64'h0A220A775F225F77; +defparam \PC_Reg_Display[13]~292 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X28_Y9_N21 +cyclonev_lcell_comb \PC_Reg_Display[13]~291 ( +// Equation(s): +// \PC_Reg_Display[13]~291_combout = ( \REGS|regs[18][29]~q & ( \HID_Hi_Low[0]~input_o & ( (\HID_Register[1]~input_o ) # (\REGS|regs[16][29]~q ) ) ) ) # ( !\REGS|regs[18][29]~q & ( \HID_Hi_Low[0]~input_o & ( (\REGS|regs[16][29]~q & +// !\HID_Register[1]~input_o ) ) ) ) # ( \REGS|regs[18][29]~q & ( !\HID_Hi_Low[0]~input_o & ( (!\HID_Register[1]~input_o & (\REGS|regs[16][13]~q )) # (\HID_Register[1]~input_o & ((\REGS|regs[18][13]~q ))) ) ) ) # ( !\REGS|regs[18][29]~q & ( +// !\HID_Hi_Low[0]~input_o & ( (!\HID_Register[1]~input_o & (\REGS|regs[16][13]~q )) # (\HID_Register[1]~input_o & ((\REGS|regs[18][13]~q ))) ) ) ) + + .dataa(!\REGS|regs[16][29]~q ), + .datab(!\REGS|regs[16][13]~q ), + .datac(!\REGS|regs[18][13]~q ), + .datad(!\HID_Register[1]~input_o ), + .datae(!\REGS|regs[18][29]~q ), + .dataf(!\HID_Hi_Low[0]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[13]~291_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[13]~291 .extended_lut = "off"; +defparam \PC_Reg_Display[13]~291 .lut_mask = 64'h330F330F550055FF; +defparam \PC_Reg_Display[13]~291 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X31_Y4_N59 +dffeas \REGS|regs[21][13] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[13]~452_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~16_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[21][13]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[21][13] .is_wysiwyg = "true"; +defparam \REGS|regs[21][13] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X31_Y4_N56 +dffeas \REGS|regs[21][29] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[29]~451_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~16_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[21][29]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[21][29] .is_wysiwyg = "true"; +defparam \REGS|regs[21][29] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X31_Y4_N54 +cyclonev_lcell_comb \PC_Reg_Display[13]~294 ( +// Equation(s): +// \PC_Reg_Display[13]~294_combout = ( \REGS|regs[21][29]~q & ( \HID_Hi_Low[0]~input_o & ( (!\HID_Register[1]~input_o ) # (\REGS|regs[23][29]~q ) ) ) ) # ( !\REGS|regs[21][29]~q & ( \HID_Hi_Low[0]~input_o & ( (\HID_Register[1]~input_o & +// \REGS|regs[23][29]~q ) ) ) ) # ( \REGS|regs[21][29]~q & ( !\HID_Hi_Low[0]~input_o & ( (!\HID_Register[1]~input_o & ((\REGS|regs[21][13]~q ))) # (\HID_Register[1]~input_o & (\REGS|regs[23][13]~q )) ) ) ) # ( !\REGS|regs[21][29]~q & ( +// !\HID_Hi_Low[0]~input_o & ( (!\HID_Register[1]~input_o & ((\REGS|regs[21][13]~q ))) # (\HID_Register[1]~input_o & (\REGS|regs[23][13]~q )) ) ) ) + + .dataa(!\HID_Register[1]~input_o ), + .datab(!\REGS|regs[23][29]~q ), + .datac(!\REGS|regs[23][13]~q ), + .datad(!\REGS|regs[21][13]~q ), + .datae(!\REGS|regs[21][29]~q ), + .dataf(!\HID_Hi_Low[0]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[13]~294_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[13]~294 .extended_lut = "off"; +defparam \PC_Reg_Display[13]~294 .lut_mask = 64'h05AF05AF1111BBBB; +defparam \PC_Reg_Display[13]~294 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X25_Y11_N35 +dffeas \REGS|regs[17][29] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[29]~451_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~11_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[17][29]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[17][29] .is_wysiwyg = "true"; +defparam \REGS|regs[17][29] .power_up = "low"; +// synopsys translate_on + +// Location: MLABCELL_X25_Y11_N33 +cyclonev_lcell_comb \PC_Reg_Display[13]~293 ( +// Equation(s): +// \PC_Reg_Display[13]~293_combout = ( \REGS|regs[17][29]~q & ( \REGS|regs[19][29]~q & ( ((!\HID_Register[1]~input_o & ((\REGS|regs[17][13]~q ))) # (\HID_Register[1]~input_o & (\REGS|regs[19][13]~q ))) # (\HID_Hi_Low[0]~input_o ) ) ) ) # ( +// !\REGS|regs[17][29]~q & ( \REGS|regs[19][29]~q & ( (!\HID_Hi_Low[0]~input_o & ((!\HID_Register[1]~input_o & ((\REGS|regs[17][13]~q ))) # (\HID_Register[1]~input_o & (\REGS|regs[19][13]~q )))) # (\HID_Hi_Low[0]~input_o & (((\HID_Register[1]~input_o +// )))) ) ) ) # ( \REGS|regs[17][29]~q & ( !\REGS|regs[19][29]~q & ( (!\HID_Hi_Low[0]~input_o & ((!\HID_Register[1]~input_o & ((\REGS|regs[17][13]~q ))) # (\HID_Register[1]~input_o & (\REGS|regs[19][13]~q )))) # (\HID_Hi_Low[0]~input_o & +// (((!\HID_Register[1]~input_o )))) ) ) ) # ( !\REGS|regs[17][29]~q & ( !\REGS|regs[19][29]~q & ( (!\HID_Hi_Low[0]~input_o & ((!\HID_Register[1]~input_o & ((\REGS|regs[17][13]~q ))) # (\HID_Register[1]~input_o & (\REGS|regs[19][13]~q )))) ) ) ) + + .dataa(!\HID_Hi_Low[0]~input_o ), + .datab(!\REGS|regs[19][13]~q ), + .datac(!\REGS|regs[17][13]~q ), + .datad(!\HID_Register[1]~input_o ), + .datae(!\REGS|regs[17][29]~q ), + .dataf(!\REGS|regs[19][29]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[13]~293_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[13]~293 .extended_lut = "off"; +defparam \PC_Reg_Display[13]~293 .lut_mask = 64'h0A225F220A775F77; +defparam \PC_Reg_Display[13]~293 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X30_Y6_N36 +cyclonev_lcell_comb \PC_Reg_Display[13]~295 ( +// Equation(s): +// \PC_Reg_Display[13]~295_combout = ( \PC_Reg_Display[13]~293_combout & ( \HID_Register[2]~input_o & ( (!\HID_Register[0]~input_o & (\PC_Reg_Display[13]~292_combout )) # (\HID_Register[0]~input_o & ((\PC_Reg_Display[13]~294_combout ))) ) ) ) # ( +// !\PC_Reg_Display[13]~293_combout & ( \HID_Register[2]~input_o & ( (!\HID_Register[0]~input_o & (\PC_Reg_Display[13]~292_combout )) # (\HID_Register[0]~input_o & ((\PC_Reg_Display[13]~294_combout ))) ) ) ) # ( \PC_Reg_Display[13]~293_combout & ( +// !\HID_Register[2]~input_o & ( (\PC_Reg_Display[13]~291_combout ) # (\HID_Register[0]~input_o ) ) ) ) # ( !\PC_Reg_Display[13]~293_combout & ( !\HID_Register[2]~input_o & ( (!\HID_Register[0]~input_o & \PC_Reg_Display[13]~291_combout ) ) ) ) + + .dataa(!\PC_Reg_Display[13]~292_combout ), + .datab(!\HID_Register[0]~input_o ), + .datac(!\PC_Reg_Display[13]~291_combout ), + .datad(!\PC_Reg_Display[13]~294_combout ), + .datae(!\PC_Reg_Display[13]~293_combout ), + .dataf(!\HID_Register[2]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[13]~295_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[13]~295 .extended_lut = "off"; +defparam \PC_Reg_Display[13]~295 .lut_mask = 64'h0C0C3F3F44774477; +defparam \PC_Reg_Display[13]~295 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X30_Y7_N18 +cyclonev_lcell_comb \PC_Reg_Display[13]~303 ( +// Equation(s): +// \PC_Reg_Display[13]~303_combout = ( \REGS|regs[27][13]~q & ( \REGS|regs[30][13]~q & ( (!\HID_Register[2]~input_o & (((\REGS|regs[26][13]~q )) # (\HID_Register[0]~input_o ))) # (\HID_Register[2]~input_o & ((!\HID_Register[0]~input_o ) # +// ((\REGS|regs[31][13]~q )))) ) ) ) # ( !\REGS|regs[27][13]~q & ( \REGS|regs[30][13]~q & ( (!\HID_Register[2]~input_o & (!\HID_Register[0]~input_o & (\REGS|regs[26][13]~q ))) # (\HID_Register[2]~input_o & ((!\HID_Register[0]~input_o ) # +// ((\REGS|regs[31][13]~q )))) ) ) ) # ( \REGS|regs[27][13]~q & ( !\REGS|regs[30][13]~q & ( (!\HID_Register[2]~input_o & (((\REGS|regs[26][13]~q )) # (\HID_Register[0]~input_o ))) # (\HID_Register[2]~input_o & (\HID_Register[0]~input_o & +// ((\REGS|regs[31][13]~q )))) ) ) ) # ( !\REGS|regs[27][13]~q & ( !\REGS|regs[30][13]~q & ( (!\HID_Register[2]~input_o & (!\HID_Register[0]~input_o & (\REGS|regs[26][13]~q ))) # (\HID_Register[2]~input_o & (\HID_Register[0]~input_o & +// ((\REGS|regs[31][13]~q )))) ) ) ) + + .dataa(!\HID_Register[2]~input_o ), + .datab(!\HID_Register[0]~input_o ), + .datac(!\REGS|regs[26][13]~q ), + .datad(!\REGS|regs[31][13]~q ), + .datae(!\REGS|regs[27][13]~q ), + .dataf(!\REGS|regs[30][13]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[13]~303_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[13]~303 .extended_lut = "off"; +defparam \PC_Reg_Display[13]~303 .lut_mask = 64'h08192A3B4C5D6E7F; +defparam \PC_Reg_Display[13]~303 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X31_Y7_N24 +cyclonev_lcell_comb \PC_Reg_Display[13]~302 ( +// Equation(s): +// \PC_Reg_Display[13]~302_combout = ( \HID_Register[0]~input_o & ( \HID_Register[2]~input_o & ( \REGS|regs[29][29]~q ) ) ) # ( !\HID_Register[0]~input_o & ( \HID_Register[2]~input_o & ( \REGS|regs[28][29]~q ) ) ) # ( \HID_Register[0]~input_o & ( +// !\HID_Register[2]~input_o & ( \REGS|regs[25][29]~q ) ) ) # ( !\HID_Register[0]~input_o & ( !\HID_Register[2]~input_o & ( \REGS|regs[24][29]~q ) ) ) + + .dataa(!\REGS|regs[25][29]~q ), + .datab(!\REGS|regs[29][29]~q ), + .datac(!\REGS|regs[28][29]~q ), + .datad(!\REGS|regs[24][29]~q ), + .datae(!\HID_Register[0]~input_o ), + .dataf(!\HID_Register[2]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[13]~302_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[13]~302 .extended_lut = "off"; +defparam \PC_Reg_Display[13]~302 .lut_mask = 64'h00FF55550F0F3333; +defparam \PC_Reg_Display[13]~302 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X30_Y6_N18 +cyclonev_lcell_comb \PC_Reg_Display[13]~304 ( +// Equation(s): +// \PC_Reg_Display[13]~304_combout = ( \REGS|regs[30][29]~q & ( \HID_Register[0]~input_o & ( (!\HID_Register[2]~input_o & ((\REGS|regs[27][29]~q ))) # (\HID_Register[2]~input_o & (\REGS|regs[31][29]~q )) ) ) ) # ( !\REGS|regs[30][29]~q & ( +// \HID_Register[0]~input_o & ( (!\HID_Register[2]~input_o & ((\REGS|regs[27][29]~q ))) # (\HID_Register[2]~input_o & (\REGS|regs[31][29]~q )) ) ) ) # ( \REGS|regs[30][29]~q & ( !\HID_Register[0]~input_o & ( (\REGS|regs[26][29]~q ) # +// (\HID_Register[2]~input_o ) ) ) ) # ( !\REGS|regs[30][29]~q & ( !\HID_Register[0]~input_o & ( (!\HID_Register[2]~input_o & \REGS|regs[26][29]~q ) ) ) ) + + .dataa(!\REGS|regs[31][29]~q ), + .datab(!\HID_Register[2]~input_o ), + .datac(!\REGS|regs[26][29]~q ), + .datad(!\REGS|regs[27][29]~q ), + .datae(!\REGS|regs[30][29]~q ), + .dataf(!\HID_Register[0]~input_o ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[13]~304_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[13]~304 .extended_lut = "off"; +defparam \PC_Reg_Display[13]~304 .lut_mask = 64'h0C0C3F3F11DD11DD; +defparam \PC_Reg_Display[13]~304 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X30_Y4_N35 +dffeas \REGS|regs[25][13] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[13]~452_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~13_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[25][13]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[25][13] .is_wysiwyg = "true"; +defparam \REGS|regs[25][13] .power_up = "low"; +// synopsys translate_on + +// Location: FF_X30_Y4_N53 +dffeas \REGS|regs[24][13] ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(gnd), + .asdata(\rd[13]~452_combout ), + .clrn(vcc), + .aload(gnd), + .sclr(gnd), + .sload(vcc), + .ena(\REGS|Decoder0~4_combout ), + .devclrn(devclrn), + .devpor(devpor), + .q(\REGS|regs[24][13]~q ), + .prn(vcc)); +// synopsys translate_off +defparam \REGS|regs[24][13] .is_wysiwyg = "true"; +defparam \REGS|regs[24][13] .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X30_Y4_N33 +cyclonev_lcell_comb \PC_Reg_Display[13]~301 ( +// Equation(s): +// \PC_Reg_Display[13]~301_combout = ( \REGS|regs[25][13]~q & ( \REGS|regs[24][13]~q & ( (!\HID_Register[2]~input_o ) # ((!\HID_Register[0]~input_o & ((\REGS|regs[28][13]~q ))) # (\HID_Register[0]~input_o & (\REGS|regs[29][13]~q ))) ) ) ) # ( +// !\REGS|regs[25][13]~q & ( \REGS|regs[24][13]~q & ( (!\HID_Register[2]~input_o & (((!\HID_Register[0]~input_o )))) # (\HID_Register[2]~input_o & ((!\HID_Register[0]~input_o & ((\REGS|regs[28][13]~q ))) # (\HID_Register[0]~input_o & +// (\REGS|regs[29][13]~q )))) ) ) ) # ( \REGS|regs[25][13]~q & ( !\REGS|regs[24][13]~q & ( (!\HID_Register[2]~input_o & (((\HID_Register[0]~input_o )))) # (\HID_Register[2]~input_o & ((!\HID_Register[0]~input_o & ((\REGS|regs[28][13]~q ))) # +// (\HID_Register[0]~input_o & (\REGS|regs[29][13]~q )))) ) ) ) # ( !\REGS|regs[25][13]~q & ( !\REGS|regs[24][13]~q & ( (\HID_Register[2]~input_o & ((!\HID_Register[0]~input_o & ((\REGS|regs[28][13]~q ))) # (\HID_Register[0]~input_o & +// (\REGS|regs[29][13]~q )))) ) ) ) + + .dataa(!\HID_Register[2]~input_o ), + .datab(!\REGS|regs[29][13]~q ), + .datac(!\HID_Register[0]~input_o ), + .datad(!\REGS|regs[28][13]~q ), + .datae(!\REGS|regs[25][13]~q ), + .dataf(!\REGS|regs[24][13]~q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[13]~301_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[13]~301 .extended_lut = "off"; +defparam \PC_Reg_Display[13]~301 .lut_mask = 64'h01510B5BA1F1ABFB; +defparam \PC_Reg_Display[13]~301 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X30_Y6_N0 +cyclonev_lcell_comb \PC_Reg_Display[13]~305 ( +// Equation(s): +// \PC_Reg_Display[13]~305_combout = ( \HID_Hi_Low[0]~input_o & ( \PC_Reg_Display[13]~301_combout & ( (!\HID_Register[1]~input_o & (\PC_Reg_Display[13]~302_combout )) # (\HID_Register[1]~input_o & ((\PC_Reg_Display[13]~304_combout ))) ) ) ) # ( +// !\HID_Hi_Low[0]~input_o & ( \PC_Reg_Display[13]~301_combout & ( (!\HID_Register[1]~input_o ) # (\PC_Reg_Display[13]~303_combout ) ) ) ) # ( \HID_Hi_Low[0]~input_o & ( !\PC_Reg_Display[13]~301_combout & ( (!\HID_Register[1]~input_o & +// (\PC_Reg_Display[13]~302_combout )) # (\HID_Register[1]~input_o & ((\PC_Reg_Display[13]~304_combout ))) ) ) ) # ( !\HID_Hi_Low[0]~input_o & ( !\PC_Reg_Display[13]~301_combout & ( (\PC_Reg_Display[13]~303_combout & \HID_Register[1]~input_o ) ) ) ) + + .dataa(!\PC_Reg_Display[13]~303_combout ), + .datab(!\PC_Reg_Display[13]~302_combout ), + .datac(!\PC_Reg_Display[13]~304_combout ), + .datad(!\HID_Register[1]~input_o ), + .datae(!\HID_Hi_Low[0]~input_o ), + .dataf(!\PC_Reg_Display[13]~301_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[13]~305_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[13]~305 .extended_lut = "off"; +defparam \PC_Reg_Display[13]~305 .lut_mask = 64'h0055330FFF55330F; +defparam \PC_Reg_Display[13]~305 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X30_Y6_N54 +cyclonev_lcell_comb \PC_Reg_Display[13]~306 ( +// Equation(s): +// \PC_Reg_Display[13]~306_combout = ( \HID_Register[3]~input_o & ( \PC_Reg_Display[13]~305_combout & ( (\HID_Register[4]~input_o ) # (\PC_Reg_Display[13]~300_combout ) ) ) ) # ( !\HID_Register[3]~input_o & ( \PC_Reg_Display[13]~305_combout & ( +// (!\HID_Register[4]~input_o & (\PC_Reg_Display[13]~290_combout )) # (\HID_Register[4]~input_o & ((\PC_Reg_Display[13]~295_combout ))) ) ) ) # ( \HID_Register[3]~input_o & ( !\PC_Reg_Display[13]~305_combout & ( (\PC_Reg_Display[13]~300_combout & +// !\HID_Register[4]~input_o ) ) ) ) # ( !\HID_Register[3]~input_o & ( !\PC_Reg_Display[13]~305_combout & ( (!\HID_Register[4]~input_o & (\PC_Reg_Display[13]~290_combout )) # (\HID_Register[4]~input_o & ((\PC_Reg_Display[13]~295_combout ))) ) ) ) + + .dataa(!\PC_Reg_Display[13]~300_combout ), + .datab(!\PC_Reg_Display[13]~290_combout ), + .datac(!\PC_Reg_Display[13]~295_combout ), + .datad(!\HID_Register[4]~input_o ), + .datae(!\HID_Register[3]~input_o ), + .dataf(!\PC_Reg_Display[13]~305_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[13]~306_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[13]~306 .extended_lut = "off"; +defparam \PC_Reg_Display[13]~306 .lut_mask = 64'h330F5500330F55FF; +defparam \PC_Reg_Display[13]~306 .shared_arith = "off"; +// synopsys translate_on + +// Location: FF_X36_Y7_N53 +dffeas \PC|pc[29]~DUPLICATE ( + .clk(\clk[0]~inputCLKENA0_outclk ), + .d(\Add0~97_sumout ), + .asdata(vcc), + .clrn(!\rst[0]~input_o ), + .aload(gnd), + .sclr(gnd), + .sload(gnd), + .ena(vcc), + .devclrn(devclrn), + .devpor(devpor), + .q(\PC|pc[29]~DUPLICATE_q ), + .prn(vcc)); +// synopsys translate_off +defparam \PC|pc[29]~DUPLICATE .is_wysiwyg = "true"; +defparam \PC|pc[29]~DUPLICATE .power_up = "low"; +// synopsys translate_on + +// Location: LABCELL_X36_Y7_N15 +cyclonev_lcell_comb \PC_Reg_Display[13]~307 ( +// Equation(s): +// \PC_Reg_Display[13]~307_combout = ( \PC|pc[29]~DUPLICATE_q & ( (!\HID_PC[0]~input_o & (((\PC_Reg_Display[13]~306_combout )))) # (\HID_PC[0]~input_o & (((\PC|pc[13]~DUPLICATE_q )) # (\HID_Hi_Low[0]~input_o ))) ) ) # ( !\PC|pc[29]~DUPLICATE_q & ( +// (!\HID_PC[0]~input_o & (((\PC_Reg_Display[13]~306_combout )))) # (\HID_PC[0]~input_o & (!\HID_Hi_Low[0]~input_o & (\PC|pc[13]~DUPLICATE_q ))) ) ) + + .dataa(!\HID_PC[0]~input_o ), + .datab(!\HID_Hi_Low[0]~input_o ), + .datac(!\PC|pc[13]~DUPLICATE_q ), + .datad(!\PC_Reg_Display[13]~306_combout ), + .datae(gnd), + .dataf(!\PC|pc[29]~DUPLICATE_q ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\PC_Reg_Display[13]~307_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \PC_Reg_Display[13]~307 .extended_lut = "off"; +defparam \PC_Reg_Display[13]~307 .lut_mask = 64'h04AE04AE15BF15BF; +defparam \PC_Reg_Display[13]~307 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X50_Y12_N27 +cyclonev_lcell_comb \display|digit3|Mux5~0 ( +// Equation(s): +// \display|digit3|Mux5~0_combout = ( \PC_Reg_Display[12]~285_combout & ( \PC_Reg_Display[13]~307_combout & ( (!\PC_Reg_Display[14]~329_combout & \PC_Reg_Display[15]~351_combout ) ) ) ) # ( \PC_Reg_Display[12]~285_combout & ( +// !\PC_Reg_Display[13]~307_combout & ( !\PC_Reg_Display[14]~329_combout $ (\PC_Reg_Display[15]~351_combout ) ) ) ) # ( !\PC_Reg_Display[12]~285_combout & ( !\PC_Reg_Display[13]~307_combout & ( (\PC_Reg_Display[14]~329_combout & +// !\PC_Reg_Display[15]~351_combout ) ) ) ) + + .dataa(!\PC_Reg_Display[14]~329_combout ), + .datab(gnd), + .datac(!\PC_Reg_Display[15]~351_combout ), + .datad(gnd), + .datae(!\PC_Reg_Display[12]~285_combout ), + .dataf(!\PC_Reg_Display[13]~307_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\display|digit3|Mux5~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \display|digit3|Mux5~0 .extended_lut = "off"; +defparam \display|digit3|Mux5~0 .lut_mask = 64'h5050A5A500000A0A; +defparam \display|digit3|Mux5~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X50_Y12_N21 +cyclonev_lcell_comb \display|digit3|Mux4~0 ( +// Equation(s): +// \display|digit3|Mux4~0_combout = ( \PC_Reg_Display[12]~285_combout & ( (!\PC_Reg_Display[13]~307_combout & (\PC_Reg_Display[14]~329_combout & !\PC_Reg_Display[15]~351_combout )) # (\PC_Reg_Display[13]~307_combout & ((\PC_Reg_Display[15]~351_combout +// ))) ) ) # ( !\PC_Reg_Display[12]~285_combout & ( (\PC_Reg_Display[14]~329_combout & ((\PC_Reg_Display[15]~351_combout ) # (\PC_Reg_Display[13]~307_combout ))) ) ) + + .dataa(!\PC_Reg_Display[14]~329_combout ), + .datab(!\PC_Reg_Display[13]~307_combout ), + .datac(!\PC_Reg_Display[15]~351_combout ), + .datad(gnd), + .datae(!\PC_Reg_Display[12]~285_combout ), + .dataf(gnd), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\display|digit3|Mux4~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \display|digit3|Mux4~0 .extended_lut = "off"; +defparam \display|digit3|Mux4~0 .lut_mask = 64'h1515434315154343; +defparam \display|digit3|Mux4~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X50_Y12_N36 +cyclonev_lcell_comb \display|digit3|Mux3~0 ( +// Equation(s): +// \display|digit3|Mux3~0_combout = ( \PC_Reg_Display[13]~307_combout & ( (!\PC_Reg_Display[15]~351_combout & (!\PC_Reg_Display[14]~329_combout & !\PC_Reg_Display[12]~285_combout )) # (\PC_Reg_Display[15]~351_combout & (\PC_Reg_Display[14]~329_combout +// )) ) ) # ( !\PC_Reg_Display[13]~307_combout & ( (\PC_Reg_Display[15]~351_combout & (\PC_Reg_Display[14]~329_combout & !\PC_Reg_Display[12]~285_combout )) ) ) + + .dataa(gnd), + .datab(!\PC_Reg_Display[15]~351_combout ), + .datac(!\PC_Reg_Display[14]~329_combout ), + .datad(!\PC_Reg_Display[12]~285_combout ), + .datae(gnd), + .dataf(!\PC_Reg_Display[13]~307_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\display|digit3|Mux3~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \display|digit3|Mux3~0 .extended_lut = "off"; +defparam \display|digit3|Mux3~0 .lut_mask = 64'h03000300C303C303; +defparam \display|digit3|Mux3~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X50_Y12_N39 +cyclonev_lcell_comb \display|digit3|Mux2~0 ( +// Equation(s): +// \display|digit3|Mux2~0_combout = ( \PC_Reg_Display[13]~307_combout & ( (!\PC_Reg_Display[14]~329_combout & (\PC_Reg_Display[15]~351_combout & !\PC_Reg_Display[12]~285_combout )) # (\PC_Reg_Display[14]~329_combout & ((\PC_Reg_Display[12]~285_combout +// ))) ) ) # ( !\PC_Reg_Display[13]~307_combout & ( (!\PC_Reg_Display[14]~329_combout & ((\PC_Reg_Display[12]~285_combout ))) # (\PC_Reg_Display[14]~329_combout & (!\PC_Reg_Display[15]~351_combout & !\PC_Reg_Display[12]~285_combout )) ) ) + + .dataa(!\PC_Reg_Display[14]~329_combout ), + .datab(!\PC_Reg_Display[15]~351_combout ), + .datac(gnd), + .datad(!\PC_Reg_Display[12]~285_combout ), + .datae(gnd), + .dataf(!\PC_Reg_Display[13]~307_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\display|digit3|Mux2~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \display|digit3|Mux2~0 .extended_lut = "off"; +defparam \display|digit3|Mux2~0 .lut_mask = 64'h44AA44AA22552255; +defparam \display|digit3|Mux2~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X50_Y12_N57 +cyclonev_lcell_comb \display|digit3|Mux1~0 ( +// Equation(s): +// \display|digit3|Mux1~0_combout = ( \PC_Reg_Display[12]~285_combout & ( (!\PC_Reg_Display[15]~351_combout ) # ((!\PC_Reg_Display[14]~329_combout & !\PC_Reg_Display[13]~307_combout )) ) ) # ( !\PC_Reg_Display[12]~285_combout & ( +// (\PC_Reg_Display[14]~329_combout & (!\PC_Reg_Display[13]~307_combout & !\PC_Reg_Display[15]~351_combout )) ) ) + + .dataa(!\PC_Reg_Display[14]~329_combout ), + .datab(!\PC_Reg_Display[13]~307_combout ), + .datac(!\PC_Reg_Display[15]~351_combout ), + .datad(gnd), + .datae(!\PC_Reg_Display[12]~285_combout ), + .dataf(gnd), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\display|digit3|Mux1~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \display|digit3|Mux1~0 .extended_lut = "off"; +defparam \display|digit3|Mux1~0 .lut_mask = 64'h4040F8F84040F8F8; +defparam \display|digit3|Mux1~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X50_Y12_N12 +cyclonev_lcell_comb \display|digit3|Mux0~0 ( +// Equation(s): +// \display|digit3|Mux0~0_combout = ( \PC_Reg_Display[13]~307_combout & ( (!\PC_Reg_Display[15]~351_combout & ((!\PC_Reg_Display[14]~329_combout ) # (\PC_Reg_Display[12]~285_combout ))) ) ) # ( !\PC_Reg_Display[13]~307_combout & ( +// (\PC_Reg_Display[12]~285_combout & (!\PC_Reg_Display[15]~351_combout $ (\PC_Reg_Display[14]~329_combout ))) ) ) + + .dataa(gnd), + .datab(!\PC_Reg_Display[15]~351_combout ), + .datac(!\PC_Reg_Display[14]~329_combout ), + .datad(!\PC_Reg_Display[12]~285_combout ), + .datae(gnd), + .dataf(!\PC_Reg_Display[13]~307_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\display|digit3|Mux0~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \display|digit3|Mux0~0 .extended_lut = "off"; +defparam \display|digit3|Mux0~0 .lut_mask = 64'h00C300C3C0CCC0CC; +defparam \display|digit3|Mux0~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: MLABCELL_X50_Y12_N15 +cyclonev_lcell_comb \display|digit3|WideOr0~0 ( +// Equation(s): +// \display|digit3|WideOr0~0_combout = ( \PC_Reg_Display[13]~307_combout & ( (!\PC_Reg_Display[14]~329_combout ) # ((!\PC_Reg_Display[12]~285_combout ) # (\PC_Reg_Display[15]~351_combout )) ) ) # ( !\PC_Reg_Display[13]~307_combout & ( +// (!\PC_Reg_Display[14]~329_combout & (\PC_Reg_Display[15]~351_combout )) # (\PC_Reg_Display[14]~329_combout & ((!\PC_Reg_Display[15]~351_combout ) # (\PC_Reg_Display[12]~285_combout ))) ) ) + + .dataa(!\PC_Reg_Display[14]~329_combout ), + .datab(!\PC_Reg_Display[15]~351_combout ), + .datac(gnd), + .datad(!\PC_Reg_Display[12]~285_combout ), + .datae(gnd), + .dataf(!\PC_Reg_Display[13]~307_combout ), + .datag(gnd), + .cin(gnd), + .sharein(gnd), + .combout(\display|digit3|WideOr0~0_combout ), + .sumout(), + .cout(), + .shareout()); +// synopsys translate_off +defparam \display|digit3|WideOr0~0 .extended_lut = "off"; +defparam \display|digit3|WideOr0~0 .lut_mask = 64'h66776677FFBBFFBB; +defparam \display|digit3|WideOr0~0 .shared_arith = "off"; +// synopsys translate_on + +// Location: LABCELL_X58_Y46_N0 cyclonev_lcell_comb \~QUARTUS_CREATED_GND~I ( // Equation(s): diff --git a/modules/assignment2.sv b/modules/assignment2.sv index eb13b83..1fcf369 100644 --- a/modules/assignment2.sv +++ b/modules/assignment2.sv @@ -91,8 +91,15 @@ module assignment2 #(width=5, ramsz=9, romsz=10) ( `ifdef QUARTUS_SYNTH // Temporary Test output // assign PC_Reg_Display = 16'hC342; - - assign PC_Reg_Display = (HID_Hi_Low) ? regs_out[HID_Register][31:16] : regs_out[HID_Register][15:0]; + // assign PC_Reg_Display = (HID_Hi_Low) ? regs_out[HID_Register][31:16] : regs_out[HID_Register][15:0]; + always_comb begin + if (HID_PC == 1'b1) begin + PC_Reg_Display = (HID_Hi_Low) ? pc_addr[31:16] : pc_addr[15:0]; + end + else begin + PC_Reg_Display = (HID_Hi_Low) ? regs_out[HID_Register][31:16] : regs_out[HID_Register][15:0]; + end + end seven_seg_4digit display ( .num(PC_Reg_Display), @@ -101,6 +108,7 @@ module assignment2 #(width=5, ramsz=9, romsz=10) ( .segments2(out_seg_2), .segments3(out_seg_3) ); -`endif +`endif // code for board test outputs only + endmodule `endif diff --git a/modules/seven_seg_4digit.sv b/modules/seven_seg_4digit.sv index 3ccedd4..8fcb246 100644 --- a/modules/seven_seg_4digit.sv +++ b/modules/seven_seg_4digit.sv @@ -13,28 +13,28 @@ module seven_seg_4digit ( // Rightmost digit seven_seg digit0 ( .num(num[3:0]), - .rbi_inv(1'b0), + .rbi_inv(1'b1), .segments(segments0) ); // Second digit from right seven_seg digit1 ( .num(num[7:4]), - .rbi_inv(1'b0), + .rbi_inv(1'b1), .segments(segments1) ); // Third digit from right seven_seg digit2 ( .num(num[11:8]), - .rbi_inv(1'b0), + .rbi_inv(1'b1), .segments(segments2) ); // Leftmost digit seven_seg digit3 ( .num(num[15:12]), - .rbi_inv(1'b0), + .rbi_inv(1'b1), .segments(segments3) );