TroubleElectrical/FPGA_Uni
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Added code to display current PC,

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Removed Blanking from 7seg 4 digits,
Changed reset to a switch rather than button
Compiled working version for board
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TroubleElectrical committed 2026-10-16 14:27:29 +11:00
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commit d962a1b557
199 files changed
+125133 -7192
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Quartus/A2/output_files/assignment2.map.summary
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Analysis & Synthesis Status : Successful - Fri Oct 16 09:58:19 2026
Analysis & Synthesis Status : Successful - Fri Oct 16 14:21:03 2026
Quartus Prime Version : 25.1std.0 Build 1129 10/21/2025 SC Lite Edition
Revision Name : assignment2
Top-level Entity Name : assignment2
Family : Cyclone V
Logic utilization (in ALMs) : N/A
Total registers : 0
Total pins : 40
Total registers : 2302
Total pins : 41
Total virtual pins : 0
Total block memory bits : 0
Total DSP Blocks : 0