Added Hazard Unit file (tested compiling correctly) labelled variables inside off of the Assignment 3 Questions PDF Figure 2.

Also have a placeholder MUX to place before the ALU for adding hazard unit functionality

modules/assignment3.sv

@@ -10,7 +10,7 @@
 `include "shifter.sv"
 `include "sign_extender.sv"
 `include "gatereg.sv"
-
+`include "hazard_unit.sv"
 
 module assignment3 #(width=5, romsz=9, ramsz=10)(
     input logic [0:0] clk, input logic [0:0] rst
@@ -73,6 +73,22 @@ module assignment3 #(width=5, romsz=9, ramsz=10)(
 	sign_extender #(4, width) SIGNEXT(1'b1, instruction[15:0], sign_ext_imm);
 	gatereg #(width, 1) gate_sign_ext_imm(clk, rst, 1'b1, sign_ext_imm, rt_imm);
 
+    // TODO: 3 to 1 MUX for ALU
+//    always_comb begin
+//        case (forwardA)
+//            2'b00: alu_srcA = idex_readData1;
+//            2'b01: alu_srcA = memwb_writedata;
+//            2'b10: alu_srcA = exmem_aluout;
+//            default: alu_srcA = idex_readData1;
+//        endcase
+//    
+//        case (forwardB)
+//            2'b00: alu_srcB = idex_readData2;
+//            2'b01: alu_srcB = memwb_writedata;
+//            2'b10: alu_srcB = exmem_aluout;
+//            default: alu_srcB = idex_readData2;
+//        endcase
+//    end
 
 	logic [2**width-1:0] alu_out, alu_out_1, alu_out_2;
 	logic [3:0] alu_flags, alu_flags_1;