Implemented instruction classifier on board (Q6) and added blank submission files (for now)

Quartus/A1_Q5/output_files/shifter.sta.rpt

@@ -1,5 +1,5 @@
 Timing Analyzer report for shifter
-Tue Sep 15 19:39:40 2026
+Tue Sep 15 19:49:36 2026
 Quartus Prime Version 25.1std.0 Build 1129 10/21/2025 SC Lite Edition
 
 
@@ -103,7 +103,7 @@ on the Quartus Prime software download page.
 ;                            ;             ;
 ; Usage by Processor         ; % Time Used ;
 ;     Processor 1            ; 100.0%      ;
-;     Processor 2            ;   3.0%      ;
+;     Processor 2            ;   2.8%      ;
 +----------------------------+-------------+
 
 
@@ -470,7 +470,7 @@ No non-DPA dedicated SERDES Receiver circuitry present in device or used in desi
 Info: *******************************************************************
 Info: Running Quartus Prime Timing Analyzer
     Info: Version 25.1std.0 Build 1129 10/21/2025 SC Lite Edition
-    Info: Processing started: Tue Sep 15 19:39:34 2026
+    Info: Processing started: Tue Sep 15 19:49:31 2026
 Info: Command: quartus_sta A1_Q5 -c shifter
 Info: qsta_default_script.tcl version: #1
 Warning (18236): Number of processors has not been specified which may cause overloading on shared machines.  Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance.
@@ -530,9 +530,9 @@ Info (332140): No Minimum Pulse Width paths to report
 Info (332102): Design is not fully constrained for setup requirements
 Info (332102): Design is not fully constrained for hold requirements
 Info: Quartus Prime Timing Analyzer was successful. 0 errors, 6 warnings
-    Info: Peak virtual memory: 777 megabytes
-    Info: Processing ended: Tue Sep 15 19:39:40 2026
-    Info: Elapsed time: 00:00:06
+    Info: Peak virtual memory: 773 megabytes
+    Info: Processing ended: Tue Sep 15 19:49:36 2026
+    Info: Elapsed time: 00:00:05
     Info: Total CPU time (on all processors): 00:00:06