TroubleElectrical/FPGA_Uni
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Added ASU (Q3) testbench to the modelsim projects folder (also confirmed operation of q2)

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TroubleElectrical committed 2026-09-10 15:24:44 +10:00
1 parent dc32347c9b
commit a73990b242
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Quartus/A1_Q3/output_files/asu.map.rpt
+8 -8
View File
@@ -1,5 +1,5 @@
Analysis & Synthesis report for asu
Wed Sep 9 14:14:11 2026
Thu Sep 10 14:01:01 2026
Quartus Prime Version 25.1std.0 Build 1129 10/21/2025 SC Lite Edition
@@ -44,7 +44,7 @@ on the Quartus Prime software download page.
+-----------------------------------------------------------------------------------+
; Analysis & Synthesis Summary ;
+---------------------------------+-------------------------------------------------+
; Analysis & Synthesis Status ; Successful - Wed Sep 9 14:14:11 2026 ;
; Analysis & Synthesis Status ; Successful - Thu Sep 10 14:01:01 2026 ;
; Quartus Prime Version ; 25.1std.0 Build 1129 10/21/2025 SC Lite Edition ;
; Revision Name ; asu ;
; Top-level Entity Name ; asu ;
@@ -261,7 +261,7 @@ Note: In order to hide this table in the UI and the text report file, please set
+----------------+--------------+
; Partition Name ; Elapsed Time ;
+----------------+--------------+
; Top ; 00:00:00 ;
; Top ; 00:00:01 ;
+----------------+--------------+
@@ -271,7 +271,7 @@ Note: In order to hide this table in the UI and the text report file, please set
Info: *******************************************************************
Info: Running Quartus Prime Analysis & Synthesis
Info: Version 25.1std.0 Build 1129 10/21/2025 SC Lite Edition
Info: Processing started: Wed Sep 9 14:14:01 2026
Info: Processing started: Thu Sep 10 14:00:44 2026
Info: Command: quartus_map --read_settings_files=on --write_settings_files=off A1_Q3 -c asu
Warning (18236): Number of processors has not been specified which may cause overloading on shared machines. Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance.
Info (20030): Parallel compilation is enabled and will use 2 of the 2 processors detected
@@ -286,9 +286,9 @@ Info (21057): Implemented 21 device resources after synthesis - the final resour
Info (21059): Implemented 6 output pins
Info (21061): Implemented 6 logic cells
Info: Quartus Prime Analysis & Synthesis was successful. 0 errors, 1 warning
Info: Peak virtual memory: 433 megabytes
Info: Processing ended: Wed Sep 9 14:14:11 2026
Info: Elapsed time: 00:00:10
Info: Total CPU time (on all processors): 00:00:24
Info: Peak virtual memory: 436 megabytes
Info: Processing ended: Thu Sep 10 14:01:01 2026
Info: Elapsed time: 00:00:17
Info: Total CPU time (on all processors): 00:00:33