TroubleElectrical/FPGA_Uni
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Added ASU (Q3) testbench to the modelsim projects folder (also confirmed operation of q2)

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TroubleElectrical committed 2026-09-10 15:24:44 +10:00
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commit a73990b242
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ModelSim/Assignment_1_Q3.cr.mti
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/home/oliver/Documents/FPGA_Dev/FPGA_Uni/ModelSim/asu.sv {1 {vlog -work work -sv -stats=none /home/oliver/Documents/FPGA_Dev/FPGA_Uni/ModelSim/asu.sv
Model Technology ModelSim - Intel FPGA Edition vlog 2020.1 Compiler 2020.02 Feb 28 2020
-- Compiling module asu
Top level modules:
asu
} {} {}} /home/oliver/Documents/FPGA_Dev/FPGA_Uni/ModelSim/asu_tb.sv {1 {vlog -work work -sv -stats=none /home/oliver/Documents/FPGA_Dev/FPGA_Uni/ModelSim/asu_tb.sv
Model Technology ModelSim - Intel FPGA Edition vlog 2020.1 Compiler 2020.02 Feb 28 2020
-- Compiling module asu
-- Compiling module asu_tb
Top level modules:
asu_tb
} {} {}}