Updated ASU (Q3) to utilise the 7seg for output, confirmed operation of Q1 to Q3 on board

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TroubleElectrical committed 2026-09-15 16:52:48 +10:00
1 parent 05361dcf70
commit 9e5fb6f52b
179 files changed
+1611 -1253

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+5 -5
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@@ -1,5 +1,5 @@
Assembler report for seven_seg
Thu Sep 3 16:57:42 2026
Tue Sep 15 16:10:22 2026
Quartus Prime Version 25.1std.0 Build 1129 10/21/2025 SC Lite Edition
@@ -38,7 +38,7 @@ on the Quartus Prime software download page.
+---------------------------------------------------------------+
; Assembler Summary ;
+-----------------------+---------------------------------------+
; Assembler Status ; Successful - Thu Sep 3 16:57:42 2026 ;
; Assembler Status ; Successful - Tue Sep 15 16:10:22 2026 ;
; Revision Name ; seven_seg ;
; Top-level Entity Name ; seven_seg ;
; Family ; Cyclone V ;
@@ -78,13 +78,13 @@ on the Quartus Prime software download page.
Info: *******************************************************************
Info: Running Quartus Prime Assembler
Info: Version 25.1std.0 Build 1129 10/21/2025 SC Lite Edition
Info: Processing started: Thu Sep 3 16:57:37 2026
Info: Processing started: Tue Sep 15 16:10:17 2026
Info: Command: quartus_asm --read_settings_files=off --write_settings_files=off q1 -c seven_seg
Warning (18236): Number of processors has not been specified which may cause overloading on shared machines. Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance.
Info (115030): Assembler is generating device programming files
Info: Quartus Prime Assembler was successful. 0 errors, 1 warning
Info: Peak virtual memory: 525 megabytes
Info: Processing ended: Thu Sep 3 16:57:42 2026
Info: Peak virtual memory: 521 megabytes
Info: Processing ended: Tue Sep 15 16:10:22 2026
Info: Elapsed time: 00:00:05
Info: Total CPU time (on all processors): 00:00:05
+1 -1
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@@ -1 +1 @@
Thu Sep 3 16:57:52 2026
Tue Sep 15 16:10:33 2026
+4 -4
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@@ -1,5 +1,5 @@
EDA Netlist Writer report for seven_seg
Thu Sep 3 16:57:51 2026
Tue Sep 15 16:10:32 2026
Quartus Prime Version 25.1std.0 Build 1129 10/21/2025 SC Lite Edition
@@ -37,7 +37,7 @@ on the Quartus Prime software download page.
+-------------------------------------------------------------------+
; EDA Netlist Writer Summary ;
+---------------------------+---------------------------------------+
; EDA Netlist Writer Status ; Successful - Thu Sep 3 16:57:51 2026 ;
; EDA Netlist Writer Status ; Successful - Tue Sep 15 16:10:32 2026 ;
; Revision Name ; seven_seg ;
; Top-level Entity Name ; seven_seg ;
; Family ; Cyclone V ;
@@ -81,13 +81,13 @@ on the Quartus Prime software download page.
Info: *******************************************************************
Info: Running Quartus Prime EDA Netlist Writer
Info: Version 25.1std.0 Build 1129 10/21/2025 SC Lite Edition
Info: Processing started: Thu Sep 3 16:57:50 2026
Info: Processing started: Tue Sep 15 16:10:31 2026
Info: Command: quartus_eda --read_settings_files=off --write_settings_files=off q1 -c seven_seg
Warning (18236): Number of processors has not been specified which may cause overloading on shared machines. Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance.
Info (204019): Generated file seven_seg.svo in folder "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/Quartus/A1_Q1/simulation/questa/" for EDA simulation tool
Info: Quartus Prime EDA Netlist Writer was successful. 0 errors, 1 warning
Info: Peak virtual memory: 658 megabytes
Info: Processing ended: Thu Sep 3 16:57:51 2026
Info: Processing ended: Tue Sep 15 16:10:32 2026
Info: Elapsed time: 00:00:01
Info: Total CPU time (on all processors): 00:00:01
+6 -6
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@@ -1,5 +1,5 @@
Fitter report for seven_seg
Thu Sep 3 16:57:35 2026
Tue Sep 15 16:10:14 2026
Quartus Prime Version 25.1std.0 Build 1129 10/21/2025 SC Lite Edition
@@ -57,7 +57,7 @@ on the Quartus Prime software download page.
+-----------------------------------------------------------------------------------+
; Fitter Summary ;
+---------------------------------+-------------------------------------------------+
; Fitter Status ; Successful - Thu Sep 3 16:57:35 2026 ;
; Fitter Status ; Successful - Tue Sep 15 16:10:14 2026 ;
; Quartus Prime Version ; 25.1std.0 Build 1129 10/21/2025 SC Lite Edition ;
; Revision Name ; seven_seg ;
; Top-level Entity Name ; seven_seg ;
@@ -152,7 +152,7 @@ on the Quartus Prime software download page.
; ; ;
; Usage by Processor ; % Time Used ;
; Processor 1 ; 100.0% ;
; Processor 2 ; 0.2% ;
; Processor 2 ; 0.3% ;
+----------------------------+-------------+
@@ -1386,8 +1386,8 @@ Info (334004): Delay annotation completed successfully
Info (11801): Fitter post-fit operations ending: elapsed time is 00:00:04
Info: Quartus Prime Fitter was successful. 0 errors, 5 warnings
Info: Peak virtual memory: 1384 megabytes
Info: Processing ended: Thu Sep 3 16:57:35 2026
Info: Elapsed time: 00:00:27
Info: Total CPU time (on all processors): 00:00:39
Info: Processing ended: Tue Sep 15 16:10:15 2026
Info: Elapsed time: 00:00:29
Info: Total CPU time (on all processors): 00:00:40
@@ -1,4 +1,4 @@
Fitter Status : Successful - Thu Sep 3 16:57:35 2026
Fitter Status : Successful - Tue Sep 15 16:10:14 2026
Quartus Prime Version : 25.1std.0 Build 1129 10/21/2025 SC Lite Edition
Revision Name : seven_seg
Top-level Entity Name : seven_seg
@@ -1,5 +1,5 @@
Flow report for seven_seg
Thu Sep 3 16:57:51 2026
Tue Sep 15 16:10:32 2026
Quartus Prime Version 25.1std.0 Build 1129 10/21/2025 SC Lite Edition
@@ -41,7 +41,7 @@ on the Quartus Prime software download page.
+-----------------------------------------------------------------------------------+
; Flow Summary ;
+---------------------------------+-------------------------------------------------+
; Flow Status ; Successful - Thu Sep 3 16:57:51 2026 ;
; Flow Status ; Successful - Tue Sep 15 16:10:32 2026 ;
; Quartus Prime Version ; 25.1std.0 Build 1129 10/21/2025 SC Lite Edition ;
; Revision Name ; seven_seg ;
; Top-level Entity Name ; seven_seg ;
@@ -68,7 +68,7 @@ on the Quartus Prime software download page.
+-------------------+---------------------+
; Option ; Setting ;
+-------------------+---------------------+
; Start date & time ; 09/03/2026 16:56:55 ;
; Start date & time ; 09/15/2026 16:09:34 ;
; Main task ; Compilation ;
; Revision Name ; seven_seg ;
+-------------------+---------------------+
@@ -79,7 +79,7 @@ on the Quartus Prime software download page.
+-------------------------------------+----------------------------------------+---------------+-------------+-----------------------------------+
; Assignment Name ; Value ; Default Value ; Entity Name ; Section Id ;
+-------------------------------------+----------------------------------------+---------------+-------------+-----------------------------------+
; COMPILER_SIGNATURE_ID ; 55629860311554.178841861509729 ; -- ; -- ; -- ;
; COMPILER_SIGNATURE_ID ; 268883478169649.178945257408043 ; -- ; -- ; -- ;
; EDA_GENERATE_FUNCTIONAL_NETLIST ; Off ; -- ; -- ; eda_board_design_timing ;
; EDA_GENERATE_FUNCTIONAL_NETLIST ; Off ; -- ; -- ; eda_board_design_boundary_scan ;
; EDA_GENERATE_FUNCTIONAL_NETLIST ; Off ; -- ; -- ; eda_board_design_signal_integrity ;
@@ -101,10 +101,10 @@ on the Quartus Prime software download page.
+----------------------+--------------+-------------------------+---------------------+------------------------------------+
; Module Name ; Elapsed Time ; Average Processors Used ; Peak Virtual Memory ; Total CPU Time (on all processors) ;
+----------------------+--------------+-------------------------+---------------------+------------------------------------+
; Analysis & Synthesis ; 00:00:11 ; 1.0 ; 419 MB ; 00:00:27 ;
; Fitter ; 00:00:27 ; 1.0 ; 1384 MB ; 00:00:38 ;
; Assembler ; 00:00:05 ; 1.0 ; 525 MB ; 00:00:05 ;
; Timing Analyzer ; 00:00:06 ; 1.0 ; 780 MB ; 00:00:05 ;
; Analysis & Synthesis ; 00:00:11 ; 1.0 ; 419 MB ; 00:00:24 ;
; Fitter ; 00:00:28 ; 1.0 ; 1384 MB ; 00:00:40 ;
; Assembler ; 00:00:05 ; 1.0 ; 521 MB ; 00:00:05 ;
; Timing Analyzer ; 00:00:05 ; 1.0 ; 788 MB ; 00:00:06 ;
; EDA Netlist Writer ; 00:00:01 ; 1.0 ; 658 MB ; 00:00:01 ;
; Total ; 00:00:50 ; -- ; -- ; 00:01:16 ;
+----------------------+--------------+-------------------------+---------------------+------------------------------------+
+6 -6
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@@ -1,5 +1,5 @@
Analysis & Synthesis report for seven_seg
Thu Sep 3 16:57:07 2026
Tue Sep 15 16:09:45 2026
Quartus Prime Version 25.1std.0 Build 1129 10/21/2025 SC Lite Edition
@@ -44,7 +44,7 @@ on the Quartus Prime software download page.
+-----------------------------------------------------------------------------------+
; Analysis & Synthesis Summary ;
+---------------------------------+-------------------------------------------------+
; Analysis & Synthesis Status ; Successful - Thu Sep 3 16:57:07 2026 ;
; Analysis & Synthesis Status ; Successful - Tue Sep 15 16:09:45 2026 ;
; Quartus Prime Version ; 25.1std.0 Build 1129 10/21/2025 SC Lite Edition ;
; Revision Name ; seven_seg ;
; Top-level Entity Name ; seven_seg ;
@@ -269,12 +269,12 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi
Info: *******************************************************************
Info: Running Quartus Prime Analysis & Synthesis
Info: Version 25.1std.0 Build 1129 10/21/2025 SC Lite Edition
Info: Processing started: Thu Sep 3 16:56:55 2026
Info: Processing started: Tue Sep 15 16:09:33 2026
Info: Command: quartus_map --read_settings_files=on --write_settings_files=off q1 -c seven_seg
Warning (18236): Number of processors has not been specified which may cause overloading on shared machines. Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance.
Info (20030): Parallel compilation is enabled and will use 2 of the 2 processors detected
Info (12021): Found 1 design units, including 1 entities, in source file seven_seg.sv
Info (12023): Found entity 1: seven_seg File: /home/oliver/Documents/FPGA_Dev/FPGA_Uni/Quartus/A1_Q1/seven_seg.sv Line: 1
Info (12023): Found entity 1: seven_seg File: /home/oliver/Documents/FPGA_Dev/FPGA_Uni/Quartus/A1_Q1/seven_seg.sv Line: 3
Info (12127): Elaborating entity "seven_seg" for the top level hierarchy
Info (286030): Timing-Driven Synthesis is running
Info (16010): Generating hard_block partition "hard_block:auto_generated_inst"
@@ -285,8 +285,8 @@ Info (21057): Implemented 21 device resources after synthesis - the final resour
Info (21061): Implemented 8 logic cells
Info: Quartus Prime Analysis & Synthesis was successful. 0 errors, 1 warning
Info: Peak virtual memory: 436 megabytes
Info: Processing ended: Thu Sep 3 16:57:07 2026
Info: Processing ended: Tue Sep 15 16:09:45 2026
Info: Elapsed time: 00:00:12
Info: Total CPU time (on all processors): 00:00:27
Info: Total CPU time (on all processors): 00:00:24
@@ -1,4 +1,4 @@
Analysis & Synthesis Status : Successful - Thu Sep 3 16:57:07 2026
Analysis & Synthesis Status : Successful - Tue Sep 15 16:09:45 2026
Quartus Prime Version : 25.1std.0 Build 1129 10/21/2025 SC Lite Edition
Revision Name : seven_seg
Top-level Entity Name : seven_seg
Binary file not shown.
+7 -7
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@@ -1,5 +1,5 @@
Timing Analyzer report for seven_seg
Thu Sep 3 16:57:49 2026
Tue Sep 15 16:10:29 2026
Quartus Prime Version 25.1std.0 Build 1129 10/21/2025 SC Lite Edition
@@ -103,7 +103,7 @@ on the Quartus Prime software download page.
; ; ;
; Usage by Processor ; % Time Used ;
; Processor 1 ; 100.0% ;
; Processor 2 ; 2.1% ;
; Processor 2 ; 2.0% ;
+----------------------------+-------------+
@@ -474,7 +474,7 @@ No non-DPA dedicated SERDES Receiver circuitry present in device or used in desi
Info: *******************************************************************
Info: Running Quartus Prime Timing Analyzer
Info: Version 25.1std.0 Build 1129 10/21/2025 SC Lite Edition
Info: Processing started: Thu Sep 3 16:57:43 2026
Info: Processing started: Tue Sep 15 16:10:24 2026
Info: Command: quartus_sta q1 -c seven_seg
Info: qsta_default_script.tcl version: #1
Warning (18236): Number of processors has not been specified which may cause overloading on shared machines. Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance.
@@ -534,9 +534,9 @@ Info (332140): No Minimum Pulse Width paths to report
Info (332102): Design is not fully constrained for setup requirements
Info (332102): Design is not fully constrained for hold requirements
Info: Quartus Prime Timing Analyzer was successful. 0 errors, 6 warnings
Info: Peak virtual memory: 780 megabytes
Info: Processing ended: Thu Sep 3 16:57:49 2026
Info: Elapsed time: 00:00:06
Info: Total CPU time (on all processors): 00:00:05
Info: Peak virtual memory: 788 megabytes
Info: Processing ended: Tue Sep 15 16:10:29 2026
Info: Elapsed time: 00:00:05
Info: Total CPU time (on all processors): 00:00:06