Added Byte addressable ROM from Slides

This commit is contained in:
TroubleElectrical committed 2026-10-06 16:28:23 +11:00
1 parent 3145dd6a21
commit 9e3525fcac
1 file changed
+14
+14
View File
@@ -0,0 +1,14 @@
`include "rom.sv"
module ByteIM #(parameter m=5,n=2) (
input logic [m-1:0] Ad,
output logic [(2**n)*8-1:0] Dout );
// 2**n byte wide words
// m bit wide byte address
// 2**m bytes of memory
// 2**(m-n) memory words
// 2**(n+3) bit wide words
// Reads the whole word that contains the addressed byte
ROM #(m-n,2**(n+3)) wordrom(Ad[m-1:n],Dout)
endmodule