Updated shifter (Q5) to use proper 2**width approach and corrected the logic such that C is width bits wide, and b is 2**width (as defined in Q5 B)

Quartus/A1_Q5/output_files/shifter.map.summary

@@ -1,11 +1,11 @@
-Analysis & Synthesis Status : Successful - Tue Sep 15 10:06:09 2026
+Analysis & Synthesis Status : Successful - Tue Sep 15 19:38:48 2026
 Quartus Prime Version : 25.1std.0 Build 1129 10/21/2025 SC Lite Edition
 Revision Name : shifter
 Top-level Entity Name : shifter
 Family : Cyclone V
 Logic utilization (in ALMs) : N/A
 Total registers : 0
-Total pins : 30
+Total pins : 17
 Total virtual pins : 0
 Total block memory bits : 0
 Total DSP Blocks : 0