TroubleElectrical/FPGA_Uni
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Updated reg file and assignment for compilation

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TroubleElectrical committed 2026-10-15 14:49:32 +11:00
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Quartus/A2/output_files/assignment2.map.summary
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@@ -1,4 +1,4 @@
Analysis & Synthesis Status : Failed - Thu Oct 15 13:58:40 2026
Analysis & Synthesis Status : Failed - Thu Oct 15 14:44:25 2026
Quartus Prime Version : 25.1std.0 Build 1129 10/21/2025 SC Lite Edition
Revision Name : assignment2
Top-level Entity Name : assignment2