TroubleElectrical/FPGA_Uni
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Repaired Sign extender module again to ensure only combinational logic used

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(There was a compilation error before, also compiled and tested code on board)
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TroubleElectrical committed 2026-10-22 15:53:15 +11:00
1 parent 973b9260b6
commit 8b48084fa5
147 files changed
+413208 -106764
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Quartus/A2/output_files/assignment2.flow.rpt
+12 -12
View File
@@ -1,5 +1,5 @@
Flow report for assignment2
Fri Oct 16 14:23:31 2026
Thu Oct 22 15:48:49 2026
Quartus Prime Version 25.1std.0 Build 1129 10/21/2025 SC Lite Edition
@@ -41,15 +41,15 @@ on the Quartus Prime software download page.
+-----------------------------------------------------------------------------------+
; Flow Summary ;
+---------------------------------+-------------------------------------------------+
; Flow Status ; Successful - Fri Oct 16 14:23:31 2026 ;
; Flow Status ; Successful - Thu Oct 22 15:48:49 2026 ;
; Quartus Prime Version ; 25.1std.0 Build 1129 10/21/2025 SC Lite Edition ;
; Revision Name ; assignment2 ;
; Top-level Entity Name ; assignment2 ;
; Family ; Cyclone V ;
; Device ; 5CGXFC5C6F27C7 ;
; Timing Models ; Final ;
; Logic utilization (in ALMs) ; 1,735 / 29,080 ( 6 % ) ;
; Total registers ; 2524 ;
; Logic utilization (in ALMs) ; 5,271 / 29,080 ( 18 % ) ;
; Total registers ; 9403 ;
; Total pins ; 41 / 364 ( 11 % ) ;
; Total virtual pins ; 0 ;
; Total block memory bits ; 0 / 4,567,040 ( 0 % ) ;
@@ -68,7 +68,7 @@ on the Quartus Prime software download page.
+-------------------+---------------------+
; Option ; Setting ;
+-------------------+---------------------+
; Start date & time ; 10/16/2026 14:20:44 ;
; Start date & time ; 10/22/2026 15:42:03 ;
; Main task ; Compilation ;
; Revision Name ; assignment2 ;
+-------------------+---------------------+
@@ -79,7 +79,7 @@ on the Quartus Prime software download page.
+-------------------------------------+----------------------------------------+---------------+-------------+-----------------------------------+
; Assignment Name ; Value ; Default Value ; Entity Name ; Section Id ;
+-------------------------------------+----------------------------------------+---------------+-------------+-----------------------------------+
; COMPILER_SIGNATURE_ID ; 248825844801641.179212084341235 ; -- ; -- ; -- ;
; COMPILER_SIGNATURE_ID ; 55178954588907.179264412312499 ; -- ; -- ; -- ;
; EDA_GENERATE_FUNCTIONAL_NETLIST ; Off ; -- ; -- ; eda_board_design_timing ;
; EDA_GENERATE_FUNCTIONAL_NETLIST ; Off ; -- ; -- ; eda_board_design_boundary_scan ;
; EDA_GENERATE_FUNCTIONAL_NETLIST ; Off ; -- ; -- ; eda_board_design_signal_integrity ;
@@ -103,12 +103,12 @@ on the Quartus Prime software download page.
+----------------------+--------------+-------------------------+---------------------+------------------------------------+
; Module Name ; Elapsed Time ; Average Processors Used ; Peak Virtual Memory ; Total CPU Time (on all processors) ;
+----------------------+--------------+-------------------------+---------------------+------------------------------------+
; Analysis & Synthesis ; 00:00:19 ; 1.0 ; 448 MB ; 00:00:32 ;
; Fitter ; 00:01:55 ; 1.1 ; 1435 MB ; 00:02:51 ;
; Assembler ; 00:00:07 ; 1.0 ; 548 MB ; 00:00:06 ;
; Timing Analyzer ; 00:00:17 ; 1.6 ; 854 MB ; 00:00:27 ;
; EDA Netlist Writer ; 00:00:02 ; 1.0 ; 693 MB ; 00:00:02 ;
; Total ; 00:02:40 ; -- ; -- ; 00:03:58 ;
; Analysis & Synthesis ; 00:00:38 ; 1.4 ; 523 MB ; 00:00:59 ;
; Fitter ; 00:05:01 ; 1.1 ; 1553 MB ; 00:07:50 ;
; Assembler ; 00:00:09 ; 1.0 ; 613 MB ; 00:00:09 ;
; Timing Analyzer ; 00:00:44 ; 1.8 ; 1041 MB ; 00:01:15 ;
; EDA Netlist Writer ; 00:00:03 ; 1.0 ; 750 MB ; 00:00:03 ;
; Total ; 00:06:35 ; -- ; -- ; 00:10:16 ;
+----------------------+--------------+-------------------------+---------------------+------------------------------------+