Updated RAM code to make sure Bus width is 32 bits

ModelSim/ByteIM.sv

@@ -10,5 +10,5 @@ module ByteIM #(parameter m=5,n=2) (
     // 2**(m-n) memory words
     // 2**(n+3) bit wide words
     // Reads the whole word that contains the addressed byte
-    ROM #(m-n,2**(n+3)) wordrom(Ad[m-1:n],Dout)
+    ROM #(m-n,2**(n+3)) wordrom(Ad[m-1:n],Dout);
 endmodule