Fixed initialisation bug and compilation error in gatereg module. Added mips_pipelined to test suite. Fixed several bugs in assignment3 MIPS module

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riley committed 2026-11-05 14:10:13 +11:00
1 parent cc98bfbf02
commit 38fa35fccd
4 files changed
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@@ -4,4 +4,5 @@
`include "tests/instruction_classifier_tb.sv"
`include "tests/shifter_tb.sv"
`include "tests/alu_tb.sv"
`include "tests/mips_singlecycle.sv"
`include "tests/mips_singlecycle.sv"
`include "tests/mips_pipelined.sv"