Added the updated A1_Q1 Quartus compilation
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61 files changed
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@@ -1,5 +1,5 @@
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Assembler report for seven_seg
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Thu Sep 3 16:28:51 2026
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Thu Sep 3 16:57:42 2026
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Quartus Prime Version 25.1std.0 Build 1129 10/21/2025 SC Lite Edition
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@@ -38,7 +38,7 @@ on the Quartus Prime software download page.
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+---------------------------------------------------------------+
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; Assembler Summary ;
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+-----------------------+---------------------------------------+
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; Assembler Status ; Successful - Thu Sep 3 16:28:51 2026 ;
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; Assembler Status ; Successful - Thu Sep 3 16:57:42 2026 ;
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; Revision Name ; seven_seg ;
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; Top-level Entity Name ; seven_seg ;
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; Family ; Cyclone V ;
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@@ -67,8 +67,8 @@ on the Quartus Prime software download page.
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+----------------+------------------------+
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; Option ; Setting ;
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+----------------+------------------------+
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; JTAG usercode ; 0x00781BE2 ;
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; Checksum ; 0x00781BE2 ;
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; JTAG usercode ; 0x00781CB4 ;
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; Checksum ; 0x00781CB4 ;
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+----------------+------------------------+
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@@ -78,13 +78,13 @@ on the Quartus Prime software download page.
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Info: *******************************************************************
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Info: Running Quartus Prime Assembler
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Info: Version 25.1std.0 Build 1129 10/21/2025 SC Lite Edition
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Info: Processing started: Thu Sep 3 16:28:46 2026
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Info: Processing started: Thu Sep 3 16:57:37 2026
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Info: Command: quartus_asm --read_settings_files=off --write_settings_files=off q1 -c seven_seg
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Warning (18236): Number of processors has not been specified which may cause overloading on shared machines. Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance.
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Info (115030): Assembler is generating device programming files
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Info: Quartus Prime Assembler was successful. 0 errors, 1 warning
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Info: Peak virtual memory: 521 megabytes
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Info: Processing ended: Thu Sep 3 16:28:51 2026
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Info: Peak virtual memory: 525 megabytes
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Info: Processing ended: Thu Sep 3 16:57:42 2026
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Info: Elapsed time: 00:00:05
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Info: Total CPU time (on all processors): 00:00:05
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@@ -1 +1 @@
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Thu Sep 3 16:29:01 2026
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Thu Sep 3 16:57:52 2026
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@@ -1,5 +1,5 @@
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EDA Netlist Writer report for seven_seg
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Thu Sep 3 16:29:00 2026
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Thu Sep 3 16:57:51 2026
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Quartus Prime Version 25.1std.0 Build 1129 10/21/2025 SC Lite Edition
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@@ -37,7 +37,7 @@ on the Quartus Prime software download page.
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+-------------------------------------------------------------------+
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; EDA Netlist Writer Summary ;
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+---------------------------+---------------------------------------+
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; EDA Netlist Writer Status ; Successful - Thu Sep 3 16:29:00 2026 ;
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; EDA Netlist Writer Status ; Successful - Thu Sep 3 16:57:51 2026 ;
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; Revision Name ; seven_seg ;
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; Top-level Entity Name ; seven_seg ;
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; Family ; Cyclone V ;
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@@ -81,13 +81,13 @@ on the Quartus Prime software download page.
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Info: *******************************************************************
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Info: Running Quartus Prime EDA Netlist Writer
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Info: Version 25.1std.0 Build 1129 10/21/2025 SC Lite Edition
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Info: Processing started: Thu Sep 3 16:28:59 2026
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Info: Processing started: Thu Sep 3 16:57:50 2026
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Info: Command: quartus_eda --read_settings_files=off --write_settings_files=off q1 -c seven_seg
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Warning (18236): Number of processors has not been specified which may cause overloading on shared machines. Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance.
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Info (204019): Generated file seven_seg.svo in folder "/home/oliver/Documents/FPGA_Dev/FPGA_Uni/Quartus/A1_Q1/simulation/questa/" for EDA simulation tool
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Info: Quartus Prime EDA Netlist Writer was successful. 0 errors, 1 warning
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Info: Peak virtual memory: 658 megabytes
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Info: Processing ended: Thu Sep 3 16:29:00 2026
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Info: Processing ended: Thu Sep 3 16:57:51 2026
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Info: Elapsed time: 00:00:01
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Info: Total CPU time (on all processors): 00:00:01
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@@ -1,5 +1,5 @@
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Fitter report for seven_seg
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Thu Sep 3 16:28:44 2026
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Thu Sep 3 16:57:35 2026
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Quartus Prime Version 25.1std.0 Build 1129 10/21/2025 SC Lite Edition
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@@ -57,7 +57,7 @@ on the Quartus Prime software download page.
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+-----------------------------------------------------------------------------------+
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; Fitter Summary ;
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+---------------------------------+-------------------------------------------------+
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; Fitter Status ; Successful - Thu Sep 3 16:28:44 2026 ;
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; Fitter Status ; Successful - Thu Sep 3 16:57:35 2026 ;
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; Quartus Prime Version ; 25.1std.0 Build 1129 10/21/2025 SC Lite Edition ;
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; Revision Name ; seven_seg ;
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; Top-level Entity Name ; seven_seg ;
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@@ -271,7 +271,7 @@ The pin-out file can be found in /home/oliver/Documents/FPGA_Dev/FPGA_Uni/Quartu
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; Impedance control blocks ; 0 / 3 ; 0 % ;
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; Hard Memory Controllers ; 0 / 2 ; 0 % ;
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; Average interconnect usage (total/H/V) ; 0.0% / 0.0% / 0.0% ; ;
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; Peak interconnect usage (total/H/V) ; 0.2% / 0.2% / 0.1% ; ;
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; Peak interconnect usage (total/H/V) ; 0.1% / 0.2% / 0.1% ; ;
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; Maximum fan-out ; 8 ; ;
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; Highest non-global fan-out ; 8 ; ;
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; Total fan-out ; 60 ; ;
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@@ -1138,7 +1138,7 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi
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; segments[6] ; Output ; -- ; -- ; -- ; -- ; (0) ; (31) ; -- ; -- ; -- ;
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; segments[7] ; Output ; -- ; -- ; -- ; -- ; (0) ; (31) ; -- ; -- ; -- ;
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; num[0] ; Input ; -- ; (0) ; -- ; -- ; -- ; -- ; -- ; -- ; -- ;
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; rbi_inv[0] ; Input ; -- ; -- ; (0) ; -- ; -- ; -- ; -- ; -- ; -- ;
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; rbi_inv[0] ; Input ; -- ; (0) ; -- ; -- ; -- ; -- ; -- ; -- ; -- ;
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; num[3] ; Input ; -- ; -- ; (0) ; -- ; -- ; -- ; -- ; -- ; -- ;
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; num[1] ; Input ; -- ; -- ; (0) ; -- ; -- ; -- ; -- ; -- ; -- ;
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; num[2] ; Input ; -- ; -- ; (0) ; -- ; -- ; -- ; -- ; -- ; -- ;
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@@ -1152,48 +1152,48 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi
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+---------------------+-------------------+---------+
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; num[0] ; ; ;
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; - segments~0 ; 0 ; 0 ;
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; - WideOr0~0 ; 0 ; 0 ;
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; - Mux5~0 ; 0 ; 0 ;
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; - Mux4~0 ; 0 ; 0 ;
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; - Mux3~0 ; 0 ; 0 ;
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; - Mux2~0 ; 0 ; 0 ;
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; - Mux1~0 ; 0 ; 0 ;
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; - Mux0~0 ; 0 ; 0 ;
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; - WideOr0~0 ; 0 ; 0 ;
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; rbi_inv[0] ; ; ;
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; - segments~0 ; 1 ; 0 ;
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; - Mux5~0 ; 1 ; 0 ;
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; - Mux4~0 ; 1 ; 0 ;
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; - Mux3~0 ; 1 ; 0 ;
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; - Mux2~0 ; 1 ; 0 ;
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; - Mux1~0 ; 1 ; 0 ;
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; - Mux0~0 ; 1 ; 0 ;
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; - segments~0 ; 0 ; 0 ;
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; - Mux5~0 ; 0 ; 0 ;
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; - Mux4~0 ; 0 ; 0 ;
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; - Mux3~0 ; 0 ; 0 ;
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; - Mux2~0 ; 0 ; 0 ;
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; - Mux1~0 ; 0 ; 0 ;
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; - Mux0~0 ; 0 ; 0 ;
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; num[3] ; ; ;
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; - segments~0 ; 1 ; 0 ;
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; - WideOr0~0 ; 1 ; 0 ;
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; - Mux5~0 ; 1 ; 0 ;
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; - Mux4~0 ; 1 ; 0 ;
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; - Mux3~0 ; 1 ; 0 ;
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; - Mux2~0 ; 1 ; 0 ;
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; - Mux1~0 ; 1 ; 0 ;
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; - Mux0~0 ; 1 ; 0 ;
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; - WideOr0~0 ; 1 ; 0 ;
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; num[1] ; ; ;
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; - segments~0 ; 1 ; 0 ;
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; - WideOr0~0 ; 1 ; 0 ;
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; - Mux5~0 ; 1 ; 0 ;
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; - Mux4~0 ; 1 ; 0 ;
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; - Mux3~0 ; 1 ; 0 ;
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; - Mux2~0 ; 1 ; 0 ;
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; - Mux1~0 ; 1 ; 0 ;
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; - Mux0~0 ; 1 ; 0 ;
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; - WideOr0~0 ; 1 ; 0 ;
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; num[2] ; ; ;
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; - segments~0 ; 1 ; 0 ;
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; - WideOr0~0 ; 1 ; 0 ;
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; - Mux5~0 ; 1 ; 0 ;
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; - Mux4~0 ; 1 ; 0 ;
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; - Mux3~0 ; 1 ; 0 ;
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; - Mux2~0 ; 1 ; 0 ;
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; - Mux1~0 ; 1 ; 0 ;
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; - Mux0~0 ; 1 ; 0 ;
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; - WideOr0~0 ; 1 ; 0 ;
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+---------------------+-------------------+---------+
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@@ -1204,8 +1204,8 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi
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+------------------------------+------------------------+
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; Block interconnects ; 13 / 217,884 ( < 1 % ) ;
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; C12 interconnects ; 0 / 10,080 ( 0 % ) ;
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; C2 interconnects ; 8 / 87,208 ( < 1 % ) ;
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; C4 interconnects ; 19 / 41,360 ( < 1 % ) ;
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; C2 interconnects ; 10 / 87,208 ( < 1 % ) ;
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; C4 interconnects ; 17 / 41,360 ( < 1 % ) ;
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; DQS bus muxes ; 0 / 21 ( 0 % ) ;
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; DQS-18 I/O buses ; 0 / 21 ( 0 % ) ;
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; DQS-9 I/O buses ; 0 / 21 ( 0 % ) ;
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@@ -1216,8 +1216,8 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi
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; Quadrant clocks ; 0 / 88 ( 0 % ) ;
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; R14 interconnects ; 10 / 9,228 ( < 1 % ) ;
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; R14/C12 interconnect drivers ; 10 / 15,096 ( < 1 % ) ;
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; R3 interconnects ; 11 / 94,896 ( < 1 % ) ;
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; R6 interconnects ; 20 / 194,640 ( < 1 % ) ;
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; R3 interconnects ; 13 / 94,896 ( < 1 % ) ;
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; R6 interconnects ; 19 / 194,640 ( < 1 % ) ;
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; Spine clocks ; 0 / 180 ( 0 % ) ;
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; Wire stub REs ; 0 / 11,606 ( 0 % ) ;
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+------------------------------+------------------------+
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@@ -1373,7 +1373,7 @@ Info (170137): Fitter placement was successful
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Info (170192): Fitter placement operations ending: elapsed time is 00:00:00
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Info (170193): Fitter routing operations beginning
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Info (170195): Router estimated average interconnect usage is 0% of the available device resources
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Info (170196): Router estimated peak interconnect usage is 0% of the available device resources in the region that extends from location X57_Y0 to location X68_Y11
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Info (170196): Router estimated peak interconnect usage is 0% of the available device resources in the region that extends from location X46_Y0 to location X56_Y11
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Info (170199): The Fitter performed an Auto Fit compilation. Optimizations were skipped to reduce compilation time.
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Info (170201): Optimizations that may affect the design's routability were skipped
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Info (170200): Optimizations that may affect the design's timing were skipped
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@@ -1383,10 +1383,10 @@ Info (334003): Started post-fitting delay annotation
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Info (334004): Delay annotation completed successfully
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Info (334003): Started post-fitting delay annotation
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Info (334004): Delay annotation completed successfully
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Info (11801): Fitter post-fit operations ending: elapsed time is 00:00:03
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Info (11801): Fitter post-fit operations ending: elapsed time is 00:00:04
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Info: Quartus Prime Fitter was successful. 0 errors, 5 warnings
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Info: Peak virtual memory: 1387 megabytes
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Info: Processing ended: Thu Sep 3 16:28:44 2026
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Info: Peak virtual memory: 1384 megabytes
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Info: Processing ended: Thu Sep 3 16:57:35 2026
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Info: Elapsed time: 00:00:27
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Info: Total CPU time (on all processors): 00:00:39
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@@ -1,4 +1,4 @@
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Fitter Status : Successful - Thu Sep 3 16:28:44 2026
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Fitter Status : Successful - Thu Sep 3 16:57:35 2026
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Quartus Prime Version : 25.1std.0 Build 1129 10/21/2025 SC Lite Edition
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Revision Name : seven_seg
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Top-level Entity Name : seven_seg
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@@ -1,5 +1,5 @@
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Flow report for seven_seg
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Thu Sep 3 16:29:00 2026
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Thu Sep 3 16:57:51 2026
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Quartus Prime Version 25.1std.0 Build 1129 10/21/2025 SC Lite Edition
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@@ -41,7 +41,7 @@ on the Quartus Prime software download page.
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+-----------------------------------------------------------------------------------+
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; Flow Summary ;
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+---------------------------------+-------------------------------------------------+
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; Flow Status ; Successful - Thu Sep 3 16:29:00 2026 ;
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; Flow Status ; Successful - Thu Sep 3 16:57:51 2026 ;
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||||
; Quartus Prime Version ; 25.1std.0 Build 1129 10/21/2025 SC Lite Edition ;
|
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; Revision Name ; seven_seg ;
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; Top-level Entity Name ; seven_seg ;
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@@ -68,7 +68,7 @@ on the Quartus Prime software download page.
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+-------------------+---------------------+
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; Option ; Setting ;
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+-------------------+---------------------+
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; Start date & time ; 09/03/2026 16:28:05 ;
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; Start date & time ; 09/03/2026 16:56:55 ;
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; Main task ; Compilation ;
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; Revision Name ; seven_seg ;
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+-------------------+---------------------+
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@@ -79,7 +79,7 @@ on the Quartus Prime software download page.
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+-------------------------------------+----------------------------------------+---------------+-------------+-----------------------------------+
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; Assignment Name ; Value ; Default Value ; Entity Name ; Section Id ;
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+-------------------------------------+----------------------------------------+---------------+-------------+-----------------------------------+
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; COMPILER_SIGNATURE_ID ; 55629860311554.178841688507944 ; -- ; -- ; -- ;
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; COMPILER_SIGNATURE_ID ; 55629860311554.178841861509729 ; -- ; -- ; -- ;
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; EDA_GENERATE_FUNCTIONAL_NETLIST ; Off ; -- ; -- ; eda_board_design_timing ;
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; EDA_GENERATE_FUNCTIONAL_NETLIST ; Off ; -- ; -- ; eda_board_design_boundary_scan ;
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; EDA_GENERATE_FUNCTIONAL_NETLIST ; Off ; -- ; -- ; eda_board_design_signal_integrity ;
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@@ -101,12 +101,12 @@ on the Quartus Prime software download page.
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+----------------------+--------------+-------------------------+---------------------+------------------------------------+
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; Module Name ; Elapsed Time ; Average Processors Used ; Peak Virtual Memory ; Total CPU Time (on all processors) ;
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+----------------------+--------------+-------------------------+---------------------+------------------------------------+
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; Analysis & Synthesis ; 00:00:11 ; 1.0 ; 419 MB ; 00:00:25 ;
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; Fitter ; 00:00:27 ; 1.0 ; 1387 MB ; 00:00:38 ;
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; Assembler ; 00:00:05 ; 1.0 ; 521 MB ; 00:00:05 ;
|
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; Timing Analyzer ; 00:00:06 ; 1.0 ; 792 MB ; 00:00:05 ;
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; Analysis & Synthesis ; 00:00:11 ; 1.0 ; 419 MB ; 00:00:27 ;
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; Fitter ; 00:00:27 ; 1.0 ; 1384 MB ; 00:00:38 ;
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; Assembler ; 00:00:05 ; 1.0 ; 525 MB ; 00:00:05 ;
|
||||
; Timing Analyzer ; 00:00:06 ; 1.0 ; 780 MB ; 00:00:05 ;
|
||||
; EDA Netlist Writer ; 00:00:01 ; 1.0 ; 658 MB ; 00:00:01 ;
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; Total ; 00:00:50 ; -- ; -- ; 00:01:14 ;
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; Total ; 00:00:50 ; -- ; -- ; 00:01:16 ;
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+----------------------+--------------+-------------------------+---------------------+------------------------------------+
|
||||
|
||||
|
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|
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@@ -1,5 +1,5 @@
|
||||
Analysis & Synthesis report for seven_seg
|
||||
Thu Sep 3 16:28:16 2026
|
||||
Thu Sep 3 16:57:07 2026
|
||||
Quartus Prime Version 25.1std.0 Build 1129 10/21/2025 SC Lite Edition
|
||||
|
||||
|
||||
@@ -44,7 +44,7 @@ on the Quartus Prime software download page.
|
||||
+-----------------------------------------------------------------------------------+
|
||||
; Analysis & Synthesis Summary ;
|
||||
+---------------------------------+-------------------------------------------------+
|
||||
; Analysis & Synthesis Status ; Successful - Thu Sep 3 16:28:16 2026 ;
|
||||
; Analysis & Synthesis Status ; Successful - Thu Sep 3 16:57:07 2026 ;
|
||||
; Quartus Prime Version ; 25.1std.0 Build 1129 10/21/2025 SC Lite Edition ;
|
||||
; Revision Name ; seven_seg ;
|
||||
; Top-level Entity Name ; seven_seg ;
|
||||
@@ -233,7 +233,7 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi
|
||||
+--------------------+-----------+---------------+----------------------+------------------------+------------+----------------------------+
|
||||
; Multiplexer Inputs ; Bus Width ; Baseline Area ; Area if Restructured ; Saving if Restructured ; Registered ; Example Multiplexer Output ;
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||||
+--------------------+-----------+---------------+----------------------+------------------------+------------+----------------------------+
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||||
; 4:1 ; 3 bits ; 6 LEs ; 6 LEs ; 0 LEs ; No ; |seven_seg|Mux5 ;
|
||||
; 4:1 ; 3 bits ; 6 LEs ; 6 LEs ; 0 LEs ; No ; |seven_seg|Mux3 ;
|
||||
+--------------------+-----------+---------------+----------------------+------------------------+------------+----------------------------+
|
||||
|
||||
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@@ -269,7 +269,7 @@ Note: For table entries with two numbers listed, the numbers in parentheses indi
|
||||
Info: *******************************************************************
|
||||
Info: Running Quartus Prime Analysis & Synthesis
|
||||
Info: Version 25.1std.0 Build 1129 10/21/2025 SC Lite Edition
|
||||
Info: Processing started: Thu Sep 3 16:28:05 2026
|
||||
Info: Processing started: Thu Sep 3 16:56:55 2026
|
||||
Info: Command: quartus_map --read_settings_files=on --write_settings_files=off q1 -c seven_seg
|
||||
Warning (18236): Number of processors has not been specified which may cause overloading on shared machines. Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance.
|
||||
Info (20030): Parallel compilation is enabled and will use 2 of the 2 processors detected
|
||||
@@ -285,8 +285,8 @@ Info (21057): Implemented 21 device resources after synthesis - the final resour
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||||
Info (21061): Implemented 8 logic cells
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||||
Info: Quartus Prime Analysis & Synthesis was successful. 0 errors, 1 warning
|
||||
Info: Peak virtual memory: 436 megabytes
|
||||
Info: Processing ended: Thu Sep 3 16:28:16 2026
|
||||
Info: Elapsed time: 00:00:11
|
||||
Info: Total CPU time (on all processors): 00:00:25
|
||||
Info: Processing ended: Thu Sep 3 16:57:07 2026
|
||||
Info: Elapsed time: 00:00:12
|
||||
Info: Total CPU time (on all processors): 00:00:27
|
||||
|
||||
|
||||
@@ -1,4 +1,4 @@
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||||
Analysis & Synthesis Status : Successful - Thu Sep 3 16:28:16 2026
|
||||
Analysis & Synthesis Status : Successful - Thu Sep 3 16:57:07 2026
|
||||
Quartus Prime Version : 25.1std.0 Build 1129 10/21/2025 SC Lite Edition
|
||||
Revision Name : seven_seg
|
||||
Top-level Entity Name : seven_seg
|
||||
|
||||
Binary file not shown.
@@ -1,5 +1,5 @@
|
||||
Timing Analyzer report for seven_seg
|
||||
Thu Sep 3 16:28:58 2026
|
||||
Thu Sep 3 16:57:49 2026
|
||||
Quartus Prime Version 25.1std.0 Build 1129 10/21/2025 SC Lite Edition
|
||||
|
||||
|
||||
@@ -474,7 +474,7 @@ No non-DPA dedicated SERDES Receiver circuitry present in device or used in desi
|
||||
Info: *******************************************************************
|
||||
Info: Running Quartus Prime Timing Analyzer
|
||||
Info: Version 25.1std.0 Build 1129 10/21/2025 SC Lite Edition
|
||||
Info: Processing started: Thu Sep 3 16:28:52 2026
|
||||
Info: Processing started: Thu Sep 3 16:57:43 2026
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||||
Info: Command: quartus_sta q1 -c seven_seg
|
||||
Info: qsta_default_script.tcl version: #1
|
||||
Warning (18236): Number of processors has not been specified which may cause overloading on shared machines. Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance.
|
||||
@@ -534,8 +534,8 @@ Info (332140): No Minimum Pulse Width paths to report
|
||||
Info (332102): Design is not fully constrained for setup requirements
|
||||
Info (332102): Design is not fully constrained for hold requirements
|
||||
Info: Quartus Prime Timing Analyzer was successful. 0 errors, 6 warnings
|
||||
Info: Peak virtual memory: 792 megabytes
|
||||
Info: Processing ended: Thu Sep 3 16:28:58 2026
|
||||
Info: Peak virtual memory: 780 megabytes
|
||||
Info: Processing ended: Thu Sep 3 16:57:49 2026
|
||||
Info: Elapsed time: 00:00:06
|
||||
Info: Total CPU time (on all processors): 00:00:05
|
||||
|
||||
|
||||
Reference in new issue
Block a user