TroubleElectrical/FPGA_Uni
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Added the updated A1_Q1 Quartus compilation

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TroubleElectrical committed 2026-09-03 19:22:52 +10:00
1 parent b926d71523
commit 3114cd6b80
61 files changed
+547 -546
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Quartus/A1_Q1/db/seven_seg.hier_info
+11 -11
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@@ -1,32 +1,32 @@
|seven_seg
num[0] => Decoder0.IN3
num[0] => Mux0.IN19
num[0] => Mux1.IN19
num[0] => Mux2.IN19
num[0] => Mux3.IN19
num[0] => Mux4.IN19
num[0] => Mux5.IN19
num[0] => Decoder0.IN3
num[1] => Decoder0.IN2
num[1] => Mux0.IN18
num[1] => Mux1.IN18
num[1] => Mux2.IN18
num[1] => Mux3.IN18
num[1] => Mux4.IN18
num[1] => Mux5.IN18
num[1] => Decoder0.IN2
num[2] => Decoder0.IN1
num[2] => Mux0.IN17
num[2] => Mux1.IN17
num[2] => Mux2.IN17
num[2] => Mux3.IN17
num[2] => Mux4.IN17
num[2] => Mux5.IN17
num[2] => Decoder0.IN1
num[3] => Decoder0.IN0
num[3] => Mux0.IN16
num[3] => Mux1.IN16
num[3] => Mux2.IN16
num[3] => Mux3.IN16
num[3] => Mux4.IN16
num[3] => Mux5.IN16
num[3] => Decoder0.IN0
rbi_inv[0] => Mux0.IN15
rbi_inv[0] => Mux1.IN15
rbi_inv[0] => Mux2.IN15
@@ -35,12 +35,12 @@ rbi_inv[0] => Mux4.IN15
rbi_inv[0] => Mux5.IN15
rbi_inv[0] => segments.DATAB
segments[0] <= segments.DB_MAX_OUTPUT_PORT_TYPE
segments[1] <= WideOr0.DB_MAX_OUTPUT_PORT_TYPE
segments[2] <= Mux5.DB_MAX_OUTPUT_PORT_TYPE
segments[3] <= Mux4.DB_MAX_OUTPUT_PORT_TYPE
segments[4] <= Mux3.DB_MAX_OUTPUT_PORT_TYPE
segments[5] <= Mux2.DB_MAX_OUTPUT_PORT_TYPE
segments[6] <= Mux1.DB_MAX_OUTPUT_PORT_TYPE
segments[7] <= Mux0.DB_MAX_OUTPUT_PORT_TYPE
segments[1] <= Mux5.DB_MAX_OUTPUT_PORT_TYPE
segments[2] <= Mux4.DB_MAX_OUTPUT_PORT_TYPE
segments[3] <= Mux3.DB_MAX_OUTPUT_PORT_TYPE
segments[4] <= Mux2.DB_MAX_OUTPUT_PORT_TYPE
segments[5] <= Mux1.DB_MAX_OUTPUT_PORT_TYPE
segments[6] <= Mux0.DB_MAX_OUTPUT_PORT_TYPE
segments[7] <= WideOr0.DB_MAX_OUTPUT_PORT_TYPE