TroubleElectrical/FPGA_Uni
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Added 4 digit 7seg display module (confirmed working for now),

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Added Inputs for displaying registers / Program Counter high and low bits,
Assigned pins for Display digits, inputs (Labeled HID) and the clk button
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TroubleElectrical committed 2026-10-13 16:32:15 +11:00
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commit 25a953cdc6
138 files changed
+2431 -744
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Quartus/A2/db/assignment2.tmw_info
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start_full_compilation:s:00:00:52
start_full_compilation:s:00:01:00
start_analysis_synthesis:s:00:00:12-start_full_compilation
start_analysis_elaboration:s-start_full_compilation
start_fitter:s:00:00:25-start_full_compilation
start_fitter:s:00:00:32-start_full_compilation
start_assembler:s:00:00:07-start_full_compilation
start_timing_analyzer:s:00:00:06-start_full_compilation
start_timing_analyzer:s:00:00:07-start_full_compilation
start_eda_netlist_writer:s:00:00:02-start_full_compilation