Repaired last few errors in modules and ensured compilation with QUARTUS_BUILD global flag in Quartus build settings and compiled fully (no errors other than pin assignments)

Quartus/A2/assignment2.qsf

@@ -35,6 +35,7 @@
 #    and any changes you make may be lost or overwritten.
 #
 # -------------------------------------------------------------------------- #
+set_global_assignment -name VERILOG_MACRO QUARTUS_SYNTH
 
 
 set_global_assignment -name FAMILY "Cyclone V"
@@ -58,4 +59,5 @@ set_global_assignment -name EDA_GENERATE_FUNCTIONAL_NETLIST OFF -section_id eda_
 set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
 set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
 set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
+
 set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top