TroubleElectrical/FPGA_Uni
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Added all Testbenches to Modelsim and confirmed working operation

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TroubleElectrical committed 2026-09-15 15:15:00 +10:00
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Quartus/A1_Q6/output_files/instruction_classifier.map.summary
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Analysis & Synthesis Status : Successful - Tue Sep 15 10:19:33 2026
Quartus Prime Version : 25.1std.0 Build 1129 10/21/2025 SC Lite Edition
Revision Name : instruction_classifier
Top-level Entity Name : instruction_classifier
Family : Cyclone V
Logic utilization (in ALMs) : N/A
Total registers : 0
Total pins : 13
Total virtual pins : 0
Total block memory bits : 0
Total DSP Blocks : 0
Total HSSI RX PCSs : 0
Total HSSI PMA RX Deserializers : 0
Total HSSI TX PCSs : 0
Total HSSI PMA TX Serializers : 0
Total PLLs : 0
Total DLLs : 0