TroubleElectrical/FPGA_Uni
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Added all Testbenches to Modelsim and confirmed working operation

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TroubleElectrical committed 2026-09-15 15:15:00 +10:00
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commit 05361dcf70
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Quartus/A1_Q3/output_files/asu.sta.rpt
+7 -7
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@@ -1,5 +1,5 @@
Timing Analyzer report for asu
Thu Sep 10 14:01:59 2026
Tue Sep 15 10:01:24 2026
Quartus Prime Version 25.1std.0 Build 1129 10/21/2025 SC Lite Edition
@@ -98,12 +98,12 @@ on the Quartus Prime software download page.
; Number detected on machine ; 4 ;
; Maximum allowed ; 2 ;
; ; ;
; Average used ; 1.02 ;
; Average used ; 1.04 ;
; Maximum used ; 2 ;
; ; ;
; Usage by Processor ; % Time Used ;
; Processor 1 ; 100.0% ;
; Processor 2 ; 1.9% ;
; Processor 2 ; 3.8% ;
+----------------------------+-------------+
@@ -472,7 +472,7 @@ No non-DPA dedicated SERDES Receiver circuitry present in device or used in desi
Info: *******************************************************************
Info: Running Quartus Prime Timing Analyzer
Info: Version 25.1std.0 Build 1129 10/21/2025 SC Lite Edition
Info: Processing started: Thu Sep 10 14:01:51 2026
Info: Processing started: Tue Sep 15 10:01:16 2026
Info: Command: quartus_sta A1_Q3 -c asu
Info: qsta_default_script.tcl version: #1
Warning (18236): Number of processors has not been specified which may cause overloading on shared machines. Set the global assignment NUM_PARALLEL_PROCESSORS in your QSF to an appropriate value for best performance.
@@ -532,9 +532,9 @@ Info (332140): No Minimum Pulse Width paths to report
Info (332102): Design is not fully constrained for setup requirements
Info (332102): Design is not fully constrained for hold requirements
Info: Quartus Prime Timing Analyzer was successful. 0 errors, 6 warnings
Info: Peak virtual memory: 780 megabytes
Info: Processing ended: Thu Sep 10 14:01:59 2026
Info: Peak virtual memory: 785 megabytes
Info: Processing ended: Tue Sep 15 10:01:24 2026
Info: Elapsed time: 00:00:08
Info: Total CPU time (on all processors): 00:00:07
Info: Total CPU time (on all processors): 00:00:08