Added all Testbenches to Modelsim and confirmed working operation

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TroubleElectrical committed 2026-09-15 15:15:00 +10:00
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`ifndef INSTRUCTION_CLASSIFIER_H_SV
`define INSTRUCTION_CLASSIFIER_H_SV
module instruction_classifier(input logic[5:0] op,
output logic[0:0] R, output logic[0:0] B1, output logic[0:0] J,
output logic[0:0] B2, output logic[0:0] I, output logic[0:0] F,
output logic[0:0] M);
always_comb begin
// Performs a rolling equals check
// Uses an AND mask to mask off bits we don't care about
// And a equals operator to perform a bitwise XNOR followed by a horizontal AND
R = ( (op & 6'b111111) == 6'b000000);
B1= ( (op & 6'b111111) == 6'b000001);
J = ( (op & 6'b111110) == 6'b000010);
B2= ( (op & 6'b111100) == 6'b000100);
I = ( (op & 6'b111000) == 6'b001000);
F = ( (op & 6'b110000) == 6'b010000);
M = ( (op & 6'b100000) == 6'b100000);
end
endmodule
`endif