TroubleElectrical/FPGA_Uni
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Added all Testbenches to Modelsim and confirmed working operation

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TroubleElectrical committed 2026-09-15 15:15:00 +10:00
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commit 05361dcf70
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ModelSim/Assignment_1_Q4.cr.mti
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/home/oliver/Documents/FPGA_Dev/FPGA_Uni/ModelSim/alu.sv {1 {vlog -work work -sv -stats=none /home/oliver/Documents/FPGA_Dev/FPGA_Uni/ModelSim/alu.sv
Model Technology ModelSim - Intel FPGA Edition vlog 2020.1 Compiler 2020.02 Feb 28 2020
-- Compiling module asu
-- Compiling module lu
-- Compiling module alu
Top level modules:
alu
} {} {}} /home/oliver/Documents/FPGA_Dev/FPGA_Uni/ModelSim/alu_tb.sv {1 {vlog -work work -sv -stats=none /home/oliver/Documents/FPGA_Dev/FPGA_Uni/ModelSim/alu_tb.sv
Model Technology ModelSim - Intel FPGA Edition vlog 2020.1 Compiler 2020.02 Feb 28 2020
-- Compiling module asu
-- Compiling module lu
-- Compiling module alu
-- Compiling module alu_tb
Top level modules:
alu_tb
} {} {}}