Added project to modelsim
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@@ -7,13 +7,10 @@ module sign_extender #(in_width=4, out_width=5)(
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output logic [2**out_width-1:0] ext_val
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);
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logic [0:0] msb;
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assign msb = (val & {1'b1, {(in_width-1){1'b0}}}) >> (in_width-1);
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always_comb begin
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if (op) begin
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ext_val = { {(2**(out_width-in_width)){msb}}, val};
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end else begin
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ext_val = ({{(2**(out_width-in_width)){1'b0}}, val});
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end
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end
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assign msb = (val >> (in_width-1)) & 1'b1;
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assign ext_val = op
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? { {(2**out_width - 2**in_width){msb}}, val }
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: { {(2**out_width - 2**in_width){1'b0}}, val };
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endmodule
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`endif
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